Demo application of SNICInterface library for Murata TypeYD, which reports sensor data periodically to Xively cloud server . Hardware platform: mbed application board (https://mbed.org/cookbook/mbed-application-board), mbed LPC1768 (https://mbed.org/platforms/mbed-LPC1768/) and TypeYD.
Dependencies: C12832 LM75B MMA7660 SNICInterface libxively mbed-rtos mbed
PowerControl/PowerControl.h@16:ed9b9c28f860, 2014-05-30 (annotated)
- Committer:
- kishino
- Date:
- Fri May 30 08:32:20 2014 +0000
- Revision:
- 16:ed9b9c28f860
Xively demo
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
kishino | 16:ed9b9c28f860 | 1 | /* mbed PowerControl Library |
kishino | 16:ed9b9c28f860 | 2 | * Copyright (c) 2010 Michael Wei |
kishino | 16:ed9b9c28f860 | 3 | */ |
kishino | 16:ed9b9c28f860 | 4 | |
kishino | 16:ed9b9c28f860 | 5 | #ifndef MBED_POWERCONTROL_H |
kishino | 16:ed9b9c28f860 | 6 | #define MBED_POWERCONTROL_H |
kishino | 16:ed9b9c28f860 | 7 | |
kishino | 16:ed9b9c28f860 | 8 | //shouldn't have to include, but fixes weird problems with defines |
kishino | 16:ed9b9c28f860 | 9 | //#include "LPC1768/LPC17xx.h" |
kishino | 16:ed9b9c28f860 | 10 | #include "mbed.h" |
kishino | 16:ed9b9c28f860 | 11 | |
kishino | 16:ed9b9c28f860 | 12 | //System Control Register |
kishino | 16:ed9b9c28f860 | 13 | // bit 0: Reserved |
kishino | 16:ed9b9c28f860 | 14 | // bit 1: Sleep on Exit |
kishino | 16:ed9b9c28f860 | 15 | #define LPC1768_SCR_SLEEPONEXIT 0x2 |
kishino | 16:ed9b9c28f860 | 16 | // bit 2: Deep Sleep |
kishino | 16:ed9b9c28f860 | 17 | #define LPC1768_SCR_SLEEPDEEP 0x4 |
kishino | 16:ed9b9c28f860 | 18 | // bit 3: Resereved |
kishino | 16:ed9b9c28f860 | 19 | // bit 4: Send on Pending |
kishino | 16:ed9b9c28f860 | 20 | #define LPC1768_SCR_SEVONPEND 0x10 |
kishino | 16:ed9b9c28f860 | 21 | // bit 5-31: Reserved |
kishino | 16:ed9b9c28f860 | 22 | |
kishino | 16:ed9b9c28f860 | 23 | //Power Control Register |
kishino | 16:ed9b9c28f860 | 24 | // bit 0: Power mode control bit 0 (power-down mode) |
kishino | 16:ed9b9c28f860 | 25 | #define LPC1768_PCON_PM0 0x1 |
kishino | 16:ed9b9c28f860 | 26 | // bit 1: Power mode control bit 1 (deep power-down mode) |
kishino | 16:ed9b9c28f860 | 27 | #define LPC1768_PCON_PM1 0x2 |
kishino | 16:ed9b9c28f860 | 28 | // bit 2: Brown-out reduced power mode |
kishino | 16:ed9b9c28f860 | 29 | #define LPC1768_PCON_BODRPM 0x4 |
kishino | 16:ed9b9c28f860 | 30 | // bit 3: Brown-out global disable |
kishino | 16:ed9b9c28f860 | 31 | #define LPC1768_PCON_BOGD 0x8 |
kishino | 16:ed9b9c28f860 | 32 | // bit 4: Brown-out reset disable |
kishino | 16:ed9b9c28f860 | 33 | #define LPC1768_PCON_BORD 0x10 |
kishino | 16:ed9b9c28f860 | 34 | // bit 5-7 : Reserved |
kishino | 16:ed9b9c28f860 | 35 | // bit 8: Sleep Mode Entry Flag |
kishino | 16:ed9b9c28f860 | 36 | #define LPC1768_PCON_SMFLAG 0x100 |
kishino | 16:ed9b9c28f860 | 37 | // bit 9: Deep Sleep Entry Flag |
kishino | 16:ed9b9c28f860 | 38 | #define LPC1768_PCON_DSFLAG 0x200 |
kishino | 16:ed9b9c28f860 | 39 | // bit 10: Power Down Entry Flag |
kishino | 16:ed9b9c28f860 | 40 | #define LPC1768_PCON_PDFLAG 0x400 |
kishino | 16:ed9b9c28f860 | 41 | // bit 11: Deep Power Down Entry Flag |
kishino | 16:ed9b9c28f860 | 42 | #define LPC1768_PCON_DPDFLAG 0x800 |
kishino | 16:ed9b9c28f860 | 43 | // bit 12-31: Reserved |
kishino | 16:ed9b9c28f860 | 44 | |
kishino | 16:ed9b9c28f860 | 45 | //"Sleep Mode" (WFI). |
kishino | 16:ed9b9c28f860 | 46 | inline void Sleep(void) |
kishino | 16:ed9b9c28f860 | 47 | { |
kishino | 16:ed9b9c28f860 | 48 | __WFI(); |
kishino | 16:ed9b9c28f860 | 49 | } |
kishino | 16:ed9b9c28f860 | 50 | |
kishino | 16:ed9b9c28f860 | 51 | //"Deep Sleep" Mode |
kishino | 16:ed9b9c28f860 | 52 | inline void DeepSleep(void) |
kishino | 16:ed9b9c28f860 | 53 | { |
kishino | 16:ed9b9c28f860 | 54 | SCB->SCR |= LPC1768_SCR_SLEEPDEEP; |
kishino | 16:ed9b9c28f860 | 55 | __WFI(); |
kishino | 16:ed9b9c28f860 | 56 | } |
kishino | 16:ed9b9c28f860 | 57 | |
kishino | 16:ed9b9c28f860 | 58 | //"Power-Down" Mode |
kishino | 16:ed9b9c28f860 | 59 | inline void PowerDown(void) |
kishino | 16:ed9b9c28f860 | 60 | { |
kishino | 16:ed9b9c28f860 | 61 | SCB->SCR |= LPC1768_SCR_SLEEPDEEP; |
kishino | 16:ed9b9c28f860 | 62 | LPC_SC->PCON &= ~LPC1768_PCON_PM1; |
kishino | 16:ed9b9c28f860 | 63 | LPC_SC->PCON |= LPC1768_PCON_PM0; |
kishino | 16:ed9b9c28f860 | 64 | __WFI(); |
kishino | 16:ed9b9c28f860 | 65 | //reset back to normal |
kishino | 16:ed9b9c28f860 | 66 | LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0); |
kishino | 16:ed9b9c28f860 | 67 | } |
kishino | 16:ed9b9c28f860 | 68 | |
kishino | 16:ed9b9c28f860 | 69 | //"Deep Power-Down" Mode |
kishino | 16:ed9b9c28f860 | 70 | inline void DeepPowerDown(void) |
kishino | 16:ed9b9c28f860 | 71 | { |
kishino | 16:ed9b9c28f860 | 72 | SCB->SCR |= LPC1768_SCR_SLEEPDEEP; |
kishino | 16:ed9b9c28f860 | 73 | LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0; |
kishino | 16:ed9b9c28f860 | 74 | __WFI(); |
kishino | 16:ed9b9c28f860 | 75 | //reset back to normal |
kishino | 16:ed9b9c28f860 | 76 | LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0); |
kishino | 16:ed9b9c28f860 | 77 | } |
kishino | 16:ed9b9c28f860 | 78 | |
kishino | 16:ed9b9c28f860 | 79 | //shut down BOD during power-down/deep sleep |
kishino | 16:ed9b9c28f860 | 80 | inline void BrownOut_ReducedPowerMode_Enable(void) |
kishino | 16:ed9b9c28f860 | 81 | { |
kishino | 16:ed9b9c28f860 | 82 | LPC_SC->PCON |= LPC1768_PCON_BODRPM; |
kishino | 16:ed9b9c28f860 | 83 | } |
kishino | 16:ed9b9c28f860 | 84 | |
kishino | 16:ed9b9c28f860 | 85 | //turn on BOD during power-down/deep sleep |
kishino | 16:ed9b9c28f860 | 86 | inline void BrownOut_ReducedPowerMode_Disable(void) |
kishino | 16:ed9b9c28f860 | 87 | { |
kishino | 16:ed9b9c28f860 | 88 | LPC_SC->PCON &= ~LPC1768_PCON_BODRPM; |
kishino | 16:ed9b9c28f860 | 89 | } |
kishino | 16:ed9b9c28f860 | 90 | |
kishino | 16:ed9b9c28f860 | 91 | //turn off brown out circutry |
kishino | 16:ed9b9c28f860 | 92 | inline void BrownOut_Global_Disable(void) |
kishino | 16:ed9b9c28f860 | 93 | { |
kishino | 16:ed9b9c28f860 | 94 | LPC_SC->PCON |= LPC1768_PCON_BOGD; |
kishino | 16:ed9b9c28f860 | 95 | } |
kishino | 16:ed9b9c28f860 | 96 | |
kishino | 16:ed9b9c28f860 | 97 | //turn on brown out circutry |
kishino | 16:ed9b9c28f860 | 98 | inline void BrownOut_Global_Enable(void) |
kishino | 16:ed9b9c28f860 | 99 | { |
kishino | 16:ed9b9c28f860 | 100 | LPC_SC->PCON &= !LPC1768_PCON_BOGD; |
kishino | 16:ed9b9c28f860 | 101 | } |
kishino | 16:ed9b9c28f860 | 102 | |
kishino | 16:ed9b9c28f860 | 103 | //turn off brown out reset circutry |
kishino | 16:ed9b9c28f860 | 104 | inline void BrownOut_Reset_Disable(void) |
kishino | 16:ed9b9c28f860 | 105 | { |
kishino | 16:ed9b9c28f860 | 106 | LPC_SC->PCON |= LPC1768_PCON_BORD; |
kishino | 16:ed9b9c28f860 | 107 | } |
kishino | 16:ed9b9c28f860 | 108 | |
kishino | 16:ed9b9c28f860 | 109 | //turn on brown outreset circutry |
kishino | 16:ed9b9c28f860 | 110 | inline void BrownOut_Reset_Enable(void) |
kishino | 16:ed9b9c28f860 | 111 | { |
kishino | 16:ed9b9c28f860 | 112 | LPC_SC->PCON &= ~LPC1768_PCON_BORD; |
kishino | 16:ed9b9c28f860 | 113 | } |
kishino | 16:ed9b9c28f860 | 114 | //Peripheral Control Register |
kishino | 16:ed9b9c28f860 | 115 | // bit 0: Reserved |
kishino | 16:ed9b9c28f860 | 116 | // bit 1: PCTIM0: Timer/Counter 0 power/clock enable |
kishino | 16:ed9b9c28f860 | 117 | #define LPC1768_PCONP_PCTIM0 0x2 |
kishino | 16:ed9b9c28f860 | 118 | // bit 2: PCTIM1: Timer/Counter 1 power/clock enable |
kishino | 16:ed9b9c28f860 | 119 | #define LPC1768_PCONP_PCTIM1 0x4 |
kishino | 16:ed9b9c28f860 | 120 | // bit 3: PCUART0: UART 0 power/clock enable |
kishino | 16:ed9b9c28f860 | 121 | #define LPC1768_PCONP_PCUART0 0x8 |
kishino | 16:ed9b9c28f860 | 122 | // bit 4: PCUART1: UART 1 power/clock enable |
kishino | 16:ed9b9c28f860 | 123 | #define LPC1768_PCONP_PCUART1 0x10 |
kishino | 16:ed9b9c28f860 | 124 | // bit 5: Reserved |
kishino | 16:ed9b9c28f860 | 125 | // bit 6: PCPWM1: PWM 1 power/clock enable |
kishino | 16:ed9b9c28f860 | 126 | #define LPC1768_PCONP_PCPWM1 0x40 |
kishino | 16:ed9b9c28f860 | 127 | // bit 7: PCI2C0: I2C interface 0 power/clock enable |
kishino | 16:ed9b9c28f860 | 128 | #define LPC1768_PCONP_PCI2C0 0x80 |
kishino | 16:ed9b9c28f860 | 129 | // bit 8: PCSPI: SPI interface power/clock enable |
kishino | 16:ed9b9c28f860 | 130 | #define LPC1768_PCONP_PCSPI 0x100 |
kishino | 16:ed9b9c28f860 | 131 | // bit 9: PCRTC: RTC power/clock enable |
kishino | 16:ed9b9c28f860 | 132 | #define LPC1768_PCONP_PCRTC 0x200 |
kishino | 16:ed9b9c28f860 | 133 | // bit 10: PCSSP1: SSP interface 1 power/clock enable |
kishino | 16:ed9b9c28f860 | 134 | #define LPC1768_PCONP_PCSSP1 0x400 |
kishino | 16:ed9b9c28f860 | 135 | // bit 11: Reserved |
kishino | 16:ed9b9c28f860 | 136 | // bit 12: PCADC: A/D converter power/clock enable |
kishino | 16:ed9b9c28f860 | 137 | #define LPC1768_PCONP_PCADC 0x1000 |
kishino | 16:ed9b9c28f860 | 138 | // bit 13: PCCAN1: CAN controller 1 power/clock enable |
kishino | 16:ed9b9c28f860 | 139 | #define LPC1768_PCONP_PCCAN1 0x2000 |
kishino | 16:ed9b9c28f860 | 140 | // bit 14: PCCAN2: CAN controller 2 power/clock enable |
kishino | 16:ed9b9c28f860 | 141 | #define LPC1768_PCONP_PCCAN2 0x4000 |
kishino | 16:ed9b9c28f860 | 142 | // bit 15: PCGPIO: GPIOs power/clock enable |
kishino | 16:ed9b9c28f860 | 143 | #define LPC1768_PCONP_PCGPIO 0x8000 |
kishino | 16:ed9b9c28f860 | 144 | // bit 16: PCRIT: Repetitive interrupt timer power/clock enable |
kishino | 16:ed9b9c28f860 | 145 | #define LPC1768_PCONP_PCRIT 0x10000 |
kishino | 16:ed9b9c28f860 | 146 | // bit 17: PCMCPWM: Motor control PWM power/clock enable |
kishino | 16:ed9b9c28f860 | 147 | #define LPC1768_PCONP_PCMCPWM 0x20000 |
kishino | 16:ed9b9c28f860 | 148 | // bit 18: PCQEI: Quadrature encoder interface power/clock enable |
kishino | 16:ed9b9c28f860 | 149 | #define LPC1768_PCONP_PCQEI 0x40000 |
kishino | 16:ed9b9c28f860 | 150 | // bit 19: PCI2C1: I2C interface 1 power/clock enable |
kishino | 16:ed9b9c28f860 | 151 | #define LPC1768_PCONP_PCI2C1 0x80000 |
kishino | 16:ed9b9c28f860 | 152 | // bit 20: Reserved |
kishino | 16:ed9b9c28f860 | 153 | // bit 21: PCSSP0: SSP interface 0 power/clock enable |
kishino | 16:ed9b9c28f860 | 154 | #define LPC1768_PCONP_PCSSP0 0x200000 |
kishino | 16:ed9b9c28f860 | 155 | // bit 22: PCTIM2: Timer 2 power/clock enable |
kishino | 16:ed9b9c28f860 | 156 | #define LPC1768_PCONP_PCTIM2 0x400000 |
kishino | 16:ed9b9c28f860 | 157 | // bit 23: PCTIM3: Timer 3 power/clock enable |
kishino | 16:ed9b9c28f860 | 158 | #define LPC1768_PCONP_PCQTIM3 0x800000 |
kishino | 16:ed9b9c28f860 | 159 | // bit 24: PCUART2: UART 2 power/clock enable |
kishino | 16:ed9b9c28f860 | 160 | #define LPC1768_PCONP_PCUART2 0x1000000 |
kishino | 16:ed9b9c28f860 | 161 | // bit 25: PCUART3: UART 3 power/clock enable |
kishino | 16:ed9b9c28f860 | 162 | #define LPC1768_PCONP_PCUART3 0x2000000 |
kishino | 16:ed9b9c28f860 | 163 | // bit 26: PCI2C2: I2C interface 2 power/clock enable |
kishino | 16:ed9b9c28f860 | 164 | #define LPC1768_PCONP_PCI2C2 0x4000000 |
kishino | 16:ed9b9c28f860 | 165 | // bit 27: PCI2S: I2S interface power/clock enable |
kishino | 16:ed9b9c28f860 | 166 | #define LPC1768_PCONP_PCI2S 0x8000000 |
kishino | 16:ed9b9c28f860 | 167 | // bit 28: Reserved |
kishino | 16:ed9b9c28f860 | 168 | // bit 29: PCGPDMA: GP DMA function power/clock enable |
kishino | 16:ed9b9c28f860 | 169 | #define LPC1768_PCONP_PCGPDMA 0x20000000 |
kishino | 16:ed9b9c28f860 | 170 | // bit 30: PCENET: Ethernet block power/clock enable |
kishino | 16:ed9b9c28f860 | 171 | #define LPC1768_PCONP_PCENET 0x40000000 |
kishino | 16:ed9b9c28f860 | 172 | // bit 31: PCUSB: USB interface power/clock enable |
kishino | 16:ed9b9c28f860 | 173 | #define LPC1768_PCONP_PCUSB 0x80000000 |
kishino | 16:ed9b9c28f860 | 174 | |
kishino | 16:ed9b9c28f860 | 175 | //Powers Up specified Peripheral(s) |
kishino | 16:ed9b9c28f860 | 176 | inline unsigned int Peripheral_PowerUp(unsigned int bitMask) |
kishino | 16:ed9b9c28f860 | 177 | { |
kishino | 16:ed9b9c28f860 | 178 | return LPC_SC->PCONP |= bitMask; |
kishino | 16:ed9b9c28f860 | 179 | } |
kishino | 16:ed9b9c28f860 | 180 | |
kishino | 16:ed9b9c28f860 | 181 | //Powers Down specified Peripheral(s) |
kishino | 16:ed9b9c28f860 | 182 | inline unsigned int Peripheral_PowerDown(unsigned int bitMask) |
kishino | 16:ed9b9c28f860 | 183 | { |
kishino | 16:ed9b9c28f860 | 184 | return LPC_SC->PCONP &= ~bitMask; |
kishino | 16:ed9b9c28f860 | 185 | } |
kishino | 16:ed9b9c28f860 | 186 | |
kishino | 16:ed9b9c28f860 | 187 | //returns if the peripheral is on or off |
kishino | 16:ed9b9c28f860 | 188 | inline bool Peripheral_GetStatus(unsigned int peripheral) |
kishino | 16:ed9b9c28f860 | 189 | { |
kishino | 16:ed9b9c28f860 | 190 | return (LPC_SC->PCONP & peripheral) ? true : false; |
kishino | 16:ed9b9c28f860 | 191 | } |
kishino | 16:ed9b9c28f860 | 192 | |
kishino | 16:ed9b9c28f860 | 193 | #endif |