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targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal.c@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
149:156823d33999 
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_hal.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.7.1
AnnaBridge 167:e84263d55307 6 * @date 21-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This is the common part of the HAL initialization
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 @verbatim
<> 144:ef7eb2e8f9f7 11 ==============================================================================
<> 144:ef7eb2e8f9f7 12 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 13 ==============================================================================
<> 144:ef7eb2e8f9f7 14 [..]
<> 144:ef7eb2e8f9f7 15 The common HAL driver contains a set of generic and common APIs that can be
<> 144:ef7eb2e8f9f7 16 used by the PPP peripheral drivers and the user to start using the HAL.
<> 144:ef7eb2e8f9f7 17 [..]
<> 144:ef7eb2e8f9f7 18 The HAL contains two APIs' categories:
<> 144:ef7eb2e8f9f7 19 (+) Common HAL APIs
<> 144:ef7eb2e8f9f7 20 (+) Services HAL APIs
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 @endverbatim
<> 144:ef7eb2e8f9f7 23 ******************************************************************************
<> 144:ef7eb2e8f9f7 24 * @attention
<> 144:ef7eb2e8f9f7 25 *
AnnaBridge 167:e84263d55307 26 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 29 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 30 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 31 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 32 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 33 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 34 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 35 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 36 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 37 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 38 *
<> 144:ef7eb2e8f9f7 39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 40 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 41 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 42 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 43 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 44 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 46 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 47 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 48 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 49 *
<> 144:ef7eb2e8f9f7 50 ******************************************************************************
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 54 #include "stm32l4xx_hal.h"
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /** @addtogroup STM32L4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /** @defgroup HAL HAL
<> 144:ef7eb2e8f9f7 61 * @brief HAL module driver
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 #ifdef HAL_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 68 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 69 /**
AnnaBridge 167:e84263d55307 70 * @brief STM32L4xx HAL Driver version number V1.7.1
<> 144:ef7eb2e8f9f7 71 */
<> 144:ef7eb2e8f9f7 72 #define __STM32L4xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
AnnaBridge 167:e84263d55307 73 #define __STM32L4xx_HAL_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
<> 144:ef7eb2e8f9f7 74 #define __STM32L4xx_HAL_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
<> 144:ef7eb2e8f9f7 75 #define __STM32L4xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
<> 144:ef7eb2e8f9f7 76 #define __STM32L4xx_HAL_VERSION ((__STM32L4xx_HAL_VERSION_MAIN << 24)\
<> 144:ef7eb2e8f9f7 77 |(__STM32L4xx_HAL_VERSION_SUB1 << 16)\
<> 144:ef7eb2e8f9f7 78 |(__STM32L4xx_HAL_VERSION_SUB2 << 8 )\
<> 144:ef7eb2e8f9f7 79 |(__STM32L4xx_HAL_VERSION_RC))
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 #if defined(VREFBUF)
<> 144:ef7eb2e8f9f7 82 #define VREFBUF_TIMEOUT_VALUE (uint32_t)10 /* 10 ms (to be confirmed) */
<> 144:ef7eb2e8f9f7 83 #endif /* VREFBUF */
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 /* ------------ SYSCFG registers bit address in the alias region ------------ */
<> 144:ef7eb2e8f9f7 86 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
<> 144:ef7eb2e8f9f7 87 /* --- MEMRMP Register ---*/
<> 144:ef7eb2e8f9f7 88 /* Alias word address of FB_MODE bit */
<> 144:ef7eb2e8f9f7 89 #define MEMRMP_OFFSET SYSCFG_OFFSET
<> 144:ef7eb2e8f9f7 90 #define FB_MODE_BitNumber ((uint8_t)0x8)
<> 144:ef7eb2e8f9f7 91 #define FB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (FB_MODE_BitNumber * 4))
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /* --- SCSR Register ---*/
<> 144:ef7eb2e8f9f7 94 /* Alias word address of SRAM2ER bit */
<> 144:ef7eb2e8f9f7 95 #define SCSR_OFFSET (SYSCFG_OFFSET + 0x18)
<> 144:ef7eb2e8f9f7 96 #define BRER_BitNumber ((uint8_t)0x0)
<> 144:ef7eb2e8f9f7 97 #define SCSR_SRAM2ER_BB (PERIPH_BB_BASE + (SCSR_OFFSET * 32) + (BRER_BitNumber * 4))
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 100 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 101 __IO uint32_t uwTick;
<> 144:ef7eb2e8f9f7 102
<> 144:ef7eb2e8f9f7 103 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 104 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 /** @defgroup HAL_Exported_Functions HAL Exported Functions
<> 144:ef7eb2e8f9f7 107 * @{
<> 144:ef7eb2e8f9f7 108 */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
<> 144:ef7eb2e8f9f7 111 * @brief Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 112 *
<> 144:ef7eb2e8f9f7 113 @verbatim
<> 144:ef7eb2e8f9f7 114 ===============================================================================
<> 144:ef7eb2e8f9f7 115 ##### Initialization and de-initialization functions #####
<> 144:ef7eb2e8f9f7 116 ===============================================================================
<> 144:ef7eb2e8f9f7 117 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 118 (+) Initialize the Flash interface the NVIC allocation and initial time base
<> 144:ef7eb2e8f9f7 119 clock configuration.
<> 144:ef7eb2e8f9f7 120 (+) De-initialize common part of the HAL.
<> 144:ef7eb2e8f9f7 121 (+) Configure the time base source to have 1ms time base with a dedicated
<> 144:ef7eb2e8f9f7 122 Tick interrupt priority.
<> 144:ef7eb2e8f9f7 123 (++) SysTick timer is used by default as source of time base, but user
<> 144:ef7eb2e8f9f7 124 can eventually implement his proper time base source (a general purpose
<> 144:ef7eb2e8f9f7 125 timer for example or other time source), keeping in mind that Time base
<> 144:ef7eb2e8f9f7 126 duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
<> 144:ef7eb2e8f9f7 127 handled in milliseconds basis.
<> 144:ef7eb2e8f9f7 128 (++) Time base configuration function (HAL_InitTick ()) is called automatically
<> 144:ef7eb2e8f9f7 129 at the beginning of the program after reset by HAL_Init() or at any time
<> 144:ef7eb2e8f9f7 130 when clock is configured, by HAL_RCC_ClockConfig().
<> 144:ef7eb2e8f9f7 131 (++) Source of time base is configured to generate interrupts at regular
<> 144:ef7eb2e8f9f7 132 time intervals. Care must be taken if HAL_Delay() is called from a
<> 144:ef7eb2e8f9f7 133 peripheral ISR process, the Tick interrupt line must have higher priority
<> 144:ef7eb2e8f9f7 134 (numerically lower) than the peripheral interrupt. Otherwise the caller
<> 144:ef7eb2e8f9f7 135 ISR process will be blocked.
<> 144:ef7eb2e8f9f7 136 (++) functions affecting time base configurations are declared as __weak
<> 144:ef7eb2e8f9f7 137 to make override possible in case of other implementations in user file.
<> 144:ef7eb2e8f9f7 138 @endverbatim
<> 144:ef7eb2e8f9f7 139 * @{
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /**
<> 144:ef7eb2e8f9f7 143 * @brief Configure the Flash prefetch, the Instruction and Data caches,
<> 144:ef7eb2e8f9f7 144 * the time base source, NVIC and any required global low level hardware
<> 144:ef7eb2e8f9f7 145 * by calling the HAL_MspInit() callback function to be optionally defined in user file
<> 144:ef7eb2e8f9f7 146 * stm32l4xx_hal_msp.c.
<> 144:ef7eb2e8f9f7 147 *
<> 144:ef7eb2e8f9f7 148 * @note HAL_Init() function is called at the beginning of program after reset and before
<> 144:ef7eb2e8f9f7 149 * the clock configuration.
<> 144:ef7eb2e8f9f7 150 *
<> 144:ef7eb2e8f9f7 151 * @note In the default implementation the System Timer (Systick) is used as source of time base.
<> 144:ef7eb2e8f9f7 152 * The Systick configuration is based on MSI clock, as MSI is the clock
<> 144:ef7eb2e8f9f7 153 * used after a system Reset and the NVIC configuration is set to Priority group 4.
<> 144:ef7eb2e8f9f7 154 * Once done, time base tick starts incrementing: the tick variable counter is incremented
<> 144:ef7eb2e8f9f7 155 * each 1ms in the SysTick_Handler() interrupt handler.
<> 144:ef7eb2e8f9f7 156 *
<> 144:ef7eb2e8f9f7 157 * @retval HAL status
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 HAL_StatusTypeDef HAL_Init(void)
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 /* Configure Flash prefetch, Instruction cache, Data cache */
<> 144:ef7eb2e8f9f7 162 /* Default configuration at reset is: */
<> 144:ef7eb2e8f9f7 163 /* - Prefetch disabled */
<> 144:ef7eb2e8f9f7 164 /* - Instruction cache enabled */
<> 144:ef7eb2e8f9f7 165 /* - Data cache enabled */
<> 144:ef7eb2e8f9f7 166 #if (INSTRUCTION_CACHE_ENABLE == 0)
<> 144:ef7eb2e8f9f7 167 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
<> 144:ef7eb2e8f9f7 168 #endif /* INSTRUCTION_CACHE_ENABLE */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 #if (DATA_CACHE_ENABLE == 0)
<> 144:ef7eb2e8f9f7 171 __HAL_FLASH_DATA_CACHE_DISABLE();
<> 144:ef7eb2e8f9f7 172 #endif /* DATA_CACHE_ENABLE */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 #if (PREFETCH_ENABLE != 0)
<> 144:ef7eb2e8f9f7 175 __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
<> 144:ef7eb2e8f9f7 176 #endif /* PREFETCH_ENABLE */
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /* Set Interrupt Group Priority */
<> 144:ef7eb2e8f9f7 179 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
<> 144:ef7eb2e8f9f7 182 HAL_InitTick(TICK_INT_PRIORITY);
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 185 HAL_MspInit();
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /* Return function status */
<> 144:ef7eb2e8f9f7 188 return HAL_OK;
<> 144:ef7eb2e8f9f7 189 }
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @brief De-initialize common part of the HAL and stop the source of time base.
<> 144:ef7eb2e8f9f7 193 * @note This function is optional.
<> 144:ef7eb2e8f9f7 194 * @retval HAL status
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196 HAL_StatusTypeDef HAL_DeInit(void)
<> 144:ef7eb2e8f9f7 197 {
<> 144:ef7eb2e8f9f7 198 /* Reset of all peripherals */
<> 144:ef7eb2e8f9f7 199 __HAL_RCC_APB1_FORCE_RESET();
<> 144:ef7eb2e8f9f7 200 __HAL_RCC_APB1_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 __HAL_RCC_APB2_FORCE_RESET();
<> 144:ef7eb2e8f9f7 203 __HAL_RCC_APB2_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 __HAL_RCC_AHB1_FORCE_RESET();
<> 144:ef7eb2e8f9f7 206 __HAL_RCC_AHB1_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 __HAL_RCC_AHB2_FORCE_RESET();
<> 144:ef7eb2e8f9f7 209 __HAL_RCC_AHB2_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 __HAL_RCC_AHB3_FORCE_RESET();
<> 144:ef7eb2e8f9f7 212 __HAL_RCC_AHB3_RELEASE_RESET();
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 /* De-Init the low level hardware */
<> 144:ef7eb2e8f9f7 215 HAL_MspDeInit();
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /* Return function status */
<> 144:ef7eb2e8f9f7 218 return HAL_OK;
<> 144:ef7eb2e8f9f7 219 }
<> 144:ef7eb2e8f9f7 220
<> 144:ef7eb2e8f9f7 221 /**
<> 144:ef7eb2e8f9f7 222 * @brief Initialize the MSP.
<> 144:ef7eb2e8f9f7 223 * @retval None
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 __weak void HAL_MspInit(void)
<> 144:ef7eb2e8f9f7 226 {
<> 144:ef7eb2e8f9f7 227 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 228 the HAL_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230 }
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /**
<> 144:ef7eb2e8f9f7 233 * @brief DeInitialize the MSP.
<> 144:ef7eb2e8f9f7 234 * @retval None
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236 __weak void HAL_MspDeInit(void)
<> 144:ef7eb2e8f9f7 237 {
<> 144:ef7eb2e8f9f7 238 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 239 the HAL_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241 }
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 /**
<> 144:ef7eb2e8f9f7 244 * @brief This function configures the source of the time base:
<> 144:ef7eb2e8f9f7 245 * The time source is configured to have 1ms time base with a dedicated
<> 144:ef7eb2e8f9f7 246 * Tick interrupt priority.
<> 144:ef7eb2e8f9f7 247 * @note This function is called automatically at the beginning of program after
<> 144:ef7eb2e8f9f7 248 * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
<> 144:ef7eb2e8f9f7 249 * @note In the default implementation, SysTick timer is the source of time base.
<> 144:ef7eb2e8f9f7 250 * It is used to generate interrupts at regular time intervals.
<> 144:ef7eb2e8f9f7 251 * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
<> 144:ef7eb2e8f9f7 252 * The SysTick interrupt must have higher priority (numerically lower)
<> 144:ef7eb2e8f9f7 253 * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
<> 144:ef7eb2e8f9f7 254 * The function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 255 * implementation in user file.
<> 144:ef7eb2e8f9f7 256 * @param TickPriority: Tick interrupt priority.
<> 144:ef7eb2e8f9f7 257 * @retval HAL status
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
<> 144:ef7eb2e8f9f7 260 {
<> 144:ef7eb2e8f9f7 261 /*Configure the SysTick to have interrupt in 1ms time basis*/
<> 144:ef7eb2e8f9f7 262 HAL_SYSTICK_Config(SystemCoreClock/1000);
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /*Configure the SysTick IRQ priority */
<> 144:ef7eb2e8f9f7 265 HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0);
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 /* Return function status */
<> 144:ef7eb2e8f9f7 268 return HAL_OK;
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @}
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
<> 144:ef7eb2e8f9f7 276 * @brief HAL Control functions
<> 144:ef7eb2e8f9f7 277 *
<> 144:ef7eb2e8f9f7 278 @verbatim
<> 144:ef7eb2e8f9f7 279 ===============================================================================
<> 144:ef7eb2e8f9f7 280 ##### HAL Control functions #####
<> 144:ef7eb2e8f9f7 281 ===============================================================================
<> 144:ef7eb2e8f9f7 282 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 283 (+) Provide a tick value in millisecond
<> 144:ef7eb2e8f9f7 284 (+) Provide a blocking delay in millisecond
<> 144:ef7eb2e8f9f7 285 (+) Suspend the time base source interrupt
<> 144:ef7eb2e8f9f7 286 (+) Resume the time base source interrupt
<> 144:ef7eb2e8f9f7 287 (+) Get the HAL API driver version
<> 144:ef7eb2e8f9f7 288 (+) Get the device identifier
<> 144:ef7eb2e8f9f7 289 (+) Get the device revision identifier
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 @endverbatim
<> 144:ef7eb2e8f9f7 292 * @{
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @brief This function is called to increment a global variable "uwTick"
<> 144:ef7eb2e8f9f7 297 * used as application time base.
<> 144:ef7eb2e8f9f7 298 * @note In the default implementation, this variable is incremented each 1ms
<> 144:ef7eb2e8f9f7 299 * in SysTick ISR.
<> 144:ef7eb2e8f9f7 300 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 301 * implementations in user file.
<> 144:ef7eb2e8f9f7 302 * @retval None
<> 144:ef7eb2e8f9f7 303 */
<> 144:ef7eb2e8f9f7 304 __weak void HAL_IncTick(void)
<> 144:ef7eb2e8f9f7 305 {
<> 144:ef7eb2e8f9f7 306 uwTick++;
<> 144:ef7eb2e8f9f7 307 }
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 /**
<> 144:ef7eb2e8f9f7 310 * @brief Provide a tick value in millisecond.
<> 144:ef7eb2e8f9f7 311 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 312 * implementations in user file.
<> 144:ef7eb2e8f9f7 313 * @retval tick value
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315 __weak uint32_t HAL_GetTick(void)
<> 144:ef7eb2e8f9f7 316 {
<> 144:ef7eb2e8f9f7 317 return uwTick;
<> 144:ef7eb2e8f9f7 318 }
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /**
AnnaBridge 167:e84263d55307 321 * @brief This function provides minimum delay (in milliseconds) based
AnnaBridge 167:e84263d55307 322 * on variable incremented.
<> 144:ef7eb2e8f9f7 323 * @note In the default implementation , SysTick timer is the source of time base.
<> 144:ef7eb2e8f9f7 324 * It is used to generate interrupts at regular time intervals where uwTick
<> 144:ef7eb2e8f9f7 325 * is incremented.
<> 144:ef7eb2e8f9f7 326 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 327 * implementations in user file.
<> 144:ef7eb2e8f9f7 328 * @param Delay: specifies the delay time length, in milliseconds.
<> 144:ef7eb2e8f9f7 329 * @retval None
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331 __weak void HAL_Delay(uint32_t Delay)
<> 144:ef7eb2e8f9f7 332 {
AnnaBridge 167:e84263d55307 333 uint32_t tickstart = HAL_GetTick();
AnnaBridge 167:e84263d55307 334 uint32_t wait = Delay;
AnnaBridge 167:e84263d55307 335
AnnaBridge 167:e84263d55307 336 /* Add a period to guaranty minimum wait */
AnnaBridge 167:e84263d55307 337 if (wait < HAL_MAX_DELAY)
AnnaBridge 167:e84263d55307 338 {
AnnaBridge 167:e84263d55307 339 wait++;
AnnaBridge 167:e84263d55307 340 }
AnnaBridge 167:e84263d55307 341
AnnaBridge 167:e84263d55307 342 while((HAL_GetTick() - tickstart) < wait)
<> 144:ef7eb2e8f9f7 343 {
<> 144:ef7eb2e8f9f7 344 }
<> 144:ef7eb2e8f9f7 345 }
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /**
<> 144:ef7eb2e8f9f7 348 * @brief Suspend Tick increment.
<> 144:ef7eb2e8f9f7 349 * @note In the default implementation , SysTick timer is the source of time base. It is
<> 144:ef7eb2e8f9f7 350 * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
<> 144:ef7eb2e8f9f7 351 * is called, the SysTick interrupt will be disabled and so Tick increment
<> 144:ef7eb2e8f9f7 352 * is suspended.
<> 144:ef7eb2e8f9f7 353 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 354 * implementations in user file.
<> 144:ef7eb2e8f9f7 355 * @retval None
<> 144:ef7eb2e8f9f7 356 */
<> 144:ef7eb2e8f9f7 357 __weak void HAL_SuspendTick(void)
<> 144:ef7eb2e8f9f7 358 {
<> 144:ef7eb2e8f9f7 359 /* Disable SysTick Interrupt */
<> 144:ef7eb2e8f9f7 360 SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
<> 144:ef7eb2e8f9f7 361 }
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /**
<> 144:ef7eb2e8f9f7 364 * @brief Resume Tick increment.
<> 144:ef7eb2e8f9f7 365 * @note In the default implementation , SysTick timer is the source of time base. It is
<> 144:ef7eb2e8f9f7 366 * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
<> 144:ef7eb2e8f9f7 367 * is called, the SysTick interrupt will be enabled and so Tick increment
<> 144:ef7eb2e8f9f7 368 * is resumed.
<> 144:ef7eb2e8f9f7 369 * @note This function is declared as __weak to be overwritten in case of other
<> 144:ef7eb2e8f9f7 370 * implementations in user file.
<> 144:ef7eb2e8f9f7 371 * @retval None
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373 __weak void HAL_ResumeTick(void)
<> 144:ef7eb2e8f9f7 374 {
<> 144:ef7eb2e8f9f7 375 /* Enable SysTick Interrupt */
<> 144:ef7eb2e8f9f7 376 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
<> 144:ef7eb2e8f9f7 377 }
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 /**
<> 144:ef7eb2e8f9f7 380 * @brief Return the HAL revision.
<> 144:ef7eb2e8f9f7 381 * @retval version : 0xXYZR (8bits for each decimal, R for RC)
<> 144:ef7eb2e8f9f7 382 */
<> 144:ef7eb2e8f9f7 383 uint32_t HAL_GetHalVersion(void)
<> 144:ef7eb2e8f9f7 384 {
<> 144:ef7eb2e8f9f7 385 return __STM32L4xx_HAL_VERSION;
<> 144:ef7eb2e8f9f7 386 }
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /**
<> 144:ef7eb2e8f9f7 389 * @brief Return the device revision identifier.
<> 144:ef7eb2e8f9f7 390 * @retval Device revision identifier
<> 144:ef7eb2e8f9f7 391 */
<> 144:ef7eb2e8f9f7 392 uint32_t HAL_GetREVID(void)
<> 144:ef7eb2e8f9f7 393 {
<> 144:ef7eb2e8f9f7 394 return((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16);
<> 144:ef7eb2e8f9f7 395 }
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 /**
<> 144:ef7eb2e8f9f7 398 * @brief Return the device identifier.
<> 144:ef7eb2e8f9f7 399 * @retval Device identifier
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401 uint32_t HAL_GetDEVID(void)
<> 144:ef7eb2e8f9f7 402 {
<> 144:ef7eb2e8f9f7 403 return(DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID);
<> 144:ef7eb2e8f9f7 404 }
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 /**
AnnaBridge 167:e84263d55307 407 * @brief Return the first word of the unique device identifier (UID based on 96 bits)
AnnaBridge 167:e84263d55307 408 * @retval Device identifier
AnnaBridge 167:e84263d55307 409 */
AnnaBridge 167:e84263d55307 410 uint32_t HAL_GetUIDw0(void)
AnnaBridge 167:e84263d55307 411 {
AnnaBridge 167:e84263d55307 412 return(READ_REG(*((uint32_t *)UID_BASE)));
AnnaBridge 167:e84263d55307 413 }
AnnaBridge 167:e84263d55307 414
AnnaBridge 167:e84263d55307 415 /**
AnnaBridge 167:e84263d55307 416 * @brief Return the second word of the unique device identifier (UID based on 96 bits)
AnnaBridge 167:e84263d55307 417 * @retval Device identifier
AnnaBridge 167:e84263d55307 418 */
AnnaBridge 167:e84263d55307 419 uint32_t HAL_GetUIDw1(void)
AnnaBridge 167:e84263d55307 420 {
AnnaBridge 167:e84263d55307 421 return(READ_REG(*((uint32_t *)(UID_BASE + 4U))));
AnnaBridge 167:e84263d55307 422 }
AnnaBridge 167:e84263d55307 423
AnnaBridge 167:e84263d55307 424 /**
AnnaBridge 167:e84263d55307 425 * @brief Return the third word of the unique device identifier (UID based on 96 bits)
AnnaBridge 167:e84263d55307 426 * @retval Device identifier
AnnaBridge 167:e84263d55307 427 */
AnnaBridge 167:e84263d55307 428 uint32_t HAL_GetUIDw2(void)
AnnaBridge 167:e84263d55307 429 {
AnnaBridge 167:e84263d55307 430 return(READ_REG(*((uint32_t *)(UID_BASE + 8U))));
AnnaBridge 167:e84263d55307 431 }
AnnaBridge 167:e84263d55307 432
AnnaBridge 167:e84263d55307 433 /**
<> 144:ef7eb2e8f9f7 434 * @}
<> 144:ef7eb2e8f9f7 435 */
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 /** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions
<> 144:ef7eb2e8f9f7 438 * @brief HAL Debug functions
<> 144:ef7eb2e8f9f7 439 *
<> 144:ef7eb2e8f9f7 440 @verbatim
<> 144:ef7eb2e8f9f7 441 ===============================================================================
<> 144:ef7eb2e8f9f7 442 ##### HAL Debug functions #####
<> 144:ef7eb2e8f9f7 443 ===============================================================================
<> 144:ef7eb2e8f9f7 444 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 445 (+) Enable/Disable Debug module during SLEEP mode
<> 144:ef7eb2e8f9f7 446 (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes
<> 144:ef7eb2e8f9f7 447 (+) Enable/Disable Debug module during STANDBY mode
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 @endverbatim
<> 144:ef7eb2e8f9f7 450 * @{
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /**
<> 144:ef7eb2e8f9f7 454 * @brief Enable the Debug Module during SLEEP mode.
<> 144:ef7eb2e8f9f7 455 * @retval None
<> 144:ef7eb2e8f9f7 456 */
<> 144:ef7eb2e8f9f7 457 void HAL_DBGMCU_EnableDBGSleepMode(void)
<> 144:ef7eb2e8f9f7 458 {
<> 144:ef7eb2e8f9f7 459 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
<> 144:ef7eb2e8f9f7 460 }
<> 144:ef7eb2e8f9f7 461
<> 144:ef7eb2e8f9f7 462 /**
<> 144:ef7eb2e8f9f7 463 * @brief Disable the Debug Module during SLEEP mode.
<> 144:ef7eb2e8f9f7 464 * @retval None
<> 144:ef7eb2e8f9f7 465 */
<> 144:ef7eb2e8f9f7 466 void HAL_DBGMCU_DisableDBGSleepMode(void)
<> 144:ef7eb2e8f9f7 467 {
<> 144:ef7eb2e8f9f7 468 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
<> 144:ef7eb2e8f9f7 469 }
<> 144:ef7eb2e8f9f7 470
<> 144:ef7eb2e8f9f7 471 /**
<> 144:ef7eb2e8f9f7 472 * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes.
<> 144:ef7eb2e8f9f7 473 * @retval None
<> 144:ef7eb2e8f9f7 474 */
<> 144:ef7eb2e8f9f7 475 void HAL_DBGMCU_EnableDBGStopMode(void)
<> 144:ef7eb2e8f9f7 476 {
<> 144:ef7eb2e8f9f7 477 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
<> 144:ef7eb2e8f9f7 478 }
<> 144:ef7eb2e8f9f7 479
<> 144:ef7eb2e8f9f7 480 /**
<> 144:ef7eb2e8f9f7 481 * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes.
<> 144:ef7eb2e8f9f7 482 * @retval None
<> 144:ef7eb2e8f9f7 483 */
<> 144:ef7eb2e8f9f7 484 void HAL_DBGMCU_DisableDBGStopMode(void)
<> 144:ef7eb2e8f9f7 485 {
<> 144:ef7eb2e8f9f7 486 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
<> 144:ef7eb2e8f9f7 487 }
<> 144:ef7eb2e8f9f7 488
<> 144:ef7eb2e8f9f7 489 /**
<> 144:ef7eb2e8f9f7 490 * @brief Enable the Debug Module during STANDBY mode.
<> 144:ef7eb2e8f9f7 491 * @retval None
<> 144:ef7eb2e8f9f7 492 */
<> 144:ef7eb2e8f9f7 493 void HAL_DBGMCU_EnableDBGStandbyMode(void)
<> 144:ef7eb2e8f9f7 494 {
<> 144:ef7eb2e8f9f7 495 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
<> 144:ef7eb2e8f9f7 496 }
<> 144:ef7eb2e8f9f7 497
<> 144:ef7eb2e8f9f7 498 /**
<> 144:ef7eb2e8f9f7 499 * @brief Disable the Debug Module during STANDBY mode.
<> 144:ef7eb2e8f9f7 500 * @retval None
<> 144:ef7eb2e8f9f7 501 */
<> 144:ef7eb2e8f9f7 502 void HAL_DBGMCU_DisableDBGStandbyMode(void)
<> 144:ef7eb2e8f9f7 503 {
<> 144:ef7eb2e8f9f7 504 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
<> 144:ef7eb2e8f9f7 505 }
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 /**
<> 144:ef7eb2e8f9f7 508 * @}
<> 144:ef7eb2e8f9f7 509 */
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions
<> 144:ef7eb2e8f9f7 512 * @brief HAL SYSCFG configuration functions
<> 144:ef7eb2e8f9f7 513 *
<> 144:ef7eb2e8f9f7 514 @verbatim
<> 144:ef7eb2e8f9f7 515 ===============================================================================
<> 144:ef7eb2e8f9f7 516 ##### HAL SYSCFG configuration functions #####
<> 144:ef7eb2e8f9f7 517 ===============================================================================
<> 144:ef7eb2e8f9f7 518 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 519 (+) Start a hardware SRAM2 erase operation
<> 144:ef7eb2e8f9f7 520 (+) Enable/Disable the Internal FLASH Bank Swapping
<> 144:ef7eb2e8f9f7 521 (+) Configure the Voltage reference buffer
<> 144:ef7eb2e8f9f7 522 (+) Enable/Disable the Voltage reference buffer
<> 144:ef7eb2e8f9f7 523 (+) Enable/Disable the I/O analog switch voltage booster
<> 144:ef7eb2e8f9f7 524
<> 144:ef7eb2e8f9f7 525 @endverbatim
<> 144:ef7eb2e8f9f7 526 * @{
<> 144:ef7eb2e8f9f7 527 */
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /**
<> 144:ef7eb2e8f9f7 530 * @brief Start a hardware SRAM2 erase operation.
<> 144:ef7eb2e8f9f7 531 * @note As long as SRAM2 is not erased the SRAM2ER bit will be set.
<> 144:ef7eb2e8f9f7 532 * This bit is automatically reset at the end of the SRAM2 erase operation.
<> 144:ef7eb2e8f9f7 533 * @retval None
<> 144:ef7eb2e8f9f7 534 */
<> 144:ef7eb2e8f9f7 535 void HAL_SYSCFG_SRAM2Erase(void)
<> 144:ef7eb2e8f9f7 536 {
<> 144:ef7eb2e8f9f7 537 /* unlock the write protection of the SRAM2ER bit */
<> 144:ef7eb2e8f9f7 538 SYSCFG->SKR = 0xCA;
<> 144:ef7eb2e8f9f7 539 SYSCFG->SKR = 0x53;
<> 144:ef7eb2e8f9f7 540 /* Starts a hardware SRAM2 erase operation*/
<> 144:ef7eb2e8f9f7 541 *(__IO uint32_t *) SCSR_SRAM2ER_BB = (uint8_t)0x00000001;
<> 144:ef7eb2e8f9f7 542 }
<> 144:ef7eb2e8f9f7 543
<> 144:ef7eb2e8f9f7 544 /**
<> 144:ef7eb2e8f9f7 545 * @brief Enable the Internal FLASH Bank Swapping.
<> 144:ef7eb2e8f9f7 546 *
<> 144:ef7eb2e8f9f7 547 * @note This function can be used only for STM32L4xx devices.
<> 144:ef7eb2e8f9f7 548 *
<> 144:ef7eb2e8f9f7 549 * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
<> 144:ef7eb2e8f9f7 550 * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
<> 144:ef7eb2e8f9f7 551 *
<> 144:ef7eb2e8f9f7 552 * @retval None
<> 144:ef7eb2e8f9f7 553 */
<> 144:ef7eb2e8f9f7 554 void HAL_SYSCFG_EnableMemorySwappingBank(void)
<> 144:ef7eb2e8f9f7 555 {
<> 144:ef7eb2e8f9f7 556 *(__IO uint32_t *)FB_MODE_BB = (uint32_t)ENABLE;
<> 144:ef7eb2e8f9f7 557 }
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 /**
<> 144:ef7eb2e8f9f7 560 * @brief Disable the Internal FLASH Bank Swapping.
<> 144:ef7eb2e8f9f7 561 *
<> 144:ef7eb2e8f9f7 562 * @note This function can be used only for STM32L4xx devices.
<> 144:ef7eb2e8f9f7 563 *
<> 144:ef7eb2e8f9f7 564 * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
<> 144:ef7eb2e8f9f7 565 * and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
<> 144:ef7eb2e8f9f7 566 *
<> 144:ef7eb2e8f9f7 567 * @retval None
<> 144:ef7eb2e8f9f7 568 */
<> 144:ef7eb2e8f9f7 569 void HAL_SYSCFG_DisableMemorySwappingBank(void)
<> 144:ef7eb2e8f9f7 570 {
<> 144:ef7eb2e8f9f7 571
<> 144:ef7eb2e8f9f7 572 *(__IO uint32_t *)FB_MODE_BB = (uint32_t)DISABLE;
<> 144:ef7eb2e8f9f7 573 }
<> 144:ef7eb2e8f9f7 574
<> 144:ef7eb2e8f9f7 575 #if defined(VREFBUF)
<> 144:ef7eb2e8f9f7 576 /**
<> 144:ef7eb2e8f9f7 577 * @brief Configure the internal voltage reference buffer voltage scale.
<> 144:ef7eb2e8f9f7 578 * @param VoltageScaling: specifies the output voltage to achieve
<> 144:ef7eb2e8f9f7 579 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 580 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREF_OUT1 around 2.048 V.
<> 144:ef7eb2e8f9f7 581 * This requires VDDA equal to or higher than 2.4 V.
<> 144:ef7eb2e8f9f7 582 * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREF_OUT1 around 2.5 V.
<> 144:ef7eb2e8f9f7 583 * This requires VDDA equal to or higher than 2.8 V.
<> 144:ef7eb2e8f9f7 584 * @retval None
<> 144:ef7eb2e8f9f7 585 */
<> 144:ef7eb2e8f9f7 586 void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
<> 144:ef7eb2e8f9f7 587 {
<> 144:ef7eb2e8f9f7 588 /* Check the parameters */
<> 144:ef7eb2e8f9f7 589 assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
<> 144:ef7eb2e8f9f7 590
<> 144:ef7eb2e8f9f7 591 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling);
<> 144:ef7eb2e8f9f7 592 }
<> 144:ef7eb2e8f9f7 593
<> 144:ef7eb2e8f9f7 594 /**
<> 144:ef7eb2e8f9f7 595 * @brief Configure the internal voltage reference buffer high impedance mode.
<> 144:ef7eb2e8f9f7 596 * @param Mode: specifies the high impedance mode
<> 144:ef7eb2e8f9f7 597 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 598 * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFINT output.
<> 144:ef7eb2e8f9f7 599 * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
<> 144:ef7eb2e8f9f7 600 * @retval None
<> 144:ef7eb2e8f9f7 601 */
<> 144:ef7eb2e8f9f7 602 void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
<> 144:ef7eb2e8f9f7 603 {
<> 144:ef7eb2e8f9f7 604 /* Check the parameters */
<> 144:ef7eb2e8f9f7 605 assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
<> 144:ef7eb2e8f9f7 608 }
<> 144:ef7eb2e8f9f7 609
<> 144:ef7eb2e8f9f7 610 /**
<> 144:ef7eb2e8f9f7 611 * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
<> 144:ef7eb2e8f9f7 612 * @retval None
<> 144:ef7eb2e8f9f7 613 */
<> 144:ef7eb2e8f9f7 614 void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
<> 144:ef7eb2e8f9f7 615 {
<> 144:ef7eb2e8f9f7 616 /* Check the parameters */
<> 144:ef7eb2e8f9f7 617 assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
<> 144:ef7eb2e8f9f7 618
<> 144:ef7eb2e8f9f7 619 MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue);
<> 144:ef7eb2e8f9f7 620 }
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 /**
<> 144:ef7eb2e8f9f7 623 * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
<> 144:ef7eb2e8f9f7 624 * @retval HAL_OK/HAL_TIMEOUT
<> 144:ef7eb2e8f9f7 625 */
<> 144:ef7eb2e8f9f7 626 HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
<> 144:ef7eb2e8f9f7 627 {
<> 144:ef7eb2e8f9f7 628 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
<> 144:ef7eb2e8f9f7 631
<> 144:ef7eb2e8f9f7 632 /* Get Start Tick*/
<> 144:ef7eb2e8f9f7 633 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 634
<> 144:ef7eb2e8f9f7 635 /* Wait for VRR bit */
<> 144:ef7eb2e8f9f7 636 while(READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == RESET)
<> 144:ef7eb2e8f9f7 637 {
<> 144:ef7eb2e8f9f7 638 if((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 639 {
<> 144:ef7eb2e8f9f7 640 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 641 }
<> 144:ef7eb2e8f9f7 642 }
<> 144:ef7eb2e8f9f7 643
<> 144:ef7eb2e8f9f7 644 return HAL_OK;
<> 144:ef7eb2e8f9f7 645 }
<> 144:ef7eb2e8f9f7 646
<> 144:ef7eb2e8f9f7 647 /**
<> 144:ef7eb2e8f9f7 648 * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
<> 144:ef7eb2e8f9f7 649 *
<> 144:ef7eb2e8f9f7 650 * @retval None
<> 144:ef7eb2e8f9f7 651 */
<> 144:ef7eb2e8f9f7 652 void HAL_SYSCFG_DisableVREFBUF(void)
<> 144:ef7eb2e8f9f7 653 {
<> 144:ef7eb2e8f9f7 654 CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
<> 144:ef7eb2e8f9f7 655 }
<> 144:ef7eb2e8f9f7 656 #endif /* VREFBUF */
<> 144:ef7eb2e8f9f7 657
<> 144:ef7eb2e8f9f7 658 /**
<> 144:ef7eb2e8f9f7 659 * @brief Enable the I/O analog switch voltage booster
<> 144:ef7eb2e8f9f7 660 *
<> 144:ef7eb2e8f9f7 661 * @retval None
<> 144:ef7eb2e8f9f7 662 */
<> 144:ef7eb2e8f9f7 663 void HAL_SYSCFG_EnableIOAnalogSwitchBooster(void)
<> 144:ef7eb2e8f9f7 664 {
<> 144:ef7eb2e8f9f7 665 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
<> 144:ef7eb2e8f9f7 666 }
<> 144:ef7eb2e8f9f7 667
<> 144:ef7eb2e8f9f7 668 /**
<> 144:ef7eb2e8f9f7 669 * @brief Disable the I/O analog switch voltage booster
<> 144:ef7eb2e8f9f7 670 *
<> 144:ef7eb2e8f9f7 671 * @retval None
<> 144:ef7eb2e8f9f7 672 */
<> 144:ef7eb2e8f9f7 673 void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void)
<> 144:ef7eb2e8f9f7 674 {
<> 144:ef7eb2e8f9f7 675 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
<> 144:ef7eb2e8f9f7 676 }
<> 144:ef7eb2e8f9f7 677
<> 144:ef7eb2e8f9f7 678 /**
<> 144:ef7eb2e8f9f7 679 * @}
<> 144:ef7eb2e8f9f7 680 */
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 /**
<> 144:ef7eb2e8f9f7 683 * @}
<> 144:ef7eb2e8f9f7 684 */
<> 144:ef7eb2e8f9f7 685
<> 144:ef7eb2e8f9f7 686 #endif /* HAL_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 687 /**
<> 144:ef7eb2e8f9f7 688 * @}
<> 144:ef7eb2e8f9f7 689 */
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 /**
<> 144:ef7eb2e8f9f7 692 * @}
<> 144:ef7eb2e8f9f7 693 */
<> 144:ef7eb2e8f9f7 694
<> 144:ef7eb2e8f9f7 695 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/