Diff: include/d7a_1x_fs.h

Revision:

35:ac940cf8ebe6

Parent:

30:74aa36420c61

Child:

41:6f83174ffed4

--- a/include/d7a_1x_fs.h	Wed Aug 29 15:30:30 2018 +0000
+++ b/include/d7a_1x_fs.h	Thu Sep 06 10:41:51 2018 +0000
@@ -45,10 +45,10 @@
 #define D7A_FID_LOCATION_DATA         23
 #define D7A_FID_ROOT_KEY              24
 #define D7A_FID_USER_KEY              25
-#define D7A_FID_RFU_26                26
+#define D7A_FID_CHALLENGE             26
 #define D7A_FID_SENSOR_DESCRIPTION    27
 #define D7A_FID_RTC                   28
-#define D7A_FID_RFU_29                29
+#define D7A_FID_TIME_STAMP            29
 #define D7A_FID_RFU_30                30
 #define D7A_FID_RFU_31                31
 #define D7A_FID_ACCESS_PROFILE_0      32
@@ -90,6 +90,7 @@
 #define D7A_FS_OPENBAR                  0b11110110
 #define D7A_FS_STANDARD                 0b11110100
 #define D7A_FS_READ_ONLY                0b11100100
+#define D7A_FS_USER_RO                  0b11100000
 #define D7A_FS_ROOT                     0b11000000
 #define D7A_FS_ROOT_RO                  0b10000000
 #define D7A_FS_ROOT_WO                  0b01000000
@@ -427,7 +428,7 @@
     /// Extension UWB - rate 6.8 Mbps
     D7A_CS_2,
     /// Nominal - RFU
-    /// Extension LoRa - LoRaWAN mode 3 (BW = 125 KHz, SF =  9, FEC 4/5)
+    /// Extension LoRa - LoRaWAN mode 3 (BW = 125 KHz, SF =  8, FEC 4/5)
     /// Extension UNB - TBD
     /// Extension UWB - TBD
     D7A_CS_3,
@@ -438,6 +439,35 @@
 
 #define D7A_CLASS(a)        (a+4)
 
+//======================================================================
+/// PHY Duty configuration
+//======================================================================
+typedef union
+{
+    struct {
+        /// Window type (1: sliding, 0 : fixed)
+        u8 sliding  : 1;
+        /// RFU
+        u8 rfu      : 3;
+        /// When the widow type is sliding, number of sub-windows.
+        /// This parameter is used to manage properly the duty
+        /// limit without having to record every unitary TX event. 
+        /// Instead the duty is always limited to (sub_nb-1)/sub_nb 
+        /// and the duty credit never exceeds 1/sub_nb of the maximum
+        /// available duty over the window (sliding sub-window).
+        /// The bigger is sub_nb, the closer the credited duty is to
+        /// the duty limit, but the smaller is the immediate available 
+        /// credit. For regular transmission of small packets, sub_nb
+        /// can be kept high (> 10). For rare transmissions of long
+        /// packets, sub_nb shall be kept small (< 5).
+        u8 sub_nb   : 4;
+    } bf;
+
+    /// word access
+    u8 word;
+        
+} d7a_phy_duty_cfg_t;
+
 // =======================================================================
 // d7a_phy_cfg_t
 // -----------------------------------------------------------------------
@@ -449,8 +479,10 @@
     u8 preamble[D7A_CLASS_QTY];
     /// Maximum authorized EIRP (dBm)
     s8 eirp_limit;
-    /// TX duty cycle window in seconds
-    u16 duty_win;
+    /// TX duty cycle window in 1/10 of sec
+    d7a_ctf_t duty_win;
+    /// Duty management configuration
+    d7a_phy_duty_cfg_t duty_cfg;
     /// TX Duty cycle limit in 1/1024 (full scale is 1024)
     u16 duty_limit;
 
@@ -1102,6 +1134,40 @@
 /// =======================================================================
 /// =======================================================================
 ///
+/// 26. CHALLENGE
+///
+/// =======================================================================
+/// =======================================================================
+#define D7A_FS_CHALLENGE_SIZE      32
+
+/// =======================================================================
+/// =======================================================================
+///
+/// 29. TIME STAMP
+///
+/// =======================================================================
+/// =======================================================================
+
+// =======================================================================
+// d7a_time_stamp_t
+// -----------------------------------------------------------------------
+/// Structure of the Time stamp status
+// =======================================================================
+TYPEDEF_STRUCT_PACKED
+{
+    /// Ping stamp (aka roundtrip time) in x100 picosec
+    /// This is a RX timestamp relative to the last TX timestamp
+    u32 rx;
+    /// Pong stamp (aka reply time) in x100 picosec
+    /// This is a TX timestamp relative to the last RX timestamp
+    u32 tx;
+
+} d7a_time_stamp_t;
+#define D7A_FS_TIME_STAMP_SIZE      sizeof(d7a_time_stamp_t)
+
+/// =======================================================================
+/// =======================================================================
+///
 /// 32-47. ACCESS PROFILES
 ///
 /// =======================================================================