WIZnet
For mbed OS-5 version for WIZnet Ethernet Interface, this is Library using Hardware TCP/IP chip, W5500 and TCP/IP Offload Engine, W7500.
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W5500.h
00001 /* Copyright (C) 2012 mbed.org, MIT License 00002 * 00003 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software 00004 * and associated documentation files (the "Software"), to deal in the Software without restriction, 00005 * including without limitation the rights to use, copy, modify, merge, publish, distribute, 00006 * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is 00007 * furnished to do so, subject to the following conditions: 00008 * 00009 * The above copyright notice and this permission notice shall be included in all copies or 00010 * substantial portions of the Software. 00011 * 00012 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING 00013 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 00014 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, 00015 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 00016 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 00017 * 00018 */ 00019 00020 #pragma once 00021 00022 #include "mbed.h" 00023 #include "mbed_debug.h" 00024 00025 #define TEST_ASSERT(A) while(!(A)){debug("\n\n%s@%d %s ASSERT!\n\n",__PRETTY_FUNCTION__,__LINE__,#A);exit(1);}; 00026 00027 #define DEFAULT_WAIT_RESP_TIMEOUT 500 00028 00029 #define SOCK_ERROR 0 00030 #define SOCKERR_SOCKNUM (SOCK_ERROR - 1) ///< Invalid socket number 00031 #define SOCKERR_SOCKOPT (SOCK_ERROR - 2) ///< Invalid socket option 00032 #define SOCKERR_SOCKINIT (SOCK_ERROR - 3) ///< Socket is not initialized 00033 #define SOCKERR_SOCKCLOSED (SOCK_ERROR - 4) ///< Socket unexpectedly closed. 00034 #define SOCKERR_SOCKMODE (SOCK_ERROR - 5) ///< Invalid socket mode for socket operation. 00035 #define SOCKERR_SOCKFLAG (SOCK_ERROR - 6) ///< Invalid socket flag 00036 #define SOCKERR_SOCKSTATUS (SOCK_ERROR - 7) ///< Invalid socket status for socket operation. 00037 #define SOCKERR_ARG (SOCK_ERROR - 10) ///< Invalid argrument. 00038 #define SOCKERR_PORTZERO (SOCK_ERROR - 11) ///< Port number is zero 00039 #define SOCKERR_IPINVALID (SOCK_ERROR - 12) ///< Invalid IP address 00040 #define SOCKERR_TIMEOUT (SOCK_ERROR - 13) ///< Timeout occurred 00041 #define SOCKERR_DATALEN (SOCK_ERROR - 14) ///< Data length is zero or greater than buffer max size. 00042 #define SOCKERR_BUFFER (SOCK_ERROR - 15) ///< Socket buffer is not enough for data communication. 00043 00044 #define SOCK_ANY_PORT_NUM 0xC000; 00045 00046 00047 #define MAX_SOCK_NUM 8 00048 00049 #define MR 0x0000 00050 #define GAR 0x0001 00051 #define SUBR 0x0005 00052 #define SHAR 0x0009 00053 #define SIPR 0x000f 00054 #define IR 0x0015 00055 #define IMR 0x0016 00056 #define SIR 0x0017 00057 #define SIMR 0x0018 00058 #define RTR 0x0019 00059 #define RCR 0x001b 00060 #define UIPR 0x0028 00061 #define UPORTR 0x002c 00062 #define PHYCFGR 0x002e 00063 00064 // W5500 socket register 00065 #define Sn_MR 0x0000 00066 #define Sn_CR 0x0001 00067 #define Sn_IR 0x0002 00068 #define Sn_SR 0x0003 00069 #define Sn_PORT 0x0004 00070 #define Sn_DHAR 0x0006 00071 #define Sn_DIPR 0x000c 00072 #define Sn_DPORT 0x0010 00073 #define Sn_RXBUF_SIZE 0x001e 00074 #define Sn_TXBUF_SIZE 0x001f 00075 #define Sn_TX_FSR 0x0020 00076 #define Sn_TX_RD 0x0022 00077 #define Sn_TX_WR 0x0024 00078 #define Sn_RX_RSR 0x0026 00079 #define Sn_RX_RD 0x0028 00080 #define Sn_RX_WR 0x002a 00081 #define Sn_IMR 0x002c 00082 00083 00084 //Define for Socket Command register option value 00085 #define Sn_CR_OPEN 0x01 00086 #define Sn_CR_LISTEN 0x02 00087 #define Sn_CR_CONNECT 0x04 00088 #define Sn_CR_DISCON 0x08 00089 #define Sn_CR_CLOSE 0x10 00090 #define Sn_CR_SEND 0x20 00091 #define Sn_CR_SEND_MAC 0x21 00092 #define Sn_CR_SEND_KEEP 0x22 00093 #define Sn_CR_RECV 0x40 00094 00095 00096 //Define for Socket Mode register option value 00097 #define Sn_MR_CLOSE 0x00 00098 #define Sn_MR_TCP 0x01 00099 #define Sn_MR_UDP 0x02 00100 #define Sn_MR_MACRAW 0x04 00101 #define Sn_MR_UCASTB 0x10 00102 #define Sn_MR_ND 0x20 00103 #define Sn_MR_BCASTB 0x40 00104 #define Sn_MR_MULTI 0x80 00105 00106 #define Sn_IR_SENDOK 0x10 00107 00108 //Sn_IR values 00109 00110 #define Sn_IR_TIMEOUT 0x08 00111 #define Sn_IR_RECV 0x04 00112 #define Sn_IR_DISCON 0x02 00113 #define Sn_IR_CON 0x01 00114 00115 /* PHYCFGR register value */ 00116 #define PHYCFGR_RST ~(1<<7) //< For PHY reset, must operate AND mask. 00117 #define PHYCFGR_OPMD (1<<6) // Configre PHY with OPMDC value 00118 #define PHYCFGR_OPMDC_ALLA (7<<3) 00119 #define PHYCFGR_OPMDC_PDOWN (6<<3) 00120 #define PHYCFGR_OPMDC_NA (5<<3) 00121 #define PHYCFGR_OPMDC_100FA (4<<3) 00122 #define PHYCFGR_OPMDC_100F (3<<3) 00123 #define PHYCFGR_OPMDC_100H (2<<3) 00124 #define PHYCFGR_OPMDC_10F (1<<3) 00125 #define PHYCFGR_OPMDC_10H (0<<3) 00126 #define PHYCFGR_DPX_FULL (1<<2) 00127 #define PHYCFGR_DPX_HALF (0<<2) 00128 #define PHYCFGR_SPD_100 (1<<1) 00129 #define PHYCFGR_SPD_10 (0<<1) 00130 #define PHYCFGR_LNK_ON (1<<0) 00131 #define PHYCFGR_LNK_OFF (0<<0) 00132 00133 //PHY status define 00134 #define PHY_CONFBY_HW 0 ///< Configured PHY operation mode by HW pin 00135 #define PHY_CONFBY_SW 1 ///< Configured PHY operation mode by SW register 00136 #define PHY_MODE_MANUAL 0 ///< Configured PHY operation mode with user setting. 00137 #define PHY_MODE_AUTONEGO 1 ///< Configured PHY operation mode with auto-negotiation 00138 #define PHY_SPEED_10 0 ///< Link Speed 10 00139 #define PHY_SPEED_100 1 ///< Link Speed 100 00140 #define PHY_DUPLEX_HALF 0 ///< Link Half-Duplex 00141 #define PHY_DUPLEX_FULL 1 ///< Link Full-Duplex 00142 #define PHY_LINK_OFF 0 ///< Link Off 00143 #define PHY_LINK_ON 1 ///< Link On 00144 #define PHY_POWER_NORM 0 ///< PHY power normal mode 00145 #define PHY_POWER_DOWN 1 ///< PHY power down mode 00146 00147 enum PHYMode { 00148 AutoNegotiate = 0, 00149 HalfDuplex10 = 1, 00150 FullDuplex10 = 2, 00151 HalfDuplex100 = 3, 00152 FullDuplex100 = 4, 00153 }; 00154 class WIZnet_Chip { 00155 public: 00156 enum Protocol { 00157 CLOSED = 0, 00158 TCP = 1, 00159 UDP = 2, 00160 }; 00161 00162 enum Command { 00163 OPEN = 0x01, 00164 LISTEN = 0x02, 00165 CONNECT = 0x04, 00166 DISCON = 0x08, 00167 CLOSE = 0x10, 00168 SEND = 0x20, 00169 SEND_MAC = 0x21, 00170 SEND_KEEP = 0x22, 00171 RECV = 0x40, 00172 00173 }; 00174 00175 enum Interrupt { 00176 INT_CON = 0x01, 00177 INT_DISCON = 0x02, 00178 INT_RECV = 0x04, 00179 INT_TIMEOUT = 0x08, 00180 INT_SEND_OK = 0x10, 00181 }; 00182 00183 enum Status { 00184 SOCK_CLOSED = 0x00, 00185 SOCK_INIT = 0x13, 00186 SOCK_LISTEN = 0x14, 00187 SOCK_SYNSENT = 0x15, 00188 SOCK_ESTABLISHED = 0x17, 00189 SOCK_CLOSE_WAIT = 0x1c, 00190 SOCK_UDP = 0x22, 00191 }; 00192 00193 00194 uint16_t sock_any_port; 00195 00196 /* 00197 * Constructor 00198 * 00199 * @param spi spi class 00200 * @param cs cs of the W5500 00201 * @param reset reset pin of the W5500 00202 */ 00203 WIZnet_Chip(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset); 00204 WIZnet_Chip(SPI* spi, PinName cs, PinName reset); 00205 00206 /* 00207 * Set MAC Address to W5500 00208 * 00209 * @return true if connected, false otherwise 00210 */ 00211 bool setmac(); 00212 00213 /* 00214 * Set Network Informations (SrcIP, Netmask, Gataway) 00215 * 00216 * @return true if connected, false otherwise 00217 */ 00218 bool setip(); 00219 00220 /* 00221 * Disconnect the connection 00222 * 00223 * @ returns true 00224 */ 00225 bool disconnect(); 00226 00227 /* 00228 * Open a tcp connection with the specified host on the specified port 00229 * 00230 * @param host host (can be either an ip address or a name. If a name is provided, a dns request will be established) 00231 * @param port port 00232 * @ returns true if successful 00233 */ 00234 bool connect(int socket, const char * host, int port, int timeout_ms = 10*1000); 00235 00236 /* 00237 * Set the protocol (UDP or TCP) 00238 * 00239 * @param p protocol 00240 * @ returns true if successful 00241 */ 00242 bool setProtocol(int socket, Protocol p); 00243 00244 /* 00245 * Reset the W5500 00246 */ 00247 void reset(); 00248 00249 int wait_readable(int socket, int wait_time_ms, int req_size = 0); 00250 00251 int wait_writeable(int socket, int wait_time_ms, int req_size = 0); 00252 00253 /* 00254 * Check if an ethernet link is pressent or not. 00255 * 00256 * @returns true if successful 00257 */ 00258 bool link(int wait_time_ms= 3*1000); 00259 00260 /* 00261 * Sets the speed and duplex parameters of an ethernet link. 00262 * 00263 * @returns true if successful 00264 */ 00265 void set_link(PHYMode phymode); 00266 00267 /* 00268 * Check if a tcp link is active 00269 * 00270 * @returns true if successful 00271 */ 00272 bool is_connected(int socket); 00273 00274 /* 00275 * Close a tcp connection 00276 * 00277 * @ returns true if successful 00278 */ 00279 bool close(int socket); 00280 00281 /* 00282 * @param str string to be sent 00283 * @param len string length 00284 */ 00285 int send(int socket, const char * str, int len); 00286 00287 int recv(int socket, char* buf, int len); 00288 00289 /* 00290 * Return true if the module is using dhcp 00291 * 00292 * @returns true if the module is using dhcp 00293 */ 00294 bool isDHCP() { 00295 return dhcp; 00296 } 00297 00298 bool gethostbyname(const char* host, uint32_t* ip); 00299 00300 static WIZnet_Chip * getInstance() { 00301 return inst; 00302 }; 00303 00304 int new_socket(); 00305 uint16_t new_port(); 00306 void scmd(int socket, Command cmd); 00307 00308 template<typename T> 00309 void sreg(int socket, uint16_t addr, T data) { 00310 reg_wr<T>(addr, (0x0C + (socket << 5)), data); 00311 } 00312 00313 template<typename T> 00314 T sreg(int socket, uint16_t addr) { 00315 return reg_rd<T>(addr, (0x08 + (socket << 5))); 00316 } 00317 00318 template<typename T> 00319 void reg_wr(uint16_t addr, T data) { 00320 return reg_wr(addr, 0x04, data); 00321 } 00322 00323 template<typename T> 00324 void reg_wr(uint16_t addr, uint8_t cb, T data) { 00325 uint8_t buf[sizeof(T)]; 00326 *reinterpret_cast<T*>(buf) = data; 00327 for(int i = 0; i < sizeof(buf)/2; i++) { // Little Endian to Big Endian 00328 uint8_t t = buf[i]; 00329 buf[i] = buf[sizeof(buf)-1-i]; 00330 buf[sizeof(buf)-1-i] = t; 00331 } 00332 spi_write(addr, cb, buf, sizeof(buf)); 00333 } 00334 00335 template<typename T> 00336 T reg_rd(uint16_t addr) { 00337 return reg_rd<T>(addr, 0x00); 00338 } 00339 00340 template<typename T> 00341 T reg_rd(uint16_t addr, uint8_t cb) { 00342 uint8_t buf[sizeof(T)]; 00343 spi_read(addr, cb, buf, sizeof(buf)); 00344 for(int i = 0; i < sizeof(buf)/2; i++) { // Big Endian to Little Endian 00345 uint8_t t = buf[i]; 00346 buf[i] = buf[sizeof(buf)-1-i]; 00347 buf[sizeof(buf)-1-i] = t; 00348 } 00349 return *reinterpret_cast<T*>(buf); 00350 } 00351 00352 void reg_rd_mac(uint16_t addr, uint8_t* data); 00353 /* { 00354 spi_read(addr, 0x00, data, 6); 00355 }*/ 00356 00357 void reg_wr_ip(uint16_t addr, uint8_t cb, const char* ip); 00358 /* { 00359 uint8_t buf[4]; 00360 char* p = (char*)ip; 00361 for(int i = 0; i < 4; i++) { 00362 buf[i] = atoi(p); 00363 p = strchr(p, '.'); 00364 if (p == NULL) { 00365 break; 00366 } 00367 p++; 00368 } 00369 spi_write(addr, cb, buf, sizeof(buf)); 00370 } 00371 */ 00372 void sreg_ip(int socket, uint16_t addr, const char* ip); 00373 /* { 00374 reg_wr_ip(addr, (0x0C + (socket << 5)), ip); 00375 }*/ 00376 00377 void reg_rd_ip_byte(uint16_t addr, uint8_t* data); 00378 /* { 00379 spi_read(addr, 0x00, data, 4); 00380 }*/ 00381 00382 void reg_wr_ip_byte(uint16_t addr, uint8_t* data); 00383 /* { 00384 spi_write(addr, 0x04, data, 4); 00385 }*/ 00386 00387 ///////////////////////////////// 00388 // Common Register I/O function // 00389 ///////////////////////////////// 00390 /** 00391 * @ingroup Common_register_access_function 00392 * @brief Set Mode Register 00393 * @param (uint8_t)mr The value to be set. 00394 * @sa getMR() 00395 */ 00396 void setMR(uint8_t mr) { 00397 reg_wr<uint8_t>(MR,mr); 00398 } 00399 00400 00401 /** 00402 * @ingroup Common_register_access_function 00403 * @brief Get Mode Register 00404 * @return uint8_t. The value of Mode register. 00405 * @sa setMR() 00406 */ 00407 uint8_t getMR() { 00408 return reg_rd<uint8_t>(MR); 00409 } 00410 00411 /** 00412 * @ingroup Common_register_access_function 00413 * @brief Set gateway IP address 00414 * @param (uint8_t*)gar Pointer variable to set gateway IP address. It should be allocated 4 bytes. 00415 * @sa getGAR() 00416 */ 00417 void setGAR(uint8_t * gar) { 00418 reg_wr_ip_byte(GAR,gar); 00419 } 00420 00421 /** 00422 * @ingroup Common_register_access_function 00423 * @brief Get gateway IP address 00424 * @param (uint8_t*)gar Pointer variable to get gateway IP address. It should be allocated 4 bytes. 00425 * @sa setGAR() 00426 */ 00427 void getGAR(uint8_t * gar) { 00428 reg_rd_ip_byte(GAR,gar); 00429 } 00430 00431 /** 00432 * @ingroup Common_register_access_function 00433 * @brief Set subnet mask address 00434 * @param (uint8_t*)subr Pointer variable to set subnet mask address. It should be allocated 4 bytes. 00435 * @sa getSUBR() 00436 */ 00437 void setSUBR(uint8_t * subr) { 00438 reg_wr_ip_byte(SUBR, subr); 00439 } 00440 00441 00442 /** 00443 * @ingroup Common_register_access_function 00444 * @brief Get subnet mask address 00445 * @param (uint8_t*)subr Pointer variable to get subnet mask address. It should be allocated 4 bytes. 00446 * @sa setSUBR() 00447 */ 00448 void getSUBR(uint8_t * subr) { 00449 reg_rd_ip_byte(SUBR, subr); 00450 } 00451 00452 /** 00453 * @ingroup Common_register_access_function 00454 * @brief Set local MAC address 00455 * @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6 bytes. 00456 * @sa getSHAR() 00457 */ 00458 void setSHAR(uint8_t * shar) { 00459 reg_wr_mac(SHAR, shar); 00460 } 00461 00462 /** 00463 * @ingroup Common_register_access_function 00464 * @brief Get local MAC address 00465 * @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6 bytes. 00466 * @sa setSHAR() 00467 */ 00468 void getSHAR(uint8_t * shar) { 00469 reg_rd_mac(SHAR, shar); 00470 } 00471 00472 /** 00473 * @ingroup Common_register_access_function 00474 * @brief Set local IP address 00475 * @param (uint8_t*)sipr Pointer variable to set local IP address. It should be allocated 4 bytes. 00476 * @sa getSIPR() 00477 */ 00478 void setSIPR(uint8_t * sipr) { 00479 reg_wr_ip_byte(SIPR, sipr); 00480 } 00481 00482 /** 00483 * @ingroup Common_register_access_function 00484 * @brief Get local IP address 00485 * @param (uint8_t*)sipr Pointer variable to get local IP address. It should be allocated 4 bytes. 00486 * @sa setSIPR() 00487 */ 00488 void getSIPR(uint8_t * sipr) { 00489 reg_rd_ip_byte(SIPR, sipr); 00490 } 00491 00492 /** 00493 * @ingroup Common_register_access_function 00494 * @brief Set @ref IR register 00495 * @param (uint8_t)ir Value to set @ref IR register. 00496 * @sa getIR() 00497 */ 00498 void setIR(uint8_t ir) { 00499 reg_wr<uint8_t>(IR, (ir & 0xF0)); 00500 } 00501 00502 /** 00503 * @ingroup Common_register_access_function 00504 * @brief Get @ref IR register 00505 * @return uint8_t. Value of @ref IR register. 00506 * @sa setIR() 00507 */ 00508 uint8_t getIR() { 00509 return reg_rd<uint8_t>(IR & 0xF0); 00510 } 00511 00512 /** 00513 * @ingroup Common_register_access_function 00514 * @brief Set @ref IMR register 00515 * @param (uint8_t)imr Value to set @ref IMR register. 00516 * @sa getIMR() 00517 */ 00518 void setIMR(uint8_t imr) { 00519 reg_wr<uint8_t>(IMR, imr); 00520 } 00521 00522 /** 00523 * @ingroup Common_register_access_function 00524 * @brief Get @ref IMR register 00525 * @return uint8_t. Value of @ref IMR register. 00526 * @sa setIMR() 00527 */ 00528 uint8_t getIMR() { 00529 return reg_rd<uint8_t>(IMR); 00530 } 00531 00532 00533 /** 00534 * @ingroup Common_register_access_function 00535 * @brief Set @ref SIR register 00536 * @param (uint8_t)sir Value to set @ref SIR register. 00537 * @sa getSIR() 00538 */ 00539 void setSIR(uint8_t sir) { 00540 reg_wr<uint8_t>(SIR, sir); 00541 } 00542 00543 /** 00544 * @ingroup Common_register_access_function 00545 * @brief Get @ref SIR register 00546 * @return uint8_t. Value of @ref SIR register. 00547 * @sa setSIR() 00548 */ 00549 uint8_t getSIR() { 00550 return reg_rd<uint8_t>(SIR); 00551 } 00552 /** 00553 * @ingroup Common_register_access_function 00554 * @brief Set @ref SIMR register 00555 * @param (uint8_t)simr Value to set @ref SIMR register. 00556 * @sa getSIMR() 00557 */ 00558 void setSIMR(uint8_t simr) { 00559 reg_wr<uint8_t>(SIMR, simr); 00560 } 00561 00562 /** 00563 * @ingroup Common_register_access_function 00564 * @brief Get @ref SIMR register 00565 * @return uint8_t. Value of @ref SIMR register. 00566 * @sa setSIMR() 00567 */ 00568 uint8_t getSIMR() { 00569 return reg_rd<uint8_t>(SIMR); 00570 } 00571 00572 /** 00573 * @ingroup Common_register_access_function 00574 * @brief Set @ref RTR register 00575 * @param (uint16_t)rtr Value to set @ref RTR register. 00576 * @sa getRTR() 00577 */ 00578 void setRTR(uint16_t rtr) { 00579 reg_wr<uint16_t>(RTR, rtr); 00580 } 00581 00582 /** 00583 * @ingroup Common_register_access_function 00584 * @brief Get @ref RTR register 00585 * @return uint16_t. Value of @ref RTR register. 00586 * @sa setRTR() 00587 */ 00588 uint16_t getRTR() { 00589 return reg_rd<uint16_t>(RTR); 00590 } 00591 00592 /** 00593 * @ingroup Common_register_access_function 00594 * @brief Set @ref RCR register 00595 * @param (uint8_t)rcr Value to set @ref RCR register. 00596 * @sa getRCR() 00597 */ 00598 void setRCR(uint8_t rcr) { 00599 reg_wr<uint8_t>(RCR, rcr); 00600 } 00601 00602 /** 00603 * @ingroup Common_register_access_function 00604 * @brief Get @ref RCR register 00605 * @return uint8_t. Value of @ref RCR register. 00606 * @sa setRCR() 00607 */ 00608 uint8_t getRCR() { 00609 return reg_rd<uint8_t>(RCR); 00610 } 00611 00612 //================================================== test done =========================================================== 00613 00614 /** 00615 * @ingroup Common_register_access_function 00616 * @brief Set @ref PHYCFGR register 00617 * @param (uint8_t)phycfgr Value to set @ref PHYCFGR register. 00618 * @sa setPHYCFGR() 00619 */ 00620 void setPHYCFGR(uint8_t phycfgr) { 00621 reg_wr<uint8_t>(PHYCFGR, phycfgr); 00622 } 00623 00624 /** 00625 * @ingroup Common_register_access_function 00626 * @brief Get @ref PHYCFGR register 00627 * @return uint8_t. Value of @ref PHYCFGR register. 00628 * @sa getPHYCFGR() 00629 */ 00630 uint8_t getPHYCFGR() { 00631 return reg_rd<uint8_t>(PHYCFGR); 00632 } 00633 00634 00635 ///////////////////////////////////// 00636 00637 /////////////////////////////////// 00638 // Socket N register I/O function // 00639 /////////////////////////////////// 00640 /** 00641 * @ingroup Socket_register_access_function 00642 * @brief Set @ref Sn_MR register 00643 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00644 * @param (uint8_t)mr Value to set @ref Sn_MR 00645 * @sa getSn_MR() 00646 */ 00647 void setSn_MR(uint8_t sn, uint8_t mr) { 00648 sreg<uint8_t>(sn, MR, mr); 00649 } 00650 00651 /** 00652 * @ingroup Socket_register_access_function 00653 * @brief Get @ref Sn_MR register 00654 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00655 * @return uint8_t. Value of @ref Sn_MR. 00656 * @sa setSn_MR() 00657 */ 00658 uint8_t getSn_MR(uint8_t sn) { 00659 return sreg<uint8_t>(sn, Sn_MR); 00660 } 00661 00662 /** 00663 * @ingroup Socket_register_access_function 00664 * @brief Set @ref Sn_CR register 00665 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00666 * @param (uint8_t)cr Value to set @ref Sn_CR 00667 * @sa getSn_CR() 00668 */ 00669 void setSn_CR(uint8_t sn, uint8_t cr) { 00670 sreg<uint8_t>(sn, Sn_CR, cr); 00671 } 00672 00673 /** 00674 * @ingroup Socket_register_access_function 00675 * @brief Get @ref Sn_CR register 00676 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00677 * @return uint8_t. Value of @ref Sn_CR. 00678 * @sa setSn_CR() 00679 */ 00680 uint8_t getSn_CR(uint8_t sn) { 00681 return sreg<uint8_t>(sn, Sn_CR); 00682 } 00683 00684 /** 00685 * @ingroup Socket_register_access_function 00686 * @brief Set @ref Sn_IR register 00687 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00688 * @param (uint8_t)ir Value to set @ref Sn_IR 00689 * @sa getSn_IR() 00690 */ 00691 void setSn_IR(uint8_t sn, uint8_t ir) { 00692 sreg<uint8_t>(sn, Sn_IR, (ir & 0x1F)); 00693 } 00694 00695 /** 00696 * @ingroup Socket_register_access_function 00697 * @brief Get @ref Sn_IR register 00698 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00699 * @return uint8_t. Value of @ref Sn_IR. 00700 * @sa setSn_IR() 00701 */ 00702 uint8_t getSn_IR(uint8_t sn) { 00703 return (sreg<uint8_t>(sn, Sn_IR)) & 0x1F; 00704 } 00705 00706 /** 00707 * @ingroup Socket_register_access_function 00708 * @brief Set @ref Sn_IMR register 00709 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00710 * @param (uint8_t)imr Value to set @ref Sn_IMR 00711 * @sa getSn_IMR() 00712 */ 00713 void setSn_IMR(uint8_t sn, uint8_t imr) { 00714 sreg<uint8_t>(sn, Sn_IMR, (imr & 0x1F)); 00715 } 00716 00717 /** 00718 * @ingroup Socket_register_access_function 00719 * @brief Get @ref Sn_IMR register 00720 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00721 * @return uint8_t. Value of @ref Sn_IMR. 00722 * @sa setSn_IMR() 00723 */ 00724 uint8_t getSn_IMR(uint8_t sn) { 00725 return (sreg<uint8_t>(sn, Sn_IMR)) & 0x1F; 00726 } 00727 00728 /** 00729 * @ingroup Socket_register_access_function 00730 * @brief Get @ref Sn_SR register 00731 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00732 * @return uint8_t. Value of @ref Sn_SR. 00733 */ 00734 uint8_t getSn_SR(uint8_t sn) { 00735 return sreg<uint8_t>(sn, Sn_SR); 00736 } 00737 00738 /** 00739 * @ingroup Socket_register_access_function 00740 * @brief Set @ref Sn_PORT register 00741 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00742 * @param (uint16_t)port Value to set @ref Sn_PORT. 00743 * @sa getSn_PORT() 00744 */ 00745 void setSn_PORT(uint8_t sn, uint16_t port) { 00746 sreg<uint16_t>(sn, Sn_PORT, port ); 00747 } 00748 00749 /** 00750 * @ingroup Socket_register_access_function 00751 * @brief Get @ref Sn_PORT register 00752 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00753 * @return uint16_t. Value of @ref Sn_PORT. 00754 * @sa setSn_PORT() 00755 */ 00756 uint16_t getSn_PORT(uint8_t sn) { 00757 return sreg<uint16_t>(sn, Sn_PORT); 00758 } 00759 00760 /** 00761 * @ingroup Socket_register_access_function 00762 * @brief Set @ref Sn_DHAR register 00763 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00764 * @param (uint8_t*)dhar Pointer variable to set socket n destination hardware address. It should be allocated 6 bytes. 00765 * @sa getSn_DHAR() 00766 */ 00767 void setSn_DHAR(uint8_t sn, uint8_t * dhar) { 00768 spi_write(Sn_DHAR, (0x0C + (sn << 5)), dhar, 6); 00769 } 00770 00771 /** 00772 * @ingroup Socket_register_access_function 00773 * @brief Get @ref Sn_MR register 00774 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00775 * @param (uint8_t*)dhar Pointer variable to get socket n destination hardware address. It should be allocated 6 bytes. 00776 * @sa setSn_DHAR() 00777 */ 00778 void getSn_DHAR(uint8_t sn, uint8_t * dhar) { 00779 spi_read(Sn_DHAR, (0x08 + (sn << 5)), dhar, 6); 00780 } 00781 00782 /** 00783 * @ingroup Socket_register_access_function 00784 * @brief Set @ref Sn_DIPR register 00785 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00786 * @param (uint8_t*)dipr Pointer variable to set socket n destination IP address. It should be allocated 4 bytes. 00787 * @sa getSn_DIPR() 00788 */ 00789 void setSn_DIPR(uint8_t sn, uint8_t * dipr) { 00790 spi_write(Sn_DIPR, (0x0C + (sn << 5)), dipr, 4); 00791 } 00792 00793 /** 00794 * @ingroup Socket_register_access_function 00795 * @brief Get @ref Sn_DIPR register 00796 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00797 * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes. 00798 * @sa SetSn_DIPR() 00799 */ 00800 void getSn_DIPR(uint8_t sn, uint8_t * dipr) { 00801 spi_read(Sn_DIPR, (0x08 + (sn << 5)), dipr, 4); 00802 } 00803 00804 /** 00805 * @ingroup Socket_register_access_function 00806 * @brief Set @ref Sn_DPORT register 00807 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00808 * @param (uint16_t)dport Value to set @ref Sn_DPORT 00809 * @sa getSn_DPORT() 00810 */ 00811 void setSn_DPORT(uint8_t sn, uint16_t dport) { 00812 sreg<uint16_t>(sn, Sn_DPORT, dport); 00813 } 00814 00815 /** 00816 * @ingroup Socket_register_access_function 00817 * @brief Get @ref Sn_DPORT register 00818 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00819 * @return uint16_t. Value of @ref Sn_DPORT. 00820 * @sa setSn_DPORT() 00821 */ 00822 uint16_t getSn_DPORT(uint8_t sn) { 00823 return sreg<uint16_t>(sn, Sn_DPORT); 00824 } 00825 00826 00827 /** 00828 * @ingroup Socket_register_access_function 00829 * @brief Set @ref Sn_RXBUF_SIZE register 00830 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00831 * @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE 00832 * @sa getSn_RXBUF_SIZE() 00833 */ 00834 void setSn_RXBUF_SIZE(uint8_t sn, uint8_t rxbufsize) { 00835 sreg<uint8_t>(sn, Sn_RXBUF_SIZE ,rxbufsize); 00836 } 00837 00838 00839 /** 00840 * @ingroup Socket_register_access_function 00841 * @brief Get @ref Sn_RXBUF_SIZE register 00842 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00843 * @return uint8_t. Value of @ref Sn_RXBUF_SIZE. 00844 * @sa setSn_RXBUF_SIZE() 00845 */ 00846 uint8_t getSn_RXBUF_SIZE(uint8_t sn) { 00847 return sreg<uint8_t>(sn, Sn_RXBUF_SIZE); 00848 } 00849 00850 /** 00851 * @ingroup Socket_register_access_function 00852 * @brief Set @ref Sn_TXBUF_SIZE register 00853 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00854 * @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE 00855 * @sa getSn_TXBUF_SIZE() 00856 */ 00857 void setSn_TXBUF_SIZE(uint8_t sn, uint8_t txbufsize) { 00858 sreg<uint8_t>(sn, Sn_TXBUF_SIZE, txbufsize); 00859 } 00860 00861 /** 00862 * @ingroup Socket_register_access_function 00863 * @brief Get @ref Sn_TXBUF_SIZE register 00864 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00865 * @return uint8_t. Value of @ref Sn_TXBUF_SIZE. 00866 * @sa setSn_TXBUF_SIZE() 00867 */ 00868 uint8_t getSn_TXBUF_SIZE(uint8_t sn) { 00869 return sreg<uint8_t>(sn, Sn_TXBUF_SIZE); 00870 } 00871 00872 /** 00873 * @ingroup Socket_register_access_function 00874 * @brief Get @ref Sn_TX_FSR register 00875 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00876 * @return uint16_t. Value of @ref Sn_TX_FSR. 00877 */ 00878 uint16_t getSn_TX_FSR(uint8_t sn) { 00879 return sreg<uint16_t>(sn, Sn_TX_FSR); 00880 } 00881 00882 00883 /** 00884 * @ingroup Socket_register_access_function 00885 * @brief Get @ref Sn_TX_RD register 00886 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00887 * @return uint16_t. Value of @ref Sn_TX_RD. 00888 */ 00889 uint16_t getSn_TX_RD(uint8_t sn) { 00890 return sreg<uint16_t>(sn, Sn_TX_RD); 00891 } 00892 00893 /** 00894 * @ingroup Socket_register_access_function 00895 * @brief Set @ref Sn_TX_WR register 00896 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00897 * @param (uint16_t)txwr Value to set @ref Sn_TX_WR 00898 * @sa GetSn_TX_WR() 00899 */ 00900 void setSn_TX_WR(uint8_t sn, uint16_t txwr) { 00901 sreg<uint16_t>(sn, Sn_TX_WR, txwr); 00902 } 00903 00904 /** 00905 * @ingroup Socket_register_access_function 00906 * @brief Get @ref Sn_TX_WR register 00907 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00908 * @return uint16_t. Value of @ref Sn_TX_WR. 00909 * @sa setSn_TX_WR() 00910 */ 00911 uint16_t getSn_TX_WR(uint8_t sn) { 00912 return sreg<uint16_t>(sn, Sn_TX_WR); 00913 } 00914 00915 00916 /** 00917 * @ingroup Socket_register_access_function 00918 * @brief Get @ref Sn_RX_RSR register 00919 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00920 * @return uint16_t. Value of @ref Sn_RX_RSR. 00921 */ 00922 uint16_t getSn_RX_RSR(uint8_t sn) { 00923 return sreg<uint16_t>(sn, Sn_RX_RSR); 00924 } 00925 00926 00927 /** 00928 * @ingroup Socket_register_access_function 00929 * @brief Set @ref Sn_RX_RD register 00930 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00931 * @param (uint16_t)rxrd Value to set @ref Sn_RX_RD 00932 * @sa getSn_RX_RD() 00933 */ 00934 void setSn_RX_RD(uint8_t sn, uint16_t rxrd) { 00935 sreg<uint16_t>(sn, Sn_RX_RD, rxrd); 00936 } 00937 00938 /** 00939 * @ingroup Socket_register_access_function 00940 * @brief Get @ref Sn_RX_RD register 00941 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00942 * @regurn uint16_t. Value of @ref Sn_RX_RD. 00943 * @sa setSn_RX_RD() 00944 */ 00945 uint16_t getSn_RX_RD(uint8_t sn) { 00946 return sreg<uint16_t>(sn, Sn_RX_RD); 00947 } 00948 00949 /** 00950 * @ingroup Socket_register_access_function 00951 * @brief Get @ref Sn_RX_WR register 00952 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00953 * @return uint16_t. Value of @ref Sn_RX_WR. 00954 */ 00955 uint16_t getSn_RX_WR(uint8_t sn) { 00956 return sreg<uint16_t>(sn, Sn_RX_WR); 00957 } 00958 00959 00960 ////////////////////////////////////// 00961 00962 ///////////////////////////////////// 00963 // Sn_TXBUF & Sn_RXBUF IO function // 00964 ///////////////////////////////////// 00965 /** 00966 * @brief Gets the max buffer size of socket sn passed as parameter. 00967 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00968 * @return uint16_t. Value of Socket n RX max buffer size. 00969 */ 00970 uint16_t getSn_RxMAX(uint8_t sn) { 00971 return (getSn_RXBUF_SIZE(sn) << 10); 00972 } 00973 00974 /** 00975 * @brief Gets the max buffer size of socket sn passed as parameters. 00976 * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. 00977 * @return uint16_t. Value of Socket n TX max buffer size. 00978 */ 00979 //uint16_t getSn_TxMAX(uint8_t sn); 00980 uint16_t getSn_TxMAX(uint8_t sn) { 00981 return (getSn_TXBUF_SIZE(sn) << 10); 00982 } 00983 00984 00985 int ethernet_link(void); 00986 void ethernet_set_link(int speed, int duplex); 00987 protected: 00988 uint8_t mac[6]; 00989 uint32_t ip; 00990 uint32_t netmask; 00991 uint32_t gateway; 00992 uint32_t dnsaddr; 00993 bool dhcp; 00994 00995 void spi_write(uint16_t addr, uint8_t cb, const uint8_t *buf, uint16_t len); 00996 void spi_read(uint16_t addr, uint8_t cb, uint8_t *buf, uint16_t len); 00997 SPI* spi; 00998 DigitalOut cs; 00999 DigitalOut reset_pin; 01000 static WIZnet_Chip* inst; 01001 01002 void reg_wr_mac(uint16_t addr, uint8_t* data) { 01003 spi_write(addr, 0x04, data, 6); 01004 } 01005 01006 }; 01007 01008 01009 extern uint32_t str_to_ip(const char* str); 01010 extern void printfBytes(char* str, uint8_t* buf, int len); 01011 extern void printHex(uint8_t* buf, int len); 01012 extern void debug_hex(uint8_t* buf, int len);
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