Vekatech / VK_RZ_A1H_LCD_demo

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vdc5_sync_ctrl_t Struct Reference
Data Fields

vdc5_sync_ctrl_t Struct Reference

#include <r_vdc5.h>

Data Fields

vdc5_onoff_t res_vs_sel
vdc5_res_vs_in_sel_t res_vs_in_sel
uint16_t res_fv
uint16_t res_fh
uint16_t res_vsdly
vdc5_period_rect_t res_f
const vdc5_vsync_cpmpe_t * vsync_cpmpe

Detailed Description

Sync signal control parameter

Definition at line 305 of file r_vdc5.h.

Field Documentation

vdc5_period_rect_t res_f

Full-screen enable signal

Definition at line 312 of file r_vdc5.h.

uint16_t res_fh

Hsync period setting

Definition at line 310 of file r_vdc5.h.

uint16_t res_fv

Free-running Vsync period setting

Definition at line 309 of file r_vdc5.h.

vdc5_res_vs_in_sel_t res_vs_in_sel

Horizontal/vertical sync signal output and full-screen enable signal select

Definition at line 307 of file r_vdc5.h.

vdc5_onoff_t res_vs_sel

Vsync signal output select (free-running Vsync on/off control)

Definition at line 306 of file r_vdc5.h.

uint16_t res_vsdly

Vsync signal delay control

Definition at line 311 of file r_vdc5.h.

const vdc5_vsync_cpmpe_t* vsync_cpmpe

Vsync signal compensation parameter

Definition at line 313 of file r_vdc5.h.

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