Vekatech / SDHI_driver_variant_II

SDHI_driver patch (mbedOS 5.11.5)

mbed-os-program/mbed-os/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/PeripheralNames.h@0:e1f465d87307, 2019-03-18 (annotated)

Committer:
tvendov
Date:
Mon Mar 18 16:54:40 2019 +0000
Revision:
0:e1f465d87307
Initial_II

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tvendov 0:e1f465d87307 1 /* mbed Microcontroller Library
tvendov 0:e1f465d87307 2 * Copyright (c) 2006-2013 ARM Limited
tvendov 0:e1f465d87307 3 *
tvendov 0:e1f465d87307 4 * Licensed under the Apache License, Version 2.0 (the "License");
tvendov 0:e1f465d87307 5 * you may not use this file except in compliance with the License.
tvendov 0:e1f465d87307 6 * You may obtain a copy of the License at
tvendov 0:e1f465d87307 7 *
tvendov 0:e1f465d87307 8 * http://www.apache.org/licenses/LICENSE-2.0
tvendov 0:e1f465d87307 9 *
tvendov 0:e1f465d87307 10 * Unless required by applicable law or agreed to in writing, software
tvendov 0:e1f465d87307 11 * distributed under the License is distributed on an "AS IS" BASIS,
tvendov 0:e1f465d87307 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
tvendov 0:e1f465d87307 13 * See the License for the specific language governing permissions and
tvendov 0:e1f465d87307 14 * limitations under the License.
tvendov 0:e1f465d87307 15 */
tvendov 0:e1f465d87307 16 #ifndef MBED_PERIPHERALNAMES_H
tvendov 0:e1f465d87307 17 #define MBED_PERIPHERALNAMES_H
tvendov 0:e1f465d87307 18
tvendov 0:e1f465d87307 19 #include "cmsis.h"
tvendov 0:e1f465d87307 20 #include "PinNames.h"
tvendov 0:e1f465d87307 21
tvendov 0:e1f465d87307 22 #ifdef __cplusplus
tvendov 0:e1f465d87307 23 extern "C" {
tvendov 0:e1f465d87307 24 #endif
tvendov 0:e1f465d87307 25
tvendov 0:e1f465d87307 26 typedef enum {
tvendov 0:e1f465d87307 27 UART0,
tvendov 0:e1f465d87307 28 UART1,
tvendov 0:e1f465d87307 29 UART2,
tvendov 0:e1f465d87307 30 UART3,
tvendov 0:e1f465d87307 31 UART4,
tvendov 0:e1f465d87307 32 UART5,
tvendov 0:e1f465d87307 33 UART6,
tvendov 0:e1f465d87307 34 UART7,
tvendov 0:e1f465d87307 35 } UARTName;
tvendov 0:e1f465d87307 36
tvendov 0:e1f465d87307 37 typedef enum {
tvendov 0:e1f465d87307 38 PWM_PWM1A = 0,
tvendov 0:e1f465d87307 39 PWM_PWM1B,
tvendov 0:e1f465d87307 40 PWM_PWM1C,
tvendov 0:e1f465d87307 41 PWM_PWM1D,
tvendov 0:e1f465d87307 42 PWM_PWM1E,
tvendov 0:e1f465d87307 43 PWM_PWM1F,
tvendov 0:e1f465d87307 44 PWM_PWM1G,
tvendov 0:e1f465d87307 45 PWM_PWM1H,
tvendov 0:e1f465d87307 46 PWM_PWM2A,
tvendov 0:e1f465d87307 47 PWM_PWM2B,
tvendov 0:e1f465d87307 48 PWM_PWM2C,
tvendov 0:e1f465d87307 49 PWM_PWM2D,
tvendov 0:e1f465d87307 50 PWM_PWM2E,
tvendov 0:e1f465d87307 51 PWM_PWM2F,
tvendov 0:e1f465d87307 52 PWM_PWM2G,
tvendov 0:e1f465d87307 53 PWM_PWM2H,
tvendov 0:e1f465d87307 54 PWM_TIOC0A = 0x20,
tvendov 0:e1f465d87307 55 PWM_TIOC0C,
tvendov 0:e1f465d87307 56 PWM_TIOC1A,
tvendov 0:e1f465d87307 57 PWM_TIOC2A,
tvendov 0:e1f465d87307 58 PWM_TIOC3A,
tvendov 0:e1f465d87307 59 PWM_TIOC3C,
tvendov 0:e1f465d87307 60 PWM_TIOC4A,
tvendov 0:e1f465d87307 61 PWM_TIOC4C,
tvendov 0:e1f465d87307 62 } PWMName;
tvendov 0:e1f465d87307 63
tvendov 0:e1f465d87307 64 typedef enum {
tvendov 0:e1f465d87307 65 AN0= 0,
tvendov 0:e1f465d87307 66 AN1= 1,
tvendov 0:e1f465d87307 67 AN2= 2,
tvendov 0:e1f465d87307 68 AN3= 3,
tvendov 0:e1f465d87307 69 AN4= 4,
tvendov 0:e1f465d87307 70 AN5= 5,
tvendov 0:e1f465d87307 71 AN6= 6,
tvendov 0:e1f465d87307 72 AN7= 7,
tvendov 0:e1f465d87307 73 } ADCName;
tvendov 0:e1f465d87307 74
tvendov 0:e1f465d87307 75 typedef enum {
tvendov 0:e1f465d87307 76 SPI_0 = 0,
tvendov 0:e1f465d87307 77 SPI_1,
tvendov 0:e1f465d87307 78 SPI_2,
tvendov 0:e1f465d87307 79 SPI_3,
tvendov 0:e1f465d87307 80 SPI_4,
tvendov 0:e1f465d87307 81 } SPIName;
tvendov 0:e1f465d87307 82
tvendov 0:e1f465d87307 83 typedef enum {
tvendov 0:e1f465d87307 84 I2C_0 = 0,
tvendov 0:e1f465d87307 85 I2C_1,
tvendov 0:e1f465d87307 86 I2C_2,
tvendov 0:e1f465d87307 87 I2C_3,
tvendov 0:e1f465d87307 88 } I2CName;
tvendov 0:e1f465d87307 89
tvendov 0:e1f465d87307 90 typedef enum {
tvendov 0:e1f465d87307 91 CAN_0 = 0,
tvendov 0:e1f465d87307 92 CAN_1,
tvendov 0:e1f465d87307 93 CAN_2,
tvendov 0:e1f465d87307 94 CAN_3,
tvendov 0:e1f465d87307 95 CAN_4,
tvendov 0:e1f465d87307 96 } CANName;
tvendov 0:e1f465d87307 97
tvendov 0:e1f465d87307 98 typedef enum {
tvendov 0:e1f465d87307 99 SDHI_0 = 0,
tvendov 0:e1f465d87307 100 SDHI_1
tvendov 0:e1f465d87307 101 } SDHIName;
tvendov 0:e1f465d87307 102
tvendov 0:e1f465d87307 103
tvendov 0:e1f465d87307 104 #define STDIO_UART_TX USBTX
tvendov 0:e1f465d87307 105 #define STDIO_UART_RX USBRX
tvendov 0:e1f465d87307 106 #define STDIO_UART UART3
tvendov 0:e1f465d87307 107
tvendov 0:e1f465d87307 108
tvendov 0:e1f465d87307 109
tvendov 0:e1f465d87307 110 #ifdef __cplusplus
tvendov 0:e1f465d87307 111 }
tvendov 0:e1f465d87307 112 #endif
tvendov 0:e1f465d87307 113
tvendov 0:e1f465d87307 114 #endif
tvendov 0:e1f465d87307 115