Team_PjL / USBHost_F769NI

only for STM32F769NI-DISCOVERY, porting from mbed OS5 unsupport functions

targets/TARGET_STM/USBHALHost_STM.h@0:dae1ac0c0a7b, 2019-08-07 (annotated)

Committer:
kenjiArai
Date:
Wed Aug 07 05:33:53 2019 +0000
Revision:
0:dae1ac0c0a7b
only for STM32F769NI-DISCOVERY, porting from mbed OS5 unsupport functions

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kenjiArai 0:dae1ac0c0a7b 1 /* Copyright (c) 2017 mbed.org, MIT License
kenjiArai 0:dae1ac0c0a7b 2 *
kenjiArai 0:dae1ac0c0a7b 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
kenjiArai 0:dae1ac0c0a7b 4 * and associated documentation files (the "Software"), to deal in the Software without
kenjiArai 0:dae1ac0c0a7b 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
kenjiArai 0:dae1ac0c0a7b 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
kenjiArai 0:dae1ac0c0a7b 7 * Software is furnished to do so, subject to the following conditions:
kenjiArai 0:dae1ac0c0a7b 8 *
kenjiArai 0:dae1ac0c0a7b 9 * The above copyright notice and this permission notice shall be included in all copies or
kenjiArai 0:dae1ac0c0a7b 10 * substantial portions of the Software.
kenjiArai 0:dae1ac0c0a7b 11 *
kenjiArai 0:dae1ac0c0a7b 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
kenjiArai 0:dae1ac0c0a7b 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
kenjiArai 0:dae1ac0c0a7b 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
kenjiArai 0:dae1ac0c0a7b 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
kenjiArai 0:dae1ac0c0a7b 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
kenjiArai 0:dae1ac0c0a7b 17 */
kenjiArai 0:dae1ac0c0a7b 18 #ifndef USBHALHOST_STM_H
kenjiArai 0:dae1ac0c0a7b 19 #define USBHALHOST_STM_H
kenjiArai 0:dae1ac0c0a7b 20
kenjiArai 0:dae1ac0c0a7b 21 #if defined(TARGET_DISCO_F746NG)
kenjiArai 0:dae1ac0c0a7b 22 #if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file
kenjiArai 0:dae1ac0c0a7b 23 #define TARGET_DISCO_F746NG_HS
kenjiArai 0:dae1ac0c0a7b 24 #else
kenjiArai 0:dae1ac0c0a7b 25 #define TARGET_DISCO_F746NG_FS
kenjiArai 0:dae1ac0c0a7b 26 #endif
kenjiArai 0:dae1ac0c0a7b 27 #endif
kenjiArai 0:dae1ac0c0a7b 28
kenjiArai 0:dae1ac0c0a7b 29 #if defined(TARGET_DISCO_F746NG_HS) || defined(TARGET_DISCO_F769NI)
kenjiArai 0:dae1ac0c0a7b 30 #define USBHAL_IRQn OTG_HS_IRQn
kenjiArai 0:dae1ac0c0a7b 31 #else
kenjiArai 0:dae1ac0c0a7b 32 #define USBHAL_IRQn OTG_FS_IRQn
kenjiArai 0:dae1ac0c0a7b 33 #endif
kenjiArai 0:dae1ac0c0a7b 34
kenjiArai 0:dae1ac0c0a7b 35 #define HCCA_SIZE sizeof(HCD_HandleTypeDef)
kenjiArai 0:dae1ac0c0a7b 36 #define ED_SIZE sizeof(HCED)
kenjiArai 0:dae1ac0c0a7b 37 #define TD_SIZE sizeof(HCTD)
kenjiArai 0:dae1ac0c0a7b 38
kenjiArai 0:dae1ac0c0a7b 39 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT * ED_SIZE) + (MAX_TD * TD_SIZE))
kenjiArai 0:dae1ac0c0a7b 40
kenjiArai 0:dae1ac0c0a7b 41 /* STM device FS have 11 channels (definition is for 60 channels) */
kenjiArai 0:dae1ac0c0a7b 42 static volatile uint8_t usb_buf[TOTAL_SIZE];
kenjiArai 0:dae1ac0c0a7b 43
kenjiArai 0:dae1ac0c0a7b 44 typedef struct {
kenjiArai 0:dae1ac0c0a7b 45 /* store the request ongoing on each endpoit */
kenjiArai 0:dae1ac0c0a7b 46 /* 1st field of structure avoid giving knowledge of all structure to
kenjiArai 0:dae1ac0c0a7b 47 * endpoint */
kenjiArai 0:dae1ac0c0a7b 48 volatile uint32_t addr[MAX_ENDPOINT];
kenjiArai 0:dae1ac0c0a7b 49 USBHALHost *inst;
kenjiArai 0:dae1ac0c0a7b 50 void (USBHALHost::*deviceConnected)(int hub, int port, bool lowSpeed, USBHostHub *hub_parent);
kenjiArai 0:dae1ac0c0a7b 51 void (USBHALHost::*deviceDisconnected)(int hub, int port, USBHostHub *hub_parent, volatile uint32_t addr);
kenjiArai 0:dae1ac0c0a7b 52 void (USBHALHost::*transferCompleted)(volatile uint32_t addr);
kenjiArai 0:dae1ac0c0a7b 53 } USBHALHost_Private_t;
kenjiArai 0:dae1ac0c0a7b 54
kenjiArai 0:dae1ac0c0a7b 55 static gpio_t gpio_powerpin;
kenjiArai 0:dae1ac0c0a7b 56
kenjiArai 0:dae1ac0c0a7b 57 // NUCLEO_64 boards
kenjiArai 0:dae1ac0c0a7b 58 #if defined(TARGET_NUCLEO_F401RE) || \
kenjiArai 0:dae1ac0c0a7b 59 defined(TARGET_NUCLEO_F411RE) || \
kenjiArai 0:dae1ac0c0a7b 60 defined(TARGET_NUCLEO_F446RE) || \
kenjiArai 0:dae1ac0c0a7b 61 defined(TARGET_NUCLEO_L476RG) || \
kenjiArai 0:dae1ac0c0a7b 62 defined(TARGET_NUCLEO_L486RG)
kenjiArai 0:dae1ac0c0a7b 63 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 64 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 65 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOC_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PC_0, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 66
kenjiArai 0:dae1ac0c0a7b 67 // NUCLEO_144 boards
kenjiArai 0:dae1ac0c0a7b 68 #elif defined(TARGET_NUCLEO_F207ZG) || \
kenjiArai 0:dae1ac0c0a7b 69 defined(TARGET_NUCLEO_F412ZG) || \
kenjiArai 0:dae1ac0c0a7b 70 defined(TARGET_NUCLEO_F413ZH) || \
kenjiArai 0:dae1ac0c0a7b 71 defined(TARGET_NUCLEO_F429ZI) || \
kenjiArai 0:dae1ac0c0a7b 72 defined(TARGET_NUCLEO_F439ZI) || \
kenjiArai 0:dae1ac0c0a7b 73 defined(TARGET_NUCLEO_F446ZE) || \
kenjiArai 0:dae1ac0c0a7b 74 defined(TARGET_NUCLEO_F767ZI) || \
kenjiArai 0:dae1ac0c0a7b 75 defined(TARGET_NUCLEO_F746ZG) || \
kenjiArai 0:dae1ac0c0a7b 76 defined(TARGET_NUCLEO_F756ZG) || \
kenjiArai 0:dae1ac0c0a7b 77 defined(TARGET_NUCLEO_F767ZI)
kenjiArai 0:dae1ac0c0a7b 78 #define USB_POWER_ON 1
kenjiArai 0:dae1ac0c0a7b 79 #define USB_POWER_OFF 0
kenjiArai 0:dae1ac0c0a7b 80 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOG_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PG_6, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 81
kenjiArai 0:dae1ac0c0a7b 82 // DISCOVERY boards
kenjiArai 0:dae1ac0c0a7b 83 #elif defined(TARGET_DISCO_F413ZH)
kenjiArai 0:dae1ac0c0a7b 84 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 85 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 86 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOG_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PG_8, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 87
kenjiArai 0:dae1ac0c0a7b 88 #elif defined(TARGET_DISCO_F469NI)
kenjiArai 0:dae1ac0c0a7b 89 #define USB_POWER_ON 1
kenjiArai 0:dae1ac0c0a7b 90 #define USB_POWER_OFF 0
kenjiArai 0:dae1ac0c0a7b 91 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOB_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PB_2, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 92
kenjiArai 0:dae1ac0c0a7b 93 #elif defined(TARGET_DISCO_F746NG_FS)
kenjiArai 0:dae1ac0c0a7b 94 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 95 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 96 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOD_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PD_5, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 97
kenjiArai 0:dae1ac0c0a7b 98 #elif defined(TARGET_DISCO_F746NG_HS)
kenjiArai 0:dae1ac0c0a7b 99 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 100 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 101 #define USB_POWERPIN_CONFIG {}
kenjiArai 0:dae1ac0c0a7b 102
kenjiArai 0:dae1ac0c0a7b 103 #elif defined(TARGET_DISCO_F769NI)
kenjiArai 0:dae1ac0c0a7b 104 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 105 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 106 #define USB_POWERPIN_CONFIG {}
kenjiArai 0:dae1ac0c0a7b 107
kenjiArai 0:dae1ac0c0a7b 108 #elif defined(TARGET_DISCO_L475VG_IOT01A)
kenjiArai 0:dae1ac0c0a7b 109 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 110 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 111 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOD_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PD_12, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 112
kenjiArai 0:dae1ac0c0a7b 113 #elif defined(TARGET_DISCO_L476VG)
kenjiArai 0:dae1ac0c0a7b 114 #define USB_POWER_ON 0
kenjiArai 0:dae1ac0c0a7b 115 #define USB_POWER_OFF 1
kenjiArai 0:dae1ac0c0a7b 116 #define USB_POWERPIN_CONFIG {__HAL_RCC_GPIOC_CLK_ENABLE();gpio_init_out_ex(&gpio_powerpin, PC_9, USB_POWER_OFF);}
kenjiArai 0:dae1ac0c0a7b 117
kenjiArai 0:dae1ac0c0a7b 118 #else
kenjiArai 0:dae1ac0c0a7b 119 #error "USB power pin is not configured !"
kenjiArai 0:dae1ac0c0a7b 120 #endif
kenjiArai 0:dae1ac0c0a7b 121
kenjiArai 0:dae1ac0c0a7b 122
kenjiArai 0:dae1ac0c0a7b 123 void usb_vbus(uint8_t state)
kenjiArai 0:dae1ac0c0a7b 124 {
kenjiArai 0:dae1ac0c0a7b 125 if (gpio_powerpin.reg_set && gpio_powerpin.reg_clr) {
kenjiArai 0:dae1ac0c0a7b 126 if (state == 0) {
kenjiArai 0:dae1ac0c0a7b 127 gpio_write(&gpio_powerpin, USB_POWER_OFF);
kenjiArai 0:dae1ac0c0a7b 128 } else {
kenjiArai 0:dae1ac0c0a7b 129 gpio_write(&gpio_powerpin, USB_POWER_ON);
kenjiArai 0:dae1ac0c0a7b 130 }
kenjiArai 0:dae1ac0c0a7b 131 } else {
kenjiArai 0:dae1ac0c0a7b 132 /* The board does not have GPIO pin to control usb supply */
kenjiArai 0:dae1ac0c0a7b 133 }
kenjiArai 0:dae1ac0c0a7b 134 wait(0.2);
kenjiArai 0:dae1ac0c0a7b 135 }
kenjiArai 0:dae1ac0c0a7b 136
kenjiArai 0:dae1ac0c0a7b 137
kenjiArai 0:dae1ac0c0a7b 138 USBHALHost::USBHALHost()
kenjiArai 0:dae1ac0c0a7b 139 {
kenjiArai 0:dae1ac0c0a7b 140 instHost = this;
kenjiArai 0:dae1ac0c0a7b 141 HCD_HandleTypeDef *hhcd = {0};
kenjiArai 0:dae1ac0c0a7b 142 USBHALHost_Private_t *HALPriv = new (USBHALHost_Private_t);
kenjiArai 0:dae1ac0c0a7b 143
kenjiArai 0:dae1ac0c0a7b 144 memset(HALPriv, 0, sizeof(USBHALHost_Private_t));
kenjiArai 0:dae1ac0c0a7b 145 memInit();
kenjiArai 0:dae1ac0c0a7b 146 memset((void *)usb_hcca, 0, HCCA_SIZE);
kenjiArai 0:dae1ac0c0a7b 147
kenjiArai 0:dae1ac0c0a7b 148 hhcd = (HCD_HandleTypeDef *)usb_hcca;
kenjiArai 0:dae1ac0c0a7b 149 hhcd->pData = (void *)HALPriv;
kenjiArai 0:dae1ac0c0a7b 150
kenjiArai 0:dae1ac0c0a7b 151 #if defined(TARGET_DISCO_F746NG_HS) || defined(TARGET_DISCO_F769NI)
kenjiArai 0:dae1ac0c0a7b 152 hhcd->Instance = USB_OTG_HS;
kenjiArai 0:dae1ac0c0a7b 153 hhcd->Init.speed = HCD_SPEED_HIGH;
kenjiArai 0:dae1ac0c0a7b 154 hhcd->Init.phy_itface = HCD_PHY_ULPI;
kenjiArai 0:dae1ac0c0a7b 155 #else
kenjiArai 0:dae1ac0c0a7b 156 hhcd->Instance = USB_OTG_FS;
kenjiArai 0:dae1ac0c0a7b 157 hhcd->Init.speed = HCD_SPEED_FULL;
kenjiArai 0:dae1ac0c0a7b 158 hhcd->Init.phy_itface = HCD_PHY_EMBEDDED;
kenjiArai 0:dae1ac0c0a7b 159 #endif
kenjiArai 0:dae1ac0c0a7b 160
kenjiArai 0:dae1ac0c0a7b 161 hhcd->Init.Host_channels = 11;
kenjiArai 0:dae1ac0c0a7b 162 hhcd->Init.dma_enable = 0; // for now failed with dma
kenjiArai 0:dae1ac0c0a7b 163 hhcd->Init.low_power_enable = 0;
kenjiArai 0:dae1ac0c0a7b 164 hhcd->Init.Sof_enable = 0;
kenjiArai 0:dae1ac0c0a7b 165 hhcd->Init.vbus_sensing_enable = 0;
kenjiArai 0:dae1ac0c0a7b 166 hhcd->Init.use_external_vbus = 1;
kenjiArai 0:dae1ac0c0a7b 167 hhcd->Init.lpm_enable = 0;
kenjiArai 0:dae1ac0c0a7b 168
kenjiArai 0:dae1ac0c0a7b 169 HALPriv->inst = this;
kenjiArai 0:dae1ac0c0a7b 170 HALPriv->deviceConnected = &USBHALHost::deviceConnected;
kenjiArai 0:dae1ac0c0a7b 171 HALPriv->deviceDisconnected = &USBHALHost::deviceDisconnected;
kenjiArai 0:dae1ac0c0a7b 172 HALPriv->transferCompleted = &USBHALHost::transferCompleted;
kenjiArai 0:dae1ac0c0a7b 173
kenjiArai 0:dae1ac0c0a7b 174 for (int i = 0; i < MAX_ENDPOINT; i++) {
kenjiArai 0:dae1ac0c0a7b 175 edBufAlloc[i] = false;
kenjiArai 0:dae1ac0c0a7b 176 HALPriv->addr[i] = (uint32_t) - 1;
kenjiArai 0:dae1ac0c0a7b 177 }
kenjiArai 0:dae1ac0c0a7b 178
kenjiArai 0:dae1ac0c0a7b 179 for (int i = 0; i < MAX_TD; i++) {
kenjiArai 0:dae1ac0c0a7b 180 tdBufAlloc[i] = false;
kenjiArai 0:dae1ac0c0a7b 181 }
kenjiArai 0:dae1ac0c0a7b 182
kenjiArai 0:dae1ac0c0a7b 183 __HAL_RCC_PWR_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 184
kenjiArai 0:dae1ac0c0a7b 185 #ifdef TARGET_STM32L4
kenjiArai 0:dae1ac0c0a7b 186 HAL_PWREx_EnableVddUSB();
kenjiArai 0:dae1ac0c0a7b 187 #endif
kenjiArai 0:dae1ac0c0a7b 188
kenjiArai 0:dae1ac0c0a7b 189 // Configure USB pins
kenjiArai 0:dae1ac0c0a7b 190 #if defined(TARGET_NUCLEO_F401RE) || \
kenjiArai 0:dae1ac0c0a7b 191 defined(TARGET_NUCLEO_F411RE) || \
kenjiArai 0:dae1ac0c0a7b 192 defined(TARGET_NUCLEO_F446RE) || \
kenjiArai 0:dae1ac0c0a7b 193 defined(TARGET_NUCLEO_L476RG) || \
kenjiArai 0:dae1ac0c0a7b 194 defined(TARGET_NUCLEO_L486RG) || \
kenjiArai 0:dae1ac0c0a7b 195 defined(TARGET_NUCLEO_F207ZG) || \
kenjiArai 0:dae1ac0c0a7b 196 defined(TARGET_NUCLEO_F412ZG) || \
kenjiArai 0:dae1ac0c0a7b 197 defined(TARGET_NUCLEO_F413ZH) || \
kenjiArai 0:dae1ac0c0a7b 198 defined(TARGET_NUCLEO_F429ZI) || \
kenjiArai 0:dae1ac0c0a7b 199 defined(TARGET_NUCLEO_F439ZI) || \
kenjiArai 0:dae1ac0c0a7b 200 defined(TARGET_NUCLEO_F446ZE) || \
kenjiArai 0:dae1ac0c0a7b 201 defined(TARGET_NUCLEO_F767ZI) || \
kenjiArai 0:dae1ac0c0a7b 202 defined(TARGET_NUCLEO_F746ZG) || \
kenjiArai 0:dae1ac0c0a7b 203 defined(TARGET_NUCLEO_F756ZG) || \
kenjiArai 0:dae1ac0c0a7b 204 defined(TARGET_NUCLEO_F767ZI) || \
kenjiArai 0:dae1ac0c0a7b 205 defined(TARGET_DISCO_F413ZH) || \
kenjiArai 0:dae1ac0c0a7b 206 defined(TARGET_DISCO_F469NI) || \
kenjiArai 0:dae1ac0c0a7b 207 defined(TARGET_DISCO_L475VG_IOT01A)
kenjiArai 0:dae1ac0c0a7b 208 __HAL_RCC_GPIOA_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 209 pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM
kenjiArai 0:dae1ac0c0a7b 210 pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP
kenjiArai 0:dae1ac0c0a7b 211 pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID
kenjiArai 0:dae1ac0c0a7b 212 pin_function(PA_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS
kenjiArai 0:dae1ac0c0a7b 213
kenjiArai 0:dae1ac0c0a7b 214 #elif defined(TARGET_DISCO_F746NG_FS)
kenjiArai 0:dae1ac0c0a7b 215 __HAL_RCC_GPIOA_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 216 pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM
kenjiArai 0:dae1ac0c0a7b 217 pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP
kenjiArai 0:dae1ac0c0a7b 218 pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID
kenjiArai 0:dae1ac0c0a7b 219 __HAL_RCC_GPIOJ_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 220 pin_function(PJ_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS
kenjiArai 0:dae1ac0c0a7b 221
kenjiArai 0:dae1ac0c0a7b 222 #elif defined(TARGET_DISCO_F746NG_HS)
kenjiArai 0:dae1ac0c0a7b 223 __HAL_RCC_GPIOA_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 224 __HAL_RCC_GPIOB_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 225 __HAL_RCC_GPIOC_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 226 __HAL_RCC_GPIOH_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 227 pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK
kenjiArai 0:dae1ac0c0a7b 228 pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0
kenjiArai 0:dae1ac0c0a7b 229 pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1
kenjiArai 0:dae1ac0c0a7b 230 pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2
kenjiArai 0:dae1ac0c0a7b 231 pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3
kenjiArai 0:dae1ac0c0a7b 232 pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4
kenjiArai 0:dae1ac0c0a7b 233 pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5
kenjiArai 0:dae1ac0c0a7b 234 pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6
kenjiArai 0:dae1ac0c0a7b 235 pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7
kenjiArai 0:dae1ac0c0a7b 236 pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP
kenjiArai 0:dae1ac0c0a7b 237 pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT
kenjiArai 0:dae1ac0c0a7b 238 pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR
kenjiArai 0:dae1ac0c0a7b 239
kenjiArai 0:dae1ac0c0a7b 240 #elif defined(TARGET_DISCO_F769NI)
kenjiArai 0:dae1ac0c0a7b 241 __HAL_RCC_GPIOA_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 242 __HAL_RCC_GPIOB_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 243 __HAL_RCC_GPIOC_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 244 __HAL_RCC_GPIOH_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 245 __HAL_RCC_GPIOI_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 246 pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK
kenjiArai 0:dae1ac0c0a7b 247 pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0
kenjiArai 0:dae1ac0c0a7b 248 pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1
kenjiArai 0:dae1ac0c0a7b 249 pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2
kenjiArai 0:dae1ac0c0a7b 250 pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3
kenjiArai 0:dae1ac0c0a7b 251 pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4
kenjiArai 0:dae1ac0c0a7b 252 pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5
kenjiArai 0:dae1ac0c0a7b 253 pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6
kenjiArai 0:dae1ac0c0a7b 254 pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7
kenjiArai 0:dae1ac0c0a7b 255 pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP
kenjiArai 0:dae1ac0c0a7b 256 pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT
kenjiArai 0:dae1ac0c0a7b 257 pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR
kenjiArai 0:dae1ac0c0a7b 258
kenjiArai 0:dae1ac0c0a7b 259 #elif defined(TARGET_DISCO_L476VG)
kenjiArai 0:dae1ac0c0a7b 260 __HAL_RCC_GPIOA_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 261 pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM
kenjiArai 0:dae1ac0c0a7b 262 pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP
kenjiArai 0:dae1ac0c0a7b 263 pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)); // ID
kenjiArai 0:dae1ac0c0a7b 264 pin_function(PC_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // VBUS
kenjiArai 0:dae1ac0c0a7b 265
kenjiArai 0:dae1ac0c0a7b 266 #elif defined(TARGET_STEVAL_3DP001V1)
kenjiArai 0:dae1ac0c0a7b 267 __HAL_RCC_GPIOA_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 268 pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DM
kenjiArai 0:dae1ac0c0a7b 269 pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS)); // DP
kenjiArai 0:dae1ac0c0a7b 270
kenjiArai 0:dae1ac0c0a7b 271 #else
kenjiArai 0:dae1ac0c0a7b 272 #error "USB pins are not configured !"
kenjiArai 0:dae1ac0c0a7b 273 #endif
kenjiArai 0:dae1ac0c0a7b 274
kenjiArai 0:dae1ac0c0a7b 275 // Configure USB POWER pin
kenjiArai 0:dae1ac0c0a7b 276 USB_POWERPIN_CONFIG;
kenjiArai 0:dae1ac0c0a7b 277
kenjiArai 0:dae1ac0c0a7b 278 // Enable clocks
kenjiArai 0:dae1ac0c0a7b 279 __HAL_RCC_SYSCFG_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 280
kenjiArai 0:dae1ac0c0a7b 281 #if defined(TARGET_DISCO_F746NG_HS) || defined(TARGET_DISCO_F769NI)
kenjiArai 0:dae1ac0c0a7b 282 __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 283 __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 284 #else
kenjiArai 0:dae1ac0c0a7b 285 __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
kenjiArai 0:dae1ac0c0a7b 286 #endif
kenjiArai 0:dae1ac0c0a7b 287
kenjiArai 0:dae1ac0c0a7b 288 // Set USB interrupt
kenjiArai 0:dae1ac0c0a7b 289 HAL_NVIC_SetPriority(USBHAL_IRQn, 5, 0);
kenjiArai 0:dae1ac0c0a7b 290 NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr);
kenjiArai 0:dae1ac0c0a7b 291 }
kenjiArai 0:dae1ac0c0a7b 292
kenjiArai 0:dae1ac0c0a7b 293 #endif // USBHALHOST_STM_H