Semtech / SX1280Lib

Driver for the SX1280 RF Transceiver

Dependents:   SX1280PingPong RangignMaster RangingSlave MSNV2-Terminal_V1-6 ... more

sx1280.cpp@12:c4f110f3fe3e, 2018-11-08 (annotated)

Committer:
mverdy
Date:
Thu Nov 08 10:08:44 2018 +0000
Revision:
12:c4f110f3fe3e
Parent:
11:d60df50e108f 
Synchronze driver on v1.3.1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:03ec2f3bde8c 1 /*
GregCr 0:03ec2f3bde8c 2 ______ _
GregCr 0:03ec2f3bde8c 3 / _____) _ | |
GregCr 0:03ec2f3bde8c 4 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:03ec2f3bde8c 5 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:03ec2f3bde8c 6 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:03ec2f3bde8c 7 (______/|_____)_|_|_| \__)_____)\____)_| |_|
GregCr 0:03ec2f3bde8c 8 (C)2016 Semtech
GregCr 0:03ec2f3bde8c 9
GregCr 0:03ec2f3bde8c 10 Description: Driver for SX1280 devices
GregCr 0:03ec2f3bde8c 11
GregCr 0:03ec2f3bde8c 12 License: Revised BSD License, see LICENSE.TXT file include in the project
GregCr 0:03ec2f3bde8c 13
GregCr 0:03ec2f3bde8c 14 Maintainer: Miguel Luis, Gregory Cristian and Matthieu Verdy
GregCr 0:03ec2f3bde8c 15 */
GregCr 0:03ec2f3bde8c 16 #include "mbed.h"
GregCr 0:03ec2f3bde8c 17 #include "sx1280.h"
GregCr 0:03ec2f3bde8c 18 #include "sx1280-hal.h"
GregCr 0:03ec2f3bde8c 19
GregCr 0:03ec2f3bde8c 20 /*!
GregCr 0:03ec2f3bde8c 21 * \brief Radio registers definition
GregCr 0:03ec2f3bde8c 22 *
GregCr 0:03ec2f3bde8c 23 */
GregCr 0:03ec2f3bde8c 24 typedef struct
GregCr 0:03ec2f3bde8c 25 {
GregCr 0:03ec2f3bde8c 26 uint16_t Addr; //!< The address of the register
GregCr 0:03ec2f3bde8c 27 uint8_t Value; //!< The value of the register
GregCr 0:03ec2f3bde8c 28 }RadioRegisters_t;
GregCr 0:03ec2f3bde8c 29
GregCr 0:03ec2f3bde8c 30 /*!
GregCr 0:03ec2f3bde8c 31 * \brief Radio hardware registers initialization definition
GregCr 0:03ec2f3bde8c 32 */
GregCr 0:03ec2f3bde8c 33 #define RADIO_INIT_REGISTERS_VALUE { }
GregCr 0:03ec2f3bde8c 34
GregCr 0:03ec2f3bde8c 35 /*!
GregCr 0:03ec2f3bde8c 36 * \brief Radio hardware registers initialization
GregCr 0:03ec2f3bde8c 37 */
GregCr 0:03ec2f3bde8c 38 const RadioRegisters_t RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
GregCr 0:03ec2f3bde8c 39
GregCr 0:03ec2f3bde8c 40 void SX1280::Init( void )
GregCr 0:03ec2f3bde8c 41 {
GregCr 0:03ec2f3bde8c 42 Reset( );
GregCr 0:03ec2f3bde8c 43 IoIrqInit( dioIrq );
GregCr 0:03ec2f3bde8c 44 Wakeup( );
GregCr 0:03ec2f3bde8c 45 SetRegistersDefault( );
GregCr 0:03ec2f3bde8c 46 }
GregCr 0:03ec2f3bde8c 47
GregCr 0:03ec2f3bde8c 48 void SX1280::SetRegistersDefault( void )
GregCr 0:03ec2f3bde8c 49 {
GregCr 0:03ec2f3bde8c 50 for( int16_t i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
GregCr 0:03ec2f3bde8c 51 {
GregCr 0:03ec2f3bde8c 52 WriteRegister( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
GregCr 0:03ec2f3bde8c 53 }
GregCr 0:03ec2f3bde8c 54 }
GregCr 0:03ec2f3bde8c 55
GregCr 0:03ec2f3bde8c 56 uint16_t SX1280::GetFirmwareVersion( void )
GregCr 0:03ec2f3bde8c 57 {
mverdy 9:3e5535d2cc1c 58 return( ( ( ReadRegister( REG_LR_FIRMWARE_VERSION_MSB ) ) << 8 ) | ( ReadRegister( REG_LR_FIRMWARE_VERSION_MSB + 1 ) ) );
GregCr 0:03ec2f3bde8c 59 }
GregCr 0:03ec2f3bde8c 60
GregCr 0:03ec2f3bde8c 61 RadioStatus_t SX1280::GetStatus( void )
GregCr 0:03ec2f3bde8c 62 {
GregCr 0:03ec2f3bde8c 63 uint8_t stat = 0;
GregCr 0:03ec2f3bde8c 64 RadioStatus_t status;
GregCr 0:03ec2f3bde8c 65
GregCr 0:03ec2f3bde8c 66 ReadCommand( RADIO_GET_STATUS, ( uint8_t * )&stat, 1 );
GregCr 0:03ec2f3bde8c 67 status.Value = stat;
GregCr 0:03ec2f3bde8c 68 return( status );
GregCr 0:03ec2f3bde8c 69 }
GregCr 0:03ec2f3bde8c 70
GregCr 0:03ec2f3bde8c 71 RadioOperatingModes_t SX1280::GetOpMode( void )
GregCr 0:03ec2f3bde8c 72 {
GregCr 0:03ec2f3bde8c 73 return( OperatingMode );
GregCr 0:03ec2f3bde8c 74 }
GregCr 0:03ec2f3bde8c 75
GregCr 0:03ec2f3bde8c 76 void SX1280::SetSleep( SleepParams_t sleepConfig )
GregCr 0:03ec2f3bde8c 77 {
GregCr 0:03ec2f3bde8c 78 uint8_t sleep = ( sleepConfig.WakeUpRTC << 3 ) |
GregCr 0:03ec2f3bde8c 79 ( sleepConfig.InstructionRamRetention << 2 ) |
GregCr 0:03ec2f3bde8c 80 ( sleepConfig.DataBufferRetention << 1 ) |
GregCr 0:03ec2f3bde8c 81 ( sleepConfig.DataRamRetention );
GregCr 0:03ec2f3bde8c 82
GregCr 0:03ec2f3bde8c 83 OperatingMode = MODE_SLEEP;
GregCr 0:03ec2f3bde8c 84 WriteCommand( RADIO_SET_SLEEP, &sleep, 1 );
GregCr 0:03ec2f3bde8c 85 }
GregCr 0:03ec2f3bde8c 86
GregCr 0:03ec2f3bde8c 87 void SX1280::SetStandby( RadioStandbyModes_t standbyConfig )
GregCr 0:03ec2f3bde8c 88 {
GregCr 0:03ec2f3bde8c 89 WriteCommand( RADIO_SET_STANDBY, ( uint8_t* )&standbyConfig, 1 );
GregCr 0:03ec2f3bde8c 90 if( standbyConfig == STDBY_RC )
GregCr 0:03ec2f3bde8c 91 {
GregCr 0:03ec2f3bde8c 92 OperatingMode = MODE_STDBY_RC;
GregCr 0:03ec2f3bde8c 93 }
GregCr 0:03ec2f3bde8c 94 else
GregCr 0:03ec2f3bde8c 95 {
GregCr 0:03ec2f3bde8c 96 OperatingMode = MODE_STDBY_XOSC;
GregCr 0:03ec2f3bde8c 97 }
GregCr 0:03ec2f3bde8c 98 }
GregCr 0:03ec2f3bde8c 99
GregCr 0:03ec2f3bde8c 100 void SX1280::SetFs( void )
GregCr 0:03ec2f3bde8c 101 {
GregCr 0:03ec2f3bde8c 102 WriteCommand( RADIO_SET_FS, 0, 0 );
GregCr 0:03ec2f3bde8c 103 OperatingMode = MODE_FS;
GregCr 0:03ec2f3bde8c 104 }
GregCr 0:03ec2f3bde8c 105
GregCr 0:03ec2f3bde8c 106 void SX1280::SetTx( TickTime_t timeout )
GregCr 0:03ec2f3bde8c 107 {
GregCr 0:03ec2f3bde8c 108 uint8_t buf[3];
GregCr 4:abf14b677777 109 buf[0] = timeout.PeriodBase;
GregCr 4:abf14b677777 110 buf[1] = ( uint8_t )( ( timeout.PeriodBaseCount >> 8 ) & 0x00FF );
GregCr 4:abf14b677777 111 buf[2] = ( uint8_t )( timeout.PeriodBaseCount & 0x00FF );
GregCr 0:03ec2f3bde8c 112
GregCr 0:03ec2f3bde8c 113 ClearIrqStatus( IRQ_RADIO_ALL );
GregCr 4:abf14b677777 114
GregCr 0:03ec2f3bde8c 115 // If the radio is doing ranging operations, then apply the specific calls
GregCr 0:03ec2f3bde8c 116 // prior to SetTx
GregCr 4:abf14b677777 117 if( GetPacketType( true ) == PACKET_TYPE_RANGING )
GregCr 0:03ec2f3bde8c 118 {
GregCr 0:03ec2f3bde8c 119 SetRangingRole( RADIO_RANGING_ROLE_MASTER );
GregCr 0:03ec2f3bde8c 120 }
GregCr 0:03ec2f3bde8c 121 WriteCommand( RADIO_SET_TX, buf, 3 );
GregCr 0:03ec2f3bde8c 122 OperatingMode = MODE_TX;
GregCr 0:03ec2f3bde8c 123 }
GregCr 0:03ec2f3bde8c 124
GregCr 0:03ec2f3bde8c 125 void SX1280::SetRx( TickTime_t timeout )
GregCr 0:03ec2f3bde8c 126 {
GregCr 0:03ec2f3bde8c 127 uint8_t buf[3];
GregCr 4:abf14b677777 128 buf[0] = timeout.PeriodBase;
GregCr 4:abf14b677777 129 buf[1] = ( uint8_t )( ( timeout.PeriodBaseCount >> 8 ) & 0x00FF );
GregCr 4:abf14b677777 130 buf[2] = ( uint8_t )( timeout.PeriodBaseCount & 0x00FF );
GregCr 0:03ec2f3bde8c 131
GregCr 0:03ec2f3bde8c 132 ClearIrqStatus( IRQ_RADIO_ALL );
GregCr 4:abf14b677777 133
GregCr 0:03ec2f3bde8c 134 // If the radio is doing ranging operations, then apply the specific calls
GregCr 0:03ec2f3bde8c 135 // prior to SetRx
GregCr 4:abf14b677777 136 if( GetPacketType( true ) == PACKET_TYPE_RANGING )
GregCr 0:03ec2f3bde8c 137 {
GregCr 0:03ec2f3bde8c 138 SetRangingRole( RADIO_RANGING_ROLE_SLAVE );
GregCr 0:03ec2f3bde8c 139 }
GregCr 0:03ec2f3bde8c 140 WriteCommand( RADIO_SET_RX, buf, 3 );
GregCr 0:03ec2f3bde8c 141 OperatingMode = MODE_RX;
GregCr 0:03ec2f3bde8c 142 }
GregCr 0:03ec2f3bde8c 143
GregCr 4:abf14b677777 144 void SX1280::SetRxDutyCycle( RadioTickSizes_t periodBase, uint16_t periodBaseCountRx, uint16_t periodBaseCountSleep )
GregCr 0:03ec2f3bde8c 145 {
GregCr 0:03ec2f3bde8c 146 uint8_t buf[5];
GregCr 0:03ec2f3bde8c 147
GregCr 4:abf14b677777 148 buf[0] = periodBase;
GregCr 4:abf14b677777 149 buf[1] = ( uint8_t )( ( periodBaseCountRx >> 8 ) & 0x00FF );
GregCr 4:abf14b677777 150 buf[2] = ( uint8_t )( periodBaseCountRx & 0x00FF );
GregCr 4:abf14b677777 151 buf[3] = ( uint8_t )( ( periodBaseCountSleep >> 8 ) & 0x00FF );
GregCr 4:abf14b677777 152 buf[4] = ( uint8_t )( periodBaseCountSleep & 0x00FF );
GregCr 0:03ec2f3bde8c 153 WriteCommand( RADIO_SET_RXDUTYCYCLE, buf, 5 );
GregCr 0:03ec2f3bde8c 154 OperatingMode = MODE_RX;
GregCr 0:03ec2f3bde8c 155 }
GregCr 0:03ec2f3bde8c 156
GregCr 0:03ec2f3bde8c 157 void SX1280::SetCad( void )
GregCr 0:03ec2f3bde8c 158 {
GregCr 0:03ec2f3bde8c 159 WriteCommand( RADIO_SET_CAD, 0, 0 );
GregCr 0:03ec2f3bde8c 160 OperatingMode = MODE_CAD;
GregCr 0:03ec2f3bde8c 161 }
GregCr 0:03ec2f3bde8c 162
GregCr 0:03ec2f3bde8c 163 void SX1280::SetTxContinuousWave( void )
GregCr 0:03ec2f3bde8c 164 {
GregCr 0:03ec2f3bde8c 165 WriteCommand( RADIO_SET_TXCONTINUOUSWAVE, 0, 0 );
GregCr 0:03ec2f3bde8c 166 }
GregCr 0:03ec2f3bde8c 167
GregCr 0:03ec2f3bde8c 168 void SX1280::SetTxContinuousPreamble( void )
GregCr 0:03ec2f3bde8c 169 {
GregCr 0:03ec2f3bde8c 170 WriteCommand( RADIO_SET_TXCONTINUOUSPREAMBLE, 0, 0 );
GregCr 0:03ec2f3bde8c 171 }
GregCr 0:03ec2f3bde8c 172
GregCr 0:03ec2f3bde8c 173 void SX1280::SetPacketType( RadioPacketTypes_t packetType )
GregCr 0:03ec2f3bde8c 174 {
GregCr 0:03ec2f3bde8c 175 // Save packet type internally to avoid questioning the radio
GregCr 0:03ec2f3bde8c 176 this->PacketType = packetType;
GregCr 0:03ec2f3bde8c 177
GregCr 0:03ec2f3bde8c 178 WriteCommand( RADIO_SET_PACKETTYPE, ( uint8_t* )&packetType, 1 );
GregCr 0:03ec2f3bde8c 179 }
GregCr 0:03ec2f3bde8c 180
GregCr 5:b4014e8b7be1 181 RadioPacketTypes_t SX1280::GetPacketType( bool returnLocalCopy )
GregCr 0:03ec2f3bde8c 182 {
GregCr 4:abf14b677777 183 RadioPacketTypes_t packetType = PACKET_TYPE_NONE;
GregCr 5:b4014e8b7be1 184 if( returnLocalCopy == false )
GregCr 4:abf14b677777 185 {
GregCr 4:abf14b677777 186 ReadCommand( RADIO_GET_PACKETTYPE, ( uint8_t* )&packetType, 1 );
GregCr 4:abf14b677777 187 if( this->PacketType != packetType )
GregCr 4:abf14b677777 188 {
GregCr 4:abf14b677777 189 this->PacketType = packetType;
GregCr 4:abf14b677777 190 }
GregCr 4:abf14b677777 191 }
GregCr 4:abf14b677777 192 else
GregCr 4:abf14b677777 193 {
GregCr 4:abf14b677777 194 packetType = this->PacketType;
GregCr 4:abf14b677777 195 }
GregCr 4:abf14b677777 196 return packetType;
GregCr 0:03ec2f3bde8c 197 }
GregCr 0:03ec2f3bde8c 198
GregCr 4:abf14b677777 199 void SX1280::SetRfFrequency( uint32_t rfFrequency )
GregCr 0:03ec2f3bde8c 200 {
GregCr 0:03ec2f3bde8c 201 uint8_t buf[3];
GregCr 0:03ec2f3bde8c 202 uint32_t freq = 0;
GregCr 0:03ec2f3bde8c 203
GregCr 4:abf14b677777 204 freq = ( uint32_t )( ( double )rfFrequency / ( double )FREQ_STEP );
GregCr 0:03ec2f3bde8c 205 buf[0] = ( uint8_t )( ( freq >> 16 ) & 0xFF );
GregCr 0:03ec2f3bde8c 206 buf[1] = ( uint8_t )( ( freq >> 8 ) & 0xFF );
GregCr 0:03ec2f3bde8c 207 buf[2] = ( uint8_t )( freq & 0xFF );
GregCr 0:03ec2f3bde8c 208 WriteCommand( RADIO_SET_RFFREQUENCY, buf, 3 );
GregCr 0:03ec2f3bde8c 209 }
GregCr 0:03ec2f3bde8c 210
GregCr 0:03ec2f3bde8c 211 void SX1280::SetTxParams( int8_t power, RadioRampTimes_t rampTime )
GregCr 0:03ec2f3bde8c 212 {
GregCr 0:03ec2f3bde8c 213 uint8_t buf[2];
GregCr 0:03ec2f3bde8c 214
GregCr 0:03ec2f3bde8c 215 // The power value to send on SPI/UART is in the range [0..31] and the
GregCr 0:03ec2f3bde8c 216 // physical output power is in the range [-18..13]dBm
GregCr 0:03ec2f3bde8c 217 buf[0] = power + 18;
GregCr 0:03ec2f3bde8c 218 buf[1] = ( uint8_t )rampTime;
GregCr 0:03ec2f3bde8c 219 WriteCommand( RADIO_SET_TXPARAMS, buf, 2 );
GregCr 0:03ec2f3bde8c 220 }
GregCr 0:03ec2f3bde8c 221
GregCr 0:03ec2f3bde8c 222 void SX1280::SetCadParams( RadioLoRaCadSymbols_t cadSymbolNum )
GregCr 0:03ec2f3bde8c 223 {
GregCr 0:03ec2f3bde8c 224 WriteCommand( RADIO_SET_CADPARAMS, ( uint8_t* )&cadSymbolNum, 1 );
GregCr 0:03ec2f3bde8c 225 OperatingMode = MODE_CAD;
GregCr 0:03ec2f3bde8c 226 }
GregCr 0:03ec2f3bde8c 227
GregCr 0:03ec2f3bde8c 228 void SX1280::SetBufferBaseAddresses( uint8_t txBaseAddress, uint8_t rxBaseAddress )
GregCr 0:03ec2f3bde8c 229 {
GregCr 0:03ec2f3bde8c 230 uint8_t buf[2];
GregCr 0:03ec2f3bde8c 231
GregCr 0:03ec2f3bde8c 232 buf[0] = txBaseAddress;
GregCr 0:03ec2f3bde8c 233 buf[1] = rxBaseAddress;
GregCr 0:03ec2f3bde8c 234 WriteCommand( RADIO_SET_BUFFERBASEADDRESS, buf, 2 );
GregCr 0:03ec2f3bde8c 235 }
GregCr 0:03ec2f3bde8c 236
GregCr 4:abf14b677777 237 void SX1280::SetModulationParams( ModulationParams_t *modParams )
GregCr 0:03ec2f3bde8c 238 {
GregCr 0:03ec2f3bde8c 239 uint8_t buf[3];
GregCr 0:03ec2f3bde8c 240
GregCr 0:03ec2f3bde8c 241 // Check if required configuration corresponds to the stored packet type
GregCr 0:03ec2f3bde8c 242 // If not, silently update radio packet type
GregCr 4:abf14b677777 243 if( this->PacketType != modParams->PacketType )
GregCr 0:03ec2f3bde8c 244 {
GregCr 4:abf14b677777 245 this->SetPacketType( modParams->PacketType );
GregCr 0:03ec2f3bde8c 246 }
GregCr 0:03ec2f3bde8c 247
GregCr 4:abf14b677777 248 switch( modParams->PacketType )
GregCr 0:03ec2f3bde8c 249 {
GregCr 0:03ec2f3bde8c 250 case PACKET_TYPE_GFSK:
GregCr 4:abf14b677777 251 buf[0] = modParams->Params.Gfsk.BitrateBandwidth;
GregCr 4:abf14b677777 252 buf[1] = modParams->Params.Gfsk.ModulationIndex;
GregCr 4:abf14b677777 253 buf[2] = modParams->Params.Gfsk.ModulationShaping;
GregCr 0:03ec2f3bde8c 254 break;
GregCr 0:03ec2f3bde8c 255 case PACKET_TYPE_LORA:
GregCr 0:03ec2f3bde8c 256 case PACKET_TYPE_RANGING:
GregCr 4:abf14b677777 257 buf[0] = modParams->Params.LoRa.SpreadingFactor;
GregCr 4:abf14b677777 258 buf[1] = modParams->Params.LoRa.Bandwidth;
GregCr 4:abf14b677777 259 buf[2] = modParams->Params.LoRa.CodingRate;
GregCr 4:abf14b677777 260 this->LoRaBandwidth = modParams->Params.LoRa.Bandwidth;
GregCr 0:03ec2f3bde8c 261 break;
GregCr 0:03ec2f3bde8c 262 case PACKET_TYPE_FLRC:
GregCr 4:abf14b677777 263 buf[0] = modParams->Params.Flrc.BitrateBandwidth;
GregCr 4:abf14b677777 264 buf[1] = modParams->Params.Flrc.CodingRate;
GregCr 4:abf14b677777 265 buf[2] = modParams->Params.Flrc.ModulationShaping;
GregCr 0:03ec2f3bde8c 266 break;
GregCr 0:03ec2f3bde8c 267 case PACKET_TYPE_BLE:
GregCr 4:abf14b677777 268 buf[0] = modParams->Params.Ble.BitrateBandwidth;
GregCr 4:abf14b677777 269 buf[1] = modParams->Params.Ble.ModulationIndex;
GregCr 4:abf14b677777 270 buf[2] = modParams->Params.Ble.ModulationShaping;
GregCr 0:03ec2f3bde8c 271 break;
GregCr 0:03ec2f3bde8c 272 case PACKET_TYPE_NONE:
GregCr 0:03ec2f3bde8c 273 buf[0] = NULL;
GregCr 0:03ec2f3bde8c 274 buf[1] = NULL;
GregCr 0:03ec2f3bde8c 275 buf[2] = NULL;
GregCr 0:03ec2f3bde8c 276 break;
GregCr 0:03ec2f3bde8c 277 }
GregCr 0:03ec2f3bde8c 278 WriteCommand( RADIO_SET_MODULATIONPARAMS, buf, 3 );
GregCr 0:03ec2f3bde8c 279 }
GregCr 0:03ec2f3bde8c 280
GregCr 0:03ec2f3bde8c 281 void SX1280::SetPacketParams( PacketParams_t *packetParams )
GregCr 0:03ec2f3bde8c 282 {
GregCr 0:03ec2f3bde8c 283 uint8_t buf[7];
GregCr 0:03ec2f3bde8c 284 // Check if required configuration corresponds to the stored packet type
GregCr 0:03ec2f3bde8c 285 // If not, silently update radio packet type
GregCr 0:03ec2f3bde8c 286 if( this->PacketType != packetParams->PacketType )
GregCr 0:03ec2f3bde8c 287 {
GregCr 0:03ec2f3bde8c 288 this->SetPacketType( packetParams->PacketType );
GregCr 0:03ec2f3bde8c 289 }
GregCr 0:03ec2f3bde8c 290
GregCr 0:03ec2f3bde8c 291 switch( packetParams->PacketType )
GregCr 0:03ec2f3bde8c 292 {
GregCr 0:03ec2f3bde8c 293 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 294 buf[0] = packetParams->Params.Gfsk.PreambleLength;
GregCr 0:03ec2f3bde8c 295 buf[1] = packetParams->Params.Gfsk.SyncWordLength;
GregCr 0:03ec2f3bde8c 296 buf[2] = packetParams->Params.Gfsk.SyncWordMatch;
GregCr 0:03ec2f3bde8c 297 buf[3] = packetParams->Params.Gfsk.HeaderType;
GregCr 0:03ec2f3bde8c 298 buf[4] = packetParams->Params.Gfsk.PayloadLength;
GregCr 0:03ec2f3bde8c 299 buf[5] = packetParams->Params.Gfsk.CrcLength;
GregCr 0:03ec2f3bde8c 300 buf[6] = packetParams->Params.Gfsk.Whitening;
GregCr 0:03ec2f3bde8c 301 break;
GregCr 0:03ec2f3bde8c 302 case PACKET_TYPE_LORA:
GregCr 0:03ec2f3bde8c 303 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 304 buf[0] = packetParams->Params.LoRa.PreambleLength;
GregCr 0:03ec2f3bde8c 305 buf[1] = packetParams->Params.LoRa.HeaderType;
GregCr 0:03ec2f3bde8c 306 buf[2] = packetParams->Params.LoRa.PayloadLength;
GregCr 4:abf14b677777 307 buf[3] = packetParams->Params.LoRa.Crc;
GregCr 0:03ec2f3bde8c 308 buf[4] = packetParams->Params.LoRa.InvertIQ;
GregCr 0:03ec2f3bde8c 309 buf[5] = NULL;
GregCr 0:03ec2f3bde8c 310 buf[6] = NULL;
GregCr 0:03ec2f3bde8c 311 break;
GregCr 0:03ec2f3bde8c 312 case PACKET_TYPE_FLRC:
GregCr 0:03ec2f3bde8c 313 buf[0] = packetParams->Params.Flrc.PreambleLength;
GregCr 0:03ec2f3bde8c 314 buf[1] = packetParams->Params.Flrc.SyncWordLength;
GregCr 0:03ec2f3bde8c 315 buf[2] = packetParams->Params.Flrc.SyncWordMatch;
GregCr 0:03ec2f3bde8c 316 buf[3] = packetParams->Params.Flrc.HeaderType;
GregCr 0:03ec2f3bde8c 317 buf[4] = packetParams->Params.Flrc.PayloadLength;
GregCr 0:03ec2f3bde8c 318 buf[5] = packetParams->Params.Flrc.CrcLength;
GregCr 0:03ec2f3bde8c 319 buf[6] = packetParams->Params.Flrc.Whitening;
GregCr 0:03ec2f3bde8c 320 break;
GregCr 0:03ec2f3bde8c 321 case PACKET_TYPE_BLE:
GregCr 0:03ec2f3bde8c 322 buf[0] = packetParams->Params.Ble.ConnectionState;
GregCr 4:abf14b677777 323 buf[1] = packetParams->Params.Ble.CrcLength;
GregCr 4:abf14b677777 324 buf[2] = packetParams->Params.Ble.BleTestPayload;
GregCr 0:03ec2f3bde8c 325 buf[3] = packetParams->Params.Ble.Whitening;
GregCr 0:03ec2f3bde8c 326 buf[4] = NULL;
GregCr 0:03ec2f3bde8c 327 buf[5] = NULL;
GregCr 0:03ec2f3bde8c 328 buf[6] = NULL;
GregCr 0:03ec2f3bde8c 329 break;
GregCr 0:03ec2f3bde8c 330 case PACKET_TYPE_NONE:
GregCr 0:03ec2f3bde8c 331 buf[0] = NULL;
GregCr 0:03ec2f3bde8c 332 buf[1] = NULL;
GregCr 0:03ec2f3bde8c 333 buf[2] = NULL;
GregCr 0:03ec2f3bde8c 334 buf[3] = NULL;
GregCr 0:03ec2f3bde8c 335 buf[4] = NULL;
GregCr 0:03ec2f3bde8c 336 buf[5] = NULL;
GregCr 0:03ec2f3bde8c 337 buf[6] = NULL;
GregCr 0:03ec2f3bde8c 338 break;
GregCr 0:03ec2f3bde8c 339 }
GregCr 0:03ec2f3bde8c 340 WriteCommand( RADIO_SET_PACKETPARAMS, buf, 7 );
GregCr 0:03ec2f3bde8c 341 }
GregCr 0:03ec2f3bde8c 342
GregCr 4:abf14b677777 343 void SX1280::ForcePreambleLength( RadioPreambleLengths_t preambleLength )
GregCr 4:abf14b677777 344 {
GregCr 4:abf14b677777 345 this->WriteRegister( REG_LR_PREAMBLELENGTH, ( this->ReadRegister( REG_LR_PREAMBLELENGTH ) & MASK_FORCE_PREAMBLELENGTH ) | preambleLength );
GregCr 4:abf14b677777 346 }
GregCr 4:abf14b677777 347
GregCr 4:abf14b677777 348 void SX1280::GetRxBufferStatus( uint8_t *rxPayloadLength, uint8_t *rxStartBufferPointer )
GregCr 0:03ec2f3bde8c 349 {
GregCr 0:03ec2f3bde8c 350 uint8_t status[2];
GregCr 0:03ec2f3bde8c 351
GregCr 0:03ec2f3bde8c 352 ReadCommand( RADIO_GET_RXBUFFERSTATUS, status, 2 );
GregCr 0:03ec2f3bde8c 353
GregCr 4:abf14b677777 354 // In case of LORA fixed header, the rxPayloadLength is obtained by reading
GregCr 0:03ec2f3bde8c 355 // the register REG_LR_PAYLOADLENGTH
GregCr 4:abf14b677777 356 if( ( this -> GetPacketType( true ) == PACKET_TYPE_LORA ) && ( ReadRegister( REG_LR_PACKETPARAMS ) >> 7 == 1 ) )
GregCr 0:03ec2f3bde8c 357 {
GregCr 4:abf14b677777 358 *rxPayloadLength = ReadRegister( REG_LR_PAYLOADLENGTH );
GregCr 0:03ec2f3bde8c 359 }
mverdy 10:c1b368a5052f 360 else if( this -> GetPacketType( true ) == PACKET_TYPE_BLE )
mverdy 10:c1b368a5052f 361 {
mverdy 10:c1b368a5052f 362 // In the case of BLE, the size returned in status[0] do not include the 2-byte length PDU header
mverdy 10:c1b368a5052f 363 // so it is added there
mverdy 10:c1b368a5052f 364 *rxPayloadLength = status[0] + 2;
mverdy 10:c1b368a5052f 365 }
GregCr 0:03ec2f3bde8c 366 else
GregCr 0:03ec2f3bde8c 367 {
GregCr 4:abf14b677777 368 *rxPayloadLength = status[0];
GregCr 0:03ec2f3bde8c 369 }
GregCr 0:03ec2f3bde8c 370
GregCr 0:03ec2f3bde8c 371 *rxStartBufferPointer = status[1];
GregCr 0:03ec2f3bde8c 372 }
GregCr 0:03ec2f3bde8c 373
GregCr 4:abf14b677777 374 void SX1280::GetPacketStatus( PacketStatus_t *packetStatus )
GregCr 0:03ec2f3bde8c 375 {
GregCr 0:03ec2f3bde8c 376 uint8_t status[5];
GregCr 0:03ec2f3bde8c 377
GregCr 0:03ec2f3bde8c 378 ReadCommand( RADIO_GET_PACKETSTATUS, status, 5 );
GregCr 0:03ec2f3bde8c 379
GregCr 4:abf14b677777 380 packetStatus->packetType = this -> GetPacketType( true );
GregCr 4:abf14b677777 381 switch( packetStatus->packetType )
GregCr 0:03ec2f3bde8c 382 {
GregCr 0:03ec2f3bde8c 383 case PACKET_TYPE_GFSK:
GregCr 4:abf14b677777 384 packetStatus->Gfsk.RssiSync = -( status[1] / 2 );
GregCr 0:03ec2f3bde8c 385
GregCr 4:abf14b677777 386 packetStatus->Gfsk.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01;
GregCr 4:abf14b677777 387 packetStatus->Gfsk.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01;
GregCr 4:abf14b677777 388 packetStatus->Gfsk.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01;
GregCr 4:abf14b677777 389 packetStatus->Gfsk.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01;
GregCr 4:abf14b677777 390 packetStatus->Gfsk.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01;
GregCr 4:abf14b677777 391 packetStatus->Gfsk.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01;
GregCr 4:abf14b677777 392 packetStatus->Gfsk.ErrorStatus.PacketControlerBusy = status[2] & 0x01;
GregCr 0:03ec2f3bde8c 393
GregCr 4:abf14b677777 394 packetStatus->Gfsk.TxRxStatus.RxNoAck = ( status[3] >> 5 ) & 0x01;
GregCr 4:abf14b677777 395 packetStatus->Gfsk.TxRxStatus.PacketSent = status[3] & 0x01;
GregCr 0:03ec2f3bde8c 396
GregCr 4:abf14b677777 397 packetStatus->Gfsk.SyncAddrStatus = status[4] & 0x07;
GregCr 0:03ec2f3bde8c 398 break;
GregCr 0:03ec2f3bde8c 399
GregCr 0:03ec2f3bde8c 400 case PACKET_TYPE_LORA:
GregCr 0:03ec2f3bde8c 401 case PACKET_TYPE_RANGING:
GregCr 4:abf14b677777 402 packetStatus->LoRa.RssiPkt = -( status[0] / 2 );
GregCr 4:abf14b677777 403 ( status[1] < 128 ) ? ( packetStatus->LoRa.SnrPkt = status[1] / 4 ) : ( packetStatus->LoRa.SnrPkt = ( ( status[1] - 256 ) /4 ) );
GregCr 0:03ec2f3bde8c 404 break;
GregCr 0:03ec2f3bde8c 405
GregCr 0:03ec2f3bde8c 406 case PACKET_TYPE_FLRC:
GregCr 4:abf14b677777 407 packetStatus->Flrc.RssiSync = -( status[1] / 2 );
GregCr 0:03ec2f3bde8c 408
GregCr 4:abf14b677777 409 packetStatus->Flrc.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01;
GregCr 4:abf14b677777 410 packetStatus->Flrc.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01;
GregCr 4:abf14b677777 411 packetStatus->Flrc.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01;
GregCr 4:abf14b677777 412 packetStatus->Flrc.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01;
GregCr 4:abf14b677777 413 packetStatus->Flrc.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01;
GregCr 4:abf14b677777 414 packetStatus->Flrc.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01;
GregCr 4:abf14b677777 415 packetStatus->Flrc.ErrorStatus.PacketControlerBusy = status[2] & 0x01;
GregCr 0:03ec2f3bde8c 416
GregCr 4:abf14b677777 417 packetStatus->Flrc.TxRxStatus.RxPid = ( status[3] >> 6 ) & 0x03;
GregCr 4:abf14b677777 418 packetStatus->Flrc.TxRxStatus.RxNoAck = ( status[3] >> 5 ) & 0x01;
GregCr 4:abf14b677777 419 packetStatus->Flrc.TxRxStatus.RxPidErr = ( status[3] >> 4 ) & 0x01;
GregCr 4:abf14b677777 420 packetStatus->Flrc.TxRxStatus.PacketSent = status[3] & 0x01;
GregCr 0:03ec2f3bde8c 421
GregCr 4:abf14b677777 422 packetStatus->Flrc.SyncAddrStatus = status[4] & 0x07;
GregCr 0:03ec2f3bde8c 423 break;
GregCr 0:03ec2f3bde8c 424
GregCr 0:03ec2f3bde8c 425 case PACKET_TYPE_BLE:
GregCr 4:abf14b677777 426 packetStatus->Ble.RssiSync = -( status[1] / 2 );
GregCr 0:03ec2f3bde8c 427
GregCr 4:abf14b677777 428 packetStatus->Ble.ErrorStatus.SyncError = ( status[2] >> 6 ) & 0x01;
GregCr 4:abf14b677777 429 packetStatus->Ble.ErrorStatus.LengthError = ( status[2] >> 5 ) & 0x01;
GregCr 4:abf14b677777 430 packetStatus->Ble.ErrorStatus.CrcError = ( status[2] >> 4 ) & 0x01;
GregCr 4:abf14b677777 431 packetStatus->Ble.ErrorStatus.AbortError = ( status[2] >> 3 ) & 0x01;
GregCr 4:abf14b677777 432 packetStatus->Ble.ErrorStatus.HeaderReceived = ( status[2] >> 2 ) & 0x01;
GregCr 4:abf14b677777 433 packetStatus->Ble.ErrorStatus.PacketReceived = ( status[2] >> 1 ) & 0x01;
GregCr 4:abf14b677777 434 packetStatus->Ble.ErrorStatus.PacketControlerBusy = status[2] & 0x01;
GregCr 0:03ec2f3bde8c 435
GregCr 4:abf14b677777 436 packetStatus->Ble.TxRxStatus.PacketSent = status[3] & 0x01;
GregCr 0:03ec2f3bde8c 437
GregCr 4:abf14b677777 438 packetStatus->Ble.SyncAddrStatus = status[4] & 0x07;
GregCr 0:03ec2f3bde8c 439 break;
GregCr 0:03ec2f3bde8c 440
GregCr 0:03ec2f3bde8c 441 case PACKET_TYPE_NONE:
GregCr 4:abf14b677777 442 // In that specific case, we set everything in the packetStatus to zeros
GregCr 0:03ec2f3bde8c 443 // and reset the packet type accordingly
GregCr 4:abf14b677777 444 memset( packetStatus, 0, sizeof( PacketStatus_t ) );
GregCr 4:abf14b677777 445 packetStatus->packetType = PACKET_TYPE_NONE;
GregCr 0:03ec2f3bde8c 446 break;
GregCr 0:03ec2f3bde8c 447 }
GregCr 0:03ec2f3bde8c 448 }
GregCr 0:03ec2f3bde8c 449
GregCr 0:03ec2f3bde8c 450 int8_t SX1280::GetRssiInst( void )
GregCr 0:03ec2f3bde8c 451 {
GregCr 0:03ec2f3bde8c 452 uint8_t raw = 0;
GregCr 0:03ec2f3bde8c 453
GregCr 0:03ec2f3bde8c 454 ReadCommand( RADIO_GET_RSSIINST, &raw, 1 );
GregCr 0:03ec2f3bde8c 455
GregCr 0:03ec2f3bde8c 456 return ( int8_t ) ( -raw / 2 );
GregCr 0:03ec2f3bde8c 457 }
GregCr 0:03ec2f3bde8c 458
GregCr 0:03ec2f3bde8c 459 void SX1280::SetDioIrqParams( uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask, uint16_t dio3Mask )
GregCr 0:03ec2f3bde8c 460 {
GregCr 0:03ec2f3bde8c 461 uint8_t buf[8];
GregCr 0:03ec2f3bde8c 462
GregCr 0:03ec2f3bde8c 463 buf[0] = ( uint8_t )( ( irqMask >> 8 ) & 0x00FF );
GregCr 0:03ec2f3bde8c 464 buf[1] = ( uint8_t )( irqMask & 0x00FF );
GregCr 0:03ec2f3bde8c 465 buf[2] = ( uint8_t )( ( dio1Mask >> 8 ) & 0x00FF );
GregCr 0:03ec2f3bde8c 466 buf[3] = ( uint8_t )( dio1Mask & 0x00FF );
GregCr 0:03ec2f3bde8c 467 buf[4] = ( uint8_t )( ( dio2Mask >> 8 ) & 0x00FF );
GregCr 0:03ec2f3bde8c 468 buf[5] = ( uint8_t )( dio2Mask & 0x00FF );
GregCr 0:03ec2f3bde8c 469 buf[6] = ( uint8_t )( ( dio3Mask >> 8 ) & 0x00FF );
GregCr 0:03ec2f3bde8c 470 buf[7] = ( uint8_t )( dio3Mask & 0x00FF );
GregCr 0:03ec2f3bde8c 471 WriteCommand( RADIO_SET_DIOIRQPARAMS, buf, 8 );
GregCr 0:03ec2f3bde8c 472 }
GregCr 0:03ec2f3bde8c 473
GregCr 0:03ec2f3bde8c 474 uint16_t SX1280::GetIrqStatus( void )
GregCr 0:03ec2f3bde8c 475 {
GregCr 0:03ec2f3bde8c 476 uint8_t irqStatus[2];
GregCr 0:03ec2f3bde8c 477 ReadCommand( RADIO_GET_IRQSTATUS, irqStatus, 2 );
GregCr 0:03ec2f3bde8c 478 return ( irqStatus[0] << 8 ) | irqStatus[1];
GregCr 0:03ec2f3bde8c 479 }
GregCr 0:03ec2f3bde8c 480
GregCr 4:abf14b677777 481 void SX1280::ClearIrqStatus( uint16_t irqMask )
GregCr 0:03ec2f3bde8c 482 {
GregCr 0:03ec2f3bde8c 483 uint8_t buf[2];
GregCr 0:03ec2f3bde8c 484
GregCr 4:abf14b677777 485 buf[0] = ( uint8_t )( ( ( uint16_t )irqMask >> 8 ) & 0x00FF );
GregCr 4:abf14b677777 486 buf[1] = ( uint8_t )( ( uint16_t )irqMask & 0x00FF );
GregCr 0:03ec2f3bde8c 487 WriteCommand( RADIO_CLR_IRQSTATUS, buf, 2 );
GregCr 0:03ec2f3bde8c 488 }
GregCr 0:03ec2f3bde8c 489
GregCr 0:03ec2f3bde8c 490 void SX1280::Calibrate( CalibrationParams_t calibParam )
GregCr 0:03ec2f3bde8c 491 {
GregCr 0:03ec2f3bde8c 492 uint8_t cal = ( calibParam.ADCBulkPEnable << 5 ) |
GregCr 0:03ec2f3bde8c 493 ( calibParam.ADCBulkNEnable << 4 ) |
GregCr 0:03ec2f3bde8c 494 ( calibParam.ADCPulseEnable << 3 ) |
GregCr 0:03ec2f3bde8c 495 ( calibParam.PLLEnable << 2 ) |
GregCr 0:03ec2f3bde8c 496 ( calibParam.RC13MEnable << 1 ) |
GregCr 0:03ec2f3bde8c 497 ( calibParam.RC64KEnable );
GregCr 0:03ec2f3bde8c 498 WriteCommand( RADIO_CALIBRATE, &cal, 1 );
GregCr 0:03ec2f3bde8c 499 }
GregCr 0:03ec2f3bde8c 500
GregCr 0:03ec2f3bde8c 501 void SX1280::SetRegulatorMode( RadioRegulatorModes_t mode )
GregCr 0:03ec2f3bde8c 502 {
GregCr 0:03ec2f3bde8c 503 WriteCommand( RADIO_SET_REGULATORMODE, ( uint8_t* )&mode, 1 );
GregCr 0:03ec2f3bde8c 504 }
GregCr 0:03ec2f3bde8c 505
GregCr 0:03ec2f3bde8c 506 void SX1280::SetSaveContext( void )
GregCr 0:03ec2f3bde8c 507 {
GregCr 0:03ec2f3bde8c 508 WriteCommand( RADIO_SET_SAVECONTEXT, 0, 0 );
GregCr 0:03ec2f3bde8c 509 }
GregCr 0:03ec2f3bde8c 510
GregCr 0:03ec2f3bde8c 511 void SX1280::SetAutoTx( uint16_t time )
GregCr 0:03ec2f3bde8c 512 {
GregCr 0:03ec2f3bde8c 513 uint16_t compensatedTime = time - ( uint16_t )AUTO_TX_OFFSET;
GregCr 0:03ec2f3bde8c 514 uint8_t buf[2];
GregCr 0:03ec2f3bde8c 515
GregCr 0:03ec2f3bde8c 516 buf[0] = ( uint8_t )( ( compensatedTime >> 8 ) & 0x00FF );
GregCr 0:03ec2f3bde8c 517 buf[1] = ( uint8_t )( compensatedTime & 0x00FF );
GregCr 0:03ec2f3bde8c 518 WriteCommand( RADIO_SET_AUTOTX, buf, 2 );
GregCr 0:03ec2f3bde8c 519 }
GregCr 0:03ec2f3bde8c 520
GregCr 11:d60df50e108f 521 void SX1280::StopAutoTx( void )
GregCr 11:d60df50e108f 522 {
GregCr 11:d60df50e108f 523 uint8_t buf[2] = {0x00, 0x00};
GregCr 11:d60df50e108f 524 WriteCommand( RADIO_SET_AUTOTX, buf, 2 );
GregCr 11:d60df50e108f 525 }
GregCr 11:d60df50e108f 526
GregCr 0:03ec2f3bde8c 527 void SX1280::SetAutoFs( bool enableAutoFs )
GregCr 0:03ec2f3bde8c 528 {
Matthieu Verdy 7:88669efa3779 529 WriteCommand( RADIO_SET_AUTOFS, ( uint8_t * )&enableAutoFs, 1 );
GregCr 0:03ec2f3bde8c 530 }
GregCr 0:03ec2f3bde8c 531
GregCr 0:03ec2f3bde8c 532 void SX1280::SetLongPreamble( bool enable )
GregCr 0:03ec2f3bde8c 533 {
GregCr 0:03ec2f3bde8c 534 WriteCommand( RADIO_SET_LONGPREAMBLE, ( uint8_t * )&enable, 1 );
GregCr 0:03ec2f3bde8c 535 }
GregCr 0:03ec2f3bde8c 536
GregCr 0:03ec2f3bde8c 537 void SX1280::SetPayload( uint8_t *buffer, uint8_t size, uint8_t offset )
GregCr 0:03ec2f3bde8c 538 {
GregCr 2:62b6e0f59f0f 539 WriteBuffer( offset, buffer, size );
GregCr 0:03ec2f3bde8c 540 }
GregCr 0:03ec2f3bde8c 541
GregCr 0:03ec2f3bde8c 542 uint8_t SX1280::GetPayload( uint8_t *buffer, uint8_t *size , uint8_t maxSize )
GregCr 0:03ec2f3bde8c 543 {
GregCr 0:03ec2f3bde8c 544 uint8_t offset;
GregCr 0:03ec2f3bde8c 545
GregCr 0:03ec2f3bde8c 546 GetRxBufferStatus( size, &offset );
GregCr 0:03ec2f3bde8c 547 if( *size > maxSize )
GregCr 0:03ec2f3bde8c 548 {
GregCr 0:03ec2f3bde8c 549 return 1;
GregCr 0:03ec2f3bde8c 550 }
GregCr 0:03ec2f3bde8c 551 ReadBuffer( offset, buffer, *size );
GregCr 0:03ec2f3bde8c 552 return 0;
GregCr 0:03ec2f3bde8c 553 }
GregCr 0:03ec2f3bde8c 554
GregCr 0:03ec2f3bde8c 555 void SX1280::SendPayload( uint8_t *payload, uint8_t size, TickTime_t timeout, uint8_t offset )
GregCr 0:03ec2f3bde8c 556 {
GregCr 0:03ec2f3bde8c 557 SetPayload( payload, size, offset );
GregCr 0:03ec2f3bde8c 558 SetTx( timeout );
GregCr 0:03ec2f3bde8c 559 }
GregCr 0:03ec2f3bde8c 560
GregCr 0:03ec2f3bde8c 561 uint8_t SX1280::SetSyncWord( uint8_t syncWordIdx, uint8_t *syncWord )
GregCr 0:03ec2f3bde8c 562 {
GregCr 0:03ec2f3bde8c 563 uint16_t addr;
GregCr 0:03ec2f3bde8c 564 uint8_t syncwordSize = 0;
GregCr 0:03ec2f3bde8c 565
GregCr 4:abf14b677777 566 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 567 {
GregCr 0:03ec2f3bde8c 568 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 569 syncwordSize = 5;
GregCr 0:03ec2f3bde8c 570 switch( syncWordIdx )
GregCr 0:03ec2f3bde8c 571 {
GregCr 0:03ec2f3bde8c 572 case 1:
GregCr 0:03ec2f3bde8c 573 addr = REG_LR_SYNCWORDBASEADDRESS1;
GregCr 0:03ec2f3bde8c 574 break;
GregCr 0:03ec2f3bde8c 575 case 2:
GregCr 0:03ec2f3bde8c 576 addr = REG_LR_SYNCWORDBASEADDRESS2;
GregCr 0:03ec2f3bde8c 577 break;
GregCr 0:03ec2f3bde8c 578 case 3:
GregCr 0:03ec2f3bde8c 579 addr = REG_LR_SYNCWORDBASEADDRESS3;
GregCr 0:03ec2f3bde8c 580 break;
GregCr 0:03ec2f3bde8c 581 default:
GregCr 0:03ec2f3bde8c 582 return 1;
GregCr 0:03ec2f3bde8c 583 }
GregCr 0:03ec2f3bde8c 584 break;
GregCr 0:03ec2f3bde8c 585 case PACKET_TYPE_FLRC:
GregCr 0:03ec2f3bde8c 586 // For FLRC packet type, the SyncWord is one byte shorter and
GregCr 0:03ec2f3bde8c 587 // the base address is shifted by one byte
GregCr 0:03ec2f3bde8c 588 syncwordSize = 4;
GregCr 0:03ec2f3bde8c 589 switch( syncWordIdx )
GregCr 0:03ec2f3bde8c 590 {
GregCr 0:03ec2f3bde8c 591 case 1:
GregCr 0:03ec2f3bde8c 592 addr = REG_LR_SYNCWORDBASEADDRESS1 + 1;
GregCr 0:03ec2f3bde8c 593 break;
GregCr 0:03ec2f3bde8c 594 case 2:
GregCr 0:03ec2f3bde8c 595 addr = REG_LR_SYNCWORDBASEADDRESS2 + 1;
GregCr 0:03ec2f3bde8c 596 break;
GregCr 0:03ec2f3bde8c 597 case 3:
GregCr 0:03ec2f3bde8c 598 addr = REG_LR_SYNCWORDBASEADDRESS3 + 1;
GregCr 0:03ec2f3bde8c 599 break;
GregCr 0:03ec2f3bde8c 600 default:
GregCr 0:03ec2f3bde8c 601 return 1;
GregCr 0:03ec2f3bde8c 602 }
GregCr 0:03ec2f3bde8c 603 break;
GregCr 0:03ec2f3bde8c 604 case PACKET_TYPE_BLE:
GregCr 0:03ec2f3bde8c 605 // For Ble packet type, only the first SyncWord is used and its
GregCr 0:03ec2f3bde8c 606 // address is shifted by one byte
GregCr 0:03ec2f3bde8c 607 syncwordSize = 4;
GregCr 0:03ec2f3bde8c 608 switch( syncWordIdx )
GregCr 0:03ec2f3bde8c 609 {
GregCr 0:03ec2f3bde8c 610 case 1:
GregCr 0:03ec2f3bde8c 611 addr = REG_LR_SYNCWORDBASEADDRESS1 + 1;
GregCr 0:03ec2f3bde8c 612 break;
GregCr 0:03ec2f3bde8c 613 default:
GregCr 0:03ec2f3bde8c 614 return 1;
GregCr 0:03ec2f3bde8c 615 }
GregCr 0:03ec2f3bde8c 616 break;
GregCr 0:03ec2f3bde8c 617 default:
GregCr 0:03ec2f3bde8c 618 return 1;
GregCr 0:03ec2f3bde8c 619 }
GregCr 0:03ec2f3bde8c 620 WriteRegister( addr, syncWord, syncwordSize );
GregCr 0:03ec2f3bde8c 621 return 0;
GregCr 0:03ec2f3bde8c 622 }
GregCr 0:03ec2f3bde8c 623
GregCr 0:03ec2f3bde8c 624 void SX1280::SetSyncWordErrorTolerance( uint8_t ErrorBits )
GregCr 0:03ec2f3bde8c 625 {
GregCr 0:03ec2f3bde8c 626 ErrorBits = ( ReadRegister( REG_LR_SYNCWORDTOLERANCE ) & 0xF0 ) | ( ErrorBits & 0x0F );
GregCr 0:03ec2f3bde8c 627 WriteRegister( REG_LR_SYNCWORDTOLERANCE, ErrorBits );
GregCr 0:03ec2f3bde8c 628 }
GregCr 0:03ec2f3bde8c 629
GregCr 4:abf14b677777 630 uint8_t SX1280::SetCrcSeed( uint8_t *seed )
GregCr 0:03ec2f3bde8c 631 {
GregCr 4:abf14b677777 632 uint8_t updated = 0;
GregCr 4:abf14b677777 633 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 634 {
GregCr 0:03ec2f3bde8c 635 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 636 case PACKET_TYPE_FLRC:
GregCr 4:abf14b677777 637 WriteRegister( REG_LR_CRCSEEDBASEADDR, seed, 2 );
GregCr 4:abf14b677777 638 updated = 1;
GregCr 4:abf14b677777 639 break;
GregCr 4:abf14b677777 640 case PACKET_TYPE_BLE:
GregCr 4:abf14b677777 641 this->WriteRegister(0x9c7, seed[2] );
GregCr 4:abf14b677777 642 this->WriteRegister(0x9c8, seed[1] );
GregCr 4:abf14b677777 643 this->WriteRegister(0x9c9, seed[0] );
GregCr 4:abf14b677777 644 updated = 1;
GregCr 0:03ec2f3bde8c 645 break;
GregCr 0:03ec2f3bde8c 646 default:
GregCr 0:03ec2f3bde8c 647 break;
GregCr 0:03ec2f3bde8c 648 }
GregCr 4:abf14b677777 649 return updated;
GregCr 0:03ec2f3bde8c 650 }
GregCr 0:03ec2f3bde8c 651
mverdy 10:c1b368a5052f 652 void SX1280::SetBleAccessAddress( uint32_t accessAddress )
mverdy 10:c1b368a5052f 653 {
mverdy 10:c1b368a5052f 654 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS, ( accessAddress >> 24 ) & 0x000000FF );
mverdy 10:c1b368a5052f 655 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS + 1, ( accessAddress >> 16 ) & 0x000000FF );
mverdy 10:c1b368a5052f 656 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS + 2, ( accessAddress >> 8 ) & 0x000000FF );
mverdy 10:c1b368a5052f 657 this->WriteRegister( REG_LR_BLE_ACCESS_ADDRESS + 3, accessAddress & 0x000000FF );
mverdy 10:c1b368a5052f 658 }
mverdy 10:c1b368a5052f 659
mverdy 10:c1b368a5052f 660 void SX1280::SetBleAdvertizerAccessAddress( void )
mverdy 10:c1b368a5052f 661 {
mverdy 10:c1b368a5052f 662 this->SetBleAccessAddress( BLE_ADVERTIZER_ACCESS_ADDRESS );
mverdy 10:c1b368a5052f 663 }
mverdy 10:c1b368a5052f 664
GregCr 0:03ec2f3bde8c 665 void SX1280::SetCrcPolynomial( uint16_t polynomial )
GregCr 0:03ec2f3bde8c 666 {
GregCr 0:03ec2f3bde8c 667 uint8_t val[2];
GregCr 0:03ec2f3bde8c 668
GregCr 0:03ec2f3bde8c 669 val[0] = ( uint8_t )( polynomial >> 8 ) & 0xFF;
GregCr 0:03ec2f3bde8c 670 val[1] = ( uint8_t )( polynomial & 0xFF );
GregCr 0:03ec2f3bde8c 671
GregCr 4:abf14b677777 672 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 673 {
GregCr 0:03ec2f3bde8c 674 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 675 case PACKET_TYPE_FLRC:
GregCr 0:03ec2f3bde8c 676 WriteRegister( REG_LR_CRCPOLYBASEADDR, val, 2 );
GregCr 0:03ec2f3bde8c 677 break;
GregCr 0:03ec2f3bde8c 678 default:
GregCr 0:03ec2f3bde8c 679 break;
GregCr 0:03ec2f3bde8c 680 }
GregCr 0:03ec2f3bde8c 681 }
GregCr 0:03ec2f3bde8c 682
GregCr 0:03ec2f3bde8c 683 void SX1280::SetWhiteningSeed( uint8_t seed )
GregCr 0:03ec2f3bde8c 684 {
GregCr 4:abf14b677777 685 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 686 {
GregCr 0:03ec2f3bde8c 687 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 688 case PACKET_TYPE_FLRC:
GregCr 0:03ec2f3bde8c 689 case PACKET_TYPE_BLE:
GregCr 0:03ec2f3bde8c 690 WriteRegister( REG_LR_WHITSEEDBASEADDR, seed );
GregCr 0:03ec2f3bde8c 691 break;
GregCr 0:03ec2f3bde8c 692 default:
GregCr 0:03ec2f3bde8c 693 break;
GregCr 0:03ec2f3bde8c 694 }
GregCr 0:03ec2f3bde8c 695 }
GregCr 0:03ec2f3bde8c 696
mverdy 12:c4f110f3fe3e 697 void SX1280::EnableManualGain( void )
mverdy 12:c4f110f3fe3e 698 {
mverdy 12:c4f110f3fe3e 699 this->WriteRegister( REG_ENABLE_MANUAL_GAIN_CONTROL, this->ReadRegister( REG_ENABLE_MANUAL_GAIN_CONTROL ) | MASK_MANUAL_GAIN_CONTROL );
mverdy 12:c4f110f3fe3e 700 this->WriteRegister( REG_DEMOD_DETECTION, this->ReadRegister( REG_DEMOD_DETECTION ) & MASK_DEMOD_DETECTION );
mverdy 12:c4f110f3fe3e 701 }
mverdy 12:c4f110f3fe3e 702
mverdy 12:c4f110f3fe3e 703 void SX1280::DisableManualGain( void )
mverdy 12:c4f110f3fe3e 704 {
mverdy 12:c4f110f3fe3e 705 this->WriteRegister( REG_ENABLE_MANUAL_GAIN_CONTROL, this->ReadRegister( REG_ENABLE_MANUAL_GAIN_CONTROL ) & (~MASK_MANUAL_GAIN_CONTROL) );
mverdy 12:c4f110f3fe3e 706 this->WriteRegister( REG_DEMOD_DETECTION, this->ReadRegister( REG_DEMOD_DETECTION ) | (~MASK_DEMOD_DETECTION) );
mverdy 12:c4f110f3fe3e 707 }
mverdy 12:c4f110f3fe3e 708
mverdy 12:c4f110f3fe3e 709 void SX1280::SetManualGainValue( uint8_t gain )
mverdy 12:c4f110f3fe3e 710 {
mverdy 12:c4f110f3fe3e 711 this->WriteRegister( REG_MANUAL_GAIN_VALUE, ( this->ReadRegister( REG_MANUAL_GAIN_VALUE ) & MASK_MANUAL_GAIN_VALUE ) | gain );
mverdy 12:c4f110f3fe3e 712 }
mverdy 12:c4f110f3fe3e 713
mverdy 12:c4f110f3fe3e 714 void SX1280::SetLNAGainSetting( const RadioLnaSettings_t lnaSetting )
mverdy 12:c4f110f3fe3e 715 {
mverdy 12:c4f110f3fe3e 716 switch(lnaSetting)
mverdy 12:c4f110f3fe3e 717 {
mverdy 12:c4f110f3fe3e 718 case LNA_HIGH_SENSITIVITY_MODE:
mverdy 12:c4f110f3fe3e 719 {
mverdy 12:c4f110f3fe3e 720 this->WriteRegister( REG_LNA_REGIME, this->ReadRegister( REG_LNA_REGIME ) | MASK_LNA_REGIME );
mverdy 12:c4f110f3fe3e 721 break;
mverdy 12:c4f110f3fe3e 722 }
mverdy 12:c4f110f3fe3e 723 case LNA_LOW_POWER_MODE:
mverdy 12:c4f110f3fe3e 724 {
mverdy 12:c4f110f3fe3e 725 this->WriteRegister( REG_LNA_REGIME, this->ReadRegister( REG_LNA_REGIME ) & ~MASK_LNA_REGIME );
mverdy 12:c4f110f3fe3e 726 break;
mverdy 12:c4f110f3fe3e 727 }
mverdy 12:c4f110f3fe3e 728 }
mverdy 12:c4f110f3fe3e 729 }
mverdy 12:c4f110f3fe3e 730
GregCr 0:03ec2f3bde8c 731 void SX1280::SetRangingIdLength( RadioRangingIdCheckLengths_t length )
GregCr 0:03ec2f3bde8c 732 {
GregCr 4:abf14b677777 733 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 734 {
GregCr 0:03ec2f3bde8c 735 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 736 WriteRegister( REG_LR_RANGINGIDCHECKLENGTH, ( ( ( ( uint8_t )length ) & 0x03 ) << 6 ) | ( ReadRegister( REG_LR_RANGINGIDCHECKLENGTH ) & 0x3F ) );
GregCr 0:03ec2f3bde8c 737 break;
GregCr 0:03ec2f3bde8c 738 default:
GregCr 0:03ec2f3bde8c 739 break;
GregCr 0:03ec2f3bde8c 740 }
GregCr 0:03ec2f3bde8c 741 }
GregCr 0:03ec2f3bde8c 742
GregCr 0:03ec2f3bde8c 743 void SX1280::SetDeviceRangingAddress( uint32_t address )
GregCr 0:03ec2f3bde8c 744 {
GregCr 0:03ec2f3bde8c 745 uint8_t addrArray[] = { address >> 24, address >> 16, address >> 8, address };
GregCr 0:03ec2f3bde8c 746
GregCr 4:abf14b677777 747 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 748 {
GregCr 0:03ec2f3bde8c 749 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 750 WriteRegister( REG_LR_DEVICERANGINGADDR, addrArray, 4 );
GregCr 0:03ec2f3bde8c 751 break;
GregCr 0:03ec2f3bde8c 752 default:
GregCr 0:03ec2f3bde8c 753 break;
GregCr 0:03ec2f3bde8c 754 }
GregCr 0:03ec2f3bde8c 755 }
GregCr 0:03ec2f3bde8c 756
GregCr 0:03ec2f3bde8c 757 void SX1280::SetRangingRequestAddress( uint32_t address )
GregCr 0:03ec2f3bde8c 758 {
GregCr 0:03ec2f3bde8c 759 uint8_t addrArray[] = { address >> 24, address >> 16, address >> 8, address };
GregCr 0:03ec2f3bde8c 760
GregCr 4:abf14b677777 761 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 762 {
GregCr 0:03ec2f3bde8c 763 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 764 WriteRegister( REG_LR_REQUESTRANGINGADDR, addrArray, 4 );
GregCr 0:03ec2f3bde8c 765 break;
GregCr 0:03ec2f3bde8c 766 default:
GregCr 0:03ec2f3bde8c 767 break;
GregCr 0:03ec2f3bde8c 768 }
GregCr 0:03ec2f3bde8c 769 }
GregCr 0:03ec2f3bde8c 770
GregCr 0:03ec2f3bde8c 771 double SX1280::GetRangingResult( RadioRangingResultTypes_t resultType )
GregCr 0:03ec2f3bde8c 772 {
GregCr 0:03ec2f3bde8c 773 uint32_t valLsb = 0;
GregCr 0:03ec2f3bde8c 774 double val = 0.0;
GregCr 0:03ec2f3bde8c 775
GregCr 4:abf14b677777 776 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 777 {
GregCr 0:03ec2f3bde8c 778 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 779 this->SetStandby( STDBY_XOSC );
GregCr 0:03ec2f3bde8c 780 this->WriteRegister( 0x97F, this->ReadRegister( 0x97F ) | ( 1 << 1 ) ); // enable LORA modem clock
GregCr 0:03ec2f3bde8c 781 WriteRegister( REG_LR_RANGINGRESULTCONFIG, ( ReadRegister( REG_LR_RANGINGRESULTCONFIG ) & MASK_RANGINGMUXSEL ) | ( ( ( ( uint8_t )resultType ) & 0x03 ) << 4 ) );
GregCr 0:03ec2f3bde8c 782 valLsb = ( ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR ) << 16 ) | ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR + 1 ) << 8 ) | ( ReadRegister( REG_LR_RANGINGRESULTBASEADDR + 2 ) ) );
GregCr 0:03ec2f3bde8c 783 this->SetStandby( STDBY_RC );
GregCr 0:03ec2f3bde8c 784
GregCr 0:03ec2f3bde8c 785 // Convertion from LSB to distance. For explanation on the formula, refer to Datasheet of SX1280
GregCr 0:03ec2f3bde8c 786 switch( resultType )
GregCr 0:03ec2f3bde8c 787 {
GregCr 0:03ec2f3bde8c 788 case RANGING_RESULT_RAW:
GregCr 0:03ec2f3bde8c 789 // Convert the ranging LSB to distance in meter
GregCr 0:03ec2f3bde8c 790 // The theoretical conversion from register value to distance [m] is given by:
GregCr 6:057a5290df98 791 // distance [m] = ( complement2( register ) * 150 ) / ( 2^12 * bandwidth[MHz] ) )
GregCr 0:03ec2f3bde8c 792 // The API provide BW in [Hz] so the implemented formula is complement2( register ) / bandwidth[Hz] * A,
GregCr 0:03ec2f3bde8c 793 // where A = 150 / (2^12 / 1e6) = 36621.09
GregCr 0:03ec2f3bde8c 794 val = ( double )complement2( valLsb, 24 ) / ( double )this->GetLoRaBandwidth( ) * 36621.09375;
GregCr 0:03ec2f3bde8c 795 break;
GregCr 0:03ec2f3bde8c 796
GregCr 0:03ec2f3bde8c 797 case RANGING_RESULT_AVERAGED:
GregCr 0:03ec2f3bde8c 798 case RANGING_RESULT_DEBIASED:
GregCr 0:03ec2f3bde8c 799 case RANGING_RESULT_FILTERED:
GregCr 0:03ec2f3bde8c 800 val = ( double )valLsb * 20.0 / 100.0;
GregCr 0:03ec2f3bde8c 801 break;
GregCr 0:03ec2f3bde8c 802 default:
GregCr 0:03ec2f3bde8c 803 val = 0.0;
GregCr 0:03ec2f3bde8c 804 }
GregCr 0:03ec2f3bde8c 805 break;
GregCr 0:03ec2f3bde8c 806 default:
GregCr 0:03ec2f3bde8c 807 break;
GregCr 0:03ec2f3bde8c 808 }
GregCr 0:03ec2f3bde8c 809 return val;
GregCr 0:03ec2f3bde8c 810 }
GregCr 0:03ec2f3bde8c 811
mverdy 12:c4f110f3fe3e 812 uint8_t SX1280::GetRangingPowerDeltaThresholdIndicator( void )
mverdy 12:c4f110f3fe3e 813 {
mverdy 12:c4f110f3fe3e 814 SetStandby( STDBY_XOSC );
mverdy 12:c4f110f3fe3e 815 WriteRegister( 0x97F, ReadRegister( 0x97F ) | ( 1 << 1 ) ); // enable LoRa modem clock
mverdy 12:c4f110f3fe3e 816 WriteRegister( REG_LR_RANGINGRESULTCONFIG, ( ReadRegister( REG_LR_RANGINGRESULTCONFIG ) & MASK_RANGINGMUXSEL ) | ( ( ( ( uint8_t )RANGING_RESULT_RAW ) & 0x03 ) << 4 ) ); // Select raw results
mverdy 12:c4f110f3fe3e 817 return ReadRegister( REG_RANGING_RSSI );
mverdy 12:c4f110f3fe3e 818 }
mverdy 12:c4f110f3fe3e 819
GregCr 0:03ec2f3bde8c 820 void SX1280::SetRangingCalibration( uint16_t cal )
GregCr 0:03ec2f3bde8c 821 {
GregCr 4:abf14b677777 822 switch( GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 823 {
GregCr 0:03ec2f3bde8c 824 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 825 WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL, ( uint8_t )( ( cal >> 8 ) & 0xFF ) );
GregCr 0:03ec2f3bde8c 826 WriteRegister( REG_LR_RANGINGRERXTXDELAYCAL + 1, ( uint8_t )( ( cal ) & 0xFF ) );
GregCr 0:03ec2f3bde8c 827 break;
GregCr 0:03ec2f3bde8c 828 default:
GregCr 0:03ec2f3bde8c 829 break;
GregCr 0:03ec2f3bde8c 830 }
GregCr 0:03ec2f3bde8c 831 }
GregCr 0:03ec2f3bde8c 832
GregCr 0:03ec2f3bde8c 833 void SX1280::RangingClearFilterResult( void )
GregCr 0:03ec2f3bde8c 834 {
GregCr 0:03ec2f3bde8c 835 uint8_t regVal = ReadRegister( REG_LR_RANGINGRESULTCLEARREG );
GregCr 0:03ec2f3bde8c 836
GregCr 0:03ec2f3bde8c 837 // To clear result, set bit 5 to 1 then to 0
GregCr 0:03ec2f3bde8c 838 WriteRegister( REG_LR_RANGINGRESULTCLEARREG, regVal | ( 1 << 5 ) );
GregCr 0:03ec2f3bde8c 839 WriteRegister( REG_LR_RANGINGRESULTCLEARREG, regVal & ( ~( 1 << 5 ) ) );
GregCr 0:03ec2f3bde8c 840 }
GregCr 0:03ec2f3bde8c 841
GregCr 0:03ec2f3bde8c 842 void SX1280::RangingSetFilterNumSamples( uint8_t num )
GregCr 0:03ec2f3bde8c 843 {
GregCr 0:03ec2f3bde8c 844 // Silently set 8 as minimum value
GregCr 0:03ec2f3bde8c 845 WriteRegister( REG_LR_RANGINGFILTERWINDOWSIZE, ( num < DEFAULT_RANGING_FILTER_SIZE ) ? DEFAULT_RANGING_FILTER_SIZE : num );
GregCr 0:03ec2f3bde8c 846 }
GregCr 0:03ec2f3bde8c 847
GregCr 0:03ec2f3bde8c 848 void SX1280::SetRangingRole( RadioRangingRoles_t role )
GregCr 0:03ec2f3bde8c 849 {
GregCr 0:03ec2f3bde8c 850 uint8_t buf[1];
GregCr 0:03ec2f3bde8c 851
GregCr 0:03ec2f3bde8c 852 buf[0] = role;
GregCr 0:03ec2f3bde8c 853 WriteCommand( RADIO_SET_RANGING_ROLE, &buf[0], 1 );
GregCr 0:03ec2f3bde8c 854 }
GregCr 0:03ec2f3bde8c 855
GregCr 0:03ec2f3bde8c 856 double SX1280::GetFrequencyError( )
GregCr 0:03ec2f3bde8c 857 {
GregCr 0:03ec2f3bde8c 858 uint8_t efeRaw[3] = {0};
GregCr 0:03ec2f3bde8c 859 uint32_t efe = 0;
GregCr 0:03ec2f3bde8c 860 double efeHz = 0.0;
GregCr 0:03ec2f3bde8c 861
GregCr 4:abf14b677777 862 switch( this->GetPacketType( true ) )
GregCr 0:03ec2f3bde8c 863 {
GregCr 0:03ec2f3bde8c 864 case PACKET_TYPE_LORA:
GregCr 0:03ec2f3bde8c 865 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 866 efeRaw[0] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB );
GregCr 0:03ec2f3bde8c 867 efeRaw[1] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB + 1 );
GregCr 0:03ec2f3bde8c 868 efeRaw[2] = this->ReadRegister( REG_LR_ESTIMATED_FREQUENCY_ERROR_MSB + 2 );
GregCr 0:03ec2f3bde8c 869 efe = ( efeRaw[0]<<16 ) | ( efeRaw[1]<<8 ) | efeRaw[2];
GregCr 0:03ec2f3bde8c 870 efe &= REG_LR_ESTIMATED_FREQUENCY_ERROR_MASK;
GregCr 0:03ec2f3bde8c 871
GregCr 0:03ec2f3bde8c 872 efeHz = 1.55 * ( double )complement2( efe, 20 ) / ( 1600.0 / ( double )this->GetLoRaBandwidth( ) * 1000.0 );
GregCr 0:03ec2f3bde8c 873 break;
GregCr 0:03ec2f3bde8c 874
GregCr 0:03ec2f3bde8c 875 case PACKET_TYPE_NONE:
GregCr 0:03ec2f3bde8c 876 case PACKET_TYPE_BLE:
GregCr 0:03ec2f3bde8c 877 case PACKET_TYPE_FLRC:
GregCr 0:03ec2f3bde8c 878 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 879 break;
GregCr 0:03ec2f3bde8c 880 }
GregCr 0:03ec2f3bde8c 881
GregCr 0:03ec2f3bde8c 882 return efeHz;
GregCr 0:03ec2f3bde8c 883 }
GregCr 0:03ec2f3bde8c 884
GregCr 0:03ec2f3bde8c 885 void SX1280::SetPollingMode( void )
GregCr 0:03ec2f3bde8c 886 {
GregCr 0:03ec2f3bde8c 887 this->PollingMode = true;
GregCr 0:03ec2f3bde8c 888 }
GregCr 0:03ec2f3bde8c 889
GregCr 0:03ec2f3bde8c 890 int32_t SX1280::complement2( const uint32_t num, const uint8_t bitCnt )
GregCr 0:03ec2f3bde8c 891 {
GregCr 0:03ec2f3bde8c 892 int32_t retVal = ( int32_t )num;
GregCr 0:03ec2f3bde8c 893 if( num >= 2<<( bitCnt - 2 ) )
GregCr 0:03ec2f3bde8c 894 {
GregCr 0:03ec2f3bde8c 895 retVal -= 2<<( bitCnt - 1 );
GregCr 0:03ec2f3bde8c 896 }
GregCr 0:03ec2f3bde8c 897 return retVal;
GregCr 0:03ec2f3bde8c 898 }
GregCr 0:03ec2f3bde8c 899
GregCr 0:03ec2f3bde8c 900 int32_t SX1280::GetLoRaBandwidth( )
GregCr 0:03ec2f3bde8c 901 {
GregCr 0:03ec2f3bde8c 902 int32_t bwValue = 0;
GregCr 0:03ec2f3bde8c 903
GregCr 0:03ec2f3bde8c 904 switch( this->LoRaBandwidth )
GregCr 0:03ec2f3bde8c 905 {
GregCr 0:03ec2f3bde8c 906 case LORA_BW_0200:
GregCr 0:03ec2f3bde8c 907 bwValue = 203125;
GregCr 0:03ec2f3bde8c 908 break;
GregCr 0:03ec2f3bde8c 909 case LORA_BW_0400:
GregCr 0:03ec2f3bde8c 910 bwValue = 406250;
GregCr 0:03ec2f3bde8c 911 break;
GregCr 0:03ec2f3bde8c 912 case LORA_BW_0800:
GregCr 0:03ec2f3bde8c 913 bwValue = 812500;
GregCr 0:03ec2f3bde8c 914 break;
GregCr 0:03ec2f3bde8c 915 case LORA_BW_1600:
GregCr 0:03ec2f3bde8c 916 bwValue = 1625000;
GregCr 0:03ec2f3bde8c 917 break;
GregCr 0:03ec2f3bde8c 918 default:
GregCr 0:03ec2f3bde8c 919 bwValue = 0;
GregCr 0:03ec2f3bde8c 920 }
GregCr 0:03ec2f3bde8c 921 return bwValue;
GregCr 0:03ec2f3bde8c 922 }
GregCr 0:03ec2f3bde8c 923
GregCr 0:03ec2f3bde8c 924 void SX1280::SetInterruptMode( void )
GregCr 0:03ec2f3bde8c 925 {
GregCr 0:03ec2f3bde8c 926 this->PollingMode = false;
GregCr 0:03ec2f3bde8c 927 }
GregCr 0:03ec2f3bde8c 928
GregCr 0:03ec2f3bde8c 929 void SX1280::OnDioIrq( void )
GregCr 0:03ec2f3bde8c 930 {
GregCr 0:03ec2f3bde8c 931 /*
GregCr 0:03ec2f3bde8c 932 * When polling mode is activated, it is up to the application to call
GregCr 0:03ec2f3bde8c 933 * ProcessIrqs( ). Otherwise, the driver automatically calls ProcessIrqs( )
GregCr 0:03ec2f3bde8c 934 * on radio interrupt.
GregCr 0:03ec2f3bde8c 935 */
GregCr 0:03ec2f3bde8c 936 if( this->PollingMode == true )
GregCr 0:03ec2f3bde8c 937 {
GregCr 0:03ec2f3bde8c 938 this->IrqState = true;
GregCr 0:03ec2f3bde8c 939 }
GregCr 0:03ec2f3bde8c 940 else
GregCr 0:03ec2f3bde8c 941 {
GregCr 0:03ec2f3bde8c 942 this->ProcessIrqs( );
GregCr 0:03ec2f3bde8c 943 }
GregCr 0:03ec2f3bde8c 944 }
GregCr 0:03ec2f3bde8c 945
GregCr 0:03ec2f3bde8c 946 void SX1280::ProcessIrqs( void )
GregCr 0:03ec2f3bde8c 947 {
GregCr 0:03ec2f3bde8c 948 RadioPacketTypes_t packetType = PACKET_TYPE_NONE;
GregCr 0:03ec2f3bde8c 949
GregCr 0:03ec2f3bde8c 950 if( this->PollingMode == true )
GregCr 0:03ec2f3bde8c 951 {
GregCr 0:03ec2f3bde8c 952 if( this->IrqState == true )
GregCr 0:03ec2f3bde8c 953 {
GregCr 0:03ec2f3bde8c 954 __disable_irq( );
GregCr 0:03ec2f3bde8c 955 this->IrqState = false;
GregCr 0:03ec2f3bde8c 956 __enable_irq( );
GregCr 0:03ec2f3bde8c 957 }
GregCr 0:03ec2f3bde8c 958 else
GregCr 0:03ec2f3bde8c 959 {
GregCr 0:03ec2f3bde8c 960 return;
GregCr 0:03ec2f3bde8c 961 }
GregCr 0:03ec2f3bde8c 962 }
GregCr 0:03ec2f3bde8c 963
GregCr 4:abf14b677777 964 packetType = GetPacketType( true );
GregCr 0:03ec2f3bde8c 965 uint16_t irqRegs = GetIrqStatus( );
GregCr 0:03ec2f3bde8c 966 ClearIrqStatus( IRQ_RADIO_ALL );
GregCr 0:03ec2f3bde8c 967
GregCr 0:03ec2f3bde8c 968 #if( SX1280_DEBUG == 1 )
GregCr 0:03ec2f3bde8c 969 DigitalOut TEST_PIN_1( D14 );
GregCr 0:03ec2f3bde8c 970 DigitalOut TEST_PIN_2( D15 );
GregCr 0:03ec2f3bde8c 971 for( int i = 0x8000; i != 0; i >>= 1 )
GregCr 0:03ec2f3bde8c 972 {
GregCr 0:03ec2f3bde8c 973 TEST_PIN_2 = 0;
GregCr 0:03ec2f3bde8c 974 TEST_PIN_1 = ( ( irqRegs & i ) != 0 ) ? 1 : 0;
GregCr 0:03ec2f3bde8c 975 TEST_PIN_2 = 1;
GregCr 0:03ec2f3bde8c 976 }
GregCr 0:03ec2f3bde8c 977 TEST_PIN_1 = 0;
GregCr 0:03ec2f3bde8c 978 TEST_PIN_2 = 0;
GregCr 0:03ec2f3bde8c 979 #endif
GregCr 0:03ec2f3bde8c 980
GregCr 0:03ec2f3bde8c 981 switch( packetType )
GregCr 0:03ec2f3bde8c 982 {
GregCr 0:03ec2f3bde8c 983 case PACKET_TYPE_GFSK:
GregCr 0:03ec2f3bde8c 984 case PACKET_TYPE_FLRC:
GregCr 0:03ec2f3bde8c 985 case PACKET_TYPE_BLE:
GregCr 0:03ec2f3bde8c 986 switch( OperatingMode )
GregCr 0:03ec2f3bde8c 987 {
GregCr 0:03ec2f3bde8c 988 case MODE_RX:
GregCr 0:03ec2f3bde8c 989 if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE )
GregCr 0:03ec2f3bde8c 990 {
GregCr 0:03ec2f3bde8c 991 if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR )
GregCr 0:03ec2f3bde8c 992 {
GregCr 0:03ec2f3bde8c 993 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 994 {
GregCr 0:03ec2f3bde8c 995 rxError( IRQ_CRC_ERROR_CODE );
GregCr 0:03ec2f3bde8c 996 }
GregCr 0:03ec2f3bde8c 997 }
GregCr 0:03ec2f3bde8c 998 else if( ( irqRegs & IRQ_SYNCWORD_ERROR ) == IRQ_SYNCWORD_ERROR )
GregCr 0:03ec2f3bde8c 999 {
GregCr 0:03ec2f3bde8c 1000 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 1001 {
GregCr 0:03ec2f3bde8c 1002 rxError( IRQ_SYNCWORD_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1003 }
GregCr 0:03ec2f3bde8c 1004 }
GregCr 0:03ec2f3bde8c 1005 else
GregCr 0:03ec2f3bde8c 1006 {
GregCr 0:03ec2f3bde8c 1007 if( rxDone != NULL )
GregCr 0:03ec2f3bde8c 1008 {
GregCr 0:03ec2f3bde8c 1009 rxDone( );
GregCr 0:03ec2f3bde8c 1010 }
GregCr 0:03ec2f3bde8c 1011 }
GregCr 0:03ec2f3bde8c 1012 }
GregCr 0:03ec2f3bde8c 1013 if( ( irqRegs & IRQ_SYNCWORD_VALID ) == IRQ_SYNCWORD_VALID )
GregCr 0:03ec2f3bde8c 1014 {
GregCr 0:03ec2f3bde8c 1015 if( rxSyncWordDone != NULL )
GregCr 0:03ec2f3bde8c 1016 {
GregCr 0:03ec2f3bde8c 1017 rxSyncWordDone( );
GregCr 0:03ec2f3bde8c 1018 }
GregCr 0:03ec2f3bde8c 1019 }
GregCr 0:03ec2f3bde8c 1020 if( ( irqRegs & IRQ_SYNCWORD_ERROR ) == IRQ_SYNCWORD_ERROR )
GregCr 0:03ec2f3bde8c 1021 {
GregCr 0:03ec2f3bde8c 1022 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 1023 {
GregCr 0:03ec2f3bde8c 1024 rxError( IRQ_SYNCWORD_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1025 }
GregCr 0:03ec2f3bde8c 1026 }
GregCr 0:03ec2f3bde8c 1027 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 0:03ec2f3bde8c 1028 {
GregCr 0:03ec2f3bde8c 1029 if( rxTimeout != NULL )
GregCr 0:03ec2f3bde8c 1030 {
GregCr 0:03ec2f3bde8c 1031 rxTimeout( );
GregCr 0:03ec2f3bde8c 1032 }
GregCr 0:03ec2f3bde8c 1033 }
GregCr 11:d60df50e108f 1034 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE )
GregCr 11:d60df50e108f 1035 {
GregCr 11:d60df50e108f 1036 if( txDone != NULL )
GregCr 11:d60df50e108f 1037 {
GregCr 11:d60df50e108f 1038 txDone( );
GregCr 11:d60df50e108f 1039 }
GregCr 11:d60df50e108f 1040 }
GregCr 0:03ec2f3bde8c 1041 break;
GregCr 0:03ec2f3bde8c 1042 case MODE_TX:
GregCr 0:03ec2f3bde8c 1043 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE )
GregCr 0:03ec2f3bde8c 1044 {
GregCr 0:03ec2f3bde8c 1045 if( txDone != NULL )
GregCr 0:03ec2f3bde8c 1046 {
GregCr 0:03ec2f3bde8c 1047 txDone( );
GregCr 0:03ec2f3bde8c 1048 }
GregCr 0:03ec2f3bde8c 1049 }
GregCr 0:03ec2f3bde8c 1050 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 0:03ec2f3bde8c 1051 {
GregCr 0:03ec2f3bde8c 1052 if( txTimeout != NULL )
GregCr 0:03ec2f3bde8c 1053 {
GregCr 0:03ec2f3bde8c 1054 txTimeout( );
GregCr 0:03ec2f3bde8c 1055 }
GregCr 0:03ec2f3bde8c 1056 }
GregCr 0:03ec2f3bde8c 1057 break;
GregCr 0:03ec2f3bde8c 1058 default:
GregCr 0:03ec2f3bde8c 1059 // Unexpected IRQ: silently returns
GregCr 0:03ec2f3bde8c 1060 break;
GregCr 0:03ec2f3bde8c 1061 }
GregCr 0:03ec2f3bde8c 1062 break;
GregCr 0:03ec2f3bde8c 1063 case PACKET_TYPE_LORA:
GregCr 0:03ec2f3bde8c 1064 switch( OperatingMode )
GregCr 0:03ec2f3bde8c 1065 {
GregCr 0:03ec2f3bde8c 1066 case MODE_RX:
GregCr 0:03ec2f3bde8c 1067 if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE )
GregCr 0:03ec2f3bde8c 1068 {
GregCr 0:03ec2f3bde8c 1069 if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR )
GregCr 0:03ec2f3bde8c 1070 {
GregCr 0:03ec2f3bde8c 1071 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 1072 {
GregCr 0:03ec2f3bde8c 1073 rxError( IRQ_CRC_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1074 }
GregCr 0:03ec2f3bde8c 1075 }
GregCr 0:03ec2f3bde8c 1076 else
GregCr 0:03ec2f3bde8c 1077 {
GregCr 0:03ec2f3bde8c 1078 if( rxDone != NULL )
GregCr 0:03ec2f3bde8c 1079 {
GregCr 0:03ec2f3bde8c 1080 rxDone( );
GregCr 0:03ec2f3bde8c 1081 }
GregCr 0:03ec2f3bde8c 1082 }
GregCr 0:03ec2f3bde8c 1083 }
GregCr 0:03ec2f3bde8c 1084 if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID )
GregCr 0:03ec2f3bde8c 1085 {
GregCr 0:03ec2f3bde8c 1086 if( rxHeaderDone != NULL )
GregCr 0:03ec2f3bde8c 1087 {
GregCr 0:03ec2f3bde8c 1088 rxHeaderDone( );
GregCr 0:03ec2f3bde8c 1089 }
GregCr 0:03ec2f3bde8c 1090 }
GregCr 0:03ec2f3bde8c 1091 if( ( irqRegs & IRQ_HEADER_ERROR ) == IRQ_HEADER_ERROR )
GregCr 0:03ec2f3bde8c 1092 {
GregCr 0:03ec2f3bde8c 1093 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 1094 {
GregCr 0:03ec2f3bde8c 1095 rxError( IRQ_HEADER_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1096 }
GregCr 0:03ec2f3bde8c 1097 }
GregCr 0:03ec2f3bde8c 1098 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 0:03ec2f3bde8c 1099 {
GregCr 0:03ec2f3bde8c 1100 if( rxTimeout != NULL )
GregCr 0:03ec2f3bde8c 1101 {
GregCr 0:03ec2f3bde8c 1102 rxTimeout( );
GregCr 0:03ec2f3bde8c 1103 }
GregCr 0:03ec2f3bde8c 1104 }
GregCr 0:03ec2f3bde8c 1105 if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) == IRQ_RANGING_SLAVE_REQUEST_DISCARDED )
GregCr 0:03ec2f3bde8c 1106 {
GregCr 0:03ec2f3bde8c 1107 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 1108 {
GregCr 0:03ec2f3bde8c 1109 rxError( IRQ_RANGING_ON_LORA_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1110 }
GregCr 0:03ec2f3bde8c 1111 }
GregCr 0:03ec2f3bde8c 1112 break;
GregCr 0:03ec2f3bde8c 1113 case MODE_TX:
GregCr 0:03ec2f3bde8c 1114 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE )
GregCr 0:03ec2f3bde8c 1115 {
GregCr 0:03ec2f3bde8c 1116 if( txDone != NULL )
GregCr 0:03ec2f3bde8c 1117 {
GregCr 0:03ec2f3bde8c 1118 txDone( );
GregCr 0:03ec2f3bde8c 1119 }
GregCr 0:03ec2f3bde8c 1120 }
GregCr 0:03ec2f3bde8c 1121 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 0:03ec2f3bde8c 1122 {
GregCr 0:03ec2f3bde8c 1123 if( txTimeout != NULL )
GregCr 0:03ec2f3bde8c 1124 {
GregCr 0:03ec2f3bde8c 1125 txTimeout( );
GregCr 0:03ec2f3bde8c 1126 }
GregCr 0:03ec2f3bde8c 1127 }
GregCr 0:03ec2f3bde8c 1128 break;
GregCr 0:03ec2f3bde8c 1129 case MODE_CAD:
GregCr 0:03ec2f3bde8c 1130 if( ( irqRegs & IRQ_CAD_DONE ) == IRQ_CAD_DONE )
GregCr 0:03ec2f3bde8c 1131 {
GregCr 4:abf14b677777 1132 if( ( irqRegs & IRQ_CAD_DETECTED ) == IRQ_CAD_DETECTED )
GregCr 0:03ec2f3bde8c 1133 {
GregCr 0:03ec2f3bde8c 1134 if( cadDone != NULL )
GregCr 0:03ec2f3bde8c 1135 {
GregCr 0:03ec2f3bde8c 1136 cadDone( true );
GregCr 0:03ec2f3bde8c 1137 }
GregCr 0:03ec2f3bde8c 1138 }
GregCr 0:03ec2f3bde8c 1139 else
GregCr 0:03ec2f3bde8c 1140 {
GregCr 0:03ec2f3bde8c 1141 if( cadDone != NULL )
GregCr 0:03ec2f3bde8c 1142 {
GregCr 0:03ec2f3bde8c 1143 cadDone( false );
GregCr 0:03ec2f3bde8c 1144 }
GregCr 0:03ec2f3bde8c 1145 }
GregCr 0:03ec2f3bde8c 1146 }
GregCr 0:03ec2f3bde8c 1147 else if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 0:03ec2f3bde8c 1148 {
GregCr 0:03ec2f3bde8c 1149 if( rxTimeout != NULL )
GregCr 0:03ec2f3bde8c 1150 {
GregCr 0:03ec2f3bde8c 1151 rxTimeout( );
GregCr 0:03ec2f3bde8c 1152 }
GregCr 0:03ec2f3bde8c 1153 }
GregCr 0:03ec2f3bde8c 1154 break;
GregCr 0:03ec2f3bde8c 1155 default:
GregCr 0:03ec2f3bde8c 1156 // Unexpected IRQ: silently returns
GregCr 0:03ec2f3bde8c 1157 break;
GregCr 0:03ec2f3bde8c 1158 }
GregCr 0:03ec2f3bde8c 1159 break;
GregCr 0:03ec2f3bde8c 1160 case PACKET_TYPE_RANGING:
GregCr 0:03ec2f3bde8c 1161 switch( OperatingMode )
GregCr 0:03ec2f3bde8c 1162 {
GregCr 0:03ec2f3bde8c 1163 // MODE_RX indicates an IRQ on the Slave side
GregCr 0:03ec2f3bde8c 1164 case MODE_RX:
GregCr 0:03ec2f3bde8c 1165 if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_DISCARDED ) == IRQ_RANGING_SLAVE_REQUEST_DISCARDED )
GregCr 0:03ec2f3bde8c 1166 {
GregCr 0:03ec2f3bde8c 1167 if( rangingDone != NULL )
GregCr 0:03ec2f3bde8c 1168 {
GregCr 0:03ec2f3bde8c 1169 rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1170 }
GregCr 0:03ec2f3bde8c 1171 }
GregCr 0:03ec2f3bde8c 1172 if( ( irqRegs & IRQ_RANGING_SLAVE_REQUEST_VALID ) == IRQ_RANGING_SLAVE_REQUEST_VALID )
GregCr 0:03ec2f3bde8c 1173 {
GregCr 0:03ec2f3bde8c 1174 if( rangingDone != NULL )
GregCr 0:03ec2f3bde8c 1175 {
GregCr 0:03ec2f3bde8c 1176 rangingDone( IRQ_RANGING_SLAVE_VALID_CODE );
GregCr 0:03ec2f3bde8c 1177 }
GregCr 0:03ec2f3bde8c 1178 }
GregCr 0:03ec2f3bde8c 1179 if( ( irqRegs & IRQ_RANGING_SLAVE_RESPONSE_DONE ) == IRQ_RANGING_SLAVE_RESPONSE_DONE )
GregCr 0:03ec2f3bde8c 1180 {
GregCr 0:03ec2f3bde8c 1181 if( rangingDone != NULL )
GregCr 0:03ec2f3bde8c 1182 {
GregCr 0:03ec2f3bde8c 1183 rangingDone( IRQ_RANGING_SLAVE_VALID_CODE );
GregCr 0:03ec2f3bde8c 1184 }
GregCr 0:03ec2f3bde8c 1185 }
GregCr 0:03ec2f3bde8c 1186 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 0:03ec2f3bde8c 1187 {
GregCr 0:03ec2f3bde8c 1188 if( rangingDone != NULL )
GregCr 0:03ec2f3bde8c 1189 {
GregCr 0:03ec2f3bde8c 1190 rangingDone( IRQ_RANGING_SLAVE_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1191 }
GregCr 0:03ec2f3bde8c 1192 }
GregCr 0:03ec2f3bde8c 1193 if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID )
GregCr 0:03ec2f3bde8c 1194 {
GregCr 0:03ec2f3bde8c 1195 if( rxHeaderDone != NULL )
GregCr 0:03ec2f3bde8c 1196 {
GregCr 0:03ec2f3bde8c 1197 rxHeaderDone( );
GregCr 0:03ec2f3bde8c 1198 }
GregCr 0:03ec2f3bde8c 1199 }
GregCr 0:03ec2f3bde8c 1200 if( ( irqRegs & IRQ_HEADER_ERROR ) == IRQ_HEADER_ERROR )
GregCr 0:03ec2f3bde8c 1201 {
GregCr 0:03ec2f3bde8c 1202 if( rxError != NULL )
GregCr 0:03ec2f3bde8c 1203 {
GregCr 0:03ec2f3bde8c 1204 rxError( IRQ_HEADER_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1205 }
GregCr 0:03ec2f3bde8c 1206 }
GregCr 0:03ec2f3bde8c 1207 break;
GregCr 0:03ec2f3bde8c 1208 // MODE_TX indicates an IRQ on the Master side
GregCr 0:03ec2f3bde8c 1209 case MODE_TX:
GregCr 4:abf14b677777 1210 if( ( irqRegs & IRQ_RANGING_MASTER_TIMEOUT ) == IRQ_RANGING_MASTER_TIMEOUT )
GregCr 0:03ec2f3bde8c 1211 {
GregCr 0:03ec2f3bde8c 1212 if( rangingDone != NULL )
GregCr 0:03ec2f3bde8c 1213 {
GregCr 0:03ec2f3bde8c 1214 rangingDone( IRQ_RANGING_MASTER_ERROR_CODE );
GregCr 0:03ec2f3bde8c 1215 }
GregCr 0:03ec2f3bde8c 1216 }
GregCr 0:03ec2f3bde8c 1217 if( ( irqRegs & IRQ_RANGING_MASTER_RESULT_VALID ) == IRQ_RANGING_MASTER_RESULT_VALID )
GregCr 0:03ec2f3bde8c 1218 {
GregCr 0:03ec2f3bde8c 1219 if( rangingDone != NULL )
GregCr 0:03ec2f3bde8c 1220 {
GregCr 0:03ec2f3bde8c 1221 rangingDone( IRQ_RANGING_MASTER_VALID_CODE );
GregCr 0:03ec2f3bde8c 1222 }
GregCr 0:03ec2f3bde8c 1223 }
GregCr 0:03ec2f3bde8c 1224 break;
GregCr 0:03ec2f3bde8c 1225 default:
GregCr 0:03ec2f3bde8c 1226 // Unexpected IRQ: silently returns
GregCr 0:03ec2f3bde8c 1227 break;
GregCr 0:03ec2f3bde8c 1228 }
GregCr 0:03ec2f3bde8c 1229 break;
GregCr 0:03ec2f3bde8c 1230 default:
GregCr 0:03ec2f3bde8c 1231 // Unexpected IRQ: silently returns
GregCr 0:03ec2f3bde8c 1232 break;
GregCr 0:03ec2f3bde8c 1233 }
GregCr 0:03ec2f3bde8c 1234 }