Semtech / SX126xLib

SX1261 and sx1262 common library

Dependents:   SX126xDevKit SX1262PingPong SX126X_TXonly SX126X_PingPong_Demo ... more

Fork of SX126xLib by Gregory Cristian

sx126x.cpp@6:1e2345700991, 2018-07-18 (annotated)

Committer:
GregCr
Date:
Wed Jul 18 13:33:42 2018 +0000
Revision:
6:1e2345700991
Parent:
5:e488e6f185f3 
added support for sx1268

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GregCr 0:deaafdfde3bb 1 /*
GregCr 4:c6ef863d0b07 2 ______ _
GregCr 0:deaafdfde3bb 3 / _____) _ | |
GregCr 0:deaafdfde3bb 4 ( (____ _____ ____ _| |_ _____ ____| |__
GregCr 0:deaafdfde3bb 5 \____ \| ___ | (_ _) ___ |/ ___) _ \
GregCr 0:deaafdfde3bb 6 _____) ) ____| | | || |_| ____( (___| | | |
GregCr 0:deaafdfde3bb 7 (______/|_____)_|_|_| \__)_____)\____)_| |_|
GregCr 4:c6ef863d0b07 8 (C)2017 Semtech
GregCr 0:deaafdfde3bb 9
GregCr 4:c6ef863d0b07 10 Description: Generic SX126x driver implementation
GregCr 0:deaafdfde3bb 11
GregCr 0:deaafdfde3bb 12 License: Revised BSD License, see LICENSE.TXT file include in the project
GregCr 0:deaafdfde3bb 13
GregCr 4:c6ef863d0b07 14 Authors: Miguel Luis, Gregory Cristian
GregCr 0:deaafdfde3bb 15 */
GregCr 0:deaafdfde3bb 16 #include "mbed.h"
GregCr 1:35d34672a089 17 #include "sx126x.h"
GregCr 1:35d34672a089 18 #include "sx126x-hal.h"
GregCr 0:deaafdfde3bb 19
GregCr 0:deaafdfde3bb 20 /*!
GregCr 4:c6ef863d0b07 21 * \brief Radio registers definition
GregCr 0:deaafdfde3bb 22 */
GregCr 0:deaafdfde3bb 23 typedef struct
GregCr 0:deaafdfde3bb 24 {
GregCr 0:deaafdfde3bb 25 uint16_t Addr; //!< The address of the register
GregCr 0:deaafdfde3bb 26 uint8_t Value; //!< The value of the register
GregCr 0:deaafdfde3bb 27 }RadioRegisters_t;
GregCr 0:deaafdfde3bb 28
GregCr 0:deaafdfde3bb 29 /*!
GregCr 4:c6ef863d0b07 30 * \brief Stores the last frequency error measured on LoRa received packet
GregCr 0:deaafdfde3bb 31 */
GregCr 4:c6ef863d0b07 32 volatile uint32_t FrequencyError = 0;
GregCr 0:deaafdfde3bb 33
GregCr 5:e488e6f185f3 34 /*!
GregCr 5:e488e6f185f3 35 * \brief Hold the status of the Image calibration
GregCr 5:e488e6f185f3 36 */
GregCr 5:e488e6f185f3 37 static bool ImageCalibrated = false;
GregCr 5:e488e6f185f3 38
GregCr 5:e488e6f185f3 39
GregCr 2:4ff11ea92fbe 40 void SX126x::Init( void )
GregCr 0:deaafdfde3bb 41 {
GregCr 5:e488e6f185f3 42 CalibrationParams_t calibParam;
GregCr 5:e488e6f185f3 43
GregCr 4:c6ef863d0b07 44 /*!
GregCr 4:c6ef863d0b07 45 * \brief pin OPT is used to detect if the board has a TCXO or a XTAL
GregCr 4:c6ef863d0b07 46 *
GregCr 4:c6ef863d0b07 47 * OPT = 0 >> TCXO; OPT = 1 >> XTAL
GregCr 4:c6ef863d0b07 48 */
GregCr 4:c6ef863d0b07 49 DigitalIn OPT( A3 );
GregCr 4:c6ef863d0b07 50
GregCr 0:deaafdfde3bb 51 Reset( );
GregCr 4:c6ef863d0b07 52
GregCr 0:deaafdfde3bb 53 IoIrqInit( dioIrq );
GregCr 4:c6ef863d0b07 54
GregCr 0:deaafdfde3bb 55 Wakeup( );
GregCr 3:7e3595a9ebe0 56 SetStandby( STDBY_RC );
GregCr 4:c6ef863d0b07 57
GregCr 4:c6ef863d0b07 58 if( OPT == 0 )
GregCr 3:7e3595a9ebe0 59 {
GregCr 5:e488e6f185f3 60 SetDio3AsTcxoCtrl( TCXO_CTRL_1_7V, 320 ); //5 ms
GregCr 5:e488e6f185f3 61 calibParam.Value = 0x7F;
GregCr 5:e488e6f185f3 62 Calibrate( calibParam );
GregCr 3:7e3595a9ebe0 63 }
GregCr 4:c6ef863d0b07 64
GregCr 4:c6ef863d0b07 65 SetPollingMode( );
GregCr 5:e488e6f185f3 66
GregCr 4:c6ef863d0b07 67 AntSwOn( );
GregCr 4:c6ef863d0b07 68 SetDio2AsRfSwitchCtrl( true );
GregCr 5:e488e6f185f3 69
GregCr 5:e488e6f185f3 70 OperatingMode = MODE_STDBY_RC;
GregCr 5:e488e6f185f3 71
GregCr 4:c6ef863d0b07 72 SetPacketType( PACKET_TYPE_LORA );
GregCr 0:deaafdfde3bb 73
GregCr 4:c6ef863d0b07 74 #ifdef USE_CONFIG_PUBLIC_NETOWRK
GregCr 4:c6ef863d0b07 75 // Change LoRa modem Sync Word for Public Networks
GregCr 4:c6ef863d0b07 76 WriteReg( REG_LR_SYNCWORD, ( LORA_MAC_PUBLIC_SYNCWORD >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 77 WriteReg( REG_LR_SYNCWORD + 1, LORA_MAC_PUBLIC_SYNCWORD & 0xFF );
GregCr 4:c6ef863d0b07 78 #else
GregCr 4:c6ef863d0b07 79 // Change LoRa modem SyncWord for Private Networks
GregCr 4:c6ef863d0b07 80 WriteReg( REG_LR_SYNCWORD, ( LORA_MAC_PRIVATE_SYNCWORD >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 81 WriteReg( REG_LR_SYNCWORD + 1, LORA_MAC_PRIVATE_SYNCWORD & 0xFF );
GregCr 4:c6ef863d0b07 82 #endif
GregCr 0:deaafdfde3bb 83 }
GregCr 0:deaafdfde3bb 84
GregCr 4:c6ef863d0b07 85 RadioOperatingModes_t SX126x::GetOperatingMode( void )
GregCr 0:deaafdfde3bb 86 {
GregCr 4:c6ef863d0b07 87 return OperatingMode;
GregCr 0:deaafdfde3bb 88 }
GregCr 0:deaafdfde3bb 89
GregCr 4:c6ef863d0b07 90 void SX126x::CheckDeviceReady( void )
GregCr 0:deaafdfde3bb 91 {
GregCr 4:c6ef863d0b07 92 if( ( GetOperatingMode( ) == MODE_SLEEP ) || ( GetOperatingMode( ) == MODE_RX_DC ) )
GregCr 0:deaafdfde3bb 93 {
GregCr 4:c6ef863d0b07 94 Wakeup( );
GregCr 4:c6ef863d0b07 95 // Switch is turned off when device is in sleep mode and turned on is all other modes
GregCr 4:c6ef863d0b07 96 AntSwOn( );
GregCr 0:deaafdfde3bb 97 }
GregCr 0:deaafdfde3bb 98 }
GregCr 0:deaafdfde3bb 99
GregCr 4:c6ef863d0b07 100 void SX126x::SetPayload( uint8_t *payload, uint8_t size )
GregCr 0:deaafdfde3bb 101 {
GregCr 4:c6ef863d0b07 102 WriteBuffer( 0x00, payload, size );
GregCr 0:deaafdfde3bb 103 }
GregCr 0:deaafdfde3bb 104
GregCr 2:4ff11ea92fbe 105 uint8_t SX126x::GetPayload( uint8_t *buffer, uint8_t *size, uint8_t maxSize )
GregCr 0:deaafdfde3bb 106 {
GregCr 4:c6ef863d0b07 107 uint8_t offset = 0;
GregCr 0:deaafdfde3bb 108
GregCr 0:deaafdfde3bb 109 GetRxBufferStatus( size, &offset );
GregCr 4:c6ef863d0b07 110 if( *size > maxSize )
GregCr 0:deaafdfde3bb 111 {
GregCr 0:deaafdfde3bb 112 return 1;
GregCr 0:deaafdfde3bb 113 }
GregCr 0:deaafdfde3bb 114 ReadBuffer( offset, buffer, *size );
GregCr 0:deaafdfde3bb 115 return 0;
GregCr 0:deaafdfde3bb 116 }
GregCr 0:deaafdfde3bb 117
GregCr 2:4ff11ea92fbe 118 void SX126x::SendPayload( uint8_t *payload, uint8_t size, uint32_t timeout )
GregCr 0:deaafdfde3bb 119 {
GregCr 0:deaafdfde3bb 120 SetPayload( payload, size );
GregCr 0:deaafdfde3bb 121 SetTx( timeout );
GregCr 0:deaafdfde3bb 122 }
GregCr 0:deaafdfde3bb 123
GregCr 2:4ff11ea92fbe 124 uint8_t SX126x::SetSyncWord( uint8_t *syncWord )
GregCr 0:deaafdfde3bb 125 {
GregCr 3:7e3595a9ebe0 126 WriteRegister( REG_LR_SYNCWORDBASEADDRESS, syncWord, 8 );
GregCr 0:deaafdfde3bb 127 return 0;
GregCr 0:deaafdfde3bb 128 }
GregCr 0:deaafdfde3bb 129
GregCr 3:7e3595a9ebe0 130 void SX126x::SetCrcSeed( uint16_t seed )
GregCr 0:deaafdfde3bb 131 {
GregCr 3:7e3595a9ebe0 132 uint8_t buf[2];
GregCr 4:c6ef863d0b07 133
GregCr 3:7e3595a9ebe0 134 buf[0] = ( uint8_t )( ( seed >> 8 ) & 0xFF );
GregCr 3:7e3595a9ebe0 135 buf[1] = ( uint8_t )( seed & 0xFF );
GregCr 4:c6ef863d0b07 136
GregCr 0:deaafdfde3bb 137 switch( GetPacketType( ) )
GregCr 0:deaafdfde3bb 138 {
GregCr 0:deaafdfde3bb 139 case PACKET_TYPE_GFSK:
GregCr 3:7e3595a9ebe0 140 WriteRegister( REG_LR_CRCSEEDBASEADDR, buf, 2 );
GregCr 0:deaafdfde3bb 141 break;
GregCr 4:c6ef863d0b07 142
GregCr 0:deaafdfde3bb 143 default:
GregCr 0:deaafdfde3bb 144 break;
GregCr 0:deaafdfde3bb 145 }
GregCr 0:deaafdfde3bb 146 }
GregCr 0:deaafdfde3bb 147
GregCr 3:7e3595a9ebe0 148 void SX126x::SetCrcPolynomial( uint16_t polynomial )
GregCr 0:deaafdfde3bb 149 {
GregCr 3:7e3595a9ebe0 150 uint8_t buf[2];
GregCr 4:c6ef863d0b07 151
GregCr 3:7e3595a9ebe0 152 buf[0] = ( uint8_t )( ( polynomial >> 8 ) & 0xFF );
GregCr 3:7e3595a9ebe0 153 buf[1] = ( uint8_t )( polynomial & 0xFF );
GregCr 4:c6ef863d0b07 154
GregCr 0:deaafdfde3bb 155 switch( GetPacketType( ) )
GregCr 0:deaafdfde3bb 156 {
GregCr 0:deaafdfde3bb 157 case PACKET_TYPE_GFSK:
GregCr 3:7e3595a9ebe0 158 WriteRegister( REG_LR_CRCPOLYBASEADDR, buf, 2 );
GregCr 0:deaafdfde3bb 159 break;
GregCr 4:c6ef863d0b07 160
GregCr 0:deaafdfde3bb 161 default:
GregCr 0:deaafdfde3bb 162 break;
GregCr 0:deaafdfde3bb 163 }
GregCr 0:deaafdfde3bb 164 }
GregCr 0:deaafdfde3bb 165
GregCr 4:c6ef863d0b07 166 void SX126x::SetWhiteningSeed( uint16_t seed )
GregCr 0:deaafdfde3bb 167 {
GregCr 4:c6ef863d0b07 168 uint8_t regValue = 0;
GregCr 4:c6ef863d0b07 169
GregCr 0:deaafdfde3bb 170 switch( GetPacketType( ) )
GregCr 0:deaafdfde3bb 171 {
GregCr 0:deaafdfde3bb 172 case PACKET_TYPE_GFSK:
GregCr 4:c6ef863d0b07 173 regValue = ReadReg( REG_LR_WHITSEEDBASEADDR_MSB ) & 0xFE;
GregCr 4:c6ef863d0b07 174 regValue = ( ( seed >> 8 ) & 0x01 ) | regValue;
GregCr 4:c6ef863d0b07 175 WriteReg( REG_LR_WHITSEEDBASEADDR_MSB, regValue ); // only 1 bit.
GregCr 4:c6ef863d0b07 176 WriteReg( REG_LR_WHITSEEDBASEADDR_LSB, ( uint8_t )seed );
GregCr 0:deaafdfde3bb 177 break;
GregCr 4:c6ef863d0b07 178
GregCr 0:deaafdfde3bb 179 default:
GregCr 0:deaafdfde3bb 180 break;
GregCr 0:deaafdfde3bb 181 }
GregCr 0:deaafdfde3bb 182 }
GregCr 0:deaafdfde3bb 183
GregCr 4:c6ef863d0b07 184 uint32_t SX126x::GetRandom( void )
GregCr 4:c6ef863d0b07 185 {
GregCr 4:c6ef863d0b07 186 uint8_t buf[] = { 0, 0, 0, 0 };
GregCr 4:c6ef863d0b07 187
GregCr 4:c6ef863d0b07 188 // Set radio in continuous reception
GregCr 4:c6ef863d0b07 189 SetRx( 0 );
GregCr 4:c6ef863d0b07 190
GregCr 4:c6ef863d0b07 191 wait_ms( 1 );
GregCr 4:c6ef863d0b07 192
GregCr 4:c6ef863d0b07 193 ReadRegister( RANDOM_NUMBER_GENERATORBASEADDR, buf, 4 );
GregCr 4:c6ef863d0b07 194
GregCr 4:c6ef863d0b07 195 SetStandby( STDBY_RC );
GregCr 4:c6ef863d0b07 196
GregCr 4:c6ef863d0b07 197 return ( buf[0] << 24 ) | ( buf[1] << 16 ) | ( buf[2] << 8 ) | buf[3];
GregCr 4:c6ef863d0b07 198 }
GregCr 4:c6ef863d0b07 199
GregCr 4:c6ef863d0b07 200 void SX126x::SetSleep( SleepParams_t sleepConfig )
GregCr 0:deaafdfde3bb 201 {
GregCr 4:c6ef863d0b07 202 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 203 printf("SetSleep ");
GregCr 4:c6ef863d0b07 204 #endif
GregCr 4:c6ef863d0b07 205
GregCr 4:c6ef863d0b07 206 AntSwOff( );
GregCr 4:c6ef863d0b07 207
GregCr 4:c6ef863d0b07 208 WriteCommand( RADIO_SET_SLEEP, &sleepConfig.Value, 1 );
GregCr 4:c6ef863d0b07 209 OperatingMode = MODE_SLEEP;
GregCr 4:c6ef863d0b07 210 }
GregCr 0:deaafdfde3bb 211
GregCr 4:c6ef863d0b07 212 void SX126x::SetStandby( RadioStandbyModes_t standbyConfig )
GregCr 4:c6ef863d0b07 213 {
GregCr 4:c6ef863d0b07 214 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 215 printf("SetStandby ");
GregCr 4:c6ef863d0b07 216 #endif
GregCr 4:c6ef863d0b07 217 WriteCommand( RADIO_SET_STANDBY, ( uint8_t* )&standbyConfig, 1 );
GregCr 4:c6ef863d0b07 218 if( standbyConfig == STDBY_RC )
GregCr 4:c6ef863d0b07 219 {
GregCr 4:c6ef863d0b07 220 OperatingMode = MODE_STDBY_RC;
GregCr 4:c6ef863d0b07 221 }
GregCr 4:c6ef863d0b07 222 else
GregCr 0:deaafdfde3bb 223 {
GregCr 4:c6ef863d0b07 224 OperatingMode = MODE_STDBY_XOSC;
GregCr 4:c6ef863d0b07 225 }
GregCr 4:c6ef863d0b07 226 }
GregCr 4:c6ef863d0b07 227
GregCr 4:c6ef863d0b07 228 void SX126x::SetFs( void )
GregCr 4:c6ef863d0b07 229 {
GregCr 4:c6ef863d0b07 230 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 231 printf("SetFs ");
GregCr 4:c6ef863d0b07 232 #endif
GregCr 4:c6ef863d0b07 233 WriteCommand( RADIO_SET_FS, 0, 0 );
GregCr 4:c6ef863d0b07 234 OperatingMode = MODE_FS;
GregCr 4:c6ef863d0b07 235 }
GregCr 4:c6ef863d0b07 236
GregCr 4:c6ef863d0b07 237 void SX126x::SetTx( uint32_t timeout )
GregCr 4:c6ef863d0b07 238 {
GregCr 4:c6ef863d0b07 239 uint8_t buf[3];
GregCr 4:c6ef863d0b07 240
GregCr 4:c6ef863d0b07 241 OperatingMode = MODE_TX;
GregCr 4:c6ef863d0b07 242
GregCr 4:c6ef863d0b07 243 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 244 printf("SetTx ");
GregCr 4:c6ef863d0b07 245 #endif
GregCr 4:c6ef863d0b07 246
GregCr 4:c6ef863d0b07 247 buf[0] = ( uint8_t )( ( timeout >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 248 buf[1] = ( uint8_t )( ( timeout >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 249 buf[2] = ( uint8_t )( timeout & 0xFF );
GregCr 4:c6ef863d0b07 250 WriteCommand( RADIO_SET_TX, buf, 3 );
GregCr 4:c6ef863d0b07 251 }
GregCr 4:c6ef863d0b07 252
GregCr 4:c6ef863d0b07 253 void SX126x::SetRxBoosted( uint32_t timeout )
GregCr 4:c6ef863d0b07 254 {
GregCr 4:c6ef863d0b07 255 uint8_t buf[3];
GregCr 4:c6ef863d0b07 256
GregCr 4:c6ef863d0b07 257 OperatingMode = MODE_RX;
GregCr 4:c6ef863d0b07 258
GregCr 4:c6ef863d0b07 259 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 260 printf("SetRxBoosted ");
GregCr 4:c6ef863d0b07 261 #endif
GregCr 4:c6ef863d0b07 262
GregCr 4:c6ef863d0b07 263 WriteReg( REG_RX_GAIN, 0x96 ); // max LNA gain, increase current by ~2mA for around ~3dB in sensivity
GregCr 4:c6ef863d0b07 264
GregCr 4:c6ef863d0b07 265 buf[0] = ( uint8_t )( ( timeout >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 266 buf[1] = ( uint8_t )( ( timeout >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 267 buf[2] = ( uint8_t )( timeout & 0xFF );
GregCr 4:c6ef863d0b07 268 WriteCommand( RADIO_SET_RX, buf, 3 );
GregCr 4:c6ef863d0b07 269 }
GregCr 4:c6ef863d0b07 270
GregCr 4:c6ef863d0b07 271 void SX126x::SetRx( uint32_t timeout )
GregCr 4:c6ef863d0b07 272 {
GregCr 4:c6ef863d0b07 273 uint8_t buf[3];
GregCr 4:c6ef863d0b07 274
GregCr 4:c6ef863d0b07 275 OperatingMode = MODE_RX;
GregCr 4:c6ef863d0b07 276
GregCr 4:c6ef863d0b07 277 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 278 printf("SetRx ");
GregCr 4:c6ef863d0b07 279 #endif
GregCr 4:c6ef863d0b07 280
GregCr 4:c6ef863d0b07 281 buf[0] = ( uint8_t )( ( timeout >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 282 buf[1] = ( uint8_t )( ( timeout >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 283 buf[2] = ( uint8_t )( timeout & 0xFF );
GregCr 4:c6ef863d0b07 284 WriteCommand( RADIO_SET_RX, buf, 3 );
GregCr 4:c6ef863d0b07 285 }
GregCr 4:c6ef863d0b07 286
GregCr 4:c6ef863d0b07 287 void SX126x::SetRxDutyCycle( uint32_t rxTime, uint32_t sleepTime )
GregCr 4:c6ef863d0b07 288 {
GregCr 4:c6ef863d0b07 289 uint8_t buf[6];
GregCr 4:c6ef863d0b07 290
GregCr 4:c6ef863d0b07 291 buf[0] = ( uint8_t )( ( rxTime >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 292 buf[1] = ( uint8_t )( ( rxTime >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 293 buf[2] = ( uint8_t )( rxTime & 0xFF );
GregCr 4:c6ef863d0b07 294 buf[3] = ( uint8_t )( ( sleepTime >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 295 buf[4] = ( uint8_t )( ( sleepTime >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 296 buf[5] = ( uint8_t )( sleepTime & 0xFF );
GregCr 4:c6ef863d0b07 297 WriteCommand( RADIO_SET_RXDUTYCYCLE, buf, 6 );
GregCr 4:c6ef863d0b07 298 OperatingMode = MODE_RX_DC;
GregCr 4:c6ef863d0b07 299 }
GregCr 4:c6ef863d0b07 300
GregCr 4:c6ef863d0b07 301 void SX126x::SetCad( void )
GregCr 4:c6ef863d0b07 302 {
GregCr 4:c6ef863d0b07 303 WriteCommand( RADIO_SET_CAD, 0, 0 );
GregCr 4:c6ef863d0b07 304 OperatingMode = MODE_CAD;
GregCr 4:c6ef863d0b07 305 }
GregCr 4:c6ef863d0b07 306
GregCr 4:c6ef863d0b07 307 void SX126x::SetTxContinuousWave( void )
GregCr 4:c6ef863d0b07 308 {
GregCr 4:c6ef863d0b07 309 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 310 printf("SetTxContinuousWave ");
GregCr 4:c6ef863d0b07 311 #endif
GregCr 4:c6ef863d0b07 312 WriteCommand( RADIO_SET_TXCONTINUOUSWAVE, 0, 0 );
GregCr 4:c6ef863d0b07 313 }
GregCr 4:c6ef863d0b07 314
GregCr 4:c6ef863d0b07 315 void SX126x::SetTxInfinitePreamble( void )
GregCr 4:c6ef863d0b07 316 {
GregCr 4:c6ef863d0b07 317 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 318 printf("SetTxContinuousPreamble ");
GregCr 4:c6ef863d0b07 319 #endif
GregCr 4:c6ef863d0b07 320 WriteCommand( RADIO_SET_TXCONTINUOUSPREAMBLE, 0, 0 );
GregCr 4:c6ef863d0b07 321 }
GregCr 4:c6ef863d0b07 322
GregCr 4:c6ef863d0b07 323 void SX126x::SetStopRxTimerOnPreambleDetect( bool enable )
GregCr 4:c6ef863d0b07 324 {
GregCr 4:c6ef863d0b07 325 WriteCommand( RADIO_SET_STOPRXTIMERONPREAMBLE, ( uint8_t* )&enable, 1 );
GregCr 4:c6ef863d0b07 326 }
GregCr 4:c6ef863d0b07 327
GregCr 4:c6ef863d0b07 328 void SX126x::SetLoRaSymbNumTimeout( uint8_t SymbNum )
GregCr 4:c6ef863d0b07 329 {
GregCr 4:c6ef863d0b07 330 WriteCommand( RADIO_SET_LORASYMBTIMEOUT, &SymbNum, 1 );
GregCr 4:c6ef863d0b07 331 }
GregCr 4:c6ef863d0b07 332
GregCr 4:c6ef863d0b07 333 void SX126x::SetRegulatorMode( RadioRegulatorMode_t mode )
GregCr 4:c6ef863d0b07 334 {
GregCr 4:c6ef863d0b07 335 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 336 printf("SetRegulatorMode ");
GregCr 4:c6ef863d0b07 337 #endif
GregCr 4:c6ef863d0b07 338 WriteCommand( RADIO_SET_REGULATORMODE, ( uint8_t* )&mode, 1 );
GregCr 4:c6ef863d0b07 339 }
GregCr 4:c6ef863d0b07 340
GregCr 4:c6ef863d0b07 341 void SX126x::Calibrate( CalibrationParams_t calibParam )
GregCr 4:c6ef863d0b07 342 {
GregCr 4:c6ef863d0b07 343 WriteCommand( RADIO_CALIBRATE, &calibParam.Value, 1 );
GregCr 4:c6ef863d0b07 344 }
GregCr 4:c6ef863d0b07 345
GregCr 5:e488e6f185f3 346 void SX126x::CalibrateImage( uint32_t freq )
GregCr 4:c6ef863d0b07 347 {
GregCr 5:e488e6f185f3 348 uint8_t calFreq[2];
GregCr 5:e488e6f185f3 349
GregCr 5:e488e6f185f3 350 if( freq > 900000000 )
GregCr 5:e488e6f185f3 351 {
GregCr 5:e488e6f185f3 352 calFreq[0] = 0xE1;
GregCr 5:e488e6f185f3 353 calFreq[1] = 0xE9;
GregCr 5:e488e6f185f3 354 }
GregCr 5:e488e6f185f3 355 else if( freq > 850000000 )
GregCr 5:e488e6f185f3 356 {
GregCr 5:e488e6f185f3 357 calFreq[0] = 0xD7;
GregCr 5:e488e6f185f3 358 calFreq[1] = 0xD8;
GregCr 5:e488e6f185f3 359 }
GregCr 5:e488e6f185f3 360 else if( freq > 770000000 )
GregCr 5:e488e6f185f3 361 {
GregCr 5:e488e6f185f3 362 calFreq[0] = 0xC1;
GregCr 5:e488e6f185f3 363 calFreq[1] = 0xC5;
GregCr 5:e488e6f185f3 364 }
GregCr 5:e488e6f185f3 365 else if( freq > 460000000 )
GregCr 5:e488e6f185f3 366 {
GregCr 5:e488e6f185f3 367 calFreq[0] = 0x75;
GregCr 5:e488e6f185f3 368 calFreq[1] = 0x81;
GregCr 5:e488e6f185f3 369 }
GregCr 5:e488e6f185f3 370 else if( freq > 425000000 )
GregCr 5:e488e6f185f3 371 {
GregCr 5:e488e6f185f3 372 calFreq[0] = 0x6B;
GregCr 5:e488e6f185f3 373 calFreq[1] = 0x6F;
GregCr 5:e488e6f185f3 374 }
GregCr 5:e488e6f185f3 375 WriteCommand( RADIO_CALIBRATEIMAGE, calFreq, 2 );
GregCr 4:c6ef863d0b07 376 }
GregCr 4:c6ef863d0b07 377
GregCr 4:c6ef863d0b07 378 void SX126x::SetPaConfig( uint8_t paDutyCycle, uint8_t HpMax, uint8_t deviceSel, uint8_t paLUT )
GregCr 4:c6ef863d0b07 379 {
GregCr 4:c6ef863d0b07 380 uint8_t buf[4];
GregCr 4:c6ef863d0b07 381
GregCr 4:c6ef863d0b07 382 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 383 printf("SetPaConfig ");
GregCr 4:c6ef863d0b07 384 #endif
GregCr 4:c6ef863d0b07 385
GregCr 4:c6ef863d0b07 386 buf[0] = paDutyCycle;
GregCr 4:c6ef863d0b07 387 buf[1] = HpMax;
GregCr 4:c6ef863d0b07 388 buf[2] = deviceSel;
GregCr 4:c6ef863d0b07 389 buf[3] = paLUT;
GregCr 4:c6ef863d0b07 390 WriteCommand( RADIO_SET_PACONFIG, buf, 4 );
GregCr 4:c6ef863d0b07 391 }
GregCr 4:c6ef863d0b07 392
GregCr 4:c6ef863d0b07 393 void SX126x::SetRxTxFallbackMode( uint8_t fallbackMode )
GregCr 4:c6ef863d0b07 394 {
GregCr 4:c6ef863d0b07 395 WriteCommand( RADIO_SET_TXFALLBACKMODE, &fallbackMode, 1 );
GregCr 4:c6ef863d0b07 396 }
GregCr 4:c6ef863d0b07 397
GregCr 4:c6ef863d0b07 398 void SX126x::SetDioIrqParams( uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask, uint16_t dio3Mask )
GregCr 4:c6ef863d0b07 399 {
GregCr 4:c6ef863d0b07 400 uint8_t buf[8];
GregCr 4:c6ef863d0b07 401
GregCr 4:c6ef863d0b07 402 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 403 printf("SetDioIrqParams ");
GregCr 4:c6ef863d0b07 404 #endif
GregCr 4:c6ef863d0b07 405
GregCr 4:c6ef863d0b07 406 buf[0] = ( uint8_t )( ( irqMask >> 8 ) & 0x00FF );
GregCr 4:c6ef863d0b07 407 buf[1] = ( uint8_t )( irqMask & 0x00FF );
GregCr 4:c6ef863d0b07 408 buf[2] = ( uint8_t )( ( dio1Mask >> 8 ) & 0x00FF );
GregCr 4:c6ef863d0b07 409 buf[3] = ( uint8_t )( dio1Mask & 0x00FF );
GregCr 4:c6ef863d0b07 410 buf[4] = ( uint8_t )( ( dio2Mask >> 8 ) & 0x00FF );
GregCr 4:c6ef863d0b07 411 buf[5] = ( uint8_t )( dio2Mask & 0x00FF );
GregCr 4:c6ef863d0b07 412 buf[6] = ( uint8_t )( ( dio3Mask >> 8 ) & 0x00FF );
GregCr 4:c6ef863d0b07 413 buf[7] = ( uint8_t )( dio3Mask & 0x00FF );
GregCr 4:c6ef863d0b07 414 WriteCommand( RADIO_CFG_DIOIRQ, buf, 8 );
GregCr 4:c6ef863d0b07 415 }
GregCr 4:c6ef863d0b07 416
GregCr 4:c6ef863d0b07 417 uint16_t SX126x::GetIrqStatus( void )
GregCr 4:c6ef863d0b07 418 {
GregCr 4:c6ef863d0b07 419 uint8_t irqStatus[2];
GregCr 4:c6ef863d0b07 420
GregCr 4:c6ef863d0b07 421 ReadCommand( RADIO_GET_IRQSTATUS, irqStatus, 2 );
GregCr 4:c6ef863d0b07 422 return ( irqStatus[0] << 8 ) | irqStatus[1];
GregCr 4:c6ef863d0b07 423 }
GregCr 4:c6ef863d0b07 424
GregCr 4:c6ef863d0b07 425 void SX126x::SetDio2AsRfSwitchCtrl( uint8_t enable )
GregCr 4:c6ef863d0b07 426 {
GregCr 4:c6ef863d0b07 427 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 428 printf("SetDio2AsRfSwitchCtrl ");
GregCr 4:c6ef863d0b07 429 #endif
GregCr 4:c6ef863d0b07 430 WriteCommand( RADIO_SET_RFSWITCHMODE, &enable, 1 );
GregCr 4:c6ef863d0b07 431 }
GregCr 4:c6ef863d0b07 432
GregCr 4:c6ef863d0b07 433 void SX126x::SetDio3AsTcxoCtrl( RadioTcxoCtrlVoltage_t tcxoVoltage, uint32_t timeout )
GregCr 4:c6ef863d0b07 434 {
GregCr 4:c6ef863d0b07 435 uint8_t buf[4];
GregCr 5:e488e6f185f3 436
GregCr 5:e488e6f185f3 437 buf[0] = tcxoVoltage & 0x07;
GregCr 4:c6ef863d0b07 438 buf[1] = ( uint8_t )( ( timeout >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 439 buf[2] = ( uint8_t )( ( timeout >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 440 buf[3] = ( uint8_t )( timeout & 0xFF );
GregCr 4:c6ef863d0b07 441
GregCr 4:c6ef863d0b07 442 WriteCommand( RADIO_SET_TCXOMODE, buf, 4 );
GregCr 4:c6ef863d0b07 443 }
GregCr 4:c6ef863d0b07 444
GregCr 4:c6ef863d0b07 445 void SX126x::SetRfFrequency( uint32_t frequency )
GregCr 4:c6ef863d0b07 446 {
GregCr 4:c6ef863d0b07 447 uint8_t buf[4];
GregCr 4:c6ef863d0b07 448 uint32_t freq = 0;
GregCr 4:c6ef863d0b07 449
GregCr 4:c6ef863d0b07 450 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 451 printf("SetRfFrequency ");
GregCr 4:c6ef863d0b07 452 #endif
GregCr 4:c6ef863d0b07 453
GregCr 5:e488e6f185f3 454 if( ImageCalibrated == false )
GregCr 5:e488e6f185f3 455 {
GregCr 5:e488e6f185f3 456 CalibrateImage( frequency );
GregCr 5:e488e6f185f3 457 ImageCalibrated = true;
GregCr 5:e488e6f185f3 458 }
GregCr 5:e488e6f185f3 459
GregCr 4:c6ef863d0b07 460 freq = ( uint32_t )( ( double )frequency / ( double )FREQ_STEP );
GregCr 4:c6ef863d0b07 461 buf[0] = ( uint8_t )( ( freq >> 24 ) & 0xFF );
GregCr 4:c6ef863d0b07 462 buf[1] = ( uint8_t )( ( freq >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 463 buf[2] = ( uint8_t )( ( freq >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 464 buf[3] = ( uint8_t )( freq & 0xFF );
GregCr 4:c6ef863d0b07 465 WriteCommand( RADIO_SET_RFFREQUENCY, buf, 4 );
GregCr 4:c6ef863d0b07 466 }
GregCr 4:c6ef863d0b07 467
GregCr 4:c6ef863d0b07 468 void SX126x::SetPacketType( RadioPacketTypes_t packetType )
GregCr 4:c6ef863d0b07 469 {
GregCr 4:c6ef863d0b07 470 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 471 printf("SetPacketType ");
GregCr 4:c6ef863d0b07 472 #endif
GregCr 4:c6ef863d0b07 473
GregCr 4:c6ef863d0b07 474 // Save packet type internally to avoid questioning the radio
GregCr 4:c6ef863d0b07 475 this->PacketType = packetType;
GregCr 4:c6ef863d0b07 476 WriteCommand( RADIO_SET_PACKETTYPE, ( uint8_t* )&packetType, 1 );
GregCr 4:c6ef863d0b07 477 }
GregCr 4:c6ef863d0b07 478
GregCr 4:c6ef863d0b07 479 RadioPacketTypes_t SX126x::GetPacketType( void )
GregCr 4:c6ef863d0b07 480 {
GregCr 4:c6ef863d0b07 481 return this->PacketType;
GregCr 4:c6ef863d0b07 482 }
GregCr 4:c6ef863d0b07 483
GregCr 4:c6ef863d0b07 484 void SX126x::SetTxParams( int8_t power, RadioRampTimes_t rampTime )
GregCr 4:c6ef863d0b07 485 {
GregCr 4:c6ef863d0b07 486 uint8_t buf[2];
GregCr 4:c6ef863d0b07 487 DigitalIn OPT( A3 );
GregCr 4:c6ef863d0b07 488
GregCr 4:c6ef863d0b07 489 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 490 printf("SetTxParams ");
GregCr 4:c6ef863d0b07 491 #endif
GregCr 4:c6ef863d0b07 492
GregCr 6:1e2345700991 493 if( GetDeviceType( ) == SX1261 )
GregCr 4:c6ef863d0b07 494 {
GregCr 4:c6ef863d0b07 495 if( power == 15 )
GregCr 0:deaafdfde3bb 496 {
GregCr 5:e488e6f185f3 497 SetPaConfig( 0x06, 0x00, 0x01, 0x01 );
GregCr 0:deaafdfde3bb 498 }
GregCr 4:c6ef863d0b07 499 else
GregCr 4:c6ef863d0b07 500 {
GregCr 5:e488e6f185f3 501 SetPaConfig( 0x04, 0x00, 0x01, 0x01 );
GregCr 4:c6ef863d0b07 502 }
GregCr 4:c6ef863d0b07 503 if( power >= 14 )
GregCr 4:c6ef863d0b07 504 {
GregCr 4:c6ef863d0b07 505 power = 14;
GregCr 5:e488e6f185f3 506 }
GregCr 4:c6ef863d0b07 507 else if( power < -3 )
GregCr 4:c6ef863d0b07 508 {
GregCr 4:c6ef863d0b07 509 power = -3;
GregCr 0:deaafdfde3bb 510 }
GregCr 5:e488e6f185f3 511 WriteReg( REG_OCP, 0x18 ); // current max is 80 mA for the whole device
GregCr 4:c6ef863d0b07 512 }
GregCr 6:1e2345700991 513 else // sx1262 or sx1268
GregCr 4:c6ef863d0b07 514 {
GregCr 4:c6ef863d0b07 515 SetPaConfig( 0x04, 0x07, 0x00, 0x01 );
GregCr 4:c6ef863d0b07 516 if( power > 22 )
GregCr 4:c6ef863d0b07 517 {
GregCr 4:c6ef863d0b07 518 power = 22;
GregCr 5:e488e6f185f3 519 }
GregCr 4:c6ef863d0b07 520 else if( power < -3 )
GregCr 4:c6ef863d0b07 521 {
GregCr 4:c6ef863d0b07 522 power = -3;
GregCr 4:c6ef863d0b07 523 }
GregCr 5:e488e6f185f3 524 WriteReg( REG_OCP, 0x38 ); // current max 160mA for the whole device
GregCr 4:c6ef863d0b07 525 }
GregCr 4:c6ef863d0b07 526 buf[0] = power;
GregCr 4:c6ef863d0b07 527 if( OPT == 0 )
GregCr 4:c6ef863d0b07 528 {
GregCr 4:c6ef863d0b07 529 if( ( uint8_t )rampTime < RADIO_RAMP_200_US )
GregCr 4:c6ef863d0b07 530 {
GregCr 4:c6ef863d0b07 531 buf[1] = RADIO_RAMP_200_US;
GregCr 4:c6ef863d0b07 532 }
GregCr 4:c6ef863d0b07 533 else
GregCr 4:c6ef863d0b07 534 {
GregCr 4:c6ef863d0b07 535 buf[1] = ( uint8_t )rampTime;
GregCr 0:deaafdfde3bb 536 }
GregCr 0:deaafdfde3bb 537 }
GregCr 0:deaafdfde3bb 538 else
GregCr 0:deaafdfde3bb 539 {
GregCr 4:c6ef863d0b07 540 buf[1] = ( uint8_t )rampTime;
GregCr 4:c6ef863d0b07 541 }
GregCr 4:c6ef863d0b07 542 WriteCommand( RADIO_SET_TXPARAMS, buf, 2 );
GregCr 4:c6ef863d0b07 543 }
GregCr 4:c6ef863d0b07 544
GregCr 4:c6ef863d0b07 545 void SX126x::SetModulationParams( ModulationParams_t *modulationParams )
GregCr 4:c6ef863d0b07 546 {
GregCr 4:c6ef863d0b07 547 uint8_t n;
GregCr 4:c6ef863d0b07 548 uint32_t tempVal = 0;
GregCr 4:c6ef863d0b07 549 uint8_t buf[8] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
GregCr 4:c6ef863d0b07 550
GregCr 4:c6ef863d0b07 551 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 552 printf("SetModulationParams ");
GregCr 4:c6ef863d0b07 553 #endif
GregCr 4:c6ef863d0b07 554
GregCr 4:c6ef863d0b07 555 // Check if required configuration corresponds to the stored packet type
GregCr 4:c6ef863d0b07 556 // If not, silently update radio packet type
GregCr 4:c6ef863d0b07 557 if( this->PacketType != modulationParams->PacketType )
GregCr 4:c6ef863d0b07 558 {
GregCr 4:c6ef863d0b07 559 this->SetPacketType( modulationParams->PacketType );
GregCr 0:deaafdfde3bb 560 }
GregCr 4:c6ef863d0b07 561
GregCr 4:c6ef863d0b07 562 switch( modulationParams->PacketType )
GregCr 4:c6ef863d0b07 563 {
GregCr 4:c6ef863d0b07 564 case PACKET_TYPE_GFSK:
GregCr 4:c6ef863d0b07 565 n = 8;
GregCr 4:c6ef863d0b07 566 tempVal = ( uint32_t )( 32 * ( ( double )XTAL_FREQ / ( double )modulationParams->Params.Gfsk.BitRate ) );
GregCr 4:c6ef863d0b07 567 buf[0] = ( tempVal >> 16 ) & 0xFF;
GregCr 4:c6ef863d0b07 568 buf[1] = ( tempVal >> 8 ) & 0xFF;
GregCr 4:c6ef863d0b07 569 buf[2] = tempVal & 0xFF;
GregCr 4:c6ef863d0b07 570 buf[3] = modulationParams->Params.Gfsk.ModulationShaping;
GregCr 4:c6ef863d0b07 571 buf[4] = modulationParams->Params.Gfsk.Bandwidth;
GregCr 4:c6ef863d0b07 572 tempVal = ( uint32_t )( ( double )modulationParams->Params.Gfsk.Fdev / ( double )FREQ_STEP );
GregCr 4:c6ef863d0b07 573 buf[5] = ( tempVal >> 16 ) & 0xFF;
GregCr 4:c6ef863d0b07 574 buf[6] = ( tempVal >> 8 ) & 0xFF;
GregCr 4:c6ef863d0b07 575 buf[7] = ( tempVal& 0xFF );
GregCr 4:c6ef863d0b07 576 break;
GregCr 4:c6ef863d0b07 577 case PACKET_TYPE_LORA:
GregCr 4:c6ef863d0b07 578 n = 4;
GregCr 4:c6ef863d0b07 579 switch( modulationParams->Params.LoRa.Bandwidth )
GregCr 4:c6ef863d0b07 580 {
GregCr 4:c6ef863d0b07 581 case LORA_BW_500:
GregCr 4:c6ef863d0b07 582 modulationParams->Params.LoRa.LowDatarateOptimize = 0x00;
GregCr 4:c6ef863d0b07 583 break;
GregCr 4:c6ef863d0b07 584 case LORA_BW_250:
GregCr 4:c6ef863d0b07 585 if( modulationParams->Params.LoRa.SpreadingFactor == 12 )
GregCr 4:c6ef863d0b07 586 {
GregCr 4:c6ef863d0b07 587 modulationParams->Params.LoRa.LowDatarateOptimize = 0x01;
GregCr 4:c6ef863d0b07 588 }
GregCr 4:c6ef863d0b07 589 else
GregCr 4:c6ef863d0b07 590 {
GregCr 4:c6ef863d0b07 591 modulationParams->Params.LoRa.LowDatarateOptimize = 0x00;
GregCr 4:c6ef863d0b07 592 }
GregCr 4:c6ef863d0b07 593 break;
GregCr 4:c6ef863d0b07 594 case LORA_BW_125:
GregCr 4:c6ef863d0b07 595 if( modulationParams->Params.LoRa.SpreadingFactor >= 11 )
GregCr 4:c6ef863d0b07 596 {
GregCr 4:c6ef863d0b07 597 modulationParams->Params.LoRa.LowDatarateOptimize = 0x01;
GregCr 4:c6ef863d0b07 598 }
GregCr 4:c6ef863d0b07 599 else
GregCr 4:c6ef863d0b07 600 {
GregCr 4:c6ef863d0b07 601 modulationParams->Params.LoRa.LowDatarateOptimize = 0x00;
GregCr 4:c6ef863d0b07 602 }
GregCr 4:c6ef863d0b07 603 break;
GregCr 4:c6ef863d0b07 604 case LORA_BW_062:
GregCr 4:c6ef863d0b07 605 if( modulationParams->Params.LoRa.SpreadingFactor >= 10 )
GregCr 4:c6ef863d0b07 606 {
GregCr 4:c6ef863d0b07 607 modulationParams->Params.LoRa.LowDatarateOptimize = 0x01;
GregCr 4:c6ef863d0b07 608 }
GregCr 4:c6ef863d0b07 609 else
GregCr 4:c6ef863d0b07 610 {
GregCr 4:c6ef863d0b07 611 modulationParams->Params.LoRa.LowDatarateOptimize = 0x00;
GregCr 4:c6ef863d0b07 612 }
GregCr 4:c6ef863d0b07 613 break;
GregCr 4:c6ef863d0b07 614 case LORA_BW_041:
GregCr 4:c6ef863d0b07 615 if( modulationParams->Params.LoRa.SpreadingFactor >= 9 )
GregCr 4:c6ef863d0b07 616 {
GregCr 4:c6ef863d0b07 617 modulationParams->Params.LoRa.LowDatarateOptimize = 0x01;
GregCr 4:c6ef863d0b07 618 }
GregCr 4:c6ef863d0b07 619 else
GregCr 4:c6ef863d0b07 620 {
GregCr 4:c6ef863d0b07 621 modulationParams->Params.LoRa.LowDatarateOptimize = 0x00;
GregCr 4:c6ef863d0b07 622 }
GregCr 4:c6ef863d0b07 623 break;
GregCr 4:c6ef863d0b07 624 case LORA_BW_031:
GregCr 4:c6ef863d0b07 625 case LORA_BW_020:
GregCr 4:c6ef863d0b07 626 case LORA_BW_015:
GregCr 4:c6ef863d0b07 627 case LORA_BW_010:
GregCr 4:c6ef863d0b07 628 case LORA_BW_007:
GregCr 4:c6ef863d0b07 629 modulationParams->Params.LoRa.LowDatarateOptimize = 0x01;
GregCr 4:c6ef863d0b07 630 break;
GregCr 4:c6ef863d0b07 631 default:
GregCr 4:c6ef863d0b07 632 break;
GregCr 4:c6ef863d0b07 633 }
GregCr 4:c6ef863d0b07 634 buf[0] = modulationParams->Params.LoRa.SpreadingFactor;
GregCr 4:c6ef863d0b07 635 buf[1] = modulationParams->Params.LoRa.Bandwidth;
GregCr 4:c6ef863d0b07 636 buf[2] = modulationParams->Params.LoRa.CodingRate;
GregCr 4:c6ef863d0b07 637 buf[3] = modulationParams->Params.LoRa.LowDatarateOptimize;
GregCr 4:c6ef863d0b07 638 break;
GregCr 4:c6ef863d0b07 639 default:
GregCr 4:c6ef863d0b07 640 case PACKET_TYPE_NONE:
GregCr 4:c6ef863d0b07 641 return;
GregCr 4:c6ef863d0b07 642 }
GregCr 4:c6ef863d0b07 643 WriteCommand( RADIO_SET_MODULATIONPARAMS, buf, n );
GregCr 0:deaafdfde3bb 644 }
GregCr 0:deaafdfde3bb 645
GregCr 4:c6ef863d0b07 646 void SX126x::SetPacketParams( PacketParams_t *packetParams )
GregCr 0:deaafdfde3bb 647 {
GregCr 4:c6ef863d0b07 648 uint8_t n;
GregCr 4:c6ef863d0b07 649 uint8_t crcVal = 0;
GregCr 4:c6ef863d0b07 650 uint8_t buf[9] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
GregCr 0:deaafdfde3bb 651
GregCr 4:c6ef863d0b07 652 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 653 printf("SetPacketParams ");
GregCr 4:c6ef863d0b07 654 #endif
GregCr 4:c6ef863d0b07 655
GregCr 4:c6ef863d0b07 656 // Check if required configuration corresponds to the stored packet type
GregCr 4:c6ef863d0b07 657 // If not, silently update radio packet type
GregCr 4:c6ef863d0b07 658 if( this->PacketType != packetParams->PacketType )
GregCr 0:deaafdfde3bb 659 {
GregCr 4:c6ef863d0b07 660 this->SetPacketType( packetParams->PacketType );
GregCr 0:deaafdfde3bb 661 }
GregCr 0:deaafdfde3bb 662
GregCr 4:c6ef863d0b07 663 switch( packetParams->PacketType )
GregCr 4:c6ef863d0b07 664 {
GregCr 4:c6ef863d0b07 665 case PACKET_TYPE_GFSK:
GregCr 4:c6ef863d0b07 666 if( packetParams->Params.Gfsk.CrcLength == RADIO_CRC_2_BYTES_IBM )
GregCr 4:c6ef863d0b07 667 {
GregCr 4:c6ef863d0b07 668 SetCrcSeed( CRC_IBM_SEED );
GregCr 4:c6ef863d0b07 669 SetCrcPolynomial( CRC_POLYNOMIAL_IBM );
GregCr 4:c6ef863d0b07 670 crcVal = RADIO_CRC_2_BYTES;
GregCr 4:c6ef863d0b07 671 }
GregCr 4:c6ef863d0b07 672 else if( packetParams->Params.Gfsk.CrcLength == RADIO_CRC_2_BYTES_CCIT )
GregCr 4:c6ef863d0b07 673 {
GregCr 4:c6ef863d0b07 674 SetCrcSeed( CRC_CCITT_SEED );
GregCr 4:c6ef863d0b07 675 SetCrcPolynomial( CRC_POLYNOMIAL_CCITT );
GregCr 4:c6ef863d0b07 676 crcVal = RADIO_CRC_2_BYTES_INV;
GregCr 4:c6ef863d0b07 677 }
GregCr 4:c6ef863d0b07 678 else
GregCr 4:c6ef863d0b07 679 {
GregCr 4:c6ef863d0b07 680 crcVal = packetParams->Params.Gfsk.CrcLength;
GregCr 4:c6ef863d0b07 681 }
GregCr 4:c6ef863d0b07 682 n = 9;
GregCr 4:c6ef863d0b07 683 // convert preamble length from byte to bit
GregCr 4:c6ef863d0b07 684 packetParams->Params.Gfsk.PreambleLength = packetParams->Params.Gfsk.PreambleLength << 3;
GregCr 4:c6ef863d0b07 685
GregCr 4:c6ef863d0b07 686 buf[0] = ( packetParams->Params.Gfsk.PreambleLength >> 8 ) & 0xFF;
GregCr 4:c6ef863d0b07 687 buf[1] = packetParams->Params.Gfsk.PreambleLength;
GregCr 4:c6ef863d0b07 688 buf[2] = packetParams->Params.Gfsk.PreambleMinDetect;
GregCr 4:c6ef863d0b07 689 buf[3] = ( packetParams->Params.Gfsk.SyncWordLength << 3 ); // convert from byte to bit
GregCr 4:c6ef863d0b07 690 buf[4] = packetParams->Params.Gfsk.AddrComp;
GregCr 4:c6ef863d0b07 691 buf[5] = packetParams->Params.Gfsk.HeaderType;
GregCr 4:c6ef863d0b07 692 buf[6] = packetParams->Params.Gfsk.PayloadLength;
GregCr 4:c6ef863d0b07 693 buf[7] = crcVal;
GregCr 4:c6ef863d0b07 694 buf[8] = packetParams->Params.Gfsk.DcFree;
GregCr 4:c6ef863d0b07 695 break;
GregCr 4:c6ef863d0b07 696 case PACKET_TYPE_LORA:
GregCr 4:c6ef863d0b07 697 n = 6;
GregCr 4:c6ef863d0b07 698 buf[0] = ( packetParams->Params.LoRa.PreambleLength >> 8 ) & 0xFF;
GregCr 4:c6ef863d0b07 699 buf[1] = packetParams->Params.LoRa.PreambleLength;
GregCr 4:c6ef863d0b07 700 buf[2] = packetParams->Params.LoRa.HeaderType;
GregCr 4:c6ef863d0b07 701 buf[3] = packetParams->Params.LoRa.PayloadLength;
GregCr 4:c6ef863d0b07 702 buf[4] = packetParams->Params.LoRa.CrcMode;
GregCr 4:c6ef863d0b07 703 buf[5] = packetParams->Params.LoRa.InvertIQ;
GregCr 4:c6ef863d0b07 704 break;
GregCr 4:c6ef863d0b07 705 default:
GregCr 4:c6ef863d0b07 706 case PACKET_TYPE_NONE:
GregCr 4:c6ef863d0b07 707 return;
GregCr 4:c6ef863d0b07 708 }
GregCr 4:c6ef863d0b07 709 WriteCommand( RADIO_SET_PACKETPARAMS, buf, n );
GregCr 4:c6ef863d0b07 710 }
GregCr 4:c6ef863d0b07 711
GregCr 4:c6ef863d0b07 712 void SX126x::SetCadParams( RadioLoRaCadSymbols_t cadSymbolNum, uint8_t cadDetPeak, uint8_t cadDetMin, RadioCadExitModes_t cadExitMode, uint32_t cadTimeout )
GregCr 4:c6ef863d0b07 713 {
GregCr 4:c6ef863d0b07 714 uint8_t buf[7];
GregCr 4:c6ef863d0b07 715
GregCr 4:c6ef863d0b07 716 buf[0] = ( uint8_t )cadSymbolNum;
GregCr 4:c6ef863d0b07 717 buf[1] = cadDetPeak;
GregCr 4:c6ef863d0b07 718 buf[2] = cadDetMin;
GregCr 4:c6ef863d0b07 719 buf[3] = ( uint8_t )cadExitMode;
GregCr 4:c6ef863d0b07 720 buf[4] = ( uint8_t )( ( cadTimeout >> 16 ) & 0xFF );
GregCr 4:c6ef863d0b07 721 buf[5] = ( uint8_t )( ( cadTimeout >> 8 ) & 0xFF );
GregCr 4:c6ef863d0b07 722 buf[6] = ( uint8_t )( cadTimeout & 0xFF );
GregCr 5:e488e6f185f3 723 WriteCommand( RADIO_SET_CADPARAMS, buf, 7 );
GregCr 4:c6ef863d0b07 724 OperatingMode = MODE_CAD;
GregCr 4:c6ef863d0b07 725 }
GregCr 4:c6ef863d0b07 726
GregCr 4:c6ef863d0b07 727 void SX126x::SetBufferBaseAddresses( uint8_t txBaseAddress, uint8_t rxBaseAddress )
GregCr 4:c6ef863d0b07 728 {
GregCr 4:c6ef863d0b07 729 uint8_t buf[2];
GregCr 4:c6ef863d0b07 730
GregCr 4:c6ef863d0b07 731 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 732 printf("SetBufferBaseAddresses ");
GregCr 4:c6ef863d0b07 733 #endif
GregCr 4:c6ef863d0b07 734
GregCr 4:c6ef863d0b07 735 buf[0] = txBaseAddress;
GregCr 4:c6ef863d0b07 736 buf[1] = rxBaseAddress;
GregCr 4:c6ef863d0b07 737 WriteCommand( RADIO_SET_BUFFERBASEADDRESS, buf, 2 );
GregCr 4:c6ef863d0b07 738 }
GregCr 4:c6ef863d0b07 739
GregCr 4:c6ef863d0b07 740 RadioStatus_t SX126x::GetStatus( void )
GregCr 4:c6ef863d0b07 741 {
GregCr 4:c6ef863d0b07 742 uint8_t stat = 0;
GregCr 4:c6ef863d0b07 743 RadioStatus_t status;
GregCr 4:c6ef863d0b07 744
GregCr 4:c6ef863d0b07 745 ReadCommand( RADIO_GET_STATUS, ( uint8_t * )&stat, 1 );
GregCr 4:c6ef863d0b07 746 status.Value = stat;
GregCr 4:c6ef863d0b07 747 return status;
GregCr 4:c6ef863d0b07 748 }
GregCr 4:c6ef863d0b07 749
GregCr 4:c6ef863d0b07 750 int8_t SX126x::GetRssiInst( void )
GregCr 4:c6ef863d0b07 751 {
GregCr 5:e488e6f185f3 752 uint8_t rssi;
GregCr 4:c6ef863d0b07 753
GregCr 4:c6ef863d0b07 754 ReadCommand( RADIO_GET_RSSIINST, ( uint8_t* )&rssi, 1 );
GregCr 4:c6ef863d0b07 755 return( -( rssi / 2 ) );
GregCr 4:c6ef863d0b07 756 }
GregCr 4:c6ef863d0b07 757
GregCr 4:c6ef863d0b07 758 void SX126x::GetRxBufferStatus( uint8_t *payloadLength, uint8_t *rxStartBufferPointer )
GregCr 4:c6ef863d0b07 759 {
GregCr 4:c6ef863d0b07 760 uint8_t status[2];
GregCr 4:c6ef863d0b07 761
GregCr 4:c6ef863d0b07 762 ReadCommand( RADIO_GET_RXBUFFERSTATUS, status, 2 );
GregCr 4:c6ef863d0b07 763
GregCr 4:c6ef863d0b07 764 // In case of LORA fixed header, the payloadLength is obtained by reading
GregCr 4:c6ef863d0b07 765 // the register REG_LR_PAYLOADLENGTH
GregCr 4:c6ef863d0b07 766 if( ( this->GetPacketType( ) == PACKET_TYPE_LORA ) && ( ReadReg( REG_LR_PACKETPARAMS ) >> 7 == 1 ) )
GregCr 4:c6ef863d0b07 767 {
GregCr 4:c6ef863d0b07 768 *payloadLength = ReadReg( REG_LR_PAYLOADLENGTH );
GregCr 4:c6ef863d0b07 769 }
GregCr 4:c6ef863d0b07 770 else
GregCr 4:c6ef863d0b07 771 {
GregCr 4:c6ef863d0b07 772 *payloadLength = status[0];
GregCr 4:c6ef863d0b07 773 }
GregCr 4:c6ef863d0b07 774 *rxStartBufferPointer = status[1];
GregCr 4:c6ef863d0b07 775 }
GregCr 4:c6ef863d0b07 776
GregCr 4:c6ef863d0b07 777 void SX126x::GetPacketStatus( PacketStatus_t *pktStatus )
GregCr 4:c6ef863d0b07 778 {
GregCr 4:c6ef863d0b07 779 uint8_t status[3];
GregCr 4:c6ef863d0b07 780
GregCr 4:c6ef863d0b07 781 ReadCommand( RADIO_GET_PACKETSTATUS, status, 3 );
GregCr 4:c6ef863d0b07 782
GregCr 4:c6ef863d0b07 783 pktStatus->packetType = this -> GetPacketType( );
GregCr 4:c6ef863d0b07 784 switch( pktStatus->packetType )
GregCr 4:c6ef863d0b07 785 {
GregCr 4:c6ef863d0b07 786 case PACKET_TYPE_GFSK:
GregCr 4:c6ef863d0b07 787 pktStatus->Params.Gfsk.RxStatus = status[0];
GregCr 4:c6ef863d0b07 788 pktStatus->Params.Gfsk.RssiSync = -status[1] / 2;
GregCr 4:c6ef863d0b07 789 pktStatus->Params.Gfsk.RssiAvg = -status[2] / 2;
GregCr 4:c6ef863d0b07 790 pktStatus->Params.Gfsk.FreqError = 0;
GregCr 4:c6ef863d0b07 791 break;
GregCr 4:c6ef863d0b07 792
GregCr 4:c6ef863d0b07 793 case PACKET_TYPE_LORA:
GregCr 4:c6ef863d0b07 794 pktStatus->Params.LoRa.RssiPkt = -status[0] / 2;
GregCr 4:c6ef863d0b07 795 ( status[1] < 128 ) ? ( pktStatus->Params.LoRa.SnrPkt = status[1] / 4 ) : ( pktStatus->Params.LoRa.SnrPkt = ( ( status[1] - 256 ) /4 ) );
GregCr 4:c6ef863d0b07 796 pktStatus->Params.LoRa.SignalRssiPkt = -status[2] / 2;
GregCr 4:c6ef863d0b07 797 pktStatus->Params.LoRa.FreqError = FrequencyError;
GregCr 4:c6ef863d0b07 798 break;
GregCr 4:c6ef863d0b07 799
GregCr 4:c6ef863d0b07 800 default:
GregCr 4:c6ef863d0b07 801 case PACKET_TYPE_NONE:
GregCr 4:c6ef863d0b07 802 // In that specific case, we set everything in the pktStatus to zeros
GregCr 4:c6ef863d0b07 803 // and reset the packet type accordingly
GregCr 4:c6ef863d0b07 804 memset( pktStatus, 0, sizeof( PacketStatus_t ) );
GregCr 4:c6ef863d0b07 805 pktStatus->packetType = PACKET_TYPE_NONE;
GregCr 4:c6ef863d0b07 806 break;
GregCr 4:c6ef863d0b07 807 }
GregCr 4:c6ef863d0b07 808 }
GregCr 4:c6ef863d0b07 809
GregCr 4:c6ef863d0b07 810 RadioError_t SX126x::GetDeviceErrors( void )
GregCr 4:c6ef863d0b07 811 {
GregCr 4:c6ef863d0b07 812 RadioError_t error;
GregCr 4:c6ef863d0b07 813
GregCr 4:c6ef863d0b07 814 ReadCommand( RADIO_GET_ERROR, ( uint8_t * )&error, 2 );
GregCr 5:e488e6f185f3 815 return error;
GregCr 4:c6ef863d0b07 816 }
GregCr 4:c6ef863d0b07 817
GregCr 4:c6ef863d0b07 818 void SX126x::ClearIrqStatus( uint16_t irq )
GregCr 4:c6ef863d0b07 819 {
GregCr 4:c6ef863d0b07 820 uint8_t buf[2];
GregCr 4:c6ef863d0b07 821 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 822 printf("ClearIrqStatus ");
GregCr 4:c6ef863d0b07 823 #endif
GregCr 4:c6ef863d0b07 824 buf[0] = ( uint8_t )( ( ( uint16_t )irq >> 8 ) & 0x00FF );
GregCr 4:c6ef863d0b07 825 buf[1] = ( uint8_t )( ( uint16_t )irq & 0x00FF );
GregCr 4:c6ef863d0b07 826 WriteCommand( RADIO_CLR_IRQSTATUS, buf, 2 );
GregCr 4:c6ef863d0b07 827 }
GregCr 4:c6ef863d0b07 828
GregCr 4:c6ef863d0b07 829 void SX126x::SetPollingMode( void )
GregCr 4:c6ef863d0b07 830 {
GregCr 4:c6ef863d0b07 831 this->PollingMode = true;
GregCr 4:c6ef863d0b07 832 }
GregCr 4:c6ef863d0b07 833
GregCr 4:c6ef863d0b07 834 void SX126x::SetInterruptMode( void )
GregCr 4:c6ef863d0b07 835 {
GregCr 4:c6ef863d0b07 836 this->PollingMode = false;
GregCr 0:deaafdfde3bb 837 }
GregCr 0:deaafdfde3bb 838
GregCr 2:4ff11ea92fbe 839 void SX126x::OnDioIrq( void )
GregCr 0:deaafdfde3bb 840 {
GregCr 4:c6ef863d0b07 841 /*
GregCr 4:c6ef863d0b07 842 * When polling mode is activated, it is up to the application to call
GregCr 4:c6ef863d0b07 843 * ProcessIrqs( ). Otherwise, the driver automatically calls ProcessIrqs( )
GregCr 4:c6ef863d0b07 844 * on radio interrupt.
GregCr 4:c6ef863d0b07 845 */
GregCr 4:c6ef863d0b07 846 if( this->PollingMode == true )
GregCr 4:c6ef863d0b07 847 {
GregCr 4:c6ef863d0b07 848 this->IrqState = true;
GregCr 4:c6ef863d0b07 849 }
GregCr 4:c6ef863d0b07 850 else
GregCr 0:deaafdfde3bb 851 {
GregCr 4:c6ef863d0b07 852 this->ProcessIrqs( );
GregCr 4:c6ef863d0b07 853 }
GregCr 4:c6ef863d0b07 854 }
GregCr 4:c6ef863d0b07 855
GregCr 4:c6ef863d0b07 856 void SX126x::ProcessIrqs( void )
GregCr 4:c6ef863d0b07 857 {
GregCr 4:c6ef863d0b07 858 if( this->PollingMode == true )
GregCr 4:c6ef863d0b07 859 {
GregCr 4:c6ef863d0b07 860 if( this->IrqState == true )
GregCr 4:c6ef863d0b07 861 {
GregCr 4:c6ef863d0b07 862 __disable_irq( );
GregCr 4:c6ef863d0b07 863 this->IrqState = false;
GregCr 4:c6ef863d0b07 864 __enable_irq( );
GregCr 4:c6ef863d0b07 865 }
GregCr 4:c6ef863d0b07 866 else
GregCr 4:c6ef863d0b07 867 {
GregCr 4:c6ef863d0b07 868 return;
GregCr 4:c6ef863d0b07 869 }
GregCr 0:deaafdfde3bb 870 }
GregCr 3:7e3595a9ebe0 871
GregCr 0:deaafdfde3bb 872 uint16_t irqRegs = GetIrqStatus( );
GregCr 0:deaafdfde3bb 873 ClearIrqStatus( IRQ_RADIO_ALL );
GregCr 0:deaafdfde3bb 874
GregCr 4:c6ef863d0b07 875 #ifdef ADV_DEBUG
GregCr 4:c6ef863d0b07 876 printf("0x%04x\n\r", irqRegs );
GregCr 4:c6ef863d0b07 877 #endif
GregCr 0:deaafdfde3bb 878
GregCr 4:c6ef863d0b07 879 if( ( irqRegs & IRQ_HEADER_VALID ) == IRQ_HEADER_VALID )
GregCr 0:deaafdfde3bb 880 {
GregCr 4:c6ef863d0b07 881 // LoRa Only
GregCr 5:e488e6f185f3 882 FrequencyError = 0x000000 | ( ( 0x0F & ReadReg( REG_FREQUENCY_ERRORBASEADDR ) ) << 16 );
GregCr 5:e488e6f185f3 883 FrequencyError = FrequencyError | ( ReadReg( REG_FREQUENCY_ERRORBASEADDR + 1 ) << 8 );
GregCr 5:e488e6f185f3 884 FrequencyError = FrequencyError | ( ReadReg( REG_FREQUENCY_ERRORBASEADDR + 2 ) );
GregCr 4:c6ef863d0b07 885 }
GregCr 0:deaafdfde3bb 886
GregCr 3:7e3595a9ebe0 887 if( ( irqRegs & IRQ_TX_DONE ) == IRQ_TX_DONE )
GregCr 0:deaafdfde3bb 888 {
GregCr 0:deaafdfde3bb 889 if( txDone != NULL )
GregCr 0:deaafdfde3bb 890 {
GregCr 0:deaafdfde3bb 891 txDone( );
GregCr 0:deaafdfde3bb 892 }
GregCr 0:deaafdfde3bb 893 }
GregCr 0:deaafdfde3bb 894
GregCr 3:7e3595a9ebe0 895 if( ( irqRegs & IRQ_RX_DONE ) == IRQ_RX_DONE )
GregCr 0:deaafdfde3bb 896 {
GregCr 3:7e3595a9ebe0 897 if( ( irqRegs & IRQ_CRC_ERROR ) == IRQ_CRC_ERROR )
GregCr 0:deaafdfde3bb 898 {
GregCr 3:7e3595a9ebe0 899 if( rxError != NULL )
GregCr 3:7e3595a9ebe0 900 {
GregCr 3:7e3595a9ebe0 901 rxError( IRQ_CRC_ERROR_CODE );
GregCr 3:7e3595a9ebe0 902 }
GregCr 3:7e3595a9ebe0 903 }
GregCr 3:7e3595a9ebe0 904 else
GregCr 3:7e3595a9ebe0 905 {
GregCr 3:7e3595a9ebe0 906 if( rxDone != NULL )
GregCr 3:7e3595a9ebe0 907 {
GregCr 3:7e3595a9ebe0 908 rxDone( );
GregCr 3:7e3595a9ebe0 909 }
GregCr 0:deaafdfde3bb 910 }
GregCr 0:deaafdfde3bb 911 }
GregCr 0:deaafdfde3bb 912
GregCr 4:c6ef863d0b07 913 if( ( irqRegs & IRQ_CAD_DONE ) == IRQ_CAD_DONE )
GregCr 4:c6ef863d0b07 914 {
GregCr 4:c6ef863d0b07 915 if( cadDone != NULL )
GregCr 4:c6ef863d0b07 916 {
GregCr 4:c6ef863d0b07 917 cadDone( ( irqRegs & IRQ_CAD_ACTIVITY_DETECTED ) == IRQ_CAD_ACTIVITY_DETECTED );
GregCr 4:c6ef863d0b07 918 }
GregCr 4:c6ef863d0b07 919 }
GregCr 4:c6ef863d0b07 920
GregCr 3:7e3595a9ebe0 921 if( ( irqRegs & IRQ_RX_TX_TIMEOUT ) == IRQ_RX_TX_TIMEOUT )
GregCr 3:7e3595a9ebe0 922 {
GregCr 4:c6ef863d0b07 923 if( ( txTimeout != NULL ) && ( OperatingMode == MODE_TX ) )
GregCr 3:7e3595a9ebe0 924 {
GregCr 4:c6ef863d0b07 925 txTimeout( );
GregCr 3:7e3595a9ebe0 926 }
GregCr 4:c6ef863d0b07 927 else if( ( rxTimeout != NULL ) && ( OperatingMode == MODE_RX ) )
GregCr 3:7e3595a9ebe0 928 {
GregCr 4:c6ef863d0b07 929 rxTimeout( );
GregCr 3:7e3595a9ebe0 930 }
GregCr 3:7e3595a9ebe0 931 else
GregCr 3:7e3595a9ebe0 932 {
GregCr 4:c6ef863d0b07 933 assert_param( FAIL );
GregCr 3:7e3595a9ebe0 934 }
GregCr 3:7e3595a9ebe0 935 }
GregCr 3:7e3595a9ebe0 936
GregCr 3:7e3595a9ebe0 937 /*
GregCr 0:deaafdfde3bb 938 //IRQ_PREAMBLE_DETECTED = 0x0004,
GregCr 0:deaafdfde3bb 939 if( irqRegs & IRQ_PREAMBLE_DETECTED )
GregCr 0:deaafdfde3bb 940 {
GregCr 0:deaafdfde3bb 941 if( rxPblSyncWordHeader != NULL )
GregCr 0:deaafdfde3bb 942 {
GregCr 0:deaafdfde3bb 943 rxPblSyncWordHeader( IRQ_PBL_DETECT_CODE);
GregCr 3:7e3595a9ebe0 944
GregCr 0:deaafdfde3bb 945 }
GregCr 0:deaafdfde3bb 946 }
GregCr 0:deaafdfde3bb 947
GregCr 0:deaafdfde3bb 948 //IRQ_SYNCWORD_VALID = 0x0008,
GregCr 0:deaafdfde3bb 949 if( irqRegs & IRQ_SYNCWORD_VALID )
GregCr 0:deaafdfde3bb 950 {
GregCr 0:deaafdfde3bb 951 if( rxPblSyncWordHeader != NULL )
GregCr 0:deaafdfde3bb 952 {
GregCr 0:deaafdfde3bb 953 rxPblSyncWordHeader( IRQ_SYNCWORD_VALID_CODE );
GregCr 0:deaafdfde3bb 954 }
GregCr 0:deaafdfde3bb 955 }
GregCr 0:deaafdfde3bb 956
GregCr 0:deaafdfde3bb 957 //IRQ_HEADER_VALID = 0x0010,
GregCr 0:deaafdfde3bb 958 if ( irqRegs & IRQ_HEADER_VALID )
GregCr 0:deaafdfde3bb 959 {
GregCr 0:deaafdfde3bb 960 if( rxPblSyncWordHeader != NULL )
GregCr 0:deaafdfde3bb 961 {
GregCr 3:7e3595a9ebe0 962 rxPblSyncWordHeader( IRQ_HEADER_VALID_CODE );
GregCr 0:deaafdfde3bb 963 }
GregCr 0:deaafdfde3bb 964 }
GregCr 0:deaafdfde3bb 965
GregCr 4:c6ef863d0b07 966 //IRQ_HEADER_ERROR = 0x0020,
GregCr 0:deaafdfde3bb 967 if( irqRegs & IRQ_HEADER_ERROR )
GregCr 0:deaafdfde3bb 968 {
GregCr 0:deaafdfde3bb 969 if( rxError != NULL )
GregCr 0:deaafdfde3bb 970 {
GregCr 0:deaafdfde3bb 971 rxError( IRQ_HEADER_ERROR_CODE );
GregCr 0:deaafdfde3bb 972 }
GregCr 0:deaafdfde3bb 973 }
GregCr 4:c6ef863d0b07 974 */
GregCr 0:deaafdfde3bb 975 }
GregCr 0:deaafdfde3bb 976
GregCr 0:deaafdfde3bb 977
GregCr 0:deaafdfde3bb 978