USBHOST lib for STM

Dependents:   door-access-controller-dev

Embed: (wiki syntax)

« Back to documentation index

Show/hide line numbers USBHostTypes.h Source File

USBHostTypes.h

00001 /* mbed USBHost Library
00002  * Copyright (c) 2006-2013 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 #ifndef USB_INC_H
00018 #define USB_INC_H
00019 
00020 #include "mbed.h"
00021 #include "mbed_toolchain.h"
00022 
00023 enum USB_TYPE {
00024     USB_TYPE_OK = 0,
00025 
00026     // completion code
00027     USB_TYPE_CRC_ERROR = 1,
00028     USB_TYPE_BIT_STUFFING_ERROR = 2,
00029     USB_TYPE_DATA_TOGGLE_MISMATCH_ERROR = 3,
00030     USB_TYPE_STALL_ERROR = 4,
00031     USB_TYPE_DEVICE_NOT_RESPONDING_ERROR = 5,
00032     USB_TYPE_PID_CHECK_FAILURE_ERROR = 6,
00033     USB_TYPE_UNEXPECTED_PID_ERROR = 7,
00034     USB_TYPE_DATA_OVERRUN_ERROR = 8,
00035     USB_TYPE_DATA_UNDERRUN_ERROR = 9,
00036     USB_TYPE_RESERVED = 9,
00037     USB_TYPE_RESERVED_ = 10,
00038     USB_TYPE_BUFFER_OVERRUN_ERROR = 12,
00039     USB_TYPE_BUFFER_UNDERRUN_ERROR = 13,
00040 
00041     // general usb state
00042     USB_TYPE_DISCONNECTED = 14,
00043     USB_TYPE_FREE = 15,
00044     USB_TYPE_IDLE = 16,
00045     USB_TYPE_PROCESSING = 17,
00046 
00047     USB_TYPE_ERROR = 18,
00048 };
00049 
00050 
00051 enum ENDPOINT_DIRECTION {
00052     OUT = 1,
00053     IN
00054 };
00055 
00056 enum ENDPOINT_TYPE {
00057     CONTROL_ENDPOINT = 0,
00058     ISOCHRONOUS_ENDPOINT,
00059     BULK_ENDPOINT,
00060     INTERRUPT_ENDPOINT
00061 };
00062 
00063 #define AUDIO_CLASS     0x01
00064 #define CDC_CLASS       0x02
00065 #define HID_CLASS       0x03
00066 #define MSD_CLASS       0x08
00067 #define HUB_CLASS       0x09
00068 #define SERIAL_CLASS    0x0A
00069 
00070 #if !defined(USBHOST_OTHER)
00071 // ------------------ HcControl Register ---------------------
00072 #define  OR_CONTROL_PLE                 0x00000004
00073 #define  OR_CONTROL_CLE                 0x00000010
00074 #define  OR_CONTROL_BLE                 0x00000020
00075 #define  OR_CONTROL_HCFS                0x000000C0
00076 #define  OR_CONTROL_HC_RSET             0x00000000
00077 #define  OR_CONTROL_HC_RES              0x00000040
00078 #define  OR_CONTROL_HC_OPER             0x00000080
00079 #define  OR_CONTROL_HC_SUSP             0x000000C0
00080 // ----------------- HcCommandStatus Register -----------------
00081 #define  OR_CMD_STATUS_HCR              0x00000001
00082 #define  OR_CMD_STATUS_CLF              0x00000002
00083 #define  OR_CMD_STATUS_BLF              0x00000004
00084 // --------------- HcInterruptStatus Register -----------------
00085 #define  OR_INTR_STATUS_WDH             0x00000002
00086 #define  OR_INTR_STATUS_RHSC            0x00000040
00087 #define  OR_INTR_STATUS_UE              0x00000010
00088 // --------------- HcInterruptEnable Register -----------------
00089 #define  OR_INTR_ENABLE_WDH             0x00000002
00090 #define  OR_INTR_ENABLE_RHSC            0x00000040
00091 #define  OR_INTR_ENABLE_MIE             0x80000000
00092 // ---------------- HcRhDescriptorA Register ------------------
00093 #define  OR_RH_STATUS_LPSC              0x00010000
00094 #define  OR_RH_STATUS_DRWE              0x00008000
00095 // -------------- HcRhPortStatus[1:NDP] Register --------------
00096 #define  OR_RH_PORT_CCS                 0x00000001
00097 #define  OR_RH_PORT_PRS                 0x00000010
00098 #define  OR_RH_PORT_CSC                 0x00010000
00099 #define  OR_RH_PORT_PRSC                0x00100000
00100 #define  OR_RH_PORT_LSDA                0x00000200
00101 #define  OR_RH_PORT_PESC                0x00020000
00102 #define  OR_RH_PORT_OCIC                0x00080000
00103 
00104 #define  FI                     0x2EDF           // 12000 bits per frame (-1)
00105 #define  DEFAULT_FMINTERVAL     ((((6 * (FI - 210)) / 7) << 16) | FI)
00106 
00107 #define  ED_SKIP            (uint32_t) (0x00001000)        // Skip this ep in queue
00108 
00109 #define  TD_ROUNDING        (uint32_t) (0x00040000)        // Buffer Rounding
00110 #define  TD_SETUP           (uint32_t)(0)                  // Direction of Setup Packet
00111 #define  TD_IN              (uint32_t)(0x00100000)         // Direction In
00112 #define  TD_OUT             (uint32_t)(0x00080000)         // Direction Out
00113 #define  TD_DELAY_INT(x)    (uint32_t)((x) << 21)          // Delay Interrupt
00114 #define  TD_TOGGLE_0        (uint32_t)(0x02000000)         // Toggle 0
00115 #define  TD_TOGGLE_1        (uint32_t)(0x03000000)         // Toggle 1
00116 #define  TD_CC              (uint32_t)(0xF0000000)         // Completion Code
00117 
00118 #else
00119 
00120 #define TD_TIMEOUT_CTRL  100
00121 #define TD_TIMEOUT  2000
00122 #define  TD_SETUP           (uint32_t)(0)                  // Direction of Setup Packet
00123 #define  TD_IN              (uint32_t)(0x00100000)         // Direction In
00124 #define  TD_OUT             (uint32_t)(0x00080000)         // Direction Out
00125 
00126 #endif
00127 #define  DEVICE_DESCRIPTOR                     (1)
00128 #define  CONFIGURATION_DESCRIPTOR              (2)
00129 #define  INTERFACE_DESCRIPTOR                  (4)
00130 #define  ENDPOINT_DESCRIPTOR                   (5)
00131 #define  HID_DESCRIPTOR                        (33)
00132 
00133 //  ----------- Control RequestType Fields  -----------
00134 #define  USB_DEVICE_TO_HOST         0x80
00135 #define  USB_HOST_TO_DEVICE         0x00
00136 #define  USB_REQUEST_TYPE_CLASS     0x20
00137 #define  USB_REQUEST_TYPE_STANDARD  0x00
00138 #define  USB_RECIPIENT_DEVICE       0x00
00139 #define  USB_RECIPIENT_INTERFACE    0x01
00140 #define  USB_RECIPIENT_ENDPOINT     0x02
00141 
00142 // -------------- USB Standard Requests  --------------
00143 #define  SET_ADDRESS                0x05
00144 #define  GET_DESCRIPTOR             0x06
00145 #define  SET_CONFIGURATION          0x09
00146 #define  SET_INTERFACE              0x0b
00147 #define  CLEAR_FEATURE              0x01
00148 
00149 // -------------- USB Descriptor Length  --------------
00150 #define DEVICE_DESCRIPTOR_LENGTH            0x12
00151 #define CONFIGURATION_DESCRIPTOR_LENGTH     0x09
00152 
00153 // ------------ HostController Transfer Descriptor ------------
00154 #if defined(USBHOST_OTHER)
00155 
00156 typedef struct hcTd {
00157     __IO  uint32_t state;
00158     __IO  uint8_t *  currBufPtr;    // Physical address of current buffer pointer
00159     __IO  hcTd *     nextTD;         // Physical pointer to next Transfer Descriptor
00160     __IO  uint32_t   size;        // size of buffer
00161     void * ep;                      // ep address where a td is linked in
00162     __IO  uint32_t retry;
00163     __IO  uint32_t setup;
00164 } PACKED HCTD;
00165 // ----------- HostController EndPoint Descriptor -------------
00166 typedef struct hcEd {
00167   uint8_t ch_num;
00168   void *hhcd;
00169 } PACKED HCED;
00170 // ----------- Host Controller Communication Area ------------
00171 #define HCCA   void
00172 
00173 
00174 #else 
00175 // -------------OHCI register --------------------------------
00176 // ------------ HostController Transfer Descriptor ------------
00177 typedef struct hcTd {
00178     __IO  uint32_t   control;        // Transfer descriptor control
00179     __IO  uint8_t *  currBufPtr;    // Physical address of current buffer pointer
00180     __IO  hcTd *     nextTD;         // Physical pointer to next Transfer Descriptor
00181     __IO  uint8_t *  bufEnd;        // Physical address of end of buffer
00182     void * ep;                      // ep address where a td is linked in
00183     uint32_t dummy[3];              // padding
00184 } PACKED HCTD;
00185 // ----------- HostController EndPoint Descriptor -------------
00186 typedef struct hcEd {
00187     __IO  uint32_t  control;        // Endpoint descriptor control
00188     __IO  HCTD *  tailTD;           // Physical address of tail in Transfer descriptor list
00189     __IO  HCTD *  headTD;           // Physcial address of head in Transfer descriptor list
00190     __IO  hcEd *  nextED;         // Physical address of next Endpoint descriptor
00191 } PACKED HCED;
00192 // ----------- Host Controller Communication Area ------------
00193 typedef struct hcca {
00194     __IO  uint32_t  IntTable[32];   // Interrupt Table
00195     __IO  uint32_t  FrameNumber;    // Frame Number
00196     __IO  uint32_t  DoneHead;       // Done Head
00197     volatile  uint8_t   Reserved[116];  // Reserved for future use
00198     volatile  uint8_t   Unknown[4];     // Unused
00199 } PACKED HCCA;
00200 #endif
00201 
00202 typedef struct {
00203     uint8_t bLength;
00204     uint8_t bDescriptorType;
00205     uint16_t bcdUSB;
00206     uint8_t bDeviceClass;
00207     uint8_t bDeviceSubClass;
00208     uint8_t bDeviceProtocol;
00209     uint8_t bMaxPacketSize;
00210     uint16_t idVendor;
00211     uint16_t idProduct;
00212     uint16_t bcdDevice;
00213     uint8_t iManufacturer;
00214     uint8_t iProduct;
00215     uint8_t iSerialNumber;
00216     uint8_t bNumConfigurations;
00217 } PACKED DeviceDescriptor;
00218 
00219 typedef struct {
00220     uint8_t bLength;
00221     uint8_t bDescriptorType;
00222     uint16_t wTotalLength;
00223     uint8_t bNumInterfaces;
00224     uint8_t bConfigurationValue;
00225     uint8_t iConfiguration;
00226     uint8_t bmAttributes;
00227     uint8_t bMaxPower;
00228 } PACKED ConfigurationDescriptor;
00229 
00230 typedef struct {
00231     uint8_t bLength;
00232     uint8_t bDescriptorType;
00233     uint8_t bInterfaceNumber;
00234     uint8_t bAlternateSetting;
00235     uint8_t bNumEndpoints;
00236     uint8_t bInterfaceClass;
00237     uint8_t bInterfaceSubClass;
00238     uint8_t bInterfaceProtocol;
00239     uint8_t iInterface;
00240 } InterfaceDescriptor;
00241 
00242 typedef struct {
00243     uint8_t bLength;
00244     uint8_t bDescriptorType;
00245     uint8_t bEndpointAddress;
00246     uint8_t bmAttributes;
00247     uint16_t wMaxPacketSize;
00248     uint8_t bInterval;
00249 } EndpointDescriptor;
00250 
00251 typedef struct {
00252     uint8_t bDescLength;
00253     uint8_t bDescriptorType;
00254     uint8_t bNbrPorts;
00255     uint16_t wHubCharacteristics;
00256     uint8_t bPwrOn2PwrGood;
00257     uint8_t bHubContrCurrent;
00258     uint8_t DeviceRemovable;
00259     uint8_t PortPweCtrlMak;
00260 } HubDescriptor;
00261 
00262 #endif