Tilt_IKS01A2 - Example of tilt detection for LSM6DSL in X-NUCLEO…

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Example of tilt detection for LSM6DSL in X-NUCLEO-IKS01A2

Fork of Tilt_IKS01A2 by ST Expansion SW Team

Tilt Detection Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

Main function is to show how to detect the tilt event using the sensor expansion board and send a notification using UART to a connected PC or Desktop and display it on terminal applications like TeraTerm.
After connection has been established:
- the user can try to tilt the board and then view the notification using an hyper terminal. When the tilt event is detected, the LED is switched on for a while.
- the user button can be used to enable/disable the tilt detection feature.

X_NUCLEO_IKS01A2/Components/LSM303AGRSensor/LSM303AGR_ACC_driver.h@0:489965565a0d, 2016-08-12 (annotated)

Committer:: cparata
Date:: Fri Aug 12 13:42:49 2016 +0000
Revision:: 0:489965565a0d

First release of Tilt Detection for LSM6DSL in IKS01A2

Who changed what in which revision?

User	Revision	Line number	New contents of line
cparata	0:489965565a0d	1	/**
cparata	0:489965565a0d	2	******************************************************************************
cparata	0:489965565a0d	3	* @file LSM303AGR_ACC_driver.h
cparata	0:489965565a0d	4	* @author MEMS Application Team
cparata	0:489965565a0d	5	* @version V1.1
cparata	0:489965565a0d	6	* @date 24-February-2016
cparata	0:489965565a0d	7	* @brief LSM303AGR Accelerometer header driver file
cparata	0:489965565a0d	8	******************************************************************************
cparata	0:489965565a0d	9	* @attention
cparata	0:489965565a0d	10	*
cparata	0:489965565a0d	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
cparata	0:489965565a0d	12	*
cparata	0:489965565a0d	13	* Redistribution and use in source and binary forms, with or without modification,
cparata	0:489965565a0d	14	* are permitted provided that the following conditions are met:
cparata	0:489965565a0d	15	* 1. Redistributions of source code must retain the above copyright notice,
cparata	0:489965565a0d	16	* this list of conditions and the following disclaimer.
cparata	0:489965565a0d	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
cparata	0:489965565a0d	18	* this list of conditions and the following disclaimer in the documentation
cparata	0:489965565a0d	19	* and/or other materials provided with the distribution.
cparata	0:489965565a0d	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata	0:489965565a0d	21	* may be used to endorse or promote products derived from this software
cparata	0:489965565a0d	22	* without specific prior written permission.
cparata	0:489965565a0d	23	*
cparata	0:489965565a0d	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata	0:489965565a0d	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata	0:489965565a0d	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata	0:489965565a0d	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata	0:489965565a0d	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata	0:489965565a0d	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata	0:489965565a0d	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata	0:489965565a0d	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata	0:489965565a0d	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata	0:489965565a0d	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata	0:489965565a0d	34	*
cparata	0:489965565a0d	35	******************************************************************************
cparata	0:489965565a0d	36	*/
cparata	0:489965565a0d	37
cparata	0:489965565a0d	38	/* Define to prevent recursive inclusion -------------------------------------*/
cparata	0:489965565a0d	39	#ifndef __LSM303AGR_ACC_DRIVER__H
cparata	0:489965565a0d	40	#define __LSM303AGR_ACC_DRIVER__H
cparata	0:489965565a0d	41
cparata	0:489965565a0d	42	/* Includes ------------------------------------------------------------------*/
cparata	0:489965565a0d	43	#include <stdint.h>
cparata	0:489965565a0d	44
cparata	0:489965565a0d	45	/* Exported types ------------------------------------------------------------*/
cparata	0:489965565a0d	46
cparata	0:489965565a0d	47	#ifdef __cplusplus
cparata	0:489965565a0d	48	extern "C" {
cparata	0:489965565a0d	49	#endif
cparata	0:489965565a0d	50
cparata	0:489965565a0d	51	//these could change accordingly with the architecture
cparata	0:489965565a0d	52
cparata	0:489965565a0d	53	#ifndef __ARCHDEP__TYPES
cparata	0:489965565a0d	54	#define __ARCHDEP__TYPES
cparata	0:489965565a0d	55
cparata	0:489965565a0d	56	typedef unsigned char u8_t;
cparata	0:489965565a0d	57	typedef unsigned short int u16_t;
cparata	0:489965565a0d	58	typedef unsigned int u32_t;
cparata	0:489965565a0d	59	typedef int i32_t;
cparata	0:489965565a0d	60	typedef short int i16_t;
cparata	0:489965565a0d	61	typedef signed char i8_t;
cparata	0:489965565a0d	62
cparata	0:489965565a0d	63	#endif /__ARCHDEP__TYPES/
cparata	0:489965565a0d	64
cparata	0:489965565a0d	65	/* Exported common structure --------------------------------------------------------*/
cparata	0:489965565a0d	66
cparata	0:489965565a0d	67	#ifndef __SHARED__TYPES
cparata	0:489965565a0d	68	#define __SHARED__TYPES
cparata	0:489965565a0d	69
cparata	0:489965565a0d	70	typedef union{
cparata	0:489965565a0d	71	i16_t i16bit[3];
cparata	0:489965565a0d	72	u8_t u8bit[6];
cparata	0:489965565a0d	73	} Type3Axis16bit_U;
cparata	0:489965565a0d	74
cparata	0:489965565a0d	75	typedef union{
cparata	0:489965565a0d	76	i16_t i16bit;
cparata	0:489965565a0d	77	u8_t u8bit[2];
cparata	0:489965565a0d	78	} Type1Axis16bit_U;
cparata	0:489965565a0d	79
cparata	0:489965565a0d	80	typedef union{
cparata	0:489965565a0d	81	i32_t i32bit;
cparata	0:489965565a0d	82	u8_t u8bit[4];
cparata	0:489965565a0d	83	} Type1Axis32bit_U;
cparata	0:489965565a0d	84
cparata	0:489965565a0d	85	typedef enum {
cparata	0:489965565a0d	86	MEMS_SUCCESS = 0x01,
cparata	0:489965565a0d	87	MEMS_ERROR = 0x00
cparata	0:489965565a0d	88	} status_t;
cparata	0:489965565a0d	89
cparata	0:489965565a0d	90	#endif /__SHARED__TYPES/
cparata	0:489965565a0d	91
cparata	0:489965565a0d	92	/* Exported macro ------------------------------------------------------------*/
cparata	0:489965565a0d	93
cparata	0:489965565a0d	94	/* Exported constants --------------------------------------------------------*/
cparata	0:489965565a0d	95
cparata	0:489965565a0d	96	/************ I2C Address ***************/
cparata	0:489965565a0d	97
cparata	0:489965565a0d	98	#define LSM303AGR_ACC_I2C_ADDRESS 0x32
cparata	0:489965565a0d	99
cparata	0:489965565a0d	100	/************ Who am I *****************/
cparata	0:489965565a0d	101
cparata	0:489965565a0d	102	#define LSM303AGR_ACC_WHO_AM_I 0x33
cparata	0:489965565a0d	103
cparata	0:489965565a0d	104	/* Private Function Prototype -------------------------------------------------------*/
cparata	0:489965565a0d	105
cparata	0:489965565a0d	106	void LSM303AGR_ACC_SwapHighLowByte(u8_t *bufferToSwap, u8_t numberOfByte, u8_t dimension);
cparata	0:489965565a0d	107
cparata	0:489965565a0d	108	/* Public Function Prototypes ------------------------------------------------*/
cparata	0:489965565a0d	109
cparata	0:489965565a0d	110	status_t LSM303AGR_ACC_ReadReg( void handle, u8_t Reg, u8_t Data );
cparata	0:489965565a0d	111	status_t LSM303AGR_ACC_WriteReg( void *handle, u8_t Reg, u8_t Data );
cparata	0:489965565a0d	112
cparata	0:489965565a0d	113
cparata	0:489965565a0d	114	/************ Device Register *****************/
cparata	0:489965565a0d	115	#define LSM303AGR_ACC_STATUS_REG_AUX 0X07
cparata	0:489965565a0d	116	#define LSM303AGR_ACC_OUT_ADC1_L 0X08
cparata	0:489965565a0d	117	#define LSM303AGR_ACC_OUT_ADC1_H 0X09
cparata	0:489965565a0d	118	#define LSM303AGR_ACC_OUT_ADC2_L 0X0A
cparata	0:489965565a0d	119	#define LSM303AGR_ACC_OUT_ADC2_H 0X0B
cparata	0:489965565a0d	120	#define LSM303AGR_ACC_OUT_ADC3_L 0X0C
cparata	0:489965565a0d	121	#define LSM303AGR_ACC_OUT_ADC3_H 0X0D
cparata	0:489965565a0d	122	#define LSM303AGR_ACC_INT_COUNTER_REG 0X0E
cparata	0:489965565a0d	123	#define LSM303AGR_ACC_WHO_AM_I_REG 0X0F
cparata	0:489965565a0d	124	#define LSM303AGR_ACC_TEMP_CFG_REG 0X1F
cparata	0:489965565a0d	125	#define LSM303AGR_ACC_CTRL_REG1 0X20
cparata	0:489965565a0d	126	#define LSM303AGR_ACC_CTRL_REG2 0X21
cparata	0:489965565a0d	127	#define LSM303AGR_ACC_CTRL_REG3 0X22
cparata	0:489965565a0d	128	#define LSM303AGR_ACC_CTRL_REG4 0X23
cparata	0:489965565a0d	129	#define LSM303AGR_ACC_CTRL_REG5 0X24
cparata	0:489965565a0d	130	#define LSM303AGR_ACC_CTRL_REG6 0X25
cparata	0:489965565a0d	131	#define LSM303AGR_ACC_REFERENCE 0X26
cparata	0:489965565a0d	132	#define LSM303AGR_ACC_STATUS_REG2 0X27
cparata	0:489965565a0d	133	#define LSM303AGR_ACC_OUT_X_L 0X28
cparata	0:489965565a0d	134	#define LSM303AGR_ACC_OUT_X_H 0X29
cparata	0:489965565a0d	135	#define LSM303AGR_ACC_OUT_Y_L 0X2A
cparata	0:489965565a0d	136	#define LSM303AGR_ACC_OUT_Y_H 0X2B
cparata	0:489965565a0d	137	#define LSM303AGR_ACC_OUT_Z_L 0X2C
cparata	0:489965565a0d	138	#define LSM303AGR_ACC_OUT_Z_H 0X2D
cparata	0:489965565a0d	139	#define LSM303AGR_ACC_FIFO_CTRL_REG 0X2E
cparata	0:489965565a0d	140	#define LSM303AGR_ACC_FIFO_SRC_REG 0X2F
cparata	0:489965565a0d	141	#define LSM303AGR_ACC_INT1_CFG 0X30
cparata	0:489965565a0d	142	#define LSM303AGR_ACC_INT1_SOURCE 0X31
cparata	0:489965565a0d	143	#define LSM303AGR_ACC_INT1_THS 0X32
cparata	0:489965565a0d	144	#define LSM303AGR_ACC_INT1_DURATION 0X33
cparata	0:489965565a0d	145	#define LSM303AGR_ACC_INT2_CFG 0X34
cparata	0:489965565a0d	146	#define LSM303AGR_ACC_INT2_SOURCE 0X35
cparata	0:489965565a0d	147	#define LSM303AGR_ACC_INT2_THS 0X36
cparata	0:489965565a0d	148	#define LSM303AGR_ACC_INT2_DURATION 0X37
cparata	0:489965565a0d	149	#define LSM303AGR_ACC_CLICK_CFG 0X38
cparata	0:489965565a0d	150	#define LSM303AGR_ACC_CLICK_SRC 0X39
cparata	0:489965565a0d	151	#define LSM303AGR_ACC_CLICK_THS 0X3A
cparata	0:489965565a0d	152	#define LSM303AGR_ACC_TIME_LIMIT 0X3B
cparata	0:489965565a0d	153	#define LSM303AGR_ACC_TIME_LATENCY 0X3C
cparata	0:489965565a0d	154	#define LSM303AGR_ACC_TIME_WINDOW 0X3D
cparata	0:489965565a0d	155
cparata	0:489965565a0d	156	/*******************************************************************************
cparata	0:489965565a0d	157	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	158	* Address : 0X07
cparata	0:489965565a0d	159	* Bit Group Name: 1DA
cparata	0:489965565a0d	160	* Permission : RO
cparata	0:489965565a0d	161	*******************************************************************************/
cparata	0:489965565a0d	162	typedef enum {
cparata	0:489965565a0d	163	LSM303AGR_ACC_1DA_NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	164	LSM303AGR_ACC_1DA_AVAILABLE =0x01,
cparata	0:489965565a0d	165	} LSM303AGR_ACC_1DA_t;
cparata	0:489965565a0d	166
cparata	0:489965565a0d	167	#define LSM303AGR_ACC_1DA_MASK 0x01
cparata	0:489965565a0d	168	status_t LSM303AGR_ACC_R_x_data_avail(void handle, LSM303AGR_ACC_1DA_t value);
cparata	0:489965565a0d	169
cparata	0:489965565a0d	170	/*******************************************************************************
cparata	0:489965565a0d	171	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	172	* Address : 0X07
cparata	0:489965565a0d	173	* Bit Group Name: 2DA_
cparata	0:489965565a0d	174	* Permission : RO
cparata	0:489965565a0d	175	*******************************************************************************/
cparata	0:489965565a0d	176	typedef enum {
cparata	0:489965565a0d	177	LSM303AGR_ACC_2DA__NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	178	LSM303AGR_ACC_2DA__AVAILABLE =0x02,
cparata	0:489965565a0d	179	} LSM303AGR_ACC_2DA__t;
cparata	0:489965565a0d	180
cparata	0:489965565a0d	181	#define LSM303AGR_ACC_2DA__MASK 0x02
cparata	0:489965565a0d	182	status_t LSM303AGR_ACC_R_y_data_avail(void handle, LSM303AGR_ACC_2DA__t value);
cparata	0:489965565a0d	183
cparata	0:489965565a0d	184	/*******************************************************************************
cparata	0:489965565a0d	185	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	186	* Address : 0X07
cparata	0:489965565a0d	187	* Bit Group Name: 3DA_
cparata	0:489965565a0d	188	* Permission : RO
cparata	0:489965565a0d	189	*******************************************************************************/
cparata	0:489965565a0d	190	typedef enum {
cparata	0:489965565a0d	191	LSM303AGR_ACC_3DA__NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	192	LSM303AGR_ACC_3DA__AVAILABLE =0x04,
cparata	0:489965565a0d	193	} LSM303AGR_ACC_3DA__t;
cparata	0:489965565a0d	194
cparata	0:489965565a0d	195	#define LSM303AGR_ACC_3DA__MASK 0x04
cparata	0:489965565a0d	196	status_t LSM303AGR_ACC_R_z_data_avail(void handle, LSM303AGR_ACC_3DA__t value);
cparata	0:489965565a0d	197
cparata	0:489965565a0d	198	/*******************************************************************************
cparata	0:489965565a0d	199	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	200	* Address : 0X07
cparata	0:489965565a0d	201	* Bit Group Name: 321DA_
cparata	0:489965565a0d	202	* Permission : RO
cparata	0:489965565a0d	203	*******************************************************************************/
cparata	0:489965565a0d	204	typedef enum {
cparata	0:489965565a0d	205	LSM303AGR_ACC_321DA__NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	206	LSM303AGR_ACC_321DA__AVAILABLE =0x08,
cparata	0:489965565a0d	207	} LSM303AGR_ACC_321DA__t;
cparata	0:489965565a0d	208
cparata	0:489965565a0d	209	#define LSM303AGR_ACC_321DA__MASK 0x08
cparata	0:489965565a0d	210	status_t LSM303AGR_ACC_R_xyz_data_avail(void handle, LSM303AGR_ACC_321DA__t value);
cparata	0:489965565a0d	211
cparata	0:489965565a0d	212	/*******************************************************************************
cparata	0:489965565a0d	213	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	214	* Address : 0X07
cparata	0:489965565a0d	215	* Bit Group Name: 1OR_
cparata	0:489965565a0d	216	* Permission : RO
cparata	0:489965565a0d	217	*******************************************************************************/
cparata	0:489965565a0d	218	typedef enum {
cparata	0:489965565a0d	219	LSM303AGR_ACC_1OR__NO_OVERRUN =0x00,
cparata	0:489965565a0d	220	LSM303AGR_ACC_1OR__OVERRUN =0x10,
cparata	0:489965565a0d	221	} LSM303AGR_ACC_1OR__t;
cparata	0:489965565a0d	222
cparata	0:489965565a0d	223	#define LSM303AGR_ACC_1OR__MASK 0x10
cparata	0:489965565a0d	224	status_t LSM303AGR_ACC_R_DataXOverrun(void handle, LSM303AGR_ACC_1OR__t value);
cparata	0:489965565a0d	225
cparata	0:489965565a0d	226	/*******************************************************************************
cparata	0:489965565a0d	227	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	228	* Address : 0X07
cparata	0:489965565a0d	229	* Bit Group Name: 2OR_
cparata	0:489965565a0d	230	* Permission : RO
cparata	0:489965565a0d	231	*******************************************************************************/
cparata	0:489965565a0d	232	typedef enum {
cparata	0:489965565a0d	233	LSM303AGR_ACC_2OR__NO_OVERRUN =0x00,
cparata	0:489965565a0d	234	LSM303AGR_ACC_2OR__OVERRUN =0x20,
cparata	0:489965565a0d	235	} LSM303AGR_ACC_2OR__t;
cparata	0:489965565a0d	236
cparata	0:489965565a0d	237	#define LSM303AGR_ACC_2OR__MASK 0x20
cparata	0:489965565a0d	238	status_t LSM303AGR_ACC_R_DataYOverrun(void handle, LSM303AGR_ACC_2OR__t value);
cparata	0:489965565a0d	239
cparata	0:489965565a0d	240	/*******************************************************************************
cparata	0:489965565a0d	241	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	242	* Address : 0X07
cparata	0:489965565a0d	243	* Bit Group Name: 3OR_
cparata	0:489965565a0d	244	* Permission : RO
cparata	0:489965565a0d	245	*******************************************************************************/
cparata	0:489965565a0d	246	typedef enum {
cparata	0:489965565a0d	247	LSM303AGR_ACC_3OR__NO_OVERRUN =0x00,
cparata	0:489965565a0d	248	LSM303AGR_ACC_3OR__OVERRUN =0x40,
cparata	0:489965565a0d	249	} LSM303AGR_ACC_3OR__t;
cparata	0:489965565a0d	250
cparata	0:489965565a0d	251	#define LSM303AGR_ACC_3OR__MASK 0x40
cparata	0:489965565a0d	252	status_t LSM303AGR_ACC_R_DataZOverrun(void handle, LSM303AGR_ACC_3OR__t value);
cparata	0:489965565a0d	253
cparata	0:489965565a0d	254	/*******************************************************************************
cparata	0:489965565a0d	255	* Register : STATUS_REG_AUX
cparata	0:489965565a0d	256	* Address : 0X07
cparata	0:489965565a0d	257	* Bit Group Name: 321OR_
cparata	0:489965565a0d	258	* Permission : RO
cparata	0:489965565a0d	259	*******************************************************************************/
cparata	0:489965565a0d	260	typedef enum {
cparata	0:489965565a0d	261	LSM303AGR_ACC_321OR__NO_OVERRUN =0x00,
cparata	0:489965565a0d	262	LSM303AGR_ACC_321OR__OVERRUN =0x80,
cparata	0:489965565a0d	263	} LSM303AGR_ACC_321OR__t;
cparata	0:489965565a0d	264
cparata	0:489965565a0d	265	#define LSM303AGR_ACC_321OR__MASK 0x80
cparata	0:489965565a0d	266	status_t LSM303AGR_ACC_R_DataXYZOverrun(void handle, LSM303AGR_ACC_321OR__t value);
cparata	0:489965565a0d	267
cparata	0:489965565a0d	268	/*******************************************************************************
cparata	0:489965565a0d	269	* Register : INT_COUNTER_REG
cparata	0:489965565a0d	270	* Address : 0X0E
cparata	0:489965565a0d	271	* Bit Group Name: IC
cparata	0:489965565a0d	272	* Permission : RO
cparata	0:489965565a0d	273	*******************************************************************************/
cparata	0:489965565a0d	274	#define LSM303AGR_ACC_IC_MASK 0xFF
cparata	0:489965565a0d	275	#define LSM303AGR_ACC_IC_POSITION 0
cparata	0:489965565a0d	276	status_t LSM303AGR_ACC_R_int_counter(void handle, u8_t value);
cparata	0:489965565a0d	277
cparata	0:489965565a0d	278	/*******************************************************************************
cparata	0:489965565a0d	279	* Register : WHO_AM_I
cparata	0:489965565a0d	280	* Address : 0X0F
cparata	0:489965565a0d	281	* Bit Group Name: WHO_AM_I
cparata	0:489965565a0d	282	* Permission : RO
cparata	0:489965565a0d	283	*******************************************************************************/
cparata	0:489965565a0d	284	#define LSM303AGR_ACC_WHO_AM_I_MASK 0xFF
cparata	0:489965565a0d	285	#define LSM303AGR_ACC_WHO_AM_I_POSITION 0
cparata	0:489965565a0d	286	status_t LSM303AGR_ACC_R_WHO_AM_I(void handle, u8_t value);
cparata	0:489965565a0d	287
cparata	0:489965565a0d	288	/*******************************************************************************
cparata	0:489965565a0d	289	* Register : TEMP_CFG_REG
cparata	0:489965565a0d	290	* Address : 0X1F
cparata	0:489965565a0d	291	* Bit Group Name: TEMP_EN
cparata	0:489965565a0d	292	* Permission : RW
cparata	0:489965565a0d	293	*******************************************************************************/
cparata	0:489965565a0d	294	typedef enum {
cparata	0:489965565a0d	295	LSM303AGR_ACC_TEMP_EN_DISABLED =0x00,
cparata	0:489965565a0d	296	LSM303AGR_ACC_TEMP_EN_ENABLED =0x40,
cparata	0:489965565a0d	297	} LSM303AGR_ACC_TEMP_EN_t;
cparata	0:489965565a0d	298
cparata	0:489965565a0d	299	#define LSM303AGR_ACC_TEMP_EN_MASK 0x40
cparata	0:489965565a0d	300	status_t LSM303AGR_ACC_W_TEMP_EN_bits(void *handle, LSM303AGR_ACC_TEMP_EN_t newValue);
cparata	0:489965565a0d	301	status_t LSM303AGR_ACC_R_TEMP_EN_bits(void handle, LSM303AGR_ACC_TEMP_EN_t value);
cparata	0:489965565a0d	302
cparata	0:489965565a0d	303	/*******************************************************************************
cparata	0:489965565a0d	304	* Register : TEMP_CFG_REG
cparata	0:489965565a0d	305	* Address : 0X1F
cparata	0:489965565a0d	306	* Bit Group Name: ADC_PD
cparata	0:489965565a0d	307	* Permission : RW
cparata	0:489965565a0d	308	*******************************************************************************/
cparata	0:489965565a0d	309	typedef enum {
cparata	0:489965565a0d	310	LSM303AGR_ACC_ADC_PD_DISABLED =0x00,
cparata	0:489965565a0d	311	LSM303AGR_ACC_ADC_PD_ENABLED =0x80,
cparata	0:489965565a0d	312	} LSM303AGR_ACC_ADC_PD_t;
cparata	0:489965565a0d	313
cparata	0:489965565a0d	314	#define LSM303AGR_ACC_ADC_PD_MASK 0x80
cparata	0:489965565a0d	315	status_t LSM303AGR_ACC_W_ADC_PD(void *handle, LSM303AGR_ACC_ADC_PD_t newValue);
cparata	0:489965565a0d	316	status_t LSM303AGR_ACC_R_ADC_PD(void handle, LSM303AGR_ACC_ADC_PD_t value);
cparata	0:489965565a0d	317
cparata	0:489965565a0d	318	/*******************************************************************************
cparata	0:489965565a0d	319	* Register : CTRL_REG1
cparata	0:489965565a0d	320	* Address : 0X20
cparata	0:489965565a0d	321	* Bit Group Name: XEN
cparata	0:489965565a0d	322	* Permission : RW
cparata	0:489965565a0d	323	*******************************************************************************/
cparata	0:489965565a0d	324	typedef enum {
cparata	0:489965565a0d	325	LSM303AGR_ACC_XEN_DISABLED =0x00,
cparata	0:489965565a0d	326	LSM303AGR_ACC_XEN_ENABLED =0x01,
cparata	0:489965565a0d	327	} LSM303AGR_ACC_XEN_t;
cparata	0:489965565a0d	328
cparata	0:489965565a0d	329	#define LSM303AGR_ACC_XEN_MASK 0x01
cparata	0:489965565a0d	330	status_t LSM303AGR_ACC_W_XEN(void *handle, LSM303AGR_ACC_XEN_t newValue);
cparata	0:489965565a0d	331	status_t LSM303AGR_ACC_R_XEN(void handle, LSM303AGR_ACC_XEN_t value);
cparata	0:489965565a0d	332
cparata	0:489965565a0d	333	/*******************************************************************************
cparata	0:489965565a0d	334	* Register : CTRL_REG1
cparata	0:489965565a0d	335	* Address : 0X20
cparata	0:489965565a0d	336	* Bit Group Name: YEN
cparata	0:489965565a0d	337	* Permission : RW
cparata	0:489965565a0d	338	*******************************************************************************/
cparata	0:489965565a0d	339	typedef enum {
cparata	0:489965565a0d	340	LSM303AGR_ACC_YEN_DISABLED =0x00,
cparata	0:489965565a0d	341	LSM303AGR_ACC_YEN_ENABLED =0x02,
cparata	0:489965565a0d	342	} LSM303AGR_ACC_YEN_t;
cparata	0:489965565a0d	343
cparata	0:489965565a0d	344	#define LSM303AGR_ACC_YEN_MASK 0x02
cparata	0:489965565a0d	345	status_t LSM303AGR_ACC_W_YEN(void *handle, LSM303AGR_ACC_YEN_t newValue);
cparata	0:489965565a0d	346	status_t LSM303AGR_ACC_R_YEN(void handle, LSM303AGR_ACC_YEN_t value);
cparata	0:489965565a0d	347
cparata	0:489965565a0d	348	/*******************************************************************************
cparata	0:489965565a0d	349	* Register : CTRL_REG1
cparata	0:489965565a0d	350	* Address : 0X20
cparata	0:489965565a0d	351	* Bit Group Name: ZEN
cparata	0:489965565a0d	352	* Permission : RW
cparata	0:489965565a0d	353	*******************************************************************************/
cparata	0:489965565a0d	354	typedef enum {
cparata	0:489965565a0d	355	LSM303AGR_ACC_ZEN_DISABLED =0x00,
cparata	0:489965565a0d	356	LSM303AGR_ACC_ZEN_ENABLED =0x04,
cparata	0:489965565a0d	357	} LSM303AGR_ACC_ZEN_t;
cparata	0:489965565a0d	358
cparata	0:489965565a0d	359	#define LSM303AGR_ACC_ZEN_MASK 0x04
cparata	0:489965565a0d	360	status_t LSM303AGR_ACC_W_ZEN(void *handle, LSM303AGR_ACC_ZEN_t newValue);
cparata	0:489965565a0d	361	status_t LSM303AGR_ACC_R_ZEN(void handle, LSM303AGR_ACC_ZEN_t value);
cparata	0:489965565a0d	362
cparata	0:489965565a0d	363	/*******************************************************************************
cparata	0:489965565a0d	364	* Register : CTRL_REG1
cparata	0:489965565a0d	365	* Address : 0X20
cparata	0:489965565a0d	366	* Bit Group Name: LPEN
cparata	0:489965565a0d	367	* Permission : RW
cparata	0:489965565a0d	368	*******************************************************************************/
cparata	0:489965565a0d	369	typedef enum {
cparata	0:489965565a0d	370	LSM303AGR_ACC_LPEN_DISABLED =0x00,
cparata	0:489965565a0d	371	LSM303AGR_ACC_LPEN_ENABLED =0x08,
cparata	0:489965565a0d	372	} LSM303AGR_ACC_LPEN_t;
cparata	0:489965565a0d	373
cparata	0:489965565a0d	374	#define LSM303AGR_ACC_LPEN_MASK 0x08
cparata	0:489965565a0d	375	status_t LSM303AGR_ACC_W_LOWPWR_EN(void *handle, LSM303AGR_ACC_LPEN_t newValue);
cparata	0:489965565a0d	376	status_t LSM303AGR_ACC_R_LOWPWR_EN(void handle, LSM303AGR_ACC_LPEN_t value);
cparata	0:489965565a0d	377
cparata	0:489965565a0d	378	/*******************************************************************************
cparata	0:489965565a0d	379	* Register : CTRL_REG1
cparata	0:489965565a0d	380	* Address : 0X20
cparata	0:489965565a0d	381	* Bit Group Name: ODR
cparata	0:489965565a0d	382	* Permission : RW
cparata	0:489965565a0d	383	*******************************************************************************/
cparata	0:489965565a0d	384	typedef enum {
cparata	0:489965565a0d	385	LSM303AGR_ACC_ODR_DO_PWR_DOWN =0x00,
cparata	0:489965565a0d	386	LSM303AGR_ACC_ODR_DO_1Hz =0x10,
cparata	0:489965565a0d	387	LSM303AGR_ACC_ODR_DO_10Hz =0x20,
cparata	0:489965565a0d	388	LSM303AGR_ACC_ODR_DO_25Hz =0x30,
cparata	0:489965565a0d	389	LSM303AGR_ACC_ODR_DO_50Hz =0x40,
cparata	0:489965565a0d	390	LSM303AGR_ACC_ODR_DO_100Hz =0x50,
cparata	0:489965565a0d	391	LSM303AGR_ACC_ODR_DO_200Hz =0x60,
cparata	0:489965565a0d	392	LSM303AGR_ACC_ODR_DO_400Hz =0x70,
cparata	0:489965565a0d	393	LSM303AGR_ACC_ODR_DO_1_6KHz =0x80,
cparata	0:489965565a0d	394	LSM303AGR_ACC_ODR_DO_1_25KHz =0x90,
cparata	0:489965565a0d	395	} LSM303AGR_ACC_ODR_t;
cparata	0:489965565a0d	396
cparata	0:489965565a0d	397	#define LSM303AGR_ACC_ODR_MASK 0xF0
cparata	0:489965565a0d	398	status_t LSM303AGR_ACC_W_ODR(void *handle, LSM303AGR_ACC_ODR_t newValue);
cparata	0:489965565a0d	399	status_t LSM303AGR_ACC_R_ODR(void handle, LSM303AGR_ACC_ODR_t value);
cparata	0:489965565a0d	400
cparata	0:489965565a0d	401	/*******************************************************************************
cparata	0:489965565a0d	402	* Register : CTRL_REG2
cparata	0:489965565a0d	403	* Address : 0X21
cparata	0:489965565a0d	404	* Bit Group Name: HPIS1
cparata	0:489965565a0d	405	* Permission : RW
cparata	0:489965565a0d	406	*******************************************************************************/
cparata	0:489965565a0d	407	typedef enum {
cparata	0:489965565a0d	408	LSM303AGR_ACC_HPIS1_DISABLED =0x00,
cparata	0:489965565a0d	409	LSM303AGR_ACC_HPIS1_ENABLED =0x01,
cparata	0:489965565a0d	410	} LSM303AGR_ACC_HPIS1_t;
cparata	0:489965565a0d	411
cparata	0:489965565a0d	412	#define LSM303AGR_ACC_HPIS1_MASK 0x01
cparata	0:489965565a0d	413	status_t LSM303AGR_ACC_W_hpf_aoi_en_int1(void *handle, LSM303AGR_ACC_HPIS1_t newValue);
cparata	0:489965565a0d	414	status_t LSM303AGR_ACC_R_hpf_aoi_en_int1(void handle, LSM303AGR_ACC_HPIS1_t value);
cparata	0:489965565a0d	415
cparata	0:489965565a0d	416	/*******************************************************************************
cparata	0:489965565a0d	417	* Register : CTRL_REG2
cparata	0:489965565a0d	418	* Address : 0X21
cparata	0:489965565a0d	419	* Bit Group Name: HPIS2
cparata	0:489965565a0d	420	* Permission : RW
cparata	0:489965565a0d	421	*******************************************************************************/
cparata	0:489965565a0d	422	typedef enum {
cparata	0:489965565a0d	423	LSM303AGR_ACC_HPIS2_DISABLED =0x00,
cparata	0:489965565a0d	424	LSM303AGR_ACC_HPIS2_ENABLED =0x02,
cparata	0:489965565a0d	425	} LSM303AGR_ACC_HPIS2_t;
cparata	0:489965565a0d	426
cparata	0:489965565a0d	427	#define LSM303AGR_ACC_HPIS2_MASK 0x02
cparata	0:489965565a0d	428	status_t LSM303AGR_ACC_W_hpf_aoi_en_int2(void *handle, LSM303AGR_ACC_HPIS2_t newValue);
cparata	0:489965565a0d	429	status_t LSM303AGR_ACC_R_hpf_aoi_en_int2(void handle, LSM303AGR_ACC_HPIS2_t value);
cparata	0:489965565a0d	430
cparata	0:489965565a0d	431	/*******************************************************************************
cparata	0:489965565a0d	432	* Register : CTRL_REG2
cparata	0:489965565a0d	433	* Address : 0X21
cparata	0:489965565a0d	434	* Bit Group Name: HPCLICK
cparata	0:489965565a0d	435	* Permission : RW
cparata	0:489965565a0d	436	*******************************************************************************/
cparata	0:489965565a0d	437	typedef enum {
cparata	0:489965565a0d	438	LSM303AGR_ACC_HPCLICK_DISABLED =0x00,
cparata	0:489965565a0d	439	LSM303AGR_ACC_HPCLICK_ENABLED =0x04,
cparata	0:489965565a0d	440	} LSM303AGR_ACC_HPCLICK_t;
cparata	0:489965565a0d	441
cparata	0:489965565a0d	442	#define LSM303AGR_ACC_HPCLICK_MASK 0x04
cparata	0:489965565a0d	443	status_t LSM303AGR_ACC_W_hpf_click_en(void *handle, LSM303AGR_ACC_HPCLICK_t newValue);
cparata	0:489965565a0d	444	status_t LSM303AGR_ACC_R_hpf_click_en(void handle, LSM303AGR_ACC_HPCLICK_t value);
cparata	0:489965565a0d	445
cparata	0:489965565a0d	446	/*******************************************************************************
cparata	0:489965565a0d	447	* Register : CTRL_REG2
cparata	0:489965565a0d	448	* Address : 0X21
cparata	0:489965565a0d	449	* Bit Group Name: FDS
cparata	0:489965565a0d	450	* Permission : RW
cparata	0:489965565a0d	451	*******************************************************************************/
cparata	0:489965565a0d	452	typedef enum {
cparata	0:489965565a0d	453	LSM303AGR_ACC_FDS_BYPASSED =0x00,
cparata	0:489965565a0d	454	LSM303AGR_ACC_FDS_ENABLED =0x08,
cparata	0:489965565a0d	455	} LSM303AGR_ACC_FDS_t;
cparata	0:489965565a0d	456
cparata	0:489965565a0d	457	#define LSM303AGR_ACC_FDS_MASK 0x08
cparata	0:489965565a0d	458	status_t LSM303AGR_ACC_W_Data_Filter(void *handle, LSM303AGR_ACC_FDS_t newValue);
cparata	0:489965565a0d	459	status_t LSM303AGR_ACC_R_Data_Filter(void handle, LSM303AGR_ACC_FDS_t value);
cparata	0:489965565a0d	460
cparata	0:489965565a0d	461	/*******************************************************************************
cparata	0:489965565a0d	462	* Register : CTRL_REG2
cparata	0:489965565a0d	463	* Address : 0X21
cparata	0:489965565a0d	464	* Bit Group Name: HPCF
cparata	0:489965565a0d	465	* Permission : RW
cparata	0:489965565a0d	466	*******************************************************************************/
cparata	0:489965565a0d	467	typedef enum {
cparata	0:489965565a0d	468	LSM303AGR_ACC_HPCF_00 =0x00,
cparata	0:489965565a0d	469	LSM303AGR_ACC_HPCF_01 =0x10,
cparata	0:489965565a0d	470	LSM303AGR_ACC_HPCF_10 =0x20,
cparata	0:489965565a0d	471	LSM303AGR_ACC_HPCF_11 =0x30,
cparata	0:489965565a0d	472	} LSM303AGR_ACC_HPCF_t;
cparata	0:489965565a0d	473
cparata	0:489965565a0d	474	#define LSM303AGR_ACC_HPCF_MASK 0x30
cparata	0:489965565a0d	475	status_t LSM303AGR_ACC_W_hpf_cutoff_freq(void *handle, LSM303AGR_ACC_HPCF_t newValue);
cparata	0:489965565a0d	476	status_t LSM303AGR_ACC_R_hpf_cutoff_freq(void handle, LSM303AGR_ACC_HPCF_t value);
cparata	0:489965565a0d	477
cparata	0:489965565a0d	478	/*******************************************************************************
cparata	0:489965565a0d	479	* Register : CTRL_REG2
cparata	0:489965565a0d	480	* Address : 0X21
cparata	0:489965565a0d	481	* Bit Group Name: HPM
cparata	0:489965565a0d	482	* Permission : RW
cparata	0:489965565a0d	483	*******************************************************************************/
cparata	0:489965565a0d	484	typedef enum {
cparata	0:489965565a0d	485	LSM303AGR_ACC_HPM_NORMAL =0x00,
cparata	0:489965565a0d	486	LSM303AGR_ACC_HPM_REFERENCE_SIGNAL =0x40,
cparata	0:489965565a0d	487	LSM303AGR_ACC_HPM_NORMAL_2 =0x80,
cparata	0:489965565a0d	488	LSM303AGR_ACC_HPM_AUTORST_ON_INT =0xC0,
cparata	0:489965565a0d	489	} LSM303AGR_ACC_HPM_t;
cparata	0:489965565a0d	490
cparata	0:489965565a0d	491	#define LSM303AGR_ACC_HPM_MASK 0xC0
cparata	0:489965565a0d	492	status_t LSM303AGR_ACC_W_hpf_mode(void *handle, LSM303AGR_ACC_HPM_t newValue);
cparata	0:489965565a0d	493	status_t LSM303AGR_ACC_R_hpf_mode(void handle, LSM303AGR_ACC_HPM_t value);
cparata	0:489965565a0d	494
cparata	0:489965565a0d	495	/*******************************************************************************
cparata	0:489965565a0d	496	* Register : CTRL_REG3
cparata	0:489965565a0d	497	* Address : 0X22
cparata	0:489965565a0d	498	* Bit Group Name: I1_OVERRUN
cparata	0:489965565a0d	499	* Permission : RW
cparata	0:489965565a0d	500	*******************************************************************************/
cparata	0:489965565a0d	501	typedef enum {
cparata	0:489965565a0d	502	LSM303AGR_ACC_I1_OVERRUN_DISABLED =0x00,
cparata	0:489965565a0d	503	LSM303AGR_ACC_I1_OVERRUN_ENABLED =0x02,
cparata	0:489965565a0d	504	} LSM303AGR_ACC_I1_OVERRUN_t;
cparata	0:489965565a0d	505
cparata	0:489965565a0d	506	#define LSM303AGR_ACC_I1_OVERRUN_MASK 0x02
cparata	0:489965565a0d	507	status_t LSM303AGR_ACC_W_FIFO_Overrun_on_INT1(void *handle, LSM303AGR_ACC_I1_OVERRUN_t newValue);
cparata	0:489965565a0d	508	status_t LSM303AGR_ACC_R_FIFO_Overrun_on_INT1(void handle, LSM303AGR_ACC_I1_OVERRUN_t value);
cparata	0:489965565a0d	509
cparata	0:489965565a0d	510	/*******************************************************************************
cparata	0:489965565a0d	511	* Register : CTRL_REG3
cparata	0:489965565a0d	512	* Address : 0X22
cparata	0:489965565a0d	513	* Bit Group Name: I1_WTM
cparata	0:489965565a0d	514	* Permission : RW
cparata	0:489965565a0d	515	*******************************************************************************/
cparata	0:489965565a0d	516	typedef enum {
cparata	0:489965565a0d	517	LSM303AGR_ACC_I1_WTM_DISABLED =0x00,
cparata	0:489965565a0d	518	LSM303AGR_ACC_I1_WTM_ENABLED =0x04,
cparata	0:489965565a0d	519	} LSM303AGR_ACC_I1_WTM_t;
cparata	0:489965565a0d	520
cparata	0:489965565a0d	521	#define LSM303AGR_ACC_I1_WTM_MASK 0x04
cparata	0:489965565a0d	522	status_t LSM303AGR_ACC_W_FIFO_Watermark_on_INT1(void *handle, LSM303AGR_ACC_I1_WTM_t newValue);
cparata	0:489965565a0d	523	status_t LSM303AGR_ACC_R_FIFO_Watermark_on_INT1(void handle, LSM303AGR_ACC_I1_WTM_t value);
cparata	0:489965565a0d	524
cparata	0:489965565a0d	525	/*******************************************************************************
cparata	0:489965565a0d	526	* Register : CTRL_REG3
cparata	0:489965565a0d	527	* Address : 0X22
cparata	0:489965565a0d	528	* Bit Group Name: I1_DRDY2
cparata	0:489965565a0d	529	* Permission : RW
cparata	0:489965565a0d	530	*******************************************************************************/
cparata	0:489965565a0d	531	typedef enum {
cparata	0:489965565a0d	532	LSM303AGR_ACC_I1_DRDY2_DISABLED =0x00,
cparata	0:489965565a0d	533	LSM303AGR_ACC_I1_DRDY2_ENABLED =0x08,
cparata	0:489965565a0d	534	} LSM303AGR_ACC_I1_DRDY2_t;
cparata	0:489965565a0d	535
cparata	0:489965565a0d	536	#define LSM303AGR_ACC_I1_DRDY2_MASK 0x08
cparata	0:489965565a0d	537	status_t LSM303AGR_ACC_W_FIFO_DRDY2_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY2_t newValue);
cparata	0:489965565a0d	538	status_t LSM303AGR_ACC_R_FIFO_DRDY2_on_INT1(void handle, LSM303AGR_ACC_I1_DRDY2_t value);
cparata	0:489965565a0d	539
cparata	0:489965565a0d	540	/*******************************************************************************
cparata	0:489965565a0d	541	* Register : CTRL_REG3
cparata	0:489965565a0d	542	* Address : 0X22
cparata	0:489965565a0d	543	* Bit Group Name: I1_DRDY1
cparata	0:489965565a0d	544	* Permission : RW
cparata	0:489965565a0d	545	*******************************************************************************/
cparata	0:489965565a0d	546	typedef enum {
cparata	0:489965565a0d	547	LSM303AGR_ACC_I1_DRDY1_DISABLED =0x00,
cparata	0:489965565a0d	548	LSM303AGR_ACC_I1_DRDY1_ENABLED =0x10,
cparata	0:489965565a0d	549	} LSM303AGR_ACC_I1_DRDY1_t;
cparata	0:489965565a0d	550
cparata	0:489965565a0d	551	#define LSM303AGR_ACC_I1_DRDY1_MASK 0x10
cparata	0:489965565a0d	552	status_t LSM303AGR_ACC_W_FIFO_DRDY1_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY1_t newValue);
cparata	0:489965565a0d	553	status_t LSM303AGR_ACC_R_FIFO_DRDY1_on_INT1(void handle, LSM303AGR_ACC_I1_DRDY1_t value);
cparata	0:489965565a0d	554
cparata	0:489965565a0d	555	/*******************************************************************************
cparata	0:489965565a0d	556	* Register : CTRL_REG3
cparata	0:489965565a0d	557	* Address : 0X22
cparata	0:489965565a0d	558	* Bit Group Name: I1_AOI2
cparata	0:489965565a0d	559	* Permission : RW
cparata	0:489965565a0d	560	*******************************************************************************/
cparata	0:489965565a0d	561	typedef enum {
cparata	0:489965565a0d	562	LSM303AGR_ACC_I1_AOI2_DISABLED =0x00,
cparata	0:489965565a0d	563	LSM303AGR_ACC_I1_AOI2_ENABLED =0x20,
cparata	0:489965565a0d	564	} LSM303AGR_ACC_I1_AOI2_t;
cparata	0:489965565a0d	565
cparata	0:489965565a0d	566	#define LSM303AGR_ACC_I1_AOI2_MASK 0x20
cparata	0:489965565a0d	567	status_t LSM303AGR_ACC_W_FIFO_AOL2_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI2_t newValue);
cparata	0:489965565a0d	568	status_t LSM303AGR_ACC_R_FIFO_AOL2_on_INT1(void handle, LSM303AGR_ACC_I1_AOI2_t value);
cparata	0:489965565a0d	569
cparata	0:489965565a0d	570	/*******************************************************************************
cparata	0:489965565a0d	571	* Register : CTRL_REG3
cparata	0:489965565a0d	572	* Address : 0X22
cparata	0:489965565a0d	573	* Bit Group Name: I1_AOI1
cparata	0:489965565a0d	574	* Permission : RW
cparata	0:489965565a0d	575	*******************************************************************************/
cparata	0:489965565a0d	576	typedef enum {
cparata	0:489965565a0d	577	LSM303AGR_ACC_I1_AOI1_DISABLED =0x00,
cparata	0:489965565a0d	578	LSM303AGR_ACC_I1_AOI1_ENABLED =0x40,
cparata	0:489965565a0d	579	} LSM303AGR_ACC_I1_AOI1_t;
cparata	0:489965565a0d	580
cparata	0:489965565a0d	581	#define LSM303AGR_ACC_I1_AOI1_MASK 0x40
cparata	0:489965565a0d	582	status_t LSM303AGR_ACC_W_FIFO_AOL1_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI1_t newValue);
cparata	0:489965565a0d	583	status_t LSM303AGR_ACC_R_FIFO_AOL1_on_INT1(void handle, LSM303AGR_ACC_I1_AOI1_t value);
cparata	0:489965565a0d	584
cparata	0:489965565a0d	585	/*******************************************************************************
cparata	0:489965565a0d	586	* Register : CTRL_REG3
cparata	0:489965565a0d	587	* Address : 0X22
cparata	0:489965565a0d	588	* Bit Group Name: I1_CLICK
cparata	0:489965565a0d	589	* Permission : RW
cparata	0:489965565a0d	590	*******************************************************************************/
cparata	0:489965565a0d	591	typedef enum {
cparata	0:489965565a0d	592	LSM303AGR_ACC_I1_CLICK_DISABLED =0x00,
cparata	0:489965565a0d	593	LSM303AGR_ACC_I1_CLICK_ENABLED =0x80,
cparata	0:489965565a0d	594	} LSM303AGR_ACC_I1_CLICK_t;
cparata	0:489965565a0d	595
cparata	0:489965565a0d	596	#define LSM303AGR_ACC_I1_CLICK_MASK 0x80
cparata	0:489965565a0d	597	status_t LSM303AGR_ACC_W_FIFO_Click_on_INT1(void *handle, LSM303AGR_ACC_I1_CLICK_t newValue);
cparata	0:489965565a0d	598	status_t LSM303AGR_ACC_R_FIFO_Click_on_INT1(void handle, LSM303AGR_ACC_I1_CLICK_t value);
cparata	0:489965565a0d	599
cparata	0:489965565a0d	600	/*******************************************************************************
cparata	0:489965565a0d	601	* Register : CTRL_REG4
cparata	0:489965565a0d	602	* Address : 0X23
cparata	0:489965565a0d	603	* Bit Group Name: SIM
cparata	0:489965565a0d	604	* Permission : RW
cparata	0:489965565a0d	605	*******************************************************************************/
cparata	0:489965565a0d	606	typedef enum {
cparata	0:489965565a0d	607	LSM303AGR_ACC_SIM_4_WIRES =0x00,
cparata	0:489965565a0d	608	LSM303AGR_ACC_SIM_3_WIRES =0x01,
cparata	0:489965565a0d	609	} LSM303AGR_ACC_SIM_t;
cparata	0:489965565a0d	610
cparata	0:489965565a0d	611	#define LSM303AGR_ACC_SIM_MASK 0x01
cparata	0:489965565a0d	612	status_t LSM303AGR_ACC_W_SPI_mode(void *handle, LSM303AGR_ACC_SIM_t newValue);
cparata	0:489965565a0d	613	status_t LSM303AGR_ACC_R_SPI_mode(void handle, LSM303AGR_ACC_SIM_t value);
cparata	0:489965565a0d	614
cparata	0:489965565a0d	615	/*******************************************************************************
cparata	0:489965565a0d	616	* Register : CTRL_REG4
cparata	0:489965565a0d	617	* Address : 0X23
cparata	0:489965565a0d	618	* Bit Group Name: ST
cparata	0:489965565a0d	619	* Permission : RW
cparata	0:489965565a0d	620	*******************************************************************************/
cparata	0:489965565a0d	621	typedef enum {
cparata	0:489965565a0d	622	LSM303AGR_ACC_ST_DISABLED =0x00,
cparata	0:489965565a0d	623	LSM303AGR_ACC_ST_SELF_TEST_0 =0x02,
cparata	0:489965565a0d	624	LSM303AGR_ACC_ST_SELF_TEST_1 =0x04,
cparata	0:489965565a0d	625	LSM303AGR_ACC_ST_NOT_APPLICABLE =0x06,
cparata	0:489965565a0d	626	} LSM303AGR_ACC_ST_t;
cparata	0:489965565a0d	627
cparata	0:489965565a0d	628	#define LSM303AGR_ACC_ST_MASK 0x06
cparata	0:489965565a0d	629	status_t LSM303AGR_ACC_W_SelfTest(void *handle, LSM303AGR_ACC_ST_t newValue);
cparata	0:489965565a0d	630	status_t LSM303AGR_ACC_R_SelfTest(void handle, LSM303AGR_ACC_ST_t value);
cparata	0:489965565a0d	631
cparata	0:489965565a0d	632	/*******************************************************************************
cparata	0:489965565a0d	633	* Register : CTRL_REG4
cparata	0:489965565a0d	634	* Address : 0X23
cparata	0:489965565a0d	635	* Bit Group Name: HR
cparata	0:489965565a0d	636	* Permission : RW
cparata	0:489965565a0d	637	*******************************************************************************/
cparata	0:489965565a0d	638	typedef enum {
cparata	0:489965565a0d	639	LSM303AGR_ACC_HR_DISABLED =0x00,
cparata	0:489965565a0d	640	LSM303AGR_ACC_HR_ENABLED =0x08,
cparata	0:489965565a0d	641	} LSM303AGR_ACC_HR_t;
cparata	0:489965565a0d	642
cparata	0:489965565a0d	643	#define LSM303AGR_ACC_HR_MASK 0x08
cparata	0:489965565a0d	644	status_t LSM303AGR_ACC_W_HiRes(void *handle, LSM303AGR_ACC_HR_t newValue);
cparata	0:489965565a0d	645	status_t LSM303AGR_ACC_R_HiRes(void handle, LSM303AGR_ACC_HR_t value);
cparata	0:489965565a0d	646
cparata	0:489965565a0d	647	/*******************************************************************************
cparata	0:489965565a0d	648	* Register : CTRL_REG4
cparata	0:489965565a0d	649	* Address : 0X23
cparata	0:489965565a0d	650	* Bit Group Name: FS
cparata	0:489965565a0d	651	* Permission : RW
cparata	0:489965565a0d	652	*******************************************************************************/
cparata	0:489965565a0d	653	typedef enum {
cparata	0:489965565a0d	654	LSM303AGR_ACC_FS_2G =0x00,
cparata	0:489965565a0d	655	LSM303AGR_ACC_FS_4G =0x10,
cparata	0:489965565a0d	656	LSM303AGR_ACC_FS_8G =0x20,
cparata	0:489965565a0d	657	LSM303AGR_ACC_FS_16G =0x30,
cparata	0:489965565a0d	658	} LSM303AGR_ACC_FS_t;
cparata	0:489965565a0d	659
cparata	0:489965565a0d	660	#define LSM303AGR_ACC_FS_MASK 0x30
cparata	0:489965565a0d	661	status_t LSM303AGR_ACC_W_FullScale(void *handle, LSM303AGR_ACC_FS_t newValue);
cparata	0:489965565a0d	662	status_t LSM303AGR_ACC_R_FullScale(void handle, LSM303AGR_ACC_FS_t value);
cparata	0:489965565a0d	663
cparata	0:489965565a0d	664	/*******************************************************************************
cparata	0:489965565a0d	665	* Register : CTRL_REG4
cparata	0:489965565a0d	666	* Address : 0X23
cparata	0:489965565a0d	667	* Bit Group Name: BLE
cparata	0:489965565a0d	668	* Permission : RW
cparata	0:489965565a0d	669	*******************************************************************************/
cparata	0:489965565a0d	670	typedef enum {
cparata	0:489965565a0d	671	LSM303AGR_ACC_BLE_LITTLE_ENDIAN =0x00,
cparata	0:489965565a0d	672	LSM303AGR_ACC_BLE_BIG_ENDIAN =0x40,
cparata	0:489965565a0d	673	} LSM303AGR_ACC_BLE_t;
cparata	0:489965565a0d	674
cparata	0:489965565a0d	675	#define LSM303AGR_ACC_BLE_MASK 0x40
cparata	0:489965565a0d	676	status_t LSM303AGR_ACC_W_LittleBigEndian(void *handle, LSM303AGR_ACC_BLE_t newValue);
cparata	0:489965565a0d	677	status_t LSM303AGR_ACC_R_LittleBigEndian(void handle, LSM303AGR_ACC_BLE_t value);
cparata	0:489965565a0d	678
cparata	0:489965565a0d	679	/*******************************************************************************
cparata	0:489965565a0d	680	* Register : CTRL_REG4
cparata	0:489965565a0d	681	* Address : 0X23
cparata	0:489965565a0d	682	* Bit Group Name: BDU
cparata	0:489965565a0d	683	* Permission : RW
cparata	0:489965565a0d	684	*******************************************************************************/
cparata	0:489965565a0d	685	typedef enum {
cparata	0:489965565a0d	686	LSM303AGR_ACC_BDU_DISABLED =0x00,
cparata	0:489965565a0d	687	LSM303AGR_ACC_BDU_ENABLED =0x80,
cparata	0:489965565a0d	688	} LSM303AGR_ACC_BDU_t;
cparata	0:489965565a0d	689
cparata	0:489965565a0d	690	#define LSM303AGR_ACC_BDU_MASK 0x80
cparata	0:489965565a0d	691	status_t LSM303AGR_ACC_W_BlockDataUpdate(void *handle, LSM303AGR_ACC_BDU_t newValue);
cparata	0:489965565a0d	692	status_t LSM303AGR_ACC_R_BlockDataUpdate(void handle, LSM303AGR_ACC_BDU_t value);
cparata	0:489965565a0d	693
cparata	0:489965565a0d	694	/*******************************************************************************
cparata	0:489965565a0d	695	* Register : CTRL_REG5
cparata	0:489965565a0d	696	* Address : 0X24
cparata	0:489965565a0d	697	* Bit Group Name: D4D_INT2
cparata	0:489965565a0d	698	* Permission : RW
cparata	0:489965565a0d	699	*******************************************************************************/
cparata	0:489965565a0d	700	typedef enum {
cparata	0:489965565a0d	701	LSM303AGR_ACC_D4D_INT2_DISABLED =0x00,
cparata	0:489965565a0d	702	LSM303AGR_ACC_D4D_INT2_ENABLED =0x01,
cparata	0:489965565a0d	703	} LSM303AGR_ACC_D4D_INT2_t;
cparata	0:489965565a0d	704
cparata	0:489965565a0d	705	#define LSM303AGR_ACC_D4D_INT2_MASK 0x01
cparata	0:489965565a0d	706	status_t LSM303AGR_ACC_W_4D_on_INT2(void *handle, LSM303AGR_ACC_D4D_INT2_t newValue);
cparata	0:489965565a0d	707	status_t LSM303AGR_ACC_R_4D_on_INT2(void handle, LSM303AGR_ACC_D4D_INT2_t value);
cparata	0:489965565a0d	708
cparata	0:489965565a0d	709	/*******************************************************************************
cparata	0:489965565a0d	710	* Register : CTRL_REG5
cparata	0:489965565a0d	711	* Address : 0X24
cparata	0:489965565a0d	712	* Bit Group Name: LIR_INT2
cparata	0:489965565a0d	713	* Permission : RW
cparata	0:489965565a0d	714	*******************************************************************************/
cparata	0:489965565a0d	715	typedef enum {
cparata	0:489965565a0d	716	LSM303AGR_ACC_LIR_INT2_DISABLED =0x00,
cparata	0:489965565a0d	717	LSM303AGR_ACC_LIR_INT2_ENABLED =0x02,
cparata	0:489965565a0d	718	} LSM303AGR_ACC_LIR_INT2_t;
cparata	0:489965565a0d	719
cparata	0:489965565a0d	720	#define LSM303AGR_ACC_LIR_INT2_MASK 0x02
cparata	0:489965565a0d	721	status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT2(void *handle, LSM303AGR_ACC_LIR_INT2_t newValue);
cparata	0:489965565a0d	722	status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT2(void handle, LSM303AGR_ACC_LIR_INT2_t value);
cparata	0:489965565a0d	723
cparata	0:489965565a0d	724	/*******************************************************************************
cparata	0:489965565a0d	725	* Register : CTRL_REG5
cparata	0:489965565a0d	726	* Address : 0X24
cparata	0:489965565a0d	727	* Bit Group Name: D4D_INT1
cparata	0:489965565a0d	728	* Permission : RW
cparata	0:489965565a0d	729	*******************************************************************************/
cparata	0:489965565a0d	730	typedef enum {
cparata	0:489965565a0d	731	LSM303AGR_ACC_D4D_INT1_DISABLED =0x00,
cparata	0:489965565a0d	732	LSM303AGR_ACC_D4D_INT1_ENABLED =0x04,
cparata	0:489965565a0d	733	} LSM303AGR_ACC_D4D_INT1_t;
cparata	0:489965565a0d	734
cparata	0:489965565a0d	735	#define LSM303AGR_ACC_D4D_INT1_MASK 0x04
cparata	0:489965565a0d	736	status_t LSM303AGR_ACC_W_4D_on_INT1(void *handle, LSM303AGR_ACC_D4D_INT1_t newValue);
cparata	0:489965565a0d	737	status_t LSM303AGR_ACC_R_4D_on_INT1(void handle, LSM303AGR_ACC_D4D_INT1_t value);
cparata	0:489965565a0d	738
cparata	0:489965565a0d	739	/*******************************************************************************
cparata	0:489965565a0d	740	* Register : CTRL_REG5
cparata	0:489965565a0d	741	* Address : 0X24
cparata	0:489965565a0d	742	* Bit Group Name: LIR_INT1
cparata	0:489965565a0d	743	* Permission : RW
cparata	0:489965565a0d	744	*******************************************************************************/
cparata	0:489965565a0d	745	typedef enum {
cparata	0:489965565a0d	746	LSM303AGR_ACC_LIR_INT1_DISABLED =0x00,
cparata	0:489965565a0d	747	LSM303AGR_ACC_LIR_INT1_ENABLED =0x08,
cparata	0:489965565a0d	748	} LSM303AGR_ACC_LIR_INT1_t;
cparata	0:489965565a0d	749
cparata	0:489965565a0d	750	#define LSM303AGR_ACC_LIR_INT1_MASK 0x08
cparata	0:489965565a0d	751	status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT1(void *handle, LSM303AGR_ACC_LIR_INT1_t newValue);
cparata	0:489965565a0d	752	status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT1(void handle, LSM303AGR_ACC_LIR_INT1_t value);
cparata	0:489965565a0d	753
cparata	0:489965565a0d	754	/*******************************************************************************
cparata	0:489965565a0d	755	* Register : CTRL_REG5
cparata	0:489965565a0d	756	* Address : 0X24
cparata	0:489965565a0d	757	* Bit Group Name: FIFO_EN
cparata	0:489965565a0d	758	* Permission : RW
cparata	0:489965565a0d	759	*******************************************************************************/
cparata	0:489965565a0d	760	typedef enum {
cparata	0:489965565a0d	761	LSM303AGR_ACC_FIFO_EN_DISABLED =0x00,
cparata	0:489965565a0d	762	LSM303AGR_ACC_FIFO_EN_ENABLED =0x40,
cparata	0:489965565a0d	763	} LSM303AGR_ACC_FIFO_EN_t;
cparata	0:489965565a0d	764
cparata	0:489965565a0d	765	#define LSM303AGR_ACC_FIFO_EN_MASK 0x40
cparata	0:489965565a0d	766	status_t LSM303AGR_ACC_W_FIFO_EN(void *handle, LSM303AGR_ACC_FIFO_EN_t newValue);
cparata	0:489965565a0d	767	status_t LSM303AGR_ACC_R_FIFO_EN(void handle, LSM303AGR_ACC_FIFO_EN_t value);
cparata	0:489965565a0d	768
cparata	0:489965565a0d	769	/*******************************************************************************
cparata	0:489965565a0d	770	* Register : CTRL_REG5
cparata	0:489965565a0d	771	* Address : 0X24
cparata	0:489965565a0d	772	* Bit Group Name: BOOT
cparata	0:489965565a0d	773	* Permission : RW
cparata	0:489965565a0d	774	*******************************************************************************/
cparata	0:489965565a0d	775	typedef enum {
cparata	0:489965565a0d	776	LSM303AGR_ACC_BOOT_NORMAL_MODE =0x00,
cparata	0:489965565a0d	777	LSM303AGR_ACC_BOOT_REBOOT =0x80,
cparata	0:489965565a0d	778	} LSM303AGR_ACC_BOOT_t;
cparata	0:489965565a0d	779
cparata	0:489965565a0d	780	#define LSM303AGR_ACC_BOOT_MASK 0x80
cparata	0:489965565a0d	781	status_t LSM303AGR_ACC_W_RebootMemory(void *handle, LSM303AGR_ACC_BOOT_t newValue);
cparata	0:489965565a0d	782	status_t LSM303AGR_ACC_R_RebootMemory(void handle, LSM303AGR_ACC_BOOT_t value);
cparata	0:489965565a0d	783
cparata	0:489965565a0d	784	/*******************************************************************************
cparata	0:489965565a0d	785	* Register : CTRL_REG6
cparata	0:489965565a0d	786	* Address : 0X25
cparata	0:489965565a0d	787	* Bit Group Name: H_LACTIVE
cparata	0:489965565a0d	788	* Permission : RW
cparata	0:489965565a0d	789	*******************************************************************************/
cparata	0:489965565a0d	790	typedef enum {
cparata	0:489965565a0d	791	LSM303AGR_ACC_H_LACTIVE_ACTIVE_HI =0x00,
cparata	0:489965565a0d	792	LSM303AGR_ACC_H_LACTIVE_ACTIVE_LO =0x02,
cparata	0:489965565a0d	793	} LSM303AGR_ACC_H_LACTIVE_t;
cparata	0:489965565a0d	794
cparata	0:489965565a0d	795	#define LSM303AGR_ACC_H_LACTIVE_MASK 0x02
cparata	0:489965565a0d	796	status_t LSM303AGR_ACC_W_IntActive(void *handle, LSM303AGR_ACC_H_LACTIVE_t newValue);
cparata	0:489965565a0d	797	status_t LSM303AGR_ACC_R_IntActive(void handle, LSM303AGR_ACC_H_LACTIVE_t value);
cparata	0:489965565a0d	798
cparata	0:489965565a0d	799	/*******************************************************************************
cparata	0:489965565a0d	800	* Register : CTRL_REG6
cparata	0:489965565a0d	801	* Address : 0X25
cparata	0:489965565a0d	802	* Bit Group Name: P2_ACT
cparata	0:489965565a0d	803	* Permission : RW
cparata	0:489965565a0d	804	*******************************************************************************/
cparata	0:489965565a0d	805	typedef enum {
cparata	0:489965565a0d	806	LSM303AGR_ACC_P2_ACT_DISABLED =0x00,
cparata	0:489965565a0d	807	LSM303AGR_ACC_P2_ACT_ENABLED =0x08,
cparata	0:489965565a0d	808	} LSM303AGR_ACC_P2_ACT_t;
cparata	0:489965565a0d	809
cparata	0:489965565a0d	810	#define LSM303AGR_ACC_P2_ACT_MASK 0x08
cparata	0:489965565a0d	811	status_t LSM303AGR_ACC_W_P2_ACT(void *handle, LSM303AGR_ACC_P2_ACT_t newValue);
cparata	0:489965565a0d	812	status_t LSM303AGR_ACC_R_P2_ACT(void handle, LSM303AGR_ACC_P2_ACT_t value);
cparata	0:489965565a0d	813
cparata	0:489965565a0d	814	/*******************************************************************************
cparata	0:489965565a0d	815	* Register : CTRL_REG6
cparata	0:489965565a0d	816	* Address : 0X25
cparata	0:489965565a0d	817	* Bit Group Name: BOOT_I1
cparata	0:489965565a0d	818	* Permission : RW
cparata	0:489965565a0d	819	*******************************************************************************/
cparata	0:489965565a0d	820	typedef enum {
cparata	0:489965565a0d	821	LSM303AGR_ACC_BOOT_I1_DISABLED =0x00,
cparata	0:489965565a0d	822	LSM303AGR_ACC_BOOT_I1_ENABLED =0x10,
cparata	0:489965565a0d	823	} LSM303AGR_ACC_BOOT_I1_t;
cparata	0:489965565a0d	824
cparata	0:489965565a0d	825	#define LSM303AGR_ACC_BOOT_I1_MASK 0x10
cparata	0:489965565a0d	826	status_t LSM303AGR_ACC_W_Boot_on_INT2(void *handle, LSM303AGR_ACC_BOOT_I1_t newValue);
cparata	0:489965565a0d	827	status_t LSM303AGR_ACC_R_Boot_on_INT2(void handle, LSM303AGR_ACC_BOOT_I1_t value);
cparata	0:489965565a0d	828
cparata	0:489965565a0d	829	/*******************************************************************************
cparata	0:489965565a0d	830	* Register : CTRL_REG6
cparata	0:489965565a0d	831	* Address : 0X25
cparata	0:489965565a0d	832	* Bit Group Name: I2_INT2
cparata	0:489965565a0d	833	* Permission : RW
cparata	0:489965565a0d	834	*******************************************************************************/
cparata	0:489965565a0d	835	typedef enum {
cparata	0:489965565a0d	836	LSM303AGR_ACC_I2_INT2_DISABLED =0x00,
cparata	0:489965565a0d	837	LSM303AGR_ACC_I2_INT2_ENABLED =0x20,
cparata	0:489965565a0d	838	} LSM303AGR_ACC_I2_INT2_t;
cparata	0:489965565a0d	839
cparata	0:489965565a0d	840	#define LSM303AGR_ACC_I2_INT2_MASK 0x20
cparata	0:489965565a0d	841	status_t LSM303AGR_ACC_W_I2_on_INT2(void *handle, LSM303AGR_ACC_I2_INT2_t newValue);
cparata	0:489965565a0d	842	status_t LSM303AGR_ACC_R_I2_on_INT2(void handle, LSM303AGR_ACC_I2_INT2_t value);
cparata	0:489965565a0d	843
cparata	0:489965565a0d	844	/*******************************************************************************
cparata	0:489965565a0d	845	* Register : CTRL_REG6
cparata	0:489965565a0d	846	* Address : 0X25
cparata	0:489965565a0d	847	* Bit Group Name: I2_INT1
cparata	0:489965565a0d	848	* Permission : RW
cparata	0:489965565a0d	849	*******************************************************************************/
cparata	0:489965565a0d	850	typedef enum {
cparata	0:489965565a0d	851	LSM303AGR_ACC_I2_INT1_DISABLED =0x00,
cparata	0:489965565a0d	852	LSM303AGR_ACC_I2_INT1_ENABLED =0x40,
cparata	0:489965565a0d	853	} LSM303AGR_ACC_I2_INT1_t;
cparata	0:489965565a0d	854
cparata	0:489965565a0d	855	#define LSM303AGR_ACC_I2_INT1_MASK 0x40
cparata	0:489965565a0d	856	status_t LSM303AGR_ACC_W_I2_on_INT1(void *handle, LSM303AGR_ACC_I2_INT1_t newValue);
cparata	0:489965565a0d	857	status_t LSM303AGR_ACC_R_I2_on_INT1(void handle, LSM303AGR_ACC_I2_INT1_t value);
cparata	0:489965565a0d	858
cparata	0:489965565a0d	859	/*******************************************************************************
cparata	0:489965565a0d	860	* Register : CTRL_REG6
cparata	0:489965565a0d	861	* Address : 0X25
cparata	0:489965565a0d	862	* Bit Group Name: I2_CLICKEN
cparata	0:489965565a0d	863	* Permission : RW
cparata	0:489965565a0d	864	*******************************************************************************/
cparata	0:489965565a0d	865	typedef enum {
cparata	0:489965565a0d	866	LSM303AGR_ACC_I2_CLICKEN_DISABLED =0x00,
cparata	0:489965565a0d	867	LSM303AGR_ACC_I2_CLICKEN_ENABLED =0x80,
cparata	0:489965565a0d	868	} LSM303AGR_ACC_I2_CLICKEN_t;
cparata	0:489965565a0d	869
cparata	0:489965565a0d	870	#define LSM303AGR_ACC_I2_CLICKEN_MASK 0x80
cparata	0:489965565a0d	871	status_t LSM303AGR_ACC_W_Click_on_INT2(void *handle, LSM303AGR_ACC_I2_CLICKEN_t newValue);
cparata	0:489965565a0d	872	status_t LSM303AGR_ACC_R_Click_on_INT2(void handle, LSM303AGR_ACC_I2_CLICKEN_t value);
cparata	0:489965565a0d	873
cparata	0:489965565a0d	874	/*******************************************************************************
cparata	0:489965565a0d	875	* Register : REFERENCE
cparata	0:489965565a0d	876	* Address : 0X26
cparata	0:489965565a0d	877	* Bit Group Name: REF
cparata	0:489965565a0d	878	* Permission : RW
cparata	0:489965565a0d	879	*******************************************************************************/
cparata	0:489965565a0d	880	#define LSM303AGR_ACC_REF_MASK 0xFF
cparata	0:489965565a0d	881	#define LSM303AGR_ACC_REF_POSITION 0
cparata	0:489965565a0d	882	status_t LSM303AGR_ACC_W_ReferenceVal(void *handle, u8_t newValue);
cparata	0:489965565a0d	883	status_t LSM303AGR_ACC_R_ReferenceVal(void handle, u8_t value);
cparata	0:489965565a0d	884
cparata	0:489965565a0d	885	/*******************************************************************************
cparata	0:489965565a0d	886	* Register : STATUS_REG2
cparata	0:489965565a0d	887	* Address : 0X27
cparata	0:489965565a0d	888	* Bit Group Name: XDA
cparata	0:489965565a0d	889	* Permission : RO
cparata	0:489965565a0d	890	*******************************************************************************/
cparata	0:489965565a0d	891	typedef enum {
cparata	0:489965565a0d	892	LSM303AGR_ACC_XDA_NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	893	LSM303AGR_ACC_XDA_AVAILABLE =0x01,
cparata	0:489965565a0d	894	} LSM303AGR_ACC_XDA_t;
cparata	0:489965565a0d	895
cparata	0:489965565a0d	896	#define LSM303AGR_ACC_XDA_MASK 0x01
cparata	0:489965565a0d	897	status_t LSM303AGR_ACC_R_XDataAvail(void handle, LSM303AGR_ACC_XDA_t value);
cparata	0:489965565a0d	898
cparata	0:489965565a0d	899	/*******************************************************************************
cparata	0:489965565a0d	900	* Register : STATUS_REG2
cparata	0:489965565a0d	901	* Address : 0X27
cparata	0:489965565a0d	902	* Bit Group Name: YDA
cparata	0:489965565a0d	903	* Permission : RO
cparata	0:489965565a0d	904	*******************************************************************************/
cparata	0:489965565a0d	905	typedef enum {
cparata	0:489965565a0d	906	LSM303AGR_ACC_YDA_NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	907	LSM303AGR_ACC_YDA_AVAILABLE =0x02,
cparata	0:489965565a0d	908	} LSM303AGR_ACC_YDA_t;
cparata	0:489965565a0d	909
cparata	0:489965565a0d	910	#define LSM303AGR_ACC_YDA_MASK 0x02
cparata	0:489965565a0d	911	status_t LSM303AGR_ACC_R_YDataAvail(void handle, LSM303AGR_ACC_YDA_t value);
cparata	0:489965565a0d	912
cparata	0:489965565a0d	913	/*******************************************************************************
cparata	0:489965565a0d	914	* Register : STATUS_REG2
cparata	0:489965565a0d	915	* Address : 0X27
cparata	0:489965565a0d	916	* Bit Group Name: ZDA
cparata	0:489965565a0d	917	* Permission : RO
cparata	0:489965565a0d	918	*******************************************************************************/
cparata	0:489965565a0d	919	typedef enum {
cparata	0:489965565a0d	920	LSM303AGR_ACC_ZDA_NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	921	LSM303AGR_ACC_ZDA_AVAILABLE =0x04,
cparata	0:489965565a0d	922	} LSM303AGR_ACC_ZDA_t;
cparata	0:489965565a0d	923
cparata	0:489965565a0d	924	#define LSM303AGR_ACC_ZDA_MASK 0x04
cparata	0:489965565a0d	925	status_t LSM303AGR_ACC_R_ZDataAvail(void handle, LSM303AGR_ACC_ZDA_t value);
cparata	0:489965565a0d	926
cparata	0:489965565a0d	927	/*******************************************************************************
cparata	0:489965565a0d	928	* Register : STATUS_REG2
cparata	0:489965565a0d	929	* Address : 0X27
cparata	0:489965565a0d	930	* Bit Group Name: ZYXDA
cparata	0:489965565a0d	931	* Permission : RO
cparata	0:489965565a0d	932	*******************************************************************************/
cparata	0:489965565a0d	933	typedef enum {
cparata	0:489965565a0d	934	LSM303AGR_ACC_ZYXDA_NOT_AVAILABLE =0x00,
cparata	0:489965565a0d	935	LSM303AGR_ACC_ZYXDA_AVAILABLE =0x08,
cparata	0:489965565a0d	936	} LSM303AGR_ACC_ZYXDA_t;
cparata	0:489965565a0d	937
cparata	0:489965565a0d	938	#define LSM303AGR_ACC_ZYXDA_MASK 0x08
cparata	0:489965565a0d	939	status_t LSM303AGR_ACC_R_XYZDataAvail(void handle, LSM303AGR_ACC_ZYXDA_t value);
cparata	0:489965565a0d	940
cparata	0:489965565a0d	941	/*******************************************************************************
cparata	0:489965565a0d	942	* Register : STATUS_REG2
cparata	0:489965565a0d	943	* Address : 0X27
cparata	0:489965565a0d	944	* Bit Group Name: XOR
cparata	0:489965565a0d	945	* Permission : RO
cparata	0:489965565a0d	946	*******************************************************************************/
cparata	0:489965565a0d	947	typedef enum {
cparata	0:489965565a0d	948	LSM303AGR_ACC_XOR_NO_OVERRUN =0x00,
cparata	0:489965565a0d	949	LSM303AGR_ACC_XOR_OVERRUN =0x10,
cparata	0:489965565a0d	950	} LSM303AGR_ACC_XOR_t;
cparata	0:489965565a0d	951
cparata	0:489965565a0d	952	#define LSM303AGR_ACC_XOR_MASK 0x10
cparata	0:489965565a0d	953	status_t LSM303AGR_ACC_R_XDataOverrun(void handle, LSM303AGR_ACC_XOR_t value);
cparata	0:489965565a0d	954
cparata	0:489965565a0d	955	/*******************************************************************************
cparata	0:489965565a0d	956	* Register : STATUS_REG2
cparata	0:489965565a0d	957	* Address : 0X27
cparata	0:489965565a0d	958	* Bit Group Name: YOR
cparata	0:489965565a0d	959	* Permission : RO
cparata	0:489965565a0d	960	*******************************************************************************/
cparata	0:489965565a0d	961	typedef enum {
cparata	0:489965565a0d	962	LSM303AGR_ACC_YOR_NO_OVERRUN =0x00,
cparata	0:489965565a0d	963	LSM303AGR_ACC_YOR_OVERRUN =0x20,
cparata	0:489965565a0d	964	} LSM303AGR_ACC_YOR_t;
cparata	0:489965565a0d	965
cparata	0:489965565a0d	966	#define LSM303AGR_ACC_YOR_MASK 0x20
cparata	0:489965565a0d	967	status_t LSM303AGR_ACC_R_YDataOverrun(void handle, LSM303AGR_ACC_YOR_t value);
cparata	0:489965565a0d	968
cparata	0:489965565a0d	969	/*******************************************************************************
cparata	0:489965565a0d	970	* Register : STATUS_REG2
cparata	0:489965565a0d	971	* Address : 0X27
cparata	0:489965565a0d	972	* Bit Group Name: ZOR
cparata	0:489965565a0d	973	* Permission : RO
cparata	0:489965565a0d	974	*******************************************************************************/
cparata	0:489965565a0d	975	typedef enum {
cparata	0:489965565a0d	976	LSM303AGR_ACC_ZOR_NO_OVERRUN =0x00,
cparata	0:489965565a0d	977	LSM303AGR_ACC_ZOR_OVERRUN =0x40,
cparata	0:489965565a0d	978	} LSM303AGR_ACC_ZOR_t;
cparata	0:489965565a0d	979
cparata	0:489965565a0d	980	#define LSM303AGR_ACC_ZOR_MASK 0x40
cparata	0:489965565a0d	981	status_t LSM303AGR_ACC_R_ZDataOverrun(void handle, LSM303AGR_ACC_ZOR_t value);
cparata	0:489965565a0d	982
cparata	0:489965565a0d	983	/*******************************************************************************
cparata	0:489965565a0d	984	* Register : STATUS_REG2
cparata	0:489965565a0d	985	* Address : 0X27
cparata	0:489965565a0d	986	* Bit Group Name: ZYXOR
cparata	0:489965565a0d	987	* Permission : RO
cparata	0:489965565a0d	988	*******************************************************************************/
cparata	0:489965565a0d	989	typedef enum {
cparata	0:489965565a0d	990	LSM303AGR_ACC_ZYXOR_NO_OVERRUN =0x00,
cparata	0:489965565a0d	991	LSM303AGR_ACC_ZYXOR_OVERRUN =0x80,
cparata	0:489965565a0d	992	} LSM303AGR_ACC_ZYXOR_t;
cparata	0:489965565a0d	993
cparata	0:489965565a0d	994	#define LSM303AGR_ACC_ZYXOR_MASK 0x80
cparata	0:489965565a0d	995	status_t LSM303AGR_ACC_R_XYZDataOverrun(void handle, LSM303AGR_ACC_ZYXOR_t value);
cparata	0:489965565a0d	996
cparata	0:489965565a0d	997	/*******************************************************************************
cparata	0:489965565a0d	998	* Register : FIFO_CTRL_REG
cparata	0:489965565a0d	999	* Address : 0X2E
cparata	0:489965565a0d	1000	* Bit Group Name: FTH
cparata	0:489965565a0d	1001	* Permission : RW
cparata	0:489965565a0d	1002	*******************************************************************************/
cparata	0:489965565a0d	1003	#define LSM303AGR_ACC_FTH_MASK 0x1F
cparata	0:489965565a0d	1004	#define LSM303AGR_ACC_FTH_POSITION 0
cparata	0:489965565a0d	1005	status_t LSM303AGR_ACC_W_FifoThreshold(void *handle, u8_t newValue);
cparata	0:489965565a0d	1006	status_t LSM303AGR_ACC_R_FifoThreshold(void handle, u8_t value);
cparata	0:489965565a0d	1007
cparata	0:489965565a0d	1008	/*******************************************************************************
cparata	0:489965565a0d	1009	* Register : FIFO_CTRL_REG
cparata	0:489965565a0d	1010	* Address : 0X2E
cparata	0:489965565a0d	1011	* Bit Group Name: TR
cparata	0:489965565a0d	1012	* Permission : RW
cparata	0:489965565a0d	1013	*******************************************************************************/
cparata	0:489965565a0d	1014	typedef enum {
cparata	0:489965565a0d	1015	LSM303AGR_ACC_TR_TRIGGER_ON_INT1 =0x00,
cparata	0:489965565a0d	1016	LSM303AGR_ACC_TR_TRIGGER_ON_INT2 =0x20,
cparata	0:489965565a0d	1017	} LSM303AGR_ACC_TR_t;
cparata	0:489965565a0d	1018
cparata	0:489965565a0d	1019	#define LSM303AGR_ACC_TR_MASK 0x20
cparata	0:489965565a0d	1020	status_t LSM303AGR_ACC_W_TriggerSel(void *handle, LSM303AGR_ACC_TR_t newValue);
cparata	0:489965565a0d	1021	status_t LSM303AGR_ACC_R_TriggerSel(void handle, LSM303AGR_ACC_TR_t value);
cparata	0:489965565a0d	1022
cparata	0:489965565a0d	1023	/*******************************************************************************
cparata	0:489965565a0d	1024	* Register : FIFO_CTRL_REG
cparata	0:489965565a0d	1025	* Address : 0X2E
cparata	0:489965565a0d	1026	* Bit Group Name: FM
cparata	0:489965565a0d	1027	* Permission : RW
cparata	0:489965565a0d	1028	*******************************************************************************/
cparata	0:489965565a0d	1029	typedef enum {
cparata	0:489965565a0d	1030	LSM303AGR_ACC_FM_BYPASS =0x00,
cparata	0:489965565a0d	1031	LSM303AGR_ACC_FM_FIFO =0x40,
cparata	0:489965565a0d	1032	LSM303AGR_ACC_FM_STREAM =0x80,
cparata	0:489965565a0d	1033	LSM303AGR_ACC_FM_TRIGGER =0xC0,
cparata	0:489965565a0d	1034	} LSM303AGR_ACC_FM_t;
cparata	0:489965565a0d	1035
cparata	0:489965565a0d	1036	#define LSM303AGR_ACC_FM_MASK 0xC0
cparata	0:489965565a0d	1037	status_t LSM303AGR_ACC_W_FifoMode(void *handle, LSM303AGR_ACC_FM_t newValue);
cparata	0:489965565a0d	1038	status_t LSM303AGR_ACC_R_FifoMode(void handle, LSM303AGR_ACC_FM_t value);
cparata	0:489965565a0d	1039
cparata	0:489965565a0d	1040	/*******************************************************************************
cparata	0:489965565a0d	1041	* Register : FIFO_SRC_REG
cparata	0:489965565a0d	1042	* Address : 0X2F
cparata	0:489965565a0d	1043	* Bit Group Name: FSS
cparata	0:489965565a0d	1044	* Permission : RO
cparata	0:489965565a0d	1045	*******************************************************************************/
cparata	0:489965565a0d	1046	#define LSM303AGR_ACC_FSS_MASK 0x1F
cparata	0:489965565a0d	1047	#define LSM303AGR_ACC_FSS_POSITION 0
cparata	0:489965565a0d	1048	status_t LSM303AGR_ACC_R_FifoSamplesAvail(void handle, u8_t value);
cparata	0:489965565a0d	1049
cparata	0:489965565a0d	1050	/*******************************************************************************
cparata	0:489965565a0d	1051	* Register : FIFO_SRC_REG
cparata	0:489965565a0d	1052	* Address : 0X2F
cparata	0:489965565a0d	1053	* Bit Group Name: EMPTY
cparata	0:489965565a0d	1054	* Permission : RO
cparata	0:489965565a0d	1055	*******************************************************************************/
cparata	0:489965565a0d	1056	typedef enum {
cparata	0:489965565a0d	1057	LSM303AGR_ACC_EMPTY_NOT_EMPTY =0x00,
cparata	0:489965565a0d	1058	LSM303AGR_ACC_EMPTY_EMPTY =0x20,
cparata	0:489965565a0d	1059	} LSM303AGR_ACC_EMPTY_t;
cparata	0:489965565a0d	1060
cparata	0:489965565a0d	1061	#define LSM303AGR_ACC_EMPTY_MASK 0x20
cparata	0:489965565a0d	1062	status_t LSM303AGR_ACC_R_FifoEmpty(void handle, LSM303AGR_ACC_EMPTY_t value);
cparata	0:489965565a0d	1063
cparata	0:489965565a0d	1064	/*******************************************************************************
cparata	0:489965565a0d	1065	* Register : FIFO_SRC_REG
cparata	0:489965565a0d	1066	* Address : 0X2F
cparata	0:489965565a0d	1067	* Bit Group Name: OVRN_FIFO
cparata	0:489965565a0d	1068	* Permission : RO
cparata	0:489965565a0d	1069	*******************************************************************************/
cparata	0:489965565a0d	1070	typedef enum {
cparata	0:489965565a0d	1071	LSM303AGR_ACC_OVRN_FIFO_NO_OVERRUN =0x00,
cparata	0:489965565a0d	1072	LSM303AGR_ACC_OVRN_FIFO_OVERRUN =0x40,
cparata	0:489965565a0d	1073	} LSM303AGR_ACC_OVRN_FIFO_t;
cparata	0:489965565a0d	1074
cparata	0:489965565a0d	1075	#define LSM303AGR_ACC_OVRN_FIFO_MASK 0x40
cparata	0:489965565a0d	1076	status_t LSM303AGR_ACC_R_FifoOverrun(void handle, LSM303AGR_ACC_OVRN_FIFO_t value);
cparata	0:489965565a0d	1077
cparata	0:489965565a0d	1078	/*******************************************************************************
cparata	0:489965565a0d	1079	* Register : FIFO_SRC_REG
cparata	0:489965565a0d	1080	* Address : 0X2F
cparata	0:489965565a0d	1081	* Bit Group Name: WTM
cparata	0:489965565a0d	1082	* Permission : RO
cparata	0:489965565a0d	1083	*******************************************************************************/
cparata	0:489965565a0d	1084	typedef enum {
cparata	0:489965565a0d	1085	LSM303AGR_ACC_WTM_NORMAL =0x00,
cparata	0:489965565a0d	1086	LSM303AGR_ACC_WTM_OVERFLOW =0x80,
cparata	0:489965565a0d	1087	} LSM303AGR_ACC_WTM_t;
cparata	0:489965565a0d	1088
cparata	0:489965565a0d	1089	#define LSM303AGR_ACC_WTM_MASK 0x80
cparata	0:489965565a0d	1090	status_t LSM303AGR_ACC_R_WatermarkLevel(void handle, LSM303AGR_ACC_WTM_t value);
cparata	0:489965565a0d	1091
cparata	0:489965565a0d	1092	/*******************************************************************************
cparata	0:489965565a0d	1093	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1094	* Address : 0X30/0x34
cparata	0:489965565a0d	1095	* Bit Group Name: XLIE
cparata	0:489965565a0d	1096	* Permission : RW
cparata	0:489965565a0d	1097	*******************************************************************************/
cparata	0:489965565a0d	1098	typedef enum {
cparata	0:489965565a0d	1099	LSM303AGR_ACC_XLIE_DISABLED =0x00,
cparata	0:489965565a0d	1100	LSM303AGR_ACC_XLIE_ENABLED =0x01,
cparata	0:489965565a0d	1101	} LSM303AGR_ACC_XLIE_t;
cparata	0:489965565a0d	1102
cparata	0:489965565a0d	1103	#define LSM303AGR_ACC_XLIE_MASK 0x01
cparata	0:489965565a0d	1104	status_t LSM303AGR_ACC_W_Int1EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue);
cparata	0:489965565a0d	1105	status_t LSM303AGR_ACC_R_Int1EnXLo(void handle, LSM303AGR_ACC_XLIE_t value);
cparata	0:489965565a0d	1106	status_t LSM303AGR_ACC_W_Int2EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue);
cparata	0:489965565a0d	1107	status_t LSM303AGR_ACC_R_Int2EnXLo(void handle, LSM303AGR_ACC_XLIE_t value);
cparata	0:489965565a0d	1108
cparata	0:489965565a0d	1109	/*******************************************************************************
cparata	0:489965565a0d	1110	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1111	* Address : 0X30/0x34
cparata	0:489965565a0d	1112	* Bit Group Name: XHIE
cparata	0:489965565a0d	1113	* Permission : RW
cparata	0:489965565a0d	1114	*******************************************************************************/
cparata	0:489965565a0d	1115	typedef enum {
cparata	0:489965565a0d	1116	LSM303AGR_ACC_XHIE_DISABLED =0x00,
cparata	0:489965565a0d	1117	LSM303AGR_ACC_XHIE_ENABLED =0x02,
cparata	0:489965565a0d	1118	} LSM303AGR_ACC_XHIE_t;
cparata	0:489965565a0d	1119
cparata	0:489965565a0d	1120	#define LSM303AGR_ACC_XHIE_MASK 0x02
cparata	0:489965565a0d	1121	status_t LSM303AGR_ACC_W_Int1EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue);
cparata	0:489965565a0d	1122	status_t LSM303AGR_ACC_R_Int1EnXHi(void handle, LSM303AGR_ACC_XHIE_t value);
cparata	0:489965565a0d	1123	status_t LSM303AGR_ACC_W_Int2EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue);
cparata	0:489965565a0d	1124	status_t LSM303AGR_ACC_R_Int2EnXHi(void handle, LSM303AGR_ACC_XHIE_t value);
cparata	0:489965565a0d	1125
cparata	0:489965565a0d	1126	/*******************************************************************************
cparata	0:489965565a0d	1127	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1128	* Address : 0X30/0x34
cparata	0:489965565a0d	1129	* Bit Group Name: YLIE
cparata	0:489965565a0d	1130	* Permission : RW
cparata	0:489965565a0d	1131	*******************************************************************************/
cparata	0:489965565a0d	1132	typedef enum {
cparata	0:489965565a0d	1133	LSM303AGR_ACC_YLIE_DISABLED =0x00,
cparata	0:489965565a0d	1134	LSM303AGR_ACC_YLIE_ENABLED =0x04,
cparata	0:489965565a0d	1135	} LSM303AGR_ACC_YLIE_t;
cparata	0:489965565a0d	1136
cparata	0:489965565a0d	1137	#define LSM303AGR_ACC_YLIE_MASK 0x04
cparata	0:489965565a0d	1138	status_t LSM303AGR_ACC_W_Int1EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue);
cparata	0:489965565a0d	1139	status_t LSM303AGR_ACC_R_Int1EnYLo(void handle, LSM303AGR_ACC_YLIE_t value);
cparata	0:489965565a0d	1140	status_t LSM303AGR_ACC_W_Int2EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue);
cparata	0:489965565a0d	1141	status_t LSM303AGR_ACC_R_Int2EnYLo(void handle, LSM303AGR_ACC_YLIE_t value);
cparata	0:489965565a0d	1142
cparata	0:489965565a0d	1143	/*******************************************************************************
cparata	0:489965565a0d	1144	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1145	* Address : 0X30/0x34
cparata	0:489965565a0d	1146	* Bit Group Name: YHIE
cparata	0:489965565a0d	1147	* Permission : RW
cparata	0:489965565a0d	1148	*******************************************************************************/
cparata	0:489965565a0d	1149	typedef enum {
cparata	0:489965565a0d	1150	LSM303AGR_ACC_YHIE_DISABLED =0x00,
cparata	0:489965565a0d	1151	LSM303AGR_ACC_YHIE_ENABLED =0x08,
cparata	0:489965565a0d	1152	} LSM303AGR_ACC_YHIE_t;
cparata	0:489965565a0d	1153
cparata	0:489965565a0d	1154	#define LSM303AGR_ACC_YHIE_MASK 0x08
cparata	0:489965565a0d	1155	status_t LSM303AGR_ACC_W_Int1EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue);
cparata	0:489965565a0d	1156	status_t LSM303AGR_ACC_R_Int1EnYHi(void handle, LSM303AGR_ACC_YHIE_t value);
cparata	0:489965565a0d	1157	status_t LSM303AGR_ACC_W_Int2EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue);
cparata	0:489965565a0d	1158	status_t LSM303AGR_ACC_R_Int2EnYHi(void handle, LSM303AGR_ACC_YHIE_t value);
cparata	0:489965565a0d	1159
cparata	0:489965565a0d	1160	/*******************************************************************************
cparata	0:489965565a0d	1161	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1162	* Address : 0X30/0x34
cparata	0:489965565a0d	1163	* Bit Group Name: ZLIE
cparata	0:489965565a0d	1164	* Permission : RW
cparata	0:489965565a0d	1165	*******************************************************************************/
cparata	0:489965565a0d	1166	typedef enum {
cparata	0:489965565a0d	1167	LSM303AGR_ACC_ZLIE_DISABLED =0x00,
cparata	0:489965565a0d	1168	LSM303AGR_ACC_ZLIE_ENABLED =0x10,
cparata	0:489965565a0d	1169	} LSM303AGR_ACC_ZLIE_t;
cparata	0:489965565a0d	1170
cparata	0:489965565a0d	1171	#define LSM303AGR_ACC_ZLIE_MASK 0x10
cparata	0:489965565a0d	1172	status_t LSM303AGR_ACC_W_Int1EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue);
cparata	0:489965565a0d	1173	status_t LSM303AGR_ACC_R_Int1EnZLo(void handle, LSM303AGR_ACC_ZLIE_t value);
cparata	0:489965565a0d	1174	status_t LSM303AGR_ACC_W_Int2EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue);
cparata	0:489965565a0d	1175	status_t LSM303AGR_ACC_R_Int2EnZLo(void handle, LSM303AGR_ACC_ZLIE_t value);
cparata	0:489965565a0d	1176
cparata	0:489965565a0d	1177	/*******************************************************************************
cparata	0:489965565a0d	1178	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1179	* Address : 0X30/0x34
cparata	0:489965565a0d	1180	* Bit Group Name: ZHIE
cparata	0:489965565a0d	1181	* Permission : RW
cparata	0:489965565a0d	1182	*******************************************************************************/
cparata	0:489965565a0d	1183	typedef enum {
cparata	0:489965565a0d	1184	LSM303AGR_ACC_ZHIE_DISABLED =0x00,
cparata	0:489965565a0d	1185	LSM303AGR_ACC_ZHIE_ENABLED =0x20,
cparata	0:489965565a0d	1186	} LSM303AGR_ACC_ZHIE_t;
cparata	0:489965565a0d	1187
cparata	0:489965565a0d	1188	#define LSM303AGR_ACC_ZHIE_MASK 0x20
cparata	0:489965565a0d	1189	status_t LSM303AGR_ACC_W_Int1EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue);
cparata	0:489965565a0d	1190	status_t LSM303AGR_ACC_R_Int1EnZHi(void handle, LSM303AGR_ACC_ZHIE_t value);
cparata	0:489965565a0d	1191	status_t LSM303AGR_ACC_W_Int2EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue);
cparata	0:489965565a0d	1192	status_t LSM303AGR_ACC_R_Int2EnZHi(void handle, LSM303AGR_ACC_ZHIE_t value);
cparata	0:489965565a0d	1193
cparata	0:489965565a0d	1194	/*******************************************************************************
cparata	0:489965565a0d	1195	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1196	* Address : 0X30/0x34
cparata	0:489965565a0d	1197	* Bit Group Name: 6D
cparata	0:489965565a0d	1198	* Permission : RW
cparata	0:489965565a0d	1199	*******************************************************************************/
cparata	0:489965565a0d	1200	typedef enum {
cparata	0:489965565a0d	1201	LSM303AGR_ACC_6D_DISABLED =0x00,
cparata	0:489965565a0d	1202	LSM303AGR_ACC_6D_ENABLED =0x40,
cparata	0:489965565a0d	1203	} LSM303AGR_ACC_6D_t;
cparata	0:489965565a0d	1204
cparata	0:489965565a0d	1205	#define LSM303AGR_ACC_6D_MASK 0x40
cparata	0:489965565a0d	1206	status_t LSM303AGR_ACC_W_Int1_6D(void *handle, LSM303AGR_ACC_6D_t newValue);
cparata	0:489965565a0d	1207	status_t LSM303AGR_ACC_R_Int1_6D(void handle, LSM303AGR_ACC_6D_t value);
cparata	0:489965565a0d	1208	status_t LSM303AGR_ACC_W_Int2_6D(void *handle, LSM303AGR_ACC_6D_t newValue);
cparata	0:489965565a0d	1209	status_t LSM303AGR_ACC_R_Int2_6D(void handle, LSM303AGR_ACC_6D_t value);
cparata	0:489965565a0d	1210
cparata	0:489965565a0d	1211	/*******************************************************************************
cparata	0:489965565a0d	1212	* Register : INT1_CFG/INT2_CFG
cparata	0:489965565a0d	1213	* Address : 0X30/0x34
cparata	0:489965565a0d	1214	* Bit Group Name: AOI
cparata	0:489965565a0d	1215	* Permission : RW
cparata	0:489965565a0d	1216	*******************************************************************************/
cparata	0:489965565a0d	1217	typedef enum {
cparata	0:489965565a0d	1218	LSM303AGR_ACC_AOI_OR =0x00,
cparata	0:489965565a0d	1219	LSM303AGR_ACC_AOI_AND =0x80,
cparata	0:489965565a0d	1220	} LSM303AGR_ACC_AOI_t;
cparata	0:489965565a0d	1221
cparata	0:489965565a0d	1222	#define LSM303AGR_ACC_AOI_MASK 0x80
cparata	0:489965565a0d	1223	status_t LSM303AGR_ACC_W_Int1_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue);
cparata	0:489965565a0d	1224	status_t LSM303AGR_ACC_R_Int1_AOI(void handle, LSM303AGR_ACC_AOI_t value);
cparata	0:489965565a0d	1225	status_t LSM303AGR_ACC_W_Int2_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue);
cparata	0:489965565a0d	1226	status_t LSM303AGR_ACC_R_Int2_AOI(void handle, LSM303AGR_ACC_AOI_t value);
cparata	0:489965565a0d	1227
cparata	0:489965565a0d	1228	/*******************************************************************************
cparata	0:489965565a0d	1229	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1230	* Address : 0X31/0x35
cparata	0:489965565a0d	1231	* Bit Group Name: XL
cparata	0:489965565a0d	1232	* Permission : RO
cparata	0:489965565a0d	1233	*******************************************************************************/
cparata	0:489965565a0d	1234	typedef enum {
cparata	0:489965565a0d	1235	LSM303AGR_ACC_XL_DOWN =0x00,
cparata	0:489965565a0d	1236	LSM303AGR_ACC_XL_UP =0x01,
cparata	0:489965565a0d	1237	} LSM303AGR_ACC_XL_t;
cparata	0:489965565a0d	1238
cparata	0:489965565a0d	1239	#define LSM303AGR_ACC_XL_MASK 0x01
cparata	0:489965565a0d	1240	status_t LSM303AGR_ACC_R_Int1_Xlo(void handle, LSM303AGR_ACC_XL_t value);
cparata	0:489965565a0d	1241	status_t LSM303AGR_ACC_R_Int2_Xlo(void handle, LSM303AGR_ACC_XL_t value);
cparata	0:489965565a0d	1242
cparata	0:489965565a0d	1243	/*******************************************************************************
cparata	0:489965565a0d	1244	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1245	* Address : 0X31/0x35
cparata	0:489965565a0d	1246	* Bit Group Name: XH
cparata	0:489965565a0d	1247	* Permission : RO
cparata	0:489965565a0d	1248	*******************************************************************************/
cparata	0:489965565a0d	1249	typedef enum {
cparata	0:489965565a0d	1250	LSM303AGR_ACC_XH_DOWN =0x00,
cparata	0:489965565a0d	1251	LSM303AGR_ACC_XH_UP =0x02,
cparata	0:489965565a0d	1252	} LSM303AGR_ACC_XH_t;
cparata	0:489965565a0d	1253
cparata	0:489965565a0d	1254	#define LSM303AGR_ACC_XH_MASK 0x02
cparata	0:489965565a0d	1255	status_t LSM303AGR_ACC_R_Int1_XHi(void handle, LSM303AGR_ACC_XH_t value);
cparata	0:489965565a0d	1256	status_t LSM303AGR_ACC_R_Int2_XHi(void handle, LSM303AGR_ACC_XH_t value);
cparata	0:489965565a0d	1257
cparata	0:489965565a0d	1258	/*******************************************************************************
cparata	0:489965565a0d	1259	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1260	* Address : 0X31/0x35
cparata	0:489965565a0d	1261	* Bit Group Name: YL
cparata	0:489965565a0d	1262	* Permission : RO
cparata	0:489965565a0d	1263	*******************************************************************************/
cparata	0:489965565a0d	1264	typedef enum {
cparata	0:489965565a0d	1265	LSM303AGR_ACC_YL_DOWN =0x00,
cparata	0:489965565a0d	1266	LSM303AGR_ACC_YL_UP =0x04,
cparata	0:489965565a0d	1267	} LSM303AGR_ACC_YL_t;
cparata	0:489965565a0d	1268
cparata	0:489965565a0d	1269	#define LSM303AGR_ACC_YL_MASK 0x04
cparata	0:489965565a0d	1270	status_t LSM303AGR_ACC_R_Int1_YLo(void handle, LSM303AGR_ACC_YL_t value);
cparata	0:489965565a0d	1271	status_t LSM303AGR_ACC_R_Int2_YLo(void handle, LSM303AGR_ACC_YL_t value);
cparata	0:489965565a0d	1272
cparata	0:489965565a0d	1273	/*******************************************************************************
cparata	0:489965565a0d	1274	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1275	* Address : 0X31/0x35
cparata	0:489965565a0d	1276	* Bit Group Name: YH
cparata	0:489965565a0d	1277	* Permission : RO
cparata	0:489965565a0d	1278	*******************************************************************************/
cparata	0:489965565a0d	1279	typedef enum {
cparata	0:489965565a0d	1280	LSM303AGR_ACC_YH_DOWN =0x00,
cparata	0:489965565a0d	1281	LSM303AGR_ACC_YH_UP =0x08,
cparata	0:489965565a0d	1282	} LSM303AGR_ACC_YH_t;
cparata	0:489965565a0d	1283
cparata	0:489965565a0d	1284	#define LSM303AGR_ACC_YH_MASK 0x08
cparata	0:489965565a0d	1285	status_t LSM303AGR_ACC_R_Int1_YHi(void handle, LSM303AGR_ACC_YH_t value);
cparata	0:489965565a0d	1286	status_t LSM303AGR_ACC_R_Int2_YHi(void handle, LSM303AGR_ACC_YH_t value);
cparata	0:489965565a0d	1287
cparata	0:489965565a0d	1288	/*******************************************************************************
cparata	0:489965565a0d	1289	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1290	* Address : 0X31/0x35
cparata	0:489965565a0d	1291	* Bit Group Name: ZL
cparata	0:489965565a0d	1292	* Permission : RO
cparata	0:489965565a0d	1293	*******************************************************************************/
cparata	0:489965565a0d	1294	typedef enum {
cparata	0:489965565a0d	1295	LSM303AGR_ACC_ZL_DOWN =0x00,
cparata	0:489965565a0d	1296	LSM303AGR_ACC_ZL_UP =0x10,
cparata	0:489965565a0d	1297	} LSM303AGR_ACC_ZL_t;
cparata	0:489965565a0d	1298
cparata	0:489965565a0d	1299	#define LSM303AGR_ACC_ZL_MASK 0x10
cparata	0:489965565a0d	1300	status_t LSM303AGR_ACC_R_Int1_Zlo(void handle, LSM303AGR_ACC_ZL_t value);
cparata	0:489965565a0d	1301	status_t LSM303AGR_ACC_R_Int2_Zlo(void handle, LSM303AGR_ACC_ZL_t value);
cparata	0:489965565a0d	1302
cparata	0:489965565a0d	1303	/*******************************************************************************
cparata	0:489965565a0d	1304	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1305	* Address : 0X31/0x35
cparata	0:489965565a0d	1306	* Bit Group Name: ZH
cparata	0:489965565a0d	1307	* Permission : RO
cparata	0:489965565a0d	1308	*******************************************************************************/
cparata	0:489965565a0d	1309	typedef enum {
cparata	0:489965565a0d	1310	LSM303AGR_ACC_ZH_DOWN =0x00,
cparata	0:489965565a0d	1311	LSM303AGR_ACC_ZH_UP =0x20,
cparata	0:489965565a0d	1312	} LSM303AGR_ACC_ZH_t;
cparata	0:489965565a0d	1313
cparata	0:489965565a0d	1314	#define LSM303AGR_ACC_ZH_MASK 0x20
cparata	0:489965565a0d	1315	status_t LSM303AGR_ACC_R_Int1_ZHi(void handle, LSM303AGR_ACC_ZH_t value);
cparata	0:489965565a0d	1316	status_t LSM303AGR_ACC_R_Int2_ZHi(void handle, LSM303AGR_ACC_ZH_t value);
cparata	0:489965565a0d	1317
cparata	0:489965565a0d	1318	/*******************************************************************************
cparata	0:489965565a0d	1319	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:489965565a0d	1320	* Address : 0X31/0x35
cparata	0:489965565a0d	1321	* Bit Group Name: IA
cparata	0:489965565a0d	1322	* Permission : RO
cparata	0:489965565a0d	1323	*******************************************************************************/
cparata	0:489965565a0d	1324	typedef enum {
cparata	0:489965565a0d	1325	LSM303AGR_ACC_IA_DOWN =0x00,
cparata	0:489965565a0d	1326	LSM303AGR_ACC_IA_UP =0x40,
cparata	0:489965565a0d	1327	} LSM303AGR_ACC_IA_t;
cparata	0:489965565a0d	1328
cparata	0:489965565a0d	1329	#define LSM303AGR_ACC_IA_MASK 0x40
cparata	0:489965565a0d	1330	status_t LSM303AGR_ACC_R_Int1_IA(void handle, LSM303AGR_ACC_IA_t value);
cparata	0:489965565a0d	1331	status_t LSM303AGR_ACC_R_Int2_IA(void handle, LSM303AGR_ACC_IA_t value);
cparata	0:489965565a0d	1332
cparata	0:489965565a0d	1333	/*******************************************************************************
cparata	0:489965565a0d	1334	* Register : INT1_THS/INT2_THS
cparata	0:489965565a0d	1335	* Address : 0X32/0x36
cparata	0:489965565a0d	1336	* Bit Group Name: THS
cparata	0:489965565a0d	1337	* Permission : RW
cparata	0:489965565a0d	1338	*******************************************************************************/
cparata	0:489965565a0d	1339	#define LSM303AGR_ACC_THS_MASK 0x7F
cparata	0:489965565a0d	1340	#define LSM303AGR_ACC_THS_POSITION 0
cparata	0:489965565a0d	1341	status_t LSM303AGR_ACC_W_Int1_Threshold(void *handle, u8_t newValue);
cparata	0:489965565a0d	1342	status_t LSM303AGR_ACC_R_Int1_Threshold(void handle, u8_t value);
cparata	0:489965565a0d	1343	status_t LSM303AGR_ACC_W_Int2_Threshold(void *handle, u8_t newValue);
cparata	0:489965565a0d	1344	status_t LSM303AGR_ACC_R_Int2_Threshold(void handle, u8_t value);
cparata	0:489965565a0d	1345
cparata	0:489965565a0d	1346	/*******************************************************************************
cparata	0:489965565a0d	1347	* Register : INT1_DURATION/INT2_DURATION
cparata	0:489965565a0d	1348	* Address : 0X33/0x37
cparata	0:489965565a0d	1349	* Bit Group Name: D
cparata	0:489965565a0d	1350	* Permission : RW
cparata	0:489965565a0d	1351	*******************************************************************************/
cparata	0:489965565a0d	1352	#define LSM303AGR_ACC_D_MASK 0x7F
cparata	0:489965565a0d	1353	#define LSM303AGR_ACC_D_POSITION 0
cparata	0:489965565a0d	1354	status_t LSM303AGR_ACC_W_Int1_Duration(void *handle, u8_t newValue);
cparata	0:489965565a0d	1355	status_t LSM303AGR_ACC_R_Int1_Duration(void handle, u8_t value);
cparata	0:489965565a0d	1356	status_t LSM303AGR_ACC_W_Int2_Duration(void *handle, u8_t newValue);
cparata	0:489965565a0d	1357	status_t LSM303AGR_ACC_R_Int2_Duration(void handle, u8_t value);
cparata	0:489965565a0d	1358
cparata	0:489965565a0d	1359	/*******************************************************************************
cparata	0:489965565a0d	1360	* Register : CLICK_CFG
cparata	0:489965565a0d	1361	* Address : 0X38
cparata	0:489965565a0d	1362	* Bit Group Name: XS
cparata	0:489965565a0d	1363	* Permission : RW
cparata	0:489965565a0d	1364	*******************************************************************************/
cparata	0:489965565a0d	1365	typedef enum {
cparata	0:489965565a0d	1366	LSM303AGR_ACC_XS_DISABLED =0x00,
cparata	0:489965565a0d	1367	LSM303AGR_ACC_XS_ENABLED =0x01,
cparata	0:489965565a0d	1368	} LSM303AGR_ACC_XS_t;
cparata	0:489965565a0d	1369
cparata	0:489965565a0d	1370	#define LSM303AGR_ACC_XS_MASK 0x01
cparata	0:489965565a0d	1371	status_t LSM303AGR_ACC_W_XSingle(void *handle, LSM303AGR_ACC_XS_t newValue);
cparata	0:489965565a0d	1372	status_t LSM303AGR_ACC_R_XSingle(void handle, LSM303AGR_ACC_XS_t value);
cparata	0:489965565a0d	1373
cparata	0:489965565a0d	1374	/*******************************************************************************
cparata	0:489965565a0d	1375	* Register : CLICK_CFG
cparata	0:489965565a0d	1376	* Address : 0X38
cparata	0:489965565a0d	1377	* Bit Group Name: XD
cparata	0:489965565a0d	1378	* Permission : RW
cparata	0:489965565a0d	1379	*******************************************************************************/
cparata	0:489965565a0d	1380	typedef enum {
cparata	0:489965565a0d	1381	LSM303AGR_ACC_XD_DISABLED =0x00,
cparata	0:489965565a0d	1382	LSM303AGR_ACC_XD_ENABLED =0x02,
cparata	0:489965565a0d	1383	} LSM303AGR_ACC_XD_t;
cparata	0:489965565a0d	1384
cparata	0:489965565a0d	1385	#define LSM303AGR_ACC_XD_MASK 0x02
cparata	0:489965565a0d	1386	status_t LSM303AGR_ACC_W_XDouble(void *handle, LSM303AGR_ACC_XD_t newValue);
cparata	0:489965565a0d	1387	status_t LSM303AGR_ACC_R_XDouble(void handle, LSM303AGR_ACC_XD_t value);
cparata	0:489965565a0d	1388
cparata	0:489965565a0d	1389	/*******************************************************************************
cparata	0:489965565a0d	1390	* Register : CLICK_CFG
cparata	0:489965565a0d	1391	* Address : 0X38
cparata	0:489965565a0d	1392	* Bit Group Name: YS
cparata	0:489965565a0d	1393	* Permission : RW
cparata	0:489965565a0d	1394	*******************************************************************************/
cparata	0:489965565a0d	1395	typedef enum {
cparata	0:489965565a0d	1396	LSM303AGR_ACC_YS_DISABLED =0x00,
cparata	0:489965565a0d	1397	LSM303AGR_ACC_YS_ENABLED =0x04,
cparata	0:489965565a0d	1398	} LSM303AGR_ACC_YS_t;
cparata	0:489965565a0d	1399
cparata	0:489965565a0d	1400	#define LSM303AGR_ACC_YS_MASK 0x04
cparata	0:489965565a0d	1401	status_t LSM303AGR_ACC_W_YSingle(void *handle, LSM303AGR_ACC_YS_t newValue);
cparata	0:489965565a0d	1402	status_t LSM303AGR_ACC_R_YSingle(void handle, LSM303AGR_ACC_YS_t value);
cparata	0:489965565a0d	1403
cparata	0:489965565a0d	1404	/*******************************************************************************
cparata	0:489965565a0d	1405	* Register : CLICK_CFG
cparata	0:489965565a0d	1406	* Address : 0X38
cparata	0:489965565a0d	1407	* Bit Group Name: YD
cparata	0:489965565a0d	1408	* Permission : RW
cparata	0:489965565a0d	1409	*******************************************************************************/
cparata	0:489965565a0d	1410	typedef enum {
cparata	0:489965565a0d	1411	LSM303AGR_ACC_YD_DISABLED =0x00,
cparata	0:489965565a0d	1412	LSM303AGR_ACC_YD_ENABLED =0x08,
cparata	0:489965565a0d	1413	} LSM303AGR_ACC_YD_t;
cparata	0:489965565a0d	1414
cparata	0:489965565a0d	1415	#define LSM303AGR_ACC_YD_MASK 0x08
cparata	0:489965565a0d	1416	status_t LSM303AGR_ACC_W_YDouble(void *handle, LSM303AGR_ACC_YD_t newValue);
cparata	0:489965565a0d	1417	status_t LSM303AGR_ACC_R_YDouble(void handle, LSM303AGR_ACC_YD_t value);
cparata	0:489965565a0d	1418
cparata	0:489965565a0d	1419	/*******************************************************************************
cparata	0:489965565a0d	1420	* Register : CLICK_CFG
cparata	0:489965565a0d	1421	* Address : 0X38
cparata	0:489965565a0d	1422	* Bit Group Name: ZS
cparata	0:489965565a0d	1423	* Permission : RW
cparata	0:489965565a0d	1424	*******************************************************************************/
cparata	0:489965565a0d	1425	typedef enum {
cparata	0:489965565a0d	1426	LSM303AGR_ACC_ZS_DISABLED =0x00,
cparata	0:489965565a0d	1427	LSM303AGR_ACC_ZS_ENABLED =0x10,
cparata	0:489965565a0d	1428	} LSM303AGR_ACC_ZS_t;
cparata	0:489965565a0d	1429
cparata	0:489965565a0d	1430	#define LSM303AGR_ACC_ZS_MASK 0x10
cparata	0:489965565a0d	1431	status_t LSM303AGR_ACC_W_ZSingle(void *handle, LSM303AGR_ACC_ZS_t newValue);
cparata	0:489965565a0d	1432	status_t LSM303AGR_ACC_R_ZSingle(void handle, LSM303AGR_ACC_ZS_t value);
cparata	0:489965565a0d	1433
cparata	0:489965565a0d	1434	/*******************************************************************************
cparata	0:489965565a0d	1435	* Register : CLICK_CFG
cparata	0:489965565a0d	1436	* Address : 0X38
cparata	0:489965565a0d	1437	* Bit Group Name: ZD
cparata	0:489965565a0d	1438	* Permission : RW
cparata	0:489965565a0d	1439	*******************************************************************************/
cparata	0:489965565a0d	1440	typedef enum {
cparata	0:489965565a0d	1441	LSM303AGR_ACC_ZD_DISABLED =0x00,
cparata	0:489965565a0d	1442	LSM303AGR_ACC_ZD_ENABLED =0x20,
cparata	0:489965565a0d	1443	} LSM303AGR_ACC_ZD_t;
cparata	0:489965565a0d	1444
cparata	0:489965565a0d	1445	#define LSM303AGR_ACC_ZD_MASK 0x20
cparata	0:489965565a0d	1446	status_t LSM303AGR_ACC_W_ZDouble(void *handle, LSM303AGR_ACC_ZD_t newValue);
cparata	0:489965565a0d	1447	status_t LSM303AGR_ACC_R_ZDouble(void handle, LSM303AGR_ACC_ZD_t value);
cparata	0:489965565a0d	1448
cparata	0:489965565a0d	1449	/*******************************************************************************
cparata	0:489965565a0d	1450	* Register : CLICK_SRC
cparata	0:489965565a0d	1451	* Address : 0X39
cparata	0:489965565a0d	1452	* Bit Group Name: X
cparata	0:489965565a0d	1453	* Permission : RO
cparata	0:489965565a0d	1454	*******************************************************************************/
cparata	0:489965565a0d	1455	typedef enum {
cparata	0:489965565a0d	1456	LSM303AGR_ACC_X_DOWN =0x00,
cparata	0:489965565a0d	1457	LSM303AGR_ACC_X_UP =0x01,
cparata	0:489965565a0d	1458	} LSM303AGR_ACC_X_t;
cparata	0:489965565a0d	1459
cparata	0:489965565a0d	1460	#define LSM303AGR_ACC_X_MASK 0x01
cparata	0:489965565a0d	1461	status_t LSM303AGR_ACC_R_ClickX(void handle, LSM303AGR_ACC_X_t value);
cparata	0:489965565a0d	1462
cparata	0:489965565a0d	1463	/*******************************************************************************
cparata	0:489965565a0d	1464	* Register : CLICK_SRC
cparata	0:489965565a0d	1465	* Address : 0X39
cparata	0:489965565a0d	1466	* Bit Group Name: Y
cparata	0:489965565a0d	1467	* Permission : RO
cparata	0:489965565a0d	1468	*******************************************************************************/
cparata	0:489965565a0d	1469	typedef enum {
cparata	0:489965565a0d	1470	LSM303AGR_ACC_Y_DOWN =0x00,
cparata	0:489965565a0d	1471	LSM303AGR_ACC_Y_UP =0x02,
cparata	0:489965565a0d	1472	} LSM303AGR_ACC_Y_t;
cparata	0:489965565a0d	1473
cparata	0:489965565a0d	1474	#define LSM303AGR_ACC_Y_MASK 0x02
cparata	0:489965565a0d	1475	status_t LSM303AGR_ACC_R_ClickY(void handle, LSM303AGR_ACC_Y_t value);
cparata	0:489965565a0d	1476
cparata	0:489965565a0d	1477	/*******************************************************************************
cparata	0:489965565a0d	1478	* Register : CLICK_SRC
cparata	0:489965565a0d	1479	* Address : 0X39
cparata	0:489965565a0d	1480	* Bit Group Name: Z
cparata	0:489965565a0d	1481	* Permission : RO
cparata	0:489965565a0d	1482	*******************************************************************************/
cparata	0:489965565a0d	1483	typedef enum {
cparata	0:489965565a0d	1484	LSM303AGR_ACC_Z_DOWN =0x00,
cparata	0:489965565a0d	1485	LSM303AGR_ACC_Z_UP =0x04,
cparata	0:489965565a0d	1486	} LSM303AGR_ACC_Z_t;
cparata	0:489965565a0d	1487
cparata	0:489965565a0d	1488	#define LSM303AGR_ACC_Z_MASK 0x04
cparata	0:489965565a0d	1489	status_t LSM303AGR_ACC_R_ClickZ(void handle, LSM303AGR_ACC_Z_t value);
cparata	0:489965565a0d	1490
cparata	0:489965565a0d	1491	/*******************************************************************************
cparata	0:489965565a0d	1492	* Register : CLICK_SRC
cparata	0:489965565a0d	1493	* Address : 0X39
cparata	0:489965565a0d	1494	* Bit Group Name: SIGN
cparata	0:489965565a0d	1495	* Permission : RO
cparata	0:489965565a0d	1496	*******************************************************************************/
cparata	0:489965565a0d	1497	typedef enum {
cparata	0:489965565a0d	1498	LSM303AGR_ACC_SIGN_POSITIVE =0x00,
cparata	0:489965565a0d	1499	LSM303AGR_ACC_SIGN_NEGATIVE =0x08,
cparata	0:489965565a0d	1500	} LSM303AGR_ACC_SIGN_t;
cparata	0:489965565a0d	1501
cparata	0:489965565a0d	1502	#define LSM303AGR_ACC_SIGN_MASK 0x08
cparata	0:489965565a0d	1503	status_t LSM303AGR_ACC_R_ClickSign(void handle, LSM303AGR_ACC_SIGN_t value);
cparata	0:489965565a0d	1504
cparata	0:489965565a0d	1505	/*******************************************************************************
cparata	0:489965565a0d	1506	* Register : CLICK_SRC
cparata	0:489965565a0d	1507	* Address : 0X39
cparata	0:489965565a0d	1508	* Bit Group Name: SCLICK
cparata	0:489965565a0d	1509	* Permission : RO
cparata	0:489965565a0d	1510	*******************************************************************************/
cparata	0:489965565a0d	1511	typedef enum {
cparata	0:489965565a0d	1512	LSM303AGR_ACC_SCLICK_DISABLED =0x00,
cparata	0:489965565a0d	1513	LSM303AGR_ACC_SCLICK_ENABLED =0x10,
cparata	0:489965565a0d	1514	} LSM303AGR_ACC_SCLICK_t;
cparata	0:489965565a0d	1515
cparata	0:489965565a0d	1516	#define LSM303AGR_ACC_SCLICK_MASK 0x10
cparata	0:489965565a0d	1517	status_t LSM303AGR_ACC_R_SingleCLICK(void handle, LSM303AGR_ACC_SCLICK_t value);
cparata	0:489965565a0d	1518
cparata	0:489965565a0d	1519	/*******************************************************************************
cparata	0:489965565a0d	1520	* Register : CLICK_SRC
cparata	0:489965565a0d	1521	* Address : 0X39
cparata	0:489965565a0d	1522	* Bit Group Name: DCLICK
cparata	0:489965565a0d	1523	* Permission : RO
cparata	0:489965565a0d	1524	*******************************************************************************/
cparata	0:489965565a0d	1525	typedef enum {
cparata	0:489965565a0d	1526	LSM303AGR_ACC_DCLICK_DISABLED =0x00,
cparata	0:489965565a0d	1527	LSM303AGR_ACC_DCLICK_ENABLED =0x20,
cparata	0:489965565a0d	1528	} LSM303AGR_ACC_DCLICK_t;
cparata	0:489965565a0d	1529
cparata	0:489965565a0d	1530	#define LSM303AGR_ACC_DCLICK_MASK 0x20
cparata	0:489965565a0d	1531	status_t LSM303AGR_ACC_R_DoubleCLICK(void handle, LSM303AGR_ACC_DCLICK_t value);
cparata	0:489965565a0d	1532
cparata	0:489965565a0d	1533	/*******************************************************************************
cparata	0:489965565a0d	1534	* Register : CLICK_SRC
cparata	0:489965565a0d	1535	* Address : 0X39
cparata	0:489965565a0d	1536	* Bit Group Name: IA
cparata	0:489965565a0d	1537	* Permission : RO
cparata	0:489965565a0d	1538	*******************************************************************************/
cparata	0:489965565a0d	1539	typedef enum {
cparata	0:489965565a0d	1540	LSM303AGR_ACC_CLICK_IA_DOWN =0x00,
cparata	0:489965565a0d	1541	LSM303AGR_ACC_CLICK_IA_UP =0x40,
cparata	0:489965565a0d	1542	} LSM303AGR_ACC_CLICK_IA_t;
cparata	0:489965565a0d	1543
cparata	0:489965565a0d	1544	#define LSM303AGR_ACC_IA_MASK 0x40
cparata	0:489965565a0d	1545	status_t LSM303AGR_ACC_R_CLICK_IA(void handle, LSM303AGR_ACC_CLICK_IA_t value);
cparata	0:489965565a0d	1546
cparata	0:489965565a0d	1547	/*******************************************************************************
cparata	0:489965565a0d	1548	* Register : CLICK_THS
cparata	0:489965565a0d	1549	* Address : 0X3A
cparata	0:489965565a0d	1550	* Bit Group Name: THS
cparata	0:489965565a0d	1551	* Permission : RW
cparata	0:489965565a0d	1552	*******************************************************************************/
cparata	0:489965565a0d	1553	#define LSM303AGR_ACC_THS_MASK 0x7F
cparata	0:489965565a0d	1554	#define LSM303AGR_ACC_THS_POSITION 0
cparata	0:489965565a0d	1555	status_t LSM303AGR_ACC_W_ClickThreshold(void *handle, u8_t newValue);
cparata	0:489965565a0d	1556	status_t LSM303AGR_ACC_R_ClickThreshold(void handle, u8_t value);
cparata	0:489965565a0d	1557
cparata	0:489965565a0d	1558	/*******************************************************************************
cparata	0:489965565a0d	1559	* Register : TIME_LIMIT
cparata	0:489965565a0d	1560	* Address : 0X3B
cparata	0:489965565a0d	1561	* Bit Group Name: TLI
cparata	0:489965565a0d	1562	* Permission : RW
cparata	0:489965565a0d	1563	*******************************************************************************/
cparata	0:489965565a0d	1564	#define LSM303AGR_ACC_TLI_MASK 0x7F
cparata	0:489965565a0d	1565	#define LSM303AGR_ACC_TLI_POSITION 0
cparata	0:489965565a0d	1566	status_t LSM303AGR_ACC_W_ClickTimeLimit(void *handle, u8_t newValue);
cparata	0:489965565a0d	1567	status_t LSM303AGR_ACC_R_ClickTimeLimit(void handle, u8_t value);
cparata	0:489965565a0d	1568
cparata	0:489965565a0d	1569	/*******************************************************************************
cparata	0:489965565a0d	1570	* Register : TIME_LATENCY
cparata	0:489965565a0d	1571	* Address : 0X3C
cparata	0:489965565a0d	1572	* Bit Group Name: TLA
cparata	0:489965565a0d	1573	* Permission : RW
cparata	0:489965565a0d	1574	*******************************************************************************/
cparata	0:489965565a0d	1575	#define LSM303AGR_ACC_TLA_MASK 0xFF
cparata	0:489965565a0d	1576	#define LSM303AGR_ACC_TLA_POSITION 0
cparata	0:489965565a0d	1577	status_t LSM303AGR_ACC_W_ClickTimeLatency(void *handle, u8_t newValue);
cparata	0:489965565a0d	1578	status_t LSM303AGR_ACC_R_ClickTimeLatency(void handle, u8_t value);
cparata	0:489965565a0d	1579
cparata	0:489965565a0d	1580	/*******************************************************************************
cparata	0:489965565a0d	1581	* Register : TIME_WINDOW
cparata	0:489965565a0d	1582	* Address : 0X3D
cparata	0:489965565a0d	1583	* Bit Group Name: TW
cparata	0:489965565a0d	1584	* Permission : RW
cparata	0:489965565a0d	1585	*******************************************************************************/
cparata	0:489965565a0d	1586	#define LSM303AGR_ACC_TW_MASK 0xFF
cparata	0:489965565a0d	1587	#define LSM303AGR_ACC_TW_POSITION 0
cparata	0:489965565a0d	1588	status_t LSM303AGR_ACC_W_ClickTimeWindow(void *handle, u8_t newValue);
cparata	0:489965565a0d	1589	status_t LSM303AGR_ACC_R_ClickTimeWindow(void handle, u8_t value);
cparata	0:489965565a0d	1590	/*******************************************************************************
cparata	0:489965565a0d	1591	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:489965565a0d	1592	* Output Type : Voltage_ADC
cparata	0:489965565a0d	1593	* Permission : RO
cparata	0:489965565a0d	1594	*******************************************************************************/
cparata	0:489965565a0d	1595	status_t LSM303AGR_ACC_Get_Voltage_ADC(void handle, u8_t buff);
cparata	0:489965565a0d	1596	/*******************************************************************************
cparata	0:489965565a0d	1597	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:489965565a0d	1598	* Output Type : Acceleration
cparata	0:489965565a0d	1599	* Permission : RO
cparata	0:489965565a0d	1600	*******************************************************************************/
cparata	0:489965565a0d	1601	status_t LSM303AGR_ACC_Get_Raw_Acceleration(void handle, u8_t buff);
cparata	0:489965565a0d	1602	status_t LSM303AGR_ACC_Get_Acceleration(void handle, int buff);
cparata	0:489965565a0d	1603
cparata	0:489965565a0d	1604	#ifdef __cplusplus
cparata	0:489965565a0d	1605	}
cparata	0:489965565a0d	1606	#endif
cparata	0:489965565a0d	1607
cparata	0:489965565a0d	1608	#endif

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	16 Dec 2016
Imports:	126
Forks:	0
Commits:	17
Dependents:	0
Dependencies:	2
Followers:	401

The code in this repository is Apache licensed.

Tilt Detection Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

X_NUCLEO_IKS01A2/Components/LSM303AGRSensor/LSM303AGR_ACC_driver.h@0:489965565a0d, 2016-08-12 (annotated)

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