Example of single tap and double tap detection for LSM6DSL in X-NUCLEO-IKS01A2

Dependencies:   X_NUCLEO_IKS01A2 mbed

Fork of SingleDoubleTap_IKS01A2 by ST Expansion SW Team

Single and Double Tap Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

Main function is to show how to detect the single and double tap events using the sensor expansion board and send a notification using UART to a connected PC or Desktop and display it on terminal applications like TeraTerm.
After connection has been established:
- the user can try to tap the board and then view the notification using an hyper terminal. When the single tap is detected, the LED is switched on for a while.
- the user can press the user button to pass from the single tap detection to the double tap detection feature. The user can try to double tap the board and then view the notification using an hyper terminal. When the double tap is detected, the LED is switched on twice for a while.
- the user can press again the user button to disable the single and double tap detection feature.
- the user can press the user button to enable again the single tap detection feature and so on.

Committer:
cparata
Date:
Fri Aug 12 13:42:02 2016 +0000
Revision:
0:e4f89df7a7a5
First release of Single/Double Tap for LSM6DSL in IKS01A2

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cparata 0:e4f89df7a7a5 1 /**
cparata 0:e4f89df7a7a5 2 ******************************************************************************
cparata 0:e4f89df7a7a5 3 * @file DbgMCU.h
cparata 0:e4f89df7a7a5 4 * @author AST / EST
cparata 0:e4f89df7a7a5 5 * @version V0.0.1
cparata 0:e4f89df7a7a5 6 * @date 30-March-2015
cparata 0:e4f89df7a7a5 7 * @brief Header file for enabling debugging in sleep modes for STM32 MCUs
cparata 0:e4f89df7a7a5 8 ******************************************************************************
cparata 0:e4f89df7a7a5 9 * @attention
cparata 0:e4f89df7a7a5 10 *
cparata 0:e4f89df7a7a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
cparata 0:e4f89df7a7a5 12 *
cparata 0:e4f89df7a7a5 13 * Redistribution and use in source and binary forms, with or without modification,
cparata 0:e4f89df7a7a5 14 * are permitted provided that the following conditions are met:
cparata 0:e4f89df7a7a5 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:e4f89df7a7a5 16 * this list of conditions and the following disclaimer.
cparata 0:e4f89df7a7a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
cparata 0:e4f89df7a7a5 18 * this list of conditions and the following disclaimer in the documentation
cparata 0:e4f89df7a7a5 19 * and/or other materials provided with the distribution.
cparata 0:e4f89df7a7a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata 0:e4f89df7a7a5 21 * may be used to endorse or promote products derived from this software
cparata 0:e4f89df7a7a5 22 * without specific prior written permission.
cparata 0:e4f89df7a7a5 23 *
cparata 0:e4f89df7a7a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:e4f89df7a7a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:e4f89df7a7a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata 0:e4f89df7a7a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata 0:e4f89df7a7a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata 0:e4f89df7a7a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata 0:e4f89df7a7a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata 0:e4f89df7a7a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata 0:e4f89df7a7a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata 0:e4f89df7a7a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata 0:e4f89df7a7a5 34 *
cparata 0:e4f89df7a7a5 35 ******************************************************************************
cparata 0:e4f89df7a7a5 36 */
cparata 0:e4f89df7a7a5 37
cparata 0:e4f89df7a7a5 38 /* Define to prevent from recursive inclusion --------------------------------*/
cparata 0:e4f89df7a7a5 39 #ifndef __DBG_MCU_H
cparata 0:e4f89df7a7a5 40 #define __DBG_MCU_H
cparata 0:e4f89df7a7a5 41
cparata 0:e4f89df7a7a5 42 /* Includes ------------------------------------------------------------------*/
cparata 0:e4f89df7a7a5 43
cparata 0:e4f89df7a7a5 44 /* Classes -------------------------------------------------------------------*/
cparata 0:e4f89df7a7a5 45 /** Helper class DbgMCU providing a default constructor which enables debugging
cparata 0:e4f89df7a7a5 46 * on STM32 MCUs while using sleep modes.
cparata 0:e4f89df7a7a5 47 */
cparata 0:e4f89df7a7a5 48 class DbgMCU
cparata 0:e4f89df7a7a5 49 {
cparata 0:e4f89df7a7a5 50 public:
cparata 0:e4f89df7a7a5 51 /** Create a DbgMCU dummy object */
cparata 0:e4f89df7a7a5 52 DbgMCU(void) {
cparata 0:e4f89df7a7a5 53 /* the following code is NOT portable */
cparata 0:e4f89df7a7a5 54 volatile uint32_t *dbgmcu_creg = (uint32_t*)0xE0042004;
cparata 0:e4f89df7a7a5 55 uint32_t tmp = *dbgmcu_creg;
cparata 0:e4f89df7a7a5 56
cparata 0:e4f89df7a7a5 57 tmp &= ~(0xE7);
cparata 0:e4f89df7a7a5 58 tmp |= 0x27; // Set asynchronous communication via DBGMCU_CR (for ITM/printf)
cparata 0:e4f89df7a7a5 59 // tmp |= 0xE7; // Set 4-pin tracing via DBGMCU_CR (for ETM)
cparata 0:e4f89df7a7a5 60 *dbgmcu_creg = tmp;
cparata 0:e4f89df7a7a5 61 }
cparata 0:e4f89df7a7a5 62 };
cparata 0:e4f89df7a7a5 63
cparata 0:e4f89df7a7a5 64 #endif /* __DBG_MCU_H */