Class to drive SDRAM on DISCO_F469NI
Dependents: DISCO-F469NI_SDRAM_demo
SDRAM_DISCO_F469NI.h@0:8dee094d9554, 2016-03-18 (annotated)
- Committer:
- adustm
- Date:
- Fri Mar 18 09:43:04 2016 +0000
- Revision:
- 0:8dee094d9554
DISCO_F469NI SDRAM class
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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adustm | 0:8dee094d9554 | 1 | /* Copyright (c) 2010-2016 mbed.org, MIT License |
adustm | 0:8dee094d9554 | 2 | * |
adustm | 0:8dee094d9554 | 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
adustm | 0:8dee094d9554 | 4 | * and associated documentation files (the "Software"), to deal in the Software without |
adustm | 0:8dee094d9554 | 5 | * restriction, including without limitation the rights to use, copy, modify, merge, publish, |
adustm | 0:8dee094d9554 | 6 | * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
adustm | 0:8dee094d9554 | 7 | * Software is furnished to do so, subject to the following conditions: |
adustm | 0:8dee094d9554 | 8 | * |
adustm | 0:8dee094d9554 | 9 | * The above copyright notice and this permission notice shall be included in all copies or |
adustm | 0:8dee094d9554 | 10 | * substantial portions of the Software. |
adustm | 0:8dee094d9554 | 11 | * |
adustm | 0:8dee094d9554 | 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
adustm | 0:8dee094d9554 | 13 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
adustm | 0:8dee094d9554 | 14 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
adustm | 0:8dee094d9554 | 15 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
adustm | 0:8dee094d9554 | 16 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
adustm | 0:8dee094d9554 | 17 | */ |
adustm | 0:8dee094d9554 | 18 | |
adustm | 0:8dee094d9554 | 19 | #ifndef __SDRAM_DISCO_F469NI_H |
adustm | 0:8dee094d9554 | 20 | #define __SDRAM_DISCO_F469NI_H |
adustm | 0:8dee094d9554 | 21 | |
adustm | 0:8dee094d9554 | 22 | #ifdef TARGET_DISCO_F469NI |
adustm | 0:8dee094d9554 | 23 | |
adustm | 0:8dee094d9554 | 24 | #include "mbed.h" |
adustm | 0:8dee094d9554 | 25 | #include "stm32469i_discovery_sdram.h" |
adustm | 0:8dee094d9554 | 26 | |
adustm | 0:8dee094d9554 | 27 | /* |
adustm | 0:8dee094d9554 | 28 | This class drives the SDRAM driver (MT48LC4M32B2B5-7) present on DISCO_F469NI board. |
adustm | 0:8dee094d9554 | 29 | |
adustm | 0:8dee094d9554 | 30 | Usage: |
adustm | 0:8dee094d9554 | 31 | |
adustm | 0:8dee094d9554 | 32 | #include "mbed.h" |
adustm | 0:8dee094d9554 | 33 | #include "SDRAM_DISCO_F469NI.h" |
adustm | 0:8dee094d9554 | 34 | |
adustm | 0:8dee094d9554 | 35 | SDRAM_DISCO_F469NI SDRAM; |
adustm | 0:8dee094d9554 | 36 | |
adustm | 0:8dee094d9554 | 37 | int main() |
adustm | 0:8dee094d9554 | 38 | { |
adustm | 0:8dee094d9554 | 39 | TODO |
adustm | 0:8dee094d9554 | 40 | } |
adustm | 0:8dee094d9554 | 41 | */ |
adustm | 0:8dee094d9554 | 42 | class SDRAM_DISCO_F469NI |
adustm | 0:8dee094d9554 | 43 | { |
adustm | 0:8dee094d9554 | 44 | |
adustm | 0:8dee094d9554 | 45 | public: |
adustm | 0:8dee094d9554 | 46 | //! Constructor |
adustm | 0:8dee094d9554 | 47 | SDRAM_DISCO_F469NI(); |
adustm | 0:8dee094d9554 | 48 | |
adustm | 0:8dee094d9554 | 49 | //! Destructor |
adustm | 0:8dee094d9554 | 50 | ~SDRAM_DISCO_F469NI(); |
adustm | 0:8dee094d9554 | 51 | |
adustm | 0:8dee094d9554 | 52 | |
adustm | 0:8dee094d9554 | 53 | /** |
adustm | 0:8dee094d9554 | 54 | * @brief Initializes the SDRAM device. |
adustm | 0:8dee094d9554 | 55 | * @retval SDRAM status |
adustm | 0:8dee094d9554 | 56 | */ |
adustm | 0:8dee094d9554 | 57 | uint8_t Init(void); |
adustm | 0:8dee094d9554 | 58 | |
adustm | 0:8dee094d9554 | 59 | /** |
adustm | 0:8dee094d9554 | 60 | * @brief DeInitializes the SDRAM device. |
adustm | 0:8dee094d9554 | 61 | * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR. |
adustm | 0:8dee094d9554 | 62 | */ |
adustm | 0:8dee094d9554 | 63 | uint8_t DeInit(void); |
adustm | 0:8dee094d9554 | 64 | |
adustm | 0:8dee094d9554 | 65 | /** |
adustm | 0:8dee094d9554 | 66 | * @brief Programs the SDRAM device. |
adustm | 0:8dee094d9554 | 67 | * @param RefreshCount: SDRAM refresh counter value |
adustm | 0:8dee094d9554 | 68 | */ |
adustm | 0:8dee094d9554 | 69 | void Initialization_sequence(uint32_t RefreshCount); |
adustm | 0:8dee094d9554 | 70 | |
adustm | 0:8dee094d9554 | 71 | /** |
adustm | 0:8dee094d9554 | 72 | * @brief Reads an mount of data from the SDRAM memory in polling mode. |
adustm | 0:8dee094d9554 | 73 | * @param uwStartAddress: Read start address |
adustm | 0:8dee094d9554 | 74 | * @param pData: Pointer to data to be read |
adustm | 0:8dee094d9554 | 75 | * @param uwDataSize: Size of read data from the memory |
adustm | 0:8dee094d9554 | 76 | * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR. |
adustm | 0:8dee094d9554 | 77 | */ |
adustm | 0:8dee094d9554 | 78 | uint8_t ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:8dee094d9554 | 79 | |
adustm | 0:8dee094d9554 | 80 | /** |
adustm | 0:8dee094d9554 | 81 | * @brief Reads an mount of data from the SDRAM memory in DMA mode. |
adustm | 0:8dee094d9554 | 82 | * @param uwStartAddress: Read start address |
adustm | 0:8dee094d9554 | 83 | * @param pData: Pointer to data to be read |
adustm | 0:8dee094d9554 | 84 | * @param uwDataSize: Size of read data from the memory |
adustm | 0:8dee094d9554 | 85 | * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR. |
adustm | 0:8dee094d9554 | 86 | */ |
adustm | 0:8dee094d9554 | 87 | uint8_t ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:8dee094d9554 | 88 | |
adustm | 0:8dee094d9554 | 89 | /** |
adustm | 0:8dee094d9554 | 90 | * @brief Writes an mount of data to the SDRAM memory in polling mode. |
adustm | 0:8dee094d9554 | 91 | * @param uwStartAddress: Write start address |
adustm | 0:8dee094d9554 | 92 | * @param pData: Pointer to data to be written |
adustm | 0:8dee094d9554 | 93 | * @param uwDataSize: Size of written data from the memory |
adustm | 0:8dee094d9554 | 94 | * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR. |
adustm | 0:8dee094d9554 | 95 | */ |
adustm | 0:8dee094d9554 | 96 | uint8_t WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:8dee094d9554 | 97 | |
adustm | 0:8dee094d9554 | 98 | /** |
adustm | 0:8dee094d9554 | 99 | * @brief Writes an mount of data to the SDRAM memory in DMA mode. |
adustm | 0:8dee094d9554 | 100 | * @param uwStartAddress: Write start address |
adustm | 0:8dee094d9554 | 101 | * @param pData: Pointer to data to be written |
adustm | 0:8dee094d9554 | 102 | * @param uwDataSize: Size of written data from the memory |
adustm | 0:8dee094d9554 | 103 | * @retval SDRAM status : SDRAM_OK or SDRAM_ERROR. |
adustm | 0:8dee094d9554 | 104 | */ |
adustm | 0:8dee094d9554 | 105 | uint8_t WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize); |
adustm | 0:8dee094d9554 | 106 | |
adustm | 0:8dee094d9554 | 107 | /** |
adustm | 0:8dee094d9554 | 108 | * @brief Sends command to the SDRAM bank. |
adustm | 0:8dee094d9554 | 109 | * @param SdramCmd: Pointer to SDRAM command structure |
adustm | 0:8dee094d9554 | 110 | * @retval HAL status : SDRAM_OK or SDRAM_ERROR. |
adustm | 0:8dee094d9554 | 111 | */ |
adustm | 0:8dee094d9554 | 112 | uint8_t Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd); |
adustm | 0:8dee094d9554 | 113 | |
adustm | 0:8dee094d9554 | 114 | private: |
adustm | 0:8dee094d9554 | 115 | |
adustm | 0:8dee094d9554 | 116 | }; |
adustm | 0:8dee094d9554 | 117 | |
adustm | 0:8dee094d9554 | 118 | #else |
adustm | 0:8dee094d9554 | 119 | #error "This class must be used with DISCO_F469NI board only." |
adustm | 0:8dee094d9554 | 120 | #endif // TARGET_DISCO_F469NI |
adustm | 0:8dee094d9554 | 121 | |
adustm | 0:8dee094d9554 | 122 | #endif |
adustm | 0:8dee094d9554 | 123 |