Example of pedometer for LSM6DSL in X-NUCLEO-IKS01A2

Dependencies:   X_NUCLEO_IKS01A2 mbed

Fork of Pedometer_IKS01A2 by ST Expansion SW Team

Pedometer Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

Main function is to show how to count steps using the sensor expansion board and send a notification using UART to a connected PC or Desktop and display it on terminal applications like TeraTerm.
After connection has been established:
- the user can try to shake the board to simulate the steps and then view the notification using an hyper terminal. When a new step is detected, the LED is switched on for a while.
- the user button can be used to reset the step counter.

Committer:
cparata
Date:
Fri Aug 19 12:29:08 2016 +0000
Revision:
2:67af0ad3ea2e
Parent:
0:b189540a70e2
Add interfaces to all components

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cparata 0:b189540a70e2 1 /**
cparata 0:b189540a70e2 2 ******************************************************************************
cparata 0:b189540a70e2 3 * @file LSM303AGR_ACC_driver.h
cparata 0:b189540a70e2 4 * @author MEMS Application Team
cparata 0:b189540a70e2 5 * @version V1.1
cparata 0:b189540a70e2 6 * @date 24-February-2016
cparata 0:b189540a70e2 7 * @brief LSM303AGR Accelerometer header driver file
cparata 0:b189540a70e2 8 ******************************************************************************
cparata 0:b189540a70e2 9 * @attention
cparata 0:b189540a70e2 10 *
cparata 0:b189540a70e2 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
cparata 0:b189540a70e2 12 *
cparata 0:b189540a70e2 13 * Redistribution and use in source and binary forms, with or without modification,
cparata 0:b189540a70e2 14 * are permitted provided that the following conditions are met:
cparata 0:b189540a70e2 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:b189540a70e2 16 * this list of conditions and the following disclaimer.
cparata 0:b189540a70e2 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
cparata 0:b189540a70e2 18 * this list of conditions and the following disclaimer in the documentation
cparata 0:b189540a70e2 19 * and/or other materials provided with the distribution.
cparata 0:b189540a70e2 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata 0:b189540a70e2 21 * may be used to endorse or promote products derived from this software
cparata 0:b189540a70e2 22 * without specific prior written permission.
cparata 0:b189540a70e2 23 *
cparata 0:b189540a70e2 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:b189540a70e2 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:b189540a70e2 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata 0:b189540a70e2 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata 0:b189540a70e2 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata 0:b189540a70e2 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata 0:b189540a70e2 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata 0:b189540a70e2 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata 0:b189540a70e2 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata 0:b189540a70e2 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata 0:b189540a70e2 34 *
cparata 0:b189540a70e2 35 ******************************************************************************
cparata 0:b189540a70e2 36 */
cparata 0:b189540a70e2 37
cparata 0:b189540a70e2 38 /* Define to prevent recursive inclusion -------------------------------------*/
cparata 0:b189540a70e2 39 #ifndef __LSM303AGR_ACC_DRIVER__H
cparata 0:b189540a70e2 40 #define __LSM303AGR_ACC_DRIVER__H
cparata 0:b189540a70e2 41
cparata 0:b189540a70e2 42 /* Includes ------------------------------------------------------------------*/
cparata 0:b189540a70e2 43 #include <stdint.h>
cparata 0:b189540a70e2 44
cparata 0:b189540a70e2 45 /* Exported types ------------------------------------------------------------*/
cparata 0:b189540a70e2 46
cparata 0:b189540a70e2 47 #ifdef __cplusplus
cparata 0:b189540a70e2 48 extern "C" {
cparata 0:b189540a70e2 49 #endif
cparata 0:b189540a70e2 50
cparata 0:b189540a70e2 51 //these could change accordingly with the architecture
cparata 0:b189540a70e2 52
cparata 0:b189540a70e2 53 #ifndef __ARCHDEP__TYPES
cparata 0:b189540a70e2 54 #define __ARCHDEP__TYPES
cparata 0:b189540a70e2 55
cparata 0:b189540a70e2 56 typedef unsigned char u8_t;
cparata 0:b189540a70e2 57 typedef unsigned short int u16_t;
cparata 0:b189540a70e2 58 typedef unsigned int u32_t;
cparata 0:b189540a70e2 59 typedef int i32_t;
cparata 0:b189540a70e2 60 typedef short int i16_t;
cparata 0:b189540a70e2 61 typedef signed char i8_t;
cparata 0:b189540a70e2 62
cparata 0:b189540a70e2 63 #endif /*__ARCHDEP__TYPES*/
cparata 0:b189540a70e2 64
cparata 0:b189540a70e2 65 /* Exported common structure --------------------------------------------------------*/
cparata 0:b189540a70e2 66
cparata 0:b189540a70e2 67 #ifndef __SHARED__TYPES
cparata 0:b189540a70e2 68 #define __SHARED__TYPES
cparata 0:b189540a70e2 69
cparata 0:b189540a70e2 70 typedef union{
cparata 0:b189540a70e2 71 i16_t i16bit[3];
cparata 0:b189540a70e2 72 u8_t u8bit[6];
cparata 0:b189540a70e2 73 } Type3Axis16bit_U;
cparata 0:b189540a70e2 74
cparata 0:b189540a70e2 75 typedef union{
cparata 0:b189540a70e2 76 i16_t i16bit;
cparata 0:b189540a70e2 77 u8_t u8bit[2];
cparata 0:b189540a70e2 78 } Type1Axis16bit_U;
cparata 0:b189540a70e2 79
cparata 0:b189540a70e2 80 typedef union{
cparata 0:b189540a70e2 81 i32_t i32bit;
cparata 0:b189540a70e2 82 u8_t u8bit[4];
cparata 0:b189540a70e2 83 } Type1Axis32bit_U;
cparata 0:b189540a70e2 84
cparata 0:b189540a70e2 85 typedef enum {
cparata 0:b189540a70e2 86 MEMS_SUCCESS = 0x01,
cparata 0:b189540a70e2 87 MEMS_ERROR = 0x00
cparata 0:b189540a70e2 88 } status_t;
cparata 0:b189540a70e2 89
cparata 0:b189540a70e2 90 #endif /*__SHARED__TYPES*/
cparata 0:b189540a70e2 91
cparata 0:b189540a70e2 92 /* Exported macro ------------------------------------------------------------*/
cparata 0:b189540a70e2 93
cparata 0:b189540a70e2 94 /* Exported constants --------------------------------------------------------*/
cparata 0:b189540a70e2 95
cparata 0:b189540a70e2 96 /************** I2C Address *****************/
cparata 0:b189540a70e2 97
cparata 0:b189540a70e2 98 #define LSM303AGR_ACC_I2C_ADDRESS 0x32
cparata 0:b189540a70e2 99
cparata 0:b189540a70e2 100 /************** Who am I *******************/
cparata 0:b189540a70e2 101
cparata 0:b189540a70e2 102 #define LSM303AGR_ACC_WHO_AM_I 0x33
cparata 0:b189540a70e2 103
cparata 0:b189540a70e2 104 /* Private Function Prototype -------------------------------------------------------*/
cparata 0:b189540a70e2 105
cparata 0:b189540a70e2 106 void LSM303AGR_ACC_SwapHighLowByte(u8_t *bufferToSwap, u8_t numberOfByte, u8_t dimension);
cparata 0:b189540a70e2 107
cparata 0:b189540a70e2 108 /* Public Function Prototypes ------------------------------------------------*/
cparata 0:b189540a70e2 109
cparata 0:b189540a70e2 110 status_t LSM303AGR_ACC_ReadReg( void *handle, u8_t Reg, u8_t* Data );
cparata 0:b189540a70e2 111 status_t LSM303AGR_ACC_WriteReg( void *handle, u8_t Reg, u8_t Data );
cparata 0:b189540a70e2 112
cparata 0:b189540a70e2 113
cparata 0:b189540a70e2 114 /************** Device Register *******************/
cparata 0:b189540a70e2 115 #define LSM303AGR_ACC_STATUS_REG_AUX 0X07
cparata 0:b189540a70e2 116 #define LSM303AGR_ACC_OUT_ADC1_L 0X08
cparata 0:b189540a70e2 117 #define LSM303AGR_ACC_OUT_ADC1_H 0X09
cparata 0:b189540a70e2 118 #define LSM303AGR_ACC_OUT_ADC2_L 0X0A
cparata 0:b189540a70e2 119 #define LSM303AGR_ACC_OUT_ADC2_H 0X0B
cparata 0:b189540a70e2 120 #define LSM303AGR_ACC_OUT_ADC3_L 0X0C
cparata 0:b189540a70e2 121 #define LSM303AGR_ACC_OUT_ADC3_H 0X0D
cparata 0:b189540a70e2 122 #define LSM303AGR_ACC_INT_COUNTER_REG 0X0E
cparata 0:b189540a70e2 123 #define LSM303AGR_ACC_WHO_AM_I_REG 0X0F
cparata 0:b189540a70e2 124 #define LSM303AGR_ACC_TEMP_CFG_REG 0X1F
cparata 0:b189540a70e2 125 #define LSM303AGR_ACC_CTRL_REG1 0X20
cparata 0:b189540a70e2 126 #define LSM303AGR_ACC_CTRL_REG2 0X21
cparata 0:b189540a70e2 127 #define LSM303AGR_ACC_CTRL_REG3 0X22
cparata 0:b189540a70e2 128 #define LSM303AGR_ACC_CTRL_REG4 0X23
cparata 0:b189540a70e2 129 #define LSM303AGR_ACC_CTRL_REG5 0X24
cparata 0:b189540a70e2 130 #define LSM303AGR_ACC_CTRL_REG6 0X25
cparata 0:b189540a70e2 131 #define LSM303AGR_ACC_REFERENCE 0X26
cparata 0:b189540a70e2 132 #define LSM303AGR_ACC_STATUS_REG2 0X27
cparata 0:b189540a70e2 133 #define LSM303AGR_ACC_OUT_X_L 0X28
cparata 0:b189540a70e2 134 #define LSM303AGR_ACC_OUT_X_H 0X29
cparata 0:b189540a70e2 135 #define LSM303AGR_ACC_OUT_Y_L 0X2A
cparata 0:b189540a70e2 136 #define LSM303AGR_ACC_OUT_Y_H 0X2B
cparata 0:b189540a70e2 137 #define LSM303AGR_ACC_OUT_Z_L 0X2C
cparata 0:b189540a70e2 138 #define LSM303AGR_ACC_OUT_Z_H 0X2D
cparata 0:b189540a70e2 139 #define LSM303AGR_ACC_FIFO_CTRL_REG 0X2E
cparata 0:b189540a70e2 140 #define LSM303AGR_ACC_FIFO_SRC_REG 0X2F
cparata 0:b189540a70e2 141 #define LSM303AGR_ACC_INT1_CFG 0X30
cparata 0:b189540a70e2 142 #define LSM303AGR_ACC_INT1_SOURCE 0X31
cparata 0:b189540a70e2 143 #define LSM303AGR_ACC_INT1_THS 0X32
cparata 0:b189540a70e2 144 #define LSM303AGR_ACC_INT1_DURATION 0X33
cparata 0:b189540a70e2 145 #define LSM303AGR_ACC_INT2_CFG 0X34
cparata 0:b189540a70e2 146 #define LSM303AGR_ACC_INT2_SOURCE 0X35
cparata 0:b189540a70e2 147 #define LSM303AGR_ACC_INT2_THS 0X36
cparata 0:b189540a70e2 148 #define LSM303AGR_ACC_INT2_DURATION 0X37
cparata 0:b189540a70e2 149 #define LSM303AGR_ACC_CLICK_CFG 0X38
cparata 0:b189540a70e2 150 #define LSM303AGR_ACC_CLICK_SRC 0X39
cparata 0:b189540a70e2 151 #define LSM303AGR_ACC_CLICK_THS 0X3A
cparata 0:b189540a70e2 152 #define LSM303AGR_ACC_TIME_LIMIT 0X3B
cparata 0:b189540a70e2 153 #define LSM303AGR_ACC_TIME_LATENCY 0X3C
cparata 0:b189540a70e2 154 #define LSM303AGR_ACC_TIME_WINDOW 0X3D
cparata 0:b189540a70e2 155
cparata 0:b189540a70e2 156 /*******************************************************************************
cparata 0:b189540a70e2 157 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 158 * Address : 0X07
cparata 0:b189540a70e2 159 * Bit Group Name: 1DA
cparata 0:b189540a70e2 160 * Permission : RO
cparata 0:b189540a70e2 161 *******************************************************************************/
cparata 0:b189540a70e2 162 typedef enum {
cparata 0:b189540a70e2 163 LSM303AGR_ACC_1DA_NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 164 LSM303AGR_ACC_1DA_AVAILABLE =0x01,
cparata 0:b189540a70e2 165 } LSM303AGR_ACC_1DA_t;
cparata 0:b189540a70e2 166
cparata 0:b189540a70e2 167 #define LSM303AGR_ACC_1DA_MASK 0x01
cparata 0:b189540a70e2 168 status_t LSM303AGR_ACC_R_x_data_avail(void *handle, LSM303AGR_ACC_1DA_t *value);
cparata 0:b189540a70e2 169
cparata 0:b189540a70e2 170 /*******************************************************************************
cparata 0:b189540a70e2 171 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 172 * Address : 0X07
cparata 0:b189540a70e2 173 * Bit Group Name: 2DA_
cparata 0:b189540a70e2 174 * Permission : RO
cparata 0:b189540a70e2 175 *******************************************************************************/
cparata 0:b189540a70e2 176 typedef enum {
cparata 0:b189540a70e2 177 LSM303AGR_ACC_2DA__NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 178 LSM303AGR_ACC_2DA__AVAILABLE =0x02,
cparata 0:b189540a70e2 179 } LSM303AGR_ACC_2DA__t;
cparata 0:b189540a70e2 180
cparata 0:b189540a70e2 181 #define LSM303AGR_ACC_2DA__MASK 0x02
cparata 0:b189540a70e2 182 status_t LSM303AGR_ACC_R_y_data_avail(void *handle, LSM303AGR_ACC_2DA__t *value);
cparata 0:b189540a70e2 183
cparata 0:b189540a70e2 184 /*******************************************************************************
cparata 0:b189540a70e2 185 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 186 * Address : 0X07
cparata 0:b189540a70e2 187 * Bit Group Name: 3DA_
cparata 0:b189540a70e2 188 * Permission : RO
cparata 0:b189540a70e2 189 *******************************************************************************/
cparata 0:b189540a70e2 190 typedef enum {
cparata 0:b189540a70e2 191 LSM303AGR_ACC_3DA__NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 192 LSM303AGR_ACC_3DA__AVAILABLE =0x04,
cparata 0:b189540a70e2 193 } LSM303AGR_ACC_3DA__t;
cparata 0:b189540a70e2 194
cparata 0:b189540a70e2 195 #define LSM303AGR_ACC_3DA__MASK 0x04
cparata 0:b189540a70e2 196 status_t LSM303AGR_ACC_R_z_data_avail(void *handle, LSM303AGR_ACC_3DA__t *value);
cparata 0:b189540a70e2 197
cparata 0:b189540a70e2 198 /*******************************************************************************
cparata 0:b189540a70e2 199 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 200 * Address : 0X07
cparata 0:b189540a70e2 201 * Bit Group Name: 321DA_
cparata 0:b189540a70e2 202 * Permission : RO
cparata 0:b189540a70e2 203 *******************************************************************************/
cparata 0:b189540a70e2 204 typedef enum {
cparata 0:b189540a70e2 205 LSM303AGR_ACC_321DA__NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 206 LSM303AGR_ACC_321DA__AVAILABLE =0x08,
cparata 0:b189540a70e2 207 } LSM303AGR_ACC_321DA__t;
cparata 0:b189540a70e2 208
cparata 0:b189540a70e2 209 #define LSM303AGR_ACC_321DA__MASK 0x08
cparata 0:b189540a70e2 210 status_t LSM303AGR_ACC_R_xyz_data_avail(void *handle, LSM303AGR_ACC_321DA__t *value);
cparata 0:b189540a70e2 211
cparata 0:b189540a70e2 212 /*******************************************************************************
cparata 0:b189540a70e2 213 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 214 * Address : 0X07
cparata 0:b189540a70e2 215 * Bit Group Name: 1OR_
cparata 0:b189540a70e2 216 * Permission : RO
cparata 0:b189540a70e2 217 *******************************************************************************/
cparata 0:b189540a70e2 218 typedef enum {
cparata 0:b189540a70e2 219 LSM303AGR_ACC_1OR__NO_OVERRUN =0x00,
cparata 0:b189540a70e2 220 LSM303AGR_ACC_1OR__OVERRUN =0x10,
cparata 0:b189540a70e2 221 } LSM303AGR_ACC_1OR__t;
cparata 0:b189540a70e2 222
cparata 0:b189540a70e2 223 #define LSM303AGR_ACC_1OR__MASK 0x10
cparata 0:b189540a70e2 224 status_t LSM303AGR_ACC_R_DataXOverrun(void *handle, LSM303AGR_ACC_1OR__t *value);
cparata 0:b189540a70e2 225
cparata 0:b189540a70e2 226 /*******************************************************************************
cparata 0:b189540a70e2 227 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 228 * Address : 0X07
cparata 0:b189540a70e2 229 * Bit Group Name: 2OR_
cparata 0:b189540a70e2 230 * Permission : RO
cparata 0:b189540a70e2 231 *******************************************************************************/
cparata 0:b189540a70e2 232 typedef enum {
cparata 0:b189540a70e2 233 LSM303AGR_ACC_2OR__NO_OVERRUN =0x00,
cparata 0:b189540a70e2 234 LSM303AGR_ACC_2OR__OVERRUN =0x20,
cparata 0:b189540a70e2 235 } LSM303AGR_ACC_2OR__t;
cparata 0:b189540a70e2 236
cparata 0:b189540a70e2 237 #define LSM303AGR_ACC_2OR__MASK 0x20
cparata 0:b189540a70e2 238 status_t LSM303AGR_ACC_R_DataYOverrun(void *handle, LSM303AGR_ACC_2OR__t *value);
cparata 0:b189540a70e2 239
cparata 0:b189540a70e2 240 /*******************************************************************************
cparata 0:b189540a70e2 241 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 242 * Address : 0X07
cparata 0:b189540a70e2 243 * Bit Group Name: 3OR_
cparata 0:b189540a70e2 244 * Permission : RO
cparata 0:b189540a70e2 245 *******************************************************************************/
cparata 0:b189540a70e2 246 typedef enum {
cparata 0:b189540a70e2 247 LSM303AGR_ACC_3OR__NO_OVERRUN =0x00,
cparata 0:b189540a70e2 248 LSM303AGR_ACC_3OR__OVERRUN =0x40,
cparata 0:b189540a70e2 249 } LSM303AGR_ACC_3OR__t;
cparata 0:b189540a70e2 250
cparata 0:b189540a70e2 251 #define LSM303AGR_ACC_3OR__MASK 0x40
cparata 0:b189540a70e2 252 status_t LSM303AGR_ACC_R_DataZOverrun(void *handle, LSM303AGR_ACC_3OR__t *value);
cparata 0:b189540a70e2 253
cparata 0:b189540a70e2 254 /*******************************************************************************
cparata 0:b189540a70e2 255 * Register : STATUS_REG_AUX
cparata 0:b189540a70e2 256 * Address : 0X07
cparata 0:b189540a70e2 257 * Bit Group Name: 321OR_
cparata 0:b189540a70e2 258 * Permission : RO
cparata 0:b189540a70e2 259 *******************************************************************************/
cparata 0:b189540a70e2 260 typedef enum {
cparata 0:b189540a70e2 261 LSM303AGR_ACC_321OR__NO_OVERRUN =0x00,
cparata 0:b189540a70e2 262 LSM303AGR_ACC_321OR__OVERRUN =0x80,
cparata 0:b189540a70e2 263 } LSM303AGR_ACC_321OR__t;
cparata 0:b189540a70e2 264
cparata 0:b189540a70e2 265 #define LSM303AGR_ACC_321OR__MASK 0x80
cparata 0:b189540a70e2 266 status_t LSM303AGR_ACC_R_DataXYZOverrun(void *handle, LSM303AGR_ACC_321OR__t *value);
cparata 0:b189540a70e2 267
cparata 0:b189540a70e2 268 /*******************************************************************************
cparata 0:b189540a70e2 269 * Register : INT_COUNTER_REG
cparata 0:b189540a70e2 270 * Address : 0X0E
cparata 0:b189540a70e2 271 * Bit Group Name: IC
cparata 0:b189540a70e2 272 * Permission : RO
cparata 0:b189540a70e2 273 *******************************************************************************/
cparata 0:b189540a70e2 274 #define LSM303AGR_ACC_IC_MASK 0xFF
cparata 0:b189540a70e2 275 #define LSM303AGR_ACC_IC_POSITION 0
cparata 0:b189540a70e2 276 status_t LSM303AGR_ACC_R_int_counter(void *handle, u8_t *value);
cparata 0:b189540a70e2 277
cparata 0:b189540a70e2 278 /*******************************************************************************
cparata 0:b189540a70e2 279 * Register : WHO_AM_I
cparata 0:b189540a70e2 280 * Address : 0X0F
cparata 0:b189540a70e2 281 * Bit Group Name: WHO_AM_I
cparata 0:b189540a70e2 282 * Permission : RO
cparata 0:b189540a70e2 283 *******************************************************************************/
cparata 0:b189540a70e2 284 #define LSM303AGR_ACC_WHO_AM_I_MASK 0xFF
cparata 0:b189540a70e2 285 #define LSM303AGR_ACC_WHO_AM_I_POSITION 0
cparata 0:b189540a70e2 286 status_t LSM303AGR_ACC_R_WHO_AM_I(void *handle, u8_t *value);
cparata 0:b189540a70e2 287
cparata 0:b189540a70e2 288 /*******************************************************************************
cparata 0:b189540a70e2 289 * Register : TEMP_CFG_REG
cparata 0:b189540a70e2 290 * Address : 0X1F
cparata 0:b189540a70e2 291 * Bit Group Name: TEMP_EN
cparata 0:b189540a70e2 292 * Permission : RW
cparata 0:b189540a70e2 293 *******************************************************************************/
cparata 0:b189540a70e2 294 typedef enum {
cparata 0:b189540a70e2 295 LSM303AGR_ACC_TEMP_EN_DISABLED =0x00,
cparata 0:b189540a70e2 296 LSM303AGR_ACC_TEMP_EN_ENABLED =0x40,
cparata 0:b189540a70e2 297 } LSM303AGR_ACC_TEMP_EN_t;
cparata 0:b189540a70e2 298
cparata 0:b189540a70e2 299 #define LSM303AGR_ACC_TEMP_EN_MASK 0x40
cparata 0:b189540a70e2 300 status_t LSM303AGR_ACC_W_TEMP_EN_bits(void *handle, LSM303AGR_ACC_TEMP_EN_t newValue);
cparata 0:b189540a70e2 301 status_t LSM303AGR_ACC_R_TEMP_EN_bits(void *handle, LSM303AGR_ACC_TEMP_EN_t *value);
cparata 0:b189540a70e2 302
cparata 0:b189540a70e2 303 /*******************************************************************************
cparata 0:b189540a70e2 304 * Register : TEMP_CFG_REG
cparata 0:b189540a70e2 305 * Address : 0X1F
cparata 0:b189540a70e2 306 * Bit Group Name: ADC_PD
cparata 0:b189540a70e2 307 * Permission : RW
cparata 0:b189540a70e2 308 *******************************************************************************/
cparata 0:b189540a70e2 309 typedef enum {
cparata 0:b189540a70e2 310 LSM303AGR_ACC_ADC_PD_DISABLED =0x00,
cparata 0:b189540a70e2 311 LSM303AGR_ACC_ADC_PD_ENABLED =0x80,
cparata 0:b189540a70e2 312 } LSM303AGR_ACC_ADC_PD_t;
cparata 0:b189540a70e2 313
cparata 0:b189540a70e2 314 #define LSM303AGR_ACC_ADC_PD_MASK 0x80
cparata 0:b189540a70e2 315 status_t LSM303AGR_ACC_W_ADC_PD(void *handle, LSM303AGR_ACC_ADC_PD_t newValue);
cparata 0:b189540a70e2 316 status_t LSM303AGR_ACC_R_ADC_PD(void *handle, LSM303AGR_ACC_ADC_PD_t *value);
cparata 0:b189540a70e2 317
cparata 0:b189540a70e2 318 /*******************************************************************************
cparata 0:b189540a70e2 319 * Register : CTRL_REG1
cparata 0:b189540a70e2 320 * Address : 0X20
cparata 0:b189540a70e2 321 * Bit Group Name: XEN
cparata 0:b189540a70e2 322 * Permission : RW
cparata 0:b189540a70e2 323 *******************************************************************************/
cparata 0:b189540a70e2 324 typedef enum {
cparata 0:b189540a70e2 325 LSM303AGR_ACC_XEN_DISABLED =0x00,
cparata 0:b189540a70e2 326 LSM303AGR_ACC_XEN_ENABLED =0x01,
cparata 0:b189540a70e2 327 } LSM303AGR_ACC_XEN_t;
cparata 0:b189540a70e2 328
cparata 0:b189540a70e2 329 #define LSM303AGR_ACC_XEN_MASK 0x01
cparata 0:b189540a70e2 330 status_t LSM303AGR_ACC_W_XEN(void *handle, LSM303AGR_ACC_XEN_t newValue);
cparata 0:b189540a70e2 331 status_t LSM303AGR_ACC_R_XEN(void *handle, LSM303AGR_ACC_XEN_t *value);
cparata 0:b189540a70e2 332
cparata 0:b189540a70e2 333 /*******************************************************************************
cparata 0:b189540a70e2 334 * Register : CTRL_REG1
cparata 0:b189540a70e2 335 * Address : 0X20
cparata 0:b189540a70e2 336 * Bit Group Name: YEN
cparata 0:b189540a70e2 337 * Permission : RW
cparata 0:b189540a70e2 338 *******************************************************************************/
cparata 0:b189540a70e2 339 typedef enum {
cparata 0:b189540a70e2 340 LSM303AGR_ACC_YEN_DISABLED =0x00,
cparata 0:b189540a70e2 341 LSM303AGR_ACC_YEN_ENABLED =0x02,
cparata 0:b189540a70e2 342 } LSM303AGR_ACC_YEN_t;
cparata 0:b189540a70e2 343
cparata 0:b189540a70e2 344 #define LSM303AGR_ACC_YEN_MASK 0x02
cparata 0:b189540a70e2 345 status_t LSM303AGR_ACC_W_YEN(void *handle, LSM303AGR_ACC_YEN_t newValue);
cparata 0:b189540a70e2 346 status_t LSM303AGR_ACC_R_YEN(void *handle, LSM303AGR_ACC_YEN_t *value);
cparata 0:b189540a70e2 347
cparata 0:b189540a70e2 348 /*******************************************************************************
cparata 0:b189540a70e2 349 * Register : CTRL_REG1
cparata 0:b189540a70e2 350 * Address : 0X20
cparata 0:b189540a70e2 351 * Bit Group Name: ZEN
cparata 0:b189540a70e2 352 * Permission : RW
cparata 0:b189540a70e2 353 *******************************************************************************/
cparata 0:b189540a70e2 354 typedef enum {
cparata 0:b189540a70e2 355 LSM303AGR_ACC_ZEN_DISABLED =0x00,
cparata 0:b189540a70e2 356 LSM303AGR_ACC_ZEN_ENABLED =0x04,
cparata 0:b189540a70e2 357 } LSM303AGR_ACC_ZEN_t;
cparata 0:b189540a70e2 358
cparata 0:b189540a70e2 359 #define LSM303AGR_ACC_ZEN_MASK 0x04
cparata 0:b189540a70e2 360 status_t LSM303AGR_ACC_W_ZEN(void *handle, LSM303AGR_ACC_ZEN_t newValue);
cparata 0:b189540a70e2 361 status_t LSM303AGR_ACC_R_ZEN(void *handle, LSM303AGR_ACC_ZEN_t *value);
cparata 0:b189540a70e2 362
cparata 0:b189540a70e2 363 /*******************************************************************************
cparata 0:b189540a70e2 364 * Register : CTRL_REG1
cparata 0:b189540a70e2 365 * Address : 0X20
cparata 0:b189540a70e2 366 * Bit Group Name: LPEN
cparata 0:b189540a70e2 367 * Permission : RW
cparata 0:b189540a70e2 368 *******************************************************************************/
cparata 0:b189540a70e2 369 typedef enum {
cparata 0:b189540a70e2 370 LSM303AGR_ACC_LPEN_DISABLED =0x00,
cparata 0:b189540a70e2 371 LSM303AGR_ACC_LPEN_ENABLED =0x08,
cparata 0:b189540a70e2 372 } LSM303AGR_ACC_LPEN_t;
cparata 0:b189540a70e2 373
cparata 0:b189540a70e2 374 #define LSM303AGR_ACC_LPEN_MASK 0x08
cparata 0:b189540a70e2 375 status_t LSM303AGR_ACC_W_LOWPWR_EN(void *handle, LSM303AGR_ACC_LPEN_t newValue);
cparata 0:b189540a70e2 376 status_t LSM303AGR_ACC_R_LOWPWR_EN(void *handle, LSM303AGR_ACC_LPEN_t *value);
cparata 0:b189540a70e2 377
cparata 0:b189540a70e2 378 /*******************************************************************************
cparata 0:b189540a70e2 379 * Register : CTRL_REG1
cparata 0:b189540a70e2 380 * Address : 0X20
cparata 0:b189540a70e2 381 * Bit Group Name: ODR
cparata 0:b189540a70e2 382 * Permission : RW
cparata 0:b189540a70e2 383 *******************************************************************************/
cparata 0:b189540a70e2 384 typedef enum {
cparata 0:b189540a70e2 385 LSM303AGR_ACC_ODR_DO_PWR_DOWN =0x00,
cparata 0:b189540a70e2 386 LSM303AGR_ACC_ODR_DO_1Hz =0x10,
cparata 0:b189540a70e2 387 LSM303AGR_ACC_ODR_DO_10Hz =0x20,
cparata 0:b189540a70e2 388 LSM303AGR_ACC_ODR_DO_25Hz =0x30,
cparata 0:b189540a70e2 389 LSM303AGR_ACC_ODR_DO_50Hz =0x40,
cparata 0:b189540a70e2 390 LSM303AGR_ACC_ODR_DO_100Hz =0x50,
cparata 0:b189540a70e2 391 LSM303AGR_ACC_ODR_DO_200Hz =0x60,
cparata 0:b189540a70e2 392 LSM303AGR_ACC_ODR_DO_400Hz =0x70,
cparata 0:b189540a70e2 393 LSM303AGR_ACC_ODR_DO_1_6KHz =0x80,
cparata 0:b189540a70e2 394 LSM303AGR_ACC_ODR_DO_1_25KHz =0x90,
cparata 0:b189540a70e2 395 } LSM303AGR_ACC_ODR_t;
cparata 0:b189540a70e2 396
cparata 0:b189540a70e2 397 #define LSM303AGR_ACC_ODR_MASK 0xF0
cparata 0:b189540a70e2 398 status_t LSM303AGR_ACC_W_ODR(void *handle, LSM303AGR_ACC_ODR_t newValue);
cparata 0:b189540a70e2 399 status_t LSM303AGR_ACC_R_ODR(void *handle, LSM303AGR_ACC_ODR_t *value);
cparata 0:b189540a70e2 400
cparata 0:b189540a70e2 401 /*******************************************************************************
cparata 0:b189540a70e2 402 * Register : CTRL_REG2
cparata 0:b189540a70e2 403 * Address : 0X21
cparata 0:b189540a70e2 404 * Bit Group Name: HPIS1
cparata 0:b189540a70e2 405 * Permission : RW
cparata 0:b189540a70e2 406 *******************************************************************************/
cparata 0:b189540a70e2 407 typedef enum {
cparata 0:b189540a70e2 408 LSM303AGR_ACC_HPIS1_DISABLED =0x00,
cparata 0:b189540a70e2 409 LSM303AGR_ACC_HPIS1_ENABLED =0x01,
cparata 0:b189540a70e2 410 } LSM303AGR_ACC_HPIS1_t;
cparata 0:b189540a70e2 411
cparata 0:b189540a70e2 412 #define LSM303AGR_ACC_HPIS1_MASK 0x01
cparata 0:b189540a70e2 413 status_t LSM303AGR_ACC_W_hpf_aoi_en_int1(void *handle, LSM303AGR_ACC_HPIS1_t newValue);
cparata 0:b189540a70e2 414 status_t LSM303AGR_ACC_R_hpf_aoi_en_int1(void *handle, LSM303AGR_ACC_HPIS1_t *value);
cparata 0:b189540a70e2 415
cparata 0:b189540a70e2 416 /*******************************************************************************
cparata 0:b189540a70e2 417 * Register : CTRL_REG2
cparata 0:b189540a70e2 418 * Address : 0X21
cparata 0:b189540a70e2 419 * Bit Group Name: HPIS2
cparata 0:b189540a70e2 420 * Permission : RW
cparata 0:b189540a70e2 421 *******************************************************************************/
cparata 0:b189540a70e2 422 typedef enum {
cparata 0:b189540a70e2 423 LSM303AGR_ACC_HPIS2_DISABLED =0x00,
cparata 0:b189540a70e2 424 LSM303AGR_ACC_HPIS2_ENABLED =0x02,
cparata 0:b189540a70e2 425 } LSM303AGR_ACC_HPIS2_t;
cparata 0:b189540a70e2 426
cparata 0:b189540a70e2 427 #define LSM303AGR_ACC_HPIS2_MASK 0x02
cparata 0:b189540a70e2 428 status_t LSM303AGR_ACC_W_hpf_aoi_en_int2(void *handle, LSM303AGR_ACC_HPIS2_t newValue);
cparata 0:b189540a70e2 429 status_t LSM303AGR_ACC_R_hpf_aoi_en_int2(void *handle, LSM303AGR_ACC_HPIS2_t *value);
cparata 0:b189540a70e2 430
cparata 0:b189540a70e2 431 /*******************************************************************************
cparata 0:b189540a70e2 432 * Register : CTRL_REG2
cparata 0:b189540a70e2 433 * Address : 0X21
cparata 0:b189540a70e2 434 * Bit Group Name: HPCLICK
cparata 0:b189540a70e2 435 * Permission : RW
cparata 0:b189540a70e2 436 *******************************************************************************/
cparata 0:b189540a70e2 437 typedef enum {
cparata 0:b189540a70e2 438 LSM303AGR_ACC_HPCLICK_DISABLED =0x00,
cparata 0:b189540a70e2 439 LSM303AGR_ACC_HPCLICK_ENABLED =0x04,
cparata 0:b189540a70e2 440 } LSM303AGR_ACC_HPCLICK_t;
cparata 0:b189540a70e2 441
cparata 0:b189540a70e2 442 #define LSM303AGR_ACC_HPCLICK_MASK 0x04
cparata 0:b189540a70e2 443 status_t LSM303AGR_ACC_W_hpf_click_en(void *handle, LSM303AGR_ACC_HPCLICK_t newValue);
cparata 0:b189540a70e2 444 status_t LSM303AGR_ACC_R_hpf_click_en(void *handle, LSM303AGR_ACC_HPCLICK_t *value);
cparata 0:b189540a70e2 445
cparata 0:b189540a70e2 446 /*******************************************************************************
cparata 0:b189540a70e2 447 * Register : CTRL_REG2
cparata 0:b189540a70e2 448 * Address : 0X21
cparata 0:b189540a70e2 449 * Bit Group Name: FDS
cparata 0:b189540a70e2 450 * Permission : RW
cparata 0:b189540a70e2 451 *******************************************************************************/
cparata 0:b189540a70e2 452 typedef enum {
cparata 0:b189540a70e2 453 LSM303AGR_ACC_FDS_BYPASSED =0x00,
cparata 0:b189540a70e2 454 LSM303AGR_ACC_FDS_ENABLED =0x08,
cparata 0:b189540a70e2 455 } LSM303AGR_ACC_FDS_t;
cparata 0:b189540a70e2 456
cparata 0:b189540a70e2 457 #define LSM303AGR_ACC_FDS_MASK 0x08
cparata 0:b189540a70e2 458 status_t LSM303AGR_ACC_W_Data_Filter(void *handle, LSM303AGR_ACC_FDS_t newValue);
cparata 0:b189540a70e2 459 status_t LSM303AGR_ACC_R_Data_Filter(void *handle, LSM303AGR_ACC_FDS_t *value);
cparata 0:b189540a70e2 460
cparata 0:b189540a70e2 461 /*******************************************************************************
cparata 0:b189540a70e2 462 * Register : CTRL_REG2
cparata 0:b189540a70e2 463 * Address : 0X21
cparata 0:b189540a70e2 464 * Bit Group Name: HPCF
cparata 0:b189540a70e2 465 * Permission : RW
cparata 0:b189540a70e2 466 *******************************************************************************/
cparata 0:b189540a70e2 467 typedef enum {
cparata 0:b189540a70e2 468 LSM303AGR_ACC_HPCF_00 =0x00,
cparata 0:b189540a70e2 469 LSM303AGR_ACC_HPCF_01 =0x10,
cparata 0:b189540a70e2 470 LSM303AGR_ACC_HPCF_10 =0x20,
cparata 0:b189540a70e2 471 LSM303AGR_ACC_HPCF_11 =0x30,
cparata 0:b189540a70e2 472 } LSM303AGR_ACC_HPCF_t;
cparata 0:b189540a70e2 473
cparata 0:b189540a70e2 474 #define LSM303AGR_ACC_HPCF_MASK 0x30
cparata 0:b189540a70e2 475 status_t LSM303AGR_ACC_W_hpf_cutoff_freq(void *handle, LSM303AGR_ACC_HPCF_t newValue);
cparata 0:b189540a70e2 476 status_t LSM303AGR_ACC_R_hpf_cutoff_freq(void *handle, LSM303AGR_ACC_HPCF_t *value);
cparata 0:b189540a70e2 477
cparata 0:b189540a70e2 478 /*******************************************************************************
cparata 0:b189540a70e2 479 * Register : CTRL_REG2
cparata 0:b189540a70e2 480 * Address : 0X21
cparata 0:b189540a70e2 481 * Bit Group Name: HPM
cparata 0:b189540a70e2 482 * Permission : RW
cparata 0:b189540a70e2 483 *******************************************************************************/
cparata 0:b189540a70e2 484 typedef enum {
cparata 0:b189540a70e2 485 LSM303AGR_ACC_HPM_NORMAL =0x00,
cparata 0:b189540a70e2 486 LSM303AGR_ACC_HPM_REFERENCE_SIGNAL =0x40,
cparata 0:b189540a70e2 487 LSM303AGR_ACC_HPM_NORMAL_2 =0x80,
cparata 0:b189540a70e2 488 LSM303AGR_ACC_HPM_AUTORST_ON_INT =0xC0,
cparata 0:b189540a70e2 489 } LSM303AGR_ACC_HPM_t;
cparata 0:b189540a70e2 490
cparata 0:b189540a70e2 491 #define LSM303AGR_ACC_HPM_MASK 0xC0
cparata 0:b189540a70e2 492 status_t LSM303AGR_ACC_W_hpf_mode(void *handle, LSM303AGR_ACC_HPM_t newValue);
cparata 0:b189540a70e2 493 status_t LSM303AGR_ACC_R_hpf_mode(void *handle, LSM303AGR_ACC_HPM_t *value);
cparata 0:b189540a70e2 494
cparata 0:b189540a70e2 495 /*******************************************************************************
cparata 0:b189540a70e2 496 * Register : CTRL_REG3
cparata 0:b189540a70e2 497 * Address : 0X22
cparata 0:b189540a70e2 498 * Bit Group Name: I1_OVERRUN
cparata 0:b189540a70e2 499 * Permission : RW
cparata 0:b189540a70e2 500 *******************************************************************************/
cparata 0:b189540a70e2 501 typedef enum {
cparata 0:b189540a70e2 502 LSM303AGR_ACC_I1_OVERRUN_DISABLED =0x00,
cparata 0:b189540a70e2 503 LSM303AGR_ACC_I1_OVERRUN_ENABLED =0x02,
cparata 0:b189540a70e2 504 } LSM303AGR_ACC_I1_OVERRUN_t;
cparata 0:b189540a70e2 505
cparata 0:b189540a70e2 506 #define LSM303AGR_ACC_I1_OVERRUN_MASK 0x02
cparata 0:b189540a70e2 507 status_t LSM303AGR_ACC_W_FIFO_Overrun_on_INT1(void *handle, LSM303AGR_ACC_I1_OVERRUN_t newValue);
cparata 0:b189540a70e2 508 status_t LSM303AGR_ACC_R_FIFO_Overrun_on_INT1(void *handle, LSM303AGR_ACC_I1_OVERRUN_t *value);
cparata 0:b189540a70e2 509
cparata 0:b189540a70e2 510 /*******************************************************************************
cparata 0:b189540a70e2 511 * Register : CTRL_REG3
cparata 0:b189540a70e2 512 * Address : 0X22
cparata 0:b189540a70e2 513 * Bit Group Name: I1_WTM
cparata 0:b189540a70e2 514 * Permission : RW
cparata 0:b189540a70e2 515 *******************************************************************************/
cparata 0:b189540a70e2 516 typedef enum {
cparata 0:b189540a70e2 517 LSM303AGR_ACC_I1_WTM_DISABLED =0x00,
cparata 0:b189540a70e2 518 LSM303AGR_ACC_I1_WTM_ENABLED =0x04,
cparata 0:b189540a70e2 519 } LSM303AGR_ACC_I1_WTM_t;
cparata 0:b189540a70e2 520
cparata 0:b189540a70e2 521 #define LSM303AGR_ACC_I1_WTM_MASK 0x04
cparata 0:b189540a70e2 522 status_t LSM303AGR_ACC_W_FIFO_Watermark_on_INT1(void *handle, LSM303AGR_ACC_I1_WTM_t newValue);
cparata 0:b189540a70e2 523 status_t LSM303AGR_ACC_R_FIFO_Watermark_on_INT1(void *handle, LSM303AGR_ACC_I1_WTM_t *value);
cparata 0:b189540a70e2 524
cparata 0:b189540a70e2 525 /*******************************************************************************
cparata 0:b189540a70e2 526 * Register : CTRL_REG3
cparata 0:b189540a70e2 527 * Address : 0X22
cparata 0:b189540a70e2 528 * Bit Group Name: I1_DRDY2
cparata 0:b189540a70e2 529 * Permission : RW
cparata 0:b189540a70e2 530 *******************************************************************************/
cparata 0:b189540a70e2 531 typedef enum {
cparata 0:b189540a70e2 532 LSM303AGR_ACC_I1_DRDY2_DISABLED =0x00,
cparata 0:b189540a70e2 533 LSM303AGR_ACC_I1_DRDY2_ENABLED =0x08,
cparata 0:b189540a70e2 534 } LSM303AGR_ACC_I1_DRDY2_t;
cparata 0:b189540a70e2 535
cparata 0:b189540a70e2 536 #define LSM303AGR_ACC_I1_DRDY2_MASK 0x08
cparata 0:b189540a70e2 537 status_t LSM303AGR_ACC_W_FIFO_DRDY2_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY2_t newValue);
cparata 0:b189540a70e2 538 status_t LSM303AGR_ACC_R_FIFO_DRDY2_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY2_t *value);
cparata 0:b189540a70e2 539
cparata 0:b189540a70e2 540 /*******************************************************************************
cparata 0:b189540a70e2 541 * Register : CTRL_REG3
cparata 0:b189540a70e2 542 * Address : 0X22
cparata 0:b189540a70e2 543 * Bit Group Name: I1_DRDY1
cparata 0:b189540a70e2 544 * Permission : RW
cparata 0:b189540a70e2 545 *******************************************************************************/
cparata 0:b189540a70e2 546 typedef enum {
cparata 0:b189540a70e2 547 LSM303AGR_ACC_I1_DRDY1_DISABLED =0x00,
cparata 0:b189540a70e2 548 LSM303AGR_ACC_I1_DRDY1_ENABLED =0x10,
cparata 0:b189540a70e2 549 } LSM303AGR_ACC_I1_DRDY1_t;
cparata 0:b189540a70e2 550
cparata 0:b189540a70e2 551 #define LSM303AGR_ACC_I1_DRDY1_MASK 0x10
cparata 0:b189540a70e2 552 status_t LSM303AGR_ACC_W_FIFO_DRDY1_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY1_t newValue);
cparata 0:b189540a70e2 553 status_t LSM303AGR_ACC_R_FIFO_DRDY1_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY1_t *value);
cparata 0:b189540a70e2 554
cparata 0:b189540a70e2 555 /*******************************************************************************
cparata 0:b189540a70e2 556 * Register : CTRL_REG3
cparata 0:b189540a70e2 557 * Address : 0X22
cparata 0:b189540a70e2 558 * Bit Group Name: I1_AOI2
cparata 0:b189540a70e2 559 * Permission : RW
cparata 0:b189540a70e2 560 *******************************************************************************/
cparata 0:b189540a70e2 561 typedef enum {
cparata 0:b189540a70e2 562 LSM303AGR_ACC_I1_AOI2_DISABLED =0x00,
cparata 0:b189540a70e2 563 LSM303AGR_ACC_I1_AOI2_ENABLED =0x20,
cparata 0:b189540a70e2 564 } LSM303AGR_ACC_I1_AOI2_t;
cparata 0:b189540a70e2 565
cparata 0:b189540a70e2 566 #define LSM303AGR_ACC_I1_AOI2_MASK 0x20
cparata 0:b189540a70e2 567 status_t LSM303AGR_ACC_W_FIFO_AOL2_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI2_t newValue);
cparata 0:b189540a70e2 568 status_t LSM303AGR_ACC_R_FIFO_AOL2_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI2_t *value);
cparata 0:b189540a70e2 569
cparata 0:b189540a70e2 570 /*******************************************************************************
cparata 0:b189540a70e2 571 * Register : CTRL_REG3
cparata 0:b189540a70e2 572 * Address : 0X22
cparata 0:b189540a70e2 573 * Bit Group Name: I1_AOI1
cparata 0:b189540a70e2 574 * Permission : RW
cparata 0:b189540a70e2 575 *******************************************************************************/
cparata 0:b189540a70e2 576 typedef enum {
cparata 0:b189540a70e2 577 LSM303AGR_ACC_I1_AOI1_DISABLED =0x00,
cparata 0:b189540a70e2 578 LSM303AGR_ACC_I1_AOI1_ENABLED =0x40,
cparata 0:b189540a70e2 579 } LSM303AGR_ACC_I1_AOI1_t;
cparata 0:b189540a70e2 580
cparata 0:b189540a70e2 581 #define LSM303AGR_ACC_I1_AOI1_MASK 0x40
cparata 0:b189540a70e2 582 status_t LSM303AGR_ACC_W_FIFO_AOL1_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI1_t newValue);
cparata 0:b189540a70e2 583 status_t LSM303AGR_ACC_R_FIFO_AOL1_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI1_t *value);
cparata 0:b189540a70e2 584
cparata 0:b189540a70e2 585 /*******************************************************************************
cparata 0:b189540a70e2 586 * Register : CTRL_REG3
cparata 0:b189540a70e2 587 * Address : 0X22
cparata 0:b189540a70e2 588 * Bit Group Name: I1_CLICK
cparata 0:b189540a70e2 589 * Permission : RW
cparata 0:b189540a70e2 590 *******************************************************************************/
cparata 0:b189540a70e2 591 typedef enum {
cparata 0:b189540a70e2 592 LSM303AGR_ACC_I1_CLICK_DISABLED =0x00,
cparata 0:b189540a70e2 593 LSM303AGR_ACC_I1_CLICK_ENABLED =0x80,
cparata 0:b189540a70e2 594 } LSM303AGR_ACC_I1_CLICK_t;
cparata 0:b189540a70e2 595
cparata 0:b189540a70e2 596 #define LSM303AGR_ACC_I1_CLICK_MASK 0x80
cparata 0:b189540a70e2 597 status_t LSM303AGR_ACC_W_FIFO_Click_on_INT1(void *handle, LSM303AGR_ACC_I1_CLICK_t newValue);
cparata 0:b189540a70e2 598 status_t LSM303AGR_ACC_R_FIFO_Click_on_INT1(void *handle, LSM303AGR_ACC_I1_CLICK_t *value);
cparata 0:b189540a70e2 599
cparata 0:b189540a70e2 600 /*******************************************************************************
cparata 0:b189540a70e2 601 * Register : CTRL_REG4
cparata 0:b189540a70e2 602 * Address : 0X23
cparata 0:b189540a70e2 603 * Bit Group Name: SIM
cparata 0:b189540a70e2 604 * Permission : RW
cparata 0:b189540a70e2 605 *******************************************************************************/
cparata 0:b189540a70e2 606 typedef enum {
cparata 0:b189540a70e2 607 LSM303AGR_ACC_SIM_4_WIRES =0x00,
cparata 0:b189540a70e2 608 LSM303AGR_ACC_SIM_3_WIRES =0x01,
cparata 0:b189540a70e2 609 } LSM303AGR_ACC_SIM_t;
cparata 0:b189540a70e2 610
cparata 0:b189540a70e2 611 #define LSM303AGR_ACC_SIM_MASK 0x01
cparata 0:b189540a70e2 612 status_t LSM303AGR_ACC_W_SPI_mode(void *handle, LSM303AGR_ACC_SIM_t newValue);
cparata 0:b189540a70e2 613 status_t LSM303AGR_ACC_R_SPI_mode(void *handle, LSM303AGR_ACC_SIM_t *value);
cparata 0:b189540a70e2 614
cparata 0:b189540a70e2 615 /*******************************************************************************
cparata 0:b189540a70e2 616 * Register : CTRL_REG4
cparata 0:b189540a70e2 617 * Address : 0X23
cparata 0:b189540a70e2 618 * Bit Group Name: ST
cparata 0:b189540a70e2 619 * Permission : RW
cparata 0:b189540a70e2 620 *******************************************************************************/
cparata 0:b189540a70e2 621 typedef enum {
cparata 0:b189540a70e2 622 LSM303AGR_ACC_ST_DISABLED =0x00,
cparata 0:b189540a70e2 623 LSM303AGR_ACC_ST_SELF_TEST_0 =0x02,
cparata 0:b189540a70e2 624 LSM303AGR_ACC_ST_SELF_TEST_1 =0x04,
cparata 0:b189540a70e2 625 LSM303AGR_ACC_ST_NOT_APPLICABLE =0x06,
cparata 0:b189540a70e2 626 } LSM303AGR_ACC_ST_t;
cparata 0:b189540a70e2 627
cparata 0:b189540a70e2 628 #define LSM303AGR_ACC_ST_MASK 0x06
cparata 0:b189540a70e2 629 status_t LSM303AGR_ACC_W_SelfTest(void *handle, LSM303AGR_ACC_ST_t newValue);
cparata 0:b189540a70e2 630 status_t LSM303AGR_ACC_R_SelfTest(void *handle, LSM303AGR_ACC_ST_t *value);
cparata 0:b189540a70e2 631
cparata 0:b189540a70e2 632 /*******************************************************************************
cparata 0:b189540a70e2 633 * Register : CTRL_REG4
cparata 0:b189540a70e2 634 * Address : 0X23
cparata 0:b189540a70e2 635 * Bit Group Name: HR
cparata 0:b189540a70e2 636 * Permission : RW
cparata 0:b189540a70e2 637 *******************************************************************************/
cparata 0:b189540a70e2 638 typedef enum {
cparata 0:b189540a70e2 639 LSM303AGR_ACC_HR_DISABLED =0x00,
cparata 0:b189540a70e2 640 LSM303AGR_ACC_HR_ENABLED =0x08,
cparata 0:b189540a70e2 641 } LSM303AGR_ACC_HR_t;
cparata 0:b189540a70e2 642
cparata 0:b189540a70e2 643 #define LSM303AGR_ACC_HR_MASK 0x08
cparata 0:b189540a70e2 644 status_t LSM303AGR_ACC_W_HiRes(void *handle, LSM303AGR_ACC_HR_t newValue);
cparata 0:b189540a70e2 645 status_t LSM303AGR_ACC_R_HiRes(void *handle, LSM303AGR_ACC_HR_t *value);
cparata 0:b189540a70e2 646
cparata 0:b189540a70e2 647 /*******************************************************************************
cparata 0:b189540a70e2 648 * Register : CTRL_REG4
cparata 0:b189540a70e2 649 * Address : 0X23
cparata 0:b189540a70e2 650 * Bit Group Name: FS
cparata 0:b189540a70e2 651 * Permission : RW
cparata 0:b189540a70e2 652 *******************************************************************************/
cparata 0:b189540a70e2 653 typedef enum {
cparata 0:b189540a70e2 654 LSM303AGR_ACC_FS_2G =0x00,
cparata 0:b189540a70e2 655 LSM303AGR_ACC_FS_4G =0x10,
cparata 0:b189540a70e2 656 LSM303AGR_ACC_FS_8G =0x20,
cparata 0:b189540a70e2 657 LSM303AGR_ACC_FS_16G =0x30,
cparata 0:b189540a70e2 658 } LSM303AGR_ACC_FS_t;
cparata 0:b189540a70e2 659
cparata 0:b189540a70e2 660 #define LSM303AGR_ACC_FS_MASK 0x30
cparata 0:b189540a70e2 661 status_t LSM303AGR_ACC_W_FullScale(void *handle, LSM303AGR_ACC_FS_t newValue);
cparata 0:b189540a70e2 662 status_t LSM303AGR_ACC_R_FullScale(void *handle, LSM303AGR_ACC_FS_t *value);
cparata 0:b189540a70e2 663
cparata 0:b189540a70e2 664 /*******************************************************************************
cparata 0:b189540a70e2 665 * Register : CTRL_REG4
cparata 0:b189540a70e2 666 * Address : 0X23
cparata 0:b189540a70e2 667 * Bit Group Name: BLE
cparata 0:b189540a70e2 668 * Permission : RW
cparata 0:b189540a70e2 669 *******************************************************************************/
cparata 0:b189540a70e2 670 typedef enum {
cparata 0:b189540a70e2 671 LSM303AGR_ACC_BLE_LITTLE_ENDIAN =0x00,
cparata 0:b189540a70e2 672 LSM303AGR_ACC_BLE_BIG_ENDIAN =0x40,
cparata 0:b189540a70e2 673 } LSM303AGR_ACC_BLE_t;
cparata 0:b189540a70e2 674
cparata 0:b189540a70e2 675 #define LSM303AGR_ACC_BLE_MASK 0x40
cparata 0:b189540a70e2 676 status_t LSM303AGR_ACC_W_LittleBigEndian(void *handle, LSM303AGR_ACC_BLE_t newValue);
cparata 0:b189540a70e2 677 status_t LSM303AGR_ACC_R_LittleBigEndian(void *handle, LSM303AGR_ACC_BLE_t *value);
cparata 0:b189540a70e2 678
cparata 0:b189540a70e2 679 /*******************************************************************************
cparata 0:b189540a70e2 680 * Register : CTRL_REG4
cparata 0:b189540a70e2 681 * Address : 0X23
cparata 0:b189540a70e2 682 * Bit Group Name: BDU
cparata 0:b189540a70e2 683 * Permission : RW
cparata 0:b189540a70e2 684 *******************************************************************************/
cparata 0:b189540a70e2 685 typedef enum {
cparata 0:b189540a70e2 686 LSM303AGR_ACC_BDU_DISABLED =0x00,
cparata 0:b189540a70e2 687 LSM303AGR_ACC_BDU_ENABLED =0x80,
cparata 0:b189540a70e2 688 } LSM303AGR_ACC_BDU_t;
cparata 0:b189540a70e2 689
cparata 0:b189540a70e2 690 #define LSM303AGR_ACC_BDU_MASK 0x80
cparata 0:b189540a70e2 691 status_t LSM303AGR_ACC_W_BlockDataUpdate(void *handle, LSM303AGR_ACC_BDU_t newValue);
cparata 0:b189540a70e2 692 status_t LSM303AGR_ACC_R_BlockDataUpdate(void *handle, LSM303AGR_ACC_BDU_t *value);
cparata 0:b189540a70e2 693
cparata 0:b189540a70e2 694 /*******************************************************************************
cparata 0:b189540a70e2 695 * Register : CTRL_REG5
cparata 0:b189540a70e2 696 * Address : 0X24
cparata 0:b189540a70e2 697 * Bit Group Name: D4D_INT2
cparata 0:b189540a70e2 698 * Permission : RW
cparata 0:b189540a70e2 699 *******************************************************************************/
cparata 0:b189540a70e2 700 typedef enum {
cparata 0:b189540a70e2 701 LSM303AGR_ACC_D4D_INT2_DISABLED =0x00,
cparata 0:b189540a70e2 702 LSM303AGR_ACC_D4D_INT2_ENABLED =0x01,
cparata 0:b189540a70e2 703 } LSM303AGR_ACC_D4D_INT2_t;
cparata 0:b189540a70e2 704
cparata 0:b189540a70e2 705 #define LSM303AGR_ACC_D4D_INT2_MASK 0x01
cparata 0:b189540a70e2 706 status_t LSM303AGR_ACC_W_4D_on_INT2(void *handle, LSM303AGR_ACC_D4D_INT2_t newValue);
cparata 0:b189540a70e2 707 status_t LSM303AGR_ACC_R_4D_on_INT2(void *handle, LSM303AGR_ACC_D4D_INT2_t *value);
cparata 0:b189540a70e2 708
cparata 0:b189540a70e2 709 /*******************************************************************************
cparata 0:b189540a70e2 710 * Register : CTRL_REG5
cparata 0:b189540a70e2 711 * Address : 0X24
cparata 0:b189540a70e2 712 * Bit Group Name: LIR_INT2
cparata 0:b189540a70e2 713 * Permission : RW
cparata 0:b189540a70e2 714 *******************************************************************************/
cparata 0:b189540a70e2 715 typedef enum {
cparata 0:b189540a70e2 716 LSM303AGR_ACC_LIR_INT2_DISABLED =0x00,
cparata 0:b189540a70e2 717 LSM303AGR_ACC_LIR_INT2_ENABLED =0x02,
cparata 0:b189540a70e2 718 } LSM303AGR_ACC_LIR_INT2_t;
cparata 0:b189540a70e2 719
cparata 0:b189540a70e2 720 #define LSM303AGR_ACC_LIR_INT2_MASK 0x02
cparata 0:b189540a70e2 721 status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT2(void *handle, LSM303AGR_ACC_LIR_INT2_t newValue);
cparata 0:b189540a70e2 722 status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT2(void *handle, LSM303AGR_ACC_LIR_INT2_t *value);
cparata 0:b189540a70e2 723
cparata 0:b189540a70e2 724 /*******************************************************************************
cparata 0:b189540a70e2 725 * Register : CTRL_REG5
cparata 0:b189540a70e2 726 * Address : 0X24
cparata 0:b189540a70e2 727 * Bit Group Name: D4D_INT1
cparata 0:b189540a70e2 728 * Permission : RW
cparata 0:b189540a70e2 729 *******************************************************************************/
cparata 0:b189540a70e2 730 typedef enum {
cparata 0:b189540a70e2 731 LSM303AGR_ACC_D4D_INT1_DISABLED =0x00,
cparata 0:b189540a70e2 732 LSM303AGR_ACC_D4D_INT1_ENABLED =0x04,
cparata 0:b189540a70e2 733 } LSM303AGR_ACC_D4D_INT1_t;
cparata 0:b189540a70e2 734
cparata 0:b189540a70e2 735 #define LSM303AGR_ACC_D4D_INT1_MASK 0x04
cparata 0:b189540a70e2 736 status_t LSM303AGR_ACC_W_4D_on_INT1(void *handle, LSM303AGR_ACC_D4D_INT1_t newValue);
cparata 0:b189540a70e2 737 status_t LSM303AGR_ACC_R_4D_on_INT1(void *handle, LSM303AGR_ACC_D4D_INT1_t *value);
cparata 0:b189540a70e2 738
cparata 0:b189540a70e2 739 /*******************************************************************************
cparata 0:b189540a70e2 740 * Register : CTRL_REG5
cparata 0:b189540a70e2 741 * Address : 0X24
cparata 0:b189540a70e2 742 * Bit Group Name: LIR_INT1
cparata 0:b189540a70e2 743 * Permission : RW
cparata 0:b189540a70e2 744 *******************************************************************************/
cparata 0:b189540a70e2 745 typedef enum {
cparata 0:b189540a70e2 746 LSM303AGR_ACC_LIR_INT1_DISABLED =0x00,
cparata 0:b189540a70e2 747 LSM303AGR_ACC_LIR_INT1_ENABLED =0x08,
cparata 0:b189540a70e2 748 } LSM303AGR_ACC_LIR_INT1_t;
cparata 0:b189540a70e2 749
cparata 0:b189540a70e2 750 #define LSM303AGR_ACC_LIR_INT1_MASK 0x08
cparata 0:b189540a70e2 751 status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT1(void *handle, LSM303AGR_ACC_LIR_INT1_t newValue);
cparata 0:b189540a70e2 752 status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT1(void *handle, LSM303AGR_ACC_LIR_INT1_t *value);
cparata 0:b189540a70e2 753
cparata 0:b189540a70e2 754 /*******************************************************************************
cparata 0:b189540a70e2 755 * Register : CTRL_REG5
cparata 0:b189540a70e2 756 * Address : 0X24
cparata 0:b189540a70e2 757 * Bit Group Name: FIFO_EN
cparata 0:b189540a70e2 758 * Permission : RW
cparata 0:b189540a70e2 759 *******************************************************************************/
cparata 0:b189540a70e2 760 typedef enum {
cparata 0:b189540a70e2 761 LSM303AGR_ACC_FIFO_EN_DISABLED =0x00,
cparata 0:b189540a70e2 762 LSM303AGR_ACC_FIFO_EN_ENABLED =0x40,
cparata 0:b189540a70e2 763 } LSM303AGR_ACC_FIFO_EN_t;
cparata 0:b189540a70e2 764
cparata 0:b189540a70e2 765 #define LSM303AGR_ACC_FIFO_EN_MASK 0x40
cparata 0:b189540a70e2 766 status_t LSM303AGR_ACC_W_FIFO_EN(void *handle, LSM303AGR_ACC_FIFO_EN_t newValue);
cparata 0:b189540a70e2 767 status_t LSM303AGR_ACC_R_FIFO_EN(void *handle, LSM303AGR_ACC_FIFO_EN_t *value);
cparata 0:b189540a70e2 768
cparata 0:b189540a70e2 769 /*******************************************************************************
cparata 0:b189540a70e2 770 * Register : CTRL_REG5
cparata 0:b189540a70e2 771 * Address : 0X24
cparata 0:b189540a70e2 772 * Bit Group Name: BOOT
cparata 0:b189540a70e2 773 * Permission : RW
cparata 0:b189540a70e2 774 *******************************************************************************/
cparata 0:b189540a70e2 775 typedef enum {
cparata 0:b189540a70e2 776 LSM303AGR_ACC_BOOT_NORMAL_MODE =0x00,
cparata 0:b189540a70e2 777 LSM303AGR_ACC_BOOT_REBOOT =0x80,
cparata 0:b189540a70e2 778 } LSM303AGR_ACC_BOOT_t;
cparata 0:b189540a70e2 779
cparata 0:b189540a70e2 780 #define LSM303AGR_ACC_BOOT_MASK 0x80
cparata 0:b189540a70e2 781 status_t LSM303AGR_ACC_W_RebootMemory(void *handle, LSM303AGR_ACC_BOOT_t newValue);
cparata 0:b189540a70e2 782 status_t LSM303AGR_ACC_R_RebootMemory(void *handle, LSM303AGR_ACC_BOOT_t *value);
cparata 0:b189540a70e2 783
cparata 0:b189540a70e2 784 /*******************************************************************************
cparata 0:b189540a70e2 785 * Register : CTRL_REG6
cparata 0:b189540a70e2 786 * Address : 0X25
cparata 0:b189540a70e2 787 * Bit Group Name: H_LACTIVE
cparata 0:b189540a70e2 788 * Permission : RW
cparata 0:b189540a70e2 789 *******************************************************************************/
cparata 0:b189540a70e2 790 typedef enum {
cparata 0:b189540a70e2 791 LSM303AGR_ACC_H_LACTIVE_ACTIVE_HI =0x00,
cparata 0:b189540a70e2 792 LSM303AGR_ACC_H_LACTIVE_ACTIVE_LO =0x02,
cparata 0:b189540a70e2 793 } LSM303AGR_ACC_H_LACTIVE_t;
cparata 0:b189540a70e2 794
cparata 0:b189540a70e2 795 #define LSM303AGR_ACC_H_LACTIVE_MASK 0x02
cparata 0:b189540a70e2 796 status_t LSM303AGR_ACC_W_IntActive(void *handle, LSM303AGR_ACC_H_LACTIVE_t newValue);
cparata 0:b189540a70e2 797 status_t LSM303AGR_ACC_R_IntActive(void *handle, LSM303AGR_ACC_H_LACTIVE_t *value);
cparata 0:b189540a70e2 798
cparata 0:b189540a70e2 799 /*******************************************************************************
cparata 0:b189540a70e2 800 * Register : CTRL_REG6
cparata 0:b189540a70e2 801 * Address : 0X25
cparata 0:b189540a70e2 802 * Bit Group Name: P2_ACT
cparata 0:b189540a70e2 803 * Permission : RW
cparata 0:b189540a70e2 804 *******************************************************************************/
cparata 0:b189540a70e2 805 typedef enum {
cparata 0:b189540a70e2 806 LSM303AGR_ACC_P2_ACT_DISABLED =0x00,
cparata 0:b189540a70e2 807 LSM303AGR_ACC_P2_ACT_ENABLED =0x08,
cparata 0:b189540a70e2 808 } LSM303AGR_ACC_P2_ACT_t;
cparata 0:b189540a70e2 809
cparata 0:b189540a70e2 810 #define LSM303AGR_ACC_P2_ACT_MASK 0x08
cparata 0:b189540a70e2 811 status_t LSM303AGR_ACC_W_P2_ACT(void *handle, LSM303AGR_ACC_P2_ACT_t newValue);
cparata 0:b189540a70e2 812 status_t LSM303AGR_ACC_R_P2_ACT(void *handle, LSM303AGR_ACC_P2_ACT_t *value);
cparata 0:b189540a70e2 813
cparata 0:b189540a70e2 814 /*******************************************************************************
cparata 0:b189540a70e2 815 * Register : CTRL_REG6
cparata 0:b189540a70e2 816 * Address : 0X25
cparata 0:b189540a70e2 817 * Bit Group Name: BOOT_I1
cparata 0:b189540a70e2 818 * Permission : RW
cparata 0:b189540a70e2 819 *******************************************************************************/
cparata 0:b189540a70e2 820 typedef enum {
cparata 0:b189540a70e2 821 LSM303AGR_ACC_BOOT_I1_DISABLED =0x00,
cparata 0:b189540a70e2 822 LSM303AGR_ACC_BOOT_I1_ENABLED =0x10,
cparata 0:b189540a70e2 823 } LSM303AGR_ACC_BOOT_I1_t;
cparata 0:b189540a70e2 824
cparata 0:b189540a70e2 825 #define LSM303AGR_ACC_BOOT_I1_MASK 0x10
cparata 0:b189540a70e2 826 status_t LSM303AGR_ACC_W_Boot_on_INT2(void *handle, LSM303AGR_ACC_BOOT_I1_t newValue);
cparata 0:b189540a70e2 827 status_t LSM303AGR_ACC_R_Boot_on_INT2(void *handle, LSM303AGR_ACC_BOOT_I1_t *value);
cparata 0:b189540a70e2 828
cparata 0:b189540a70e2 829 /*******************************************************************************
cparata 0:b189540a70e2 830 * Register : CTRL_REG6
cparata 0:b189540a70e2 831 * Address : 0X25
cparata 0:b189540a70e2 832 * Bit Group Name: I2_INT2
cparata 0:b189540a70e2 833 * Permission : RW
cparata 0:b189540a70e2 834 *******************************************************************************/
cparata 0:b189540a70e2 835 typedef enum {
cparata 0:b189540a70e2 836 LSM303AGR_ACC_I2_INT2_DISABLED =0x00,
cparata 0:b189540a70e2 837 LSM303AGR_ACC_I2_INT2_ENABLED =0x20,
cparata 0:b189540a70e2 838 } LSM303AGR_ACC_I2_INT2_t;
cparata 0:b189540a70e2 839
cparata 0:b189540a70e2 840 #define LSM303AGR_ACC_I2_INT2_MASK 0x20
cparata 0:b189540a70e2 841 status_t LSM303AGR_ACC_W_I2_on_INT2(void *handle, LSM303AGR_ACC_I2_INT2_t newValue);
cparata 0:b189540a70e2 842 status_t LSM303AGR_ACC_R_I2_on_INT2(void *handle, LSM303AGR_ACC_I2_INT2_t *value);
cparata 0:b189540a70e2 843
cparata 0:b189540a70e2 844 /*******************************************************************************
cparata 0:b189540a70e2 845 * Register : CTRL_REG6
cparata 0:b189540a70e2 846 * Address : 0X25
cparata 0:b189540a70e2 847 * Bit Group Name: I2_INT1
cparata 0:b189540a70e2 848 * Permission : RW
cparata 0:b189540a70e2 849 *******************************************************************************/
cparata 0:b189540a70e2 850 typedef enum {
cparata 0:b189540a70e2 851 LSM303AGR_ACC_I2_INT1_DISABLED =0x00,
cparata 0:b189540a70e2 852 LSM303AGR_ACC_I2_INT1_ENABLED =0x40,
cparata 0:b189540a70e2 853 } LSM303AGR_ACC_I2_INT1_t;
cparata 0:b189540a70e2 854
cparata 0:b189540a70e2 855 #define LSM303AGR_ACC_I2_INT1_MASK 0x40
cparata 0:b189540a70e2 856 status_t LSM303AGR_ACC_W_I2_on_INT1(void *handle, LSM303AGR_ACC_I2_INT1_t newValue);
cparata 0:b189540a70e2 857 status_t LSM303AGR_ACC_R_I2_on_INT1(void *handle, LSM303AGR_ACC_I2_INT1_t *value);
cparata 0:b189540a70e2 858
cparata 0:b189540a70e2 859 /*******************************************************************************
cparata 0:b189540a70e2 860 * Register : CTRL_REG6
cparata 0:b189540a70e2 861 * Address : 0X25
cparata 0:b189540a70e2 862 * Bit Group Name: I2_CLICKEN
cparata 0:b189540a70e2 863 * Permission : RW
cparata 0:b189540a70e2 864 *******************************************************************************/
cparata 0:b189540a70e2 865 typedef enum {
cparata 0:b189540a70e2 866 LSM303AGR_ACC_I2_CLICKEN_DISABLED =0x00,
cparata 0:b189540a70e2 867 LSM303AGR_ACC_I2_CLICKEN_ENABLED =0x80,
cparata 0:b189540a70e2 868 } LSM303AGR_ACC_I2_CLICKEN_t;
cparata 0:b189540a70e2 869
cparata 0:b189540a70e2 870 #define LSM303AGR_ACC_I2_CLICKEN_MASK 0x80
cparata 0:b189540a70e2 871 status_t LSM303AGR_ACC_W_Click_on_INT2(void *handle, LSM303AGR_ACC_I2_CLICKEN_t newValue);
cparata 0:b189540a70e2 872 status_t LSM303AGR_ACC_R_Click_on_INT2(void *handle, LSM303AGR_ACC_I2_CLICKEN_t *value);
cparata 0:b189540a70e2 873
cparata 0:b189540a70e2 874 /*******************************************************************************
cparata 0:b189540a70e2 875 * Register : REFERENCE
cparata 0:b189540a70e2 876 * Address : 0X26
cparata 0:b189540a70e2 877 * Bit Group Name: REF
cparata 0:b189540a70e2 878 * Permission : RW
cparata 0:b189540a70e2 879 *******************************************************************************/
cparata 0:b189540a70e2 880 #define LSM303AGR_ACC_REF_MASK 0xFF
cparata 0:b189540a70e2 881 #define LSM303AGR_ACC_REF_POSITION 0
cparata 0:b189540a70e2 882 status_t LSM303AGR_ACC_W_ReferenceVal(void *handle, u8_t newValue);
cparata 0:b189540a70e2 883 status_t LSM303AGR_ACC_R_ReferenceVal(void *handle, u8_t *value);
cparata 0:b189540a70e2 884
cparata 0:b189540a70e2 885 /*******************************************************************************
cparata 0:b189540a70e2 886 * Register : STATUS_REG2
cparata 0:b189540a70e2 887 * Address : 0X27
cparata 0:b189540a70e2 888 * Bit Group Name: XDA
cparata 0:b189540a70e2 889 * Permission : RO
cparata 0:b189540a70e2 890 *******************************************************************************/
cparata 0:b189540a70e2 891 typedef enum {
cparata 0:b189540a70e2 892 LSM303AGR_ACC_XDA_NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 893 LSM303AGR_ACC_XDA_AVAILABLE =0x01,
cparata 0:b189540a70e2 894 } LSM303AGR_ACC_XDA_t;
cparata 0:b189540a70e2 895
cparata 0:b189540a70e2 896 #define LSM303AGR_ACC_XDA_MASK 0x01
cparata 0:b189540a70e2 897 status_t LSM303AGR_ACC_R_XDataAvail(void *handle, LSM303AGR_ACC_XDA_t *value);
cparata 0:b189540a70e2 898
cparata 0:b189540a70e2 899 /*******************************************************************************
cparata 0:b189540a70e2 900 * Register : STATUS_REG2
cparata 0:b189540a70e2 901 * Address : 0X27
cparata 0:b189540a70e2 902 * Bit Group Name: YDA
cparata 0:b189540a70e2 903 * Permission : RO
cparata 0:b189540a70e2 904 *******************************************************************************/
cparata 0:b189540a70e2 905 typedef enum {
cparata 0:b189540a70e2 906 LSM303AGR_ACC_YDA_NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 907 LSM303AGR_ACC_YDA_AVAILABLE =0x02,
cparata 0:b189540a70e2 908 } LSM303AGR_ACC_YDA_t;
cparata 0:b189540a70e2 909
cparata 0:b189540a70e2 910 #define LSM303AGR_ACC_YDA_MASK 0x02
cparata 0:b189540a70e2 911 status_t LSM303AGR_ACC_R_YDataAvail(void *handle, LSM303AGR_ACC_YDA_t *value);
cparata 0:b189540a70e2 912
cparata 0:b189540a70e2 913 /*******************************************************************************
cparata 0:b189540a70e2 914 * Register : STATUS_REG2
cparata 0:b189540a70e2 915 * Address : 0X27
cparata 0:b189540a70e2 916 * Bit Group Name: ZDA
cparata 0:b189540a70e2 917 * Permission : RO
cparata 0:b189540a70e2 918 *******************************************************************************/
cparata 0:b189540a70e2 919 typedef enum {
cparata 0:b189540a70e2 920 LSM303AGR_ACC_ZDA_NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 921 LSM303AGR_ACC_ZDA_AVAILABLE =0x04,
cparata 0:b189540a70e2 922 } LSM303AGR_ACC_ZDA_t;
cparata 0:b189540a70e2 923
cparata 0:b189540a70e2 924 #define LSM303AGR_ACC_ZDA_MASK 0x04
cparata 0:b189540a70e2 925 status_t LSM303AGR_ACC_R_ZDataAvail(void *handle, LSM303AGR_ACC_ZDA_t *value);
cparata 0:b189540a70e2 926
cparata 0:b189540a70e2 927 /*******************************************************************************
cparata 0:b189540a70e2 928 * Register : STATUS_REG2
cparata 0:b189540a70e2 929 * Address : 0X27
cparata 0:b189540a70e2 930 * Bit Group Name: ZYXDA
cparata 0:b189540a70e2 931 * Permission : RO
cparata 0:b189540a70e2 932 *******************************************************************************/
cparata 0:b189540a70e2 933 typedef enum {
cparata 0:b189540a70e2 934 LSM303AGR_ACC_ZYXDA_NOT_AVAILABLE =0x00,
cparata 0:b189540a70e2 935 LSM303AGR_ACC_ZYXDA_AVAILABLE =0x08,
cparata 0:b189540a70e2 936 } LSM303AGR_ACC_ZYXDA_t;
cparata 0:b189540a70e2 937
cparata 0:b189540a70e2 938 #define LSM303AGR_ACC_ZYXDA_MASK 0x08
cparata 0:b189540a70e2 939 status_t LSM303AGR_ACC_R_XYZDataAvail(void *handle, LSM303AGR_ACC_ZYXDA_t *value);
cparata 0:b189540a70e2 940
cparata 0:b189540a70e2 941 /*******************************************************************************
cparata 0:b189540a70e2 942 * Register : STATUS_REG2
cparata 0:b189540a70e2 943 * Address : 0X27
cparata 0:b189540a70e2 944 * Bit Group Name: XOR
cparata 0:b189540a70e2 945 * Permission : RO
cparata 0:b189540a70e2 946 *******************************************************************************/
cparata 0:b189540a70e2 947 typedef enum {
cparata 0:b189540a70e2 948 LSM303AGR_ACC_XOR_NO_OVERRUN =0x00,
cparata 0:b189540a70e2 949 LSM303AGR_ACC_XOR_OVERRUN =0x10,
cparata 0:b189540a70e2 950 } LSM303AGR_ACC_XOR_t;
cparata 0:b189540a70e2 951
cparata 0:b189540a70e2 952 #define LSM303AGR_ACC_XOR_MASK 0x10
cparata 0:b189540a70e2 953 status_t LSM303AGR_ACC_R_XDataOverrun(void *handle, LSM303AGR_ACC_XOR_t *value);
cparata 0:b189540a70e2 954
cparata 0:b189540a70e2 955 /*******************************************************************************
cparata 0:b189540a70e2 956 * Register : STATUS_REG2
cparata 0:b189540a70e2 957 * Address : 0X27
cparata 0:b189540a70e2 958 * Bit Group Name: YOR
cparata 0:b189540a70e2 959 * Permission : RO
cparata 0:b189540a70e2 960 *******************************************************************************/
cparata 0:b189540a70e2 961 typedef enum {
cparata 0:b189540a70e2 962 LSM303AGR_ACC_YOR_NO_OVERRUN =0x00,
cparata 0:b189540a70e2 963 LSM303AGR_ACC_YOR_OVERRUN =0x20,
cparata 0:b189540a70e2 964 } LSM303AGR_ACC_YOR_t;
cparata 0:b189540a70e2 965
cparata 0:b189540a70e2 966 #define LSM303AGR_ACC_YOR_MASK 0x20
cparata 0:b189540a70e2 967 status_t LSM303AGR_ACC_R_YDataOverrun(void *handle, LSM303AGR_ACC_YOR_t *value);
cparata 0:b189540a70e2 968
cparata 0:b189540a70e2 969 /*******************************************************************************
cparata 0:b189540a70e2 970 * Register : STATUS_REG2
cparata 0:b189540a70e2 971 * Address : 0X27
cparata 0:b189540a70e2 972 * Bit Group Name: ZOR
cparata 0:b189540a70e2 973 * Permission : RO
cparata 0:b189540a70e2 974 *******************************************************************************/
cparata 0:b189540a70e2 975 typedef enum {
cparata 0:b189540a70e2 976 LSM303AGR_ACC_ZOR_NO_OVERRUN =0x00,
cparata 0:b189540a70e2 977 LSM303AGR_ACC_ZOR_OVERRUN =0x40,
cparata 0:b189540a70e2 978 } LSM303AGR_ACC_ZOR_t;
cparata 0:b189540a70e2 979
cparata 0:b189540a70e2 980 #define LSM303AGR_ACC_ZOR_MASK 0x40
cparata 0:b189540a70e2 981 status_t LSM303AGR_ACC_R_ZDataOverrun(void *handle, LSM303AGR_ACC_ZOR_t *value);
cparata 0:b189540a70e2 982
cparata 0:b189540a70e2 983 /*******************************************************************************
cparata 0:b189540a70e2 984 * Register : STATUS_REG2
cparata 0:b189540a70e2 985 * Address : 0X27
cparata 0:b189540a70e2 986 * Bit Group Name: ZYXOR
cparata 0:b189540a70e2 987 * Permission : RO
cparata 0:b189540a70e2 988 *******************************************************************************/
cparata 0:b189540a70e2 989 typedef enum {
cparata 0:b189540a70e2 990 LSM303AGR_ACC_ZYXOR_NO_OVERRUN =0x00,
cparata 0:b189540a70e2 991 LSM303AGR_ACC_ZYXOR_OVERRUN =0x80,
cparata 0:b189540a70e2 992 } LSM303AGR_ACC_ZYXOR_t;
cparata 0:b189540a70e2 993
cparata 0:b189540a70e2 994 #define LSM303AGR_ACC_ZYXOR_MASK 0x80
cparata 0:b189540a70e2 995 status_t LSM303AGR_ACC_R_XYZDataOverrun(void *handle, LSM303AGR_ACC_ZYXOR_t *value);
cparata 0:b189540a70e2 996
cparata 0:b189540a70e2 997 /*******************************************************************************
cparata 0:b189540a70e2 998 * Register : FIFO_CTRL_REG
cparata 0:b189540a70e2 999 * Address : 0X2E
cparata 0:b189540a70e2 1000 * Bit Group Name: FTH
cparata 0:b189540a70e2 1001 * Permission : RW
cparata 0:b189540a70e2 1002 *******************************************************************************/
cparata 0:b189540a70e2 1003 #define LSM303AGR_ACC_FTH_MASK 0x1F
cparata 0:b189540a70e2 1004 #define LSM303AGR_ACC_FTH_POSITION 0
cparata 0:b189540a70e2 1005 status_t LSM303AGR_ACC_W_FifoThreshold(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1006 status_t LSM303AGR_ACC_R_FifoThreshold(void *handle, u8_t *value);
cparata 0:b189540a70e2 1007
cparata 0:b189540a70e2 1008 /*******************************************************************************
cparata 0:b189540a70e2 1009 * Register : FIFO_CTRL_REG
cparata 0:b189540a70e2 1010 * Address : 0X2E
cparata 0:b189540a70e2 1011 * Bit Group Name: TR
cparata 0:b189540a70e2 1012 * Permission : RW
cparata 0:b189540a70e2 1013 *******************************************************************************/
cparata 0:b189540a70e2 1014 typedef enum {
cparata 0:b189540a70e2 1015 LSM303AGR_ACC_TR_TRIGGER_ON_INT1 =0x00,
cparata 0:b189540a70e2 1016 LSM303AGR_ACC_TR_TRIGGER_ON_INT2 =0x20,
cparata 0:b189540a70e2 1017 } LSM303AGR_ACC_TR_t;
cparata 0:b189540a70e2 1018
cparata 0:b189540a70e2 1019 #define LSM303AGR_ACC_TR_MASK 0x20
cparata 0:b189540a70e2 1020 status_t LSM303AGR_ACC_W_TriggerSel(void *handle, LSM303AGR_ACC_TR_t newValue);
cparata 0:b189540a70e2 1021 status_t LSM303AGR_ACC_R_TriggerSel(void *handle, LSM303AGR_ACC_TR_t *value);
cparata 0:b189540a70e2 1022
cparata 0:b189540a70e2 1023 /*******************************************************************************
cparata 0:b189540a70e2 1024 * Register : FIFO_CTRL_REG
cparata 0:b189540a70e2 1025 * Address : 0X2E
cparata 0:b189540a70e2 1026 * Bit Group Name: FM
cparata 0:b189540a70e2 1027 * Permission : RW
cparata 0:b189540a70e2 1028 *******************************************************************************/
cparata 0:b189540a70e2 1029 typedef enum {
cparata 0:b189540a70e2 1030 LSM303AGR_ACC_FM_BYPASS =0x00,
cparata 0:b189540a70e2 1031 LSM303AGR_ACC_FM_FIFO =0x40,
cparata 0:b189540a70e2 1032 LSM303AGR_ACC_FM_STREAM =0x80,
cparata 0:b189540a70e2 1033 LSM303AGR_ACC_FM_TRIGGER =0xC0,
cparata 0:b189540a70e2 1034 } LSM303AGR_ACC_FM_t;
cparata 0:b189540a70e2 1035
cparata 0:b189540a70e2 1036 #define LSM303AGR_ACC_FM_MASK 0xC0
cparata 0:b189540a70e2 1037 status_t LSM303AGR_ACC_W_FifoMode(void *handle, LSM303AGR_ACC_FM_t newValue);
cparata 0:b189540a70e2 1038 status_t LSM303AGR_ACC_R_FifoMode(void *handle, LSM303AGR_ACC_FM_t *value);
cparata 0:b189540a70e2 1039
cparata 0:b189540a70e2 1040 /*******************************************************************************
cparata 0:b189540a70e2 1041 * Register : FIFO_SRC_REG
cparata 0:b189540a70e2 1042 * Address : 0X2F
cparata 0:b189540a70e2 1043 * Bit Group Name: FSS
cparata 0:b189540a70e2 1044 * Permission : RO
cparata 0:b189540a70e2 1045 *******************************************************************************/
cparata 0:b189540a70e2 1046 #define LSM303AGR_ACC_FSS_MASK 0x1F
cparata 0:b189540a70e2 1047 #define LSM303AGR_ACC_FSS_POSITION 0
cparata 0:b189540a70e2 1048 status_t LSM303AGR_ACC_R_FifoSamplesAvail(void *handle, u8_t *value);
cparata 0:b189540a70e2 1049
cparata 0:b189540a70e2 1050 /*******************************************************************************
cparata 0:b189540a70e2 1051 * Register : FIFO_SRC_REG
cparata 0:b189540a70e2 1052 * Address : 0X2F
cparata 0:b189540a70e2 1053 * Bit Group Name: EMPTY
cparata 0:b189540a70e2 1054 * Permission : RO
cparata 0:b189540a70e2 1055 *******************************************************************************/
cparata 0:b189540a70e2 1056 typedef enum {
cparata 0:b189540a70e2 1057 LSM303AGR_ACC_EMPTY_NOT_EMPTY =0x00,
cparata 0:b189540a70e2 1058 LSM303AGR_ACC_EMPTY_EMPTY =0x20,
cparata 0:b189540a70e2 1059 } LSM303AGR_ACC_EMPTY_t;
cparata 0:b189540a70e2 1060
cparata 0:b189540a70e2 1061 #define LSM303AGR_ACC_EMPTY_MASK 0x20
cparata 0:b189540a70e2 1062 status_t LSM303AGR_ACC_R_FifoEmpty(void *handle, LSM303AGR_ACC_EMPTY_t *value);
cparata 0:b189540a70e2 1063
cparata 0:b189540a70e2 1064 /*******************************************************************************
cparata 0:b189540a70e2 1065 * Register : FIFO_SRC_REG
cparata 0:b189540a70e2 1066 * Address : 0X2F
cparata 0:b189540a70e2 1067 * Bit Group Name: OVRN_FIFO
cparata 0:b189540a70e2 1068 * Permission : RO
cparata 0:b189540a70e2 1069 *******************************************************************************/
cparata 0:b189540a70e2 1070 typedef enum {
cparata 0:b189540a70e2 1071 LSM303AGR_ACC_OVRN_FIFO_NO_OVERRUN =0x00,
cparata 0:b189540a70e2 1072 LSM303AGR_ACC_OVRN_FIFO_OVERRUN =0x40,
cparata 0:b189540a70e2 1073 } LSM303AGR_ACC_OVRN_FIFO_t;
cparata 0:b189540a70e2 1074
cparata 0:b189540a70e2 1075 #define LSM303AGR_ACC_OVRN_FIFO_MASK 0x40
cparata 0:b189540a70e2 1076 status_t LSM303AGR_ACC_R_FifoOverrun(void *handle, LSM303AGR_ACC_OVRN_FIFO_t *value);
cparata 0:b189540a70e2 1077
cparata 0:b189540a70e2 1078 /*******************************************************************************
cparata 0:b189540a70e2 1079 * Register : FIFO_SRC_REG
cparata 0:b189540a70e2 1080 * Address : 0X2F
cparata 0:b189540a70e2 1081 * Bit Group Name: WTM
cparata 0:b189540a70e2 1082 * Permission : RO
cparata 0:b189540a70e2 1083 *******************************************************************************/
cparata 0:b189540a70e2 1084 typedef enum {
cparata 0:b189540a70e2 1085 LSM303AGR_ACC_WTM_NORMAL =0x00,
cparata 0:b189540a70e2 1086 LSM303AGR_ACC_WTM_OVERFLOW =0x80,
cparata 0:b189540a70e2 1087 } LSM303AGR_ACC_WTM_t;
cparata 0:b189540a70e2 1088
cparata 0:b189540a70e2 1089 #define LSM303AGR_ACC_WTM_MASK 0x80
cparata 0:b189540a70e2 1090 status_t LSM303AGR_ACC_R_WatermarkLevel(void *handle, LSM303AGR_ACC_WTM_t *value);
cparata 0:b189540a70e2 1091
cparata 0:b189540a70e2 1092 /*******************************************************************************
cparata 0:b189540a70e2 1093 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1094 * Address : 0X30/0x34
cparata 0:b189540a70e2 1095 * Bit Group Name: XLIE
cparata 0:b189540a70e2 1096 * Permission : RW
cparata 0:b189540a70e2 1097 *******************************************************************************/
cparata 0:b189540a70e2 1098 typedef enum {
cparata 0:b189540a70e2 1099 LSM303AGR_ACC_XLIE_DISABLED =0x00,
cparata 0:b189540a70e2 1100 LSM303AGR_ACC_XLIE_ENABLED =0x01,
cparata 0:b189540a70e2 1101 } LSM303AGR_ACC_XLIE_t;
cparata 0:b189540a70e2 1102
cparata 0:b189540a70e2 1103 #define LSM303AGR_ACC_XLIE_MASK 0x01
cparata 0:b189540a70e2 1104 status_t LSM303AGR_ACC_W_Int1EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue);
cparata 0:b189540a70e2 1105 status_t LSM303AGR_ACC_R_Int1EnXLo(void *handle, LSM303AGR_ACC_XLIE_t *value);
cparata 0:b189540a70e2 1106 status_t LSM303AGR_ACC_W_Int2EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue);
cparata 0:b189540a70e2 1107 status_t LSM303AGR_ACC_R_Int2EnXLo(void *handle, LSM303AGR_ACC_XLIE_t *value);
cparata 0:b189540a70e2 1108
cparata 0:b189540a70e2 1109 /*******************************************************************************
cparata 0:b189540a70e2 1110 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1111 * Address : 0X30/0x34
cparata 0:b189540a70e2 1112 * Bit Group Name: XHIE
cparata 0:b189540a70e2 1113 * Permission : RW
cparata 0:b189540a70e2 1114 *******************************************************************************/
cparata 0:b189540a70e2 1115 typedef enum {
cparata 0:b189540a70e2 1116 LSM303AGR_ACC_XHIE_DISABLED =0x00,
cparata 0:b189540a70e2 1117 LSM303AGR_ACC_XHIE_ENABLED =0x02,
cparata 0:b189540a70e2 1118 } LSM303AGR_ACC_XHIE_t;
cparata 0:b189540a70e2 1119
cparata 0:b189540a70e2 1120 #define LSM303AGR_ACC_XHIE_MASK 0x02
cparata 0:b189540a70e2 1121 status_t LSM303AGR_ACC_W_Int1EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue);
cparata 0:b189540a70e2 1122 status_t LSM303AGR_ACC_R_Int1EnXHi(void *handle, LSM303AGR_ACC_XHIE_t *value);
cparata 0:b189540a70e2 1123 status_t LSM303AGR_ACC_W_Int2EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue);
cparata 0:b189540a70e2 1124 status_t LSM303AGR_ACC_R_Int2EnXHi(void *handle, LSM303AGR_ACC_XHIE_t *value);
cparata 0:b189540a70e2 1125
cparata 0:b189540a70e2 1126 /*******************************************************************************
cparata 0:b189540a70e2 1127 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1128 * Address : 0X30/0x34
cparata 0:b189540a70e2 1129 * Bit Group Name: YLIE
cparata 0:b189540a70e2 1130 * Permission : RW
cparata 0:b189540a70e2 1131 *******************************************************************************/
cparata 0:b189540a70e2 1132 typedef enum {
cparata 0:b189540a70e2 1133 LSM303AGR_ACC_YLIE_DISABLED =0x00,
cparata 0:b189540a70e2 1134 LSM303AGR_ACC_YLIE_ENABLED =0x04,
cparata 0:b189540a70e2 1135 } LSM303AGR_ACC_YLIE_t;
cparata 0:b189540a70e2 1136
cparata 0:b189540a70e2 1137 #define LSM303AGR_ACC_YLIE_MASK 0x04
cparata 0:b189540a70e2 1138 status_t LSM303AGR_ACC_W_Int1EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue);
cparata 0:b189540a70e2 1139 status_t LSM303AGR_ACC_R_Int1EnYLo(void *handle, LSM303AGR_ACC_YLIE_t *value);
cparata 0:b189540a70e2 1140 status_t LSM303AGR_ACC_W_Int2EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue);
cparata 0:b189540a70e2 1141 status_t LSM303AGR_ACC_R_Int2EnYLo(void *handle, LSM303AGR_ACC_YLIE_t *value);
cparata 0:b189540a70e2 1142
cparata 0:b189540a70e2 1143 /*******************************************************************************
cparata 0:b189540a70e2 1144 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1145 * Address : 0X30/0x34
cparata 0:b189540a70e2 1146 * Bit Group Name: YHIE
cparata 0:b189540a70e2 1147 * Permission : RW
cparata 0:b189540a70e2 1148 *******************************************************************************/
cparata 0:b189540a70e2 1149 typedef enum {
cparata 0:b189540a70e2 1150 LSM303AGR_ACC_YHIE_DISABLED =0x00,
cparata 0:b189540a70e2 1151 LSM303AGR_ACC_YHIE_ENABLED =0x08,
cparata 0:b189540a70e2 1152 } LSM303AGR_ACC_YHIE_t;
cparata 0:b189540a70e2 1153
cparata 0:b189540a70e2 1154 #define LSM303AGR_ACC_YHIE_MASK 0x08
cparata 0:b189540a70e2 1155 status_t LSM303AGR_ACC_W_Int1EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue);
cparata 0:b189540a70e2 1156 status_t LSM303AGR_ACC_R_Int1EnYHi(void *handle, LSM303AGR_ACC_YHIE_t *value);
cparata 0:b189540a70e2 1157 status_t LSM303AGR_ACC_W_Int2EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue);
cparata 0:b189540a70e2 1158 status_t LSM303AGR_ACC_R_Int2EnYHi(void *handle, LSM303AGR_ACC_YHIE_t *value);
cparata 0:b189540a70e2 1159
cparata 0:b189540a70e2 1160 /*******************************************************************************
cparata 0:b189540a70e2 1161 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1162 * Address : 0X30/0x34
cparata 0:b189540a70e2 1163 * Bit Group Name: ZLIE
cparata 0:b189540a70e2 1164 * Permission : RW
cparata 0:b189540a70e2 1165 *******************************************************************************/
cparata 0:b189540a70e2 1166 typedef enum {
cparata 0:b189540a70e2 1167 LSM303AGR_ACC_ZLIE_DISABLED =0x00,
cparata 0:b189540a70e2 1168 LSM303AGR_ACC_ZLIE_ENABLED =0x10,
cparata 0:b189540a70e2 1169 } LSM303AGR_ACC_ZLIE_t;
cparata 0:b189540a70e2 1170
cparata 0:b189540a70e2 1171 #define LSM303AGR_ACC_ZLIE_MASK 0x10
cparata 0:b189540a70e2 1172 status_t LSM303AGR_ACC_W_Int1EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue);
cparata 0:b189540a70e2 1173 status_t LSM303AGR_ACC_R_Int1EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t *value);
cparata 0:b189540a70e2 1174 status_t LSM303AGR_ACC_W_Int2EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue);
cparata 0:b189540a70e2 1175 status_t LSM303AGR_ACC_R_Int2EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t *value);
cparata 0:b189540a70e2 1176
cparata 0:b189540a70e2 1177 /*******************************************************************************
cparata 0:b189540a70e2 1178 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1179 * Address : 0X30/0x34
cparata 0:b189540a70e2 1180 * Bit Group Name: ZHIE
cparata 0:b189540a70e2 1181 * Permission : RW
cparata 0:b189540a70e2 1182 *******************************************************************************/
cparata 0:b189540a70e2 1183 typedef enum {
cparata 0:b189540a70e2 1184 LSM303AGR_ACC_ZHIE_DISABLED =0x00,
cparata 0:b189540a70e2 1185 LSM303AGR_ACC_ZHIE_ENABLED =0x20,
cparata 0:b189540a70e2 1186 } LSM303AGR_ACC_ZHIE_t;
cparata 0:b189540a70e2 1187
cparata 0:b189540a70e2 1188 #define LSM303AGR_ACC_ZHIE_MASK 0x20
cparata 0:b189540a70e2 1189 status_t LSM303AGR_ACC_W_Int1EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue);
cparata 0:b189540a70e2 1190 status_t LSM303AGR_ACC_R_Int1EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t *value);
cparata 0:b189540a70e2 1191 status_t LSM303AGR_ACC_W_Int2EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue);
cparata 0:b189540a70e2 1192 status_t LSM303AGR_ACC_R_Int2EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t *value);
cparata 0:b189540a70e2 1193
cparata 0:b189540a70e2 1194 /*******************************************************************************
cparata 0:b189540a70e2 1195 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1196 * Address : 0X30/0x34
cparata 0:b189540a70e2 1197 * Bit Group Name: 6D
cparata 0:b189540a70e2 1198 * Permission : RW
cparata 0:b189540a70e2 1199 *******************************************************************************/
cparata 0:b189540a70e2 1200 typedef enum {
cparata 0:b189540a70e2 1201 LSM303AGR_ACC_6D_DISABLED =0x00,
cparata 0:b189540a70e2 1202 LSM303AGR_ACC_6D_ENABLED =0x40,
cparata 0:b189540a70e2 1203 } LSM303AGR_ACC_6D_t;
cparata 0:b189540a70e2 1204
cparata 0:b189540a70e2 1205 #define LSM303AGR_ACC_6D_MASK 0x40
cparata 0:b189540a70e2 1206 status_t LSM303AGR_ACC_W_Int1_6D(void *handle, LSM303AGR_ACC_6D_t newValue);
cparata 0:b189540a70e2 1207 status_t LSM303AGR_ACC_R_Int1_6D(void *handle, LSM303AGR_ACC_6D_t *value);
cparata 0:b189540a70e2 1208 status_t LSM303AGR_ACC_W_Int2_6D(void *handle, LSM303AGR_ACC_6D_t newValue);
cparata 0:b189540a70e2 1209 status_t LSM303AGR_ACC_R_Int2_6D(void *handle, LSM303AGR_ACC_6D_t *value);
cparata 0:b189540a70e2 1210
cparata 0:b189540a70e2 1211 /*******************************************************************************
cparata 0:b189540a70e2 1212 * Register : INT1_CFG/INT2_CFG
cparata 0:b189540a70e2 1213 * Address : 0X30/0x34
cparata 0:b189540a70e2 1214 * Bit Group Name: AOI
cparata 0:b189540a70e2 1215 * Permission : RW
cparata 0:b189540a70e2 1216 *******************************************************************************/
cparata 0:b189540a70e2 1217 typedef enum {
cparata 0:b189540a70e2 1218 LSM303AGR_ACC_AOI_OR =0x00,
cparata 0:b189540a70e2 1219 LSM303AGR_ACC_AOI_AND =0x80,
cparata 0:b189540a70e2 1220 } LSM303AGR_ACC_AOI_t;
cparata 0:b189540a70e2 1221
cparata 0:b189540a70e2 1222 #define LSM303AGR_ACC_AOI_MASK 0x80
cparata 0:b189540a70e2 1223 status_t LSM303AGR_ACC_W_Int1_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue);
cparata 0:b189540a70e2 1224 status_t LSM303AGR_ACC_R_Int1_AOI(void *handle, LSM303AGR_ACC_AOI_t *value);
cparata 0:b189540a70e2 1225 status_t LSM303AGR_ACC_W_Int2_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue);
cparata 0:b189540a70e2 1226 status_t LSM303AGR_ACC_R_Int2_AOI(void *handle, LSM303AGR_ACC_AOI_t *value);
cparata 0:b189540a70e2 1227
cparata 0:b189540a70e2 1228 /*******************************************************************************
cparata 0:b189540a70e2 1229 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1230 * Address : 0X31/0x35
cparata 0:b189540a70e2 1231 * Bit Group Name: XL
cparata 0:b189540a70e2 1232 * Permission : RO
cparata 0:b189540a70e2 1233 *******************************************************************************/
cparata 0:b189540a70e2 1234 typedef enum {
cparata 0:b189540a70e2 1235 LSM303AGR_ACC_XL_DOWN =0x00,
cparata 0:b189540a70e2 1236 LSM303AGR_ACC_XL_UP =0x01,
cparata 0:b189540a70e2 1237 } LSM303AGR_ACC_XL_t;
cparata 0:b189540a70e2 1238
cparata 0:b189540a70e2 1239 #define LSM303AGR_ACC_XL_MASK 0x01
cparata 0:b189540a70e2 1240 status_t LSM303AGR_ACC_R_Int1_Xlo(void *handle, LSM303AGR_ACC_XL_t *value);
cparata 0:b189540a70e2 1241 status_t LSM303AGR_ACC_R_Int2_Xlo(void *handle, LSM303AGR_ACC_XL_t *value);
cparata 0:b189540a70e2 1242
cparata 0:b189540a70e2 1243 /*******************************************************************************
cparata 0:b189540a70e2 1244 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1245 * Address : 0X31/0x35
cparata 0:b189540a70e2 1246 * Bit Group Name: XH
cparata 0:b189540a70e2 1247 * Permission : RO
cparata 0:b189540a70e2 1248 *******************************************************************************/
cparata 0:b189540a70e2 1249 typedef enum {
cparata 0:b189540a70e2 1250 LSM303AGR_ACC_XH_DOWN =0x00,
cparata 0:b189540a70e2 1251 LSM303AGR_ACC_XH_UP =0x02,
cparata 0:b189540a70e2 1252 } LSM303AGR_ACC_XH_t;
cparata 0:b189540a70e2 1253
cparata 0:b189540a70e2 1254 #define LSM303AGR_ACC_XH_MASK 0x02
cparata 0:b189540a70e2 1255 status_t LSM303AGR_ACC_R_Int1_XHi(void *handle, LSM303AGR_ACC_XH_t *value);
cparata 0:b189540a70e2 1256 status_t LSM303AGR_ACC_R_Int2_XHi(void *handle, LSM303AGR_ACC_XH_t *value);
cparata 0:b189540a70e2 1257
cparata 0:b189540a70e2 1258 /*******************************************************************************
cparata 0:b189540a70e2 1259 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1260 * Address : 0X31/0x35
cparata 0:b189540a70e2 1261 * Bit Group Name: YL
cparata 0:b189540a70e2 1262 * Permission : RO
cparata 0:b189540a70e2 1263 *******************************************************************************/
cparata 0:b189540a70e2 1264 typedef enum {
cparata 0:b189540a70e2 1265 LSM303AGR_ACC_YL_DOWN =0x00,
cparata 0:b189540a70e2 1266 LSM303AGR_ACC_YL_UP =0x04,
cparata 0:b189540a70e2 1267 } LSM303AGR_ACC_YL_t;
cparata 0:b189540a70e2 1268
cparata 0:b189540a70e2 1269 #define LSM303AGR_ACC_YL_MASK 0x04
cparata 0:b189540a70e2 1270 status_t LSM303AGR_ACC_R_Int1_YLo(void *handle, LSM303AGR_ACC_YL_t *value);
cparata 0:b189540a70e2 1271 status_t LSM303AGR_ACC_R_Int2_YLo(void *handle, LSM303AGR_ACC_YL_t *value);
cparata 0:b189540a70e2 1272
cparata 0:b189540a70e2 1273 /*******************************************************************************
cparata 0:b189540a70e2 1274 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1275 * Address : 0X31/0x35
cparata 0:b189540a70e2 1276 * Bit Group Name: YH
cparata 0:b189540a70e2 1277 * Permission : RO
cparata 0:b189540a70e2 1278 *******************************************************************************/
cparata 0:b189540a70e2 1279 typedef enum {
cparata 0:b189540a70e2 1280 LSM303AGR_ACC_YH_DOWN =0x00,
cparata 0:b189540a70e2 1281 LSM303AGR_ACC_YH_UP =0x08,
cparata 0:b189540a70e2 1282 } LSM303AGR_ACC_YH_t;
cparata 0:b189540a70e2 1283
cparata 0:b189540a70e2 1284 #define LSM303AGR_ACC_YH_MASK 0x08
cparata 0:b189540a70e2 1285 status_t LSM303AGR_ACC_R_Int1_YHi(void *handle, LSM303AGR_ACC_YH_t *value);
cparata 0:b189540a70e2 1286 status_t LSM303AGR_ACC_R_Int2_YHi(void *handle, LSM303AGR_ACC_YH_t *value);
cparata 0:b189540a70e2 1287
cparata 0:b189540a70e2 1288 /*******************************************************************************
cparata 0:b189540a70e2 1289 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1290 * Address : 0X31/0x35
cparata 0:b189540a70e2 1291 * Bit Group Name: ZL
cparata 0:b189540a70e2 1292 * Permission : RO
cparata 0:b189540a70e2 1293 *******************************************************************************/
cparata 0:b189540a70e2 1294 typedef enum {
cparata 0:b189540a70e2 1295 LSM303AGR_ACC_ZL_DOWN =0x00,
cparata 0:b189540a70e2 1296 LSM303AGR_ACC_ZL_UP =0x10,
cparata 0:b189540a70e2 1297 } LSM303AGR_ACC_ZL_t;
cparata 0:b189540a70e2 1298
cparata 0:b189540a70e2 1299 #define LSM303AGR_ACC_ZL_MASK 0x10
cparata 0:b189540a70e2 1300 status_t LSM303AGR_ACC_R_Int1_Zlo(void *handle, LSM303AGR_ACC_ZL_t *value);
cparata 0:b189540a70e2 1301 status_t LSM303AGR_ACC_R_Int2_Zlo(void *handle, LSM303AGR_ACC_ZL_t *value);
cparata 0:b189540a70e2 1302
cparata 0:b189540a70e2 1303 /*******************************************************************************
cparata 0:b189540a70e2 1304 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1305 * Address : 0X31/0x35
cparata 0:b189540a70e2 1306 * Bit Group Name: ZH
cparata 0:b189540a70e2 1307 * Permission : RO
cparata 0:b189540a70e2 1308 *******************************************************************************/
cparata 0:b189540a70e2 1309 typedef enum {
cparata 0:b189540a70e2 1310 LSM303AGR_ACC_ZH_DOWN =0x00,
cparata 0:b189540a70e2 1311 LSM303AGR_ACC_ZH_UP =0x20,
cparata 0:b189540a70e2 1312 } LSM303AGR_ACC_ZH_t;
cparata 0:b189540a70e2 1313
cparata 0:b189540a70e2 1314 #define LSM303AGR_ACC_ZH_MASK 0x20
cparata 0:b189540a70e2 1315 status_t LSM303AGR_ACC_R_Int1_ZHi(void *handle, LSM303AGR_ACC_ZH_t *value);
cparata 0:b189540a70e2 1316 status_t LSM303AGR_ACC_R_Int2_ZHi(void *handle, LSM303AGR_ACC_ZH_t *value);
cparata 0:b189540a70e2 1317
cparata 0:b189540a70e2 1318 /*******************************************************************************
cparata 0:b189540a70e2 1319 * Register : INT1_SOURCE/INT2_SOURCE
cparata 0:b189540a70e2 1320 * Address : 0X31/0x35
cparata 0:b189540a70e2 1321 * Bit Group Name: IA
cparata 0:b189540a70e2 1322 * Permission : RO
cparata 0:b189540a70e2 1323 *******************************************************************************/
cparata 0:b189540a70e2 1324 typedef enum {
cparata 0:b189540a70e2 1325 LSM303AGR_ACC_IA_DOWN =0x00,
cparata 0:b189540a70e2 1326 LSM303AGR_ACC_IA_UP =0x40,
cparata 0:b189540a70e2 1327 } LSM303AGR_ACC_IA_t;
cparata 0:b189540a70e2 1328
cparata 0:b189540a70e2 1329 #define LSM303AGR_ACC_IA_MASK 0x40
cparata 0:b189540a70e2 1330 status_t LSM303AGR_ACC_R_Int1_IA(void *handle, LSM303AGR_ACC_IA_t *value);
cparata 0:b189540a70e2 1331 status_t LSM303AGR_ACC_R_Int2_IA(void *handle, LSM303AGR_ACC_IA_t *value);
cparata 0:b189540a70e2 1332
cparata 0:b189540a70e2 1333 /*******************************************************************************
cparata 0:b189540a70e2 1334 * Register : INT1_THS/INT2_THS
cparata 0:b189540a70e2 1335 * Address : 0X32/0x36
cparata 0:b189540a70e2 1336 * Bit Group Name: THS
cparata 0:b189540a70e2 1337 * Permission : RW
cparata 0:b189540a70e2 1338 *******************************************************************************/
cparata 0:b189540a70e2 1339 #define LSM303AGR_ACC_THS_MASK 0x7F
cparata 0:b189540a70e2 1340 #define LSM303AGR_ACC_THS_POSITION 0
cparata 0:b189540a70e2 1341 status_t LSM303AGR_ACC_W_Int1_Threshold(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1342 status_t LSM303AGR_ACC_R_Int1_Threshold(void *handle, u8_t *value);
cparata 0:b189540a70e2 1343 status_t LSM303AGR_ACC_W_Int2_Threshold(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1344 status_t LSM303AGR_ACC_R_Int2_Threshold(void *handle, u8_t *value);
cparata 0:b189540a70e2 1345
cparata 0:b189540a70e2 1346 /*******************************************************************************
cparata 0:b189540a70e2 1347 * Register : INT1_DURATION/INT2_DURATION
cparata 0:b189540a70e2 1348 * Address : 0X33/0x37
cparata 0:b189540a70e2 1349 * Bit Group Name: D
cparata 0:b189540a70e2 1350 * Permission : RW
cparata 0:b189540a70e2 1351 *******************************************************************************/
cparata 0:b189540a70e2 1352 #define LSM303AGR_ACC_D_MASK 0x7F
cparata 0:b189540a70e2 1353 #define LSM303AGR_ACC_D_POSITION 0
cparata 0:b189540a70e2 1354 status_t LSM303AGR_ACC_W_Int1_Duration(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1355 status_t LSM303AGR_ACC_R_Int1_Duration(void *handle, u8_t *value);
cparata 0:b189540a70e2 1356 status_t LSM303AGR_ACC_W_Int2_Duration(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1357 status_t LSM303AGR_ACC_R_Int2_Duration(void *handle, u8_t *value);
cparata 0:b189540a70e2 1358
cparata 0:b189540a70e2 1359 /*******************************************************************************
cparata 0:b189540a70e2 1360 * Register : CLICK_CFG
cparata 0:b189540a70e2 1361 * Address : 0X38
cparata 0:b189540a70e2 1362 * Bit Group Name: XS
cparata 0:b189540a70e2 1363 * Permission : RW
cparata 0:b189540a70e2 1364 *******************************************************************************/
cparata 0:b189540a70e2 1365 typedef enum {
cparata 0:b189540a70e2 1366 LSM303AGR_ACC_XS_DISABLED =0x00,
cparata 0:b189540a70e2 1367 LSM303AGR_ACC_XS_ENABLED =0x01,
cparata 0:b189540a70e2 1368 } LSM303AGR_ACC_XS_t;
cparata 0:b189540a70e2 1369
cparata 0:b189540a70e2 1370 #define LSM303AGR_ACC_XS_MASK 0x01
cparata 0:b189540a70e2 1371 status_t LSM303AGR_ACC_W_XSingle(void *handle, LSM303AGR_ACC_XS_t newValue);
cparata 0:b189540a70e2 1372 status_t LSM303AGR_ACC_R_XSingle(void *handle, LSM303AGR_ACC_XS_t *value);
cparata 0:b189540a70e2 1373
cparata 0:b189540a70e2 1374 /*******************************************************************************
cparata 0:b189540a70e2 1375 * Register : CLICK_CFG
cparata 0:b189540a70e2 1376 * Address : 0X38
cparata 0:b189540a70e2 1377 * Bit Group Name: XD
cparata 0:b189540a70e2 1378 * Permission : RW
cparata 0:b189540a70e2 1379 *******************************************************************************/
cparata 0:b189540a70e2 1380 typedef enum {
cparata 0:b189540a70e2 1381 LSM303AGR_ACC_XD_DISABLED =0x00,
cparata 0:b189540a70e2 1382 LSM303AGR_ACC_XD_ENABLED =0x02,
cparata 0:b189540a70e2 1383 } LSM303AGR_ACC_XD_t;
cparata 0:b189540a70e2 1384
cparata 0:b189540a70e2 1385 #define LSM303AGR_ACC_XD_MASK 0x02
cparata 0:b189540a70e2 1386 status_t LSM303AGR_ACC_W_XDouble(void *handle, LSM303AGR_ACC_XD_t newValue);
cparata 0:b189540a70e2 1387 status_t LSM303AGR_ACC_R_XDouble(void *handle, LSM303AGR_ACC_XD_t *value);
cparata 0:b189540a70e2 1388
cparata 0:b189540a70e2 1389 /*******************************************************************************
cparata 0:b189540a70e2 1390 * Register : CLICK_CFG
cparata 0:b189540a70e2 1391 * Address : 0X38
cparata 0:b189540a70e2 1392 * Bit Group Name: YS
cparata 0:b189540a70e2 1393 * Permission : RW
cparata 0:b189540a70e2 1394 *******************************************************************************/
cparata 0:b189540a70e2 1395 typedef enum {
cparata 0:b189540a70e2 1396 LSM303AGR_ACC_YS_DISABLED =0x00,
cparata 0:b189540a70e2 1397 LSM303AGR_ACC_YS_ENABLED =0x04,
cparata 0:b189540a70e2 1398 } LSM303AGR_ACC_YS_t;
cparata 0:b189540a70e2 1399
cparata 0:b189540a70e2 1400 #define LSM303AGR_ACC_YS_MASK 0x04
cparata 0:b189540a70e2 1401 status_t LSM303AGR_ACC_W_YSingle(void *handle, LSM303AGR_ACC_YS_t newValue);
cparata 0:b189540a70e2 1402 status_t LSM303AGR_ACC_R_YSingle(void *handle, LSM303AGR_ACC_YS_t *value);
cparata 0:b189540a70e2 1403
cparata 0:b189540a70e2 1404 /*******************************************************************************
cparata 0:b189540a70e2 1405 * Register : CLICK_CFG
cparata 0:b189540a70e2 1406 * Address : 0X38
cparata 0:b189540a70e2 1407 * Bit Group Name: YD
cparata 0:b189540a70e2 1408 * Permission : RW
cparata 0:b189540a70e2 1409 *******************************************************************************/
cparata 0:b189540a70e2 1410 typedef enum {
cparata 0:b189540a70e2 1411 LSM303AGR_ACC_YD_DISABLED =0x00,
cparata 0:b189540a70e2 1412 LSM303AGR_ACC_YD_ENABLED =0x08,
cparata 0:b189540a70e2 1413 } LSM303AGR_ACC_YD_t;
cparata 0:b189540a70e2 1414
cparata 0:b189540a70e2 1415 #define LSM303AGR_ACC_YD_MASK 0x08
cparata 0:b189540a70e2 1416 status_t LSM303AGR_ACC_W_YDouble(void *handle, LSM303AGR_ACC_YD_t newValue);
cparata 0:b189540a70e2 1417 status_t LSM303AGR_ACC_R_YDouble(void *handle, LSM303AGR_ACC_YD_t *value);
cparata 0:b189540a70e2 1418
cparata 0:b189540a70e2 1419 /*******************************************************************************
cparata 0:b189540a70e2 1420 * Register : CLICK_CFG
cparata 0:b189540a70e2 1421 * Address : 0X38
cparata 0:b189540a70e2 1422 * Bit Group Name: ZS
cparata 0:b189540a70e2 1423 * Permission : RW
cparata 0:b189540a70e2 1424 *******************************************************************************/
cparata 0:b189540a70e2 1425 typedef enum {
cparata 0:b189540a70e2 1426 LSM303AGR_ACC_ZS_DISABLED =0x00,
cparata 0:b189540a70e2 1427 LSM303AGR_ACC_ZS_ENABLED =0x10,
cparata 0:b189540a70e2 1428 } LSM303AGR_ACC_ZS_t;
cparata 0:b189540a70e2 1429
cparata 0:b189540a70e2 1430 #define LSM303AGR_ACC_ZS_MASK 0x10
cparata 0:b189540a70e2 1431 status_t LSM303AGR_ACC_W_ZSingle(void *handle, LSM303AGR_ACC_ZS_t newValue);
cparata 0:b189540a70e2 1432 status_t LSM303AGR_ACC_R_ZSingle(void *handle, LSM303AGR_ACC_ZS_t *value);
cparata 0:b189540a70e2 1433
cparata 0:b189540a70e2 1434 /*******************************************************************************
cparata 0:b189540a70e2 1435 * Register : CLICK_CFG
cparata 0:b189540a70e2 1436 * Address : 0X38
cparata 0:b189540a70e2 1437 * Bit Group Name: ZD
cparata 0:b189540a70e2 1438 * Permission : RW
cparata 0:b189540a70e2 1439 *******************************************************************************/
cparata 0:b189540a70e2 1440 typedef enum {
cparata 0:b189540a70e2 1441 LSM303AGR_ACC_ZD_DISABLED =0x00,
cparata 0:b189540a70e2 1442 LSM303AGR_ACC_ZD_ENABLED =0x20,
cparata 0:b189540a70e2 1443 } LSM303AGR_ACC_ZD_t;
cparata 0:b189540a70e2 1444
cparata 0:b189540a70e2 1445 #define LSM303AGR_ACC_ZD_MASK 0x20
cparata 0:b189540a70e2 1446 status_t LSM303AGR_ACC_W_ZDouble(void *handle, LSM303AGR_ACC_ZD_t newValue);
cparata 0:b189540a70e2 1447 status_t LSM303AGR_ACC_R_ZDouble(void *handle, LSM303AGR_ACC_ZD_t *value);
cparata 0:b189540a70e2 1448
cparata 0:b189540a70e2 1449 /*******************************************************************************
cparata 0:b189540a70e2 1450 * Register : CLICK_SRC
cparata 0:b189540a70e2 1451 * Address : 0X39
cparata 0:b189540a70e2 1452 * Bit Group Name: X
cparata 0:b189540a70e2 1453 * Permission : RO
cparata 0:b189540a70e2 1454 *******************************************************************************/
cparata 0:b189540a70e2 1455 typedef enum {
cparata 0:b189540a70e2 1456 LSM303AGR_ACC_X_DOWN =0x00,
cparata 0:b189540a70e2 1457 LSM303AGR_ACC_X_UP =0x01,
cparata 0:b189540a70e2 1458 } LSM303AGR_ACC_X_t;
cparata 0:b189540a70e2 1459
cparata 0:b189540a70e2 1460 #define LSM303AGR_ACC_X_MASK 0x01
cparata 0:b189540a70e2 1461 status_t LSM303AGR_ACC_R_ClickX(void *handle, LSM303AGR_ACC_X_t *value);
cparata 0:b189540a70e2 1462
cparata 0:b189540a70e2 1463 /*******************************************************************************
cparata 0:b189540a70e2 1464 * Register : CLICK_SRC
cparata 0:b189540a70e2 1465 * Address : 0X39
cparata 0:b189540a70e2 1466 * Bit Group Name: Y
cparata 0:b189540a70e2 1467 * Permission : RO
cparata 0:b189540a70e2 1468 *******************************************************************************/
cparata 0:b189540a70e2 1469 typedef enum {
cparata 0:b189540a70e2 1470 LSM303AGR_ACC_Y_DOWN =0x00,
cparata 0:b189540a70e2 1471 LSM303AGR_ACC_Y_UP =0x02,
cparata 0:b189540a70e2 1472 } LSM303AGR_ACC_Y_t;
cparata 0:b189540a70e2 1473
cparata 0:b189540a70e2 1474 #define LSM303AGR_ACC_Y_MASK 0x02
cparata 0:b189540a70e2 1475 status_t LSM303AGR_ACC_R_ClickY(void *handle, LSM303AGR_ACC_Y_t *value);
cparata 0:b189540a70e2 1476
cparata 0:b189540a70e2 1477 /*******************************************************************************
cparata 0:b189540a70e2 1478 * Register : CLICK_SRC
cparata 0:b189540a70e2 1479 * Address : 0X39
cparata 0:b189540a70e2 1480 * Bit Group Name: Z
cparata 0:b189540a70e2 1481 * Permission : RO
cparata 0:b189540a70e2 1482 *******************************************************************************/
cparata 0:b189540a70e2 1483 typedef enum {
cparata 0:b189540a70e2 1484 LSM303AGR_ACC_Z_DOWN =0x00,
cparata 0:b189540a70e2 1485 LSM303AGR_ACC_Z_UP =0x04,
cparata 0:b189540a70e2 1486 } LSM303AGR_ACC_Z_t;
cparata 0:b189540a70e2 1487
cparata 0:b189540a70e2 1488 #define LSM303AGR_ACC_Z_MASK 0x04
cparata 0:b189540a70e2 1489 status_t LSM303AGR_ACC_R_ClickZ(void *handle, LSM303AGR_ACC_Z_t *value);
cparata 0:b189540a70e2 1490
cparata 0:b189540a70e2 1491 /*******************************************************************************
cparata 0:b189540a70e2 1492 * Register : CLICK_SRC
cparata 0:b189540a70e2 1493 * Address : 0X39
cparata 0:b189540a70e2 1494 * Bit Group Name: SIGN
cparata 0:b189540a70e2 1495 * Permission : RO
cparata 0:b189540a70e2 1496 *******************************************************************************/
cparata 0:b189540a70e2 1497 typedef enum {
cparata 0:b189540a70e2 1498 LSM303AGR_ACC_SIGN_POSITIVE =0x00,
cparata 0:b189540a70e2 1499 LSM303AGR_ACC_SIGN_NEGATIVE =0x08,
cparata 0:b189540a70e2 1500 } LSM303AGR_ACC_SIGN_t;
cparata 0:b189540a70e2 1501
cparata 0:b189540a70e2 1502 #define LSM303AGR_ACC_SIGN_MASK 0x08
cparata 0:b189540a70e2 1503 status_t LSM303AGR_ACC_R_ClickSign(void *handle, LSM303AGR_ACC_SIGN_t *value);
cparata 0:b189540a70e2 1504
cparata 0:b189540a70e2 1505 /*******************************************************************************
cparata 0:b189540a70e2 1506 * Register : CLICK_SRC
cparata 0:b189540a70e2 1507 * Address : 0X39
cparata 0:b189540a70e2 1508 * Bit Group Name: SCLICK
cparata 0:b189540a70e2 1509 * Permission : RO
cparata 0:b189540a70e2 1510 *******************************************************************************/
cparata 0:b189540a70e2 1511 typedef enum {
cparata 0:b189540a70e2 1512 LSM303AGR_ACC_SCLICK_DISABLED =0x00,
cparata 0:b189540a70e2 1513 LSM303AGR_ACC_SCLICK_ENABLED =0x10,
cparata 0:b189540a70e2 1514 } LSM303AGR_ACC_SCLICK_t;
cparata 0:b189540a70e2 1515
cparata 0:b189540a70e2 1516 #define LSM303AGR_ACC_SCLICK_MASK 0x10
cparata 0:b189540a70e2 1517 status_t LSM303AGR_ACC_R_SingleCLICK(void *handle, LSM303AGR_ACC_SCLICK_t *value);
cparata 0:b189540a70e2 1518
cparata 0:b189540a70e2 1519 /*******************************************************************************
cparata 0:b189540a70e2 1520 * Register : CLICK_SRC
cparata 0:b189540a70e2 1521 * Address : 0X39
cparata 0:b189540a70e2 1522 * Bit Group Name: DCLICK
cparata 0:b189540a70e2 1523 * Permission : RO
cparata 0:b189540a70e2 1524 *******************************************************************************/
cparata 0:b189540a70e2 1525 typedef enum {
cparata 0:b189540a70e2 1526 LSM303AGR_ACC_DCLICK_DISABLED =0x00,
cparata 0:b189540a70e2 1527 LSM303AGR_ACC_DCLICK_ENABLED =0x20,
cparata 0:b189540a70e2 1528 } LSM303AGR_ACC_DCLICK_t;
cparata 0:b189540a70e2 1529
cparata 0:b189540a70e2 1530 #define LSM303AGR_ACC_DCLICK_MASK 0x20
cparata 0:b189540a70e2 1531 status_t LSM303AGR_ACC_R_DoubleCLICK(void *handle, LSM303AGR_ACC_DCLICK_t *value);
cparata 0:b189540a70e2 1532
cparata 0:b189540a70e2 1533 /*******************************************************************************
cparata 0:b189540a70e2 1534 * Register : CLICK_SRC
cparata 0:b189540a70e2 1535 * Address : 0X39
cparata 0:b189540a70e2 1536 * Bit Group Name: IA
cparata 0:b189540a70e2 1537 * Permission : RO
cparata 0:b189540a70e2 1538 *******************************************************************************/
cparata 0:b189540a70e2 1539 typedef enum {
cparata 0:b189540a70e2 1540 LSM303AGR_ACC_CLICK_IA_DOWN =0x00,
cparata 0:b189540a70e2 1541 LSM303AGR_ACC_CLICK_IA_UP =0x40,
cparata 0:b189540a70e2 1542 } LSM303AGR_ACC_CLICK_IA_t;
cparata 0:b189540a70e2 1543
cparata 0:b189540a70e2 1544 #define LSM303AGR_ACC_IA_MASK 0x40
cparata 0:b189540a70e2 1545 status_t LSM303AGR_ACC_R_CLICK_IA(void *handle, LSM303AGR_ACC_CLICK_IA_t *value);
cparata 0:b189540a70e2 1546
cparata 0:b189540a70e2 1547 /*******************************************************************************
cparata 0:b189540a70e2 1548 * Register : CLICK_THS
cparata 0:b189540a70e2 1549 * Address : 0X3A
cparata 0:b189540a70e2 1550 * Bit Group Name: THS
cparata 0:b189540a70e2 1551 * Permission : RW
cparata 0:b189540a70e2 1552 *******************************************************************************/
cparata 0:b189540a70e2 1553 #define LSM303AGR_ACC_THS_MASK 0x7F
cparata 0:b189540a70e2 1554 #define LSM303AGR_ACC_THS_POSITION 0
cparata 0:b189540a70e2 1555 status_t LSM303AGR_ACC_W_ClickThreshold(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1556 status_t LSM303AGR_ACC_R_ClickThreshold(void *handle, u8_t *value);
cparata 0:b189540a70e2 1557
cparata 0:b189540a70e2 1558 /*******************************************************************************
cparata 0:b189540a70e2 1559 * Register : TIME_LIMIT
cparata 0:b189540a70e2 1560 * Address : 0X3B
cparata 0:b189540a70e2 1561 * Bit Group Name: TLI
cparata 0:b189540a70e2 1562 * Permission : RW
cparata 0:b189540a70e2 1563 *******************************************************************************/
cparata 0:b189540a70e2 1564 #define LSM303AGR_ACC_TLI_MASK 0x7F
cparata 0:b189540a70e2 1565 #define LSM303AGR_ACC_TLI_POSITION 0
cparata 0:b189540a70e2 1566 status_t LSM303AGR_ACC_W_ClickTimeLimit(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1567 status_t LSM303AGR_ACC_R_ClickTimeLimit(void *handle, u8_t *value);
cparata 0:b189540a70e2 1568
cparata 0:b189540a70e2 1569 /*******************************************************************************
cparata 0:b189540a70e2 1570 * Register : TIME_LATENCY
cparata 0:b189540a70e2 1571 * Address : 0X3C
cparata 0:b189540a70e2 1572 * Bit Group Name: TLA
cparata 0:b189540a70e2 1573 * Permission : RW
cparata 0:b189540a70e2 1574 *******************************************************************************/
cparata 0:b189540a70e2 1575 #define LSM303AGR_ACC_TLA_MASK 0xFF
cparata 0:b189540a70e2 1576 #define LSM303AGR_ACC_TLA_POSITION 0
cparata 0:b189540a70e2 1577 status_t LSM303AGR_ACC_W_ClickTimeLatency(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1578 status_t LSM303AGR_ACC_R_ClickTimeLatency(void *handle, u8_t *value);
cparata 0:b189540a70e2 1579
cparata 0:b189540a70e2 1580 /*******************************************************************************
cparata 0:b189540a70e2 1581 * Register : TIME_WINDOW
cparata 0:b189540a70e2 1582 * Address : 0X3D
cparata 0:b189540a70e2 1583 * Bit Group Name: TW
cparata 0:b189540a70e2 1584 * Permission : RW
cparata 0:b189540a70e2 1585 *******************************************************************************/
cparata 0:b189540a70e2 1586 #define LSM303AGR_ACC_TW_MASK 0xFF
cparata 0:b189540a70e2 1587 #define LSM303AGR_ACC_TW_POSITION 0
cparata 0:b189540a70e2 1588 status_t LSM303AGR_ACC_W_ClickTimeWindow(void *handle, u8_t newValue);
cparata 0:b189540a70e2 1589 status_t LSM303AGR_ACC_R_ClickTimeWindow(void *handle, u8_t *value);
cparata 0:b189540a70e2 1590 /*******************************************************************************
cparata 0:b189540a70e2 1591 * Register : <REGISTER_L> - <REGISTER_H>
cparata 0:b189540a70e2 1592 * Output Type : Voltage_ADC
cparata 0:b189540a70e2 1593 * Permission : RO
cparata 0:b189540a70e2 1594 *******************************************************************************/
cparata 0:b189540a70e2 1595 status_t LSM303AGR_ACC_Get_Voltage_ADC(void *handle, u8_t *buff);
cparata 0:b189540a70e2 1596 /*******************************************************************************
cparata 0:b189540a70e2 1597 * Register : <REGISTER_L> - <REGISTER_H>
cparata 0:b189540a70e2 1598 * Output Type : Acceleration
cparata 0:b189540a70e2 1599 * Permission : RO
cparata 0:b189540a70e2 1600 *******************************************************************************/
cparata 0:b189540a70e2 1601 status_t LSM303AGR_ACC_Get_Raw_Acceleration(void *handle, u8_t *buff);
cparata 0:b189540a70e2 1602 status_t LSM303AGR_ACC_Get_Acceleration(void *handle, int *buff);
cparata 0:b189540a70e2 1603
cparata 0:b189540a70e2 1604 #ifdef __cplusplus
cparata 0:b189540a70e2 1605 }
cparata 0:b189540a70e2 1606 #endif
cparata 0:b189540a70e2 1607
cparata 0:b189540a70e2 1608 #endif