LSM6DSOX - iNEMO inertial module: 3D accelerometer and 3D gy…

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iNEMO inertial module: 3D accelerometer and 3D gyroscope.

Dependencies: X_NUCLEO_COMMON ST_INTERFACES

lsm6dsox_reg.h@5:97fea56292cd, 2021-04-15 (annotated)

Committer:: cparata
Date:: Thu Apr 15 16:16:36 2021 +0000
Revision:: 5:97fea56292cd
Parent:: 4:88054adaed8d

Fix issue on INT2 events

Who changed what in which revision?

User	Revision	Line number	New contents of line
cparata	0:f27ce43dee4f	1	/*
cparata	0:f27ce43dee4f	2	******************************************************************************
cparata	0:f27ce43dee4f	3	* @file lsm6dsox_reg.h
cparata	1:fe40aec6e97a	4	* @author Sensors Software Solution Team
cparata	0:f27ce43dee4f	5	* @brief This file contains all the functions prototypes for the
cparata	0:f27ce43dee4f	6	* lsm6dsox_reg.c driver.
cparata	0:f27ce43dee4f	7	******************************************************************************
cparata	0:f27ce43dee4f	8	* @attention
cparata	0:f27ce43dee4f	9	*
cparata	0:f27ce43dee4f	10	* <h2><center>© Copyright (c) 2019 STMicroelectronics.
cparata	0:f27ce43dee4f	11	* All rights reserved.</center></h2>
cparata	0:f27ce43dee4f	12	*
cparata	0:f27ce43dee4f	13	* This software component is licensed by ST under BSD 3-Clause license,
cparata	0:f27ce43dee4f	14	* the "License"; You may not use this file except in compliance with the
cparata	0:f27ce43dee4f	15	* License. You may obtain a copy of the License at:
cparata	0:f27ce43dee4f	16	* opensource.org/licenses/BSD-3-Clause
cparata	0:f27ce43dee4f	17	*
cparata	0:f27ce43dee4f	18	******************************************************************************
cparata	0:f27ce43dee4f	19	*/
cparata	0:f27ce43dee4f	20
cparata	0:f27ce43dee4f	21	/* Define to prevent recursive inclusion -------------------------------------*/
cparata	1:fe40aec6e97a	22	#ifndef LSM6DSOX_REGS_H
cparata	1:fe40aec6e97a	23	#define LSM6DSOX_REGS_H
cparata	0:f27ce43dee4f	24
cparata	0:f27ce43dee4f	25	#ifdef __cplusplus
cparata	0:f27ce43dee4f	26	extern "C" {
cparata	0:f27ce43dee4f	27	#endif
cparata	0:f27ce43dee4f	28
cparata	0:f27ce43dee4f	29	/* Includes ------------------------------------------------------------------*/
cparata	0:f27ce43dee4f	30	#include <stdint.h>
cparata	1:fe40aec6e97a	31	#include <stddef.h>
cparata	0:f27ce43dee4f	32	#include <math.h>
cparata	0:f27ce43dee4f	33
cparata	0:f27ce43dee4f	34	/** @addtogroup LSM6DSOX
cparata	0:f27ce43dee4f	35	* @{
cparata	0:f27ce43dee4f	36	*
cparata	0:f27ce43dee4f	37	*/
cparata	0:f27ce43dee4f	38
cparata	1:fe40aec6e97a	39	/** @defgroup STMicroelectronics sensors common types
cparata	0:f27ce43dee4f	40	* @{
cparata	0:f27ce43dee4f	41	*
cparata	0:f27ce43dee4f	42	*/
cparata	0:f27ce43dee4f	43
cparata	0:f27ce43dee4f	44	#ifndef MEMS_SHARED_TYPES
cparata	0:f27ce43dee4f	45	#define MEMS_SHARED_TYPES
cparata	0:f27ce43dee4f	46
cparata	0:f27ce43dee4f	47	/**
cparata	0:f27ce43dee4f	48	* @defgroup axisXbitXX_t
cparata	0:f27ce43dee4f	49	* @brief These unions are useful to represent different sensors data type.
cparata	0:f27ce43dee4f	50	* These unions are not need by the driver.
cparata	0:f27ce43dee4f	51	*
cparata	0:f27ce43dee4f	52	* REMOVING the unions you are compliant with:
cparata	0:f27ce43dee4f	53	* MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata	0:f27ce43dee4f	54	*
cparata	0:f27ce43dee4f	55	* @{
cparata	0:f27ce43dee4f	56	*
cparata	0:f27ce43dee4f	57	*/
cparata	0:f27ce43dee4f	58
cparata	1:fe40aec6e97a	59	typedef union {
cparata	1:fe40aec6e97a	60	int16_t i16bit[3];
cparata	1:fe40aec6e97a	61	uint8_t u8bit[6];
cparata	0:f27ce43dee4f	62	} axis3bit16_t;
cparata	0:f27ce43dee4f	63
cparata	1:fe40aec6e97a	64	typedef union {
cparata	1:fe40aec6e97a	65	int16_t i16bit;
cparata	1:fe40aec6e97a	66	uint8_t u8bit[2];
cparata	0:f27ce43dee4f	67	} axis1bit16_t;
cparata	0:f27ce43dee4f	68
cparata	1:fe40aec6e97a	69	typedef union {
cparata	1:fe40aec6e97a	70	int32_t i32bit[3];
cparata	1:fe40aec6e97a	71	uint8_t u8bit[12];
cparata	0:f27ce43dee4f	72	} axis3bit32_t;
cparata	0:f27ce43dee4f	73
cparata	1:fe40aec6e97a	74	typedef union {
cparata	1:fe40aec6e97a	75	int32_t i32bit;
cparata	1:fe40aec6e97a	76	uint8_t u8bit[4];
cparata	0:f27ce43dee4f	77	} axis1bit32_t;
cparata	0:f27ce43dee4f	78
cparata	0:f27ce43dee4f	79	/**
cparata	0:f27ce43dee4f	80	* @}
cparata	0:f27ce43dee4f	81	*
cparata	0:f27ce43dee4f	82	*/
cparata	0:f27ce43dee4f	83
cparata	1:fe40aec6e97a	84	typedef struct {
cparata	1:fe40aec6e97a	85	uint8_t bit0 : 1;
cparata	1:fe40aec6e97a	86	uint8_t bit1 : 1;
cparata	1:fe40aec6e97a	87	uint8_t bit2 : 1;
cparata	1:fe40aec6e97a	88	uint8_t bit3 : 1;
cparata	1:fe40aec6e97a	89	uint8_t bit4 : 1;
cparata	1:fe40aec6e97a	90	uint8_t bit5 : 1;
cparata	1:fe40aec6e97a	91	uint8_t bit6 : 1;
cparata	1:fe40aec6e97a	92	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	93	} bitwise_t;
cparata	0:f27ce43dee4f	94
cparata	0:f27ce43dee4f	95	#define PROPERTY_DISABLE (0U)
cparata	0:f27ce43dee4f	96	#define PROPERTY_ENABLE (1U)
cparata	0:f27ce43dee4f	97
cparata	0:f27ce43dee4f	98	#endif /* MEMS_SHARED_TYPES */
cparata	0:f27ce43dee4f	99
cparata	1:fe40aec6e97a	100	#ifndef MEMS_UCF_SHARED_TYPES
cparata	1:fe40aec6e97a	101	#define MEMS_UCF_SHARED_TYPES
cparata	1:fe40aec6e97a	102
cparata	1:fe40aec6e97a	103	/** @defgroup Generic address-data structure definition
cparata	1:fe40aec6e97a	104	* @brief This structure is useful to load a predefined configuration
cparata	1:fe40aec6e97a	105	* of a sensor.
cparata	1:fe40aec6e97a	106	* You can create a sensor configuration by your own or using
cparata	1:fe40aec6e97a	107	* Unico / Unicleo tools available on STMicroelectronics
cparata	1:fe40aec6e97a	108	* web site.
cparata	1:fe40aec6e97a	109	*
cparata	1:fe40aec6e97a	110	* @{
cparata	1:fe40aec6e97a	111	*
cparata	1:fe40aec6e97a	112	*/
cparata	1:fe40aec6e97a	113
cparata	1:fe40aec6e97a	114	typedef struct {
cparata	1:fe40aec6e97a	115	uint8_t address;
cparata	1:fe40aec6e97a	116	uint8_t data;
cparata	1:fe40aec6e97a	117	} ucf_line_t;
cparata	1:fe40aec6e97a	118
cparata	1:fe40aec6e97a	119	/**
cparata	1:fe40aec6e97a	120	* @}
cparata	1:fe40aec6e97a	121	*
cparata	1:fe40aec6e97a	122	*/
cparata	1:fe40aec6e97a	123
cparata	1:fe40aec6e97a	124	#endif /* MEMS_UCF_SHARED_TYPES */
cparata	1:fe40aec6e97a	125
cparata	0:f27ce43dee4f	126	/**
cparata	0:f27ce43dee4f	127	* @}
cparata	0:f27ce43dee4f	128	*
cparata	0:f27ce43dee4f	129	*/
cparata	0:f27ce43dee4f	130
cparata	0:f27ce43dee4f	131	/** @addtogroup LSM6DSOX_Interfaces_Functions
cparata	0:f27ce43dee4f	132	* @brief This section provide a set of functions used to read and
cparata	0:f27ce43dee4f	133	* write a generic register of the device.
cparata	0:f27ce43dee4f	134	* MANDATORY: return 0 -> no Error.
cparata	0:f27ce43dee4f	135	* @{
cparata	0:f27ce43dee4f	136	*
cparata	0:f27ce43dee4f	137	*/
cparata	0:f27ce43dee4f	138
cparata	1:fe40aec6e97a	139	typedef int32_t (lsm6dsox_write_ptr)(void , uint8_t, uint8_t *, uint16_t);
cparata	1:fe40aec6e97a	140	typedef int32_t (lsm6dsox_read_ptr)(void , uint8_t, uint8_t *, uint16_t);
cparata	0:f27ce43dee4f	141
cparata	0:f27ce43dee4f	142	typedef struct {
cparata	1:fe40aec6e97a	143	/ Component mandatory fields /
cparata	1:fe40aec6e97a	144	lsm6dsox_write_ptr write_reg;
cparata	1:fe40aec6e97a	145	lsm6dsox_read_ptr read_reg;
cparata	1:fe40aec6e97a	146	/ Customizable optional pointer /
cparata	1:fe40aec6e97a	147	void *handle;
cparata	0:f27ce43dee4f	148	} lsm6dsox_ctx_t;
cparata	0:f27ce43dee4f	149
cparata	0:f27ce43dee4f	150	/**
cparata	0:f27ce43dee4f	151	* @}
cparata	0:f27ce43dee4f	152	*
cparata	0:f27ce43dee4f	153	*/
cparata	0:f27ce43dee4f	154
cparata	0:f27ce43dee4f	155	/** @defgroup LSM6DSOX_Infos
cparata	0:f27ce43dee4f	156	* @{
cparata	0:f27ce43dee4f	157	*
cparata	0:f27ce43dee4f	158	*/
cparata	0:f27ce43dee4f	159
cparata	0:f27ce43dee4f	160	/ I2C Device Address 8 bit format if SA0=0 -> D5 if SA0=1 -> D7 /
cparata	1:fe40aec6e97a	161	#define LSM6DSOX_I2C_ADD_L 0xD5U
cparata	1:fe40aec6e97a	162	#define LSM6DSOX_I2C_ADD_H 0xD7U
cparata	0:f27ce43dee4f	163
cparata	0:f27ce43dee4f	164	/ Device Identification (Who am I) /
cparata	1:fe40aec6e97a	165	#define LSM6DSOX_ID 0x6CU
cparata	0:f27ce43dee4f	166
cparata	0:f27ce43dee4f	167	/**
cparata	0:f27ce43dee4f	168	* @}
cparata	0:f27ce43dee4f	169	*
cparata	0:f27ce43dee4f	170	*/
cparata	0:f27ce43dee4f	171
cparata	0:f27ce43dee4f	172	#define LSM6DSOX_FUNC_CFG_ACCESS 0x01U
cparata	0:f27ce43dee4f	173	typedef struct {
cparata	0:f27ce43dee4f	174	uint8_t ois_ctrl_from_ui : 1;
cparata	0:f27ce43dee4f	175	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	176	uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */
cparata	0:f27ce43dee4f	177	} lsm6dsox_func_cfg_access_t;
cparata	0:f27ce43dee4f	178
cparata	0:f27ce43dee4f	179	#define LSM6DSOX_PIN_CTRL 0x02U
cparata	0:f27ce43dee4f	180	typedef struct {
cparata	0:f27ce43dee4f	181	uint8_t not_used_01 : 6;
cparata	0:f27ce43dee4f	182	uint8_t sdo_pu_en : 1;
cparata	0:f27ce43dee4f	183	uint8_t ois_pu_dis : 1;
cparata	0:f27ce43dee4f	184	} lsm6dsox_pin_ctrl_t;
cparata	0:f27ce43dee4f	185
cparata	0:f27ce43dee4f	186	#define LSM6DSOX_S4S_TPH_L 0x04U
cparata	0:f27ce43dee4f	187	typedef struct {
cparata	0:f27ce43dee4f	188	uint8_t tph_l : 7;
cparata	0:f27ce43dee4f	189	uint8_t tph_h_sel : 1;
cparata	0:f27ce43dee4f	190	} lsm6dsox_s4s_tph_l_t;
cparata	0:f27ce43dee4f	191
cparata	0:f27ce43dee4f	192	#define LSM6DSOX_S4S_TPH_H 0x05U
cparata	0:f27ce43dee4f	193	typedef struct {
cparata	0:f27ce43dee4f	194	uint8_t tph_h : 8;
cparata	0:f27ce43dee4f	195	} lsm6dsox_s4s_tph_h_t;
cparata	0:f27ce43dee4f	196
cparata	0:f27ce43dee4f	197	#define LSM6DSOX_S4S_RR 0x06U
cparata	0:f27ce43dee4f	198	typedef struct {
cparata	0:f27ce43dee4f	199	uint8_t rr : 2;
cparata	0:f27ce43dee4f	200	uint8_t not_used_01 : 6;
cparata	0:f27ce43dee4f	201	} lsm6dsox_s4s_rr_t;
cparata	0:f27ce43dee4f	202
cparata	0:f27ce43dee4f	203	#define LSM6DSOX_FIFO_CTRL1 0x07U
cparata	0:f27ce43dee4f	204	typedef struct {
cparata	0:f27ce43dee4f	205	uint8_t wtm : 8;
cparata	0:f27ce43dee4f	206	} lsm6dsox_fifo_ctrl1_t;
cparata	0:f27ce43dee4f	207
cparata	0:f27ce43dee4f	208	#define LSM6DSOX_FIFO_CTRL2 0x08U
cparata	0:f27ce43dee4f	209	typedef struct {
cparata	0:f27ce43dee4f	210	uint8_t wtm : 1;
cparata	0:f27ce43dee4f	211	uint8_t uncoptr_rate : 2;
cparata	0:f27ce43dee4f	212	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	213	uint8_t odrchg_en : 1;
cparata	0:f27ce43dee4f	214	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	215	uint8_t fifo_compr_rt_en : 1;
cparata	0:f27ce43dee4f	216	uint8_t stop_on_wtm : 1;
cparata	0:f27ce43dee4f	217	} lsm6dsox_fifo_ctrl2_t;
cparata	0:f27ce43dee4f	218
cparata	0:f27ce43dee4f	219	#define LSM6DSOX_FIFO_CTRL3 0x09U
cparata	0:f27ce43dee4f	220	typedef struct {
cparata	0:f27ce43dee4f	221	uint8_t bdr_xl : 4;
cparata	0:f27ce43dee4f	222	uint8_t bdr_gy : 4;
cparata	0:f27ce43dee4f	223	} lsm6dsox_fifo_ctrl3_t;
cparata	0:f27ce43dee4f	224
cparata	0:f27ce43dee4f	225	#define LSM6DSOX_FIFO_CTRL4 0x0AU
cparata	0:f27ce43dee4f	226	typedef struct {
cparata	0:f27ce43dee4f	227	uint8_t fifo_mode : 3;
cparata	0:f27ce43dee4f	228	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	229	uint8_t odr_t_batch : 2;
cparata	0:f27ce43dee4f	230	uint8_t odr_ts_batch : 2;
cparata	0:f27ce43dee4f	231	} lsm6dsox_fifo_ctrl4_t;
cparata	0:f27ce43dee4f	232
cparata	0:f27ce43dee4f	233	#define LSM6DSOX_COUNTER_BDR_REG1 0x0BU
cparata	0:f27ce43dee4f	234	typedef struct {
cparata	0:f27ce43dee4f	235	uint8_t cnt_bdr_th : 3;
cparata	0:f27ce43dee4f	236	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	237	uint8_t trig_counter_bdr : 1;
cparata	0:f27ce43dee4f	238	uint8_t rst_counter_bdr : 1;
cparata	0:f27ce43dee4f	239	uint8_t dataready_pulsed : 1;
cparata	0:f27ce43dee4f	240	} lsm6dsox_counter_bdr_reg1_t;
cparata	0:f27ce43dee4f	241
cparata	0:f27ce43dee4f	242	#define LSM6DSOX_COUNTER_BDR_REG2 0x0CU
cparata	0:f27ce43dee4f	243	typedef struct {
cparata	0:f27ce43dee4f	244	uint8_t cnt_bdr_th : 8;
cparata	0:f27ce43dee4f	245	} lsm6dsox_counter_bdr_reg2_t;
cparata	0:f27ce43dee4f	246
cparata	0:f27ce43dee4f	247	#define LSM6DSOX_INT1_CTRL 0x0D
cparata	0:f27ce43dee4f	248	typedef struct {
cparata	0:f27ce43dee4f	249	uint8_t int1_drdy_xl : 1;
cparata	0:f27ce43dee4f	250	uint8_t int1_drdy_g : 1;
cparata	0:f27ce43dee4f	251	uint8_t int1_boot : 1;
cparata	0:f27ce43dee4f	252	uint8_t int1_fifo_th : 1;
cparata	0:f27ce43dee4f	253	uint8_t int1_fifo_ovr : 1;
cparata	0:f27ce43dee4f	254	uint8_t int1_fifo_full : 1;
cparata	0:f27ce43dee4f	255	uint8_t int1_cnt_bdr : 1;
cparata	0:f27ce43dee4f	256	uint8_t den_drdy_flag : 1;
cparata	0:f27ce43dee4f	257	} lsm6dsox_int1_ctrl_t;
cparata	0:f27ce43dee4f	258
cparata	0:f27ce43dee4f	259	#define LSM6DSOX_INT2_CTRL 0x0EU
cparata	0:f27ce43dee4f	260	typedef struct {
cparata	0:f27ce43dee4f	261	uint8_t int2_drdy_xl : 1;
cparata	0:f27ce43dee4f	262	uint8_t int2_drdy_g : 1;
cparata	0:f27ce43dee4f	263	uint8_t int2_drdy_temp : 1;
cparata	0:f27ce43dee4f	264	uint8_t int2_fifo_th : 1;
cparata	0:f27ce43dee4f	265	uint8_t int2_fifo_ovr : 1;
cparata	0:f27ce43dee4f	266	uint8_t int2_fifo_full : 1;
cparata	0:f27ce43dee4f	267	uint8_t int2_cnt_bdr : 1;
cparata	0:f27ce43dee4f	268	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	269	} lsm6dsox_int2_ctrl_t;
cparata	0:f27ce43dee4f	270
cparata	0:f27ce43dee4f	271	#define LSM6DSOX_WHO_AM_I 0x0FU
cparata	0:f27ce43dee4f	272	#define LSM6DSOX_CTRL1_XL 0x10U
cparata	0:f27ce43dee4f	273	typedef struct {
cparata	0:f27ce43dee4f	274	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	275	uint8_t lpf2_xl_en : 1;
cparata	0:f27ce43dee4f	276	uint8_t fs_xl : 2;
cparata	0:f27ce43dee4f	277	uint8_t odr_xl : 4;
cparata	0:f27ce43dee4f	278	} lsm6dsox_ctrl1_xl_t;
cparata	0:f27ce43dee4f	279
cparata	0:f27ce43dee4f	280	#define LSM6DSOX_CTRL2_G 0x11U
cparata	0:f27ce43dee4f	281	typedef struct {
cparata	0:f27ce43dee4f	282	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	283	uint8_t fs_g : 3; /* fs_125 + fs_g */
cparata	0:f27ce43dee4f	284	uint8_t odr_g : 4;
cparata	0:f27ce43dee4f	285	} lsm6dsox_ctrl2_g_t;
cparata	0:f27ce43dee4f	286
cparata	0:f27ce43dee4f	287	#define LSM6DSOX_CTRL3_C 0x12U
cparata	0:f27ce43dee4f	288	typedef struct {
cparata	0:f27ce43dee4f	289	uint8_t sw_reset : 1;
cparata	0:f27ce43dee4f	290	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	291	uint8_t if_inc : 1;
cparata	0:f27ce43dee4f	292	uint8_t sim : 1;
cparata	0:f27ce43dee4f	293	uint8_t pp_od : 1;
cparata	0:f27ce43dee4f	294	uint8_t h_lactive : 1;
cparata	0:f27ce43dee4f	295	uint8_t bdu : 1;
cparata	0:f27ce43dee4f	296	uint8_t boot : 1;
cparata	0:f27ce43dee4f	297	} lsm6dsox_ctrl3_c_t;
cparata	0:f27ce43dee4f	298
cparata	0:f27ce43dee4f	299	#define LSM6DSOX_CTRL4_C 0x13U
cparata	0:f27ce43dee4f	300	typedef struct {
cparata	0:f27ce43dee4f	301	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	302	uint8_t lpf1_sel_g : 1;
cparata	0:f27ce43dee4f	303	uint8_t i2c_disable : 1;
cparata	0:f27ce43dee4f	304	uint8_t drdy_mask : 1;
cparata	0:f27ce43dee4f	305	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	306	uint8_t int2_on_int1 : 1;
cparata	0:f27ce43dee4f	307	uint8_t sleep_g : 1;
cparata	0:f27ce43dee4f	308	uint8_t not_used_03 : 1;
cparata	0:f27ce43dee4f	309	} lsm6dsox_ctrl4_c_t;
cparata	0:f27ce43dee4f	310
cparata	0:f27ce43dee4f	311	#define LSM6DSOX_CTRL5_C 0x14U
cparata	0:f27ce43dee4f	312	typedef struct {
cparata	0:f27ce43dee4f	313	uint8_t st_xl : 2;
cparata	0:f27ce43dee4f	314	uint8_t st_g : 2;
cparata	0:f27ce43dee4f	315	uint8_t rounding_status : 1;
cparata	0:f27ce43dee4f	316	uint8_t rounding : 2;
cparata	0:f27ce43dee4f	317	uint8_t xl_ulp_en : 1;
cparata	0:f27ce43dee4f	318	} lsm6dsox_ctrl5_c_t;
cparata	0:f27ce43dee4f	319
cparata	0:f27ce43dee4f	320	#define LSM6DSOX_CTRL6_C 0x15U
cparata	0:f27ce43dee4f	321	typedef struct {
cparata	0:f27ce43dee4f	322	uint8_t ftype : 3;
cparata	0:f27ce43dee4f	323	uint8_t usr_off_w : 1;
cparata	0:f27ce43dee4f	324	uint8_t xl_hm_mode : 1;
cparata	0:f27ce43dee4f	325	uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */
cparata	0:f27ce43dee4f	326	} lsm6dsox_ctrl6_c_t;
cparata	0:f27ce43dee4f	327
cparata	0:f27ce43dee4f	328	#define LSM6DSOX_CTRL7_G 0x16U
cparata	0:f27ce43dee4f	329	typedef struct {
cparata	0:f27ce43dee4f	330	uint8_t ois_on : 1;
cparata	0:f27ce43dee4f	331	uint8_t usr_off_on_out : 1;
cparata	0:f27ce43dee4f	332	uint8_t ois_on_en : 1;
cparata	0:f27ce43dee4f	333	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	334	uint8_t hpm_g : 2;
cparata	0:f27ce43dee4f	335	uint8_t hp_en_g : 1;
cparata	0:f27ce43dee4f	336	uint8_t g_hm_mode : 1;
cparata	0:f27ce43dee4f	337	} lsm6dsox_ctrl7_g_t;
cparata	0:f27ce43dee4f	338
cparata	0:f27ce43dee4f	339	#define LSM6DSOX_CTRL8_XL 0x17U
cparata	0:f27ce43dee4f	340	typedef struct {
cparata	0:f27ce43dee4f	341	uint8_t low_pass_on_6d : 1;
cparata	0:f27ce43dee4f	342	uint8_t xl_fs_mode : 1;
cparata	0:f27ce43dee4f	343	uint8_t hp_slope_xl_en : 1;
cparata	0:f27ce43dee4f	344	uint8_t fastsettl_mode_xl : 1;
cparata	0:f27ce43dee4f	345	uint8_t hp_ref_mode_xl : 1;
cparata	0:f27ce43dee4f	346	uint8_t hpcf_xl : 3;
cparata	0:f27ce43dee4f	347	} lsm6dsox_ctrl8_xl_t;
cparata	0:f27ce43dee4f	348
cparata	0:f27ce43dee4f	349	#define LSM6DSOX_CTRL9_XL 0x18U
cparata	0:f27ce43dee4f	350	typedef struct {
cparata	0:f27ce43dee4f	351	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	352	uint8_t i3c_disable : 1;
cparata	0:f27ce43dee4f	353	uint8_t den_lh : 1;
cparata	0:f27ce43dee4f	354	uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
cparata	0:f27ce43dee4f	355	uint8_t den_z : 1;
cparata	0:f27ce43dee4f	356	uint8_t den_y : 1;
cparata	0:f27ce43dee4f	357	uint8_t den_x : 1;
cparata	0:f27ce43dee4f	358	} lsm6dsox_ctrl9_xl_t;
cparata	0:f27ce43dee4f	359
cparata	0:f27ce43dee4f	360	#define LSM6DSOX_CTRL10_C 0x19U
cparata	0:f27ce43dee4f	361	typedef struct {
cparata	0:f27ce43dee4f	362	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	363	uint8_t timestamp_en : 1;
cparata	0:f27ce43dee4f	364	uint8_t not_used_02 : 2;
cparata	0:f27ce43dee4f	365	} lsm6dsox_ctrl10_c_t;
cparata	0:f27ce43dee4f	366
cparata	0:f27ce43dee4f	367	#define LSM6DSOX_ALL_INT_SRC 0x1AU
cparata	0:f27ce43dee4f	368	typedef struct {
cparata	0:f27ce43dee4f	369	uint8_t ff_ia : 1;
cparata	0:f27ce43dee4f	370	uint8_t wu_ia : 1;
cparata	0:f27ce43dee4f	371	uint8_t single_tap : 1;
cparata	0:f27ce43dee4f	372	uint8_t double_tap : 1;
cparata	0:f27ce43dee4f	373	uint8_t d6d_ia : 1;
cparata	0:f27ce43dee4f	374	uint8_t sleep_change_ia : 1;
cparata	0:f27ce43dee4f	375	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	376	uint8_t timestamp_endcount : 1;
cparata	0:f27ce43dee4f	377	} lsm6dsox_all_int_src_t;
cparata	0:f27ce43dee4f	378
cparata	0:f27ce43dee4f	379	#define LSM6DSOX_WAKE_UP_SRC 0x1BU
cparata	0:f27ce43dee4f	380	typedef struct {
cparata	0:f27ce43dee4f	381	uint8_t z_wu : 1;
cparata	0:f27ce43dee4f	382	uint8_t y_wu : 1;
cparata	0:f27ce43dee4f	383	uint8_t x_wu : 1;
cparata	0:f27ce43dee4f	384	uint8_t wu_ia : 1;
cparata	0:f27ce43dee4f	385	uint8_t sleep_state : 1;
cparata	0:f27ce43dee4f	386	uint8_t ff_ia : 1;
cparata	0:f27ce43dee4f	387	uint8_t sleep_change_ia : 2;
cparata	0:f27ce43dee4f	388	} lsm6dsox_wake_up_src_t;
cparata	0:f27ce43dee4f	389
cparata	0:f27ce43dee4f	390	#define LSM6DSOX_TAP_SRC 0x1CU
cparata	0:f27ce43dee4f	391	typedef struct {
cparata	0:f27ce43dee4f	392	uint8_t z_tap : 1;
cparata	0:f27ce43dee4f	393	uint8_t y_tap : 1;
cparata	0:f27ce43dee4f	394	uint8_t x_tap : 1;
cparata	0:f27ce43dee4f	395	uint8_t tap_sign : 1;
cparata	0:f27ce43dee4f	396	uint8_t double_tap : 1;
cparata	0:f27ce43dee4f	397	uint8_t single_tap : 1;
cparata	0:f27ce43dee4f	398	uint8_t tap_ia : 1;
cparata	0:f27ce43dee4f	399	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	400	} lsm6dsox_tap_src_t;
cparata	0:f27ce43dee4f	401
cparata	0:f27ce43dee4f	402	#define LSM6DSOX_D6D_SRC 0x1DU
cparata	0:f27ce43dee4f	403	typedef struct {
cparata	0:f27ce43dee4f	404	uint8_t xl : 1;
cparata	0:f27ce43dee4f	405	uint8_t xh : 1;
cparata	0:f27ce43dee4f	406	uint8_t yl : 1;
cparata	0:f27ce43dee4f	407	uint8_t yh : 1;
cparata	0:f27ce43dee4f	408	uint8_t zl : 1;
cparata	0:f27ce43dee4f	409	uint8_t zh : 1;
cparata	0:f27ce43dee4f	410	uint8_t d6d_ia : 1;
cparata	0:f27ce43dee4f	411	uint8_t den_drdy : 1;
cparata	0:f27ce43dee4f	412	} lsm6dsox_d6d_src_t;
cparata	0:f27ce43dee4f	413
cparata	0:f27ce43dee4f	414	#define LSM6DSOX_STATUS_REG 0x1EU
cparata	0:f27ce43dee4f	415	typedef struct {
cparata	0:f27ce43dee4f	416	uint8_t xlda : 1;
cparata	0:f27ce43dee4f	417	uint8_t gda : 1;
cparata	0:f27ce43dee4f	418	uint8_t tda : 1;
cparata	0:f27ce43dee4f	419	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	420	} lsm6dsox_status_reg_t;
cparata	0:f27ce43dee4f	421
cparata	0:f27ce43dee4f	422	#define LSM6DSOX_OUT_TEMP_L 0x20U
cparata	0:f27ce43dee4f	423	#define LSM6DSOX_OUT_TEMP_H 0x21U
cparata	0:f27ce43dee4f	424	#define LSM6DSOX_OUTX_L_G 0x22U
cparata	0:f27ce43dee4f	425	#define LSM6DSOX_OUTX_H_G 0x23U
cparata	0:f27ce43dee4f	426	#define LSM6DSOX_OUTY_L_G 0x24U
cparata	0:f27ce43dee4f	427	#define LSM6DSOX_OUTY_H_G 0x25U
cparata	0:f27ce43dee4f	428	#define LSM6DSOX_OUTZ_L_G 0x26U
cparata	0:f27ce43dee4f	429	#define LSM6DSOX_OUTZ_H_G 0x27U
cparata	0:f27ce43dee4f	430	#define LSM6DSOX_OUTX_L_A 0x28U
cparata	0:f27ce43dee4f	431	#define LSM6DSOX_OUTX_H_A 0x29U
cparata	0:f27ce43dee4f	432	#define LSM6DSOX_OUTY_L_A 0x2AU
cparata	0:f27ce43dee4f	433	#define LSM6DSOX_OUTY_H_A 0x2BU
cparata	0:f27ce43dee4f	434	#define LSM6DSOX_OUTZ_L_A 0x2CU
cparata	0:f27ce43dee4f	435	#define LSM6DSOX_OUTZ_H_A 0x2DU
cparata	0:f27ce43dee4f	436	#define LSM6DSOX_EMB_FUNC_STATUS_MAINPAGE 0x35U
cparata	0:f27ce43dee4f	437	typedef struct {
cparata	0:f27ce43dee4f	438	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	439	uint8_t is_step_det : 1;
cparata	0:f27ce43dee4f	440	uint8_t is_tilt : 1;
cparata	0:f27ce43dee4f	441	uint8_t is_sigmot : 1;
cparata	0:f27ce43dee4f	442	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	443	uint8_t is_fsm_lc : 1;
cparata	0:f27ce43dee4f	444	} lsm6dsox_emb_func_status_mainpage_t;
cparata	0:f27ce43dee4f	445
cparata	0:f27ce43dee4f	446	#define LSM6DSOX_FSM_STATUS_A_MAINPAGE 0x36U
cparata	0:f27ce43dee4f	447	typedef struct {
cparata	0:f27ce43dee4f	448	uint8_t is_fsm1 : 1;
cparata	0:f27ce43dee4f	449	uint8_t is_fsm2 : 1;
cparata	0:f27ce43dee4f	450	uint8_t is_fsm3 : 1;
cparata	0:f27ce43dee4f	451	uint8_t is_fsm4 : 1;
cparata	0:f27ce43dee4f	452	uint8_t is_fsm5 : 1;
cparata	0:f27ce43dee4f	453	uint8_t is_fsm6 : 1;
cparata	0:f27ce43dee4f	454	uint8_t is_fsm7 : 1;
cparata	0:f27ce43dee4f	455	uint8_t is_fsm8 : 1;
cparata	0:f27ce43dee4f	456	} lsm6dsox_fsm_status_a_mainpage_t;
cparata	0:f27ce43dee4f	457
cparata	0:f27ce43dee4f	458	#define LSM6DSOX_FSM_STATUS_B_MAINPAGE 0x37U
cparata	0:f27ce43dee4f	459	typedef struct {
cparata	0:f27ce43dee4f	460	uint8_t is_fsm9 : 1;
cparata	0:f27ce43dee4f	461	uint8_t is_fsm10 : 1;
cparata	0:f27ce43dee4f	462	uint8_t is_fsm11 : 1;
cparata	0:f27ce43dee4f	463	uint8_t is_fsm12 : 1;
cparata	0:f27ce43dee4f	464	uint8_t is_fsm13 : 1;
cparata	0:f27ce43dee4f	465	uint8_t is_fsm14 : 1;
cparata	0:f27ce43dee4f	466	uint8_t is_fsm15 : 1;
cparata	0:f27ce43dee4f	467	uint8_t is_fsm16 : 1;
cparata	0:f27ce43dee4f	468	} lsm6dsox_fsm_status_b_mainpage_t;
cparata	0:f27ce43dee4f	469
cparata	0:f27ce43dee4f	470	#define LSM6DSOX_MLC_STATUS_MAINPAGE 0x38U
cparata	0:f27ce43dee4f	471	typedef struct {
cparata	0:f27ce43dee4f	472	uint8_t is_mlc1 : 1;
cparata	0:f27ce43dee4f	473	uint8_t is_mlc2 : 1;
cparata	0:f27ce43dee4f	474	uint8_t is_mlc3 : 1;
cparata	0:f27ce43dee4f	475	uint8_t is_mlc4 : 1;
cparata	0:f27ce43dee4f	476	uint8_t is_mlc5 : 1;
cparata	0:f27ce43dee4f	477	uint8_t is_mlc6 : 1;
cparata	0:f27ce43dee4f	478	uint8_t is_mlc7 : 1;
cparata	0:f27ce43dee4f	479	uint8_t is_mlc8 : 1;
cparata	0:f27ce43dee4f	480	} lsm6dsox_mlc_status_mainpage_t;
cparata	0:f27ce43dee4f	481
cparata	0:f27ce43dee4f	482	#define LSM6DSOX_STATUS_MASTER_MAINPAGE 0x39U
cparata	0:f27ce43dee4f	483	typedef struct {
cparata	0:f27ce43dee4f	484	uint8_t sens_hub_endop : 1;
cparata	0:f27ce43dee4f	485	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	486	uint8_t slave0_nack : 1;
cparata	0:f27ce43dee4f	487	uint8_t slave1_nack : 1;
cparata	0:f27ce43dee4f	488	uint8_t slave2_nack : 1;
cparata	0:f27ce43dee4f	489	uint8_t slave3_nack : 1;
cparata	0:f27ce43dee4f	490	uint8_t wr_once_done : 1;
cparata	0:f27ce43dee4f	491	} lsm6dsox_status_master_mainpage_t;
cparata	0:f27ce43dee4f	492
cparata	0:f27ce43dee4f	493	#define LSM6DSOX_FIFO_STATUS1 0x3AU
cparata	0:f27ce43dee4f	494	typedef struct {
cparata	0:f27ce43dee4f	495	uint8_t diff_fifo : 8;
cparata	0:f27ce43dee4f	496	} lsm6dsox_fifo_status1_t;
cparata	0:f27ce43dee4f	497
cparata	0:f27ce43dee4f	498	#define LSM6DSOX_FIFO_STATUS2 0x3B
cparata	0:f27ce43dee4f	499	typedef struct {
cparata	0:f27ce43dee4f	500	uint8_t diff_fifo : 2;
cparata	0:f27ce43dee4f	501	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	502	uint8_t over_run_latched : 1;
cparata	0:f27ce43dee4f	503	uint8_t counter_bdr_ia : 1;
cparata	0:f27ce43dee4f	504	uint8_t fifo_full_ia : 1;
cparata	0:f27ce43dee4f	505	uint8_t fifo_ovr_ia : 1;
cparata	0:f27ce43dee4f	506	uint8_t fifo_wtm_ia : 1;
cparata	0:f27ce43dee4f	507	} lsm6dsox_fifo_status2_t;
cparata	0:f27ce43dee4f	508
cparata	0:f27ce43dee4f	509	#define LSM6DSOX_TIMESTAMP0 0x40U
cparata	0:f27ce43dee4f	510	#define LSM6DSOX_TIMESTAMP1 0x41U
cparata	0:f27ce43dee4f	511	#define LSM6DSOX_TIMESTAMP2 0x42U
cparata	0:f27ce43dee4f	512	#define LSM6DSOX_TIMESTAMP3 0x43U
cparata	0:f27ce43dee4f	513	#define LSM6DSOX_UI_STATUS_REG_OIS 0x49U
cparata	0:f27ce43dee4f	514	typedef struct {
cparata	0:f27ce43dee4f	515	uint8_t xlda : 1;
cparata	0:f27ce43dee4f	516	uint8_t gda : 1;
cparata	0:f27ce43dee4f	517	uint8_t gyro_settling : 1;
cparata	0:f27ce43dee4f	518	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	519	} lsm6dsox_ui_status_reg_ois_t;
cparata	0:f27ce43dee4f	520
cparata	0:f27ce43dee4f	521	#define LSM6DSOX_UI_OUTX_L_G_OIS 0x4AU
cparata	0:f27ce43dee4f	522	#define LSM6DSOX_UI_OUTX_H_G_OIS 0x4BU
cparata	0:f27ce43dee4f	523	#define LSM6DSOX_UI_OUTY_L_G_OIS 0x4CU
cparata	0:f27ce43dee4f	524	#define LSM6DSOX_UI_OUTY_H_G_OIS 0x4DU
cparata	0:f27ce43dee4f	525	#define LSM6DSOX_UI_OUTZ_L_G_OIS 0x4EU
cparata	0:f27ce43dee4f	526	#define LSM6DSOX_UI_OUTZ_H_G_OIS 0x4FU
cparata	0:f27ce43dee4f	527	#define LSM6DSOX_UI_OUTX_L_A_OIS 0x50U
cparata	0:f27ce43dee4f	528	#define LSM6DSOX_UI_OUTX_H_A_OIS 0x51U
cparata	0:f27ce43dee4f	529	#define LSM6DSOX_UI_OUTY_L_A_OIS 0x52U
cparata	0:f27ce43dee4f	530	#define LSM6DSOX_UI_OUTY_H_A_OIS 0x53U
cparata	0:f27ce43dee4f	531	#define LSM6DSOX_UI_OUTZ_L_A_OIS 0x54U
cparata	0:f27ce43dee4f	532	#define LSM6DSOX_UI_OUTZ_H_A_OIS 0x55U
cparata	0:f27ce43dee4f	533
cparata	0:f27ce43dee4f	534	#define LSM6DSOX_TAP_CFG0 0x56U
cparata	0:f27ce43dee4f	535	typedef struct {
cparata	0:f27ce43dee4f	536	uint8_t lir : 1;
cparata	0:f27ce43dee4f	537	uint8_t tap_z_en : 1;
cparata	0:f27ce43dee4f	538	uint8_t tap_y_en : 1;
cparata	0:f27ce43dee4f	539	uint8_t tap_x_en : 1;
cparata	0:f27ce43dee4f	540	uint8_t slope_fds : 1;
cparata	0:f27ce43dee4f	541	uint8_t sleep_status_on_int : 1;
cparata	0:f27ce43dee4f	542	uint8_t int_clr_on_read : 1;
cparata	0:f27ce43dee4f	543	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	544	} lsm6dsox_tap_cfg0_t;
cparata	0:f27ce43dee4f	545
cparata	0:f27ce43dee4f	546	#define LSM6DSOX_TAP_CFG1 0x57U
cparata	0:f27ce43dee4f	547	typedef struct {
cparata	0:f27ce43dee4f	548	uint8_t tap_ths_x : 5;
cparata	0:f27ce43dee4f	549	uint8_t tap_priority : 3;
cparata	0:f27ce43dee4f	550	} lsm6dsox_tap_cfg1_t;
cparata	0:f27ce43dee4f	551
cparata	0:f27ce43dee4f	552	#define LSM6DSOX_TAP_CFG2 0x58U
cparata	0:f27ce43dee4f	553	typedef struct {
cparata	0:f27ce43dee4f	554	uint8_t tap_ths_y : 5;
cparata	0:f27ce43dee4f	555	uint8_t inact_en : 2;
cparata	0:f27ce43dee4f	556	uint8_t interrupts_enable : 1;
cparata	0:f27ce43dee4f	557	} lsm6dsox_tap_cfg2_t;
cparata	0:f27ce43dee4f	558
cparata	0:f27ce43dee4f	559	#define LSM6DSOX_TAP_THS_6D 0x59U
cparata	0:f27ce43dee4f	560	typedef struct {
cparata	0:f27ce43dee4f	561	uint8_t tap_ths_z : 5;
cparata	0:f27ce43dee4f	562	uint8_t sixd_ths : 2;
cparata	0:f27ce43dee4f	563	uint8_t d4d_en : 1;
cparata	0:f27ce43dee4f	564	} lsm6dsox_tap_ths_6d_t;
cparata	0:f27ce43dee4f	565
cparata	0:f27ce43dee4f	566	#define LSM6DSOX_INT_DUR2 0x5AU
cparata	0:f27ce43dee4f	567	typedef struct {
cparata	0:f27ce43dee4f	568	uint8_t shock : 2;
cparata	0:f27ce43dee4f	569	uint8_t quiet : 2;
cparata	0:f27ce43dee4f	570	uint8_t dur : 4;
cparata	0:f27ce43dee4f	571	} lsm6dsox_int_dur2_t;
cparata	0:f27ce43dee4f	572
cparata	0:f27ce43dee4f	573	#define LSM6DSOX_WAKE_UP_THS 0x5BU
cparata	0:f27ce43dee4f	574	typedef struct {
cparata	0:f27ce43dee4f	575	uint8_t wk_ths : 6;
cparata	0:f27ce43dee4f	576	uint8_t usr_off_on_wu : 1;
cparata	0:f27ce43dee4f	577	uint8_t single_double_tap : 1;
cparata	0:f27ce43dee4f	578	} lsm6dsox_wake_up_ths_t;
cparata	0:f27ce43dee4f	579
cparata	0:f27ce43dee4f	580	#define LSM6DSOX_WAKE_UP_DUR 0x5CU
cparata	0:f27ce43dee4f	581	typedef struct {
cparata	0:f27ce43dee4f	582	uint8_t sleep_dur : 4;
cparata	0:f27ce43dee4f	583	uint8_t wake_ths_w : 1;
cparata	0:f27ce43dee4f	584	uint8_t wake_dur : 2;
cparata	0:f27ce43dee4f	585	uint8_t ff_dur : 1;
cparata	0:f27ce43dee4f	586	} lsm6dsox_wake_up_dur_t;
cparata	0:f27ce43dee4f	587
cparata	0:f27ce43dee4f	588	#define LSM6DSOX_FREE_FALL 0x5DU
cparata	0:f27ce43dee4f	589	typedef struct {
cparata	0:f27ce43dee4f	590	uint8_t ff_ths : 3;
cparata	0:f27ce43dee4f	591	uint8_t ff_dur : 5;
cparata	0:f27ce43dee4f	592	} lsm6dsox_free_fall_t;
cparata	0:f27ce43dee4f	593
cparata	0:f27ce43dee4f	594	#define LSM6DSOX_MD1_CFG 0x5EU
cparata	0:f27ce43dee4f	595	typedef struct {
cparata	0:f27ce43dee4f	596	uint8_t int1_shub : 1;
cparata	0:f27ce43dee4f	597	uint8_t int1_emb_func : 1;
cparata	0:f27ce43dee4f	598	uint8_t int1_6d : 1;
cparata	0:f27ce43dee4f	599	uint8_t int1_double_tap : 1;
cparata	0:f27ce43dee4f	600	uint8_t int1_ff : 1;
cparata	0:f27ce43dee4f	601	uint8_t int1_wu : 1;
cparata	0:f27ce43dee4f	602	uint8_t int1_single_tap : 1;
cparata	0:f27ce43dee4f	603	uint8_t int1_sleep_change : 1;
cparata	0:f27ce43dee4f	604	} lsm6dsox_md1_cfg_t;
cparata	0:f27ce43dee4f	605
cparata	0:f27ce43dee4f	606	#define LSM6DSOX_MD2_CFG 0x5FU
cparata	0:f27ce43dee4f	607	typedef struct {
cparata	0:f27ce43dee4f	608	uint8_t int2_timestamp : 1;
cparata	0:f27ce43dee4f	609	uint8_t int2_emb_func : 1;
cparata	0:f27ce43dee4f	610	uint8_t int2_6d : 1;
cparata	0:f27ce43dee4f	611	uint8_t int2_double_tap : 1;
cparata	0:f27ce43dee4f	612	uint8_t int2_ff : 1;
cparata	0:f27ce43dee4f	613	uint8_t int2_wu : 1;
cparata	0:f27ce43dee4f	614	uint8_t int2_single_tap : 1;
cparata	0:f27ce43dee4f	615	uint8_t int2_sleep_change : 1;
cparata	0:f27ce43dee4f	616	} lsm6dsox_md2_cfg_t;
cparata	0:f27ce43dee4f	617
cparata	0:f27ce43dee4f	618	#define LSM6DSOX_S4S_ST_CMD_CODE 0x60U
cparata	0:f27ce43dee4f	619	typedef struct {
cparata	0:f27ce43dee4f	620	uint8_t s4s_st_cmd_code : 8;
cparata	0:f27ce43dee4f	621	} lsm6dsox_s4s_st_cmd_code_t;
cparata	0:f27ce43dee4f	622
cparata	0:f27ce43dee4f	623	#define LSM6DSOX_S4S_DT_REG 0x61U
cparata	0:f27ce43dee4f	624	typedef struct {
cparata	0:f27ce43dee4f	625	uint8_t dt : 8;
cparata	0:f27ce43dee4f	626	} lsm6dsox_s4s_dt_reg_t;
cparata	0:f27ce43dee4f	627
cparata	0:f27ce43dee4f	628	#define LSM6DSOX_I3C_BUS_AVB 0x62U
cparata	0:f27ce43dee4f	629	typedef struct {
cparata	0:f27ce43dee4f	630	uint8_t pd_dis_int1 : 1;
cparata	0:f27ce43dee4f	631	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	632	uint8_t i3c_bus_avb_sel : 2;
cparata	0:f27ce43dee4f	633	uint8_t not_used_02 : 3;
cparata	0:f27ce43dee4f	634	} lsm6dsox_i3c_bus_avb_t;
cparata	0:f27ce43dee4f	635
cparata	0:f27ce43dee4f	636	#define LSM6DSOX_INTERNAL_FREQ_FINE 0x63U
cparata	0:f27ce43dee4f	637	typedef struct {
cparata	0:f27ce43dee4f	638	uint8_t freq_fine : 8;
cparata	0:f27ce43dee4f	639	} lsm6dsox_internal_freq_fine_t;
cparata	0:f27ce43dee4f	640
cparata	0:f27ce43dee4f	641	#define LSM6DSOX_UI_INT_OIS 0x6F
cparata	0:f27ce43dee4f	642	typedef struct {
cparata	0:f27ce43dee4f	643	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	644	uint8_t spi2_read_en : 1;
cparata	1:fe40aec6e97a	645	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	646	uint8_t den_lh_ois : 1;
cparata	0:f27ce43dee4f	647	uint8_t lvl2_ois : 1;
cparata	0:f27ce43dee4f	648	uint8_t int2_drdy_ois : 1;
cparata	0:f27ce43dee4f	649	} lsm6dsox_ui_int_ois_t;
cparata	0:f27ce43dee4f	650
cparata	0:f27ce43dee4f	651	#define LSM6DSOX_UI_CTRL1_OIS 0x70U
cparata	0:f27ce43dee4f	652	typedef struct {
cparata	0:f27ce43dee4f	653	uint8_t ois_en_spi2 : 1;
cparata	0:f27ce43dee4f	654	uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
cparata	0:f27ce43dee4f	655	uint8_t mode4_en : 1;
cparata	0:f27ce43dee4f	656	uint8_t sim_ois : 1;
cparata	0:f27ce43dee4f	657	uint8_t lvl1_ois : 1;
cparata	0:f27ce43dee4f	658	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	659	} lsm6dsox_ui_ctrl1_ois_t;
cparata	0:f27ce43dee4f	660
cparata	0:f27ce43dee4f	661	#define LSM6DSOX_UI_CTRL2_OIS 0x71U
cparata	0:f27ce43dee4f	662	typedef struct {
cparata	0:f27ce43dee4f	663	uint8_t hp_en_ois : 1;
cparata	0:f27ce43dee4f	664	uint8_t ftype_ois : 2;
cparata	0:f27ce43dee4f	665	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	666	uint8_t hpm_ois : 2;
cparata	0:f27ce43dee4f	667	uint8_t not_used_02 : 2;
cparata	0:f27ce43dee4f	668	} lsm6dsox_ui_ctrl2_ois_t;
cparata	0:f27ce43dee4f	669
cparata	0:f27ce43dee4f	670	#define LSM6DSOX_UI_CTRL3_OIS 0x72U
cparata	0:f27ce43dee4f	671	typedef struct {
cparata	0:f27ce43dee4f	672	uint8_t st_ois_clampdis : 1;
cparata	0:f27ce43dee4f	673	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	674	uint8_t filter_xl_conf_ois : 3;
cparata	0:f27ce43dee4f	675	uint8_t fs_xl_ois : 2;
cparata	0:f27ce43dee4f	676	} lsm6dsox_ui_ctrl3_ois_t;
cparata	0:f27ce43dee4f	677
cparata	0:f27ce43dee4f	678	#define LSM6DSOX_X_OFS_USR 0x73U
cparata	0:f27ce43dee4f	679	#define LSM6DSOX_Y_OFS_USR 0x74U
cparata	0:f27ce43dee4f	680	#define LSM6DSOX_Z_OFS_USR 0x75U
cparata	0:f27ce43dee4f	681	#define LSM6DSOX_FIFO_DATA_OUT_TAG 0x78U
cparata	0:f27ce43dee4f	682	typedef struct {
cparata	0:f27ce43dee4f	683	uint8_t tag_parity : 1;
cparata	0:f27ce43dee4f	684	uint8_t tag_cnt : 2;
cparata	0:f27ce43dee4f	685	uint8_t tag_sensor : 5;
cparata	0:f27ce43dee4f	686	} lsm6dsox_fifo_data_out_tag_t;
cparata	0:f27ce43dee4f	687
cparata	0:f27ce43dee4f	688	#define LSM6DSOX_FIFO_DATA_OUT_X_L 0x79
cparata	0:f27ce43dee4f	689	#define LSM6DSOX_FIFO_DATA_OUT_X_H 0x7A
cparata	0:f27ce43dee4f	690	#define LSM6DSOX_FIFO_DATA_OUT_Y_L 0x7B
cparata	0:f27ce43dee4f	691	#define LSM6DSOX_FIFO_DATA_OUT_Y_H 0x7C
cparata	0:f27ce43dee4f	692	#define LSM6DSOX_FIFO_DATA_OUT_Z_L 0x7D
cparata	0:f27ce43dee4f	693	#define LSM6DSOX_FIFO_DATA_OUT_Z_H 0x7E
cparata	0:f27ce43dee4f	694
cparata	0:f27ce43dee4f	695	#define LSM6DSOX_SPI2_WHO_AM_I 0x0F
cparata	0:f27ce43dee4f	696	#define LSM6DSOX_SPI2_STATUS_REG_OIS 0x1E
cparata	0:f27ce43dee4f	697	typedef struct {
cparata	0:f27ce43dee4f	698	uint8_t xlda : 1;
cparata	0:f27ce43dee4f	699	uint8_t gda : 1;
cparata	0:f27ce43dee4f	700	uint8_t gyro_settling : 1;
cparata	0:f27ce43dee4f	701	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	702	} lsm6dsox_spi2_status_reg_ois_t;
cparata	0:f27ce43dee4f	703
cparata	0:f27ce43dee4f	704	#define LSM6DSOX_SPI2_OUT_TEMP_L 0x20
cparata	0:f27ce43dee4f	705	#define LSM6DSOX_SPI2_OUT_TEMP_H 0x21
cparata	0:f27ce43dee4f	706	#define LSM6DSOX_SPI2_OUTX_L_G_OIS 0x22
cparata	0:f27ce43dee4f	707	#define LSM6DSOX_SPI2_OUTX_H_G_OIS 0x23
cparata	0:f27ce43dee4f	708	#define LSM6DSOX_SPI2_OUTY_L_G_OIS 0x24
cparata	0:f27ce43dee4f	709	#define LSM6DSOX_SPI2_OUTY_H_G_OIS 0x25
cparata	0:f27ce43dee4f	710	#define LSM6DSOX_SPI2_OUTZ_L_G_OIS 0x26
cparata	0:f27ce43dee4f	711	#define LSM6DSOX_SPI2_OUTZ_H_G_OIS 0x27
cparata	0:f27ce43dee4f	712	#define LSM6DSOX_SPI2_OUTX_L_A_OIS 0x28
cparata	0:f27ce43dee4f	713	#define LSM6DSOX_SPI2_OUTX_H_A_OIS 0x29
cparata	0:f27ce43dee4f	714	#define LSM6DSOX_SPI2_OUTY_L_A_OIS 0x2A
cparata	0:f27ce43dee4f	715	#define LSM6DSOX_SPI2_OUTY_H_A_OIS 0x2B
cparata	0:f27ce43dee4f	716	#define LSM6DSOX_SPI2_OUTZ_L_A_OIS 0x2C
cparata	0:f27ce43dee4f	717	#define LSM6DSOX_SPI2_OUTZ_H_A_OIS 0x2D
cparata	0:f27ce43dee4f	718	#define LSM6DSOX_SPI2_INT_OIS 0x6F
cparata	0:f27ce43dee4f	719	typedef struct {
cparata	0:f27ce43dee4f	720	uint8_t st_xl_ois : 2;
cparata	0:f27ce43dee4f	721	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	722	uint8_t den_lh_ois : 1;
cparata	0:f27ce43dee4f	723	uint8_t lvl2_ois : 1;
cparata	0:f27ce43dee4f	724	uint8_t int2_drdy_ois : 1;
cparata	0:f27ce43dee4f	725	} lsm6dsox_spi2_int_ois_t;
cparata	0:f27ce43dee4f	726
cparata	0:f27ce43dee4f	727	#define LSM6DSOX_SPI2_CTRL1_OIS 0x70U
cparata	0:f27ce43dee4f	728	typedef struct {
cparata	0:f27ce43dee4f	729	uint8_t ois_en_spi2 : 1;
cparata	0:f27ce43dee4f	730	uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
cparata	0:f27ce43dee4f	731	uint8_t mode4_en : 1;
cparata	0:f27ce43dee4f	732	uint8_t sim_ois : 1;
cparata	0:f27ce43dee4f	733	uint8_t lvl1_ois : 1;
cparata	0:f27ce43dee4f	734	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	735	} lsm6dsox_spi2_ctrl1_ois_t;
cparata	0:f27ce43dee4f	736
cparata	0:f27ce43dee4f	737	#define LSM6DSOX_SPI2_CTRL2_OIS 0x71U
cparata	0:f27ce43dee4f	738	typedef struct {
cparata	0:f27ce43dee4f	739	uint8_t hp_en_ois : 1;
cparata	0:f27ce43dee4f	740	uint8_t ftype_ois : 2;
cparata	0:f27ce43dee4f	741	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	742	uint8_t hpm_ois : 2;
cparata	0:f27ce43dee4f	743	uint8_t not_used_02 : 2;
cparata	0:f27ce43dee4f	744	} lsm6dsox_spi2_ctrl2_ois_t;
cparata	0:f27ce43dee4f	745
cparata	0:f27ce43dee4f	746	#define LSM6DSOX_SPI2_CTRL3_OIS 0x72U
cparata	0:f27ce43dee4f	747	typedef struct {
cparata	0:f27ce43dee4f	748	uint8_t st_ois_clampdis : 1;
cparata	0:f27ce43dee4f	749	uint8_t st_ois : 2;
cparata	0:f27ce43dee4f	750	uint8_t filter_xl_conf_ois : 3;
cparata	0:f27ce43dee4f	751	uint8_t fs_xl_ois : 2;
cparata	0:f27ce43dee4f	752	} lsm6dsox_spi2_ctrl3_ois_t;
cparata	0:f27ce43dee4f	753
cparata	0:f27ce43dee4f	754	#define LSM6DSOX_PAGE_SEL 0x02U
cparata	0:f27ce43dee4f	755	typedef struct {
cparata	0:f27ce43dee4f	756	uint8_t not_used_01 : 4;
cparata	0:f27ce43dee4f	757	uint8_t page_sel : 4;
cparata	0:f27ce43dee4f	758	} lsm6dsox_page_sel_t;
cparata	0:f27ce43dee4f	759
cparata	0:f27ce43dee4f	760	#define LSM6DSOX_EMB_FUNC_EN_A 0x04U
cparata	0:f27ce43dee4f	761	typedef struct {
cparata	0:f27ce43dee4f	762	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	763	uint8_t pedo_en : 1;
cparata	0:f27ce43dee4f	764	uint8_t tilt_en : 1;
cparata	0:f27ce43dee4f	765	uint8_t sign_motion_en : 1;
cparata	0:f27ce43dee4f	766	uint8_t not_used_02 : 2;
cparata	0:f27ce43dee4f	767	} lsm6dsox_emb_func_en_a_t;
cparata	0:f27ce43dee4f	768
cparata	0:f27ce43dee4f	769	#define LSM6DSOX_EMB_FUNC_EN_B 0x05U
cparata	0:f27ce43dee4f	770	typedef struct {
cparata	0:f27ce43dee4f	771	uint8_t fsm_en : 1;
cparata	0:f27ce43dee4f	772	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	773	uint8_t fifo_compr_en : 1;
cparata	0:f27ce43dee4f	774	uint8_t mlc_en : 1;
cparata	0:f27ce43dee4f	775	uint8_t not_used_02 : 3;
cparata	0:f27ce43dee4f	776	} lsm6dsox_emb_func_en_b_t;
cparata	0:f27ce43dee4f	777
cparata	0:f27ce43dee4f	778	#define LSM6DSOX_PAGE_ADDRESS 0x08U
cparata	0:f27ce43dee4f	779	typedef struct {
cparata	0:f27ce43dee4f	780	uint8_t page_addr : 8;
cparata	0:f27ce43dee4f	781	} lsm6dsox_page_address_t;
cparata	0:f27ce43dee4f	782
cparata	0:f27ce43dee4f	783	#define LSM6DSOX_PAGE_VALUE 0x09U
cparata	0:f27ce43dee4f	784	typedef struct {
cparata	0:f27ce43dee4f	785	uint8_t page_value : 8;
cparata	0:f27ce43dee4f	786	} lsm6dsox_page_value_t;
cparata	0:f27ce43dee4f	787
cparata	0:f27ce43dee4f	788	#define LSM6DSOX_EMB_FUNC_INT1 0x0AU
cparata	0:f27ce43dee4f	789	typedef struct {
cparata	0:f27ce43dee4f	790	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	791	uint8_t int1_step_detector : 1;
cparata	0:f27ce43dee4f	792	uint8_t int1_tilt : 1;
cparata	0:f27ce43dee4f	793	uint8_t int1_sig_mot : 1;
cparata	0:f27ce43dee4f	794	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	795	uint8_t int1_fsm_lc : 1;
cparata	0:f27ce43dee4f	796	} lsm6dsox_emb_func_int1_t;
cparata	0:f27ce43dee4f	797
cparata	0:f27ce43dee4f	798	#define LSM6DSOX_FSM_INT1_A 0x0BU
cparata	0:f27ce43dee4f	799	typedef struct {
cparata	0:f27ce43dee4f	800	uint8_t int1_fsm1 : 1;
cparata	0:f27ce43dee4f	801	uint8_t int1_fsm2 : 1;
cparata	0:f27ce43dee4f	802	uint8_t int1_fsm3 : 1;
cparata	0:f27ce43dee4f	803	uint8_t int1_fsm4 : 1;
cparata	0:f27ce43dee4f	804	uint8_t int1_fsm5 : 1;
cparata	0:f27ce43dee4f	805	uint8_t int1_fsm6 : 1;
cparata	0:f27ce43dee4f	806	uint8_t int1_fsm7 : 1;
cparata	0:f27ce43dee4f	807	uint8_t int1_fsm8 : 1;
cparata	0:f27ce43dee4f	808	} lsm6dsox_fsm_int1_a_t;
cparata	0:f27ce43dee4f	809
cparata	0:f27ce43dee4f	810	#define LSM6DSOX_FSM_INT1_B 0x0CU
cparata	0:f27ce43dee4f	811	typedef struct {
cparata	0:f27ce43dee4f	812	uint8_t int1_fsm9 : 1;
cparata	0:f27ce43dee4f	813	uint8_t int1_fsm10 : 1;
cparata	0:f27ce43dee4f	814	uint8_t int1_fsm11 : 1;
cparata	0:f27ce43dee4f	815	uint8_t int1_fsm12 : 1;
cparata	0:f27ce43dee4f	816	uint8_t int1_fsm13 : 1;
cparata	0:f27ce43dee4f	817	uint8_t int1_fsm14 : 1;
cparata	0:f27ce43dee4f	818	uint8_t int1_fsm15 : 1;
cparata	0:f27ce43dee4f	819	uint8_t int1_fsm16 : 1;
cparata	0:f27ce43dee4f	820	} lsm6dsox_fsm_int1_b_t;
cparata	0:f27ce43dee4f	821
cparata	0:f27ce43dee4f	822	#define LSM6DSOX_MLC_INT1 0x0DU
cparata	0:f27ce43dee4f	823	typedef struct {
cparata	0:f27ce43dee4f	824	uint8_t int1_mlc1 : 1;
cparata	0:f27ce43dee4f	825	uint8_t int1_mlc2 : 1;
cparata	0:f27ce43dee4f	826	uint8_t int1_mlc3 : 1;
cparata	0:f27ce43dee4f	827	uint8_t int1_mlc4 : 1;
cparata	0:f27ce43dee4f	828	uint8_t int1_mlc5 : 1;
cparata	0:f27ce43dee4f	829	uint8_t int1_mlc6 : 1;
cparata	0:f27ce43dee4f	830	uint8_t int1_mlc7 : 1;
cparata	0:f27ce43dee4f	831	uint8_t int1_mlc8 : 1;
cparata	0:f27ce43dee4f	832	} lsm6dsox_mlc_int1_t;
cparata	0:f27ce43dee4f	833
cparata	0:f27ce43dee4f	834	#define LSM6DSOX_EMB_FUNC_INT2 0x0EU
cparata	0:f27ce43dee4f	835	typedef struct {
cparata	0:f27ce43dee4f	836	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	837	uint8_t int2_step_detector : 1;
cparata	0:f27ce43dee4f	838	uint8_t int2_tilt : 1;
cparata	0:f27ce43dee4f	839	uint8_t int2_sig_mot : 1;
cparata	0:f27ce43dee4f	840	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	841	uint8_t int2_fsm_lc : 1;
cparata	0:f27ce43dee4f	842	} lsm6dsox_emb_func_int2_t;
cparata	0:f27ce43dee4f	843
cparata	0:f27ce43dee4f	844	#define LSM6DSOX_FSM_INT2_A 0x0FU
cparata	0:f27ce43dee4f	845	typedef struct {
cparata	0:f27ce43dee4f	846	uint8_t int2_fsm1 : 1;
cparata	0:f27ce43dee4f	847	uint8_t int2_fsm2 : 1;
cparata	0:f27ce43dee4f	848	uint8_t int2_fsm3 : 1;
cparata	0:f27ce43dee4f	849	uint8_t int2_fsm4 : 1;
cparata	0:f27ce43dee4f	850	uint8_t int2_fsm5 : 1;
cparata	0:f27ce43dee4f	851	uint8_t int2_fsm6 : 1;
cparata	0:f27ce43dee4f	852	uint8_t int2_fsm7 : 1;
cparata	0:f27ce43dee4f	853	uint8_t int2_fsm8 : 1;
cparata	0:f27ce43dee4f	854	} lsm6dsox_fsm_int2_a_t;
cparata	0:f27ce43dee4f	855
cparata	0:f27ce43dee4f	856	#define LSM6DSOX_FSM_INT2_B 0x10U
cparata	0:f27ce43dee4f	857	typedef struct {
cparata	0:f27ce43dee4f	858	uint8_t int2_fsm9 : 1;
cparata	0:f27ce43dee4f	859	uint8_t int2_fsm10 : 1;
cparata	0:f27ce43dee4f	860	uint8_t int2_fsm11 : 1;
cparata	0:f27ce43dee4f	861	uint8_t int2_fsm12 : 1;
cparata	0:f27ce43dee4f	862	uint8_t int2_fsm13 : 1;
cparata	0:f27ce43dee4f	863	uint8_t int2_fsm14 : 1;
cparata	0:f27ce43dee4f	864	uint8_t int2_fsm15 : 1;
cparata	0:f27ce43dee4f	865	uint8_t int2_fsm16 : 1;
cparata	0:f27ce43dee4f	866	} lsm6dsox_fsm_int2_b_t;
cparata	0:f27ce43dee4f	867
cparata	0:f27ce43dee4f	868	#define LSM6DSOX_MLC_INT2 0x11U
cparata	0:f27ce43dee4f	869	typedef struct {
cparata	0:f27ce43dee4f	870	uint8_t int2_mlc1 : 1;
cparata	0:f27ce43dee4f	871	uint8_t int2_mlc2 : 1;
cparata	0:f27ce43dee4f	872	uint8_t int2_mlc3 : 1;
cparata	0:f27ce43dee4f	873	uint8_t int2_mlc4 : 1;
cparata	0:f27ce43dee4f	874	uint8_t int2_mlc5 : 1;
cparata	0:f27ce43dee4f	875	uint8_t int2_mlc6 : 1;
cparata	0:f27ce43dee4f	876	uint8_t int2_mlc7 : 1;
cparata	0:f27ce43dee4f	877	uint8_t int2_mlc8 : 1;
cparata	0:f27ce43dee4f	878	} lsm6dsox_mlc_int2_t;
cparata	0:f27ce43dee4f	879
cparata	0:f27ce43dee4f	880	#define LSM6DSOX_EMB_FUNC_STATUS 0x12U
cparata	0:f27ce43dee4f	881	typedef struct {
cparata	0:f27ce43dee4f	882	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	883	uint8_t is_step_det : 1;
cparata	0:f27ce43dee4f	884	uint8_t is_tilt : 1;
cparata	0:f27ce43dee4f	885	uint8_t is_sigmot : 1;
cparata	0:f27ce43dee4f	886	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	887	uint8_t is_fsm_lc : 1;
cparata	0:f27ce43dee4f	888	} lsm6dsox_emb_func_status_t;
cparata	0:f27ce43dee4f	889
cparata	0:f27ce43dee4f	890	#define LSM6DSOX_FSM_STATUS_A 0x13U
cparata	0:f27ce43dee4f	891	typedef struct {
cparata	0:f27ce43dee4f	892	uint8_t is_fsm1 : 1;
cparata	0:f27ce43dee4f	893	uint8_t is_fsm2 : 1;
cparata	0:f27ce43dee4f	894	uint8_t is_fsm3 : 1;
cparata	0:f27ce43dee4f	895	uint8_t is_fsm4 : 1;
cparata	0:f27ce43dee4f	896	uint8_t is_fsm5 : 1;
cparata	0:f27ce43dee4f	897	uint8_t is_fsm6 : 1;
cparata	0:f27ce43dee4f	898	uint8_t is_fsm7 : 1;
cparata	0:f27ce43dee4f	899	uint8_t is_fsm8 : 1;
cparata	0:f27ce43dee4f	900	} lsm6dsox_fsm_status_a_t;
cparata	0:f27ce43dee4f	901
cparata	0:f27ce43dee4f	902	#define LSM6DSOX_FSM_STATUS_B 0x14U
cparata	0:f27ce43dee4f	903	typedef struct {
cparata	0:f27ce43dee4f	904	uint8_t is_fsm9 : 1;
cparata	0:f27ce43dee4f	905	uint8_t is_fsm10 : 1;
cparata	0:f27ce43dee4f	906	uint8_t is_fsm11 : 1;
cparata	0:f27ce43dee4f	907	uint8_t is_fsm12 : 1;
cparata	0:f27ce43dee4f	908	uint8_t is_fsm13 : 1;
cparata	0:f27ce43dee4f	909	uint8_t is_fsm14 : 1;
cparata	0:f27ce43dee4f	910	uint8_t is_fsm15 : 1;
cparata	0:f27ce43dee4f	911	uint8_t is_fsm16 : 1;
cparata	0:f27ce43dee4f	912	} lsm6dsox_fsm_status_b_t;
cparata	0:f27ce43dee4f	913
cparata	0:f27ce43dee4f	914	#define LSM6DSOX_MLC_STATUS 0x15U
cparata	0:f27ce43dee4f	915	typedef struct {
cparata	0:f27ce43dee4f	916	uint8_t is_mlc1 : 1;
cparata	0:f27ce43dee4f	917	uint8_t is_mlc2 : 1;
cparata	0:f27ce43dee4f	918	uint8_t is_mlc3 : 1;
cparata	0:f27ce43dee4f	919	uint8_t is_mlc4 : 1;
cparata	0:f27ce43dee4f	920	uint8_t is_mlc5 : 1;
cparata	0:f27ce43dee4f	921	uint8_t is_mlc6 : 1;
cparata	0:f27ce43dee4f	922	uint8_t is_mlc7 : 1;
cparata	0:f27ce43dee4f	923	uint8_t is_mlc8 : 1;
cparata	0:f27ce43dee4f	924	} lsm6dsox_mlc_status_t;
cparata	0:f27ce43dee4f	925
cparata	0:f27ce43dee4f	926	#define LSM6DSOX_PAGE_RW 0x17U
cparata	0:f27ce43dee4f	927	typedef struct {
cparata	0:f27ce43dee4f	928	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	929	uint8_t page_rw : 2; /* page_write + page_read */
cparata	0:f27ce43dee4f	930	uint8_t emb_func_lir : 1;
cparata	0:f27ce43dee4f	931	} lsm6dsox_page_rw_t;
cparata	0:f27ce43dee4f	932
cparata	0:f27ce43dee4f	933	#define LSM6DSOX_EMB_FUNC_FIFO_CFG 0x44U
cparata	0:f27ce43dee4f	934	typedef struct {
cparata	0:f27ce43dee4f	935	uint8_t not_used_00 : 6;
cparata	0:f27ce43dee4f	936	uint8_t pedo_fifo_en : 1;
cparata	0:f27ce43dee4f	937	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	938	} lsm6dsox_emb_func_fifo_cfg_t;
cparata	0:f27ce43dee4f	939
cparata	0:f27ce43dee4f	940	#define LSM6DSOX_FSM_ENABLE_A 0x46U
cparata	0:f27ce43dee4f	941	typedef struct {
cparata	0:f27ce43dee4f	942	uint8_t fsm1_en : 1;
cparata	0:f27ce43dee4f	943	uint8_t fsm2_en : 1;
cparata	0:f27ce43dee4f	944	uint8_t fsm3_en : 1;
cparata	0:f27ce43dee4f	945	uint8_t fsm4_en : 1;
cparata	0:f27ce43dee4f	946	uint8_t fsm5_en : 1;
cparata	0:f27ce43dee4f	947	uint8_t fsm6_en : 1;
cparata	0:f27ce43dee4f	948	uint8_t fsm7_en : 1;
cparata	0:f27ce43dee4f	949	uint8_t fsm8_en : 1;
cparata	0:f27ce43dee4f	950	} lsm6dsox_fsm_enable_a_t;
cparata	0:f27ce43dee4f	951
cparata	0:f27ce43dee4f	952	#define LSM6DSOX_FSM_ENABLE_B 0x47U
cparata	0:f27ce43dee4f	953	typedef struct {
cparata	0:f27ce43dee4f	954	uint8_t fsm9_en : 1;
cparata	0:f27ce43dee4f	955	uint8_t fsm10_en : 1;
cparata	0:f27ce43dee4f	956	uint8_t fsm11_en : 1;
cparata	0:f27ce43dee4f	957	uint8_t fsm12_en : 1;
cparata	0:f27ce43dee4f	958	uint8_t fsm13_en : 1;
cparata	0:f27ce43dee4f	959	uint8_t fsm14_en : 1;
cparata	0:f27ce43dee4f	960	uint8_t fsm15_en : 1;
cparata	0:f27ce43dee4f	961	uint8_t fsm16_en : 1;
cparata	0:f27ce43dee4f	962	} lsm6dsox_fsm_enable_b_t;
cparata	0:f27ce43dee4f	963
cparata	0:f27ce43dee4f	964	#define LSM6DSOX_FSM_LONG_COUNTER_L 0x48U
cparata	0:f27ce43dee4f	965	#define LSM6DSOX_FSM_LONG_COUNTER_H 0x49U
cparata	0:f27ce43dee4f	966	#define LSM6DSOX_FSM_LONG_COUNTER_CLEAR 0x4AU
cparata	0:f27ce43dee4f	967	typedef struct {
cparata	0:f27ce43dee4f	968	uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */
cparata	0:f27ce43dee4f	969	uint8_t not_used_01 : 6;
cparata	0:f27ce43dee4f	970	} lsm6dsox_fsm_long_counter_clear_t;
cparata	0:f27ce43dee4f	971
cparata	0:f27ce43dee4f	972	#define LSM6DSOX_FSM_OUTS1 0x4CU
cparata	0:f27ce43dee4f	973	typedef struct {
cparata	0:f27ce43dee4f	974	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	975	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	976	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	977	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	978	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	979	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	980	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	981	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	982	} lsm6dsox_fsm_outs1_t;
cparata	0:f27ce43dee4f	983
cparata	0:f27ce43dee4f	984	#define LSM6DSOX_FSM_OUTS2 0x4DU
cparata	0:f27ce43dee4f	985	typedef struct {
cparata	0:f27ce43dee4f	986	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	987	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	988	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	989	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	990	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	991	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	992	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	993	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	994	} lsm6dsox_fsm_outs2_t;
cparata	0:f27ce43dee4f	995
cparata	0:f27ce43dee4f	996	#define LSM6DSOX_FSM_OUTS3 0x4EU
cparata	0:f27ce43dee4f	997	typedef struct {
cparata	0:f27ce43dee4f	998	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	999	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1000	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1001	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1002	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1003	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1004	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1005	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1006	} lsm6dsox_fsm_outs3_t;
cparata	0:f27ce43dee4f	1007
cparata	0:f27ce43dee4f	1008	#define LSM6DSOX_FSM_OUTS4 0x4FU
cparata	0:f27ce43dee4f	1009	typedef struct {
cparata	0:f27ce43dee4f	1010	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1011	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1012	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1013	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1014	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1015	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1016	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1017	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1018	} lsm6dsox_fsm_outs4_t;
cparata	0:f27ce43dee4f	1019
cparata	0:f27ce43dee4f	1020	#define LSM6DSOX_FSM_OUTS5 0x50U
cparata	0:f27ce43dee4f	1021	typedef struct {
cparata	0:f27ce43dee4f	1022	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1023	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1024	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1025	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1026	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1027	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1028	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1029	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1030	} lsm6dsox_fsm_outs5_t;
cparata	0:f27ce43dee4f	1031
cparata	0:f27ce43dee4f	1032	#define LSM6DSOX_FSM_OUTS6 0x51U
cparata	0:f27ce43dee4f	1033	typedef struct {
cparata	0:f27ce43dee4f	1034	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1035	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1036	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1037	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1038	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1039	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1040	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1041	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1042	} lsm6dsox_fsm_outs6_t;
cparata	0:f27ce43dee4f	1043
cparata	0:f27ce43dee4f	1044	#define LSM6DSOX_FSM_OUTS7 0x52U
cparata	0:f27ce43dee4f	1045	typedef struct {
cparata	0:f27ce43dee4f	1046	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1047	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1048	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1049	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1050	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1051	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1052	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1053	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1054	} lsm6dsox_fsm_outs7_t;
cparata	0:f27ce43dee4f	1055
cparata	0:f27ce43dee4f	1056	#define LSM6DSOX_FSM_OUTS8 0x53U
cparata	0:f27ce43dee4f	1057	typedef struct {
cparata	0:f27ce43dee4f	1058	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1059	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1060	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1061	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1062	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1063	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1064	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1065	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1066	} lsm6dsox_fsm_outs8_t;
cparata	0:f27ce43dee4f	1067
cparata	0:f27ce43dee4f	1068	#define LSM6DSOX_FSM_OUTS9 0x54U
cparata	0:f27ce43dee4f	1069	typedef struct {
cparata	0:f27ce43dee4f	1070	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1071	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1072	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1073	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1074	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1075	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1076	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1077	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1078	} lsm6dsox_fsm_outs9_t;
cparata	0:f27ce43dee4f	1079
cparata	0:f27ce43dee4f	1080	#define LSM6DSOX_FSM_OUTS10 0x55U
cparata	0:f27ce43dee4f	1081	typedef struct {
cparata	0:f27ce43dee4f	1082	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1083	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1084	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1085	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1086	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1087	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1088	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1089	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1090	} lsm6dsox_fsm_outs10_t;
cparata	0:f27ce43dee4f	1091
cparata	0:f27ce43dee4f	1092	#define LSM6DSOX_FSM_OUTS11 0x56U
cparata	0:f27ce43dee4f	1093	typedef struct {
cparata	0:f27ce43dee4f	1094	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1095	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1096	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1097	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1098	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1099	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1100	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1101	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1102	} lsm6dsox_fsm_outs11_t;
cparata	0:f27ce43dee4f	1103
cparata	0:f27ce43dee4f	1104	#define LSM6DSOX_FSM_OUTS12 0x57U
cparata	0:f27ce43dee4f	1105	typedef struct {
cparata	0:f27ce43dee4f	1106	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1107	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1108	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1109	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1110	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1111	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1112	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1113	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1114	} lsm6dsox_fsm_outs12_t;
cparata	0:f27ce43dee4f	1115
cparata	0:f27ce43dee4f	1116	#define LSM6DSOX_FSM_OUTS13 0x58U
cparata	0:f27ce43dee4f	1117	typedef struct {
cparata	0:f27ce43dee4f	1118	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1119	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1120	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1121	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1122	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1123	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1124	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1125	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1126	} lsm6dsox_fsm_outs13_t;
cparata	0:f27ce43dee4f	1127
cparata	0:f27ce43dee4f	1128	#define LSM6DSOX_FSM_OUTS14 0x59U
cparata	0:f27ce43dee4f	1129	typedef struct {
cparata	0:f27ce43dee4f	1130	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1131	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1132	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1133	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1134	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1135	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1136	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1137	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1138	} lsm6dsox_fsm_outs14_t;
cparata	0:f27ce43dee4f	1139
cparata	0:f27ce43dee4f	1140	#define LSM6DSOX_FSM_OUTS15 0x5AU
cparata	0:f27ce43dee4f	1141	typedef struct {
cparata	0:f27ce43dee4f	1142	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1143	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1144	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1145	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1146	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1147	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1148	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1149	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1150	} lsm6dsox_fsm_outs15_t;
cparata	0:f27ce43dee4f	1151
cparata	0:f27ce43dee4f	1152	#define LSM6DSOX_FSM_OUTS16 0x5BU
cparata	0:f27ce43dee4f	1153	typedef struct {
cparata	0:f27ce43dee4f	1154	uint8_t n_v : 1;
cparata	0:f27ce43dee4f	1155	uint8_t p_v : 1;
cparata	0:f27ce43dee4f	1156	uint8_t n_z : 1;
cparata	0:f27ce43dee4f	1157	uint8_t p_z : 1;
cparata	0:f27ce43dee4f	1158	uint8_t n_y : 1;
cparata	0:f27ce43dee4f	1159	uint8_t p_y : 1;
cparata	0:f27ce43dee4f	1160	uint8_t n_x : 1;
cparata	0:f27ce43dee4f	1161	uint8_t p_x : 1;
cparata	0:f27ce43dee4f	1162	} lsm6dsox_fsm_outs16_t;
cparata	0:f27ce43dee4f	1163
cparata	0:f27ce43dee4f	1164	#define LSM6DSOX_EMB_FUNC_ODR_CFG_B 0x5FU
cparata	0:f27ce43dee4f	1165	typedef struct {
cparata	0:f27ce43dee4f	1166	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	1167	uint8_t fsm_odr : 2;
cparata	0:f27ce43dee4f	1168	uint8_t not_used_02 : 3;
cparata	0:f27ce43dee4f	1169	} lsm6dsox_emb_func_odr_cfg_b_t;
cparata	0:f27ce43dee4f	1170
cparata	0:f27ce43dee4f	1171	#define LSM6DSOX_EMB_FUNC_ODR_CFG_C 0x60U
cparata	0:f27ce43dee4f	1172	typedef struct {
cparata	0:f27ce43dee4f	1173	uint8_t not_used_01 : 4;
cparata	0:f27ce43dee4f	1174	uint8_t mlc_odr : 2;
cparata	0:f27ce43dee4f	1175	uint8_t not_used_02 : 2;
cparata	0:f27ce43dee4f	1176	} lsm6dsox_emb_func_odr_cfg_c_t;
cparata	0:f27ce43dee4f	1177
cparata	0:f27ce43dee4f	1178	#define LSM6DSOX_STEP_COUNTER_L 0x62U
cparata	0:f27ce43dee4f	1179	#define LSM6DSOX_STEP_COUNTER_H 0x63U
cparata	0:f27ce43dee4f	1180	#define LSM6DSOX_EMB_FUNC_SRC 0x64U
cparata	0:f27ce43dee4f	1181	typedef struct {
cparata	0:f27ce43dee4f	1182	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	1183	uint8_t stepcounter_bit_set : 1;
cparata	0:f27ce43dee4f	1184	uint8_t step_overflow : 1;
cparata	0:f27ce43dee4f	1185	uint8_t step_count_delta_ia : 1;
cparata	0:f27ce43dee4f	1186	uint8_t step_detected : 1;
cparata	0:f27ce43dee4f	1187	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	1188	uint8_t pedo_rst_step : 1;
cparata	0:f27ce43dee4f	1189	} lsm6dsox_emb_func_src_t;
cparata	0:f27ce43dee4f	1190
cparata	0:f27ce43dee4f	1191	#define LSM6DSOX_EMB_FUNC_INIT_A 0x66U
cparata	0:f27ce43dee4f	1192	typedef struct {
cparata	0:f27ce43dee4f	1193	uint8_t not_used_01 : 3;
cparata	0:f27ce43dee4f	1194	uint8_t step_det_init : 1;
cparata	0:f27ce43dee4f	1195	uint8_t tilt_init : 1;
cparata	0:f27ce43dee4f	1196	uint8_t sig_mot_init : 1;
cparata	0:f27ce43dee4f	1197	uint8_t not_used_02 : 2;
cparata	0:f27ce43dee4f	1198	} lsm6dsox_emb_func_init_a_t;
cparata	0:f27ce43dee4f	1199
cparata	0:f27ce43dee4f	1200	#define LSM6DSOX_EMB_FUNC_INIT_B 0x67U
cparata	0:f27ce43dee4f	1201	typedef struct {
cparata	0:f27ce43dee4f	1202	uint8_t fsm_init : 1;
cparata	0:f27ce43dee4f	1203	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	1204	uint8_t fifo_compr_init : 1;
cparata	1:fe40aec6e97a	1205	uint8_t mlc_init : 1;
cparata	1:fe40aec6e97a	1206	uint8_t not_used_02 : 3;
cparata	0:f27ce43dee4f	1207	} lsm6dsox_emb_func_init_b_t;
cparata	0:f27ce43dee4f	1208
cparata	0:f27ce43dee4f	1209	#define LSM6DSOX_MLC0_SRC 0x70U
cparata	0:f27ce43dee4f	1210	#define LSM6DSOX_MLC1_SRC 0x71U
cparata	0:f27ce43dee4f	1211	#define LSM6DSOX_MLC2_SRC 0x72U
cparata	0:f27ce43dee4f	1212	#define LSM6DSOX_MLC3_SRC 0x73U
cparata	0:f27ce43dee4f	1213	#define LSM6DSOX_MLC4_SRC 0x74U
cparata	0:f27ce43dee4f	1214	#define LSM6DSOX_MLC5_SRC 0x75U
cparata	0:f27ce43dee4f	1215	#define LSM6DSOX_MLC6_SRC 0x76U
cparata	0:f27ce43dee4f	1216	#define LSM6DSOX_MLC7_SRC 0x77U
cparata	0:f27ce43dee4f	1217	#define LSM6DSOX_MAG_SENSITIVITY_L 0xBAU
cparata	0:f27ce43dee4f	1218	#define LSM6DSOX_MAG_SENSITIVITY_H 0xBBU
cparata	0:f27ce43dee4f	1219	#define LSM6DSOX_MAG_OFFX_L 0xC0U
cparata	0:f27ce43dee4f	1220	#define LSM6DSOX_MAG_OFFX_H 0xC1U
cparata	0:f27ce43dee4f	1221	#define LSM6DSOX_MAG_OFFY_L 0xC2U
cparata	0:f27ce43dee4f	1222	#define LSM6DSOX_MAG_OFFY_H 0xC3U
cparata	0:f27ce43dee4f	1223	#define LSM6DSOX_MAG_OFFZ_L 0xC4U
cparata	0:f27ce43dee4f	1224	#define LSM6DSOX_MAG_OFFZ_H 0xC5U
cparata	0:f27ce43dee4f	1225	#define LSM6DSOX_MAG_SI_XX_L 0xC6U
cparata	0:f27ce43dee4f	1226	#define LSM6DSOX_MAG_SI_XX_H 0xC7U
cparata	0:f27ce43dee4f	1227	#define LSM6DSOX_MAG_SI_XY_L 0xC8U
cparata	0:f27ce43dee4f	1228	#define LSM6DSOX_MAG_SI_XY_H 0xC9U
cparata	0:f27ce43dee4f	1229	#define LSM6DSOX_MAG_SI_XZ_L 0xCAU
cparata	0:f27ce43dee4f	1230	#define LSM6DSOX_MAG_SI_XZ_H 0xCBU
cparata	0:f27ce43dee4f	1231	#define LSM6DSOX_MAG_SI_YY_L 0xCCU
cparata	0:f27ce43dee4f	1232	#define LSM6DSOX_MAG_SI_YY_H 0xCDU
cparata	0:f27ce43dee4f	1233	#define LSM6DSOX_MAG_SI_YZ_L 0xCEU
cparata	0:f27ce43dee4f	1234	#define LSM6DSOX_MAG_SI_YZ_H 0xCFU
cparata	0:f27ce43dee4f	1235	#define LSM6DSOX_MAG_SI_ZZ_L 0xD0U
cparata	0:f27ce43dee4f	1236	#define LSM6DSOX_MAG_SI_ZZ_H 0xD1U
cparata	0:f27ce43dee4f	1237	#define LSM6DSOX_MAG_CFG_A 0xD4U
cparata	0:f27ce43dee4f	1238	typedef struct {
cparata	0:f27ce43dee4f	1239	uint8_t mag_z_axis : 3;
cparata	0:f27ce43dee4f	1240	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	1241	uint8_t mag_y_axis : 3;
cparata	0:f27ce43dee4f	1242	uint8_t not_used_02 : 1;
cparata	0:f27ce43dee4f	1243	} lsm6dsox_mag_cfg_a_t;
cparata	0:f27ce43dee4f	1244
cparata	0:f27ce43dee4f	1245	#define LSM6DSOX_MAG_CFG_B 0xD5U
cparata	0:f27ce43dee4f	1246	typedef struct {
cparata	0:f27ce43dee4f	1247	uint8_t mag_x_axis : 3;
cparata	0:f27ce43dee4f	1248	uint8_t not_used_01 : 5;
cparata	0:f27ce43dee4f	1249	} lsm6dsox_mag_cfg_b_t;
cparata	0:f27ce43dee4f	1250
cparata	0:f27ce43dee4f	1251	#define LSM6DSOX_FSM_LC_TIMEOUT_L 0x17AU
cparata	0:f27ce43dee4f	1252	#define LSM6DSOX_FSM_LC_TIMEOUT_H 0x17BU
cparata	0:f27ce43dee4f	1253	#define LSM6DSOX_FSM_PROGRAMS 0x17CU
cparata	0:f27ce43dee4f	1254	#define LSM6DSOX_FSM_START_ADD_L 0x17EU
cparata	0:f27ce43dee4f	1255	#define LSM6DSOX_FSM_START_ADD_H 0x17FU
cparata	0:f27ce43dee4f	1256	#define LSM6DSOX_PEDO_CMD_REG 0x183U
cparata	0:f27ce43dee4f	1257	typedef struct {
cparata	0:f27ce43dee4f	1258	uint8_t ad_det_en : 1;
cparata	0:f27ce43dee4f	1259	uint8_t not_used_01 : 1;
cparata	0:f27ce43dee4f	1260	uint8_t fp_rejection_en : 1;
cparata	0:f27ce43dee4f	1261	uint8_t carry_count_en : 1;
cparata	0:f27ce43dee4f	1262	uint8_t not_used_02 : 4;
cparata	0:f27ce43dee4f	1263	} lsm6dsox_pedo_cmd_reg_t;
cparata	0:f27ce43dee4f	1264
cparata	0:f27ce43dee4f	1265	#define LSM6DSOX_PEDO_DEB_STEPS_CONF 0x184U
cparata	0:f27ce43dee4f	1266	#define LSM6DSOX_PEDO_SC_DELTAT_L 0x1D0U
cparata	0:f27ce43dee4f	1267	#define LSM6DSOX_PEDO_SC_DELTAT_H 0x1D1U
cparata	0:f27ce43dee4f	1268
cparata	0:f27ce43dee4f	1269	#define LSM6DSOX_MLC_MAG_SENSITIVITY_L 0x1E8U
cparata	0:f27ce43dee4f	1270	#define LSM6DSOX_MLC_MAG_SENSITIVITY_H 0x1E9U
cparata	0:f27ce43dee4f	1271
cparata	0:f27ce43dee4f	1272	#define LSM6DSOX_SENSOR_HUB_1 0x02U
cparata	0:f27ce43dee4f	1273	typedef struct {
cparata	0:f27ce43dee4f	1274	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1275	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1276	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1277	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1278	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1279	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1280	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1281	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1282	} lsm6dsox_sensor_hub_1_t;
cparata	0:f27ce43dee4f	1283
cparata	0:f27ce43dee4f	1284	#define LSM6DSOX_SENSOR_HUB_2 0x03U
cparata	0:f27ce43dee4f	1285	typedef struct {
cparata	0:f27ce43dee4f	1286	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1287	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1288	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1289	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1290	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1291	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1292	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1293	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1294	} lsm6dsox_sensor_hub_2_t;
cparata	0:f27ce43dee4f	1295
cparata	0:f27ce43dee4f	1296	#define LSM6DSOX_SENSOR_HUB_3 0x04U
cparata	0:f27ce43dee4f	1297	typedef struct {
cparata	0:f27ce43dee4f	1298	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1299	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1300	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1301	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1302	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1303	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1304	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1305	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1306	} lsm6dsox_sensor_hub_3_t;
cparata	0:f27ce43dee4f	1307
cparata	0:f27ce43dee4f	1308	#define LSM6DSOX_SENSOR_HUB_4 0x05U
cparata	0:f27ce43dee4f	1309	typedef struct {
cparata	0:f27ce43dee4f	1310	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1311	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1312	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1313	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1314	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1315	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1316	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1317	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1318	} lsm6dsox_sensor_hub_4_t;
cparata	0:f27ce43dee4f	1319
cparata	0:f27ce43dee4f	1320	#define LSM6DSOX_SENSOR_HUB_5 0x06U
cparata	0:f27ce43dee4f	1321	typedef struct {
cparata	0:f27ce43dee4f	1322	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1323	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1324	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1325	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1326	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1327	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1328	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1329	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1330	} lsm6dsox_sensor_hub_5_t;
cparata	0:f27ce43dee4f	1331
cparata	0:f27ce43dee4f	1332	#define LSM6DSOX_SENSOR_HUB_6 0x07U
cparata	0:f27ce43dee4f	1333	typedef struct {
cparata	0:f27ce43dee4f	1334	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1335	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1336	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1337	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1338	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1339	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1340	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1341	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1342	} lsm6dsox_sensor_hub_6_t;
cparata	0:f27ce43dee4f	1343
cparata	0:f27ce43dee4f	1344	#define LSM6DSOX_SENSOR_HUB_7 0x08U
cparata	0:f27ce43dee4f	1345	typedef struct {
cparata	0:f27ce43dee4f	1346	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1347	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1348	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1349	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1350	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1351	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1352	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1353	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1354	} lsm6dsox_sensor_hub_7_t;
cparata	0:f27ce43dee4f	1355
cparata	0:f27ce43dee4f	1356	#define LSM6DSOX_SENSOR_HUB_8 0x09U
cparata	0:f27ce43dee4f	1357	typedef struct {
cparata	0:f27ce43dee4f	1358	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1359	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1360	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1361	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1362	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1363	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1364	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1365	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1366	} lsm6dsox_sensor_hub_8_t;
cparata	0:f27ce43dee4f	1367
cparata	0:f27ce43dee4f	1368	#define LSM6DSOX_SENSOR_HUB_9 0x0AU
cparata	0:f27ce43dee4f	1369	typedef struct {
cparata	0:f27ce43dee4f	1370	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1371	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1372	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1373	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1374	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1375	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1376	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1377	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1378	} lsm6dsox_sensor_hub_9_t;
cparata	0:f27ce43dee4f	1379
cparata	0:f27ce43dee4f	1380	#define LSM6DSOX_SENSOR_HUB_10 0x0BU
cparata	0:f27ce43dee4f	1381	typedef struct {
cparata	0:f27ce43dee4f	1382	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1383	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1384	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1385	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1386	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1387	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1388	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1389	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1390	} lsm6dsox_sensor_hub_10_t;
cparata	0:f27ce43dee4f	1391
cparata	0:f27ce43dee4f	1392	#define LSM6DSOX_SENSOR_HUB_11 0x0CU
cparata	0:f27ce43dee4f	1393	typedef struct {
cparata	0:f27ce43dee4f	1394	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1395	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1396	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1397	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1398	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1399	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1400	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1401	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1402	} lsm6dsox_sensor_hub_11_t;
cparata	0:f27ce43dee4f	1403
cparata	0:f27ce43dee4f	1404	#define LSM6DSOX_SENSOR_HUB_12 0x0DU
cparata	0:f27ce43dee4f	1405	typedef struct {
cparata	0:f27ce43dee4f	1406	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1407	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1408	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1409	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1410	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1411	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1412	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1413	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1414	} lsm6dsox_sensor_hub_12_t;
cparata	0:f27ce43dee4f	1415
cparata	0:f27ce43dee4f	1416	#define LSM6DSOX_SENSOR_HUB_13 0x0EU
cparata	0:f27ce43dee4f	1417	typedef struct {
cparata	0:f27ce43dee4f	1418	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1419	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1420	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1421	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1422	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1423	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1424	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1425	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1426	} lsm6dsox_sensor_hub_13_t;
cparata	0:f27ce43dee4f	1427
cparata	0:f27ce43dee4f	1428	#define LSM6DSOX_SENSOR_HUB_14 0x0FU
cparata	0:f27ce43dee4f	1429	typedef struct {
cparata	0:f27ce43dee4f	1430	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1431	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1432	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1433	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1434	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1435	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1436	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1437	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1438	} lsm6dsox_sensor_hub_14_t;
cparata	0:f27ce43dee4f	1439
cparata	0:f27ce43dee4f	1440	#define LSM6DSOX_SENSOR_HUB_15 0x10U
cparata	0:f27ce43dee4f	1441	typedef struct {
cparata	0:f27ce43dee4f	1442	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1443	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1444	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1445	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1446	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1447	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1448	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1449	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1450	} lsm6dsox_sensor_hub_15_t;
cparata	0:f27ce43dee4f	1451
cparata	0:f27ce43dee4f	1452	#define LSM6DSOX_SENSOR_HUB_16 0x11U
cparata	0:f27ce43dee4f	1453	typedef struct {
cparata	0:f27ce43dee4f	1454	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1455	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1456	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1457	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1458	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1459	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1460	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1461	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1462	} lsm6dsox_sensor_hub_16_t;
cparata	0:f27ce43dee4f	1463
cparata	0:f27ce43dee4f	1464	#define LSM6DSOX_SENSOR_HUB_17 0x12U
cparata	0:f27ce43dee4f	1465	typedef struct {
cparata	0:f27ce43dee4f	1466	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1467	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1468	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1469	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1470	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1471	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1472	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1473	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1474	} lsm6dsox_sensor_hub_17_t;
cparata	0:f27ce43dee4f	1475
cparata	0:f27ce43dee4f	1476	#define LSM6DSOX_SENSOR_HUB_18 0x13U
cparata	0:f27ce43dee4f	1477	typedef struct {
cparata	0:f27ce43dee4f	1478	uint8_t bit0 : 1;
cparata	0:f27ce43dee4f	1479	uint8_t bit1 : 1;
cparata	0:f27ce43dee4f	1480	uint8_t bit2 : 1;
cparata	0:f27ce43dee4f	1481	uint8_t bit3 : 1;
cparata	0:f27ce43dee4f	1482	uint8_t bit4 : 1;
cparata	0:f27ce43dee4f	1483	uint8_t bit5 : 1;
cparata	0:f27ce43dee4f	1484	uint8_t bit6 : 1;
cparata	0:f27ce43dee4f	1485	uint8_t bit7 : 1;
cparata	0:f27ce43dee4f	1486	} lsm6dsox_sensor_hub_18_t;
cparata	0:f27ce43dee4f	1487
cparata	0:f27ce43dee4f	1488	#define LSM6DSOX_MASTER_CONFIG 0x14U
cparata	0:f27ce43dee4f	1489	typedef struct {
cparata	0:f27ce43dee4f	1490	uint8_t aux_sens_on : 2;
cparata	0:f27ce43dee4f	1491	uint8_t master_on : 1;
cparata	0:f27ce43dee4f	1492	uint8_t shub_pu_en : 1;
cparata	0:f27ce43dee4f	1493	uint8_t pass_through_mode : 1;
cparata	0:f27ce43dee4f	1494	uint8_t start_config : 1;
cparata	0:f27ce43dee4f	1495	uint8_t write_once : 1;
cparata	0:f27ce43dee4f	1496	uint8_t rst_master_regs : 1;
cparata	0:f27ce43dee4f	1497	} lsm6dsox_master_config_t;
cparata	0:f27ce43dee4f	1498
cparata	0:f27ce43dee4f	1499	#define LSM6DSOX_SLV0_ADD 0x15U
cparata	0:f27ce43dee4f	1500	typedef struct {
cparata	0:f27ce43dee4f	1501	uint8_t rw_0 : 1;
cparata	0:f27ce43dee4f	1502	uint8_t slave0 : 7;
cparata	0:f27ce43dee4f	1503	} lsm6dsox_slv0_add_t;
cparata	0:f27ce43dee4f	1504
cparata	0:f27ce43dee4f	1505	#define LSM6DSOX_SLV0_SUBADD 0x16U
cparata	0:f27ce43dee4f	1506	typedef struct {
cparata	0:f27ce43dee4f	1507	uint8_t slave0_reg : 8;
cparata	0:f27ce43dee4f	1508	} lsm6dsox_slv0_subadd_t;
cparata	0:f27ce43dee4f	1509
cparata	0:f27ce43dee4f	1510	#define LSM6DSOX_SLV0_CONFIG 0x17U
cparata	0:f27ce43dee4f	1511	typedef struct {
cparata	0:f27ce43dee4f	1512	uint8_t slave0_numop : 3;
cparata	0:f27ce43dee4f	1513	uint8_t batch_ext_sens_0_en : 1;
cparata	0:f27ce43dee4f	1514	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	1515	uint8_t shub_odr : 2;
cparata	0:f27ce43dee4f	1516	} lsm6dsox_slv0_config_t;
cparata	0:f27ce43dee4f	1517
cparata	0:f27ce43dee4f	1518	#define LSM6DSOX_SLV1_ADD 0x18U
cparata	0:f27ce43dee4f	1519	typedef struct {
cparata	0:f27ce43dee4f	1520	uint8_t r_1 : 1;
cparata	0:f27ce43dee4f	1521	uint8_t slave1_add : 7;
cparata	0:f27ce43dee4f	1522	} lsm6dsox_slv1_add_t;
cparata	0:f27ce43dee4f	1523
cparata	0:f27ce43dee4f	1524	#define LSM6DSOX_SLV1_SUBADD 0x19U
cparata	0:f27ce43dee4f	1525	typedef struct {
cparata	0:f27ce43dee4f	1526	uint8_t slave1_reg : 8;
cparata	0:f27ce43dee4f	1527	} lsm6dsox_slv1_subadd_t;
cparata	0:f27ce43dee4f	1528
cparata	0:f27ce43dee4f	1529	#define LSM6DSOX_SLV1_CONFIG 0x1AU
cparata	0:f27ce43dee4f	1530	typedef struct {
cparata	0:f27ce43dee4f	1531	uint8_t slave1_numop : 3;
cparata	0:f27ce43dee4f	1532	uint8_t batch_ext_sens_1_en : 1;
cparata	0:f27ce43dee4f	1533	uint8_t not_used_01 : 4;
cparata	0:f27ce43dee4f	1534	} lsm6dsox_slv1_config_t;
cparata	0:f27ce43dee4f	1535
cparata	0:f27ce43dee4f	1536	#define LSM6DSOX_SLV2_ADD 0x1BU
cparata	0:f27ce43dee4f	1537	typedef struct {
cparata	0:f27ce43dee4f	1538	uint8_t r_2 : 1;
cparata	0:f27ce43dee4f	1539	uint8_t slave2_add : 7;
cparata	0:f27ce43dee4f	1540	} lsm6dsox_slv2_add_t;
cparata	0:f27ce43dee4f	1541
cparata	0:f27ce43dee4f	1542	#define LSM6DSOX_SLV2_SUBADD 0x1CU
cparata	0:f27ce43dee4f	1543	typedef struct {
cparata	0:f27ce43dee4f	1544	uint8_t slave2_reg : 8;
cparata	0:f27ce43dee4f	1545	} lsm6dsox_slv2_subadd_t;
cparata	0:f27ce43dee4f	1546
cparata	0:f27ce43dee4f	1547	#define LSM6DSOX_SLV2_CONFIG 0x1DU
cparata	0:f27ce43dee4f	1548	typedef struct {
cparata	0:f27ce43dee4f	1549	uint8_t slave2_numop : 3;
cparata	0:f27ce43dee4f	1550	uint8_t batch_ext_sens_2_en : 1;
cparata	0:f27ce43dee4f	1551	uint8_t not_used_01 : 4;
cparata	0:f27ce43dee4f	1552	} lsm6dsox_slv2_config_t;
cparata	0:f27ce43dee4f	1553
cparata	0:f27ce43dee4f	1554	#define LSM6DSOX_SLV3_ADD 0x1EU
cparata	0:f27ce43dee4f	1555	typedef struct {
cparata	0:f27ce43dee4f	1556	uint8_t r_3 : 1;
cparata	0:f27ce43dee4f	1557	uint8_t slave3_add : 7;
cparata	0:f27ce43dee4f	1558	} lsm6dsox_slv3_add_t;
cparata	0:f27ce43dee4f	1559
cparata	0:f27ce43dee4f	1560	#define LSM6DSOX_SLV3_SUBADD 0x1FU
cparata	0:f27ce43dee4f	1561	typedef struct {
cparata	0:f27ce43dee4f	1562	uint8_t slave3_reg : 8;
cparata	0:f27ce43dee4f	1563	} lsm6dsox_slv3_subadd_t;
cparata	0:f27ce43dee4f	1564
cparata	0:f27ce43dee4f	1565	#define LSM6DSOX_SLV3_CONFIG 0x20U
cparata	0:f27ce43dee4f	1566	typedef struct {
cparata	0:f27ce43dee4f	1567	uint8_t slave3_numop : 3;
cparata	0:f27ce43dee4f	1568	uint8_t batch_ext_sens_3_en : 1;
cparata	0:f27ce43dee4f	1569	uint8_t not_used_01 : 4;
cparata	0:f27ce43dee4f	1570	} lsm6dsox_slv3_config_t;
cparata	0:f27ce43dee4f	1571
cparata	0:f27ce43dee4f	1572	#define LSM6DSOX_DATAWRITE_SLV0 0x21U
cparata	0:f27ce43dee4f	1573	typedef struct {
cparata	0:f27ce43dee4f	1574	uint8_t slave0_dataw : 8;
cparata	0:f27ce43dee4f	1575	} lsm6dsox_datawrite_slv0_t;
cparata	0:f27ce43dee4f	1576
cparata	0:f27ce43dee4f	1577	#define LSM6DSOX_STATUS_MASTER 0x22U
cparata	0:f27ce43dee4f	1578	typedef struct {
cparata	0:f27ce43dee4f	1579	uint8_t sens_hub_endop : 1;
cparata	0:f27ce43dee4f	1580	uint8_t not_used_01 : 2;
cparata	0:f27ce43dee4f	1581	uint8_t slave0_nack : 1;
cparata	0:f27ce43dee4f	1582	uint8_t slave1_nack : 1;
cparata	0:f27ce43dee4f	1583	uint8_t slave2_nack : 1;
cparata	0:f27ce43dee4f	1584	uint8_t slave3_nack : 1;
cparata	0:f27ce43dee4f	1585	uint8_t wr_once_done : 1;
cparata	0:f27ce43dee4f	1586	} lsm6dsox_status_master_t;
cparata	0:f27ce43dee4f	1587
cparata	0:f27ce43dee4f	1588	#define LSM6DSOX_START_FSM_ADD 0x0400U
cparata	0:f27ce43dee4f	1589
cparata	0:f27ce43dee4f	1590	/**
cparata	0:f27ce43dee4f	1591	* @defgroup LSM6DSOX_Register_Union
cparata	0:f27ce43dee4f	1592	* @brief This union group all the registers that has a bitfield
cparata	0:f27ce43dee4f	1593	* description.
cparata	0:f27ce43dee4f	1594	* This union is useful but not need by the driver.
cparata	0:f27ce43dee4f	1595	*
cparata	0:f27ce43dee4f	1596	* REMOVING this union you are compliant with:
cparata	0:f27ce43dee4f	1597	* MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata	0:f27ce43dee4f	1598	*
cparata	0:f27ce43dee4f	1599	* @{
cparata	0:f27ce43dee4f	1600	*
cparata	0:f27ce43dee4f	1601	*/
cparata	0:f27ce43dee4f	1602	typedef union{
cparata	0:f27ce43dee4f	1603	lsm6dsox_func_cfg_access_t func_cfg_access;
cparata	0:f27ce43dee4f	1604	lsm6dsox_pin_ctrl_t pin_ctrl;
cparata	0:f27ce43dee4f	1605	lsm6dsox_s4s_tph_l_t s4s_tph_l;
cparata	0:f27ce43dee4f	1606	lsm6dsox_s4s_tph_h_t s4s_tph_h;
cparata	0:f27ce43dee4f	1607	lsm6dsox_s4s_rr_t s4s_rr;
cparata	0:f27ce43dee4f	1608	lsm6dsox_fifo_ctrl1_t fifo_ctrl1;
cparata	0:f27ce43dee4f	1609	lsm6dsox_fifo_ctrl2_t fifo_ctrl2;
cparata	0:f27ce43dee4f	1610	lsm6dsox_fifo_ctrl3_t fifo_ctrl3;
cparata	0:f27ce43dee4f	1611	lsm6dsox_fifo_ctrl4_t fifo_ctrl4;
cparata	0:f27ce43dee4f	1612	lsm6dsox_counter_bdr_reg1_t counter_bdr_reg1;
cparata	0:f27ce43dee4f	1613	lsm6dsox_counter_bdr_reg2_t counter_bdr_reg2;
cparata	0:f27ce43dee4f	1614	lsm6dsox_int1_ctrl_t int1_ctrl;
cparata	0:f27ce43dee4f	1615	lsm6dsox_int2_ctrl_t int2_ctrl;
cparata	0:f27ce43dee4f	1616	lsm6dsox_ctrl1_xl_t ctrl1_xl;
cparata	0:f27ce43dee4f	1617	lsm6dsox_ctrl2_g_t ctrl2_g;
cparata	0:f27ce43dee4f	1618	lsm6dsox_ctrl3_c_t ctrl3_c;
cparata	0:f27ce43dee4f	1619	lsm6dsox_ctrl4_c_t ctrl4_c;
cparata	0:f27ce43dee4f	1620	lsm6dsox_ctrl5_c_t ctrl5_c;
cparata	0:f27ce43dee4f	1621	lsm6dsox_ctrl6_c_t ctrl6_c;
cparata	0:f27ce43dee4f	1622	lsm6dsox_ctrl7_g_t ctrl7_g;
cparata	0:f27ce43dee4f	1623	lsm6dsox_ctrl8_xl_t ctrl8_xl;
cparata	0:f27ce43dee4f	1624	lsm6dsox_ctrl9_xl_t ctrl9_xl;
cparata	0:f27ce43dee4f	1625	lsm6dsox_ctrl10_c_t ctrl10_c;
cparata	0:f27ce43dee4f	1626	lsm6dsox_all_int_src_t all_int_src;
cparata	0:f27ce43dee4f	1627	lsm6dsox_wake_up_src_t wake_up_src;
cparata	0:f27ce43dee4f	1628	lsm6dsox_tap_src_t tap_src;
cparata	0:f27ce43dee4f	1629	lsm6dsox_d6d_src_t d6d_src;
cparata	0:f27ce43dee4f	1630	lsm6dsox_status_reg_t status_reg;
cparata	0:f27ce43dee4f	1631	lsm6dsox_fifo_status1_t fifo_status1;
cparata	0:f27ce43dee4f	1632	lsm6dsox_fifo_status2_t fifo_status2;
cparata	0:f27ce43dee4f	1633	lsm6dsox_ui_status_reg_ois_t ui_status_reg_ois;
cparata	0:f27ce43dee4f	1634	lsm6dsox_tap_cfg0_t tap_cfg0;
cparata	0:f27ce43dee4f	1635	lsm6dsox_tap_cfg1_t tap_cfg1;
cparata	0:f27ce43dee4f	1636	lsm6dsox_tap_cfg2_t tap_cfg2;
cparata	0:f27ce43dee4f	1637	lsm6dsox_tap_ths_6d_t tap_ths_6d;
cparata	0:f27ce43dee4f	1638	lsm6dsox_int_dur2_t int_dur2;
cparata	0:f27ce43dee4f	1639	lsm6dsox_wake_up_ths_t wake_up_ths;
cparata	0:f27ce43dee4f	1640	lsm6dsox_wake_up_dur_t wake_up_dur;
cparata	0:f27ce43dee4f	1641	lsm6dsox_free_fall_t free_fall;
cparata	0:f27ce43dee4f	1642	lsm6dsox_md1_cfg_t md1_cfg;
cparata	0:f27ce43dee4f	1643	lsm6dsox_md2_cfg_t md2_cfg;
cparata	0:f27ce43dee4f	1644	lsm6dsox_s4s_st_cmd_code_t s4s_st_cmd_code;
cparata	0:f27ce43dee4f	1645	lsm6dsox_s4s_dt_reg_t s4s_dt_reg;
cparata	0:f27ce43dee4f	1646	lsm6dsox_i3c_bus_avb_t i3c_bus_avb;
cparata	0:f27ce43dee4f	1647	lsm6dsox_internal_freq_fine_t internal_freq_fine;
cparata	0:f27ce43dee4f	1648	lsm6dsox_ui_int_ois_t ui_int_ois;
cparata	0:f27ce43dee4f	1649	lsm6dsox_ui_ctrl1_ois_t ui_ctrl1_ois;
cparata	0:f27ce43dee4f	1650	lsm6dsox_ui_ctrl2_ois_t ui_ctrl2_ois;
cparata	0:f27ce43dee4f	1651	lsm6dsox_ui_ctrl3_ois_t ui_ctrl3_ois;
cparata	0:f27ce43dee4f	1652	lsm6dsox_fifo_data_out_tag_t fifo_data_out_tag;
cparata	0:f27ce43dee4f	1653	lsm6dsox_spi2_status_reg_ois_t spi2_status_reg_ois;
cparata	0:f27ce43dee4f	1654	lsm6dsox_spi2_int_ois_t spi2_int_ois;
cparata	0:f27ce43dee4f	1655	lsm6dsox_spi2_ctrl1_ois_t spi2_ctrl1_ois;
cparata	0:f27ce43dee4f	1656	lsm6dsox_spi2_ctrl2_ois_t spi2_ctrl2_ois;
cparata	0:f27ce43dee4f	1657	lsm6dsox_spi2_ctrl3_ois_t spi2_ctrl3_ois;
cparata	0:f27ce43dee4f	1658	lsm6dsox_page_sel_t page_sel;
cparata	0:f27ce43dee4f	1659	lsm6dsox_emb_func_en_a_t emb_func_en_a;
cparata	0:f27ce43dee4f	1660	lsm6dsox_emb_func_en_b_t emb_func_en_b;
cparata	0:f27ce43dee4f	1661	lsm6dsox_page_address_t page_address;
cparata	0:f27ce43dee4f	1662	lsm6dsox_page_value_t page_value;
cparata	0:f27ce43dee4f	1663	lsm6dsox_emb_func_int1_t emb_func_int1;
cparata	0:f27ce43dee4f	1664	lsm6dsox_fsm_int1_a_t fsm_int1_a;
cparata	0:f27ce43dee4f	1665	lsm6dsox_fsm_int1_b_t fsm_int1_b;
cparata	0:f27ce43dee4f	1666	lsm6dsox_emb_func_int2_t emb_func_int2;
cparata	0:f27ce43dee4f	1667	lsm6dsox_fsm_int2_a_t fsm_int2_a;
cparata	0:f27ce43dee4f	1668	lsm6dsox_fsm_int2_b_t fsm_int2_b;
cparata	0:f27ce43dee4f	1669	lsm6dsox_emb_func_status_t emb_func_status;
cparata	0:f27ce43dee4f	1670	lsm6dsox_fsm_status_a_t fsm_status_a;
cparata	0:f27ce43dee4f	1671	lsm6dsox_fsm_status_b_t fsm_status_b;
cparata	0:f27ce43dee4f	1672	lsm6dsox_page_rw_t page_rw;
cparata	0:f27ce43dee4f	1673	lsm6dsox_emb_func_fifo_cfg_t emb_func_fifo_cfg;
cparata	0:f27ce43dee4f	1674	lsm6dsox_fsm_enable_a_t fsm_enable_a;
cparata	0:f27ce43dee4f	1675	lsm6dsox_fsm_enable_b_t fsm_enable_b;
cparata	0:f27ce43dee4f	1676	lsm6dsox_fsm_long_counter_clear_t fsm_long_counter_clear;
cparata	0:f27ce43dee4f	1677	lsm6dsox_fsm_outs1_t fsm_outs1;
cparata	0:f27ce43dee4f	1678	lsm6dsox_fsm_outs2_t fsm_outs2;
cparata	0:f27ce43dee4f	1679	lsm6dsox_fsm_outs3_t fsm_outs3;
cparata	0:f27ce43dee4f	1680	lsm6dsox_fsm_outs4_t fsm_outs4;
cparata	0:f27ce43dee4f	1681	lsm6dsox_fsm_outs5_t fsm_outs5;
cparata	0:f27ce43dee4f	1682	lsm6dsox_fsm_outs6_t fsm_outs6;
cparata	0:f27ce43dee4f	1683	lsm6dsox_fsm_outs7_t fsm_outs7;
cparata	0:f27ce43dee4f	1684	lsm6dsox_fsm_outs8_t fsm_outs8;
cparata	0:f27ce43dee4f	1685	lsm6dsox_fsm_outs9_t fsm_outs9;
cparata	0:f27ce43dee4f	1686	lsm6dsox_fsm_outs10_t fsm_outs10;
cparata	0:f27ce43dee4f	1687	lsm6dsox_fsm_outs11_t fsm_outs11;
cparata	0:f27ce43dee4f	1688	lsm6dsox_fsm_outs12_t fsm_outs12;
cparata	0:f27ce43dee4f	1689	lsm6dsox_fsm_outs13_t fsm_outs13;
cparata	0:f27ce43dee4f	1690	lsm6dsox_fsm_outs14_t fsm_outs14;
cparata	0:f27ce43dee4f	1691	lsm6dsox_fsm_outs15_t fsm_outs15;
cparata	0:f27ce43dee4f	1692	lsm6dsox_fsm_outs16_t fsm_outs16;
cparata	0:f27ce43dee4f	1693	lsm6dsox_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
cparata	1:fe40aec6e97a	1694	lsm6dsox_emb_func_odr_cfg_c_t emb_func_odr_cfg_c;
cparata	0:f27ce43dee4f	1695	lsm6dsox_emb_func_src_t emb_func_src;
cparata	0:f27ce43dee4f	1696	lsm6dsox_emb_func_init_a_t emb_func_init_a;
cparata	0:f27ce43dee4f	1697	lsm6dsox_emb_func_init_b_t emb_func_init_b;
cparata	0:f27ce43dee4f	1698	lsm6dsox_mag_cfg_a_t mag_cfg_a;
cparata	0:f27ce43dee4f	1699	lsm6dsox_mag_cfg_b_t mag_cfg_b;
cparata	0:f27ce43dee4f	1700	lsm6dsox_pedo_cmd_reg_t pedo_cmd_reg;
cparata	0:f27ce43dee4f	1701	lsm6dsox_sensor_hub_1_t sensor_hub_1;
cparata	0:f27ce43dee4f	1702	lsm6dsox_sensor_hub_2_t sensor_hub_2;
cparata	0:f27ce43dee4f	1703	lsm6dsox_sensor_hub_3_t sensor_hub_3;
cparata	0:f27ce43dee4f	1704	lsm6dsox_sensor_hub_4_t sensor_hub_4;
cparata	0:f27ce43dee4f	1705	lsm6dsox_sensor_hub_5_t sensor_hub_5;
cparata	0:f27ce43dee4f	1706	lsm6dsox_sensor_hub_6_t sensor_hub_6;
cparata	0:f27ce43dee4f	1707	lsm6dsox_sensor_hub_7_t sensor_hub_7;
cparata	0:f27ce43dee4f	1708	lsm6dsox_sensor_hub_8_t sensor_hub_8;
cparata	0:f27ce43dee4f	1709	lsm6dsox_sensor_hub_9_t sensor_hub_9;
cparata	0:f27ce43dee4f	1710	lsm6dsox_sensor_hub_10_t sensor_hub_10;
cparata	0:f27ce43dee4f	1711	lsm6dsox_sensor_hub_11_t sensor_hub_11;
cparata	0:f27ce43dee4f	1712	lsm6dsox_sensor_hub_12_t sensor_hub_12;
cparata	0:f27ce43dee4f	1713	lsm6dsox_sensor_hub_13_t sensor_hub_13;
cparata	0:f27ce43dee4f	1714	lsm6dsox_sensor_hub_14_t sensor_hub_14;
cparata	0:f27ce43dee4f	1715	lsm6dsox_sensor_hub_15_t sensor_hub_15;
cparata	0:f27ce43dee4f	1716	lsm6dsox_sensor_hub_16_t sensor_hub_16;
cparata	0:f27ce43dee4f	1717	lsm6dsox_sensor_hub_17_t sensor_hub_17;
cparata	0:f27ce43dee4f	1718	lsm6dsox_sensor_hub_18_t sensor_hub_18;
cparata	0:f27ce43dee4f	1719	lsm6dsox_master_config_t master_config;
cparata	0:f27ce43dee4f	1720	lsm6dsox_slv0_add_t slv0_add;
cparata	0:f27ce43dee4f	1721	lsm6dsox_slv0_subadd_t slv0_subadd;
cparata	0:f27ce43dee4f	1722	lsm6dsox_slv0_config_t slv0_config;
cparata	0:f27ce43dee4f	1723	lsm6dsox_slv1_add_t slv1_add;
cparata	0:f27ce43dee4f	1724	lsm6dsox_slv1_subadd_t slv1_subadd;
cparata	0:f27ce43dee4f	1725	lsm6dsox_slv1_config_t slv1_config;
cparata	0:f27ce43dee4f	1726	lsm6dsox_slv2_add_t slv2_add;
cparata	0:f27ce43dee4f	1727	lsm6dsox_slv2_subadd_t slv2_subadd;
cparata	0:f27ce43dee4f	1728	lsm6dsox_slv2_config_t slv2_config;
cparata	0:f27ce43dee4f	1729	lsm6dsox_slv3_add_t slv3_add;
cparata	0:f27ce43dee4f	1730	lsm6dsox_slv3_subadd_t slv3_subadd;
cparata	0:f27ce43dee4f	1731	lsm6dsox_slv3_config_t slv3_config;
cparata	0:f27ce43dee4f	1732	lsm6dsox_datawrite_slv0_t datawrite_slv0;
cparata	0:f27ce43dee4f	1733	lsm6dsox_status_master_t status_master;
cparata	0:f27ce43dee4f	1734	bitwise_t bitwise;
cparata	0:f27ce43dee4f	1735	uint8_t byte;
cparata	0:f27ce43dee4f	1736	} lsm6dsox_reg_t;
cparata	0:f27ce43dee4f	1737
cparata	0:f27ce43dee4f	1738	/**
cparata	0:f27ce43dee4f	1739	* @}
cparata	0:f27ce43dee4f	1740	*
cparata	0:f27ce43dee4f	1741	*/
cparata	0:f27ce43dee4f	1742
cparata	0:f27ce43dee4f	1743	int32_t lsm6dsox_read_reg(lsm6dsox_ctx_t ctx, uint8_t reg, uint8_t data,
cparata	0:f27ce43dee4f	1744	uint16_t len);
cparata	0:f27ce43dee4f	1745	int32_t lsm6dsox_write_reg(lsm6dsox_ctx_t ctx, uint8_t reg, uint8_t data,
cparata	0:f27ce43dee4f	1746	uint16_t len);
cparata	0:f27ce43dee4f	1747
cparata	0:f27ce43dee4f	1748	extern float_t lsm6dsox_from_fs2_to_mg(int16_t lsb);
cparata	0:f27ce43dee4f	1749	extern float_t lsm6dsox_from_fs4_to_mg(int16_t lsb);
cparata	0:f27ce43dee4f	1750	extern float_t lsm6dsox_from_fs8_to_mg(int16_t lsb);
cparata	0:f27ce43dee4f	1751	extern float_t lsm6dsox_from_fs16_to_mg(int16_t lsb);
cparata	0:f27ce43dee4f	1752	extern float_t lsm6dsox_from_fs125_to_mdps(int16_t lsb);
cparata	0:f27ce43dee4f	1753	extern float_t lsm6dsox_from_fs500_to_mdps(int16_t lsb);
cparata	0:f27ce43dee4f	1754	extern float_t lsm6dsox_from_fs250_to_mdps(int16_t lsb);
cparata	0:f27ce43dee4f	1755	extern float_t lsm6dsox_from_fs1000_to_mdps(int16_t lsb);
cparata	0:f27ce43dee4f	1756	extern float_t lsm6dsox_from_fs2000_to_mdps(int16_t lsb);
cparata	0:f27ce43dee4f	1757	extern float_t lsm6dsox_from_lsb_to_celsius(int16_t lsb);
cparata	0:f27ce43dee4f	1758	extern float_t lsm6dsox_from_lsb_to_nsec(int16_t lsb);
cparata	0:f27ce43dee4f	1759
cparata	0:f27ce43dee4f	1760	typedef enum {
cparata	0:f27ce43dee4f	1761	LSM6DSOX_2g = 0,
cparata	0:f27ce43dee4f	1762	LSM6DSOX_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSOX_2g */
cparata	0:f27ce43dee4f	1763	LSM6DSOX_4g = 2,
cparata	0:f27ce43dee4f	1764	LSM6DSOX_8g = 3,
cparata	0:f27ce43dee4f	1765	} lsm6dsox_fs_xl_t;
cparata	0:f27ce43dee4f	1766	int32_t lsm6dsox_xl_full_scale_set(lsm6dsox_ctx_t *ctx, lsm6dsox_fs_xl_t val);
cparata	0:f27ce43dee4f	1767	int32_t lsm6dsox_xl_full_scale_get(lsm6dsox_ctx_t ctx, lsm6dsox_fs_xl_t val);
cparata	0:f27ce43dee4f	1768
cparata	0:f27ce43dee4f	1769	typedef enum {
cparata	0:f27ce43dee4f	1770	LSM6DSOX_XL_ODR_OFF = 0,
cparata	0:f27ce43dee4f	1771	LSM6DSOX_XL_ODR_12Hz5 = 1,
cparata	0:f27ce43dee4f	1772	LSM6DSOX_XL_ODR_26Hz = 2,
cparata	0:f27ce43dee4f	1773	LSM6DSOX_XL_ODR_52Hz = 3,
cparata	0:f27ce43dee4f	1774	LSM6DSOX_XL_ODR_104Hz = 4,
cparata	0:f27ce43dee4f	1775	LSM6DSOX_XL_ODR_208Hz = 5,
cparata	0:f27ce43dee4f	1776	LSM6DSOX_XL_ODR_417Hz = 6,
cparata	0:f27ce43dee4f	1777	LSM6DSOX_XL_ODR_833Hz = 7,
cparata	0:f27ce43dee4f	1778	LSM6DSOX_XL_ODR_1667Hz = 8,
cparata	0:f27ce43dee4f	1779	LSM6DSOX_XL_ODR_3333Hz = 9,
cparata	0:f27ce43dee4f	1780	LSM6DSOX_XL_ODR_6667Hz = 10,
cparata	1:fe40aec6e97a	1781	LSM6DSOX_XL_ODR_1Hz6 = 11, /* (low power only) */
cparata	0:f27ce43dee4f	1782	} lsm6dsox_odr_xl_t;
cparata	0:f27ce43dee4f	1783	int32_t lsm6dsox_xl_data_rate_set(lsm6dsox_ctx_t *ctx, lsm6dsox_odr_xl_t val);
cparata	0:f27ce43dee4f	1784	int32_t lsm6dsox_xl_data_rate_get(lsm6dsox_ctx_t ctx, lsm6dsox_odr_xl_t val);
cparata	0:f27ce43dee4f	1785
cparata	0:f27ce43dee4f	1786	typedef enum {
cparata	0:f27ce43dee4f	1787	LSM6DSOX_250dps = 0,
cparata	0:f27ce43dee4f	1788	LSM6DSOX_125dps = 1,
cparata	0:f27ce43dee4f	1789	LSM6DSOX_500dps = 2,
cparata	0:f27ce43dee4f	1790	LSM6DSOX_1000dps = 4,
cparata	0:f27ce43dee4f	1791	LSM6DSOX_2000dps = 6,
cparata	0:f27ce43dee4f	1792	} lsm6dsox_fs_g_t;
cparata	0:f27ce43dee4f	1793	int32_t lsm6dsox_gy_full_scale_set(lsm6dsox_ctx_t *ctx, lsm6dsox_fs_g_t val);
cparata	0:f27ce43dee4f	1794	int32_t lsm6dsox_gy_full_scale_get(lsm6dsox_ctx_t ctx, lsm6dsox_fs_g_t val);
cparata	0:f27ce43dee4f	1795
cparata	0:f27ce43dee4f	1796	typedef enum {
cparata	0:f27ce43dee4f	1797	LSM6DSOX_GY_ODR_OFF = 0,
cparata	0:f27ce43dee4f	1798	LSM6DSOX_GY_ODR_12Hz5 = 1,
cparata	0:f27ce43dee4f	1799	LSM6DSOX_GY_ODR_26Hz = 2,
cparata	0:f27ce43dee4f	1800	LSM6DSOX_GY_ODR_52Hz = 3,
cparata	0:f27ce43dee4f	1801	LSM6DSOX_GY_ODR_104Hz = 4,
cparata	0:f27ce43dee4f	1802	LSM6DSOX_GY_ODR_208Hz = 5,
cparata	0:f27ce43dee4f	1803	LSM6DSOX_GY_ODR_417Hz = 6,
cparata	0:f27ce43dee4f	1804	LSM6DSOX_GY_ODR_833Hz = 7,
cparata	0:f27ce43dee4f	1805	LSM6DSOX_GY_ODR_1667Hz = 8,
cparata	0:f27ce43dee4f	1806	LSM6DSOX_GY_ODR_3333Hz = 9,
cparata	0:f27ce43dee4f	1807	LSM6DSOX_GY_ODR_6667Hz = 10,
cparata	0:f27ce43dee4f	1808	} lsm6dsox_odr_g_t;
cparata	0:f27ce43dee4f	1809	int32_t lsm6dsox_gy_data_rate_set(lsm6dsox_ctx_t *ctx, lsm6dsox_odr_g_t val);
cparata	0:f27ce43dee4f	1810	int32_t lsm6dsox_gy_data_rate_get(lsm6dsox_ctx_t ctx, lsm6dsox_odr_g_t val);
cparata	0:f27ce43dee4f	1811
cparata	0:f27ce43dee4f	1812	int32_t lsm6dsox_block_data_update_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1813	int32_t lsm6dsox_block_data_update_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1814
cparata	0:f27ce43dee4f	1815	typedef enum {
cparata	0:f27ce43dee4f	1816	LSM6DSOX_LSb_1mg = 0,
cparata	0:f27ce43dee4f	1817	LSM6DSOX_LSb_16mg = 1,
cparata	0:f27ce43dee4f	1818	} lsm6dsox_usr_off_w_t;
cparata	0:f27ce43dee4f	1819	int32_t lsm6dsox_xl_offset_weight_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1820	lsm6dsox_usr_off_w_t val);
cparata	0:f27ce43dee4f	1821	int32_t lsm6dsox_xl_offset_weight_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1822	lsm6dsox_usr_off_w_t *val);
cparata	0:f27ce43dee4f	1823
cparata	0:f27ce43dee4f	1824	typedef enum {
cparata	0:f27ce43dee4f	1825	LSM6DSOX_HIGH_PERFORMANCE_MD = 0,
cparata	0:f27ce43dee4f	1826	LSM6DSOX_LOW_NORMAL_POWER_MD = 1,
cparata	0:f27ce43dee4f	1827	LSM6DSOX_ULTRA_LOW_POWER_MD = 2,
cparata	0:f27ce43dee4f	1828	} lsm6dsox_xl_hm_mode_t;
cparata	0:f27ce43dee4f	1829	int32_t lsm6dsox_xl_power_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1830	lsm6dsox_xl_hm_mode_t val);
cparata	0:f27ce43dee4f	1831	int32_t lsm6dsox_xl_power_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1832	lsm6dsox_xl_hm_mode_t *val);
cparata	0:f27ce43dee4f	1833
cparata	0:f27ce43dee4f	1834	typedef enum {
cparata	0:f27ce43dee4f	1835	LSM6DSOX_GY_HIGH_PERFORMANCE = 0,
cparata	0:f27ce43dee4f	1836	LSM6DSOX_GY_NORMAL = 1,
cparata	0:f27ce43dee4f	1837	} lsm6dsox_g_hm_mode_t;
cparata	0:f27ce43dee4f	1838	int32_t lsm6dsox_gy_power_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1839	lsm6dsox_g_hm_mode_t val);
cparata	0:f27ce43dee4f	1840	int32_t lsm6dsox_gy_power_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1841	lsm6dsox_g_hm_mode_t *val);
cparata	0:f27ce43dee4f	1842
cparata	0:f27ce43dee4f	1843	int32_t lsm6dsox_status_reg_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1844	lsm6dsox_status_reg_t *val);
cparata	0:f27ce43dee4f	1845
cparata	0:f27ce43dee4f	1846	int32_t lsm6dsox_xl_flag_data_ready_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1847
cparata	0:f27ce43dee4f	1848	int32_t lsm6dsox_gy_flag_data_ready_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1849
cparata	0:f27ce43dee4f	1850	int32_t lsm6dsox_temp_flag_data_ready_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1851
cparata	0:f27ce43dee4f	1852	int32_t lsm6dsox_xl_usr_offset_x_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1853	int32_t lsm6dsox_xl_usr_offset_x_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1854
cparata	0:f27ce43dee4f	1855	int32_t lsm6dsox_xl_usr_offset_y_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1856	int32_t lsm6dsox_xl_usr_offset_y_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1857
cparata	0:f27ce43dee4f	1858	int32_t lsm6dsox_xl_usr_offset_z_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1859	int32_t lsm6dsox_xl_usr_offset_z_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1860
cparata	0:f27ce43dee4f	1861	int32_t lsm6dsox_xl_usr_offset_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1862	int32_t lsm6dsox_xl_usr_offset_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1863
cparata	1:fe40aec6e97a	1864	int32_t lsm6dsox_timestamp_rst(lsm6dsox_ctx_t *ctx);
cparata	1:fe40aec6e97a	1865
cparata	0:f27ce43dee4f	1866	int32_t lsm6dsox_timestamp_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1867	int32_t lsm6dsox_timestamp_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1868
cparata	0:f27ce43dee4f	1869	int32_t lsm6dsox_timestamp_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1870
cparata	0:f27ce43dee4f	1871	typedef enum {
cparata	0:f27ce43dee4f	1872	LSM6DSOX_NO_ROUND = 0,
cparata	0:f27ce43dee4f	1873	LSM6DSOX_ROUND_XL = 1,
cparata	0:f27ce43dee4f	1874	LSM6DSOX_ROUND_GY = 2,
cparata	0:f27ce43dee4f	1875	LSM6DSOX_ROUND_GY_XL = 3,
cparata	0:f27ce43dee4f	1876	} lsm6dsox_rounding_t;
cparata	0:f27ce43dee4f	1877	int32_t lsm6dsox_rounding_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1878	lsm6dsox_rounding_t val);
cparata	0:f27ce43dee4f	1879	int32_t lsm6dsox_rounding_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1880	lsm6dsox_rounding_t *val);
cparata	0:f27ce43dee4f	1881
cparata	0:f27ce43dee4f	1882	typedef enum {
cparata	0:f27ce43dee4f	1883	LSM6DSOX_STAT_RND_DISABLE = 0,
cparata	0:f27ce43dee4f	1884	LSM6DSOX_STAT_RND_ENABLE = 1,
cparata	0:f27ce43dee4f	1885	} lsm6dsox_rounding_status_t;
cparata	0:f27ce43dee4f	1886	int32_t lsm6dsox_rounding_on_status_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1887	lsm6dsox_rounding_status_t val);
cparata	0:f27ce43dee4f	1888	int32_t lsm6dsox_rounding_on_status_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1889	lsm6dsox_rounding_status_t *val);
cparata	0:f27ce43dee4f	1890
cparata	0:f27ce43dee4f	1891	int32_t lsm6dsox_temperature_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1892
cparata	0:f27ce43dee4f	1893	int32_t lsm6dsox_angular_rate_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1894
cparata	0:f27ce43dee4f	1895	int32_t lsm6dsox_acceleration_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1896
cparata	0:f27ce43dee4f	1897	int32_t lsm6dsox_fifo_out_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1898
cparata	0:f27ce43dee4f	1899	int32_t lsm6dsox_ois_angular_rate_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1900
cparata	0:f27ce43dee4f	1901	int32_t lsm6dsox_ois_acceleration_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1902
cparata	0:f27ce43dee4f	1903	int32_t lsm6dsox_aux_temperature_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1904
cparata	0:f27ce43dee4f	1905	int32_t lsm6dsox_aux_ois_angular_rate_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1906
cparata	0:f27ce43dee4f	1907	int32_t lsm6dsox_aux_ois_acceleration_raw_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1908
cparata	0:f27ce43dee4f	1909	int32_t lsm6dsox_number_of_steps_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1910
cparata	0:f27ce43dee4f	1911	int32_t lsm6dsox_steps_reset(lsm6dsox_ctx_t *ctx);
cparata	0:f27ce43dee4f	1912
cparata	0:f27ce43dee4f	1913	int32_t lsm6dsox_mlc_out_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1914
cparata	0:f27ce43dee4f	1915	int32_t lsm6dsox_odr_cal_reg_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1916	int32_t lsm6dsox_odr_cal_reg_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1917
cparata	0:f27ce43dee4f	1918	typedef enum {
cparata	0:f27ce43dee4f	1919	LSM6DSOX_USER_BANK = 0,
cparata	0:f27ce43dee4f	1920	LSM6DSOX_SENSOR_HUB_BANK = 1,
cparata	0:f27ce43dee4f	1921	LSM6DSOX_EMBEDDED_FUNC_BANK = 2,
cparata	0:f27ce43dee4f	1922	} lsm6dsox_reg_access_t;
cparata	0:f27ce43dee4f	1923	int32_t lsm6dsox_mem_bank_set(lsm6dsox_ctx_t *ctx, lsm6dsox_reg_access_t val);
cparata	0:f27ce43dee4f	1924	int32_t lsm6dsox_mem_bank_get(lsm6dsox_ctx_t ctx, lsm6dsox_reg_access_t val);
cparata	0:f27ce43dee4f	1925
cparata	0:f27ce43dee4f	1926	int32_t lsm6dsox_ln_pg_write_byte(lsm6dsox_ctx_t *ctx, uint16_t address,
cparata	0:f27ce43dee4f	1927	uint8_t *val);
cparata	0:f27ce43dee4f	1928	int32_t lsm6dsox_ln_pg_read_byte(lsm6dsox_ctx_t *ctx, uint16_t address,
cparata	0:f27ce43dee4f	1929	uint8_t *val);
cparata	1:fe40aec6e97a	1930
cparata	0:f27ce43dee4f	1931	int32_t lsm6dsox_ln_pg_write(lsm6dsox_ctx_t *ctx, uint16_t address,
cparata	0:f27ce43dee4f	1932	uint8_t *buf, uint8_t len);
cparata	0:f27ce43dee4f	1933	int32_t lsm6dsox_ln_pg_read(lsm6dsox_ctx_t *ctx, uint16_t address,
cparata	0:f27ce43dee4f	1934	uint8_t *val);
cparata	0:f27ce43dee4f	1935
cparata	0:f27ce43dee4f	1936	typedef enum {
cparata	0:f27ce43dee4f	1937	LSM6DSOX_DRDY_LATCHED = 0,
cparata	0:f27ce43dee4f	1938	LSM6DSOX_DRDY_PULSED = 1,
cparata	0:f27ce43dee4f	1939	} lsm6dsox_dataready_pulsed_t;
cparata	0:f27ce43dee4f	1940	int32_t lsm6dsox_data_ready_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1941	lsm6dsox_dataready_pulsed_t val);
cparata	0:f27ce43dee4f	1942	int32_t lsm6dsox_data_ready_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1943	lsm6dsox_dataready_pulsed_t *val);
cparata	0:f27ce43dee4f	1944
cparata	0:f27ce43dee4f	1945	int32_t lsm6dsox_device_id_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	1946
cparata	0:f27ce43dee4f	1947	int32_t lsm6dsox_reset_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1948	int32_t lsm6dsox_reset_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1949
cparata	0:f27ce43dee4f	1950	int32_t lsm6dsox_auto_increment_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1951	int32_t lsm6dsox_auto_increment_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1952
cparata	0:f27ce43dee4f	1953	int32_t lsm6dsox_boot_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1954	int32_t lsm6dsox_boot_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1955
cparata	0:f27ce43dee4f	1956	typedef enum {
cparata	0:f27ce43dee4f	1957	LSM6DSOX_XL_ST_DISABLE = 0,
cparata	0:f27ce43dee4f	1958	LSM6DSOX_XL_ST_POSITIVE = 1,
cparata	0:f27ce43dee4f	1959	LSM6DSOX_XL_ST_NEGATIVE = 2,
cparata	0:f27ce43dee4f	1960	} lsm6dsox_st_xl_t;
cparata	0:f27ce43dee4f	1961	int32_t lsm6dsox_xl_self_test_set(lsm6dsox_ctx_t *ctx, lsm6dsox_st_xl_t val);
cparata	0:f27ce43dee4f	1962	int32_t lsm6dsox_xl_self_test_get(lsm6dsox_ctx_t ctx, lsm6dsox_st_xl_t val);
cparata	0:f27ce43dee4f	1963
cparata	0:f27ce43dee4f	1964	typedef enum {
cparata	0:f27ce43dee4f	1965	LSM6DSOX_GY_ST_DISABLE = 0,
cparata	0:f27ce43dee4f	1966	LSM6DSOX_GY_ST_POSITIVE = 1,
cparata	0:f27ce43dee4f	1967	LSM6DSOX_GY_ST_NEGATIVE = 3,
cparata	0:f27ce43dee4f	1968	} lsm6dsox_st_g_t;
cparata	0:f27ce43dee4f	1969	int32_t lsm6dsox_gy_self_test_set(lsm6dsox_ctx_t *ctx, lsm6dsox_st_g_t val);
cparata	0:f27ce43dee4f	1970	int32_t lsm6dsox_gy_self_test_get(lsm6dsox_ctx_t ctx, lsm6dsox_st_g_t val);
cparata	0:f27ce43dee4f	1971
cparata	0:f27ce43dee4f	1972	int32_t lsm6dsox_xl_filter_lp2_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1973	int32_t lsm6dsox_xl_filter_lp2_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1974
cparata	0:f27ce43dee4f	1975	int32_t lsm6dsox_gy_filter_lp1_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1976	int32_t lsm6dsox_gy_filter_lp1_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	1977
cparata	0:f27ce43dee4f	1978	int32_t lsm6dsox_filter_settling_mask_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1979	uint8_t val);
cparata	0:f27ce43dee4f	1980	int32_t lsm6dsox_filter_settling_mask_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1981	uint8_t *val);
cparata	0:f27ce43dee4f	1982
cparata	0:f27ce43dee4f	1983	typedef enum {
cparata	0:f27ce43dee4f	1984	LSM6DSOX_ULTRA_LIGHT = 0,
cparata	0:f27ce43dee4f	1985	LSM6DSOX_VERY_LIGHT = 1,
cparata	0:f27ce43dee4f	1986	LSM6DSOX_LIGHT = 2,
cparata	0:f27ce43dee4f	1987	LSM6DSOX_MEDIUM = 3,
cparata	0:f27ce43dee4f	1988	LSM6DSOX_STRONG = 4,
cparata	0:f27ce43dee4f	1989	LSM6DSOX_VERY_STRONG = 5,
cparata	0:f27ce43dee4f	1990	LSM6DSOX_AGGRESSIVE = 6,
cparata	0:f27ce43dee4f	1991	LSM6DSOX_XTREME = 7,
cparata	0:f27ce43dee4f	1992	} lsm6dsox_ftype_t;
cparata	0:f27ce43dee4f	1993	int32_t lsm6dsox_gy_lp1_bandwidth_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1994	lsm6dsox_ftype_t val);
cparata	0:f27ce43dee4f	1995	int32_t lsm6dsox_gy_lp1_bandwidth_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	1996	lsm6dsox_ftype_t *val);
cparata	0:f27ce43dee4f	1997
cparata	0:f27ce43dee4f	1998	int32_t lsm6dsox_xl_lp2_on_6d_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	1999	int32_t lsm6dsox_xl_lp2_on_6d_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2000
cparata	0:f27ce43dee4f	2001	typedef enum {
cparata	0:f27ce43dee4f	2002	LSM6DSOX_HP_PATH_DISABLE_ON_OUT = 0x00,
cparata	0:f27ce43dee4f	2003	LSM6DSOX_SLOPE_ODR_DIV_4 = 0x10,
cparata	0:f27ce43dee4f	2004	LSM6DSOX_HP_ODR_DIV_10 = 0x11,
cparata	0:f27ce43dee4f	2005	LSM6DSOX_HP_ODR_DIV_20 = 0x12,
cparata	0:f27ce43dee4f	2006	LSM6DSOX_HP_ODR_DIV_45 = 0x13,
cparata	0:f27ce43dee4f	2007	LSM6DSOX_HP_ODR_DIV_100 = 0x14,
cparata	0:f27ce43dee4f	2008	LSM6DSOX_HP_ODR_DIV_200 = 0x15,
cparata	0:f27ce43dee4f	2009	LSM6DSOX_HP_ODR_DIV_400 = 0x16,
cparata	0:f27ce43dee4f	2010	LSM6DSOX_HP_ODR_DIV_800 = 0x17,
cparata	0:f27ce43dee4f	2011	LSM6DSOX_HP_REF_MD_ODR_DIV_10 = 0x31,
cparata	0:f27ce43dee4f	2012	LSM6DSOX_HP_REF_MD_ODR_DIV_20 = 0x32,
cparata	0:f27ce43dee4f	2013	LSM6DSOX_HP_REF_MD_ODR_DIV_45 = 0x33,
cparata	0:f27ce43dee4f	2014	LSM6DSOX_HP_REF_MD_ODR_DIV_100 = 0x34,
cparata	0:f27ce43dee4f	2015	LSM6DSOX_HP_REF_MD_ODR_DIV_200 = 0x35,
cparata	0:f27ce43dee4f	2016	LSM6DSOX_HP_REF_MD_ODR_DIV_400 = 0x36,
cparata	0:f27ce43dee4f	2017	LSM6DSOX_HP_REF_MD_ODR_DIV_800 = 0x37,
cparata	0:f27ce43dee4f	2018	LSM6DSOX_LP_ODR_DIV_10 = 0x01,
cparata	0:f27ce43dee4f	2019	LSM6DSOX_LP_ODR_DIV_20 = 0x02,
cparata	0:f27ce43dee4f	2020	LSM6DSOX_LP_ODR_DIV_45 = 0x03,
cparata	0:f27ce43dee4f	2021	LSM6DSOX_LP_ODR_DIV_100 = 0x04,
cparata	0:f27ce43dee4f	2022	LSM6DSOX_LP_ODR_DIV_200 = 0x05,
cparata	0:f27ce43dee4f	2023	LSM6DSOX_LP_ODR_DIV_400 = 0x06,
cparata	0:f27ce43dee4f	2024	LSM6DSOX_LP_ODR_DIV_800 = 0x07,
cparata	0:f27ce43dee4f	2025	} lsm6dsox_hp_slope_xl_en_t;
cparata	0:f27ce43dee4f	2026	int32_t lsm6dsox_xl_hp_path_on_out_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2027	lsm6dsox_hp_slope_xl_en_t val);
cparata	0:f27ce43dee4f	2028	int32_t lsm6dsox_xl_hp_path_on_out_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2029	lsm6dsox_hp_slope_xl_en_t *val);
cparata	0:f27ce43dee4f	2030
cparata	0:f27ce43dee4f	2031	int32_t lsm6dsox_xl_fast_settling_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2032	int32_t lsm6dsox_xl_fast_settling_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2033
cparata	0:f27ce43dee4f	2034	typedef enum {
cparata	0:f27ce43dee4f	2035	LSM6DSOX_USE_SLOPE = 0,
cparata	0:f27ce43dee4f	2036	LSM6DSOX_USE_HPF = 1,
cparata	0:f27ce43dee4f	2037	} lsm6dsox_slope_fds_t;
cparata	0:f27ce43dee4f	2038	int32_t lsm6dsox_xl_hp_path_internal_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2039	lsm6dsox_slope_fds_t val);
cparata	0:f27ce43dee4f	2040	int32_t lsm6dsox_xl_hp_path_internal_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2041	lsm6dsox_slope_fds_t *val);
cparata	0:f27ce43dee4f	2042
cparata	0:f27ce43dee4f	2043	typedef enum {
cparata	0:f27ce43dee4f	2044	LSM6DSOX_HP_FILTER_NONE = 0x00,
cparata	0:f27ce43dee4f	2045	LSM6DSOX_HP_FILTER_16mHz = 0x80,
cparata	0:f27ce43dee4f	2046	LSM6DSOX_HP_FILTER_65mHz = 0x81,
cparata	0:f27ce43dee4f	2047	LSM6DSOX_HP_FILTER_260mHz = 0x82,
cparata	0:f27ce43dee4f	2048	LSM6DSOX_HP_FILTER_1Hz04 = 0x83,
cparata	0:f27ce43dee4f	2049	} lsm6dsox_hpm_g_t;
cparata	0:f27ce43dee4f	2050	int32_t lsm6dsox_gy_hp_path_internal_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2051	lsm6dsox_hpm_g_t val);
cparata	0:f27ce43dee4f	2052	int32_t lsm6dsox_gy_hp_path_internal_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2053	lsm6dsox_hpm_g_t *val);
cparata	0:f27ce43dee4f	2054
cparata	0:f27ce43dee4f	2055	typedef enum {
cparata	0:f27ce43dee4f	2056	LSM6DSOX_OIS_CTRL_AUX_DATA_UI = 0x00,
cparata	0:f27ce43dee4f	2057	LSM6DSOX_OIS_CTRL_AUX_DATA_UI_AUX = 0x01,
cparata	0:f27ce43dee4f	2058	LSM6DSOX_OIS_CTRL_UI_AUX_DATA_UI = 0x02,
cparata	0:f27ce43dee4f	2059	LSM6DSOX_OIS_CTRL_UI_AUX_DATA_UI_AUX = 0x03,
cparata	0:f27ce43dee4f	2060	} lsm6dsox_spi2_read_en_t;
cparata	0:f27ce43dee4f	2061	int32_t lsm6dsox_ois_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2062	lsm6dsox_spi2_read_en_t val);
cparata	0:f27ce43dee4f	2063	int32_t lsm6dsox_ois_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2064	lsm6dsox_spi2_read_en_t *val);
cparata	0:f27ce43dee4f	2065
cparata	0:f27ce43dee4f	2066	typedef enum {
cparata	0:f27ce43dee4f	2067	LSM6DSOX_AUX_PULL_UP_DISC = 0,
cparata	0:f27ce43dee4f	2068	LSM6DSOX_AUX_PULL_UP_CONNECT = 1,
cparata	0:f27ce43dee4f	2069	} lsm6dsox_ois_pu_dis_t;
cparata	0:f27ce43dee4f	2070	int32_t lsm6dsox_aux_sdo_ocs_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2071	lsm6dsox_ois_pu_dis_t val);
cparata	0:f27ce43dee4f	2072	int32_t lsm6dsox_aux_sdo_ocs_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2073	lsm6dsox_ois_pu_dis_t *val);
cparata	0:f27ce43dee4f	2074
cparata	0:f27ce43dee4f	2075	typedef enum {
cparata	0:f27ce43dee4f	2076	LSM6DSOX_AUX_ON = 1,
cparata	0:f27ce43dee4f	2077	LSM6DSOX_AUX_ON_BY_AUX_INTERFACE = 0,
cparata	0:f27ce43dee4f	2078	} lsm6dsox_ois_on_t;
cparata	0:f27ce43dee4f	2079	int32_t lsm6dsox_aux_pw_on_ctrl_set(lsm6dsox_ctx_t *ctx, lsm6dsox_ois_on_t val);
cparata	0:f27ce43dee4f	2080	int32_t lsm6dsox_aux_pw_on_ctrl_get(lsm6dsox_ctx_t ctx, lsm6dsox_ois_on_t val);
cparata	0:f27ce43dee4f	2081
cparata	0:f27ce43dee4f	2082	typedef enum {
cparata	0:f27ce43dee4f	2083	LSM6DSOX_USE_SAME_XL_FS = 0,
cparata	0:f27ce43dee4f	2084	LSM6DSOX_USE_DIFFERENT_XL_FS = 1,
cparata	0:f27ce43dee4f	2085	} lsm6dsox_xl_fs_mode_t;
cparata	0:f27ce43dee4f	2086	int32_t lsm6dsox_aux_xl_fs_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2087	lsm6dsox_xl_fs_mode_t val);
cparata	0:f27ce43dee4f	2088	int32_t lsm6dsox_aux_xl_fs_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2089	lsm6dsox_xl_fs_mode_t *val);
cparata	0:f27ce43dee4f	2090
cparata	0:f27ce43dee4f	2091	int32_t lsm6dsox_aux_status_reg_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2092	lsm6dsox_spi2_status_reg_ois_t *val);
cparata	0:f27ce43dee4f	2093
cparata	0:f27ce43dee4f	2094	int32_t lsm6dsox_aux_xl_flag_data_ready_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2095
cparata	0:f27ce43dee4f	2096	int32_t lsm6dsox_aux_gy_flag_data_ready_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2097
cparata	0:f27ce43dee4f	2098	int32_t lsm6dsox_aux_gy_flag_settling_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2099
cparata	0:f27ce43dee4f	2100	typedef enum {
cparata	0:f27ce43dee4f	2101	LSM6DSOX_AUX_DEN_ACTIVE_LOW = 0,
cparata	0:f27ce43dee4f	2102	LSM6DSOX_AUX_DEN_ACTIVE_HIGH = 1,
cparata	0:f27ce43dee4f	2103	} lsm6dsox_den_lh_ois_t;
cparata	0:f27ce43dee4f	2104	int32_t lsm6dsox_aux_den_polarity_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2105	lsm6dsox_den_lh_ois_t val);
cparata	0:f27ce43dee4f	2106	int32_t lsm6dsox_aux_den_polarity_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2107	lsm6dsox_den_lh_ois_t *val);
cparata	0:f27ce43dee4f	2108
cparata	0:f27ce43dee4f	2109	typedef enum {
cparata	0:f27ce43dee4f	2110	LSM6DSOX_AUX_DEN_DISABLE = 0,
cparata	0:f27ce43dee4f	2111	LSM6DSOX_AUX_DEN_LEVEL_LATCH = 3,
cparata	0:f27ce43dee4f	2112	LSM6DSOX_AUX_DEN_LEVEL_TRIG = 2,
cparata	0:f27ce43dee4f	2113	} lsm6dsox_lvl2_ois_t;
cparata	0:f27ce43dee4f	2114	int32_t lsm6dsox_aux_den_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2115	lsm6dsox_lvl2_ois_t val);
cparata	0:f27ce43dee4f	2116	int32_t lsm6dsox_aux_den_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2117	lsm6dsox_lvl2_ois_t *val);
cparata	0:f27ce43dee4f	2118
cparata	0:f27ce43dee4f	2119	int32_t lsm6dsox_aux_drdy_on_int2_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2120	int32_t lsm6dsox_aux_drdy_on_int2_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2121
cparata	0:f27ce43dee4f	2122	typedef enum {
cparata	0:f27ce43dee4f	2123	LSM6DSOX_AUX_DISABLE = 0,
cparata	0:f27ce43dee4f	2124	LSM6DSOX_MODE_3_GY = 1,
cparata	0:f27ce43dee4f	2125	LSM6DSOX_MODE_4_GY_XL = 3,
cparata	0:f27ce43dee4f	2126	} lsm6dsox_ois_en_spi2_t;
cparata	0:f27ce43dee4f	2127	int32_t lsm6dsox_aux_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2128	lsm6dsox_ois_en_spi2_t val);
cparata	0:f27ce43dee4f	2129	int32_t lsm6dsox_aux_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2130	lsm6dsox_ois_en_spi2_t *val);
cparata	0:f27ce43dee4f	2131
cparata	0:f27ce43dee4f	2132	typedef enum {
cparata	0:f27ce43dee4f	2133	LSM6DSOX_250dps_AUX = 0,
cparata	0:f27ce43dee4f	2134	LSM6DSOX_125dps_AUX = 1,
cparata	0:f27ce43dee4f	2135	LSM6DSOX_500dps_AUX = 2,
cparata	0:f27ce43dee4f	2136	LSM6DSOX_1000dps_AUX = 4,
cparata	0:f27ce43dee4f	2137	LSM6DSOX_2000dps_AUX = 6,
cparata	0:f27ce43dee4f	2138	} lsm6dsox_fs_g_ois_t;
cparata	0:f27ce43dee4f	2139	int32_t lsm6dsox_aux_gy_full_scale_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2140	lsm6dsox_fs_g_ois_t val);
cparata	0:f27ce43dee4f	2141	int32_t lsm6dsox_aux_gy_full_scale_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2142	lsm6dsox_fs_g_ois_t *val);
cparata	0:f27ce43dee4f	2143
cparata	0:f27ce43dee4f	2144	typedef enum {
cparata	0:f27ce43dee4f	2145	LSM6DSOX_AUX_SPI_4_WIRE = 0,
cparata	0:f27ce43dee4f	2146	LSM6DSOX_AUX_SPI_3_WIRE = 1,
cparata	0:f27ce43dee4f	2147	} lsm6dsox_sim_ois_t;
cparata	0:f27ce43dee4f	2148	int32_t lsm6dsox_aux_spi_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2149	lsm6dsox_sim_ois_t val);
cparata	0:f27ce43dee4f	2150	int32_t lsm6dsox_aux_spi_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2151	lsm6dsox_sim_ois_t *val);
cparata	0:f27ce43dee4f	2152
cparata	0:f27ce43dee4f	2153	typedef enum {
cparata	0:f27ce43dee4f	2154	LSM6DSOX_351Hz39 = 0,
cparata	0:f27ce43dee4f	2155	LSM6DSOX_236Hz63 = 1,
cparata	0:f27ce43dee4f	2156	LSM6DSOX_172Hz70 = 2,
cparata	0:f27ce43dee4f	2157	LSM6DSOX_937Hz91 = 3,
cparata	0:f27ce43dee4f	2158	} lsm6dsox_ftype_ois_t;
cparata	0:f27ce43dee4f	2159	int32_t lsm6dsox_aux_gy_lp1_bandwidth_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2160	lsm6dsox_ftype_ois_t val);
cparata	0:f27ce43dee4f	2161	int32_t lsm6dsox_aux_gy_lp1_bandwidth_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2162	lsm6dsox_ftype_ois_t *val);
cparata	0:f27ce43dee4f	2163
cparata	0:f27ce43dee4f	2164	typedef enum {
cparata	0:f27ce43dee4f	2165	LSM6DSOX_AUX_HP_DISABLE = 0x00,
cparata	0:f27ce43dee4f	2166	LSM6DSOX_AUX_HP_Hz016 = 0x10,
cparata	0:f27ce43dee4f	2167	LSM6DSOX_AUX_HP_Hz065 = 0x11,
cparata	0:f27ce43dee4f	2168	LSM6DSOX_AUX_HP_Hz260 = 0x12,
cparata	0:f27ce43dee4f	2169	LSM6DSOX_AUX_HP_1Hz040 = 0x13,
cparata	0:f27ce43dee4f	2170	} lsm6dsox_hpm_ois_t;
cparata	0:f27ce43dee4f	2171	int32_t lsm6dsox_aux_gy_hp_bandwidth_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2172	lsm6dsox_hpm_ois_t val);
cparata	0:f27ce43dee4f	2173	int32_t lsm6dsox_aux_gy_hp_bandwidth_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2174	lsm6dsox_hpm_ois_t *val);
cparata	0:f27ce43dee4f	2175
cparata	0:f27ce43dee4f	2176	typedef enum {
cparata	0:f27ce43dee4f	2177	LSM6DSOX_ENABLE_CLAMP = 0,
cparata	0:f27ce43dee4f	2178	LSM6DSOX_DISABLE_CLAMP = 1,
cparata	0:f27ce43dee4f	2179	} lsm6dsox_st_ois_clampdis_t;
cparata	0:f27ce43dee4f	2180	int32_t lsm6dsox_aux_gy_clamp_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2181	lsm6dsox_st_ois_clampdis_t val);
cparata	0:f27ce43dee4f	2182	int32_t lsm6dsox_aux_gy_clamp_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2183	lsm6dsox_st_ois_clampdis_t *val);
cparata	0:f27ce43dee4f	2184
cparata	0:f27ce43dee4f	2185	typedef enum {
cparata	0:f27ce43dee4f	2186	LSM6DSOX_289Hz = 0,
cparata	0:f27ce43dee4f	2187	LSM6DSOX_258Hz = 1,
cparata	0:f27ce43dee4f	2188	LSM6DSOX_120Hz = 2,
cparata	0:f27ce43dee4f	2189	LSM6DSOX_65Hz2 = 3,
cparata	0:f27ce43dee4f	2190	LSM6DSOX_33Hz2 = 4,
cparata	0:f27ce43dee4f	2191	LSM6DSOX_16Hz6 = 5,
cparata	0:f27ce43dee4f	2192	LSM6DSOX_8Hz30 = 6,
cparata	0:f27ce43dee4f	2193	LSM6DSOX_4Hz15 = 7,
cparata	0:f27ce43dee4f	2194	} lsm6dsox_filter_xl_conf_ois_t;
cparata	0:f27ce43dee4f	2195	int32_t lsm6dsox_aux_xl_bandwidth_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2196	lsm6dsox_filter_xl_conf_ois_t val);
cparata	0:f27ce43dee4f	2197	int32_t lsm6dsox_aux_xl_bandwidth_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2198	lsm6dsox_filter_xl_conf_ois_t *val);
cparata	0:f27ce43dee4f	2199
cparata	0:f27ce43dee4f	2200	typedef enum {
cparata	0:f27ce43dee4f	2201	LSM6DSOX_AUX_2g = 0,
cparata	0:f27ce43dee4f	2202	LSM6DSOX_AUX_16g = 1,
cparata	0:f27ce43dee4f	2203	LSM6DSOX_AUX_4g = 2,
cparata	0:f27ce43dee4f	2204	LSM6DSOX_AUX_8g = 3,
cparata	0:f27ce43dee4f	2205	} lsm6dsox_fs_xl_ois_t;
cparata	0:f27ce43dee4f	2206	int32_t lsm6dsox_aux_xl_full_scale_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2207	lsm6dsox_fs_xl_ois_t val);
cparata	0:f27ce43dee4f	2208	int32_t lsm6dsox_aux_xl_full_scale_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2209	lsm6dsox_fs_xl_ois_t *val);
cparata	0:f27ce43dee4f	2210
cparata	0:f27ce43dee4f	2211	typedef enum {
cparata	0:f27ce43dee4f	2212	LSM6DSOX_PULL_UP_DISC = 0,
cparata	0:f27ce43dee4f	2213	LSM6DSOX_PULL_UP_CONNECT = 1,
cparata	0:f27ce43dee4f	2214	} lsm6dsox_sdo_pu_en_t;
cparata	0:f27ce43dee4f	2215	int32_t lsm6dsox_sdo_sa0_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2216	lsm6dsox_sdo_pu_en_t val);
cparata	0:f27ce43dee4f	2217	int32_t lsm6dsox_sdo_sa0_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2218	lsm6dsox_sdo_pu_en_t *val);
cparata	0:f27ce43dee4f	2219
cparata	0:f27ce43dee4f	2220	typedef enum {
cparata	0:f27ce43dee4f	2221	LSM6DSOX_SPI_4_WIRE = 0,
cparata	0:f27ce43dee4f	2222	LSM6DSOX_SPI_3_WIRE = 1,
cparata	0:f27ce43dee4f	2223	} lsm6dsox_sim_t;
cparata	0:f27ce43dee4f	2224	int32_t lsm6dsox_spi_mode_set(lsm6dsox_ctx_t *ctx, lsm6dsox_sim_t val);
cparata	0:f27ce43dee4f	2225	int32_t lsm6dsox_spi_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_sim_t val);
cparata	0:f27ce43dee4f	2226
cparata	0:f27ce43dee4f	2227	typedef enum {
cparata	0:f27ce43dee4f	2228	LSM6DSOX_I2C_ENABLE = 0,
cparata	0:f27ce43dee4f	2229	LSM6DSOX_I2C_DISABLE = 1,
cparata	0:f27ce43dee4f	2230	} lsm6dsox_i2c_disable_t;
cparata	0:f27ce43dee4f	2231	int32_t lsm6dsox_i2c_interface_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2232	lsm6dsox_i2c_disable_t val);
cparata	0:f27ce43dee4f	2233	int32_t lsm6dsox_i2c_interface_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2234	lsm6dsox_i2c_disable_t *val);
cparata	0:f27ce43dee4f	2235
cparata	0:f27ce43dee4f	2236	typedef enum {
cparata	0:f27ce43dee4f	2237	LSM6DSOX_I3C_DISABLE = 0x80,
cparata	0:f27ce43dee4f	2238	LSM6DSOX_I3C_ENABLE_T_50us = 0x00,
cparata	0:f27ce43dee4f	2239	LSM6DSOX_I3C_ENABLE_T_2us = 0x01,
cparata	0:f27ce43dee4f	2240	LSM6DSOX_I3C_ENABLE_T_1ms = 0x02,
cparata	0:f27ce43dee4f	2241	LSM6DSOX_I3C_ENABLE_T_25ms = 0x03,
cparata	0:f27ce43dee4f	2242	} lsm6dsox_i3c_disable_t;
cparata	0:f27ce43dee4f	2243	int32_t lsm6dsox_i3c_disable_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2244	lsm6dsox_i3c_disable_t val);
cparata	0:f27ce43dee4f	2245	int32_t lsm6dsox_i3c_disable_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2246	lsm6dsox_i3c_disable_t *val);
cparata	0:f27ce43dee4f	2247
cparata	0:f27ce43dee4f	2248	typedef enum {
cparata	0:f27ce43dee4f	2249	LSM6DSOX_PUSH_PULL = 0x00,
cparata	0:f27ce43dee4f	2250	LSM6DSOX_OPEN_DRAIN = 0x01,
cparata	0:f27ce43dee4f	2251	LSM6DSOX_INT1_NOPULL_DOWN_INT2_PUSH_PULL = 0x02,
cparata	0:f27ce43dee4f	2252	LSM6DSOX_INT1_NOPULL_DOWN_INT2_OPEN_DRAIN = 0x03,
cparata	0:f27ce43dee4f	2253	} lsm6dsox_pp_od_t;
cparata	0:f27ce43dee4f	2254	int32_t lsm6dsox_pin_mode_set(lsm6dsox_ctx_t *ctx, lsm6dsox_pp_od_t val);
cparata	0:f27ce43dee4f	2255	int32_t lsm6dsox_pin_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_pp_od_t val);
cparata	0:f27ce43dee4f	2256
cparata	0:f27ce43dee4f	2257	typedef enum {
cparata	0:f27ce43dee4f	2258	LSM6DSOX_ACTIVE_HIGH = 0,
cparata	0:f27ce43dee4f	2259	LSM6DSOX_ACTIVE_LOW = 1,
cparata	0:f27ce43dee4f	2260	} lsm6dsox_h_lactive_t;
cparata	0:f27ce43dee4f	2261	int32_t lsm6dsox_pin_polarity_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2262	lsm6dsox_h_lactive_t val);
cparata	0:f27ce43dee4f	2263	int32_t lsm6dsox_pin_polarity_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2264	lsm6dsox_h_lactive_t *val);
cparata	0:f27ce43dee4f	2265
cparata	0:f27ce43dee4f	2266	int32_t lsm6dsox_all_on_int1_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2267	int32_t lsm6dsox_all_on_int1_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2268
cparata	0:f27ce43dee4f	2269	typedef enum {
cparata	0:f27ce43dee4f	2270	LSM6DSOX_ALL_INT_PULSED = 0,
cparata	0:f27ce43dee4f	2271	LSM6DSOX_BASE_LATCHED_EMB_PULSED = 1,
cparata	0:f27ce43dee4f	2272	LSM6DSOX_BASE_PULSED_EMB_LATCHED = 2,
cparata	0:f27ce43dee4f	2273	LSM6DSOX_ALL_INT_LATCHED = 3,
cparata	0:f27ce43dee4f	2274	} lsm6dsox_lir_t;
cparata	0:f27ce43dee4f	2275	int32_t lsm6dsox_int_notification_set(lsm6dsox_ctx_t *ctx, lsm6dsox_lir_t val);
cparata	0:f27ce43dee4f	2276	int32_t lsm6dsox_int_notification_get(lsm6dsox_ctx_t ctx, lsm6dsox_lir_t val);
cparata	0:f27ce43dee4f	2277
cparata	0:f27ce43dee4f	2278	typedef enum {
cparata	0:f27ce43dee4f	2279	LSM6DSOX_LSb_FS_DIV_64 = 0,
cparata	0:f27ce43dee4f	2280	LSM6DSOX_LSb_FS_DIV_256 = 1,
cparata	0:f27ce43dee4f	2281	} lsm6dsox_wake_ths_w_t;
cparata	0:f27ce43dee4f	2282	int32_t lsm6dsox_wkup_ths_weight_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2283	lsm6dsox_wake_ths_w_t val);
cparata	0:f27ce43dee4f	2284	int32_t lsm6dsox_wkup_ths_weight_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2285	lsm6dsox_wake_ths_w_t *val);
cparata	0:f27ce43dee4f	2286
cparata	0:f27ce43dee4f	2287	int32_t lsm6dsox_wkup_threshold_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2288	int32_t lsm6dsox_wkup_threshold_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2289
cparata	0:f27ce43dee4f	2290	int32_t lsm6dsox_xl_usr_offset_on_wkup_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2291	int32_t lsm6dsox_xl_usr_offset_on_wkup_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2292
cparata	0:f27ce43dee4f	2293	int32_t lsm6dsox_wkup_dur_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2294	int32_t lsm6dsox_wkup_dur_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2295
cparata	0:f27ce43dee4f	2296	int32_t lsm6dsox_gy_sleep_mode_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2297	int32_t lsm6dsox_gy_sleep_mode_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2298
cparata	0:f27ce43dee4f	2299	typedef enum {
cparata	0:f27ce43dee4f	2300	LSM6DSOX_DRIVE_SLEEP_CHG_EVENT = 0,
cparata	0:f27ce43dee4f	2301	LSM6DSOX_DRIVE_SLEEP_STATUS = 1,
cparata	0:f27ce43dee4f	2302	} lsm6dsox_sleep_status_on_int_t;
cparata	0:f27ce43dee4f	2303	int32_t lsm6dsox_act_pin_notification_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2304	lsm6dsox_sleep_status_on_int_t val);
cparata	0:f27ce43dee4f	2305	int32_t lsm6dsox_act_pin_notification_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2306	lsm6dsox_sleep_status_on_int_t *val);
cparata	0:f27ce43dee4f	2307
cparata	0:f27ce43dee4f	2308	typedef enum {
cparata	0:f27ce43dee4f	2309	LSM6DSOX_XL_AND_GY_NOT_AFFECTED = 0,
cparata	0:f27ce43dee4f	2310	LSM6DSOX_XL_12Hz5_GY_NOT_AFFECTED = 1,
cparata	0:f27ce43dee4f	2311	LSM6DSOX_XL_12Hz5_GY_SLEEP = 2,
cparata	0:f27ce43dee4f	2312	LSM6DSOX_XL_12Hz5_GY_PD = 3,
cparata	0:f27ce43dee4f	2313	} lsm6dsox_inact_en_t;
cparata	0:f27ce43dee4f	2314	int32_t lsm6dsox_act_mode_set(lsm6dsox_ctx_t *ctx, lsm6dsox_inact_en_t val);
cparata	0:f27ce43dee4f	2315	int32_t lsm6dsox_act_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_inact_en_t val);
cparata	0:f27ce43dee4f	2316
cparata	0:f27ce43dee4f	2317	int32_t lsm6dsox_act_sleep_dur_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2318	int32_t lsm6dsox_act_sleep_dur_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2319
cparata	0:f27ce43dee4f	2320	int32_t lsm6dsox_tap_detection_on_z_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2321	int32_t lsm6dsox_tap_detection_on_z_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2322
cparata	0:f27ce43dee4f	2323	int32_t lsm6dsox_tap_detection_on_y_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2324	int32_t lsm6dsox_tap_detection_on_y_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2325
cparata	0:f27ce43dee4f	2326	int32_t lsm6dsox_tap_detection_on_x_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2327	int32_t lsm6dsox_tap_detection_on_x_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2328
cparata	0:f27ce43dee4f	2329	int32_t lsm6dsox_tap_threshold_x_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2330	int32_t lsm6dsox_tap_threshold_x_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2331
cparata	0:f27ce43dee4f	2332	typedef enum {
cparata	0:f27ce43dee4f	2333	LSM6DSOX_XYZ = 0,
cparata	0:f27ce43dee4f	2334	LSM6DSOX_YXZ = 1,
cparata	0:f27ce43dee4f	2335	LSM6DSOX_XZY = 2,
cparata	0:f27ce43dee4f	2336	LSM6DSOX_ZYX = 3,
cparata	0:f27ce43dee4f	2337	LSM6DSOX_YZX = 5,
cparata	0:f27ce43dee4f	2338	LSM6DSOX_ZXY = 6,
cparata	0:f27ce43dee4f	2339	} lsm6dsox_tap_priority_t;
cparata	0:f27ce43dee4f	2340	int32_t lsm6dsox_tap_axis_priority_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2341	lsm6dsox_tap_priority_t val);
cparata	0:f27ce43dee4f	2342	int32_t lsm6dsox_tap_axis_priority_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2343	lsm6dsox_tap_priority_t *val);
cparata	0:f27ce43dee4f	2344
cparata	0:f27ce43dee4f	2345	int32_t lsm6dsox_tap_threshold_y_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2346	int32_t lsm6dsox_tap_threshold_y_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2347
cparata	0:f27ce43dee4f	2348	int32_t lsm6dsox_tap_threshold_z_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2349	int32_t lsm6dsox_tap_threshold_z_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2350
cparata	0:f27ce43dee4f	2351	int32_t lsm6dsox_tap_shock_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2352	int32_t lsm6dsox_tap_shock_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2353
cparata	0:f27ce43dee4f	2354	int32_t lsm6dsox_tap_quiet_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2355	int32_t lsm6dsox_tap_quiet_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2356
cparata	0:f27ce43dee4f	2357	int32_t lsm6dsox_tap_dur_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2358	int32_t lsm6dsox_tap_dur_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2359
cparata	0:f27ce43dee4f	2360	typedef enum {
cparata	0:f27ce43dee4f	2361	LSM6DSOX_ONLY_SINGLE = 0,
cparata	0:f27ce43dee4f	2362	LSM6DSOX_BOTH_SINGLE_DOUBLE = 1,
cparata	0:f27ce43dee4f	2363	} lsm6dsox_single_double_tap_t;
cparata	0:f27ce43dee4f	2364	int32_t lsm6dsox_tap_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2365	lsm6dsox_single_double_tap_t val);
cparata	0:f27ce43dee4f	2366	int32_t lsm6dsox_tap_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2367	lsm6dsox_single_double_tap_t *val);
cparata	0:f27ce43dee4f	2368
cparata	0:f27ce43dee4f	2369	typedef enum {
cparata	0:f27ce43dee4f	2370	LSM6DSOX_DEG_80 = 0,
cparata	0:f27ce43dee4f	2371	LSM6DSOX_DEG_70 = 1,
cparata	0:f27ce43dee4f	2372	LSM6DSOX_DEG_60 = 2,
cparata	0:f27ce43dee4f	2373	LSM6DSOX_DEG_50 = 3,
cparata	0:f27ce43dee4f	2374	} lsm6dsox_sixd_ths_t;
cparata	0:f27ce43dee4f	2375	int32_t lsm6dsox_6d_threshold_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2376	lsm6dsox_sixd_ths_t val);
cparata	0:f27ce43dee4f	2377	int32_t lsm6dsox_6d_threshold_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2378	lsm6dsox_sixd_ths_t *val);
cparata	0:f27ce43dee4f	2379
cparata	0:f27ce43dee4f	2380	int32_t lsm6dsox_4d_mode_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2381	int32_t lsm6dsox_4d_mode_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2382
cparata	0:f27ce43dee4f	2383	typedef enum {
cparata	0:f27ce43dee4f	2384	LSM6DSOX_FF_TSH_156mg = 0,
cparata	0:f27ce43dee4f	2385	LSM6DSOX_FF_TSH_219mg = 1,
cparata	0:f27ce43dee4f	2386	LSM6DSOX_FF_TSH_250mg = 2,
cparata	0:f27ce43dee4f	2387	LSM6DSOX_FF_TSH_312mg = 3,
cparata	0:f27ce43dee4f	2388	LSM6DSOX_FF_TSH_344mg = 4,
cparata	0:f27ce43dee4f	2389	LSM6DSOX_FF_TSH_406mg = 5,
cparata	0:f27ce43dee4f	2390	LSM6DSOX_FF_TSH_469mg = 6,
cparata	0:f27ce43dee4f	2391	LSM6DSOX_FF_TSH_500mg = 7,
cparata	0:f27ce43dee4f	2392	} lsm6dsox_ff_ths_t;
cparata	0:f27ce43dee4f	2393	int32_t lsm6dsox_ff_threshold_set(lsm6dsox_ctx_t *ctx, lsm6dsox_ff_ths_t val);
cparata	0:f27ce43dee4f	2394	int32_t lsm6dsox_ff_threshold_get(lsm6dsox_ctx_t ctx, lsm6dsox_ff_ths_t val);
cparata	0:f27ce43dee4f	2395
cparata	0:f27ce43dee4f	2396	int32_t lsm6dsox_ff_dur_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2397	int32_t lsm6dsox_ff_dur_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2398
cparata	0:f27ce43dee4f	2399	int32_t lsm6dsox_fifo_watermark_set(lsm6dsox_ctx_t *ctx, uint16_t val);
cparata	0:f27ce43dee4f	2400	int32_t lsm6dsox_fifo_watermark_get(lsm6dsox_ctx_t ctx, uint16_t val);
cparata	0:f27ce43dee4f	2401
cparata	0:f27ce43dee4f	2402	int32_t lsm6dsox_compression_algo_init_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2403	int32_t lsm6dsox_compression_algo_init_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2404
cparata	0:f27ce43dee4f	2405	typedef enum {
cparata	0:f27ce43dee4f	2406	LSM6DSOX_CMP_DISABLE = 0x00,
cparata	0:f27ce43dee4f	2407	LSM6DSOX_CMP_ALWAYS = 0x04,
cparata	0:f27ce43dee4f	2408	LSM6DSOX_CMP_8_TO_1 = 0x05,
cparata	0:f27ce43dee4f	2409	LSM6DSOX_CMP_16_TO_1 = 0x06,
cparata	0:f27ce43dee4f	2410	LSM6DSOX_CMP_32_TO_1 = 0x07,
cparata	0:f27ce43dee4f	2411	} lsm6dsox_uncoptr_rate_t;
cparata	0:f27ce43dee4f	2412	int32_t lsm6dsox_compression_algo_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2413	lsm6dsox_uncoptr_rate_t val);
cparata	0:f27ce43dee4f	2414	int32_t lsm6dsox_compression_algo_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2415	lsm6dsox_uncoptr_rate_t *val);
cparata	0:f27ce43dee4f	2416
cparata	0:f27ce43dee4f	2417	int32_t lsm6dsox_fifo_virtual_sens_odr_chg_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2418	uint8_t val);
cparata	0:f27ce43dee4f	2419	int32_t lsm6dsox_fifo_virtual_sens_odr_chg_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2420	uint8_t *val);
cparata	0:f27ce43dee4f	2421
cparata	0:f27ce43dee4f	2422	int32_t lsm6dsox_compression_algo_real_time_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2423	uint8_t val);
cparata	0:f27ce43dee4f	2424	int32_t lsm6dsox_compression_algo_real_time_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2425	uint8_t *val);
cparata	0:f27ce43dee4f	2426
cparata	0:f27ce43dee4f	2427	int32_t lsm6dsox_fifo_stop_on_wtm_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2428	int32_t lsm6dsox_fifo_stop_on_wtm_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2429
cparata	0:f27ce43dee4f	2430	typedef enum {
cparata	0:f27ce43dee4f	2431	LSM6DSOX_XL_NOT_BATCHED = 0,
cparata	0:f27ce43dee4f	2432	LSM6DSOX_XL_BATCHED_AT_12Hz5 = 1,
cparata	0:f27ce43dee4f	2433	LSM6DSOX_XL_BATCHED_AT_26Hz = 2,
cparata	0:f27ce43dee4f	2434	LSM6DSOX_XL_BATCHED_AT_52Hz = 3,
cparata	0:f27ce43dee4f	2435	LSM6DSOX_XL_BATCHED_AT_104Hz = 4,
cparata	0:f27ce43dee4f	2436	LSM6DSOX_XL_BATCHED_AT_208Hz = 5,
cparata	0:f27ce43dee4f	2437	LSM6DSOX_XL_BATCHED_AT_417Hz = 6,
cparata	0:f27ce43dee4f	2438	LSM6DSOX_XL_BATCHED_AT_833Hz = 7,
cparata	0:f27ce43dee4f	2439	LSM6DSOX_XL_BATCHED_AT_1667Hz = 8,
cparata	0:f27ce43dee4f	2440	LSM6DSOX_XL_BATCHED_AT_3333Hz = 9,
cparata	0:f27ce43dee4f	2441	LSM6DSOX_XL_BATCHED_AT_6667Hz = 10,
cparata	0:f27ce43dee4f	2442	LSM6DSOX_XL_BATCHED_AT_6Hz5 = 11,
cparata	0:f27ce43dee4f	2443	} lsm6dsox_bdr_xl_t;
cparata	0:f27ce43dee4f	2444	int32_t lsm6dsox_fifo_xl_batch_set(lsm6dsox_ctx_t *ctx, lsm6dsox_bdr_xl_t val);
cparata	0:f27ce43dee4f	2445	int32_t lsm6dsox_fifo_xl_batch_get(lsm6dsox_ctx_t ctx, lsm6dsox_bdr_xl_t val);
cparata	0:f27ce43dee4f	2446
cparata	0:f27ce43dee4f	2447	typedef enum {
cparata	0:f27ce43dee4f	2448	LSM6DSOX_GY_NOT_BATCHED = 0,
cparata	0:f27ce43dee4f	2449	LSM6DSOX_GY_BATCHED_AT_12Hz5 = 1,
cparata	0:f27ce43dee4f	2450	LSM6DSOX_GY_BATCHED_AT_26Hz = 2,
cparata	0:f27ce43dee4f	2451	LSM6DSOX_GY_BATCHED_AT_52Hz = 3,
cparata	0:f27ce43dee4f	2452	LSM6DSOX_GY_BATCHED_AT_104Hz = 4,
cparata	0:f27ce43dee4f	2453	LSM6DSOX_GY_BATCHED_AT_208Hz = 5,
cparata	0:f27ce43dee4f	2454	LSM6DSOX_GY_BATCHED_AT_417Hz = 6,
cparata	0:f27ce43dee4f	2455	LSM6DSOX_GY_BATCHED_AT_833Hz = 7,
cparata	0:f27ce43dee4f	2456	LSM6DSOX_GY_BATCHED_AT_1667Hz = 8,
cparata	0:f27ce43dee4f	2457	LSM6DSOX_GY_BATCHED_AT_3333Hz = 9,
cparata	0:f27ce43dee4f	2458	LSM6DSOX_GY_BATCHED_AT_6667Hz = 10,
cparata	0:f27ce43dee4f	2459	LSM6DSOX_GY_BATCHED_AT_6Hz5 = 11,
cparata	0:f27ce43dee4f	2460	} lsm6dsox_bdr_gy_t;
cparata	0:f27ce43dee4f	2461	int32_t lsm6dsox_fifo_gy_batch_set(lsm6dsox_ctx_t *ctx, lsm6dsox_bdr_gy_t val);
cparata	0:f27ce43dee4f	2462	int32_t lsm6dsox_fifo_gy_batch_get(lsm6dsox_ctx_t ctx, lsm6dsox_bdr_gy_t val);
cparata	0:f27ce43dee4f	2463
cparata	0:f27ce43dee4f	2464	typedef enum {
cparata	0:f27ce43dee4f	2465	LSM6DSOX_BYPASS_MODE = 0,
cparata	0:f27ce43dee4f	2466	LSM6DSOX_FIFO_MODE = 1,
cparata	0:f27ce43dee4f	2467	LSM6DSOX_STREAM_TO_FIFO_MODE = 3,
cparata	0:f27ce43dee4f	2468	LSM6DSOX_BYPASS_TO_STREAM_MODE = 4,
cparata	0:f27ce43dee4f	2469	LSM6DSOX_STREAM_MODE = 6,
cparata	0:f27ce43dee4f	2470	LSM6DSOX_BYPASS_TO_FIFO_MODE = 7,
cparata	0:f27ce43dee4f	2471	} lsm6dsox_fifo_mode_t;
cparata	0:f27ce43dee4f	2472	int32_t lsm6dsox_fifo_mode_set(lsm6dsox_ctx_t *ctx, lsm6dsox_fifo_mode_t val);
cparata	0:f27ce43dee4f	2473	int32_t lsm6dsox_fifo_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_fifo_mode_t val);
cparata	0:f27ce43dee4f	2474
cparata	0:f27ce43dee4f	2475	typedef enum {
cparata	0:f27ce43dee4f	2476	LSM6DSOX_TEMP_NOT_BATCHED = 0,
cparata	0:f27ce43dee4f	2477	LSM6DSOX_TEMP_BATCHED_AT_1Hz6 = 1,
cparata	0:f27ce43dee4f	2478	LSM6DSOX_TEMP_BATCHED_AT_12Hz5 = 2,
cparata	0:f27ce43dee4f	2479	LSM6DSOX_TEMP_BATCHED_AT_52Hz = 3,
cparata	0:f27ce43dee4f	2480	} lsm6dsox_odr_t_batch_t;
cparata	0:f27ce43dee4f	2481	int32_t lsm6dsox_fifo_temp_batch_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2482	lsm6dsox_odr_t_batch_t val);
cparata	0:f27ce43dee4f	2483	int32_t lsm6dsox_fifo_temp_batch_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2484	lsm6dsox_odr_t_batch_t *val);
cparata	0:f27ce43dee4f	2485
cparata	0:f27ce43dee4f	2486	typedef enum {
cparata	0:f27ce43dee4f	2487	LSM6DSOX_NO_DECIMATION = 0,
cparata	0:f27ce43dee4f	2488	LSM6DSOX_DEC_1 = 1,
cparata	0:f27ce43dee4f	2489	LSM6DSOX_DEC_8 = 2,
cparata	0:f27ce43dee4f	2490	LSM6DSOX_DEC_32 = 3,
cparata	0:f27ce43dee4f	2491	} lsm6dsox_odr_ts_batch_t;
cparata	0:f27ce43dee4f	2492	int32_t lsm6dsox_fifo_timestamp_decimation_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2493	lsm6dsox_odr_ts_batch_t val);
cparata	0:f27ce43dee4f	2494	int32_t lsm6dsox_fifo_timestamp_decimation_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2495	lsm6dsox_odr_ts_batch_t *val);
cparata	0:f27ce43dee4f	2496
cparata	0:f27ce43dee4f	2497	typedef enum {
cparata	0:f27ce43dee4f	2498	LSM6DSOX_XL_BATCH_EVENT = 0,
cparata	0:f27ce43dee4f	2499	LSM6DSOX_GYRO_BATCH_EVENT = 1,
cparata	0:f27ce43dee4f	2500	} lsm6dsox_trig_counter_bdr_t;
cparata	0:f27ce43dee4f	2501
cparata	0:f27ce43dee4f	2502	typedef enum {
cparata	1:fe40aec6e97a	2503	LSM6DSOX_GYRO_NC_TAG = 1,
cparata	0:f27ce43dee4f	2504	LSM6DSOX_XL_NC_TAG,
cparata	0:f27ce43dee4f	2505	LSM6DSOX_TEMPERATURE_TAG,
cparata	0:f27ce43dee4f	2506	LSM6DSOX_TIMESTAMP_TAG,
cparata	0:f27ce43dee4f	2507	LSM6DSOX_CFG_CHANGE_TAG,
cparata	0:f27ce43dee4f	2508	LSM6DSOX_XL_NC_T_2_TAG,
cparata	0:f27ce43dee4f	2509	LSM6DSOX_XL_NC_T_1_TAG,
cparata	0:f27ce43dee4f	2510	LSM6DSOX_XL_2XC_TAG,
cparata	0:f27ce43dee4f	2511	LSM6DSOX_XL_3XC_TAG,
cparata	0:f27ce43dee4f	2512	LSM6DSOX_GYRO_NC_T_2_TAG,
cparata	0:f27ce43dee4f	2513	LSM6DSOX_GYRO_NC_T_1_TAG,
cparata	0:f27ce43dee4f	2514	LSM6DSOX_GYRO_2XC_TAG,
cparata	0:f27ce43dee4f	2515	LSM6DSOX_GYRO_3XC_TAG,
cparata	0:f27ce43dee4f	2516	LSM6DSOX_SENSORHUB_SLAVE0_TAG,
cparata	0:f27ce43dee4f	2517	LSM6DSOX_SENSORHUB_SLAVE1_TAG,
cparata	0:f27ce43dee4f	2518	LSM6DSOX_SENSORHUB_SLAVE2_TAG,
cparata	0:f27ce43dee4f	2519	LSM6DSOX_SENSORHUB_SLAVE3_TAG,
cparata	0:f27ce43dee4f	2520	LSM6DSOX_STEP_CPUNTER_TAG,
cparata	0:f27ce43dee4f	2521	LSM6DSOX_GAME_ROTATION_TAG,
cparata	0:f27ce43dee4f	2522	LSM6DSOX_GEOMAG_ROTATION_TAG,
cparata	0:f27ce43dee4f	2523	LSM6DSOX_ROTATION_TAG,
cparata	1:fe40aec6e97a	2524	LSM6DSOX_SENSORHUB_NACK_TAG = 0x19,
cparata	0:f27ce43dee4f	2525	} lsm6dsox_fifo_tag_t;
cparata	0:f27ce43dee4f	2526	int32_t lsm6dsox_fifo_cnt_event_batch_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2527	lsm6dsox_trig_counter_bdr_t val);
cparata	0:f27ce43dee4f	2528	int32_t lsm6dsox_fifo_cnt_event_batch_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2529	lsm6dsox_trig_counter_bdr_t *val);
cparata	0:f27ce43dee4f	2530
cparata	0:f27ce43dee4f	2531	int32_t lsm6dsox_rst_batch_counter_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2532	int32_t lsm6dsox_rst_batch_counter_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2533
cparata	0:f27ce43dee4f	2534	int32_t lsm6dsox_batch_counter_threshold_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2535	uint16_t val);
cparata	0:f27ce43dee4f	2536	int32_t lsm6dsox_batch_counter_threshold_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2537	uint16_t *val);
cparata	0:f27ce43dee4f	2538
cparata	0:f27ce43dee4f	2539	int32_t lsm6dsox_fifo_data_level_get(lsm6dsox_ctx_t ctx, uint16_t val);
cparata	0:f27ce43dee4f	2540
cparata	0:f27ce43dee4f	2541	int32_t lsm6dsox_fifo_status_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2542	lsm6dsox_fifo_status2_t *val);
cparata	0:f27ce43dee4f	2543
cparata	0:f27ce43dee4f	2544	int32_t lsm6dsox_fifo_full_flag_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2545
cparata	0:f27ce43dee4f	2546	int32_t lsm6dsox_fifo_ovr_flag_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2547
cparata	0:f27ce43dee4f	2548	int32_t lsm6dsox_fifo_wtm_flag_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2549
cparata	0:f27ce43dee4f	2550	int32_t lsm6dsox_fifo_sensor_tag_get(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	2551	lsm6dsox_fifo_tag_t *val);
cparata	0:f27ce43dee4f	2552
cparata	0:f27ce43dee4f	2553	int32_t lsm6dsox_fifo_pedo_batch_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2554	int32_t lsm6dsox_fifo_pedo_batch_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2555
cparata	0:f27ce43dee4f	2556	int32_t lsm6dsox_sh_batch_slave_0_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2557	int32_t lsm6dsox_sh_batch_slave_0_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2558
cparata	0:f27ce43dee4f	2559	int32_t lsm6dsox_sh_batch_slave_1_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2560	int32_t lsm6dsox_sh_batch_slave_1_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2561
cparata	0:f27ce43dee4f	2562	int32_t lsm6dsox_sh_batch_slave_2_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2563	int32_t lsm6dsox_sh_batch_slave_2_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2564
cparata	0:f27ce43dee4f	2565	int32_t lsm6dsox_sh_batch_slave_3_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2566	int32_t lsm6dsox_sh_batch_slave_3_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2567
cparata	0:f27ce43dee4f	2568	typedef enum {
cparata	0:f27ce43dee4f	2569	LSM6DSOX_DEN_DISABLE = 0,
cparata	0:f27ce43dee4f	2570	LSM6DSOX_LEVEL_FIFO = 6,
cparata	0:f27ce43dee4f	2571	LSM6DSOX_LEVEL_LETCHED = 3,
cparata	0:f27ce43dee4f	2572	LSM6DSOX_LEVEL_TRIGGER = 2,
cparata	0:f27ce43dee4f	2573	LSM6DSOX_EDGE_TRIGGER = 4,
cparata	0:f27ce43dee4f	2574	} lsm6dsox_den_mode_t;
cparata	0:f27ce43dee4f	2575	int32_t lsm6dsox_den_mode_set(lsm6dsox_ctx_t *ctx, lsm6dsox_den_mode_t val);
cparata	0:f27ce43dee4f	2576	int32_t lsm6dsox_den_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_den_mode_t val);
cparata	0:f27ce43dee4f	2577
cparata	0:f27ce43dee4f	2578	typedef enum {
cparata	0:f27ce43dee4f	2579	LSM6DSOX_DEN_ACT_LOW = 0,
cparata	0:f27ce43dee4f	2580	LSM6DSOX_DEN_ACT_HIGH = 1,
cparata	0:f27ce43dee4f	2581	} lsm6dsox_den_lh_t;
cparata	0:f27ce43dee4f	2582	int32_t lsm6dsox_den_polarity_set(lsm6dsox_ctx_t *ctx, lsm6dsox_den_lh_t val);
cparata	0:f27ce43dee4f	2583	int32_t lsm6dsox_den_polarity_get(lsm6dsox_ctx_t ctx, lsm6dsox_den_lh_t val);
cparata	0:f27ce43dee4f	2584
cparata	0:f27ce43dee4f	2585	typedef enum {
cparata	0:f27ce43dee4f	2586	LSM6DSOX_STAMP_IN_GY_DATA = 0,
cparata	0:f27ce43dee4f	2587	LSM6DSOX_STAMP_IN_XL_DATA = 1,
cparata	0:f27ce43dee4f	2588	LSM6DSOX_STAMP_IN_GY_XL_DATA = 2,
cparata	0:f27ce43dee4f	2589	} lsm6dsox_den_xl_g_t;
cparata	0:f27ce43dee4f	2590	int32_t lsm6dsox_den_enable_set(lsm6dsox_ctx_t *ctx, lsm6dsox_den_xl_g_t val);
cparata	0:f27ce43dee4f	2591	int32_t lsm6dsox_den_enable_get(lsm6dsox_ctx_t ctx, lsm6dsox_den_xl_g_t val);
cparata	0:f27ce43dee4f	2592
cparata	0:f27ce43dee4f	2593	int32_t lsm6dsox_den_mark_axis_x_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2594	int32_t lsm6dsox_den_mark_axis_x_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2595
cparata	0:f27ce43dee4f	2596	int32_t lsm6dsox_den_mark_axis_y_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2597	int32_t lsm6dsox_den_mark_axis_y_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2598
cparata	0:f27ce43dee4f	2599	int32_t lsm6dsox_den_mark_axis_z_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2600	int32_t lsm6dsox_den_mark_axis_z_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2601
cparata	0:f27ce43dee4f	2602	typedef enum {
cparata	1:fe40aec6e97a	2603	LSM6DSOX_PEDO_BASE_MODE = 0x00,
cparata	1:fe40aec6e97a	2604	LSM6DSOX_FALSE_STEP_REJ = 0x10,
cparata	1:fe40aec6e97a	2605	LSM6DSOX_FALSE_STEP_REJ_ADV_MODE = 0x30,
cparata	0:f27ce43dee4f	2606	} lsm6dsox_pedo_md_t;
cparata	0:f27ce43dee4f	2607	int32_t lsm6dsox_pedo_sens_set(lsm6dsox_ctx_t *ctx, lsm6dsox_pedo_md_t val);
cparata	0:f27ce43dee4f	2608	int32_t lsm6dsox_pedo_sens_get(lsm6dsox_ctx_t ctx, lsm6dsox_pedo_md_t val);
cparata	0:f27ce43dee4f	2609
cparata	0:f27ce43dee4f	2610	int32_t lsm6dsox_pedo_step_detect_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2611
cparata	0:f27ce43dee4f	2612	int32_t lsm6dsox_pedo_debounce_steps_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2613	uint8_t *buff);
cparata	0:f27ce43dee4f	2614	int32_t lsm6dsox_pedo_debounce_steps_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2615	uint8_t *buff);
cparata	0:f27ce43dee4f	2616
cparata	0:f27ce43dee4f	2617	int32_t lsm6dsox_pedo_steps_period_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2618	int32_t lsm6dsox_pedo_steps_period_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2619
cparata	0:f27ce43dee4f	2620	int32_t lsm6dsox_pedo_adv_detection_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2621	int32_t lsm6dsox_pedo_adv_detection_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2622
cparata	0:f27ce43dee4f	2623	int32_t lsm6dsox_pedo_false_step_rejection_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2624	uint8_t val);
cparata	0:f27ce43dee4f	2625	int32_t lsm6dsox_pedo_false_step_rejection_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2626	uint8_t *val);
cparata	0:f27ce43dee4f	2627
cparata	0:f27ce43dee4f	2628	typedef enum {
cparata	0:f27ce43dee4f	2629	LSM6DSOX_EVERY_STEP = 0,
cparata	0:f27ce43dee4f	2630	LSM6DSOX_COUNT_OVERFLOW = 1,
cparata	0:f27ce43dee4f	2631	} lsm6dsox_carry_count_en_t;
cparata	0:f27ce43dee4f	2632	int32_t lsm6dsox_pedo_int_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2633	lsm6dsox_carry_count_en_t val);
cparata	0:f27ce43dee4f	2634	int32_t lsm6dsox_pedo_int_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2635	lsm6dsox_carry_count_en_t *val);
cparata	0:f27ce43dee4f	2636
cparata	0:f27ce43dee4f	2637	int32_t lsm6dsox_motion_flag_data_ready_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2638	uint8_t *val);
cparata	0:f27ce43dee4f	2639
cparata	0:f27ce43dee4f	2640	int32_t lsm6dsox_tilt_flag_data_ready_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2641	uint8_t *val);
cparata	0:f27ce43dee4f	2642
cparata	0:f27ce43dee4f	2643	int32_t lsm6dsox_sh_mag_sensitivity_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2644	int32_t lsm6dsox_sh_mag_sensitivity_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2645
cparata	0:f27ce43dee4f	2646	int32_t lsm6dsox_mlc_mag_sensitivity_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2647	int32_t lsm6dsox_mlc_mag_sensitivity_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2648
cparata	0:f27ce43dee4f	2649	int32_t lsm6dsox_mag_offset_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2650	int32_t lsm6dsox_mag_offset_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2651
cparata	0:f27ce43dee4f	2652	int32_t lsm6dsox_mag_soft_iron_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2653	int32_t lsm6dsox_mag_soft_iron_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2654
cparata	0:f27ce43dee4f	2655	typedef enum {
cparata	0:f27ce43dee4f	2656	LSM6DSOX_Z_EQ_Y = 0,
cparata	0:f27ce43dee4f	2657	LSM6DSOX_Z_EQ_MIN_Y = 1,
cparata	0:f27ce43dee4f	2658	LSM6DSOX_Z_EQ_X = 2,
cparata	0:f27ce43dee4f	2659	LSM6DSOX_Z_EQ_MIN_X = 3,
cparata	0:f27ce43dee4f	2660	LSM6DSOX_Z_EQ_MIN_Z = 4,
cparata	0:f27ce43dee4f	2661	LSM6DSOX_Z_EQ_Z = 5,
cparata	0:f27ce43dee4f	2662	} lsm6dsox_mag_z_axis_t;
cparata	0:f27ce43dee4f	2663	int32_t lsm6dsox_mag_z_orient_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2664	lsm6dsox_mag_z_axis_t val);
cparata	0:f27ce43dee4f	2665	int32_t lsm6dsox_mag_z_orient_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2666	lsm6dsox_mag_z_axis_t *val);
cparata	0:f27ce43dee4f	2667
cparata	0:f27ce43dee4f	2668	typedef enum {
cparata	0:f27ce43dee4f	2669	LSM6DSOX_Y_EQ_Y = 0,
cparata	0:f27ce43dee4f	2670	LSM6DSOX_Y_EQ_MIN_Y = 1,
cparata	0:f27ce43dee4f	2671	LSM6DSOX_Y_EQ_X = 2,
cparata	0:f27ce43dee4f	2672	LSM6DSOX_Y_EQ_MIN_X = 3,
cparata	0:f27ce43dee4f	2673	LSM6DSOX_Y_EQ_MIN_Z = 4,
cparata	0:f27ce43dee4f	2674	LSM6DSOX_Y_EQ_Z = 5,
cparata	0:f27ce43dee4f	2675	} lsm6dsox_mag_y_axis_t;
cparata	0:f27ce43dee4f	2676	int32_t lsm6dsox_mag_y_orient_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2677	lsm6dsox_mag_y_axis_t val);
cparata	0:f27ce43dee4f	2678	int32_t lsm6dsox_mag_y_orient_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2679	lsm6dsox_mag_y_axis_t *val);
cparata	0:f27ce43dee4f	2680
cparata	0:f27ce43dee4f	2681	typedef enum {
cparata	0:f27ce43dee4f	2682	LSM6DSOX_X_EQ_Y = 0,
cparata	0:f27ce43dee4f	2683	LSM6DSOX_X_EQ_MIN_Y = 1,
cparata	0:f27ce43dee4f	2684	LSM6DSOX_X_EQ_X = 2,
cparata	0:f27ce43dee4f	2685	LSM6DSOX_X_EQ_MIN_X = 3,
cparata	0:f27ce43dee4f	2686	LSM6DSOX_X_EQ_MIN_Z = 4,
cparata	0:f27ce43dee4f	2687	LSM6DSOX_X_EQ_Z = 5,
cparata	0:f27ce43dee4f	2688	} lsm6dsox_mag_x_axis_t;
cparata	0:f27ce43dee4f	2689	int32_t lsm6dsox_mag_x_orient_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2690	lsm6dsox_mag_x_axis_t val);
cparata	0:f27ce43dee4f	2691	int32_t lsm6dsox_mag_x_orient_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2692	lsm6dsox_mag_x_axis_t *val);
cparata	0:f27ce43dee4f	2693
cparata	0:f27ce43dee4f	2694	int32_t lsm6dsox_long_cnt_flag_data_ready_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2695	uint8_t *val);
cparata	0:f27ce43dee4f	2696
cparata	0:f27ce43dee4f	2697	typedef struct {
cparata	0:f27ce43dee4f	2698	lsm6dsox_fsm_enable_a_t fsm_enable_a;
cparata	0:f27ce43dee4f	2699	lsm6dsox_fsm_enable_b_t fsm_enable_b;
cparata	0:f27ce43dee4f	2700	} lsm6dsox_emb_fsm_enable_t;
cparata	0:f27ce43dee4f	2701	int32_t lsm6dsox_fsm_enable_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2702	lsm6dsox_emb_fsm_enable_t *val);
cparata	0:f27ce43dee4f	2703	int32_t lsm6dsox_fsm_enable_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2704	lsm6dsox_emb_fsm_enable_t *val);
cparata	0:f27ce43dee4f	2705
cparata	0:f27ce43dee4f	2706	int32_t lsm6dsox_long_cnt_set(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2707	int32_t lsm6dsox_long_cnt_get(lsm6dsox_ctx_t ctx, uint8_t buff);
cparata	0:f27ce43dee4f	2708
cparata	0:f27ce43dee4f	2709	typedef enum {
cparata	0:f27ce43dee4f	2710	LSM6DSOX_LC_NORMAL = 0,
cparata	0:f27ce43dee4f	2711	LSM6DSOX_LC_CLEAR = 1,
cparata	0:f27ce43dee4f	2712	LSM6DSOX_LC_CLEAR_DONE = 2,
cparata	0:f27ce43dee4f	2713	} lsm6dsox_fsm_lc_clr_t;
cparata	0:f27ce43dee4f	2714	int32_t lsm6dsox_long_clr_set(lsm6dsox_ctx_t *ctx, lsm6dsox_fsm_lc_clr_t val);
cparata	0:f27ce43dee4f	2715	int32_t lsm6dsox_long_clr_get(lsm6dsox_ctx_t ctx, lsm6dsox_fsm_lc_clr_t val);
cparata	0:f27ce43dee4f	2716
cparata	0:f27ce43dee4f	2717	typedef struct {
cparata	0:f27ce43dee4f	2718	lsm6dsox_fsm_outs1_t fsm_outs1;
cparata	0:f27ce43dee4f	2719	lsm6dsox_fsm_outs2_t fsm_outs2;
cparata	0:f27ce43dee4f	2720	lsm6dsox_fsm_outs3_t fsm_outs3;
cparata	0:f27ce43dee4f	2721	lsm6dsox_fsm_outs4_t fsm_outs4;
cparata	0:f27ce43dee4f	2722	lsm6dsox_fsm_outs5_t fsm_outs5;
cparata	0:f27ce43dee4f	2723	lsm6dsox_fsm_outs6_t fsm_outs6;
cparata	0:f27ce43dee4f	2724	lsm6dsox_fsm_outs7_t fsm_outs7;
cparata	0:f27ce43dee4f	2725	lsm6dsox_fsm_outs8_t fsm_outs8;
cparata	0:f27ce43dee4f	2726	lsm6dsox_fsm_outs1_t fsm_outs9;
cparata	0:f27ce43dee4f	2727	lsm6dsox_fsm_outs2_t fsm_outs10;
cparata	0:f27ce43dee4f	2728	lsm6dsox_fsm_outs3_t fsm_outs11;
cparata	0:f27ce43dee4f	2729	lsm6dsox_fsm_outs4_t fsm_outs12;
cparata	0:f27ce43dee4f	2730	lsm6dsox_fsm_outs5_t fsm_outs13;
cparata	0:f27ce43dee4f	2731	lsm6dsox_fsm_outs6_t fsm_outs14;
cparata	0:f27ce43dee4f	2732	lsm6dsox_fsm_outs7_t fsm_outs15;
cparata	0:f27ce43dee4f	2733	lsm6dsox_fsm_outs8_t fsm_outs16;
cparata	0:f27ce43dee4f	2734	} lsm6dsox_fsm_out_t;
cparata	0:f27ce43dee4f	2735	int32_t lsm6dsox_fsm_out_get(lsm6dsox_ctx_t ctx, lsm6dsox_fsm_out_t val);
cparata	0:f27ce43dee4f	2736
cparata	0:f27ce43dee4f	2737	typedef enum {
cparata	0:f27ce43dee4f	2738	LSM6DSOX_ODR_FSM_12Hz5 = 0,
cparata	0:f27ce43dee4f	2739	LSM6DSOX_ODR_FSM_26Hz = 1,
cparata	0:f27ce43dee4f	2740	LSM6DSOX_ODR_FSM_52Hz = 2,
cparata	0:f27ce43dee4f	2741	LSM6DSOX_ODR_FSM_104Hz = 3,
cparata	0:f27ce43dee4f	2742	} lsm6dsox_fsm_odr_t;
cparata	0:f27ce43dee4f	2743	int32_t lsm6dsox_fsm_data_rate_set(lsm6dsox_ctx_t *ctx, lsm6dsox_fsm_odr_t val);
cparata	0:f27ce43dee4f	2744	int32_t lsm6dsox_fsm_data_rate_get(lsm6dsox_ctx_t ctx, lsm6dsox_fsm_odr_t val);
cparata	0:f27ce43dee4f	2745
cparata	0:f27ce43dee4f	2746	int32_t lsm6dsox_fsm_init_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2747	int32_t lsm6dsox_fsm_init_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2748
cparata	0:f27ce43dee4f	2749	int32_t lsm6dsox_long_cnt_int_value_set(lsm6dsox_ctx_t *ctx, uint16_t val);
cparata	0:f27ce43dee4f	2750	int32_t lsm6dsox_long_cnt_int_value_get(lsm6dsox_ctx_t ctx, uint16_t val);
cparata	0:f27ce43dee4f	2751
cparata	0:f27ce43dee4f	2752	int32_t lsm6dsox_fsm_number_of_programs_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2753	int32_t lsm6dsox_fsm_number_of_programs_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2754
cparata	0:f27ce43dee4f	2755	int32_t lsm6dsox_fsm_start_address_set(lsm6dsox_ctx_t *ctx, uint16_t val);
cparata	0:f27ce43dee4f	2756	int32_t lsm6dsox_fsm_start_address_get(lsm6dsox_ctx_t ctx, uint16_t val);
cparata	0:f27ce43dee4f	2757
cparata	0:f27ce43dee4f	2758	int32_t lsm6dsox_mlc_status_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2759	lsm6dsox_mlc_status_mainpage_t *val);
cparata	0:f27ce43dee4f	2760
cparata	0:f27ce43dee4f	2761	typedef enum {
cparata	0:f27ce43dee4f	2762	LSM6DSOX_ODR_PRGS_12Hz5 = 0,
cparata	0:f27ce43dee4f	2763	LSM6DSOX_ODR_PRGS_26Hz = 1,
cparata	0:f27ce43dee4f	2764	LSM6DSOX_ODR_PRGS_52Hz = 2,
cparata	0:f27ce43dee4f	2765	LSM6DSOX_ODR_PRGS_104Hz = 3,
cparata	0:f27ce43dee4f	2766	} lsm6dsox_mlc_odr_t;
cparata	0:f27ce43dee4f	2767	int32_t lsm6dsox_mlc_data_rate_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2768	lsm6dsox_mlc_odr_t val);
cparata	0:f27ce43dee4f	2769	int32_t lsm6dsox_mlc_data_rate_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2770	lsm6dsox_mlc_odr_t *val);
cparata	0:f27ce43dee4f	2771
cparata	0:f27ce43dee4f	2772	typedef struct {
cparata	0:f27ce43dee4f	2773	lsm6dsox_sensor_hub_1_t sh_byte_1;
cparata	0:f27ce43dee4f	2774	lsm6dsox_sensor_hub_2_t sh_byte_2;
cparata	0:f27ce43dee4f	2775	lsm6dsox_sensor_hub_3_t sh_byte_3;
cparata	0:f27ce43dee4f	2776	lsm6dsox_sensor_hub_4_t sh_byte_4;
cparata	0:f27ce43dee4f	2777	lsm6dsox_sensor_hub_5_t sh_byte_5;
cparata	0:f27ce43dee4f	2778	lsm6dsox_sensor_hub_6_t sh_byte_6;
cparata	0:f27ce43dee4f	2779	lsm6dsox_sensor_hub_7_t sh_byte_7;
cparata	0:f27ce43dee4f	2780	lsm6dsox_sensor_hub_8_t sh_byte_8;
cparata	0:f27ce43dee4f	2781	lsm6dsox_sensor_hub_9_t sh_byte_9;
cparata	0:f27ce43dee4f	2782	lsm6dsox_sensor_hub_10_t sh_byte_10;
cparata	0:f27ce43dee4f	2783	lsm6dsox_sensor_hub_11_t sh_byte_11;
cparata	0:f27ce43dee4f	2784	lsm6dsox_sensor_hub_12_t sh_byte_12;
cparata	0:f27ce43dee4f	2785	lsm6dsox_sensor_hub_13_t sh_byte_13;
cparata	0:f27ce43dee4f	2786	lsm6dsox_sensor_hub_14_t sh_byte_14;
cparata	0:f27ce43dee4f	2787	lsm6dsox_sensor_hub_15_t sh_byte_15;
cparata	0:f27ce43dee4f	2788	lsm6dsox_sensor_hub_16_t sh_byte_16;
cparata	0:f27ce43dee4f	2789	lsm6dsox_sensor_hub_17_t sh_byte_17;
cparata	0:f27ce43dee4f	2790	lsm6dsox_sensor_hub_18_t sh_byte_18;
cparata	0:f27ce43dee4f	2791	} lsm6dsox_emb_sh_read_t;
cparata	0:f27ce43dee4f	2792	int32_t lsm6dsox_sh_read_data_raw_get(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	2793	lsm6dsox_emb_sh_read_t *val,
cparata	1:fe40aec6e97a	2794	uint8_t len);
cparata	0:f27ce43dee4f	2795
cparata	0:f27ce43dee4f	2796	typedef enum {
cparata	0:f27ce43dee4f	2797	LSM6DSOX_SLV_0 = 0,
cparata	0:f27ce43dee4f	2798	LSM6DSOX_SLV_0_1 = 1,
cparata	0:f27ce43dee4f	2799	LSM6DSOX_SLV_0_1_2 = 2,
cparata	0:f27ce43dee4f	2800	LSM6DSOX_SLV_0_1_2_3 = 3,
cparata	0:f27ce43dee4f	2801	} lsm6dsox_aux_sens_on_t;
cparata	0:f27ce43dee4f	2802	int32_t lsm6dsox_sh_slave_connected_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2803	lsm6dsox_aux_sens_on_t val);
cparata	0:f27ce43dee4f	2804	int32_t lsm6dsox_sh_slave_connected_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2805	lsm6dsox_aux_sens_on_t *val);
cparata	0:f27ce43dee4f	2806
cparata	0:f27ce43dee4f	2807	int32_t lsm6dsox_sh_master_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2808	int32_t lsm6dsox_sh_master_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2809
cparata	0:f27ce43dee4f	2810	typedef enum {
cparata	0:f27ce43dee4f	2811	LSM6DSOX_EXT_PULL_UP = 0,
cparata	0:f27ce43dee4f	2812	LSM6DSOX_INTERNAL_PULL_UP = 1,
cparata	0:f27ce43dee4f	2813	} lsm6dsox_shub_pu_en_t;
cparata	0:f27ce43dee4f	2814	int32_t lsm6dsox_sh_pin_mode_set(lsm6dsox_ctx_t *ctx, lsm6dsox_shub_pu_en_t val);
cparata	0:f27ce43dee4f	2815	int32_t lsm6dsox_sh_pin_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_shub_pu_en_t val);
cparata	0:f27ce43dee4f	2816
cparata	0:f27ce43dee4f	2817	int32_t lsm6dsox_sh_pass_through_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2818	int32_t lsm6dsox_sh_pass_through_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2819
cparata	0:f27ce43dee4f	2820	typedef enum {
cparata	1:fe40aec6e97a	2821	LSM6DSOX_EXT_ON_INT2_PIN = 1,
cparata	1:fe40aec6e97a	2822	LSM6DSOX_XL_GY_DRDY = 0,
cparata	0:f27ce43dee4f	2823	} lsm6dsox_start_config_t;
cparata	0:f27ce43dee4f	2824	int32_t lsm6dsox_sh_syncro_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2825	lsm6dsox_start_config_t val);
cparata	0:f27ce43dee4f	2826	int32_t lsm6dsox_sh_syncro_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2827	lsm6dsox_start_config_t *val);
cparata	0:f27ce43dee4f	2828
cparata	0:f27ce43dee4f	2829	typedef enum {
cparata	0:f27ce43dee4f	2830	LSM6DSOX_EACH_SH_CYCLE = 0,
cparata	0:f27ce43dee4f	2831	LSM6DSOX_ONLY_FIRST_CYCLE = 1,
cparata	0:f27ce43dee4f	2832	} lsm6dsox_write_once_t;
cparata	0:f27ce43dee4f	2833	int32_t lsm6dsox_sh_write_mode_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2834	lsm6dsox_write_once_t val);
cparata	0:f27ce43dee4f	2835	int32_t lsm6dsox_sh_write_mode_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2836	lsm6dsox_write_once_t *val);
cparata	0:f27ce43dee4f	2837
cparata	0:f27ce43dee4f	2838	int32_t lsm6dsox_sh_reset_set(lsm6dsox_ctx_t *ctx);
cparata	0:f27ce43dee4f	2839	int32_t lsm6dsox_sh_reset_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2840
cparata	0:f27ce43dee4f	2841	typedef enum {
cparata	0:f27ce43dee4f	2842	LSM6DSOX_SH_ODR_104Hz = 0,
cparata	0:f27ce43dee4f	2843	LSM6DSOX_SH_ODR_52Hz = 1,
cparata	0:f27ce43dee4f	2844	LSM6DSOX_SH_ODR_26Hz = 2,
cparata	0:f27ce43dee4f	2845	LSM6DSOX_SH_ODR_13Hz = 3,
cparata	0:f27ce43dee4f	2846	} lsm6dsox_shub_odr_t;
cparata	0:f27ce43dee4f	2847	int32_t lsm6dsox_sh_data_rate_set(lsm6dsox_ctx_t *ctx, lsm6dsox_shub_odr_t val);
cparata	0:f27ce43dee4f	2848	int32_t lsm6dsox_sh_data_rate_get(lsm6dsox_ctx_t ctx, lsm6dsox_shub_odr_t val);
cparata	0:f27ce43dee4f	2849
cparata	0:f27ce43dee4f	2850	typedef struct{
cparata	0:f27ce43dee4f	2851	uint8_t slv0_add;
cparata	0:f27ce43dee4f	2852	uint8_t slv0_subadd;
cparata	0:f27ce43dee4f	2853	uint8_t slv0_data;
cparata	0:f27ce43dee4f	2854	} lsm6dsox_sh_cfg_write_t;
cparata	0:f27ce43dee4f	2855	int32_t lsm6dsox_sh_cfg_write(lsm6dsox_ctx_t ctx, lsm6dsox_sh_cfg_write_t val);
cparata	0:f27ce43dee4f	2856
cparata	0:f27ce43dee4f	2857	typedef struct{
cparata	0:f27ce43dee4f	2858	uint8_t slv_add;
cparata	0:f27ce43dee4f	2859	uint8_t slv_subadd;
cparata	0:f27ce43dee4f	2860	uint8_t slv_len;
cparata	0:f27ce43dee4f	2861	} lsm6dsox_sh_cfg_read_t;
cparata	0:f27ce43dee4f	2862	int32_t lsm6dsox_sh_slv0_cfg_read(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2863	lsm6dsox_sh_cfg_read_t *val);
cparata	0:f27ce43dee4f	2864	int32_t lsm6dsox_sh_slv1_cfg_read(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2865	lsm6dsox_sh_cfg_read_t *val);
cparata	0:f27ce43dee4f	2866	int32_t lsm6dsox_sh_slv2_cfg_read(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2867	lsm6dsox_sh_cfg_read_t *val);
cparata	0:f27ce43dee4f	2868	int32_t lsm6dsox_sh_slv3_cfg_read(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2869	lsm6dsox_sh_cfg_read_t *val);
cparata	0:f27ce43dee4f	2870
cparata	0:f27ce43dee4f	2871	int32_t lsm6dsox_sh_status_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2872	lsm6dsox_status_master_t *val);
cparata	0:f27ce43dee4f	2873	typedef enum {
cparata	0:f27ce43dee4f	2874	LSM6DSOX_S4S_TPH_7bit = 0,
cparata	0:f27ce43dee4f	2875	LSM6DSOX_S4S_TPH_15bit = 1,
cparata	0:f27ce43dee4f	2876	} lsm6dsox_s4s_tph_res_t;
cparata	0:f27ce43dee4f	2877	int32_t lsm6dsox_s4s_tph_res_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2878	lsm6dsox_s4s_tph_res_t val);
cparata	0:f27ce43dee4f	2879	int32_t lsm6dsox_s4s_tph_res_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2880	lsm6dsox_s4s_tph_res_t *val);
cparata	0:f27ce43dee4f	2881
cparata	0:f27ce43dee4f	2882	int32_t lsm6dsox_s4s_tph_val_set(lsm6dsox_ctx_t *ctx, uint16_t val);
cparata	0:f27ce43dee4f	2883	int32_t lsm6dsox_s4s_tph_val_get(lsm6dsox_ctx_t ctx, uint16_t val);
cparata	0:f27ce43dee4f	2884
cparata	0:f27ce43dee4f	2885	typedef enum {
cparata	0:f27ce43dee4f	2886	LSM6DSOX_S4S_DT_RES_11 = 0,
cparata	0:f27ce43dee4f	2887	LSM6DSOX_S4S_DT_RES_12 = 1,
cparata	0:f27ce43dee4f	2888	LSM6DSOX_S4S_DT_RES_13 = 2,
cparata	0:f27ce43dee4f	2889	LSM6DSOX_S4S_DT_RES_14 = 3,
cparata	0:f27ce43dee4f	2890	} lsm6dsox_s4s_res_ratio_t;
cparata	0:f27ce43dee4f	2891	int32_t lsm6dsox_s4s_res_ratio_set(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2892	lsm6dsox_s4s_res_ratio_t val);
cparata	0:f27ce43dee4f	2893	int32_t lsm6dsox_s4s_res_ratio_get(lsm6dsox_ctx_t *ctx,
cparata	0:f27ce43dee4f	2894	lsm6dsox_s4s_res_ratio_t *val);
cparata	0:f27ce43dee4f	2895
cparata	0:f27ce43dee4f	2896	int32_t lsm6dsox_s4s_command_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2897	int32_t lsm6dsox_s4s_command_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2898
cparata	0:f27ce43dee4f	2899	int32_t lsm6dsox_s4s_dt_set(lsm6dsox_ctx_t *ctx, uint8_t val);
cparata	0:f27ce43dee4f	2900	int32_t lsm6dsox_s4s_dt_get(lsm6dsox_ctx_t ctx, uint8_t val);
cparata	0:f27ce43dee4f	2901
cparata	1:fe40aec6e97a	2902	typedef struct {
cparata	1:fe40aec6e97a	2903	uint8_t ui;
cparata	1:fe40aec6e97a	2904	uint8_t aux;
cparata	1:fe40aec6e97a	2905	} lsm6dsox_id_t;
cparata	1:fe40aec6e97a	2906	int32_t lsm6dsox_id_get(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	2907	lsm6dsox_id_t *val);
cparata	1:fe40aec6e97a	2908
cparata	1:fe40aec6e97a	2909	typedef struct {
cparata	1:fe40aec6e97a	2910	enum {
cparata	1:fe40aec6e97a	2911	LSM6DSOX_SEL_BY_HW = 0x00, /* bus mode select by HW (SPI 3W disable) */
cparata	1:fe40aec6e97a	2912	LSM6DSOX_SPI_4W = 0x06, /* Only SPI: SDO / SDI separated pins */
cparata	1:fe40aec6e97a	2913	LSM6DSOX_SPI_3W = 0x07, /* Only SPI: SDO / SDI share the same pin */
cparata	1:fe40aec6e97a	2914	LSM6DSOX_I2C = 0x04, /* Only I2C */
cparata	1:fe40aec6e97a	2915	LSM6DSOX_I3C_T_50us = 0x02, /* I3C: available time equal to 50 μs */
cparata	1:fe40aec6e97a	2916	LSM6DSOX_I3C_T_2us = 0x12, /* I3C: available time equal to 2 μs */
cparata	1:fe40aec6e97a	2917	LSM6DSOX_I3C_T_1ms = 0x22, /* I3C: available time equal to 1 ms */
cparata	1:fe40aec6e97a	2918	LSM6DSOX_I3C_T_25ms = 0x32, /* I3C: available time equal to 25 ms */
cparata	1:fe40aec6e97a	2919	} ui_bus_md;
cparata	1:fe40aec6e97a	2920	enum {
cparata	1:fe40aec6e97a	2921	LSM6DSOX_SPI_4W_AUX = 0x00,
cparata	1:fe40aec6e97a	2922	LSM6DSOX_SPI_3W_AUX = 0x01,
cparata	1:fe40aec6e97a	2923	} aux_bus_md;
cparata	1:fe40aec6e97a	2924	} lsm6dsox_bus_mode_t;
cparata	1:fe40aec6e97a	2925	int32_t lsm6dsox_bus_mode_set(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	2926	lsm6dsox_bus_mode_t val);
cparata	1:fe40aec6e97a	2927	int32_t lsm6dsox_bus_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	2928	lsm6dsox_bus_mode_t *val);
cparata	1:fe40aec6e97a	2929
cparata	1:fe40aec6e97a	2930	typedef enum {
cparata	1:fe40aec6e97a	2931	LSM6DSOX_DRV_RDY = 0x00, /* Initialize the device for driver usage */
cparata	1:fe40aec6e97a	2932	LSM6DSOX_BOOT = 0x01, /* Restore calib. param. ( it takes 10ms ) */
cparata	1:fe40aec6e97a	2933	LSM6DSOX_RESET = 0x02, /* Reset configuration registers */
cparata	1:fe40aec6e97a	2934	LSM6DSOX_FIFO_COMP = 0x04, /* FIFO compression initialization request. */
cparata	1:fe40aec6e97a	2935	LSM6DSOX_FSM = 0x08, /* Finite State Machine initialization request */
cparata	1:fe40aec6e97a	2936	LSM6DSOX_MLC = 0x10, /* Machine Learning Core initialization request */
cparata	1:fe40aec6e97a	2937	LSM6DSOX_PEDO = 0x20, /* Pedometer algo initialization request. */
cparata	1:fe40aec6e97a	2938	LSM6DSOX_TILT = 0x40, /* Tilt algo initialization request */
cparata	1:fe40aec6e97a	2939	LSM6DSOX_SMOTION = 0x80, /* Significant Motion initialization request */
cparata	1:fe40aec6e97a	2940	} lsm6dsox_init_t;
cparata	1:fe40aec6e97a	2941	int32_t lsm6dsox_init_set(lsm6dsox_ctx_t *ctx, lsm6dsox_init_t val);
cparata	1:fe40aec6e97a	2942
cparata	1:fe40aec6e97a	2943	typedef struct {
cparata	1:fe40aec6e97a	2944	uint8_t sw_reset : 1; /* Restoring configuration registers */
cparata	1:fe40aec6e97a	2945	uint8_t boot : 1; /* Restoring calibration parameters */
cparata	1:fe40aec6e97a	2946	uint8_t drdy_xl : 1; /* Accelerometer data ready */
cparata	1:fe40aec6e97a	2947	uint8_t drdy_g : 1; /* Gyroscope data ready */
cparata	1:fe40aec6e97a	2948	uint8_t drdy_temp : 1; /* Temperature data ready */
cparata	1:fe40aec6e97a	2949	uint8_t ois_drdy_xl : 1; /* Accelerometer data ready on OIS */
cparata	1:fe40aec6e97a	2950	uint8_t ois_drdy_g : 1; /* Gyroscope data ready on OIS */
cparata	1:fe40aec6e97a	2951	uint8_t ois_gyro_settling : 1; /* Gyroscope is in the settling phase */
cparata	1:fe40aec6e97a	2952	} lsm6dsox_status_t;
cparata	1:fe40aec6e97a	2953	int32_t lsm6dsox_status_get(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	2954	lsm6dsox_status_t *val);
cparata	1:fe40aec6e97a	2955
cparata	1:fe40aec6e97a	2956	typedef struct {
cparata	1:fe40aec6e97a	2957	uint8_t sdo_sa0_pull_up : 1; /* 1 = pull-up on SDO/SA0 pin */
cparata	1:fe40aec6e97a	2958	uint8_t aux_sdo_ocs_pull_up : 1; /* 1 = pull-up on OCS_Aux/SDO_Aux pins */
cparata	1:fe40aec6e97a	2959	uint8_t int1_int2_push_pull : 1; /* 1 = push-pull / 0 = open-drain*/
cparata	1:fe40aec6e97a	2960	uint8_t int1_pull_down : 1; /* 1 = pull-down always disabled (0=auto) */
cparata	1:fe40aec6e97a	2961	} lsm6dsox_pin_conf_t;
cparata	1:fe40aec6e97a	2962	int32_t lsm6dsox_pin_conf_set(lsm6dsox_ctx_t *ctx, lsm6dsox_pin_conf_t val);
cparata	1:fe40aec6e97a	2963	int32_t lsm6dsox_pin_conf_get(lsm6dsox_ctx_t ctx, lsm6dsox_pin_conf_t val);
cparata	1:fe40aec6e97a	2964
cparata	1:fe40aec6e97a	2965	typedef struct {
cparata	1:fe40aec6e97a	2966	uint8_t active_low : 1; /* 1 = active low / 0 = active high */
cparata	1:fe40aec6e97a	2967	uint8_t base_latched : 1; /* base functions are: FF, WU, 6D, Tap, Act/Inac */
cparata	1:fe40aec6e97a	2968	uint8_t emb_latched : 1; /* emb functions are: Pedo, Tilt, SMot, Timestamp */
cparata	1:fe40aec6e97a	2969	} lsm6dsox_int_mode_t;
cparata	1:fe40aec6e97a	2970	int32_t lsm6dsox_interrupt_mode_set(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	2971	lsm6dsox_int_mode_t val);
cparata	1:fe40aec6e97a	2972	int32_t lsm6dsox_interrupt_mode_get(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	2973	lsm6dsox_int_mode_t *val);
cparata	1:fe40aec6e97a	2974
cparata	1:fe40aec6e97a	2975	typedef struct {
cparata	1:fe40aec6e97a	2976	uint8_t drdy_xl : 1; /* Accelerometer data ready */
cparata	1:fe40aec6e97a	2977	uint8_t drdy_g : 1; /* Gyroscope data ready */
cparata	1:fe40aec6e97a	2978	uint8_t drdy_temp : 1; /* Temperature data ready (1 = int2 pin disable) */
cparata	1:fe40aec6e97a	2979	uint8_t boot : 1; /* Restoring calibration parameters */
cparata	1:fe40aec6e97a	2980	uint8_t fifo_th : 1; /* FIFO threshold reached */
cparata	1:fe40aec6e97a	2981	uint8_t fifo_ovr : 1; /* FIFO overrun */
cparata	1:fe40aec6e97a	2982	uint8_t fifo_full : 1; /* FIFO full */
cparata	1:fe40aec6e97a	2983	uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */
cparata	1:fe40aec6e97a	2984	uint8_t den_flag : 1; /* external trigger level recognition (DEN) */
cparata	1:fe40aec6e97a	2985	uint8_t sh_endop : 1; /* sensor hub end operation */
cparata	1:fe40aec6e97a	2986	uint8_t timestamp : 1; /* timestamp overflow (1 = int2 pin disable) */
cparata	1:fe40aec6e97a	2987	uint8_t six_d : 1; /* orientation change (6D/4D detection) */
cparata	1:fe40aec6e97a	2988	uint8_t double_tap : 1; /* double-tap event */
cparata	1:fe40aec6e97a	2989	uint8_t free_fall : 1; /* free fall event */
cparata	1:fe40aec6e97a	2990	uint8_t wake_up : 1; /* wake up event */
cparata	1:fe40aec6e97a	2991	uint8_t single_tap : 1; /* single-tap event */
cparata	1:fe40aec6e97a	2992	uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */
cparata	1:fe40aec6e97a	2993	uint8_t step_detector : 1; /* Step detected */
cparata	1:fe40aec6e97a	2994	uint8_t tilt : 1; /* Relative tilt event detected */
cparata	1:fe40aec6e97a	2995	uint8_t sig_mot : 1; /* "significant motion" event detected */
cparata	1:fe40aec6e97a	2996	uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */
cparata	1:fe40aec6e97a	2997	uint8_t fsm1 : 1; /* fsm 1 interrupt event */
cparata	1:fe40aec6e97a	2998	uint8_t fsm2 : 1; /* fsm 2 interrupt event */
cparata	1:fe40aec6e97a	2999	uint8_t fsm3 : 1; /* fsm 3 interrupt event */
cparata	1:fe40aec6e97a	3000	uint8_t fsm4 : 1; /* fsm 4 interrupt event */
cparata	1:fe40aec6e97a	3001	uint8_t fsm5 : 1; /* fsm 5 interrupt event */
cparata	1:fe40aec6e97a	3002	uint8_t fsm6 : 1; /* fsm 6 interrupt event */
cparata	1:fe40aec6e97a	3003	uint8_t fsm7 : 1; /* fsm 7 interrupt event */
cparata	1:fe40aec6e97a	3004	uint8_t fsm8 : 1; /* fsm 8 interrupt event */
cparata	1:fe40aec6e97a	3005	uint8_t fsm9 : 1; /* fsm 9 interrupt event */
cparata	1:fe40aec6e97a	3006	uint8_t fsm10 : 1; /* fsm 10 interrupt event */
cparata	1:fe40aec6e97a	3007	uint8_t fsm11 : 1; /* fsm 11 interrupt event */
cparata	1:fe40aec6e97a	3008	uint8_t fsm12 : 1; /* fsm 12 interrupt event */
cparata	1:fe40aec6e97a	3009	uint8_t fsm13 : 1; /* fsm 13 interrupt event */
cparata	1:fe40aec6e97a	3010	uint8_t fsm14 : 1; /* fsm 14 interrupt event */
cparata	1:fe40aec6e97a	3011	uint8_t fsm15 : 1; /* fsm 15 interrupt event */
cparata	1:fe40aec6e97a	3012	uint8_t fsm16 : 1; /* fsm 16 interrupt event */
cparata	1:fe40aec6e97a	3013	uint8_t mlc1 : 1; /* mlc 1 interrupt event */
cparata	1:fe40aec6e97a	3014	uint8_t mlc2 : 1; /* mlc 2 interrupt event */
cparata	1:fe40aec6e97a	3015	uint8_t mlc3 : 1; /* mlc 3 interrupt event */
cparata	1:fe40aec6e97a	3016	uint8_t mlc4 : 1; /* mlc 4 interrupt event */
cparata	1:fe40aec6e97a	3017	uint8_t mlc5 : 1; /* mlc 5 interrupt event */
cparata	1:fe40aec6e97a	3018	uint8_t mlc6 : 1; /* mlc 6 interrupt event */
cparata	1:fe40aec6e97a	3019	uint8_t mlc7 : 1; /* mlc 7 interrupt event */
cparata	1:fe40aec6e97a	3020	uint8_t mlc8 : 1; /* mlc 8 interrupt event */
cparata	1:fe40aec6e97a	3021	} lsm6dsox_pin_int1_route_t;
cparata	1:fe40aec6e97a	3022
cparata	1:fe40aec6e97a	3023	int32_t lsm6dsox_pin_int1_route_set(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	3024	lsm6dsox_pin_int1_route_t val);
cparata	1:fe40aec6e97a	3025	int32_t lsm6dsox_pin_int1_route_get(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	3026	lsm6dsox_pin_int1_route_t *val);
cparata	1:fe40aec6e97a	3027
cparata	1:fe40aec6e97a	3028	typedef struct {
cparata	1:fe40aec6e97a	3029	uint8_t drdy_ois : 1; /* OIS chain data ready */
cparata	1:fe40aec6e97a	3030	uint8_t drdy_xl : 1; /* Accelerometer data ready */
cparata	1:fe40aec6e97a	3031	uint8_t drdy_g : 1; /* Gyroscope data ready */
cparata	1:fe40aec6e97a	3032	uint8_t drdy_temp : 1; /* Temperature data ready */
cparata	1:fe40aec6e97a	3033	uint8_t fifo_th : 1; /* FIFO threshold reached */
cparata	1:fe40aec6e97a	3034	uint8_t fifo_ovr : 1; /* FIFO overrun */
cparata	1:fe40aec6e97a	3035	uint8_t fifo_full : 1; /* FIFO full */
cparata	1:fe40aec6e97a	3036	uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */
cparata	1:fe40aec6e97a	3037	uint8_t timestamp : 1; /* timestamp overflow */
cparata	1:fe40aec6e97a	3038	uint8_t six_d : 1; /* orientation change (6D/4D detection) */
cparata	1:fe40aec6e97a	3039	uint8_t double_tap : 1; /* double-tap event */
cparata	1:fe40aec6e97a	3040	uint8_t free_fall : 1; /* free fall event */
cparata	1:fe40aec6e97a	3041	uint8_t wake_up : 1; /* wake up event */
cparata	1:fe40aec6e97a	3042	uint8_t single_tap : 1; /* single-tap event */
cparata	1:fe40aec6e97a	3043	uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */
cparata	1:fe40aec6e97a	3044	uint8_t step_detector : 1; /* Step detected */
cparata	1:fe40aec6e97a	3045	uint8_t tilt : 1; /* Relative tilt event detected */
cparata	1:fe40aec6e97a	3046	uint8_t sig_mot : 1; /* "significant motion" event detected */
cparata	1:fe40aec6e97a	3047	uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */
cparata	1:fe40aec6e97a	3048	uint8_t fsm1 : 1; /* fsm 1 interrupt event */
cparata	1:fe40aec6e97a	3049	uint8_t fsm2 : 1; /* fsm 2 interrupt event */
cparata	1:fe40aec6e97a	3050	uint8_t fsm3 : 1; /* fsm 3 interrupt event */
cparata	1:fe40aec6e97a	3051	uint8_t fsm4 : 1; /* fsm 4 interrupt event */
cparata	1:fe40aec6e97a	3052	uint8_t fsm5 : 1; /* fsm 5 interrupt event */
cparata	1:fe40aec6e97a	3053	uint8_t fsm6 : 1; /* fsm 6 interrupt event */
cparata	1:fe40aec6e97a	3054	uint8_t fsm7 : 1; /* fsm 7 interrupt event */
cparata	1:fe40aec6e97a	3055	uint8_t fsm8 : 1; /* fsm 8 interrupt event */
cparata	1:fe40aec6e97a	3056	uint8_t fsm9 : 1; /* fsm 9 interrupt event */
cparata	1:fe40aec6e97a	3057	uint8_t fsm10 : 1; /* fsm 10 interrupt event */
cparata	1:fe40aec6e97a	3058	uint8_t fsm11 : 1; /* fsm 11 interrupt event */
cparata	1:fe40aec6e97a	3059	uint8_t fsm12 : 1; /* fsm 12 interrupt event */
cparata	1:fe40aec6e97a	3060	uint8_t fsm13 : 1; /* fsm 13 interrupt event */
cparata	1:fe40aec6e97a	3061	uint8_t fsm14 : 1; /* fsm 14 interrupt event */
cparata	1:fe40aec6e97a	3062	uint8_t fsm15 : 1; /* fsm 15 interrupt event */
cparata	1:fe40aec6e97a	3063	uint8_t fsm16 : 1; /* fsm 16 interrupt event */
cparata	1:fe40aec6e97a	3064	uint8_t mlc1 : 1; /* mlc 1 interrupt event */
cparata	1:fe40aec6e97a	3065	uint8_t mlc2 : 1; /* mlc 2 interrupt event */
cparata	1:fe40aec6e97a	3066	uint8_t mlc3 : 1; /* mlc 3 interrupt event */
cparata	1:fe40aec6e97a	3067	uint8_t mlc4 : 1; /* mlc 4 interrupt event */
cparata	1:fe40aec6e97a	3068	uint8_t mlc5 : 1; /* mlc 5 interrupt event */
cparata	1:fe40aec6e97a	3069	uint8_t mlc6 : 1; /* mlc 6 interrupt event */
cparata	1:fe40aec6e97a	3070	uint8_t mlc7 : 1; /* mlc 7 interrupt event */
cparata	1:fe40aec6e97a	3071	uint8_t mlc8 : 1; /* mlc 8 interrupt event */
cparata	1:fe40aec6e97a	3072	} lsm6dsox_pin_int2_route_t;
cparata	1:fe40aec6e97a	3073
cparata	1:fe40aec6e97a	3074	int32_t lsm6dsox_pin_int2_route_set(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	3075	lsm6dsox_pin_int2_route_t val);
cparata	1:fe40aec6e97a	3076	int32_t lsm6dsox_pin_int2_route_get(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	3077	lsm6dsox_pin_int2_route_t *val);
cparata	1:fe40aec6e97a	3078
cparata	1:fe40aec6e97a	3079	typedef struct {
cparata	1:fe40aec6e97a	3080	uint8_t drdy_xl : 1; /* Accelerometer data ready */
cparata	1:fe40aec6e97a	3081	uint8_t drdy_g : 1; /* Gyroscope data ready */
cparata	1:fe40aec6e97a	3082	uint8_t drdy_temp : 1; /* Temperature data ready */
cparata	1:fe40aec6e97a	3083	uint8_t den_flag : 1; /* external trigger level recognition (DEN) */
cparata	1:fe40aec6e97a	3084	uint8_t timestamp : 1; /* timestamp overflow (1 = int2 pin disable) */
cparata	1:fe40aec6e97a	3085	uint8_t free_fall : 1; /* free fall event */
cparata	1:fe40aec6e97a	3086	uint8_t wake_up : 1; /* wake up event */
cparata	1:fe40aec6e97a	3087	uint8_t wake_up_z : 1; /* wake up on Z axis event */
cparata	1:fe40aec6e97a	3088	uint8_t wake_up_y : 1; /* wake up on Y axis event */
cparata	1:fe40aec6e97a	3089	uint8_t wake_up_x : 1; /* wake up on X axis event */
cparata	1:fe40aec6e97a	3090	uint8_t single_tap : 1; /* single-tap event */
cparata	1:fe40aec6e97a	3091	uint8_t double_tap : 1; /* double-tap event */
cparata	1:fe40aec6e97a	3092	uint8_t tap_z : 1; /* single-tap on Z axis event */
cparata	1:fe40aec6e97a	3093	uint8_t tap_y : 1; /* single-tap on Y axis event */
cparata	1:fe40aec6e97a	3094	uint8_t tap_x : 1; /* single-tap on X axis event */
cparata	1:fe40aec6e97a	3095	uint8_t tap_sign : 1; /* sign of tap event (0-pos / 1-neg) */
cparata	1:fe40aec6e97a	3096	uint8_t six_d : 1; /* orientation change (6D/4D detection) */
cparata	1:fe40aec6e97a	3097	uint8_t six_d_xl : 1; /* X-axis low 6D/4D event (under threshold) */
cparata	1:fe40aec6e97a	3098	uint8_t six_d_xh : 1; /* X-axis high 6D/4D event (over threshold) */
cparata	1:fe40aec6e97a	3099	uint8_t six_d_yl : 1; /* Y-axis low 6D/4D event (under threshold) */
cparata	1:fe40aec6e97a	3100	uint8_t six_d_yh : 1; /* Y-axis high 6D/4D event (over threshold) */
cparata	1:fe40aec6e97a	3101	uint8_t six_d_zl : 1; /* Z-axis low 6D/4D event (under threshold) */
cparata	1:fe40aec6e97a	3102	uint8_t six_d_zh : 1; /* Z-axis high 6D/4D event (over threshold) */
cparata	1:fe40aec6e97a	3103	uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */
cparata	1:fe40aec6e97a	3104	uint8_t sleep_state : 1; /* Act/Inact status flag (0-Act / 1-Inact) */
cparata	1:fe40aec6e97a	3105	uint8_t step_detector : 1; /* Step detected */
cparata	1:fe40aec6e97a	3106	uint8_t tilt : 1; /* Relative tilt event detected */
cparata	1:fe40aec6e97a	3107	uint8_t sig_mot : 1; /* "significant motion" event detected */
cparata	1:fe40aec6e97a	3108	uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */
cparata	1:fe40aec6e97a	3109	uint8_t fsm1 : 1; /* fsm 1 interrupt event */
cparata	1:fe40aec6e97a	3110	uint8_t fsm2 : 1; /* fsm 2 interrupt event */
cparata	1:fe40aec6e97a	3111	uint8_t fsm3 : 1; /* fsm 3 interrupt event */
cparata	1:fe40aec6e97a	3112	uint8_t fsm4 : 1; /* fsm 4 interrupt event */
cparata	1:fe40aec6e97a	3113	uint8_t fsm5 : 1; /* fsm 5 interrupt event */
cparata	1:fe40aec6e97a	3114	uint8_t fsm6 : 1; /* fsm 6 interrupt event */
cparata	1:fe40aec6e97a	3115	uint8_t fsm7 : 1; /* fsm 7 interrupt event */
cparata	1:fe40aec6e97a	3116	uint8_t fsm8 : 1; /* fsm 8 interrupt event */
cparata	1:fe40aec6e97a	3117	uint8_t fsm9 : 1; /* fsm 9 interrupt event */
cparata	1:fe40aec6e97a	3118	uint8_t fsm10 : 1; /* fsm 10 interrupt event */
cparata	1:fe40aec6e97a	3119	uint8_t fsm11 : 1; /* fsm 11 interrupt event */
cparata	1:fe40aec6e97a	3120	uint8_t fsm12 : 1; /* fsm 12 interrupt event */
cparata	1:fe40aec6e97a	3121	uint8_t fsm13 : 1; /* fsm 13 interrupt event */
cparata	1:fe40aec6e97a	3122	uint8_t fsm14 : 1; /* fsm 14 interrupt event */
cparata	1:fe40aec6e97a	3123	uint8_t fsm15 : 1; /* fsm 15 interrupt event */
cparata	1:fe40aec6e97a	3124	uint8_t fsm16 : 1; /* fsm 16 interrupt event */
cparata	1:fe40aec6e97a	3125	uint8_t mlc1 : 1; /* mlc 1 interrupt event */
cparata	1:fe40aec6e97a	3126	uint8_t mlc2 : 1; /* mlc 2 interrupt event */
cparata	1:fe40aec6e97a	3127	uint8_t mlc3 : 1; /* mlc 3 interrupt event */
cparata	1:fe40aec6e97a	3128	uint8_t mlc4 : 1; /* mlc 4 interrupt event */
cparata	1:fe40aec6e97a	3129	uint8_t mlc5 : 1; /* mlc 5 interrupt event */
cparata	1:fe40aec6e97a	3130	uint8_t mlc6 : 1; /* mlc 6 interrupt event */
cparata	1:fe40aec6e97a	3131	uint8_t mlc7 : 1; /* mlc 7 interrupt event */
cparata	1:fe40aec6e97a	3132	uint8_t mlc8 : 1; /* mlc 8 interrupt event */
cparata	1:fe40aec6e97a	3133	uint8_t sh_endop : 1; /* sensor hub end operation */
cparata	1:fe40aec6e97a	3134	uint8_t sh_slave0_nack : 1; /* Not acknowledge on sensor hub slave 0 */
cparata	1:fe40aec6e97a	3135	uint8_t sh_slave1_nack : 1; /* Not acknowledge on sensor hub slave 1 */
cparata	1:fe40aec6e97a	3136	uint8_t sh_slave2_nack : 1; /* Not acknowledge on sensor hub slave 2 */
cparata	1:fe40aec6e97a	3137	uint8_t sh_slave3_nack : 1; /* Not acknowledge on sensor hub slave 3 */
cparata	1:fe40aec6e97a	3138	uint8_t sh_wr_once : 1; /* "WRITE_ONCE" end on sensor hub slave 0 */
cparata	1:fe40aec6e97a	3139	uint16_t fifo_diff : 10; /* Number of unread sensor data in FIFO*/
cparata	1:fe40aec6e97a	3140	uint8_t fifo_ovr_latched : 1; /* Latched FIFO overrun status */
cparata	1:fe40aec6e97a	3141	uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */
cparata	1:fe40aec6e97a	3142	uint8_t fifo_full : 1; /* FIFO full */
cparata	1:fe40aec6e97a	3143	uint8_t fifo_ovr : 1; /* FIFO overrun */
cparata	1:fe40aec6e97a	3144	uint8_t fifo_th : 1; /* FIFO threshold reached */
cparata	1:fe40aec6e97a	3145	} lsm6dsox_all_sources_t;
cparata	1:fe40aec6e97a	3146	int32_t lsm6dsox_all_sources_get(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	3147	lsm6dsox_all_sources_t *val);
cparata	1:fe40aec6e97a	3148
cparata	1:fe40aec6e97a	3149	typedef struct{
cparata	1:fe40aec6e97a	3150	uint8_t odr_fine_tune;
cparata	4:88054adaed8d	3151	} lsm6dsox_dev_cal_t;
cparata	4:88054adaed8d	3152	int32_t lsm6dsox_calibration_get(lsm6dsox_ctx_t ctx, lsm6dsox_dev_cal_t val);
cparata	1:fe40aec6e97a	3153
cparata	1:fe40aec6e97a	3154	typedef struct {
cparata	1:fe40aec6e97a	3155	struct {
cparata	1:fe40aec6e97a	3156	struct {
cparata	1:fe40aec6e97a	3157	enum {
cparata	1:fe40aec6e97a	3158	LSM6DSOX_XL_UI_OFF = 0x00, /* in power down */
cparata	1:fe40aec6e97a	3159	LSM6DSOX_XL_UI_1Hz6_LP = 0x1B, /* @1Hz6 (low power) */
cparata	1:fe40aec6e97a	3160	LSM6DSOX_XL_UI_1Hz6_ULP = 0x2B, /* @1Hz6 (ultra low/Gy, OIS imu off) */
cparata	1:fe40aec6e97a	3161	LSM6DSOX_XL_UI_12Hz5_HP = 0x01, /* @12Hz5 (high performance) */
cparata	1:fe40aec6e97a	3162	LSM6DSOX_XL_UI_12Hz5_LP = 0x11, /* @12Hz5 (low power) */
cparata	1:fe40aec6e97a	3163	LSM6DSOX_XL_UI_12Hz5_ULP = 0x21, /* @12Hz5 (ultra low/Gy, OIS imu off) */
cparata	1:fe40aec6e97a	3164	LSM6DSOX_XL_UI_26Hz_HP = 0x02, /* @26Hz (high performance) */
cparata	1:fe40aec6e97a	3165	LSM6DSOX_XL_UI_26Hz_LP = 0x12, /* @26Hz (low power) */
cparata	1:fe40aec6e97a	3166	LSM6DSOX_XL_UI_26Hz_ULP = 0x22, /* @26Hz (ultra low/Gy, OIS imu off) */
cparata	1:fe40aec6e97a	3167	LSM6DSOX_XL_UI_52Hz_HP = 0x03, /* @52Hz (high performance) */
cparata	1:fe40aec6e97a	3168	LSM6DSOX_XL_UI_52Hz_LP = 0x13, /* @52Hz (low power) */
cparata	1:fe40aec6e97a	3169	LSM6DSOX_XL_UI_52Hz_ULP = 0x23, /* @52Hz (ultra low/Gy, OIS imu off) */
cparata	1:fe40aec6e97a	3170	LSM6DSOX_XL_UI_104Hz_HP = 0x04, /* @104Hz (high performance) */
cparata	1:fe40aec6e97a	3171	LSM6DSOX_XL_UI_104Hz_NM = 0x14, /* @104Hz (normal mode) */
cparata	1:fe40aec6e97a	3172	LSM6DSOX_XL_UI_104Hz_ULP = 0x24, /* @104Hz (ultra low/Gy, OIS imu off) */
cparata	1:fe40aec6e97a	3173	LSM6DSOX_XL_UI_208Hz_HP = 0x05, /* @208Hz (high performance) */
cparata	1:fe40aec6e97a	3174	LSM6DSOX_XL_UI_208Hz_NM = 0x15, /* @208Hz (normal mode) */
cparata	1:fe40aec6e97a	3175	LSM6DSOX_XL_UI_208Hz_ULP = 0x25, /* @208Hz (ultra low/Gy, OIS imu off) */
cparata	1:fe40aec6e97a	3176	LSM6DSOX_XL_UI_416Hz_HP = 0x06, /* @416Hz (high performance) */
cparata	1:fe40aec6e97a	3177	LSM6DSOX_XL_UI_833Hz_HP = 0x07, /* @833Hz (high performance) */
cparata	1:fe40aec6e97a	3178	LSM6DSOX_XL_UI_1667Hz_HP = 0x08, /* @1kHz66 (high performance) */
cparata	1:fe40aec6e97a	3179	LSM6DSOX_XL_UI_3333Hz_HP = 0x09, /* @3kHz33 (high performance) */
cparata	1:fe40aec6e97a	3180	LSM6DSOX_XL_UI_6667Hz_HP = 0x0A, /* @6kHz66 (high performance) */
cparata	1:fe40aec6e97a	3181	} odr;
cparata	1:fe40aec6e97a	3182	enum {
cparata	1:fe40aec6e97a	3183	LSM6DSOX_XL_UI_2g = 0,
cparata	1:fe40aec6e97a	3184	LSM6DSOX_XL_UI_4g = 2,
cparata	1:fe40aec6e97a	3185	LSM6DSOX_XL_UI_8g = 3,
cparata	1:fe40aec6e97a	3186	LSM6DSOX_XL_UI_16g = 1, /* OIS full scale is also forced to be 16g */
cparata	1:fe40aec6e97a	3187	} fs;
cparata	1:fe40aec6e97a	3188	} xl;
cparata	1:fe40aec6e97a	3189	struct {
cparata	1:fe40aec6e97a	3190	enum {
cparata	1:fe40aec6e97a	3191	LSM6DSOX_GY_UI_OFF = 0x00, /* gy in power down */
cparata	1:fe40aec6e97a	3192	LSM6DSOX_GY_UI_12Hz5_LP = 0x11, /* gy @12Hz5 (low power) */
cparata	1:fe40aec6e97a	3193	LSM6DSOX_GY_UI_12Hz5_HP = 0x01, /* gy @12Hz5 (high performance) */
cparata	1:fe40aec6e97a	3194	LSM6DSOX_GY_UI_26Hz_LP = 0x12, /* gy @26Hz (low power) */
cparata	1:fe40aec6e97a	3195	LSM6DSOX_GY_UI_26Hz_HP = 0x02, /* gy @26Hz (high performance) */
cparata	1:fe40aec6e97a	3196	LSM6DSOX_GY_UI_52Hz_LP = 0x13, /* gy @52Hz (low power) */
cparata	1:fe40aec6e97a	3197	LSM6DSOX_GY_UI_52Hz_HP = 0x03, /* gy @52Hz (high performance) */
cparata	1:fe40aec6e97a	3198	LSM6DSOX_GY_UI_104Hz_NM = 0x14, /* gy @104Hz (low power) */
cparata	1:fe40aec6e97a	3199	LSM6DSOX_GY_UI_104Hz_HP = 0x04, /* gy @104Hz (high performance) */
cparata	1:fe40aec6e97a	3200	LSM6DSOX_GY_UI_208Hz_NM = 0x15, /* gy @208Hz (low power) */
cparata	1:fe40aec6e97a	3201	LSM6DSOX_GY_UI_208Hz_HP = 0x05, /* gy @208Hz (high performance) */
cparata	1:fe40aec6e97a	3202	LSM6DSOX_GY_UI_416Hz_HP = 0x06, /* gy @416Hz (high performance) */
cparata	1:fe40aec6e97a	3203	LSM6DSOX_GY_UI_833Hz_HP = 0x07, /* gy @833Hz (high performance) */
cparata	1:fe40aec6e97a	3204	LSM6DSOX_GY_UI_1667Hz_HP = 0x08, /* gy @1kHz66 (high performance) */
cparata	1:fe40aec6e97a	3205	LSM6DSOX_GY_UI_3333Hz_HP = 0x09, /* gy @3kHz33 (high performance) */
cparata	1:fe40aec6e97a	3206	LSM6DSOX_GY_UI_6667Hz_HP = 0x0A, /* gy @6kHz66 (high performance) */
cparata	1:fe40aec6e97a	3207	} odr;
cparata	1:fe40aec6e97a	3208	enum {
cparata	1:fe40aec6e97a	3209	LSM6DSOX_GY_UI_250dps = 0,
cparata	1:fe40aec6e97a	3210	LSM6DSOX_GY_UI_125dps = 1,
cparata	1:fe40aec6e97a	3211	LSM6DSOX_GY_UI_500dps = 2,
cparata	1:fe40aec6e97a	3212	LSM6DSOX_GY_UI_1000dps = 4,
cparata	1:fe40aec6e97a	3213	LSM6DSOX_GY_UI_2000dps = 6,
cparata	1:fe40aec6e97a	3214	} fs;
cparata	1:fe40aec6e97a	3215	}gy;
cparata	1:fe40aec6e97a	3216	} ui;
cparata	1:fe40aec6e97a	3217	struct {
cparata	1:fe40aec6e97a	3218	enum {
cparata	1:fe40aec6e97a	3219	LSM6DSOX_OIS_ONLY_AUX = 0x00, /* Auxiliary SPI full control */
cparata	1:fe40aec6e97a	3220	LSM6DSOX_OIS_ONLY_UI = 0x02, /* Primary interface full control */
cparata	1:fe40aec6e97a	3221	LSM6DSOX_OIS_MIXED = 0x01, /* Enabling by UI / read-config by AUX */
cparata	1:fe40aec6e97a	3222	} ctrl_md;
cparata	1:fe40aec6e97a	3223	struct {
cparata	1:fe40aec6e97a	3224	enum {
cparata	1:fe40aec6e97a	3225	LSM6DSOX_XL_OIS_OFF = 0x00, /* in power down */
cparata	1:fe40aec6e97a	3226	LSM6DSOX_XL_OIS_6667Hz_HP = 0x01, /* @6kHz OIS imu active/NO ULP on UI */
cparata	1:fe40aec6e97a	3227	} odr;
cparata	1:fe40aec6e97a	3228	enum {
cparata	1:fe40aec6e97a	3229	LSM6DSOX_XL_OIS_2g = 0,
cparata	1:fe40aec6e97a	3230	LSM6DSOX_XL_OIS_4g = 2,
cparata	1:fe40aec6e97a	3231	LSM6DSOX_XL_OIS_8g = 3,
cparata	1:fe40aec6e97a	3232	LSM6DSOX_XL_OIS_16g = 1, /* UI full scale is also forced to be 16g */
cparata	1:fe40aec6e97a	3233	} fs;
cparata	1:fe40aec6e97a	3234	} xl;
cparata	1:fe40aec6e97a	3235	struct {
cparata	1:fe40aec6e97a	3236	enum {
cparata	1:fe40aec6e97a	3237	LSM6DSOX_GY_OIS_OFF = 0x00, /* in power down */
cparata	1:fe40aec6e97a	3238	LSM6DSOX_GY_OIS_6667Hz_HP = 0x01, /* @6kHz No Ultra Low Power*/
cparata	1:fe40aec6e97a	3239	} odr;
cparata	1:fe40aec6e97a	3240	enum {
cparata	1:fe40aec6e97a	3241	LSM6DSOX_GY_OIS_250dps = 0,
cparata	1:fe40aec6e97a	3242	LSM6DSOX_GY_OIS_125dps = 1,
cparata	1:fe40aec6e97a	3243	LSM6DSOX_GY_OIS_500dps = 2,
cparata	1:fe40aec6e97a	3244	LSM6DSOX_GY_OIS_1000dps = 4,
cparata	1:fe40aec6e97a	3245	LSM6DSOX_GY_OIS_2000dps = 6,
cparata	1:fe40aec6e97a	3246	} fs;
cparata	1:fe40aec6e97a	3247	} gy;
cparata	1:fe40aec6e97a	3248	} ois;
cparata	1:fe40aec6e97a	3249	struct {
cparata	1:fe40aec6e97a	3250	enum {
cparata	1:fe40aec6e97a	3251	LSM6DSOX_FSM_DISABLE = 0x00,
cparata	1:fe40aec6e97a	3252	LSM6DSOX_FSM_XL = 0x01,
cparata	1:fe40aec6e97a	3253	LSM6DSOX_FSM_GY = 0x02,
cparata	1:fe40aec6e97a	3254	LSM6DSOX_FSM_XL_GY = 0x03,
cparata	1:fe40aec6e97a	3255	} sens;
cparata	1:fe40aec6e97a	3256	enum {
cparata	1:fe40aec6e97a	3257	LSM6DSOX_FSM_12Hz5 = 0x00,
cparata	1:fe40aec6e97a	3258	LSM6DSOX_FSM_26Hz = 0x01,
cparata	1:fe40aec6e97a	3259	LSM6DSOX_FSM_52Hz = 0x02,
cparata	1:fe40aec6e97a	3260	LSM6DSOX_FSM_104Hz = 0x03,
cparata	1:fe40aec6e97a	3261	} odr;
cparata	1:fe40aec6e97a	3262	} fsm;
cparata	1:fe40aec6e97a	3263	struct {
cparata	1:fe40aec6e97a	3264	enum {
cparata	1:fe40aec6e97a	3265	LSM6DSOX_MLC_DISABLE = 0x00,
cparata	1:fe40aec6e97a	3266	LSM6DSOX_MLC_XL = 0x01,
cparata	1:fe40aec6e97a	3267	LSM6DSOX_MLC_XL_GY = 0x03,
cparata	1:fe40aec6e97a	3268	} sens;
cparata	1:fe40aec6e97a	3269	enum {
cparata	1:fe40aec6e97a	3270	LSM6DSOX_MLC_12Hz5 = 0x00,
cparata	1:fe40aec6e97a	3271	LSM6DSOX_MLC_26Hz = 0x01,
cparata	1:fe40aec6e97a	3272	LSM6DSOX_MLC_52Hz = 0x02,
cparata	1:fe40aec6e97a	3273	LSM6DSOX_MLC_104Hz = 0x03,
cparata	1:fe40aec6e97a	3274	} odr;
cparata	1:fe40aec6e97a	3275	} mlc;
cparata	1:fe40aec6e97a	3276	} lsm6dsox_md_t;
cparata	1:fe40aec6e97a	3277	int32_t lsm6dsox_mode_set(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	3278	lsm6dsox_md_t *val);
cparata	1:fe40aec6e97a	3279	int32_t lsm6dsox_mode_get(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	3280	lsm6dsox_md_t *val);
cparata	1:fe40aec6e97a	3281
cparata	1:fe40aec6e97a	3282	typedef struct {
cparata	1:fe40aec6e97a	3283	struct {
cparata	1:fe40aec6e97a	3284	struct {
cparata	1:fe40aec6e97a	3285	float mg[3];
cparata	1:fe40aec6e97a	3286	int16_t raw[3];
cparata	1:fe40aec6e97a	3287	}xl;
cparata	1:fe40aec6e97a	3288	struct {
cparata	1:fe40aec6e97a	3289	float mdps[3];
cparata	1:fe40aec6e97a	3290	int16_t raw[3];
cparata	1:fe40aec6e97a	3291	}gy;
cparata	1:fe40aec6e97a	3292	struct {
cparata	1:fe40aec6e97a	3293	float deg_c;
cparata	1:fe40aec6e97a	3294	int16_t raw;
cparata	1:fe40aec6e97a	3295	}heat;
cparata	1:fe40aec6e97a	3296	} ui;
cparata	1:fe40aec6e97a	3297	struct {
cparata	1:fe40aec6e97a	3298	struct {
cparata	1:fe40aec6e97a	3299	float mg[3];
cparata	1:fe40aec6e97a	3300	int16_t raw[3];
cparata	1:fe40aec6e97a	3301	}xl;
cparata	1:fe40aec6e97a	3302	struct {
cparata	1:fe40aec6e97a	3303	float mdps[3];
cparata	1:fe40aec6e97a	3304	int16_t raw[3];
cparata	1:fe40aec6e97a	3305	}gy;
cparata	1:fe40aec6e97a	3306	} ois;
cparata	1:fe40aec6e97a	3307	} lsm6dsox_data_t;
cparata	1:fe40aec6e97a	3308	int32_t lsm6dsox_data_get(lsm6dsox_ctx_t ctx, lsm6dsox_ctx_t aux_ctx,
cparata	1:fe40aec6e97a	3309	lsm6dsox_md_t md, lsm6dsox_data_t data);
cparata	1:fe40aec6e97a	3310
cparata	1:fe40aec6e97a	3311	typedef struct {
cparata	1:fe40aec6e97a	3312	uint8_t sig_mot : 1; /* significant motion */
cparata	1:fe40aec6e97a	3313	uint8_t tilt : 1; /* tilt detection */
cparata	1:fe40aec6e97a	3314	uint8_t step : 1; /* step counter/detector */
cparata	1:fe40aec6e97a	3315	uint8_t mlc : 1; /* machine learning core */
cparata	1:fe40aec6e97a	3316	uint8_t fsm : 1; /* finite state machine */
cparata	1:fe40aec6e97a	3317	uint8_t fifo_compr : 1; /* mlc 8 interrupt event */
cparata	1:fe40aec6e97a	3318	} lsm6dsox_emb_sens_t;
cparata	1:fe40aec6e97a	3319	int32_t lsm6dsox_embedded_sens_set(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	3320	lsm6dsox_emb_sens_t *emb_sens);
cparata	1:fe40aec6e97a	3321	int32_t lsm6dsox_embedded_sens_get(lsm6dsox_ctx_t *ctx,
cparata	1:fe40aec6e97a	3322	lsm6dsox_emb_sens_t *emb_sens);
cparata	1:fe40aec6e97a	3323	int32_t lsm6dsox_embedded_sens_off(lsm6dsox_ctx_t *ctx);
cparata	1:fe40aec6e97a	3324
cparata	0:f27ce43dee4f	3325	/**
cparata	0:f27ce43dee4f	3326	* @}
cparata	0:f27ce43dee4f	3327	*
cparata	0:f27ce43dee4f	3328	*/
cparata	0:f27ce43dee4f	3329
cparata	0:f27ce43dee4f	3330	#ifdef __cplusplus
cparata	0:f27ce43dee4f	3331	}
cparata	0:f27ce43dee4f	3332	#endif
cparata	0:f27ce43dee4f	3333
cparata	0:f27ce43dee4f	3334	#endif /LSM6DSOX_DRIVER_H /
cparata	0:f27ce43dee4f	3335
cparata	0:f27ce43dee4f	3336	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	10 Jul 2019
Imports:	13
Forks:	0
Commits:	6
Dependents:	0
Dependencies:	2
Followers:	403

The code in this repository is Apache licensed.

lsm6dsox_reg.h@5:97fea56292cd, 2021-04-15 (annotated)

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