ST
iNEMO inertial module: 3D accelerometer and 3D gyroscope.
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3
Revision 4:77faf76e3cd8, committed 2020-10-29
- Comitter:
- cparata
- Date:
- Thu Oct 29 12:50:52 2020 +0000
- Parent:
- 3:4274d9103f1d
- Child:
- 5:b65c1498ae3f
- Commit message:
- Update PID and add low power modes
Changed in this revision
--- a/LSM6DSOSensor.cpp Wed Jul 24 14:19:35 2019 +0000
+++ b/LSM6DSOSensor.cpp Thu Oct 29 12:50:52 2020 +0000
@@ -274,8 +274,8 @@
*odr = 0.0f;
break;
- case LSM6DSO_XL_ODR_6Hz5:
- *odr = 6.5f;
+ case LSM6DSO_XL_ODR_1Hz6:
+ *odr = 1.6f;
break;
case LSM6DSO_XL_ODR_12Hz5:
@@ -333,12 +333,200 @@
*/
int LSM6DSOSensor::set_x_odr(float odr)
{
+ return set_x_odr_with_mode(odr, LSM6DSO_ACC_HIGH_PERFORMANCE_MODE);
+}
+
+/**
+ * @brief Set the LSM6DSO accelerometer sensor output data rate with operating mode
+ * @param odr the output data rate value to be set
+ * @param mode the accelerometer operating mode
+ * @note This function switches off the gyroscope if Ultra Low Power Mode is set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LSM6DSOSensor::set_x_odr_with_mode(float odr, LSM6DSO_ACC_Operating_Mode_t mode)
+{
+ int ret = 0;
+
+ switch (mode)
+ {
+ case LSM6DSO_ACC_HIGH_PERFORMANCE_MODE:
+ {
+ /* We must uncheck Low Power and Ultra Low Power bits if they are enabled */
+ lsm6dso_ctrl5_c_t val1;
+ lsm6dso_ctrl6_c_t val2;
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (val1.xl_ulp_en)
+ {
+ /* Power off the accelerometer */
+ if (_x_is_enabled == 1U)
+ {
+ if (lsm6dso_xl_data_rate_set(&_reg_ctx, LSM6DSO_XL_ODR_OFF) != 0)
+ {
+ return 1;
+ }
+ }
+
+ val1.xl_ulp_en = 0;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (val2.xl_hm_mode)
+ {
+ val2.xl_hm_mode = 0;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* ODR should be at least 12.5Hz */
+ if (odr < 12.5f)
+ {
+ odr = 12.5f;
+ }
+ break;
+ }
+ case LSM6DSO_ACC_LOW_POWER_NORMAL_MODE:
+ {
+ /* We must uncheck Ultra Low Power bit if it is enabled */
+ /* and check the Low Power bit if it is unchecked */
+ lsm6dso_ctrl5_c_t val1;
+ lsm6dso_ctrl6_c_t val2;
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (val1.xl_ulp_en)
+ {
+ /* Power off the accelerometer */
+ if (_x_is_enabled == 1U)
+ {
+ if (lsm6dso_xl_data_rate_set(&_reg_ctx, LSM6DSO_XL_ODR_OFF) != 0)
+ {
+ return 1;
+ }
+ }
+
+ val1.xl_ulp_en = 0;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (!val2.xl_hm_mode)
+ {
+ val2.xl_hm_mode = 1U;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Now we need to limit the ODR to 208 Hz if it is higher */
+ if (odr > 208.0f)
+ {
+ odr = 208.0f;
+ }
+ break;
+ }
+ case LSM6DSO_ACC_ULTRA_LOW_POWER_MODE:
+ {
+ /* We must uncheck Low Power bit if it is enabled */
+ /* and check the Ultra Low Power bit if it is unchecked */
+ /* We must switch off gyro otherwise Ultra Low Power does not work */
+ lsm6dso_ctrl5_c_t val1;
+ lsm6dso_ctrl6_c_t val2;
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (val2.xl_hm_mode)
+ {
+ val2.xl_hm_mode = 0;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL6_C, (uint8_t *)&val2, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Disable Gyro */
+ if (_g_is_enabled == 1U)
+ {
+ if (disable_g() != 0)
+ {
+ return 1;
+ }
+ }
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (!val1.xl_ulp_en)
+ {
+ /* Power off the accelerometer */
+ if (_x_is_enabled == 1U)
+ {
+ if (lsm6dso_xl_data_rate_set(&_reg_ctx, LSM6DSO_XL_ODR_OFF) != 0)
+ {
+ return 1;
+ }
+ }
+
+ val1.xl_ulp_en = 1U;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL5_C, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Now we need to limit the ODR to 208 Hz if it is higher */
+ if (odr > 208.0f)
+ {
+ odr = 208.0f;
+ }
+ break;
+ }
+ default:
+ ret = 1;
+ break;
+ }
+
/* Check if the component is enabled */
- if (_x_is_enabled == 1U) {
- return set_x_odr_when_enabled(odr);
- } else {
- return set_x_odr_when_disabled(odr);
+ if (_x_is_enabled == 1U)
+ {
+ ret = set_x_odr_when_enabled(odr);
}
+ else
+ {
+ ret = set_x_odr_when_disabled(odr);
+ }
+
+ return ret;
}
/**
@@ -350,16 +538,17 @@
{
lsm6dso_odr_xl_t new_odr;
- new_odr = (odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
- : (odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
- : (odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
- : (odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
- : (odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
- : (odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
- : (odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
- : (odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
- : (odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
- : LSM6DSO_XL_ODR_6667Hz;
+ new_odr = (odr <= 1.6f) ? LSM6DSO_XL_ODR_1Hz6
+ : (odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
+ : (odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
+ : (odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
+ : (odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
+ : (odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
+ : (odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
+ : (odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
+ : (odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
+ : (odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
+ : LSM6DSO_XL_ODR_6667Hz;
/* Output data rate selection. */
if (lsm6dso_xl_data_rate_set(&_reg_ctx, new_odr) != 0) {
@@ -376,16 +565,17 @@
*/
int LSM6DSOSensor::set_x_odr_when_disabled(float odr)
{
- _x_last_odr = (odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
- : (odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
- : (odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
- : (odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
- : (odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
- : (odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
- : (odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
- : (odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
- : (odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
- : LSM6DSO_XL_ODR_6667Hz;
+ _x_last_odr = (odr <= 1.6f) ? LSM6DSO_XL_ODR_1Hz6
+ : (odr <= 12.5f) ? LSM6DSO_XL_ODR_12Hz5
+ : (odr <= 26.0f) ? LSM6DSO_XL_ODR_26Hz
+ : (odr <= 52.0f) ? LSM6DSO_XL_ODR_52Hz
+ : (odr <= 104.0f) ? LSM6DSO_XL_ODR_104Hz
+ : (odr <= 208.0f) ? LSM6DSO_XL_ODR_208Hz
+ : (odr <= 417.0f) ? LSM6DSO_XL_ODR_417Hz
+ : (odr <= 833.0f) ? LSM6DSO_XL_ODR_833Hz
+ : (odr <= 1667.0f) ? LSM6DSO_XL_ODR_1667Hz
+ : (odr <= 3333.0f) ? LSM6DSO_XL_ODR_3333Hz
+ : LSM6DSO_XL_ODR_6667Hz;
return 0;
}
@@ -443,9 +633,9 @@
/* Seems like MISRA C-2012 rule 14.3a violation but only from single file statical analysis point of view because
the parameter passed to the function is not known at the moment of analysis */
new_fs = (full_scale <= 2.0f) ? LSM6DSO_2g
- : (full_scale <= 4.0f) ? LSM6DSO_4g
- : (full_scale <= 8.0f) ? LSM6DSO_8g
- : LSM6DSO_16g;
+ : (full_scale <= 4.0f) ? LSM6DSO_4g
+ : (full_scale <= 8.0f) ? LSM6DSO_8g
+ : LSM6DSO_16g;
if (lsm6dso_xl_full_scale_set(&_reg_ctx, new_fs) != 0) {
return 1;
@@ -674,12 +864,83 @@
*/
int LSM6DSOSensor::set_g_odr(float odr)
{
+ return set_g_odr_with_mode(odr, LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE);
+}
+
+/**
+ * @brief Set the LSM6DSO gyroscope sensor output data rate with operating mode
+ * @param odr the output data rate value to be set
+ * @param mode the gyroscope operating mode
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LSM6DSOSensor::set_g_odr_with_mode(float odr, LSM6DSO_GYRO_Operating_Mode_t mode)
+{
+ int ret = 0;
+
+ switch (mode)
+ {
+ case LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE:
+ {
+ /* We must uncheck Low Power bit if it is enabled */
+ lsm6dso_ctrl7_g_t val1;
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (val1.g_hm_mode)
+ {
+ val1.g_hm_mode = 0;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+ }
+ break;
+ }
+ case LSM6DSO_GYRO_LOW_POWER_NORMAL_MODE:
+ {
+ /* We must check the Low Power bit if it is unchecked */
+ lsm6dso_ctrl7_g_t val1;
+
+ if (lsm6dso_read_reg(&_reg_ctx, LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (!val1.g_hm_mode)
+ {
+ val1.g_hm_mode = 1U;
+ if (lsm6dso_write_reg(&_reg_ctx, LSM6DSO_CTRL7_G, (uint8_t *)&val1, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Now we need to limit the ODR to 208 Hz if it is higher */
+ if (odr > 208.0f)
+ {
+ odr = 208.0f;
+ }
+ break;
+ }
+ default:
+ ret = 1;
+ break;
+ }
+
/* Check if the component is enabled */
- if (_g_is_enabled == 1U) {
- return set_g_odr_when_enabled(odr);
- } else {
- return set_g_odr_when_disabled(odr);
+ if (_g_is_enabled == 1U)
+ {
+ ret = set_g_odr_when_enabled(odr);
}
+ else
+ {
+ ret = set_g_odr_when_disabled(odr);
+ }
+
+ return ret;
}
/**
@@ -692,15 +953,15 @@
lsm6dso_odr_g_t new_odr;
new_odr = (odr <= 12.5f) ? LSM6DSO_GY_ODR_12Hz5
- : (odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
- : (odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
- : (odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
- : (odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
- : (odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
- : (odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
- : (odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
- : (odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
- : LSM6DSO_GY_ODR_6667Hz;
+ : (odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
+ : (odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
+ : (odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
+ : (odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
+ : (odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
+ : (odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
+ : (odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
+ : (odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
+ : LSM6DSO_GY_ODR_6667Hz;
/* Output data rate selection. */
if (lsm6dso_gy_data_rate_set(&_reg_ctx, new_odr) != 0) {
@@ -718,15 +979,15 @@
int LSM6DSOSensor::set_g_odr_when_disabled(float odr)
{
_g_last_odr = (odr <= 12.5f) ? LSM6DSO_GY_ODR_12Hz5
- : (odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
- : (odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
- : (odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
- : (odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
- : (odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
- : (odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
- : (odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
- : (odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
- : LSM6DSO_GY_ODR_6667Hz;
+ : (odr <= 26.0f) ? LSM6DSO_GY_ODR_26Hz
+ : (odr <= 52.0f) ? LSM6DSO_GY_ODR_52Hz
+ : (odr <= 104.0f) ? LSM6DSO_GY_ODR_104Hz
+ : (odr <= 208.0f) ? LSM6DSO_GY_ODR_208Hz
+ : (odr <= 417.0f) ? LSM6DSO_GY_ODR_417Hz
+ : (odr <= 833.0f) ? LSM6DSO_GY_ODR_833Hz
+ : (odr <= 1667.0f) ? LSM6DSO_GY_ODR_1667Hz
+ : (odr <= 3333.0f) ? LSM6DSO_GY_ODR_3333Hz
+ : LSM6DSO_GY_ODR_6667Hz;
return 0;
}
@@ -786,10 +1047,10 @@
lsm6dso_fs_g_t new_fs;
new_fs = (full_scale <= 125.0f) ? LSM6DSO_125dps
- : (full_scale <= 250.0f) ? LSM6DSO_250dps
- : (full_scale <= 500.0f) ? LSM6DSO_500dps
- : (full_scale <= 1000.0f) ? LSM6DSO_1000dps
- : LSM6DSO_2000dps;
+ : (full_scale <= 250.0f) ? LSM6DSO_250dps
+ : (full_scale <= 500.0f) ? LSM6DSO_500dps
+ : (full_scale <= 1000.0f) ? LSM6DSO_1000dps
+ : LSM6DSO_2000dps;
if (lsm6dso_gy_full_scale_set(&_reg_ctx, new_fs) != 0) {
return 1;
@@ -947,21 +1208,21 @@
return 1;
}
- val1.md1_cfg.int1_ff = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.free_fall = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
break;
case LSM6DSO_INT2_PIN:
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_ff = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.free_fall = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
break;
@@ -988,19 +1249,19 @@
return 1;
}
- val1.md1_cfg.int1_ff = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.free_fall = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_ff = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.free_fall = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
@@ -1054,6 +1315,7 @@
int LSM6DSOSensor::enable_pedometer()
{
lsm6dso_pin_int1_route_t val;
+ lsm6dso_emb_sens_t emb_sens;
/* Output Data Rate selection */
if (set_x_odr(26.0f) != 0) {
@@ -1065,8 +1327,32 @@
return 1;
}
+ /* Save current embedded features */
+ if (lsm6dso_embedded_sens_get(&_reg_ctx, &emb_sens) != 0)
+ {
+ return 1;
+ }
+
+ /* Turn off embedded features */
+ if (lsm6dso_embedded_sens_off(&_reg_ctx) != 0)
+ {
+ return 1;
+ }
+
+ /* Wait for 10 ms */
+ ThisThread::sleep_for(10);
+
/* Enable pedometer algorithm. */
- if (lsm6dso_pedo_sens_set(&_reg_ctx, LSM6DSO_PEDO_BASE_MODE) != 0) {
+ emb_sens.step = PROPERTY_ENABLE;
+
+ if (lsm6dso_pedo_sens_set(&_reg_ctx, LSM6DSO_PEDO_BASE_MODE) != 0)
+ {
+ return 1;
+ }
+
+ /* Turn on embedded features */
+ if (lsm6dso_embedded_sens_set(&_reg_ctx, &emb_sens) != 0)
+ {
return 1;
}
@@ -1075,9 +1361,9 @@
return 1;
}
- val.emb_func_int1.int1_step_detector = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val) != 0) {
+ val.step_detector = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val) != 0) {
return 1;
}
@@ -1091,20 +1377,30 @@
int LSM6DSOSensor::disable_pedometer()
{
lsm6dso_pin_int1_route_t val1;
+ lsm6dso_emb_sens_t emb_sens;
/* Disable step detector on INT1 pin */
if (lsm6dso_pin_int1_route_get(&_reg_ctx, &val1) != 0) {
return 1;
}
- val1.emb_func_int1.int1_step_detector = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.step_detector = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
+ return 1;
+ }
+
+ /* Save current embedded features */
+ if (lsm6dso_embedded_sens_get(&_reg_ctx, &emb_sens) != 0)
+ {
return 1;
}
/* Disable pedometer algorithm. */
- if (lsm6dso_pedo_sens_set(&_reg_ctx, LSM6DSO_PEDO_DISABLE) != 0) {
+ emb_sens.step = PROPERTY_DISABLE;
+
+ if (lsm6dso_embedded_sens_set(&_reg_ctx, &emb_sens) != 0)
+ {
return 1;
}
@@ -1148,6 +1444,7 @@
int ret = 0;
lsm6dso_pin_int1_route_t val1;
lsm6dso_pin_int2_route_t val2;
+ lsm6dso_emb_sens_t emb_sens;
/* Output Data Rate selection */
if (set_x_odr(26.0f) != 0) {
@@ -1159,8 +1456,27 @@
return 1;
}
- /* Enable tilt calculation. */
- if (lsm6dso_tilt_sens_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ /* Save current embedded features */
+ if (lsm6dso_embedded_sens_get(&_reg_ctx, &emb_sens) != 0)
+ {
+ return 1;
+ }
+
+ /* Turn off embedded features */
+ if (lsm6dso_embedded_sens_off(&_reg_ctx) != 0)
+ {
+ return 1;
+ }
+
+ /* Wait for 10 ms */
+ ThisThread::sleep_for(10);
+
+ /* Enable tilt algorithm. */
+ emb_sens.tilt = PROPERTY_ENABLE;
+
+ /* Turn on embedded features */
+ if (lsm6dso_embedded_sens_set(&_reg_ctx, &emb_sens) != 0)
+ {
return 1;
}
@@ -1171,21 +1487,21 @@
return 1;
}
- val1.emb_func_int1.int1_tilt = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.tilt = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
break;
case LSM6DSO_INT2_PIN:
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.emb_func_int2.int2_tilt = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.tilt = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
break;
@@ -1206,30 +1522,40 @@
{
lsm6dso_pin_int1_route_t val1;
lsm6dso_pin_int2_route_t val2;
+ lsm6dso_emb_sens_t emb_sens;
/* Disable tilt event on both INT1 and INT2 pins */
if (lsm6dso_pin_int1_route_get(&_reg_ctx, &val1) != 0) {
return 1;
}
- val1.emb_func_int1.int1_tilt = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.tilt = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.emb_func_int2.int2_tilt = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.tilt = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
- /* Disable tilt calculation. */
- if (lsm6dso_tilt_sens_set(&_reg_ctx, PROPERTY_DISABLE) != 0) {
+ /* Save current embedded features */
+ if (lsm6dso_embedded_sens_get(&_reg_ctx, &emb_sens) != 0)
+ {
+ return 1;
+ }
+
+ /* Disable tilt algorithm. */
+ emb_sens.tilt = PROPERTY_DISABLE;
+
+ if (lsm6dso_embedded_sens_set(&_reg_ctx, &emb_sens) != 0)
+ {
return 1;
}
@@ -1274,21 +1600,21 @@
return 1;
}
- val1.md1_cfg.int1_wu = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.wake_up = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
break;
case LSM6DSO_INT2_PIN:
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_wu = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.wake_up = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
break;
@@ -1316,19 +1642,19 @@
return 1;
}
- val1.md1_cfg.int1_wu = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.wake_up = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_wu = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.wake_up = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
@@ -1437,21 +1763,21 @@
return 1;
}
- val1.md1_cfg.int1_single_tap = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.single_tap = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
break;
case LSM6DSO_INT2_PIN:
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_single_tap = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.single_tap = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
break;
@@ -1478,19 +1804,19 @@
return 1;
}
- val1.md1_cfg.int1_single_tap = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.single_tap = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_single_tap = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.single_tap = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
@@ -1595,21 +1921,21 @@
return 1;
}
- val1.md1_cfg.int1_double_tap = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.double_tap = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
break;
case LSM6DSO_INT2_PIN:
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_double_tap = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.double_tap = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
break;
@@ -1636,19 +1962,19 @@
return 1;
}
- val1.md1_cfg.int1_double_tap = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.double_tap = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_double_tap = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.double_tap = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
@@ -1788,21 +2114,21 @@
return 1;
}
- val1.md1_cfg.int1_6d = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.six_d = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
break;
case LSM6DSO_INT2_PIN:
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_6d = PROPERTY_ENABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.six_d = PROPERTY_ENABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
break;
@@ -1829,19 +2155,19 @@
return 1;
}
- val1.md1_cfg.int1_6d = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int1_route_set(&_reg_ctx, &val1) != 0) {
+ val1.six_d = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int1_route_set(&_reg_ctx, val1) != 0) {
return 1;
}
- if (lsm6dso_pin_int2_route_get(&_reg_ctx, &val2) != 0) {
+ if (lsm6dso_pin_int2_route_get(&_reg_ctx, NULL, &val2) != 0) {
return 1;
}
- val2.md2_cfg.int2_6d = PROPERTY_DISABLE;
-
- if (lsm6dso_pin_int2_route_set(&_reg_ctx, &val2) != 0) {
+ val2.six_d = PROPERTY_DISABLE;
+
+ if (lsm6dso_pin_int2_route_set(&_reg_ctx, NULL, val2) != 0) {
return 1;
}
--- a/LSM6DSOSensor.h Wed Jul 24 14:19:35 2019 +0000
+++ b/LSM6DSOSensor.h Thu Oct 29 12:50:52 2020 +0000
@@ -48,6 +48,7 @@
#include "lsm6dso_reg.h"
#include "MotionSensor.h"
#include "GyroSensor.h"
+#include "mbed.h"
#include <assert.h>
/* Defines -------------------------------------------------------------------*/
@@ -71,6 +72,19 @@
LSM6DSO_INT2_PIN,
} LSM6DSO_Interrupt_Pin_t;
+typedef enum
+{
+ LSM6DSO_ACC_HIGH_PERFORMANCE_MODE,
+ LSM6DSO_ACC_LOW_POWER_NORMAL_MODE,
+ LSM6DSO_ACC_ULTRA_LOW_POWER_MODE
+} LSM6DSO_ACC_Operating_Mode_t;
+
+typedef enum
+{
+ LSM6DSO_GYRO_HIGH_PERFORMANCE_MODE,
+ LSM6DSO_GYRO_LOW_POWER_NORMAL_MODE
+} LSM6DSO_GYRO_Operating_Mode_t;
+
typedef struct {
unsigned int FreeFallStatus : 1;
unsigned int TapStatus : 1;
@@ -105,7 +119,9 @@
virtual int get_x_odr(float *odr);
virtual int get_g_odr(float *odr);
virtual int set_x_odr(float odr);
+ virtual int set_x_odr_with_mode(float odr, LSM6DSO_ACC_Operating_Mode_t mode);
virtual int set_g_odr(float odr);
+ virtual int set_g_odr_with_mode(float odr, LSM6DSO_GYRO_Operating_Mode_t mode);
virtual int get_x_fs(float *full_scale);
virtual int get_g_fs(float *full_scale);
virtual int set_x_fs(float full_scale);
--- a/lsm6dso_reg.c Wed Jul 24 14:19:35 2019 +0000
+++ b/lsm6dso_reg.c Thu Oct 29 12:50:52 2020 +0000
@@ -1,38 +1,21 @@
/*
- ******************************************************************************
- * @file lsm6dso_reg.c
- * @author Sensor Solutions Software Team
- * @brief LSM6DSO driver file
- ******************************************************************************
- * @attention
- *
- * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- */
+ ******************************************************************************
+ * @file lsm6dso_reg.c
+ * @author Sensors Software Solution Team
+ * @brief LSM6DSO driver file
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
#include "lsm6dso_reg.h"
@@ -63,12 +46,12 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lsm6dso_read_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data,
+int32_t lsm6dso_read_reg(lsm6dso_ctx_t* ctx, uint8_t reg, uint8_t* data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->read_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->read_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
@@ -81,12 +64,12 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lsm6dso_write_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data,
+int32_t lsm6dso_write_reg(lsm6dso_ctx_t* ctx, uint8_t reg, uint8_t* data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->write_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->write_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
@@ -95,6 +78,20 @@
*/
/**
+ * @defgroup LSM6DSOX_Private_functions
+ * @brief Section collect all the utility functions needed by APIs.
+ * @{
+ *
+ */
+
+static void bytecpy(uint8_t *target, uint8_t *source)
+{
+ if ( (target != NULL) && (source != NULL) ) {
+ *target = *source;
+ }
+}
+
+/**
* @defgroup LSM6DSO_Sensitivity
* @brief These functions convert raw-data into engineering units.
* @{
@@ -102,57 +99,57 @@
*/
float_t lsm6dso_from_fs2_to_mg(int16_t lsb)
{
- return ((float_t)lsb) * 0.061f;
+ return ((float_t)lsb) * 0.061f;
}
float_t lsm6dso_from_fs4_to_mg(int16_t lsb)
{
- return ((float_t)lsb) * 0.122f;
+ return ((float_t)lsb) * 0.122f;
}
float_t lsm6dso_from_fs8_to_mg(int16_t lsb)
{
- return ((float_t)lsb) * 0.244f;
+ return ((float_t)lsb) * 0.244f;
}
float_t lsm6dso_from_fs16_to_mg(int16_t lsb)
{
- return ((float_t)lsb) * 0.488f;
+ return ((float_t)lsb) *0.488f;
}
float_t lsm6dso_from_fs125_to_mdps(int16_t lsb)
{
- return ((float_t)lsb) * 4.375f;
+ return ((float_t)lsb) *4.375f;
}
float_t lsm6dso_from_fs500_to_mdps(int16_t lsb)
{
- return ((float_t)lsb) * 17.50f;
+ return ((float_t)lsb) *17.50f;
}
float_t lsm6dso_from_fs250_to_mdps(int16_t lsb)
{
- return ((float_t)lsb) * 8.750f;
+ return ((float_t)lsb) *8.750f;
}
float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb)
{
- return ((float_t)lsb) * 35.0f;
+ return ((float_t)lsb) *35.0f;
}
float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb)
{
- return ((float_t)lsb) * 70.0f;
+ return ((float_t)lsb) *70.0f;
}
float_t lsm6dso_from_lsb_to_celsius(int16_t lsb)
{
- return (((float_t)lsb / 256.0f) + 25.0f);
+ return (((float_t)lsb / 256.0f) + 25.0f);
}
float_t lsm6dso_from_lsb_to_nsec(int16_t lsb)
{
- return ((float_t)lsb * 25000.0f);
+ return ((float_t)lsb * 25000.0f);
}
/**
@@ -177,15 +174,15 @@
int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx,
lsm6dso_fs_xl_t val)
{
- lsm6dso_ctrl1_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fs_xl = (uint8_t) val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl1_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fs_xl = (uint8_t) val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -197,29 +194,29 @@
*/
int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t *val)
{
- lsm6dso_ctrl1_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- switch (reg.fs_xl) {
- case LSM6DSO_2g:
- *val = LSM6DSO_2g;
- break;
- case LSM6DSO_16g:
- *val = LSM6DSO_16g;
- break;
- case LSM6DSO_4g:
- *val = LSM6DSO_4g;
- break;
- case LSM6DSO_8g:
- *val = LSM6DSO_8g;
- break;
- default:
- *val = LSM6DSO_2g;
- break;
- }
-
- return ret;
+ lsm6dso_ctrl1_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ switch (reg.fs_xl) {
+ case LSM6DSO_2g:
+ *val = LSM6DSO_2g;
+ break;
+ case LSM6DSO_16g:
+ *val = LSM6DSO_16g;
+ break;
+ case LSM6DSO_4g:
+ *val = LSM6DSO_4g;
+ break;
+ case LSM6DSO_8g:
+ *val = LSM6DSO_8g;
+ break;
+ default:
+ *val = LSM6DSO_2g;
+ break;
+ }
+
+ return ret;
}
/**
@@ -231,15 +228,104 @@
*/
int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val)
{
- lsm6dso_ctrl1_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.odr_xl = (uint8_t) val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
+ lsm6dso_odr_xl_t odr_xl = val;
+ lsm6dso_emb_fsm_enable_t fsm_enable;
+ lsm6dso_fsm_odr_t fsm_odr;
+ lsm6dso_ctrl1_xl_t reg;
+ int32_t ret;
+
+ /* Check the Finite State Machine data rate constraints */
+ ret = lsm6dso_fsm_enable_get(ctx, &fsm_enable);
+ if (ret == 0) {
+ if ( (fsm_enable.fsm_enable_a.fsm1_en |
+ fsm_enable.fsm_enable_a.fsm2_en |
+ fsm_enable.fsm_enable_a.fsm3_en |
+ fsm_enable.fsm_enable_a.fsm4_en |
+ fsm_enable.fsm_enable_a.fsm5_en |
+ fsm_enable.fsm_enable_a.fsm6_en |
+ fsm_enable.fsm_enable_a.fsm7_en |
+ fsm_enable.fsm_enable_a.fsm8_en |
+ fsm_enable.fsm_enable_b.fsm9_en |
+ fsm_enable.fsm_enable_b.fsm10_en |
+ fsm_enable.fsm_enable_b.fsm11_en |
+ fsm_enable.fsm_enable_b.fsm12_en |
+ fsm_enable.fsm_enable_b.fsm13_en |
+ fsm_enable.fsm_enable_b.fsm14_en |
+ fsm_enable.fsm_enable_b.fsm15_en |
+ fsm_enable.fsm_enable_b.fsm16_en ) == PROPERTY_ENABLE ){
+
+ ret = lsm6dso_fsm_data_rate_get(ctx, &fsm_odr);
+ if (ret == 0) {
+ switch (fsm_odr) {
+ case LSM6DSO_ODR_FSM_12Hz5:
+
+ if (val == LSM6DSO_XL_ODR_OFF){
+ odr_xl = LSM6DSO_XL_ODR_12Hz5;
+
+ } else {
+ odr_xl = val;
+ }
+ break;
+ case LSM6DSO_ODR_FSM_26Hz:
+
+ if (val == LSM6DSO_XL_ODR_OFF){
+ odr_xl = LSM6DSO_XL_ODR_26Hz;
+
+ } else if (val == LSM6DSO_XL_ODR_12Hz5){
+ odr_xl = LSM6DSO_XL_ODR_26Hz;
+
+ } else {
+ odr_xl = val;
+ }
+ break;
+ case LSM6DSO_ODR_FSM_52Hz:
+
+ if (val == LSM6DSO_XL_ODR_OFF){
+ odr_xl = LSM6DSO_XL_ODR_52Hz;
+
+ } else if (val == LSM6DSO_XL_ODR_12Hz5){
+ odr_xl = LSM6DSO_XL_ODR_52Hz;
+
+ } else if (val == LSM6DSO_XL_ODR_26Hz){
+ odr_xl = LSM6DSO_XL_ODR_52Hz;
+
+ } else {
+ odr_xl = val;
+ }
+ break;
+ case LSM6DSO_ODR_FSM_104Hz:
+
+ if (val == LSM6DSO_XL_ODR_OFF){
+ odr_xl = LSM6DSO_XL_ODR_104Hz;
+
+ } else if (val == LSM6DSO_XL_ODR_12Hz5){
+ odr_xl = LSM6DSO_XL_ODR_104Hz;
+
+ } else if (val == LSM6DSO_XL_ODR_26Hz){
+ odr_xl = LSM6DSO_XL_ODR_104Hz;
+
+ } else if (val == LSM6DSO_XL_ODR_52Hz){
+ odr_xl = LSM6DSO_XL_ODR_104Hz;
+
+ } else {
+ odr_xl = val;
+ }
+ break;
+ default:
+ odr_xl = val;
+ break;
+ }
+ }
}
- return ret;
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.odr_xl = (uint8_t) odr_xl;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -251,53 +337,53 @@
*/
int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t *val)
{
- lsm6dso_ctrl1_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
-
- switch (reg.odr_xl) {
- case LSM6DSO_XL_ODR_OFF:
- *val = LSM6DSO_XL_ODR_OFF;
- break;
- case LSM6DSO_XL_ODR_12Hz5:
- *val = LSM6DSO_XL_ODR_12Hz5;
- break;
- case LSM6DSO_XL_ODR_26Hz:
- *val = LSM6DSO_XL_ODR_26Hz;
- break;
- case LSM6DSO_XL_ODR_52Hz:
- *val = LSM6DSO_XL_ODR_52Hz;
- break;
- case LSM6DSO_XL_ODR_104Hz:
- *val = LSM6DSO_XL_ODR_104Hz;
- break;
- case LSM6DSO_XL_ODR_208Hz:
- *val = LSM6DSO_XL_ODR_208Hz;
- break;
- case LSM6DSO_XL_ODR_417Hz:
- *val = LSM6DSO_XL_ODR_417Hz;
- break;
- case LSM6DSO_XL_ODR_833Hz:
- *val = LSM6DSO_XL_ODR_833Hz;
- break;
- case LSM6DSO_XL_ODR_1667Hz:
- *val = LSM6DSO_XL_ODR_1667Hz;
- break;
- case LSM6DSO_XL_ODR_3333Hz:
- *val = LSM6DSO_XL_ODR_3333Hz;
- break;
- case LSM6DSO_XL_ODR_6667Hz:
- *val = LSM6DSO_XL_ODR_6667Hz;
- break;
- case LSM6DSO_XL_ODR_6Hz5:
- *val = LSM6DSO_XL_ODR_6Hz5;
- break;
- default:
- *val = LSM6DSO_XL_ODR_OFF;
- break;
- }
- return ret;
+ lsm6dso_ctrl1_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+
+ switch (reg.odr_xl) {
+ case LSM6DSO_XL_ODR_OFF:
+ *val = LSM6DSO_XL_ODR_OFF;
+ break;
+ case LSM6DSO_XL_ODR_12Hz5:
+ *val = LSM6DSO_XL_ODR_12Hz5;
+ break;
+ case LSM6DSO_XL_ODR_26Hz:
+ *val = LSM6DSO_XL_ODR_26Hz;
+ break;
+ case LSM6DSO_XL_ODR_52Hz:
+ *val = LSM6DSO_XL_ODR_52Hz;
+ break;
+ case LSM6DSO_XL_ODR_104Hz:
+ *val = LSM6DSO_XL_ODR_104Hz;
+ break;
+ case LSM6DSO_XL_ODR_208Hz:
+ *val = LSM6DSO_XL_ODR_208Hz;
+ break;
+ case LSM6DSO_XL_ODR_417Hz:
+ *val = LSM6DSO_XL_ODR_417Hz;
+ break;
+ case LSM6DSO_XL_ODR_833Hz:
+ *val = LSM6DSO_XL_ODR_833Hz;
+ break;
+ case LSM6DSO_XL_ODR_1667Hz:
+ *val = LSM6DSO_XL_ODR_1667Hz;
+ break;
+ case LSM6DSO_XL_ODR_3333Hz:
+ *val = LSM6DSO_XL_ODR_3333Hz;
+ break;
+ case LSM6DSO_XL_ODR_6667Hz:
+ *val = LSM6DSO_XL_ODR_6667Hz;
+ break;
+ case LSM6DSO_XL_ODR_1Hz6:
+ *val = LSM6DSO_XL_ODR_1Hz6;
+ break;
+ default:
+ *val = LSM6DSO_XL_ODR_OFF;
+ break;
+ }
+ return ret;
}
/**
@@ -309,16 +395,16 @@
*/
int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val)
{
- lsm6dso_ctrl2_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fs_g = (uint8_t) val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl2_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fs_g = (uint8_t) val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -330,32 +416,32 @@
*/
int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t *val)
{
- lsm6dso_ctrl2_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)®, 1);
- switch (reg.fs_g) {
- case LSM6DSO_250dps:
- *val = LSM6DSO_250dps;
- break;
- case LSM6DSO_125dps:
- *val = LSM6DSO_125dps;
- break;
- case LSM6DSO_500dps:
- *val = LSM6DSO_500dps;
- break;
- case LSM6DSO_1000dps:
- *val = LSM6DSO_1000dps;
- break;
- case LSM6DSO_2000dps:
- *val = LSM6DSO_2000dps;
- break;
- default:
- *val = LSM6DSO_250dps;
- break;
- }
-
- return ret;
+ lsm6dso_ctrl2_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)®, 1);
+ switch (reg.fs_g) {
+ case LSM6DSO_250dps:
+ *val = LSM6DSO_250dps;
+ break;
+ case LSM6DSO_125dps:
+ *val = LSM6DSO_125dps;
+ break;
+ case LSM6DSO_500dps:
+ *val = LSM6DSO_500dps;
+ break;
+ case LSM6DSO_1000dps:
+ *val = LSM6DSO_1000dps;
+ break;
+ case LSM6DSO_2000dps:
+ *val = LSM6DSO_2000dps;
+ break;
+ default:
+ *val = LSM6DSO_250dps;
+ break;
+ }
+
+ return ret;
}
/**
@@ -367,16 +453,106 @@
*/
int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val)
{
- lsm6dso_ctrl2_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.odr_g = (uint8_t) val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)®, 1);
+ lsm6dso_odr_g_t odr_gy = val;
+ lsm6dso_emb_fsm_enable_t fsm_enable;
+ lsm6dso_fsm_odr_t fsm_odr;
+ lsm6dso_ctrl2_g_t reg;
+ int32_t ret;
+
+ /* Check the Finite State Machine data rate constraints */
+ ret = lsm6dso_fsm_enable_get(ctx, &fsm_enable);
+ if (ret == 0) {
+ if ( (fsm_enable.fsm_enable_a.fsm1_en |
+ fsm_enable.fsm_enable_a.fsm2_en |
+ fsm_enable.fsm_enable_a.fsm3_en |
+ fsm_enable.fsm_enable_a.fsm4_en |
+ fsm_enable.fsm_enable_a.fsm5_en |
+ fsm_enable.fsm_enable_a.fsm6_en |
+ fsm_enable.fsm_enable_a.fsm7_en |
+ fsm_enable.fsm_enable_a.fsm8_en |
+ fsm_enable.fsm_enable_b.fsm9_en |
+ fsm_enable.fsm_enable_b.fsm10_en |
+ fsm_enable.fsm_enable_b.fsm11_en |
+ fsm_enable.fsm_enable_b.fsm12_en |
+ fsm_enable.fsm_enable_b.fsm13_en |
+ fsm_enable.fsm_enable_b.fsm14_en |
+ fsm_enable.fsm_enable_b.fsm15_en |
+ fsm_enable.fsm_enable_b.fsm16_en ) == PROPERTY_ENABLE ){
+
+ ret = lsm6dso_fsm_data_rate_get(ctx, &fsm_odr);
+ if (ret == 0) {
+ switch (fsm_odr) {
+ case LSM6DSO_ODR_FSM_12Hz5:
+
+ if (val == LSM6DSO_GY_ODR_OFF){
+ odr_gy = LSM6DSO_GY_ODR_12Hz5;
+
+ } else {
+ odr_gy = val;
+ }
+ break;
+ case LSM6DSO_ODR_FSM_26Hz:
+
+ if (val == LSM6DSO_GY_ODR_OFF){
+ odr_gy = LSM6DSO_GY_ODR_26Hz;
+
+ } else if (val == LSM6DSO_GY_ODR_12Hz5){
+ odr_gy = LSM6DSO_GY_ODR_26Hz;
+
+ } else {
+ odr_gy = val;
+ }
+ break;
+ case LSM6DSO_ODR_FSM_52Hz:
+
+ if (val == LSM6DSO_GY_ODR_OFF){
+ odr_gy = LSM6DSO_GY_ODR_52Hz;
+
+ } else if (val == LSM6DSO_GY_ODR_12Hz5){
+ odr_gy = LSM6DSO_GY_ODR_52Hz;
+
+ } else if (val == LSM6DSO_GY_ODR_26Hz){
+ odr_gy = LSM6DSO_GY_ODR_52Hz;
+
+ } else {
+ odr_gy = val;
+ }
+ break;
+ case LSM6DSO_ODR_FSM_104Hz:
+
+ if (val == LSM6DSO_GY_ODR_OFF){
+ odr_gy = LSM6DSO_GY_ODR_104Hz;
+
+ } else if (val == LSM6DSO_GY_ODR_12Hz5){
+ odr_gy = LSM6DSO_GY_ODR_104Hz;
+
+ } else if (val == LSM6DSO_GY_ODR_26Hz){
+ odr_gy = LSM6DSO_GY_ODR_104Hz;
+
+ } else if (val == LSM6DSO_GY_ODR_52Hz){
+ odr_gy = LSM6DSO_GY_ODR_104Hz;
+
+ } else {
+ odr_gy = val;
+ }
+ break;
+ default:
+ odr_gy = val;
+ break;
+ }
+ }
}
-
- return ret;
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.odr_g = (uint8_t) odr_gy;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -388,49 +564,49 @@
*/
int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t *val)
{
- lsm6dso_ctrl2_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t *)®, 1);
- switch (reg.odr_g) {
- case LSM6DSO_GY_ODR_OFF:
- *val = LSM6DSO_GY_ODR_OFF;
- break;
- case LSM6DSO_GY_ODR_12Hz5:
- *val = LSM6DSO_GY_ODR_12Hz5;
- break;
- case LSM6DSO_GY_ODR_26Hz:
- *val = LSM6DSO_GY_ODR_26Hz;
- break;
- case LSM6DSO_GY_ODR_52Hz:
- *val = LSM6DSO_GY_ODR_52Hz;
- break;
- case LSM6DSO_GY_ODR_104Hz:
- *val = LSM6DSO_GY_ODR_104Hz;
- break;
- case LSM6DSO_GY_ODR_208Hz:
- *val = LSM6DSO_GY_ODR_208Hz;
- break;
- case LSM6DSO_GY_ODR_417Hz:
- *val = LSM6DSO_GY_ODR_417Hz;
- break;
- case LSM6DSO_GY_ODR_833Hz:
- *val = LSM6DSO_GY_ODR_833Hz;
- break;
- case LSM6DSO_GY_ODR_1667Hz:
- *val = LSM6DSO_GY_ODR_1667Hz;
- break;
- case LSM6DSO_GY_ODR_3333Hz:
- *val = LSM6DSO_GY_ODR_3333Hz;
- break;
- case LSM6DSO_GY_ODR_6667Hz:
- *val = LSM6DSO_GY_ODR_6667Hz;
- break;
- default:
- *val = LSM6DSO_GY_ODR_OFF;
- break;
- }
- return ret;
+ lsm6dso_ctrl2_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)®, 1);
+ switch (reg.odr_g) {
+ case LSM6DSO_GY_ODR_OFF:
+ *val = LSM6DSO_GY_ODR_OFF;
+ break;
+ case LSM6DSO_GY_ODR_12Hz5:
+ *val = LSM6DSO_GY_ODR_12Hz5;
+ break;
+ case LSM6DSO_GY_ODR_26Hz:
+ *val = LSM6DSO_GY_ODR_26Hz;
+ break;
+ case LSM6DSO_GY_ODR_52Hz:
+ *val = LSM6DSO_GY_ODR_52Hz;
+ break;
+ case LSM6DSO_GY_ODR_104Hz:
+ *val = LSM6DSO_GY_ODR_104Hz;
+ break;
+ case LSM6DSO_GY_ODR_208Hz:
+ *val = LSM6DSO_GY_ODR_208Hz;
+ break;
+ case LSM6DSO_GY_ODR_417Hz:
+ *val = LSM6DSO_GY_ODR_417Hz;
+ break;
+ case LSM6DSO_GY_ODR_833Hz:
+ *val = LSM6DSO_GY_ODR_833Hz;
+ break;
+ case LSM6DSO_GY_ODR_1667Hz:
+ *val = LSM6DSO_GY_ODR_1667Hz;
+ break;
+ case LSM6DSO_GY_ODR_3333Hz:
+ *val = LSM6DSO_GY_ODR_3333Hz;
+ break;
+ case LSM6DSO_GY_ODR_6667Hz:
+ *val = LSM6DSO_GY_ODR_6667Hz;
+ break;
+ default:
+ *val = LSM6DSO_GY_ODR_OFF;
+ break;
+ }
+ return ret;
}
/**
@@ -442,15 +618,15 @@
*/
int32_t lsm6dso_block_data_update_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.bdu = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.bdu = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -462,13 +638,13 @@
*/
int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- *val = reg.bdu;
-
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ *val = reg.bdu;
+
+ return ret;
}
/**
@@ -482,15 +658,15 @@
int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx,
lsm6dso_usr_off_w_t val)
{
- lsm6dso_ctrl6_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.usr_off_w = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl6_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.usr_off_w = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -504,23 +680,23 @@
int32_t lsm6dso_xl_offset_weight_get(lsm6dso_ctx_t *ctx,
lsm6dso_usr_off_w_t *val)
{
- lsm6dso_ctrl6_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
-
- switch (reg.usr_off_w) {
- case LSM6DSO_LSb_1mg:
- *val = LSM6DSO_LSb_1mg;
- break;
- case LSM6DSO_LSb_16mg:
- *val = LSM6DSO_LSb_16mg;
- break;
- default:
- *val = LSM6DSO_LSb_1mg;
- break;
- }
- return ret;
+ lsm6dso_ctrl6_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+
+ switch (reg.usr_off_w) {
+ case LSM6DSO_LSb_1mg:
+ *val = LSM6DSO_LSb_1mg;
+ break;
+ case LSM6DSO_LSb_16mg:
+ *val = LSM6DSO_LSb_16mg;
+ break;
+ default:
+ *val = LSM6DSO_LSb_1mg;
+ break;
+ }
+ return ret;
}
/**
@@ -534,23 +710,23 @@
int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_xl_hm_mode_t val)
{
- lsm6dso_ctrl5_c_t ctrl5_c;
- lsm6dso_ctrl6_c_t ctrl6_c;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
- if (ret == 0) {
- ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x02U) >> 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
- }
- if (ret == 0) {
- ctrl6_c.xl_hm_mode = (uint8_t)val & 0x01U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
- }
- return ret;
+ lsm6dso_ctrl5_c_t ctrl5_c;
+ lsm6dso_ctrl6_c_t ctrl6_c;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*) &ctrl5_c, 1);
+ if (ret == 0) {
+ ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x02U) >> 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*) &ctrl5_c, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*) &ctrl6_c, 1);
+ }
+ if (ret == 0) {
+ ctrl6_c.xl_hm_mode = (uint8_t)val & 0x01U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*) &ctrl6_c, 1);
+ }
+ return ret;
}
/**
@@ -563,29 +739,29 @@
int32_t lsm6dso_xl_power_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_xl_hm_mode_t *val)
{
- lsm6dso_ctrl5_c_t ctrl5_c;
- lsm6dso_ctrl6_c_t ctrl6_c;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
- switch ((ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode) {
- case LSM6DSO_HIGH_PERFORMANCE_MD:
- *val = LSM6DSO_HIGH_PERFORMANCE_MD;
- break;
- case LSM6DSO_LOW_NORMAL_POWER_MD:
- *val = LSM6DSO_LOW_NORMAL_POWER_MD;
- break;
- case LSM6DSO_ULTRA_LOW_POWER_MD:
- *val = LSM6DSO_ULTRA_LOW_POWER_MD;
- break;
- default:
- *val = LSM6DSO_HIGH_PERFORMANCE_MD;
- break;
- }
+ lsm6dso_ctrl5_c_t ctrl5_c;
+ lsm6dso_ctrl6_c_t ctrl6_c;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*) &ctrl5_c, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*) &ctrl6_c, 1);
+ switch ( (ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode) {
+ case LSM6DSO_HIGH_PERFORMANCE_MD:
+ *val = LSM6DSO_HIGH_PERFORMANCE_MD;
+ break;
+ case LSM6DSO_LOW_NORMAL_POWER_MD:
+ *val = LSM6DSO_LOW_NORMAL_POWER_MD;
+ break;
+ case LSM6DSO_ULTRA_LOW_POWER_MD:
+ *val = LSM6DSO_ULTRA_LOW_POWER_MD;
+ break;
+ default:
+ *val = LSM6DSO_HIGH_PERFORMANCE_MD;
+ break;
}
- return ret;
+ }
+ return ret;
}
/**
@@ -598,15 +774,15 @@
int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_g_hm_mode_t val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.g_hm_mode = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.g_hm_mode = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -619,76 +795,22 @@
int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_g_hm_mode_t *val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- switch (reg.g_hm_mode) {
- case LSM6DSO_GY_HIGH_PERFORMANCE:
- *val = LSM6DSO_GY_HIGH_PERFORMANCE;
- break;
- case LSM6DSO_GY_NORMAL:
- *val = LSM6DSO_GY_NORMAL;
- break;
- default:
- *val = LSM6DSO_GY_HIGH_PERFORMANCE;
- break;
- }
- return ret;
-}
-
-/**
- * @brief Read all the interrupt flag of the device.[get]
- *
- * @param ctx read / write interface definitions
- * @param val registers ALL_INT_SRC; WAKE_UP_SRC;
- * TAP_SRC; D6D_SRC; STATUS_REG;
- * EMB_FUNC_STATUS; FSM_STATUS_A/B
- *
- */
-int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
- lsm6dso_all_sources_t *val)
-{
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_ALL_INT_SRC,
- (uint8_t *)&val->all_int_src, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_SRC,
- (uint8_t *)&val->wake_up_src, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_SRC,
- (uint8_t *)&val->tap_src, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_D6D_SRC,
- (uint8_t *)&val->d6d_src, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG,
- (uint8_t *)&val->status_reg, 1);
- }
- if (ret == 0) {
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS,
- (uint8_t *)&val->emb_func_status, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_STATUS_A,
- (uint8_t *)&val->fsm_status_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_STATUS_B,
- (uint8_t *)&val->fsm_status_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ switch (reg.g_hm_mode) {
+ case LSM6DSO_GY_HIGH_PERFORMANCE:
+ *val = LSM6DSO_GY_HIGH_PERFORMANCE;
+ break;
+ case LSM6DSO_GY_NORMAL:
+ *val = LSM6DSO_GY_NORMAL;
+ break;
+ default:
+ *val = LSM6DSO_GY_HIGH_PERFORMANCE;
+ break;
+ }
+ return ret;
}
/**
@@ -700,9 +822,9 @@
*/
int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx, lsm6dso_status_reg_t *val)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *) val, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*) val, 1);
+ return ret;
}
/**
@@ -714,13 +836,13 @@
*/
int32_t lsm6dso_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_status_reg_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)®, 1);
- *val = reg.xlda;
-
- return ret;
+ lsm6dso_status_reg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*)®, 1);
+ *val = reg.xlda;
+
+ return ret;
}
/**
@@ -732,13 +854,13 @@
*/
int32_t lsm6dso_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_status_reg_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)®, 1);
- *val = reg.gda;
-
- return ret;
+ lsm6dso_status_reg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*)®, 1);
+ *val = reg.gda;
+
+ return ret;
}
/**
@@ -750,13 +872,13 @@
*/
int32_t lsm6dso_temp_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_status_reg_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t *)®, 1);
- *val = reg.tda;
-
- return ret;
+ lsm6dso_status_reg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*)®, 1);
+ *val = reg.tda;
+
+ return ret;
}
/**
@@ -770,9 +892,9 @@
*/
int32_t lsm6dso_xl_usr_offset_x_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
+ return ret;
}
/**
@@ -786,9 +908,9 @@
*/
int32_t lsm6dso_xl_usr_offset_x_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
+ return ret;
}
/**
@@ -802,9 +924,9 @@
*/
int32_t lsm6dso_xl_usr_offset_y_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
+ return ret;
}
/**
@@ -818,9 +940,9 @@
*/
int32_t lsm6dso_xl_usr_offset_y_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
+ return ret;
}
/**
@@ -834,9 +956,9 @@
*/
int32_t lsm6dso_xl_usr_offset_z_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
+ return ret;
}
/**
@@ -850,9 +972,9 @@
*/
int32_t lsm6dso_xl_usr_offset_z_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
+ return ret;
}
/**
@@ -864,15 +986,15 @@
*/
int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.usr_off_on_out = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.usr_off_on_out = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -884,13 +1006,13 @@
*/
int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- *val = reg.usr_off_on_out;
-
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ *val = reg.usr_off_on_out;
+
+ return ret;
}
/**
@@ -904,7 +1026,21 @@
* timestamp generation.
* @{
*
-*/
+ */
+
+/**
+ * @brief Reset timestamp counter.[set]
+ *
+ * @param ctx Read / write interface definitions.(ptr)
+ * @retval Interface status (MANDATORY: return 0 -> no Error).
+ *
+ */
+int32_t lsm6dso_timestamp_rst(lsm6dso_ctx_t *ctx)
+{
+ uint8_t rst_val = 0xAA;
+
+ return lsm6dso_write_reg(ctx, LSM6DSO_TIMESTAMP2, &rst_val, 1);
+}
/**
* @brief Enables timestamp counter.[set]
@@ -915,15 +1051,15 @@
*/
int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl10_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.timestamp_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl10_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.timestamp_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -935,13 +1071,13 @@
*/
int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl10_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t *)®, 1);
- *val = reg.timestamp_en;
-
- return ret;
+ lsm6dso_ctrl10_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t*)®, 1);
+ *val = reg.timestamp_en;
+
+ return ret;
}
/**
@@ -955,9 +1091,9 @@
*/
int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TIMESTAMP0, buff, 4);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TIMESTAMP0, buff, 4);
+ return ret;
}
/**
@@ -983,15 +1119,15 @@
int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_rounding_t val)
{
- lsm6dso_ctrl5_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.rounding = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl5_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.rounding = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1004,28 +1140,28 @@
int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_rounding_t *val)
{
- lsm6dso_ctrl5_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- switch (reg.rounding) {
- case LSM6DSO_NO_ROUND:
- *val = LSM6DSO_NO_ROUND;
- break;
- case LSM6DSO_ROUND_XL:
- *val = LSM6DSO_ROUND_XL;
- break;
- case LSM6DSO_ROUND_GY:
- *val = LSM6DSO_ROUND_GY;
- break;
- case LSM6DSO_ROUND_GY_XL:
- *val = LSM6DSO_ROUND_GY_XL;
- break;
- default:
- *val = LSM6DSO_NO_ROUND;
- break;
- }
- return ret;
+ lsm6dso_ctrl5_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ switch (reg.rounding) {
+ case LSM6DSO_NO_ROUND:
+ *val = LSM6DSO_NO_ROUND;
+ break;
+ case LSM6DSO_ROUND_XL:
+ *val = LSM6DSO_ROUND_XL;
+ break;
+ case LSM6DSO_ROUND_GY:
+ *val = LSM6DSO_ROUND_GY;
+ break;
+ case LSM6DSO_ROUND_GY_XL:
+ *val = LSM6DSO_ROUND_GY_XL;
+ break;
+ default:
+ *val = LSM6DSO_NO_ROUND;
+ break;
+ }
+ return ret;
}
/**
@@ -1039,9 +1175,9 @@
*/
int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 2);
+ return ret;
}
/**
@@ -1054,9 +1190,9 @@
*/
int32_t lsm6dso_angular_rate_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_G, buff, 6);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_G, buff, 6);
+ return ret;
}
/**
@@ -1069,9 +1205,9 @@
*/
int32_t lsm6dso_acceleration_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_A, buff, 6);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_A, buff, 6);
+ return ret;
}
/**
@@ -1083,9 +1219,9 @@
*/
int32_t lsm6dso_fifo_out_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_X_L, buff, 6);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_X_L, buff, 6);
+ return ret;
}
/**
@@ -1097,16 +1233,16 @@
*/
int32_t lsm6dso_number_of_steps_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STEP_COUNTER_L, buff, 2);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STEP_COUNTER_L, buff, 2);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -1117,21 +1253,21 @@
*/
int32_t lsm6dso_steps_reset(lsm6dso_ctx_t *ctx)
{
- lsm6dso_emb_func_src_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.pedo_rst_step = PROPERTY_ENABLE;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_emb_func_src_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.pedo_rst_step = PROPERTY_ENABLE;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -1158,16 +1294,16 @@
*/
int32_t lsm6dso_odr_cal_reg_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_internal_freq_fine_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.freq_fine = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
- (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_internal_freq_fine_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.freq_fine = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
+ (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1181,13 +1317,13 @@
*/
int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_internal_freq_fine_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t *)®, 1);
- *val = reg.freq_fine;
-
- return ret;
+ lsm6dso_internal_freq_fine_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t*)®, 1);
+ *val = reg.freq_fine;
+
+ return ret;
}
@@ -1202,15 +1338,15 @@
*/
int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val)
{
- lsm6dso_func_cfg_access_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.reg_access = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_func_cfg_access_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.reg_access = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1224,25 +1360,25 @@
*/
int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t *val)
{
- lsm6dso_func_cfg_access_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t *)®, 1);
- switch (reg.reg_access) {
- case LSM6DSO_USER_BANK:
- *val = LSM6DSO_USER_BANK;
- break;
- case LSM6DSO_SENSOR_HUB_BANK:
- *val = LSM6DSO_SENSOR_HUB_BANK;
- break;
- case LSM6DSO_EMBEDDED_FUNC_BANK:
- *val = LSM6DSO_EMBEDDED_FUNC_BANK;
- break;
- default:
- *val = LSM6DSO_USER_BANK;
- break;
- }
- return ret;
+ lsm6dso_func_cfg_access_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t*)®, 1);
+ switch (reg.reg_access) {
+ case LSM6DSO_USER_BANK:
+ *val = LSM6DSO_USER_BANK;
+ break;
+ case LSM6DSO_SENSOR_HUB_BANK:
+ *val = LSM6DSO_SENSOR_HUB_BANK;
+ break;
+ case LSM6DSO_EMBEDDED_FUNC_BANK:
+ *val = LSM6DSO_EMBEDDED_FUNC_BANK;
+ break;
+ default:
+ *val = LSM6DSO_USER_BANK;
+ break;
+ }
+ return ret;
}
/**
@@ -1256,49 +1392,49 @@
int32_t lsm6dso_ln_pg_write_byte(lsm6dso_ctx_t *ctx, uint16_t address,
uint8_t *val)
{
- lsm6dso_page_rw_t page_rw;
- lsm6dso_page_sel_t page_sel;
- lsm6dso_page_address_t page_address;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
-
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.page_rw = 0x02; /* page_write enable */
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
-
- if (ret == 0) {
- page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
- page_sel.not_used_01 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
- if (ret == 0) {
- page_address.page_addr = (uint8_t)address & 0xFFU;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
- (uint8_t *)&page_address, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.page_rw = 0x00; /* page_write disable */
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_page_rw_t page_rw;
+ lsm6dso_page_sel_t page_sel;
+ lsm6dso_page_address_t page_address;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.page_rw = 0x02; /* page_write enable */
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+
+ if (ret == 0) {
+ page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
+ page_sel.not_used_01 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+ if (ret == 0) {
+ page_address.page_addr = (uint8_t)address & 0xFFU;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
+ (uint8_t*)&page_address, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.page_rw = 0x00; /* page_write disable */
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -1313,68 +1449,68 @@
int32_t lsm6dso_ln_pg_write(lsm6dso_ctx_t *ctx, uint16_t address,
uint8_t *buf, uint8_t len)
{
- lsm6dso_page_rw_t page_rw;
- lsm6dso_page_sel_t page_sel;
- lsm6dso_page_address_t page_address;
- uint16_t addr_pointed;
- int32_t ret;
- uint8_t i ;
-
- addr_pointed = address;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.page_rw = 0x02; /* page_write enable*/
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
- if (ret == 0) {
- page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
- page_sel.not_used_01 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
- if (ret == 0) {
- page_address.page_addr = (uint8_t)(addr_pointed & 0x00FFU);
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
- (uint8_t *)&page_address, 1);
+ lsm6dso_page_rw_t page_rw;
+ lsm6dso_page_sel_t page_sel;
+ lsm6dso_page_address_t page_address;
+ uint16_t addr_pointed;
+ int32_t ret;
+ uint8_t i ;
+
+ addr_pointed = address;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.page_rw = 0x02; /* page_write enable*/
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+ if (ret == 0) {
+ page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
+ page_sel.not_used_01 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+ if (ret == 0) {
+ page_address.page_addr = (uint8_t)(addr_pointed & 0x00FFU);
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
+ (uint8_t*)&page_address, 1);
+ }
+
+ if (ret == 0) {
+ for (i = 0; ( (i < len) && (ret == 0) ); i++) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, &buf[i], 1);
+ addr_pointed++;
+ /* Check if page wrap */
+ if ( ( (addr_pointed % 0x0100U) == 0x00U ) && (ret == 0) ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*)&page_sel, 1);
+ if (ret == 0) {
+ page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
+ page_sel.not_used_01 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL,
+ (uint8_t*)&page_sel, 1);
+ }
+ }
}
-
- if (ret == 0) {
- for (i = 0; ((i < len) && (ret == 0)); i++) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, &buf[i], 1);
- addr_pointed++;
- /* Check if page wrap */
- if (((addr_pointed % 0x0100U) == 0x00U) && (ret == 0)) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *)&page_sel, 1);
- if (ret == 0) {
- page_sel.page_sel = ((uint8_t)(addr_pointed >> 8) & 0x0FU);
- page_sel.not_used_01 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL,
- (uint8_t *)&page_sel, 1);
- }
- }
- }
- page_sel.page_sel = 0;
- page_sel.not_used_01 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.page_rw = 0x00; /* page_write disable */
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ page_sel.page_sel = 0;
+ page_sel.not_used_01 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.page_rw = 0x00; /* page_write disable */
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -1388,50 +1524,50 @@
int32_t lsm6dso_ln_pg_read_byte(lsm6dso_ctx_t *ctx, uint16_t address,
uint8_t *val)
{
- lsm6dso_page_rw_t page_rw;
- lsm6dso_page_sel_t page_sel;
- lsm6dso_page_address_t page_address;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.page_rw = 0x01; /* page_read enable*/
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
- if (ret == 0) {
- page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
- page_sel.not_used_01 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t *) &page_sel, 1);
- }
- if (ret == 0) {
- page_address.page_addr = (uint8_t)address & 0x00FFU;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
- (uint8_t *)&page_address, 1);
- }
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_VALUE, val, 2);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.page_rw = 0x00; /* page_read disable */
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_page_rw_t page_rw;
+ lsm6dso_page_sel_t page_sel;
+ lsm6dso_page_address_t page_address;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.page_rw = 0x01; /* page_read enable*/
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+ if (ret == 0) {
+ page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
+ page_sel.not_used_01 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
+ }
+ if (ret == 0) {
+ page_address.page_addr = (uint8_t)address & 0x00FFU;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
+ (uint8_t*)&page_address, 1);
+ }
+ if (ret == 0) {
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.page_rw = 0x00; /* page_read disable */
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -1446,15 +1582,15 @@
int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_dataready_pulsed_t val)
{
- lsm6dso_counter_bdr_reg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.dataready_pulsed = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_counter_bdr_reg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.dataready_pulsed = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1469,22 +1605,22 @@
int32_t lsm6dso_data_ready_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_dataready_pulsed_t *val)
{
- lsm6dso_counter_bdr_reg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- switch (reg.dataready_pulsed) {
- case LSM6DSO_DRDY_LATCHED:
- *val = LSM6DSO_DRDY_LATCHED;
- break;
- case LSM6DSO_DRDY_PULSED:
- *val = LSM6DSO_DRDY_PULSED;
- break;
- default:
- *val = LSM6DSO_DRDY_LATCHED;
- break;
- }
- return ret;
+ lsm6dso_counter_bdr_reg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ switch (reg.dataready_pulsed) {
+ case LSM6DSO_DRDY_LATCHED:
+ *val = LSM6DSO_DRDY_LATCHED;
+ break;
+ case LSM6DSO_DRDY_PULSED:
+ *val = LSM6DSO_DRDY_PULSED;
+ break;
+ default:
+ *val = LSM6DSO_DRDY_LATCHED;
+ break;
+ }
+ return ret;
}
/**
@@ -1496,9 +1632,9 @@
*/
int32_t lsm6dso_device_id_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I, buff, 1);
+ return ret;
}
/**
@@ -1511,16 +1647,16 @@
*/
int32_t lsm6dso_reset_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sw_reset = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sw_reset = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -1532,13 +1668,13 @@
*/
int32_t lsm6dso_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- *val = reg.sw_reset;
-
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ *val = reg.sw_reset;
+
+ return ret;
}
/**
@@ -1551,15 +1687,15 @@
*/
int32_t lsm6dso_auto_increment_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.if_inc = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.if_inc = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1572,13 +1708,13 @@
*/
int32_t lsm6dso_auto_increment_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- *val = reg.if_inc;
-
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ *val = reg.if_inc;
+
+ return ret;
}
/**
@@ -1590,15 +1726,15 @@
*/
int32_t lsm6dso_boot_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.boot = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.boot = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1610,13 +1746,13 @@
*/
int32_t lsm6dso_boot_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- *val = reg.boot;
-
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ *val = reg.boot;
+
+ return ret;
}
/**
@@ -1628,15 +1764,15 @@
*/
int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val)
{
- lsm6dso_ctrl5_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.st_xl = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl5_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.st_xl = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1648,25 +1784,25 @@
*/
int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t *val)
{
- lsm6dso_ctrl5_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- switch (reg.st_xl) {
- case LSM6DSO_XL_ST_DISABLE:
- *val = LSM6DSO_XL_ST_DISABLE;
- break;
- case LSM6DSO_XL_ST_POSITIVE:
- *val = LSM6DSO_XL_ST_POSITIVE;
- break;
- case LSM6DSO_XL_ST_NEGATIVE:
- *val = LSM6DSO_XL_ST_NEGATIVE;
- break;
- default:
- *val = LSM6DSO_XL_ST_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl5_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ switch (reg.st_xl) {
+ case LSM6DSO_XL_ST_DISABLE:
+ *val = LSM6DSO_XL_ST_DISABLE;
+ break;
+ case LSM6DSO_XL_ST_POSITIVE:
+ *val = LSM6DSO_XL_ST_POSITIVE;
+ break;
+ case LSM6DSO_XL_ST_NEGATIVE:
+ *val = LSM6DSO_XL_ST_NEGATIVE;
+ break;
+ default:
+ *val = LSM6DSO_XL_ST_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -1678,15 +1814,15 @@
*/
int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val)
{
- lsm6dso_ctrl5_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.st_g = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl5_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.st_g = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1698,25 +1834,25 @@
*/
int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t *val)
{
- lsm6dso_ctrl5_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t *)®, 1);
- switch (reg.st_g) {
- case LSM6DSO_GY_ST_DISABLE:
- *val = LSM6DSO_GY_ST_DISABLE;
- break;
- case LSM6DSO_GY_ST_POSITIVE:
- *val = LSM6DSO_GY_ST_POSITIVE;
- break;
- case LSM6DSO_GY_ST_NEGATIVE:
- *val = LSM6DSO_GY_ST_NEGATIVE;
- break;
- default:
- *val = LSM6DSO_GY_ST_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl5_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)®, 1);
+ switch (reg.st_g) {
+ case LSM6DSO_GY_ST_DISABLE:
+ *val = LSM6DSO_GY_ST_DISABLE;
+ break;
+ case LSM6DSO_GY_ST_POSITIVE:
+ *val = LSM6DSO_GY_ST_POSITIVE;
+ break;
+ case LSM6DSO_GY_ST_NEGATIVE:
+ *val = LSM6DSO_GY_ST_NEGATIVE;
+ break;
+ default:
+ *val = LSM6DSO_GY_ST_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -1741,15 +1877,15 @@
*/
int32_t lsm6dso_xl_filter_lp2_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl1_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.lpf2_xl_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl1_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.lpf2_xl_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1761,13 +1897,13 @@
*/
int32_t lsm6dso_xl_filter_lp2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl1_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t *)®, 1);
- *val = reg.lpf2_xl_en;
-
- return ret;
+ lsm6dso_ctrl1_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 1);
+ *val = reg.lpf2_xl_en;
+
+ return ret;
}
/**
@@ -1781,15 +1917,15 @@
*/
int32_t lsm6dso_gy_filter_lp1_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.lpf1_sel_g = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.lpf1_sel_g = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1803,13 +1939,13 @@
*/
int32_t lsm6dso_gy_filter_lp1_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- *val = reg.lpf1_sel_g;
-
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ *val = reg.lpf1_sel_g;
+
+ return ret;
}
/**
@@ -1822,15 +1958,15 @@
*/
int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.drdy_mask = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.drdy_mask = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1843,13 +1979,13 @@
*/
int32_t lsm6dso_filter_settling_mask_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- *val = reg.drdy_mask;
-
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ *val = reg.drdy_mask;
+
+ return ret;
}
/**
@@ -1861,15 +1997,15 @@
*/
int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, lsm6dso_ftype_t val)
{
- lsm6dso_ctrl6_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.ftype = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl6_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.ftype = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1881,40 +2017,40 @@
*/
int32_t lsm6dso_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, lsm6dso_ftype_t *val)
{
- lsm6dso_ctrl6_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- switch (reg.ftype) {
- case LSM6DSO_ULTRA_LIGHT:
- *val = LSM6DSO_ULTRA_LIGHT;
- break;
- case LSM6DSO_VERY_LIGHT:
- *val = LSM6DSO_VERY_LIGHT;
- break;
- case LSM6DSO_LIGHT:
- *val = LSM6DSO_LIGHT;
- break;
- case LSM6DSO_MEDIUM:
- *val = LSM6DSO_MEDIUM;
- break;
- case LSM6DSO_STRONG:
- *val = LSM6DSO_STRONG;
- break;
- case LSM6DSO_VERY_STRONG:
- *val = LSM6DSO_VERY_STRONG;
- break;
- case LSM6DSO_AGGRESSIVE:
- *val = LSM6DSO_AGGRESSIVE;
- break;
- case LSM6DSO_XTREME:
- *val = LSM6DSO_XTREME;
- break;
- default:
- *val = LSM6DSO_ULTRA_LIGHT;
- break;
- }
- return ret;
+ lsm6dso_ctrl6_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ switch (reg.ftype) {
+ case LSM6DSO_ULTRA_LIGHT:
+ *val = LSM6DSO_ULTRA_LIGHT;
+ break;
+ case LSM6DSO_VERY_LIGHT:
+ *val = LSM6DSO_VERY_LIGHT;
+ break;
+ case LSM6DSO_LIGHT:
+ *val = LSM6DSO_LIGHT;
+ break;
+ case LSM6DSO_MEDIUM:
+ *val = LSM6DSO_MEDIUM;
+ break;
+ case LSM6DSO_STRONG:
+ *val = LSM6DSO_STRONG;
+ break;
+ case LSM6DSO_VERY_STRONG:
+ *val = LSM6DSO_VERY_STRONG;
+ break;
+ case LSM6DSO_AGGRESSIVE:
+ *val = LSM6DSO_AGGRESSIVE;
+ break;
+ case LSM6DSO_XTREME:
+ *val = LSM6DSO_XTREME;
+ break;
+ default:
+ *val = LSM6DSO_ULTRA_LIGHT;
+ break;
+ }
+ return ret;
}
/**
@@ -1926,15 +2062,15 @@
*/
int32_t lsm6dso_xl_lp2_on_6d_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.low_pass_on_6d = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.low_pass_on_6d = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1946,13 +2082,13 @@
*/
int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- *val = reg.low_pass_on_6d;
-
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ *val = reg.low_pass_on_6d;
+
+ return ret;
}
/**
@@ -1967,17 +2103,17 @@
int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx,
lsm6dso_hp_slope_xl_en_t val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.hp_slope_xl_en = ((uint8_t)val & 0x10U) >> 4;
- reg.hp_ref_mode_xl = ((uint8_t)val & 0x20U) >> 5;
- reg.hpcf_xl = (uint8_t)val & 0x07U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.hp_slope_xl_en = ((uint8_t)val & 0x10U) >> 4;
+ reg.hp_ref_mode_xl = ((uint8_t)val & 0x20U) >> 5;
+ reg.hpcf_xl = (uint8_t)val & 0x07U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -1992,87 +2128,87 @@
int32_t lsm6dso_xl_hp_path_on_out_get(lsm6dso_ctx_t *ctx,
lsm6dso_hp_slope_xl_en_t *val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- switch ((reg.hp_ref_mode_xl << 5) | (reg.hp_slope_xl_en << 4) |
- reg.hpcf_xl) {
- case LSM6DSO_HP_PATH_DISABLE_ON_OUT:
- *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
- break;
- case LSM6DSO_SLOPE_ODR_DIV_4:
- *val = LSM6DSO_SLOPE_ODR_DIV_4;
- break;
- case LSM6DSO_HP_ODR_DIV_10:
- *val = LSM6DSO_HP_ODR_DIV_10;
- break;
- case LSM6DSO_HP_ODR_DIV_20:
- *val = LSM6DSO_HP_ODR_DIV_20;
- break;
- case LSM6DSO_HP_ODR_DIV_45:
- *val = LSM6DSO_HP_ODR_DIV_45;
- break;
- case LSM6DSO_HP_ODR_DIV_100:
- *val = LSM6DSO_HP_ODR_DIV_100;
- break;
- case LSM6DSO_HP_ODR_DIV_200:
- *val = LSM6DSO_HP_ODR_DIV_200;
- break;
- case LSM6DSO_HP_ODR_DIV_400:
- *val = LSM6DSO_HP_ODR_DIV_400;
- break;
- case LSM6DSO_HP_ODR_DIV_800:
- *val = LSM6DSO_HP_ODR_DIV_800;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_10:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_10;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_20:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_20;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_45:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_45;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_100:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_100;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_200:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_200;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_400:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_400;
- break;
- case LSM6DSO_HP_REF_MD_ODR_DIV_800:
- *val = LSM6DSO_HP_REF_MD_ODR_DIV_800;
- break;
- case LSM6DSO_LP_ODR_DIV_10:
- *val = LSM6DSO_LP_ODR_DIV_10;
- break;
- case LSM6DSO_LP_ODR_DIV_20:
- *val = LSM6DSO_LP_ODR_DIV_20;
- break;
- case LSM6DSO_LP_ODR_DIV_45:
- *val = LSM6DSO_LP_ODR_DIV_45;
- break;
- case LSM6DSO_LP_ODR_DIV_100:
- *val = LSM6DSO_LP_ODR_DIV_100;
- break;
- case LSM6DSO_LP_ODR_DIV_200:
- *val = LSM6DSO_LP_ODR_DIV_200;
- break;
- case LSM6DSO_LP_ODR_DIV_400:
- *val = LSM6DSO_LP_ODR_DIV_400;
- break;
- case LSM6DSO_LP_ODR_DIV_800:
- *val = LSM6DSO_LP_ODR_DIV_800;
- break;
- default:
- *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
- break;
- }
-
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ switch ((reg.hp_ref_mode_xl << 5) | (reg.hp_slope_xl_en << 4) |
+ reg.hpcf_xl) {
+ case LSM6DSO_HP_PATH_DISABLE_ON_OUT:
+ *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
+ break;
+ case LSM6DSO_SLOPE_ODR_DIV_4:
+ *val = LSM6DSO_SLOPE_ODR_DIV_4;
+ break;
+ case LSM6DSO_HP_ODR_DIV_10:
+ *val = LSM6DSO_HP_ODR_DIV_10;
+ break;
+ case LSM6DSO_HP_ODR_DIV_20:
+ *val = LSM6DSO_HP_ODR_DIV_20;
+ break;
+ case LSM6DSO_HP_ODR_DIV_45:
+ *val = LSM6DSO_HP_ODR_DIV_45;
+ break;
+ case LSM6DSO_HP_ODR_DIV_100:
+ *val = LSM6DSO_HP_ODR_DIV_100;
+ break;
+ case LSM6DSO_HP_ODR_DIV_200:
+ *val = LSM6DSO_HP_ODR_DIV_200;
+ break;
+ case LSM6DSO_HP_ODR_DIV_400:
+ *val = LSM6DSO_HP_ODR_DIV_400;
+ break;
+ case LSM6DSO_HP_ODR_DIV_800:
+ *val = LSM6DSO_HP_ODR_DIV_800;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_10:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_10;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_20:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_20;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_45:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_45;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_100:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_100;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_200:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_200;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_400:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_400;
+ break;
+ case LSM6DSO_HP_REF_MD_ODR_DIV_800:
+ *val = LSM6DSO_HP_REF_MD_ODR_DIV_800;
+ break;
+ case LSM6DSO_LP_ODR_DIV_10:
+ *val = LSM6DSO_LP_ODR_DIV_10;
+ break;
+ case LSM6DSO_LP_ODR_DIV_20:
+ *val = LSM6DSO_LP_ODR_DIV_20;
+ break;
+ case LSM6DSO_LP_ODR_DIV_45:
+ *val = LSM6DSO_LP_ODR_DIV_45;
+ break;
+ case LSM6DSO_LP_ODR_DIV_100:
+ *val = LSM6DSO_LP_ODR_DIV_100;
+ break;
+ case LSM6DSO_LP_ODR_DIV_200:
+ *val = LSM6DSO_LP_ODR_DIV_200;
+ break;
+ case LSM6DSO_LP_ODR_DIV_400:
+ *val = LSM6DSO_LP_ODR_DIV_400;
+ break;
+ case LSM6DSO_LP_ODR_DIV_800:
+ *val = LSM6DSO_LP_ODR_DIV_800;
+ break;
+ default:
+ *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
+ break;
+ }
+
+ return ret;
}
/**
@@ -2087,15 +2223,15 @@
*/
int32_t lsm6dso_xl_fast_settling_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fastsettl_mode_xl = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fastsettl_mode_xl = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2109,13 +2245,13 @@
*/
int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- *val = reg.fastsettl_mode_xl;
-
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ *val = reg.fastsettl_mode_xl;
+
+ return ret;
}
/**
@@ -2129,15 +2265,15 @@
int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx,
lsm6dso_slope_fds_t val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.slope_fds = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.slope_fds = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2151,22 +2287,22 @@
int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx,
lsm6dso_slope_fds_t *val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- switch (reg.slope_fds) {
- case LSM6DSO_USE_SLOPE:
- *val = LSM6DSO_USE_SLOPE;
- break;
- case LSM6DSO_USE_HPF:
- *val = LSM6DSO_USE_HPF;
- break;
- default:
- *val = LSM6DSO_USE_SLOPE;
- break;
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ switch (reg.slope_fds) {
+ case LSM6DSO_USE_SLOPE:
+ *val = LSM6DSO_USE_SLOPE;
+ break;
+ case LSM6DSO_USE_HPF:
+ *val = LSM6DSO_USE_HPF;
+ break;
+ default:
+ *val = LSM6DSO_USE_SLOPE;
+ break;
+ }
+ return ret;
}
/**
@@ -2181,16 +2317,16 @@
int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx,
lsm6dso_hpm_g_t val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
- reg.hpm_g = (uint8_t)val & 0x03U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
+ reg.hpm_g = (uint8_t)val & 0x03U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2205,31 +2341,31 @@
int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx,
lsm6dso_hpm_g_t *val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- switch ((reg.hp_en_g << 7) + reg.hpm_g) {
- case LSM6DSO_HP_FILTER_NONE:
- *val = LSM6DSO_HP_FILTER_NONE;
- break;
- case LSM6DSO_HP_FILTER_16mHz:
- *val = LSM6DSO_HP_FILTER_16mHz;
- break;
- case LSM6DSO_HP_FILTER_65mHz:
- *val = LSM6DSO_HP_FILTER_65mHz;
- break;
- case LSM6DSO_HP_FILTER_260mHz:
- *val = LSM6DSO_HP_FILTER_260mHz;
- break;
- case LSM6DSO_HP_FILTER_1Hz04:
- *val = LSM6DSO_HP_FILTER_1Hz04;
- break;
- default:
- *val = LSM6DSO_HP_FILTER_NONE;
- break;
- }
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ switch ((reg.hp_en_g << 7) + reg.hpm_g) {
+ case LSM6DSO_HP_FILTER_NONE:
+ *val = LSM6DSO_HP_FILTER_NONE;
+ break;
+ case LSM6DSO_HP_FILTER_16mHz:
+ *val = LSM6DSO_HP_FILTER_16mHz;
+ break;
+ case LSM6DSO_HP_FILTER_65mHz:
+ *val = LSM6DSO_HP_FILTER_65mHz;
+ break;
+ case LSM6DSO_HP_FILTER_260mHz:
+ *val = LSM6DSO_HP_FILTER_260mHz;
+ break;
+ case LSM6DSO_HP_FILTER_1Hz04:
+ *val = LSM6DSO_HP_FILTER_1Hz04;
+ break;
+ default:
+ *val = LSM6DSO_HP_FILTER_NONE;
+ break;
+ }
+ return ret;
}
/**
@@ -2257,15 +2393,15 @@
int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_ois_pu_dis_t val)
{
- lsm6dso_pin_ctrl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.ois_pu_dis = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_pin_ctrl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.ois_pu_dis = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2279,22 +2415,22 @@
int32_t lsm6dso_aux_sdo_ocs_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_ois_pu_dis_t *val)
{
- lsm6dso_pin_ctrl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)®, 1);
- switch (reg.ois_pu_dis) {
- case LSM6DSO_AUX_PULL_UP_DISC:
- *val = LSM6DSO_AUX_PULL_UP_DISC;
- break;
- case LSM6DSO_AUX_PULL_UP_CONNECT:
- *val = LSM6DSO_AUX_PULL_UP_CONNECT;
- break;
- default:
- *val = LSM6DSO_AUX_PULL_UP_DISC;
- break;
- }
- return ret;
+ lsm6dso_pin_ctrl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)®, 1);
+ switch (reg.ois_pu_dis) {
+ case LSM6DSO_AUX_PULL_UP_DISC:
+ *val = LSM6DSO_AUX_PULL_UP_DISC;
+ break;
+ case LSM6DSO_AUX_PULL_UP_CONNECT:
+ *val = LSM6DSO_AUX_PULL_UP_CONNECT;
+ break;
+ default:
+ *val = LSM6DSO_AUX_PULL_UP_DISC;
+ break;
+ }
+ return ret;
}
/**
@@ -2306,16 +2442,16 @@
*/
int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.ois_on_en = (uint8_t)val & 0x01U;
- reg.ois_on = (uint8_t)val & 0x01U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.ois_on_en = (uint8_t)val & 0x01U;
+ reg.ois_on = (uint8_t)val & 0x01U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2327,23 +2463,23 @@
*/
int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t *val)
{
- lsm6dso_ctrl7_g_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t *)®, 1);
- switch (reg.ois_on) {
- case LSM6DSO_AUX_ON:
- *val = LSM6DSO_AUX_ON;
- break;
- case LSM6DSO_AUX_ON_BY_AUX_INTERFACE:
- *val = LSM6DSO_AUX_ON_BY_AUX_INTERFACE;
- break;
- default:
- *val = LSM6DSO_AUX_ON;
- break;
- }
-
- return ret;
+ lsm6dso_ctrl7_g_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)®, 1);
+ switch (reg.ois_on) {
+ case LSM6DSO_AUX_ON:
+ *val = LSM6DSO_AUX_ON;
+ break;
+ case LSM6DSO_AUX_ON_BY_AUX_INTERFACE:
+ *val = LSM6DSO_AUX_ON_BY_AUX_INTERFACE;
+ break;
+ default:
+ *val = LSM6DSO_AUX_ON;
+ break;
+ }
+
+ return ret;
}
/**
@@ -2362,15 +2498,15 @@
int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_xl_fs_mode_t val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.xl_fs_mode = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.xl_fs_mode = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2388,23 +2524,23 @@
int32_t lsm6dso_aux_xl_fs_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_xl_fs_mode_t *val)
{
- lsm6dso_ctrl8_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t *)®, 1);
- switch (reg.xl_fs_mode) {
- case LSM6DSO_USE_SAME_XL_FS:
- *val = LSM6DSO_USE_SAME_XL_FS;
- break;
- case LSM6DSO_USE_DIFFERENT_XL_FS:
- *val = LSM6DSO_USE_DIFFERENT_XL_FS;
- break;
- default:
- *val = LSM6DSO_USE_SAME_XL_FS;
- break;
- }
-
- return ret;
+ lsm6dso_ctrl8_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)®, 1);
+ switch (reg.xl_fs_mode) {
+ case LSM6DSO_USE_SAME_XL_FS:
+ *val = LSM6DSO_USE_SAME_XL_FS;
+ break;
+ case LSM6DSO_USE_DIFFERENT_XL_FS:
+ *val = LSM6DSO_USE_DIFFERENT_XL_FS;
+ break;
+ default:
+ *val = LSM6DSO_USE_SAME_XL_FS;
+ break;
+ }
+
+ return ret;
}
/**
@@ -2417,9 +2553,9 @@
int32_t lsm6dso_aux_status_reg_get(lsm6dso_ctx_t *ctx,
lsm6dso_status_spiaux_t *val)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *) val, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*) val, 1);
+ return ret;
}
/**
@@ -2431,13 +2567,13 @@
*/
int32_t lsm6dso_aux_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_status_spiaux_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)®, 1);
- *val = reg.xlda;
-
- return ret;
+ lsm6dso_status_spiaux_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*)®, 1);
+ *val = reg.xlda;
+
+ return ret;
}
/**
@@ -2449,13 +2585,13 @@
*/
int32_t lsm6dso_aux_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_status_spiaux_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)®, 1);
- *val = reg.gda;
-
- return ret;
+ lsm6dso_status_spiaux_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*)®, 1);
+ *val = reg.gda;
+
+ return ret;
}
/**
@@ -2467,13 +2603,13 @@
*/
int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_status_spiaux_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t *)®, 1);
- *val = reg.gyro_settling;
-
- return ret;
+ lsm6dso_status_spiaux_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*)®, 1);
+ *val = reg.gyro_settling;
+
+ return ret;
}
/**
@@ -2487,15 +2623,15 @@
int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx,
lsm6dso_st_xl_ois_t val)
{
- lsm6dso_int_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.st_xl_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_int_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.st_xl_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2509,25 +2645,25 @@
int32_t lsm6dso_aux_xl_self_test_get(lsm6dso_ctx_t *ctx,
lsm6dso_st_xl_ois_t *val)
{
- lsm6dso_int_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- switch (reg.st_xl_ois) {
- case LSM6DSO_AUX_XL_DISABLE:
- *val = LSM6DSO_AUX_XL_DISABLE;
- break;
- case LSM6DSO_AUX_XL_POS:
- *val = LSM6DSO_AUX_XL_POS;
- break;
- case LSM6DSO_AUX_XL_NEG:
- *val = LSM6DSO_AUX_XL_NEG;
- break;
- default:
- *val = LSM6DSO_AUX_XL_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_int_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ switch (reg.st_xl_ois) {
+ case LSM6DSO_AUX_XL_DISABLE:
+ *val = LSM6DSO_AUX_XL_DISABLE;
+ break;
+ case LSM6DSO_AUX_XL_POS:
+ *val = LSM6DSO_AUX_XL_POS;
+ break;
+ case LSM6DSO_AUX_XL_NEG:
+ *val = LSM6DSO_AUX_XL_NEG;
+ break;
+ default:
+ *val = LSM6DSO_AUX_XL_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -2541,15 +2677,15 @@
int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx,
lsm6dso_den_lh_ois_t val)
{
- lsm6dso_int_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_lh_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_int_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_lh_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2562,22 +2698,22 @@
int32_t lsm6dso_aux_den_polarity_get(lsm6dso_ctx_t *ctx,
lsm6dso_den_lh_ois_t *val)
{
- lsm6dso_int_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- switch (reg.den_lh_ois) {
- case LSM6DSO_AUX_DEN_ACTIVE_LOW:
- *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
- break;
- case LSM6DSO_AUX_DEN_ACTIVE_HIGH:
- *val = LSM6DSO_AUX_DEN_ACTIVE_HIGH;
- break;
- default:
- *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
- break;
- }
- return ret;
+ lsm6dso_int_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ switch (reg.den_lh_ois) {
+ case LSM6DSO_AUX_DEN_ACTIVE_LOW:
+ *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
+ break;
+ case LSM6DSO_AUX_DEN_ACTIVE_HIGH:
+ *val = LSM6DSO_AUX_DEN_ACTIVE_HIGH;
+ break;
+ default:
+ *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
+ break;
+ }
+ return ret;
}
/**
@@ -2589,23 +2725,23 @@
*/
int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val)
{
- lsm6dso_ctrl1_ois_t ctrl1_ois;
- lsm6dso_int_ois_t int_ois;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
- if (ret == 0) {
- int_ois.lvl2_ois = (uint8_t)val & 0x01U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
- }
- if (ret == 0) {
- ctrl1_ois.lvl1_ois = ((uint8_t)val & 0x02U) >> 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
- }
- return ret;
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_int_ois_t int_ois;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*) &int_ois, 1);
+ if (ret == 0) {
+ int_ois.lvl2_ois = (uint8_t)val & 0x01U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*) &int_ois, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*) &ctrl1_ois, 1);
+ }
+ if (ret == 0) {
+ ctrl1_ois.lvl1_ois = ((uint8_t)val & 0x02U) >> 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*) &ctrl1_ois, 1);
+ }
+ return ret;
}
/**
@@ -2617,29 +2753,29 @@
*/
int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t *val)
{
- lsm6dso_ctrl1_ois_t ctrl1_ois;
- lsm6dso_int_ois_t int_ois;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *) &int_ois, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *) &ctrl1_ois, 1);
- switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois) {
- case LSM6DSO_AUX_DEN_DISABLE:
- *val = LSM6DSO_AUX_DEN_DISABLE;
- break;
- case LSM6DSO_AUX_DEN_LEVEL_LATCH:
- *val = LSM6DSO_AUX_DEN_LEVEL_LATCH;
- break;
- case LSM6DSO_AUX_DEN_LEVEL_TRIG:
- *val = LSM6DSO_AUX_DEN_LEVEL_TRIG;
- break;
- default:
- *val = LSM6DSO_AUX_DEN_DISABLE;
- break;
- }
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_int_ois_t int_ois;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*) &int_ois, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*) &ctrl1_ois, 1);
+ switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois) {
+ case LSM6DSO_AUX_DEN_DISABLE:
+ *val = LSM6DSO_AUX_DEN_DISABLE;
+ break;
+ case LSM6DSO_AUX_DEN_LEVEL_LATCH:
+ *val = LSM6DSO_AUX_DEN_LEVEL_LATCH;
+ break;
+ case LSM6DSO_AUX_DEN_LEVEL_TRIG:
+ *val = LSM6DSO_AUX_DEN_LEVEL_TRIG;
+ break;
+ default:
+ *val = LSM6DSO_AUX_DEN_DISABLE;
+ break;
}
- return ret;
+ }
+ return ret;
}
/**
@@ -2652,15 +2788,15 @@
*/
int32_t lsm6dso_aux_drdy_on_int2_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_int_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.int2_drdy_ois = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_int_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.int2_drdy_ois = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2673,13 +2809,13 @@
*/
int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_int_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t *)®, 1);
- *val = reg.int2_drdy_ois;
-
- return ret;
+ lsm6dso_int_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)®, 1);
+ *val = reg.int2_drdy_ois;
+
+ return ret;
}
/**
@@ -2697,16 +2833,16 @@
*/
int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val)
{
- lsm6dso_ctrl1_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.ois_en_spi2 = (uint8_t)val & 0x01U;
- reg.mode4_en = ((uint8_t)val & 0x02U) >> 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl1_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.ois_en_spi2 = (uint8_t)val & 0x01U;
+ reg.mode4_en = ((uint8_t)val & 0x02U) >> 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2724,25 +2860,25 @@
*/
int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val)
{
- lsm6dso_ctrl1_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- switch ((reg.mode4_en << 1) | reg.ois_en_spi2) {
- case LSM6DSO_AUX_DISABLE:
- *val = LSM6DSO_AUX_DISABLE;
- break;
- case LSM6DSO_MODE_3_GY:
- *val = LSM6DSO_MODE_3_GY;
- break;
- case LSM6DSO_MODE_4_GY_XL:
- *val = LSM6DSO_MODE_4_GY_XL;
- break;
- default:
- *val = LSM6DSO_AUX_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl1_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ switch ((reg.mode4_en << 1) | reg.ois_en_spi2) {
+ case LSM6DSO_AUX_DISABLE:
+ *val = LSM6DSO_AUX_DISABLE;
+ break;
+ case LSM6DSO_MODE_3_GY:
+ *val = LSM6DSO_MODE_3_GY;
+ break;
+ case LSM6DSO_MODE_4_GY_XL:
+ *val = LSM6DSO_MODE_4_GY_XL;
+ break;
+ default:
+ *val = LSM6DSO_AUX_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -2755,15 +2891,15 @@
int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx,
lsm6dso_fs_g_ois_t val)
{
- lsm6dso_ctrl1_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fs_g_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl1_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fs_g_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2776,31 +2912,31 @@
int32_t lsm6dso_aux_gy_full_scale_get(lsm6dso_ctx_t *ctx,
lsm6dso_fs_g_ois_t *val)
{
- lsm6dso_ctrl1_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- switch (reg.fs_g_ois) {
- case LSM6DSO_250dps_AUX:
- *val = LSM6DSO_250dps_AUX;
- break;
- case LSM6DSO_125dps_AUX:
- *val = LSM6DSO_125dps_AUX;
- break;
- case LSM6DSO_500dps_AUX:
- *val = LSM6DSO_500dps_AUX;
- break;
- case LSM6DSO_1000dps_AUX:
- *val = LSM6DSO_1000dps_AUX;
- break;
- case LSM6DSO_2000dps_AUX:
- *val = LSM6DSO_2000dps_AUX;
- break;
- default:
- *val = LSM6DSO_250dps_AUX;
- break;
- }
- return ret;
+ lsm6dso_ctrl1_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ switch (reg.fs_g_ois) {
+ case LSM6DSO_250dps_AUX:
+ *val = LSM6DSO_250dps_AUX;
+ break;
+ case LSM6DSO_125dps_AUX:
+ *val = LSM6DSO_125dps_AUX;
+ break;
+ case LSM6DSO_500dps_AUX:
+ *val = LSM6DSO_500dps_AUX;
+ break;
+ case LSM6DSO_1000dps_AUX:
+ *val = LSM6DSO_1000dps_AUX;
+ break;
+ case LSM6DSO_2000dps_AUX:
+ *val = LSM6DSO_2000dps_AUX;
+ break;
+ default:
+ *val = LSM6DSO_250dps_AUX;
+ break;
+ }
+ return ret;
}
/**
@@ -2812,15 +2948,15 @@
*/
int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val)
{
- lsm6dso_ctrl1_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sim_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl1_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sim_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2832,22 +2968,22 @@
*/
int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t *val)
{
- lsm6dso_ctrl1_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t *)®, 1);
- switch (reg.sim_ois) {
- case LSM6DSO_AUX_SPI_4_WIRE:
- *val = LSM6DSO_AUX_SPI_4_WIRE;
- break;
- case LSM6DSO_AUX_SPI_3_WIRE:
- *val = LSM6DSO_AUX_SPI_3_WIRE;
- break;
- default:
- *val = LSM6DSO_AUX_SPI_4_WIRE;
- break;
- }
- return ret;
+ lsm6dso_ctrl1_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)®, 1);
+ switch (reg.sim_ois) {
+ case LSM6DSO_AUX_SPI_4_WIRE:
+ *val = LSM6DSO_AUX_SPI_4_WIRE;
+ break;
+ case LSM6DSO_AUX_SPI_3_WIRE:
+ *val = LSM6DSO_AUX_SPI_3_WIRE;
+ break;
+ default:
+ *val = LSM6DSO_AUX_SPI_4_WIRE;
+ break;
+ }
+ return ret;
}
/**
@@ -2861,15 +2997,15 @@
int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
lsm6dso_ftype_ois_t val)
{
- lsm6dso_ctrl2_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.ftype_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl2_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.ftype_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2882,28 +3018,28 @@
int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx,
lsm6dso_ftype_ois_t *val)
{
- lsm6dso_ctrl2_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)®, 1);
- switch (reg.ftype_ois) {
- case LSM6DSO_351Hz39:
- *val = LSM6DSO_351Hz39;
- break;
- case LSM6DSO_236Hz63:
- *val = LSM6DSO_236Hz63;
- break;
- case LSM6DSO_172Hz70:
- *val = LSM6DSO_172Hz70;
- break;
- case LSM6DSO_937Hz91:
- *val = LSM6DSO_937Hz91;
- break;
- default:
- *val = LSM6DSO_351Hz39;
- break;
- }
- return ret;
+ lsm6dso_ctrl2_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)®, 1);
+ switch (reg.ftype_ois) {
+ case LSM6DSO_351Hz39:
+ *val = LSM6DSO_351Hz39;
+ break;
+ case LSM6DSO_236Hz63:
+ *val = LSM6DSO_236Hz63;
+ break;
+ case LSM6DSO_172Hz70:
+ *val = LSM6DSO_172Hz70;
+ break;
+ case LSM6DSO_937Hz91:
+ *val = LSM6DSO_937Hz91;
+ break;
+ default:
+ *val = LSM6DSO_351Hz39;
+ break;
+ }
+ return ret;
}
/**
@@ -2916,16 +3052,16 @@
int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx,
lsm6dso_hpm_ois_t val)
{
- lsm6dso_ctrl2_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.hpm_ois = (uint8_t)val & 0x03U;
- reg.hp_en_ois = ((uint8_t)val & 0x10U) >> 4;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl2_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.hpm_ois = (uint8_t)val & 0x03U;
+ reg.hp_en_ois = ((uint8_t)val & 0x10U) >> 4;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -2938,31 +3074,31 @@
int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx,
lsm6dso_hpm_ois_t *val)
{
- lsm6dso_ctrl2_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t *)®, 1);
- switch ((reg.hp_en_ois << 4) | reg.hpm_ois) {
- case LSM6DSO_AUX_HP_DISABLE:
- *val = LSM6DSO_AUX_HP_DISABLE;
- break;
- case LSM6DSO_AUX_HP_Hz016:
- *val = LSM6DSO_AUX_HP_Hz016;
- break;
- case LSM6DSO_AUX_HP_Hz065:
- *val = LSM6DSO_AUX_HP_Hz065;
- break;
- case LSM6DSO_AUX_HP_Hz260:
- *val = LSM6DSO_AUX_HP_Hz260;
- break;
- case LSM6DSO_AUX_HP_1Hz040:
- *val = LSM6DSO_AUX_HP_1Hz040;
- break;
- default:
- *val = LSM6DSO_AUX_HP_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl2_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)®, 1);
+ switch ((reg.hp_en_ois << 4) | reg.hpm_ois) {
+ case LSM6DSO_AUX_HP_DISABLE:
+ *val = LSM6DSO_AUX_HP_DISABLE;
+ break;
+ case LSM6DSO_AUX_HP_Hz016:
+ *val = LSM6DSO_AUX_HP_Hz016;
+ break;
+ case LSM6DSO_AUX_HP_Hz065:
+ *val = LSM6DSO_AUX_HP_Hz065;
+ break;
+ case LSM6DSO_AUX_HP_Hz260:
+ *val = LSM6DSO_AUX_HP_Hz260;
+ break;
+ case LSM6DSO_AUX_HP_1Hz040:
+ *val = LSM6DSO_AUX_HP_1Hz040;
+ break;
+ default:
+ *val = LSM6DSO_AUX_HP_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -2980,15 +3116,15 @@
int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx,
lsm6dso_st_ois_clampdis_t val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.st_ois_clampdis = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.st_ois_clampdis = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3006,22 +3142,22 @@
int32_t lsm6dso_aux_gy_clamp_get(lsm6dso_ctx_t *ctx,
lsm6dso_st_ois_clampdis_t *val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- switch (reg.st_ois_clampdis) {
- case LSM6DSO_ENABLE_CLAMP:
- *val = LSM6DSO_ENABLE_CLAMP;
- break;
- case LSM6DSO_DISABLE_CLAMP:
- *val = LSM6DSO_DISABLE_CLAMP;
- break;
- default:
- *val = LSM6DSO_ENABLE_CLAMP;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ switch (reg.st_ois_clampdis) {
+ case LSM6DSO_ENABLE_CLAMP:
+ *val = LSM6DSO_ENABLE_CLAMP;
+ break;
+ case LSM6DSO_DISABLE_CLAMP:
+ *val = LSM6DSO_DISABLE_CLAMP;
+ break;
+ default:
+ *val = LSM6DSO_ENABLE_CLAMP;
+ break;
+ }
+ return ret;
}
/**
@@ -3033,15 +3169,15 @@
*/
int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_ois_t val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.st_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.st_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3053,25 +3189,25 @@
*/
int32_t lsm6dso_aux_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_ois_t *val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- switch (reg.st_ois) {
- case LSM6DSO_AUX_GY_DISABLE:
- *val = LSM6DSO_AUX_GY_DISABLE;
- break;
- case LSM6DSO_AUX_GY_POS:
- *val = LSM6DSO_AUX_GY_POS;
- break;
- case LSM6DSO_AUX_GY_NEG:
- *val = LSM6DSO_AUX_GY_NEG;
- break;
- default:
- *val = LSM6DSO_AUX_GY_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ switch (reg.st_ois) {
+ case LSM6DSO_AUX_GY_DISABLE:
+ *val = LSM6DSO_AUX_GY_DISABLE;
+ break;
+ case LSM6DSO_AUX_GY_POS:
+ *val = LSM6DSO_AUX_GY_POS;
+ break;
+ case LSM6DSO_AUX_GY_NEG:
+ *val = LSM6DSO_AUX_GY_NEG;
+ break;
+ default:
+ *val = LSM6DSO_AUX_GY_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -3085,15 +3221,15 @@
int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx,
lsm6dso_filter_xl_conf_ois_t val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.filter_xl_conf_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.filter_xl_conf_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3107,41 +3243,41 @@
int32_t lsm6dso_aux_xl_bandwidth_get(lsm6dso_ctx_t *ctx,
lsm6dso_filter_xl_conf_ois_t *val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
-
- switch (reg.filter_xl_conf_ois) {
- case LSM6DSO_289Hz:
- *val = LSM6DSO_289Hz;
- break;
- case LSM6DSO_258Hz:
- *val = LSM6DSO_258Hz;
- break;
- case LSM6DSO_120Hz:
- *val = LSM6DSO_120Hz;
- break;
- case LSM6DSO_65Hz2:
- *val = LSM6DSO_65Hz2;
- break;
- case LSM6DSO_33Hz2:
- *val = LSM6DSO_33Hz2;
- break;
- case LSM6DSO_16Hz6:
- *val = LSM6DSO_16Hz6;
- break;
- case LSM6DSO_8Hz30:
- *val = LSM6DSO_8Hz30;
- break;
- case LSM6DSO_4Hz15:
- *val = LSM6DSO_4Hz15;
- break;
- default:
- *val = LSM6DSO_289Hz;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+
+ switch (reg.filter_xl_conf_ois) {
+ case LSM6DSO_289Hz:
+ *val = LSM6DSO_289Hz;
+ break;
+ case LSM6DSO_258Hz:
+ *val = LSM6DSO_258Hz;
+ break;
+ case LSM6DSO_120Hz:
+ *val = LSM6DSO_120Hz;
+ break;
+ case LSM6DSO_65Hz2:
+ *val = LSM6DSO_65Hz2;
+ break;
+ case LSM6DSO_33Hz2:
+ *val = LSM6DSO_33Hz2;
+ break;
+ case LSM6DSO_16Hz6:
+ *val = LSM6DSO_16Hz6;
+ break;
+ case LSM6DSO_8Hz30:
+ *val = LSM6DSO_8Hz30;
+ break;
+ case LSM6DSO_4Hz15:
+ *val = LSM6DSO_4Hz15;
+ break;
+ default:
+ *val = LSM6DSO_289Hz;
+ break;
+ }
+ return ret;
}
/**
@@ -3155,15 +3291,15 @@
int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx,
lsm6dso_fs_xl_ois_t val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fs_xl_ois = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fs_xl_ois = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3176,28 +3312,28 @@
int32_t lsm6dso_aux_xl_full_scale_get(lsm6dso_ctx_t *ctx,
lsm6dso_fs_xl_ois_t *val)
{
- lsm6dso_ctrl3_ois_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t *)®, 1);
- switch (reg.fs_xl_ois) {
- case LSM6DSO_AUX_2g:
- *val = LSM6DSO_AUX_2g;
- break;
- case LSM6DSO_AUX_16g:
- *val = LSM6DSO_AUX_16g;
- break;
- case LSM6DSO_AUX_4g:
- *val = LSM6DSO_AUX_4g;
- break;
- case LSM6DSO_AUX_8g:
- *val = LSM6DSO_AUX_8g;
- break;
- default:
- *val = LSM6DSO_AUX_2g;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_ois_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)®, 1);
+ switch (reg.fs_xl_ois) {
+ case LSM6DSO_AUX_2g:
+ *val = LSM6DSO_AUX_2g;
+ break;
+ case LSM6DSO_AUX_16g:
+ *val = LSM6DSO_AUX_16g;
+ break;
+ case LSM6DSO_AUX_4g:
+ *val = LSM6DSO_AUX_4g;
+ break;
+ case LSM6DSO_AUX_8g:
+ *val = LSM6DSO_AUX_8g;
+ break;
+ default:
+ *val = LSM6DSO_AUX_2g;
+ break;
+ }
+ return ret;
}
/**
@@ -3223,15 +3359,15 @@
*/
int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sdo_pu_en_t val)
{
- lsm6dso_pin_ctrl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sdo_pu_en = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_pin_ctrl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sdo_pu_en = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3243,22 +3379,22 @@
*/
int32_t lsm6dso_sdo_sa0_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sdo_pu_en_t *val)
{
- lsm6dso_pin_ctrl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t *)®, 1);
- switch (reg.sdo_pu_en) {
- case LSM6DSO_PULL_UP_DISC:
- *val = LSM6DSO_PULL_UP_DISC;
- break;
- case LSM6DSO_PULL_UP_CONNECT:
- *val = LSM6DSO_PULL_UP_CONNECT;
- break;
- default:
- *val = LSM6DSO_PULL_UP_DISC;
- break;
- }
- return ret;
+ lsm6dso_pin_ctrl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)®, 1);
+ switch (reg.sdo_pu_en) {
+ case LSM6DSO_PULL_UP_DISC:
+ *val = LSM6DSO_PULL_UP_DISC;
+ break;
+ case LSM6DSO_PULL_UP_CONNECT:
+ *val = LSM6DSO_PULL_UP_CONNECT;
+ break;
+ default:
+ *val = LSM6DSO_PULL_UP_DISC;
+ break;
+ }
+ return ret;
}
/**
@@ -3270,15 +3406,15 @@
*/
int32_t lsm6dso_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sim = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sim = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3290,22 +3426,22 @@
*/
int32_t lsm6dso_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- switch (reg.sim) {
- case LSM6DSO_SPI_4_WIRE:
- *val = LSM6DSO_SPI_4_WIRE;
- break;
- case LSM6DSO_SPI_3_WIRE:
- *val = LSM6DSO_SPI_3_WIRE;
- break;
- default:
- *val = LSM6DSO_SPI_4_WIRE;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ switch (reg.sim) {
+ case LSM6DSO_SPI_4_WIRE:
+ *val = LSM6DSO_SPI_4_WIRE;
+ break;
+ case LSM6DSO_SPI_3_WIRE:
+ *val = LSM6DSO_SPI_3_WIRE;
+ break;
+ default:
+ *val = LSM6DSO_SPI_4_WIRE;
+ break;
+ }
+ return ret;
}
/**
@@ -3319,15 +3455,15 @@
int32_t lsm6dso_i2c_interface_set(lsm6dso_ctx_t *ctx,
lsm6dso_i2c_disable_t val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.i2c_disable = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.i2c_disable = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3341,22 +3477,22 @@
int32_t lsm6dso_i2c_interface_get(lsm6dso_ctx_t *ctx,
lsm6dso_i2c_disable_t *val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- switch (reg.i2c_disable) {
- case LSM6DSO_I2C_ENABLE:
- *val = LSM6DSO_I2C_ENABLE;
- break;
- case LSM6DSO_I2C_DISABLE:
- *val = LSM6DSO_I2C_DISABLE;
- break;
- default:
- *val = LSM6DSO_I2C_ENABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ switch (reg.i2c_disable) {
+ case LSM6DSO_I2C_ENABLE:
+ *val = LSM6DSO_I2C_ENABLE;
+ break;
+ case LSM6DSO_I2C_DISABLE:
+ *val = LSM6DSO_I2C_DISABLE;
+ break;
+ default:
+ *val = LSM6DSO_I2C_ENABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -3369,27 +3505,27 @@
*/
int32_t lsm6dso_i3c_disable_set(lsm6dso_ctx_t *ctx, lsm6dso_i3c_disable_t val)
{
- lsm6dso_i3c_bus_avb_t i3c_bus_avb;
- lsm6dso_ctrl9_xl_t ctrl9_xl;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
- if (ret == 0) {
- ctrl9_xl.i3c_disable = ((uint8_t)val & 0x80U) >> 7;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
- }
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
- (uint8_t *)&i3c_bus_avb, 1);
- }
- if (ret == 0) {
- i3c_bus_avb.i3c_bus_avb_sel = (uint8_t)val & 0x03U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
- (uint8_t *)&i3c_bus_avb, 1);
- }
-
- return ret;
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ lsm6dso_ctrl9_xl_t ctrl9_xl;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
+ if (ret == 0) {
+ ctrl9_xl.i3c_disable = ((uint8_t)val & 0x80U) >> 7;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
+ }
+ if (ret == 0) {
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+ if (ret == 0) {
+ i3c_bus_avb.i3c_bus_avb_sel = (uint8_t)val & 0x03U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+
+ return ret;
}
/**
@@ -3402,37 +3538,37 @@
*/
int32_t lsm6dso_i3c_disable_get(lsm6dso_ctx_t *ctx, lsm6dso_i3c_disable_t *val)
{
- lsm6dso_ctrl9_xl_t ctrl9_xl;
- lsm6dso_i3c_bus_avb_t i3c_bus_avb;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)&ctrl9_xl, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
- (uint8_t *)&i3c_bus_avb, 1);
-
- switch ((ctrl9_xl.i3c_disable << 7) | i3c_bus_avb.i3c_bus_avb_sel) {
- case LSM6DSO_I3C_DISABLE:
- *val = LSM6DSO_I3C_DISABLE;
- break;
- case LSM6DSO_I3C_ENABLE_T_50us:
- *val = LSM6DSO_I3C_ENABLE_T_50us;
- break;
- case LSM6DSO_I3C_ENABLE_T_2us:
- *val = LSM6DSO_I3C_ENABLE_T_2us;
- break;
- case LSM6DSO_I3C_ENABLE_T_1ms:
- *val = LSM6DSO_I3C_ENABLE_T_1ms;
- break;
- case LSM6DSO_I3C_ENABLE_T_25ms:
- *val = LSM6DSO_I3C_ENABLE_T_25ms;
- break;
- default:
- *val = LSM6DSO_I3C_DISABLE;
- break;
- }
+ lsm6dso_ctrl9_xl_t ctrl9_xl;
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)&ctrl9_xl, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+
+ switch ((ctrl9_xl.i3c_disable << 7) | i3c_bus_avb.i3c_bus_avb_sel) {
+ case LSM6DSO_I3C_DISABLE:
+ *val = LSM6DSO_I3C_DISABLE;
+ break;
+ case LSM6DSO_I3C_ENABLE_T_50us:
+ *val = LSM6DSO_I3C_ENABLE_T_50us;
+ break;
+ case LSM6DSO_I3C_ENABLE_T_2us:
+ *val = LSM6DSO_I3C_ENABLE_T_2us;
+ break;
+ case LSM6DSO_I3C_ENABLE_T_1ms:
+ *val = LSM6DSO_I3C_ENABLE_T_1ms;
+ break;
+ case LSM6DSO_I3C_ENABLE_T_25ms:
+ *val = LSM6DSO_I3C_ENABLE_T_25ms;
+ break;
+ default:
+ *val = LSM6DSO_I3C_DISABLE;
+ break;
}
- return ret;
+ }
+ return ret;
}
/**
@@ -3456,15 +3592,15 @@
*/
int32_t lsm6dso_int1_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_int1_pd_en_t val)
{
- lsm6dso_i3c_bus_avb_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.pd_dis_int1 = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_i3c_bus_avb_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.pd_dis_int1 = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3476,319 +3612,22 @@
*/
int32_t lsm6dso_int1_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_int1_pd_en_t *val)
{
- lsm6dso_i3c_bus_avb_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t *)®, 1);
- switch (reg.pd_dis_int1) {
- case LSM6DSO_PULL_DOWN_DISC:
- *val = LSM6DSO_PULL_DOWN_DISC;
- break;
- case LSM6DSO_PULL_DOWN_CONNECT:
- *val = LSM6DSO_PULL_DOWN_CONNECT;
- break;
- default:
- *val = LSM6DSO_PULL_DOWN_DISC;
- break;
- }
- return ret;
-}
-
-/**
- * @brief Select the signal that need to route on int1 pad.[set]
- *
- * @param ctx read / write interface definitions
- * @param val struct of registers: INT1_CTRL,
- * MD1_CFG, EMB_FUNC_INT1, FSM_INT1_A,
- * FSM_INT1_B
- *
- */
-int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int1_route_t *val)
-{
- lsm6dso_pin_int2_route_t pin_int2_route;
- lsm6dso_tap_cfg2_t tap_cfg2;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
- (uint8_t *)&val->emb_func_int1, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_A,
- (uint8_t *)&val->fsm_int1_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_B,
- (uint8_t *)&val->fsm_int1_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- if (ret == 0) {
- if ((val->emb_func_int1.int1_fsm_lc
- | val->emb_func_int1.int1_sig_mot
- | val->emb_func_int1.int1_step_detector
- | val->emb_func_int1.int1_tilt
- | val->fsm_int1_a.int1_fsm1
- | val->fsm_int1_a.int1_fsm2
- | val->fsm_int1_a.int1_fsm3
- | val->fsm_int1_a.int1_fsm4
- | val->fsm_int1_a.int1_fsm5
- | val->fsm_int1_a.int1_fsm6
- | val->fsm_int1_a.int1_fsm7
- | val->fsm_int1_a.int1_fsm8
- | val->fsm_int1_b.int1_fsm9
- | val->fsm_int1_b.int1_fsm10
- | val->fsm_int1_b.int1_fsm11
- | val->fsm_int1_b.int1_fsm12
- | val->fsm_int1_b.int1_fsm13
- | val->fsm_int1_b.int1_fsm14
- | val->fsm_int1_b.int1_fsm15
- | val->fsm_int1_b.int1_fsm16) != PROPERTY_DISABLE) {
- val->md1_cfg.int1_emb_func = PROPERTY_ENABLE;
- } else {
- val->md1_cfg.int1_emb_func = PROPERTY_DISABLE;
- }
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT1_CTRL,
- (uint8_t *)&val->int1_ctrl, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t *)&val->md1_cfg, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
- }
-
- if (ret == 0) {
- ret = lsm6dso_pin_int2_route_get(ctx, &pin_int2_route);
- }
- if (ret == 0) {
- if ((pin_int2_route.int2_ctrl.int2_cnt_bdr
- | pin_int2_route.int2_ctrl.int2_drdy_g
- | pin_int2_route.int2_ctrl.int2_drdy_temp
- | pin_int2_route.int2_ctrl.int2_drdy_xl
- | pin_int2_route.int2_ctrl.int2_fifo_full
- | pin_int2_route.int2_ctrl.int2_fifo_ovr
- | pin_int2_route.int2_ctrl.int2_fifo_th
- | pin_int2_route.md2_cfg.int2_6d
- | pin_int2_route.md2_cfg.int2_double_tap
- | pin_int2_route.md2_cfg.int2_ff
- | pin_int2_route.md2_cfg.int2_wu
- | pin_int2_route.md2_cfg.int2_single_tap
- | pin_int2_route.md2_cfg.int2_sleep_change
- | val->int1_ctrl.den_drdy_flag
- | val->int1_ctrl.int1_boot
- | val->int1_ctrl.int1_cnt_bdr
- | val->int1_ctrl.int1_drdy_g
- | val->int1_ctrl.int1_drdy_xl
- | val->int1_ctrl.int1_fifo_full
- | val->int1_ctrl.int1_fifo_ovr
- | val->int1_ctrl.int1_fifo_th
- | val->md1_cfg.int1_6d
- | val->md1_cfg.int1_double_tap
- | val->md1_cfg.int1_ff
- | val->md1_cfg.int1_wu
- | val->md1_cfg.int1_single_tap
- | val->md1_cfg.int1_sleep_change) != PROPERTY_DISABLE) {
- tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
- } else {
- tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
- }
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
- }
- return ret;
-}
-
-/**
- * @brief Select the signal that need to route on int1 pad.[get]
- *
- * @param ctx read / write interface definitions
- * @param val struct of registers: INT1_CTRL, MD1_CFG,
- * EMB_FUNC_INT1, FSM_INT1_A, FSM_INT1_B
- *
- */
-int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int1_route_t *val)
-{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
- (uint8_t *)&val->emb_func_int1, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_A,
- (uint8_t *)&val->fsm_int1_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_B,
- (uint8_t *)&val->fsm_int1_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT1_CTRL,
- (uint8_t *)&val->int1_ctrl, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t *)&val->md1_cfg, 1);
- }
-
- return ret;
-}
-
-/**
- * @brief Select the signal that need to route on int2 pad.[set]
- *
- * @param ctx read / write interface definitions
- * @param val union of registers INT2_CTRL, MD2_CFG,
- * EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B
- *
- */
-int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int2_route_t *val)
-{
- lsm6dso_pin_int1_route_t pin_int1_route;
- lsm6dso_tap_cfg2_t tap_cfg2;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
- (uint8_t *)&val->emb_func_int2, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_A,
- (uint8_t *)&val->fsm_int2_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_B,
- (uint8_t *)&val->fsm_int2_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- if (ret == 0) {
- if ((val->emb_func_int2.int2_fsm_lc
- | val->emb_func_int2.int2_sig_mot
- | val->emb_func_int2.int2_step_detector
- | val->emb_func_int2.int2_tilt
- | val->fsm_int2_a.int2_fsm1
- | val->fsm_int2_a.int2_fsm2
- | val->fsm_int2_a.int2_fsm3
- | val->fsm_int2_a.int2_fsm4
- | val->fsm_int2_a.int2_fsm5
- | val->fsm_int2_a.int2_fsm6
- | val->fsm_int2_a.int2_fsm7
- | val->fsm_int2_a.int2_fsm8
- | val->fsm_int2_b.int2_fsm9
- | val->fsm_int2_b.int2_fsm10
- | val->fsm_int2_b.int2_fsm11
- | val->fsm_int2_b.int2_fsm12
- | val->fsm_int2_b.int2_fsm13
- | val->fsm_int2_b.int2_fsm14
- | val->fsm_int2_b.int2_fsm15
- | val->fsm_int2_b.int2_fsm16) != PROPERTY_DISABLE) {
- val->md2_cfg.int2_emb_func = PROPERTY_ENABLE;
- } else {
- val->md2_cfg.int2_emb_func = PROPERTY_DISABLE;
- }
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL,
- (uint8_t *)&val->int2_ctrl, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&val->md2_cfg, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
- }
-
- if (ret == 0) {
- ret = lsm6dso_pin_int1_route_get(ctx, &pin_int1_route);
- }
-
- if (ret == 0) {
- if ((val->int2_ctrl.int2_cnt_bdr
- | val->int2_ctrl.int2_drdy_g
- | val->int2_ctrl.int2_drdy_temp
- | val->int2_ctrl.int2_drdy_xl
- | val->int2_ctrl.int2_fifo_full
- | val->int2_ctrl.int2_fifo_ovr
- | val->int2_ctrl.int2_fifo_th
- | val->md2_cfg.int2_6d
- | val->md2_cfg.int2_double_tap
- | val->md2_cfg.int2_ff
- | val->md2_cfg.int2_wu
- | val->md2_cfg.int2_single_tap
- | val->md2_cfg.int2_sleep_change
- | pin_int1_route.int1_ctrl.den_drdy_flag
- | pin_int1_route.int1_ctrl.int1_boot
- | pin_int1_route.int1_ctrl.int1_cnt_bdr
- | pin_int1_route.int1_ctrl.int1_drdy_g
- | pin_int1_route.int1_ctrl.int1_drdy_xl
- | pin_int1_route.int1_ctrl.int1_fifo_full
- | pin_int1_route.int1_ctrl.int1_fifo_ovr
- | pin_int1_route.int1_ctrl.int1_fifo_th
- | pin_int1_route.md1_cfg.int1_6d
- | pin_int1_route.md1_cfg.int1_double_tap
- | pin_int1_route.md1_cfg.int1_ff
- | pin_int1_route.md1_cfg.int1_wu
- | pin_int1_route.md1_cfg.int1_single_tap
- | pin_int1_route.md1_cfg.int1_sleep_change) != PROPERTY_DISABLE) {
- tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
- } else {
- tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
- }
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *) &tap_cfg2, 1);
- }
- return ret;
-}
-
-/**
- * @brief Select the signal that need to route on int2 pad.[get]
- *
- * @param ctx read / write interface definitions
- * @param val union of registers INT2_CTRL, MD2_CFG,
- * EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B
- *
- */
-int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int2_route_t *val)
-{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
- (uint8_t *)&val->emb_func_int2, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_A,
- (uint8_t *)&val->fsm_int2_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_B,
- (uint8_t *)&val->fsm_int2_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
- (uint8_t *)&val->int2_ctrl, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t *)&val->md2_cfg, 1);
- }
- return ret;
+ lsm6dso_i3c_bus_avb_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB, (uint8_t*)®, 1);
+ switch (reg.pd_dis_int1) {
+ case LSM6DSO_PULL_DOWN_DISC:
+ *val = LSM6DSO_PULL_DOWN_DISC;
+ break;
+ case LSM6DSO_PULL_DOWN_CONNECT:
+ *val = LSM6DSO_PULL_DOWN_CONNECT;
+ break;
+ default:
+ *val = LSM6DSO_PULL_DOWN_DISC;
+ break;
+ }
+ return ret;
}
/**
@@ -3800,15 +3639,15 @@
*/
int32_t lsm6dso_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.pp_od = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.pp_od = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -3820,23 +3659,23 @@
*/
int32_t lsm6dso_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
-
- switch (reg.pp_od) {
- case LSM6DSO_PUSH_PULL:
- *val = LSM6DSO_PUSH_PULL;
- break;
- case LSM6DSO_OPEN_DRAIN:
- *val = LSM6DSO_OPEN_DRAIN;
- break;
- default:
- *val = LSM6DSO_PUSH_PULL;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+
+ switch (reg.pp_od) {
+ case LSM6DSO_PUSH_PULL:
+ *val = LSM6DSO_PUSH_PULL;
+ break;
+ case LSM6DSO_OPEN_DRAIN:
+ *val = LSM6DSO_OPEN_DRAIN;
+ break;
+ default:
+ *val = LSM6DSO_PUSH_PULL;
+ break;
+ }
+ return ret;
}
/**
@@ -3848,16 +3687,16 @@
*/
int32_t lsm6dso_pin_polarity_set(lsm6dso_ctx_t *ctx, lsm6dso_h_lactive_t val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.h_lactive = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.h_lactive = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -3869,23 +3708,23 @@
*/
int32_t lsm6dso_pin_polarity_get(lsm6dso_ctx_t *ctx, lsm6dso_h_lactive_t *val)
{
- lsm6dso_ctrl3_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t *)®, 1);
-
- switch (reg.h_lactive) {
- case LSM6DSO_ACTIVE_HIGH:
- *val = LSM6DSO_ACTIVE_HIGH;
- break;
- case LSM6DSO_ACTIVE_LOW:
- *val = LSM6DSO_ACTIVE_LOW;
- break;
- default:
- *val = LSM6DSO_ACTIVE_HIGH;
- break;
- }
- return ret;
+ lsm6dso_ctrl3_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)®, 1);
+
+ switch (reg.h_lactive) {
+ case LSM6DSO_ACTIVE_HIGH:
+ *val = LSM6DSO_ACTIVE_HIGH;
+ break;
+ case LSM6DSO_ACTIVE_LOW:
+ *val = LSM6DSO_ACTIVE_LOW;
+ break;
+ default:
+ *val = LSM6DSO_ACTIVE_HIGH;
+ break;
+ }
+ return ret;
}
/**
@@ -3897,16 +3736,16 @@
*/
int32_t lsm6dso_all_on_int1_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.int2_on_int1 = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.int2_on_int1 = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -3918,13 +3757,13 @@
*/
int32_t lsm6dso_all_on_int1_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- *val = reg.int2_on_int1;
-
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ *val = reg.int2_on_int1;
+
+ return ret;
}
/**
@@ -3936,32 +3775,32 @@
*/
int32_t lsm6dso_int_notification_set(lsm6dso_ctx_t *ctx, lsm6dso_lir_t val)
{
- lsm6dso_tap_cfg0_t tap_cfg0;
- lsm6dso_page_rw_t page_rw;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
- if (ret == 0) {
- tap_cfg0.lir = (uint8_t)val & 0x01U;
- tap_cfg0.int_clr_on_read = (uint8_t)val & 0x01U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
- }
- if (ret == 0) {
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- page_rw.emb_func_lir = ((uint8_t)val & 0x02U) >> 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_tap_cfg0_t tap_cfg0;
+ lsm6dso_page_rw_t page_rw;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*) &tap_cfg0, 1);
+ if (ret == 0) {
+ tap_cfg0.lir = (uint8_t)val & 0x01U;
+ tap_cfg0.int_clr_on_read = (uint8_t)val & 0x01U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*) &tap_cfg0, 1);
+ }
+ if (ret == 0) {
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.emb_func_lir = ((uint8_t)val & 0x02U) >> 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -3973,50 +3812,50 @@
*/
int32_t lsm6dso_int_notification_get(lsm6dso_ctx_t *ctx, lsm6dso_lir_t *val)
{
- lsm6dso_tap_cfg0_t tap_cfg0;
- lsm6dso_page_rw_t page_rw;
- int32_t ret;
-
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *) &tap_cfg0, 1);
- if (ret == 0) {
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ lsm6dso_tap_cfg0_t tap_cfg0;
+ lsm6dso_page_rw_t page_rw;
+ int32_t ret;
+
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*) &tap_cfg0, 1);
+ if (ret == 0) {
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ if (ret == 0) {
+ switch ((page_rw.emb_func_lir << 1) | tap_cfg0.lir) {
+ case LSM6DSO_ALL_INT_PULSED:
+ *val = LSM6DSO_ALL_INT_PULSED;
+ break;
+ case LSM6DSO_BASE_LATCHED_EMB_PULSED:
+ *val = LSM6DSO_BASE_LATCHED_EMB_PULSED;
+ break;
+ case LSM6DSO_BASE_PULSED_EMB_LATCHED:
+ *val = LSM6DSO_BASE_PULSED_EMB_LATCHED;
+ break;
+ case LSM6DSO_ALL_INT_LATCHED:
+ *val = LSM6DSO_ALL_INT_LATCHED;
+ break;
+ default:
+ *val = LSM6DSO_ALL_INT_PULSED;
+ break;
}
- if (ret == 0) {
- switch ((page_rw.emb_func_lir << 1) | tap_cfg0.lir) {
- case LSM6DSO_ALL_INT_PULSED:
- *val = LSM6DSO_ALL_INT_PULSED;
- break;
- case LSM6DSO_BASE_LATCHED_EMB_PULSED:
- *val = LSM6DSO_BASE_LATCHED_EMB_PULSED;
- break;
- case LSM6DSO_BASE_PULSED_EMB_LATCHED:
- *val = LSM6DSO_BASE_PULSED_EMB_LATCHED;
- break;
- case LSM6DSO_ALL_INT_LATCHED:
- *val = LSM6DSO_ALL_INT_LATCHED;
- break;
- default:
- *val = LSM6DSO_ALL_INT_PULSED;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t *) &page_rw, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -4045,15 +3884,15 @@
int32_t lsm6dso_wkup_ths_weight_set(lsm6dso_ctx_t *ctx,
lsm6dso_wake_ths_w_t val)
{
- lsm6dso_wake_up_dur_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.wake_ths_w = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_wake_up_dur_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.wake_ths_w = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4069,23 +3908,23 @@
int32_t lsm6dso_wkup_ths_weight_get(lsm6dso_ctx_t *ctx,
lsm6dso_wake_ths_w_t *val)
{
- lsm6dso_wake_up_dur_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
-
- switch (reg.wake_ths_w) {
- case LSM6DSO_LSb_FS_DIV_64:
- *val = LSM6DSO_LSb_FS_DIV_64;
- break;
- case LSM6DSO_LSb_FS_DIV_256:
- *val = LSM6DSO_LSb_FS_DIV_256;
- break;
- default:
- *val = LSM6DSO_LSb_FS_DIV_64;
- break;
- }
- return ret;
+ lsm6dso_wake_up_dur_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+
+ switch (reg.wake_ths_w) {
+ case LSM6DSO_LSb_FS_DIV_64:
+ *val = LSM6DSO_LSb_FS_DIV_64;
+ break;
+ case LSM6DSO_LSb_FS_DIV_256:
+ *val = LSM6DSO_LSb_FS_DIV_256;
+ break;
+ default:
+ *val = LSM6DSO_LSb_FS_DIV_64;
+ break;
+ }
+ return ret;
}
/**
@@ -4098,15 +3937,15 @@
*/
int32_t lsm6dso_wkup_threshold_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_wake_up_ths_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.wk_ths = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_wake_up_ths_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.wk_ths = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4119,13 +3958,13 @@
*/
int32_t lsm6dso_wkup_threshold_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_wake_up_ths_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- *val = reg.wk_ths;
-
- return ret;
+ lsm6dso_wake_up_ths_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ *val = reg.wk_ths;
+
+ return ret;
}
/**
@@ -4138,15 +3977,15 @@
*/
int32_t lsm6dso_xl_usr_offset_on_wkup_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_wake_up_ths_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.usr_off_on_wu = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_wake_up_ths_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.usr_off_on_wu = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4159,13 +3998,13 @@
*/
int32_t lsm6dso_xl_usr_offset_on_wkup_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_wake_up_ths_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- *val = reg.usr_off_on_wu;
-
- return ret;
+ lsm6dso_wake_up_ths_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ *val = reg.usr_off_on_wu;
+
+ return ret;
}
/**
@@ -4178,15 +4017,15 @@
*/
int32_t lsm6dso_wkup_dur_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_wake_up_dur_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.wake_dur = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_wake_up_dur_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.wake_dur = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4199,13 +4038,13 @@
*/
int32_t lsm6dso_wkup_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_wake_up_dur_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- *val = reg.wake_dur;
-
- return ret;
+ lsm6dso_wake_up_dur_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ *val = reg.wake_dur;
+
+ return ret;
}
/**
@@ -4230,15 +4069,15 @@
*/
int32_t lsm6dso_gy_sleep_mode_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sleep_g = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sleep_g = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4250,13 +4089,13 @@
*/
int32_t lsm6dso_gy_sleep_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl4_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t *)®, 1);
- *val = reg.sleep_g;
-
- return ret;
+ lsm6dso_ctrl4_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
+ *val = reg.sleep_g;
+
+ return ret;
}
/**
@@ -4272,15 +4111,15 @@
int32_t lsm6dso_act_pin_notification_set(lsm6dso_ctx_t *ctx,
lsm6dso_sleep_status_on_int_t val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sleep_status_on_int = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sleep_status_on_int = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4296,22 +4135,22 @@
int32_t lsm6dso_act_pin_notification_get(lsm6dso_ctx_t *ctx,
lsm6dso_sleep_status_on_int_t *val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- switch (reg.sleep_status_on_int) {
- case LSM6DSO_DRIVE_SLEEP_CHG_EVENT:
- *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
- break;
- case LSM6DSO_DRIVE_SLEEP_STATUS:
- *val = LSM6DSO_DRIVE_SLEEP_STATUS;
- break;
- default:
- *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
- break;
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ switch (reg.sleep_status_on_int) {
+ case LSM6DSO_DRIVE_SLEEP_CHG_EVENT:
+ *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
+ break;
+ case LSM6DSO_DRIVE_SLEEP_STATUS:
+ *val = LSM6DSO_DRIVE_SLEEP_STATUS;
+ break;
+ default:
+ *val = LSM6DSO_DRIVE_SLEEP_CHG_EVENT;
+ break;
+ }
+ return ret;
}
/**
@@ -4323,15 +4162,15 @@
*/
int32_t lsm6dso_act_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t val)
{
- lsm6dso_tap_cfg2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.inact_en = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.inact_en = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4343,28 +4182,28 @@
*/
int32_t lsm6dso_act_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t *val)
{
- lsm6dso_tap_cfg2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)®, 1);
- switch (reg.inact_en) {
- case LSM6DSO_XL_AND_GY_NOT_AFFECTED:
- *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
- break;
- case LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED:
- *val = LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED;
- break;
- case LSM6DSO_XL_12Hz5_GY_SLEEP:
- *val = LSM6DSO_XL_12Hz5_GY_SLEEP;
- break;
- case LSM6DSO_XL_12Hz5_GY_PD:
- *val = LSM6DSO_XL_12Hz5_GY_PD;
- break;
- default:
- *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
- break;
- }
- return ret;
+ lsm6dso_tap_cfg2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*)®, 1);
+ switch (reg.inact_en) {
+ case LSM6DSO_XL_AND_GY_NOT_AFFECTED:
+ *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
+ break;
+ case LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED:
+ *val = LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED;
+ break;
+ case LSM6DSO_XL_12Hz5_GY_SLEEP:
+ *val = LSM6DSO_XL_12Hz5_GY_SLEEP;
+ break;
+ case LSM6DSO_XL_12Hz5_GY_PD:
+ *val = LSM6DSO_XL_12Hz5_GY_PD;
+ break;
+ default:
+ *val = LSM6DSO_XL_AND_GY_NOT_AFFECTED;
+ break;
+ }
+ return ret;
}
/**
@@ -4377,15 +4216,15 @@
*/
int32_t lsm6dso_act_sleep_dur_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_wake_up_dur_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sleep_dur = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_wake_up_dur_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sleep_dur = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4398,13 +4237,13 @@
*/
int32_t lsm6dso_act_sleep_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_wake_up_dur_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)®, 1);
- *val = reg.sleep_dur;
-
- return ret;
+ lsm6dso_wake_up_dur_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)®, 1);
+ *val = reg.sleep_dur;
+
+ return ret;
}
/**
@@ -4429,15 +4268,15 @@
*/
int32_t lsm6dso_tap_detection_on_z_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_z_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_z_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4449,13 +4288,13 @@
*/
int32_t lsm6dso_tap_detection_on_z_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- *val = reg.tap_z_en;
-
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ *val = reg.tap_z_en;
+
+ return ret;
}
/**
@@ -4467,15 +4306,15 @@
*/
int32_t lsm6dso_tap_detection_on_y_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_y_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_y_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4487,13 +4326,13 @@
*/
int32_t lsm6dso_tap_detection_on_y_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- *val = reg.tap_y_en;
-
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ *val = reg.tap_y_en;
+
+ return ret;
}
/**
@@ -4505,15 +4344,15 @@
*/
int32_t lsm6dso_tap_detection_on_x_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_x_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_x_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4525,13 +4364,13 @@
*/
int32_t lsm6dso_tap_detection_on_x_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_cfg0_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t *)®, 1);
- *val = reg.tap_x_en;
-
- return ret;
+ lsm6dso_tap_cfg0_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)®, 1);
+ *val = reg.tap_x_en;
+
+ return ret;
}
/**
@@ -4543,15 +4382,15 @@
*/
int32_t lsm6dso_tap_threshold_x_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_cfg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_ths_x = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_ths_x = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4563,13 +4402,13 @@
*/
int32_t lsm6dso_tap_threshold_x_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_cfg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)®, 1);
- *val = reg.tap_ths_x;
-
- return ret;
+ lsm6dso_tap_cfg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t*)®, 1);
+ *val = reg.tap_ths_x;
+
+ return ret;
}
/**
@@ -4583,15 +4422,15 @@
int32_t lsm6dso_tap_axis_priority_set(lsm6dso_ctx_t *ctx,
lsm6dso_tap_priority_t val)
{
- lsm6dso_tap_cfg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_priority = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_priority = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4605,34 +4444,34 @@
int32_t lsm6dso_tap_axis_priority_get(lsm6dso_ctx_t *ctx,
lsm6dso_tap_priority_t *val)
{
- lsm6dso_tap_cfg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t *)®, 1);
- switch (reg.tap_priority) {
- case LSM6DSO_XYZ:
- *val = LSM6DSO_XYZ;
- break;
- case LSM6DSO_YXZ:
- *val = LSM6DSO_YXZ;
- break;
- case LSM6DSO_XZY:
- *val = LSM6DSO_XZY;
- break;
- case LSM6DSO_ZYX:
- *val = LSM6DSO_ZYX;
- break;
- case LSM6DSO_YZX:
- *val = LSM6DSO_YZX;
- break;
- case LSM6DSO_ZXY:
- *val = LSM6DSO_ZXY;
- break;
- default:
- *val = LSM6DSO_XYZ;
- break;
- }
- return ret;
+ lsm6dso_tap_cfg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG1, (uint8_t*)®, 1);
+ switch (reg.tap_priority) {
+ case LSM6DSO_XYZ:
+ *val = LSM6DSO_XYZ;
+ break;
+ case LSM6DSO_YXZ:
+ *val = LSM6DSO_YXZ;
+ break;
+ case LSM6DSO_XZY:
+ *val = LSM6DSO_XZY;
+ break;
+ case LSM6DSO_ZYX:
+ *val = LSM6DSO_ZYX;
+ break;
+ case LSM6DSO_YZX:
+ *val = LSM6DSO_YZX;
+ break;
+ case LSM6DSO_ZXY:
+ *val = LSM6DSO_ZXY;
+ break;
+ default:
+ *val = LSM6DSO_XYZ;
+ break;
+ }
+ return ret;
}
/**
@@ -4644,15 +4483,15 @@
*/
int32_t lsm6dso_tap_threshold_y_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_cfg2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_ths_y = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_cfg2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_ths_y = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4664,13 +4503,13 @@
*/
int32_t lsm6dso_tap_threshold_y_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_cfg2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t *)®, 1);
- *val = reg.tap_ths_y;
-
- return ret;
+ lsm6dso_tap_cfg2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*)®, 1);
+ *val = reg.tap_ths_y;
+
+ return ret;
}
/**
@@ -4682,15 +4521,15 @@
*/
int32_t lsm6dso_tap_threshold_z_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_ths_6d_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.tap_ths_z = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_ths_6d_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.tap_ths_z = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4702,13 +4541,13 @@
*/
int32_t lsm6dso_tap_threshold_z_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_ths_6d_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- *val = reg.tap_ths_z;
-
- return ret;
+ lsm6dso_tap_ths_6d_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ *val = reg.tap_ths_z;
+
+ return ret;
}
/**
@@ -4725,15 +4564,15 @@
*/
int32_t lsm6dso_tap_shock_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_int_dur2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.shock = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_int_dur2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.shock = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4750,13 +4589,13 @@
*/
int32_t lsm6dso_tap_shock_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_int_dur2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- *val = reg.shock;
-
- return ret;
+ lsm6dso_int_dur2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ *val = reg.shock;
+
+ return ret;
}
/**
@@ -4774,15 +4613,15 @@
*/
int32_t lsm6dso_tap_quiet_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_int_dur2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.quiet = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_int_dur2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.quiet = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4800,13 +4639,13 @@
*/
int32_t lsm6dso_tap_quiet_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_int_dur2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- *val = reg.quiet;
-
- return ret;
+ lsm6dso_int_dur2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ *val = reg.quiet;
+
+ return ret;
}
/**
@@ -4825,15 +4664,15 @@
*/
int32_t lsm6dso_tap_dur_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_int_dur2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.dur = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_int_dur2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.dur = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4852,13 +4691,13 @@
*/
int32_t lsm6dso_tap_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_int_dur2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t *)®, 1);
- *val = reg.dur;
-
- return ret;
+ lsm6dso_int_dur2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_DUR2, (uint8_t*)®, 1);
+ *val = reg.dur;
+
+ return ret;
}
/**
@@ -4871,15 +4710,15 @@
int32_t lsm6dso_tap_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_single_double_tap_t val)
{
- lsm6dso_wake_up_ths_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.single_double_tap = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_wake_up_ths_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.single_double_tap = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4892,24 +4731,24 @@
int32_t lsm6dso_tap_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_single_double_tap_t *val)
{
- lsm6dso_wake_up_ths_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t *)®, 1);
-
- switch (reg.single_double_tap) {
- case LSM6DSO_ONLY_SINGLE:
- *val = LSM6DSO_ONLY_SINGLE;
- break;
- case LSM6DSO_BOTH_SINGLE_DOUBLE:
- *val = LSM6DSO_BOTH_SINGLE_DOUBLE;
- break;
- default:
- *val = LSM6DSO_ONLY_SINGLE;
- break;
- }
-
- return ret;
+ lsm6dso_wake_up_ths_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_THS, (uint8_t*)®, 1);
+
+ switch (reg.single_double_tap) {
+ case LSM6DSO_ONLY_SINGLE:
+ *val = LSM6DSO_ONLY_SINGLE;
+ break;
+ case LSM6DSO_BOTH_SINGLE_DOUBLE:
+ *val = LSM6DSO_BOTH_SINGLE_DOUBLE;
+ break;
+ default:
+ *val = LSM6DSO_ONLY_SINGLE;
+ break;
+ }
+
+ return ret;
}
/**
@@ -4934,15 +4773,15 @@
*/
int32_t lsm6dso_6d_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t val)
{
- lsm6dso_tap_ths_6d_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.sixd_ths = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_ths_6d_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.sixd_ths = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -4954,28 +4793,28 @@
*/
int32_t lsm6dso_6d_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t *val)
{
- lsm6dso_tap_ths_6d_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- switch (reg.sixd_ths) {
- case LSM6DSO_DEG_80:
- *val = LSM6DSO_DEG_80;
- break;
- case LSM6DSO_DEG_70:
- *val = LSM6DSO_DEG_70;
- break;
- case LSM6DSO_DEG_60:
- *val = LSM6DSO_DEG_60;
- break;
- case LSM6DSO_DEG_50:
- *val = LSM6DSO_DEG_50;
- break;
- default:
- *val = LSM6DSO_DEG_80;
- break;
- }
- return ret;
+ lsm6dso_tap_ths_6d_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ switch (reg.sixd_ths) {
+ case LSM6DSO_DEG_80:
+ *val = LSM6DSO_DEG_80;
+ break;
+ case LSM6DSO_DEG_70:
+ *val = LSM6DSO_DEG_70;
+ break;
+ case LSM6DSO_DEG_60:
+ *val = LSM6DSO_DEG_60;
+ break;
+ case LSM6DSO_DEG_50:
+ *val = LSM6DSO_DEG_50;
+ break;
+ default:
+ *val = LSM6DSO_DEG_80;
+ break;
+ }
+ return ret;
}
/**
@@ -4987,15 +4826,15 @@
*/
int32_t lsm6dso_4d_mode_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_tap_ths_6d_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.d4d_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_tap_ths_6d_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.d4d_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5007,13 +4846,13 @@
*/
int32_t lsm6dso_4d_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_tap_ths_6d_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t *)®, 1);
- *val = reg.d4d_en;
-
- return ret;
+ lsm6dso_tap_ths_6d_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_THS_6D, (uint8_t*)®, 1);
+ *val = reg.d4d_en;
+
+ return ret;
}
/**
@@ -5037,15 +4876,15 @@
*/
int32_t lsm6dso_ff_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t val)
{
- lsm6dso_free_fall_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.ff_ths = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_free_fall_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.ff_ths = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5057,40 +4896,40 @@
*/
int32_t lsm6dso_ff_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t *val)
{
- lsm6dso_free_fall_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)®, 1);
- switch (reg.ff_ths) {
- case LSM6DSO_FF_TSH_156mg:
- *val = LSM6DSO_FF_TSH_156mg;
- break;
- case LSM6DSO_FF_TSH_219mg:
- *val = LSM6DSO_FF_TSH_219mg;
- break;
- case LSM6DSO_FF_TSH_250mg:
- *val = LSM6DSO_FF_TSH_250mg;
- break;
- case LSM6DSO_FF_TSH_312mg:
- *val = LSM6DSO_FF_TSH_312mg;
- break;
- case LSM6DSO_FF_TSH_344mg:
- *val = LSM6DSO_FF_TSH_344mg;
- break;
- case LSM6DSO_FF_TSH_406mg:
- *val = LSM6DSO_FF_TSH_406mg;
- break;
- case LSM6DSO_FF_TSH_469mg:
- *val = LSM6DSO_FF_TSH_469mg;
- break;
- case LSM6DSO_FF_TSH_500mg:
- *val = LSM6DSO_FF_TSH_500mg;
- break;
- default:
- *val = LSM6DSO_FF_TSH_156mg;
- break;
- }
- return ret;
+ lsm6dso_free_fall_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t*)®, 1);
+ switch (reg.ff_ths) {
+ case LSM6DSO_FF_TSH_156mg:
+ *val = LSM6DSO_FF_TSH_156mg;
+ break;
+ case LSM6DSO_FF_TSH_219mg:
+ *val = LSM6DSO_FF_TSH_219mg;
+ break;
+ case LSM6DSO_FF_TSH_250mg:
+ *val = LSM6DSO_FF_TSH_250mg;
+ break;
+ case LSM6DSO_FF_TSH_312mg:
+ *val = LSM6DSO_FF_TSH_312mg;
+ break;
+ case LSM6DSO_FF_TSH_344mg:
+ *val = LSM6DSO_FF_TSH_344mg;
+ break;
+ case LSM6DSO_FF_TSH_406mg:
+ *val = LSM6DSO_FF_TSH_406mg;
+ break;
+ case LSM6DSO_FF_TSH_469mg:
+ *val = LSM6DSO_FF_TSH_469mg;
+ break;
+ case LSM6DSO_FF_TSH_500mg:
+ *val = LSM6DSO_FF_TSH_500mg;
+ break;
+ default:
+ *val = LSM6DSO_FF_TSH_156mg;
+ break;
+ }
+ return ret;
}
/**
@@ -5103,24 +4942,24 @@
*/
int32_t lsm6dso_ff_dur_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_wake_up_dur_t wake_up_dur;
- lsm6dso_free_fall_t free_fall;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&wake_up_dur, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
- }
- if (ret == 0) {
- wake_up_dur.ff_dur = ((uint8_t)val & 0x20U) >> 5;
- free_fall.ff_dur = (uint8_t)val & 0x1FU;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR,
- (uint8_t *)&wake_up_dur, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
- }
- return ret;
+ lsm6dso_wake_up_dur_t wake_up_dur;
+ lsm6dso_free_fall_t free_fall;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t*)&free_fall, 1);
+ }
+ if (ret == 0) {
+ wake_up_dur.ff_dur = ((uint8_t)val & 0x20U) >> 5;
+ free_fall.ff_dur = (uint8_t)val & 0x1FU;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_WAKE_UP_DUR,
+ (uint8_t*)&wake_up_dur, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t*)&free_fall, 1);
+ }
+ return ret;
}
/**
@@ -5133,16 +4972,16 @@
*/
int32_t lsm6dso_ff_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_wake_up_dur_t wake_up_dur;
- lsm6dso_free_fall_t free_fall;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t *)&wake_up_dur, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t *)&free_fall, 1);
- *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
- }
- return ret;
+ lsm6dso_wake_up_dur_t wake_up_dur;
+ lsm6dso_free_fall_t free_fall;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_DUR, (uint8_t*)&wake_up_dur, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FREE_FALL, (uint8_t*)&free_fall, 1);
+ *val = (wake_up_dur.ff_dur << 5) + free_fall.ff_dur;
+ }
+ return ret;
}
/**
@@ -5166,20 +5005,20 @@
*/
int32_t lsm6dso_fifo_watermark_set(lsm6dso_ctx_t *ctx, uint16_t val)
{
- lsm6dso_fifo_ctrl1_t fifo_ctrl1;
- lsm6dso_fifo_ctrl2_t fifo_ctrl2;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&fifo_ctrl2, 1);
- if (ret == 0) {
- fifo_ctrl1.wtm = 0x00FFU & (uint8_t)val;
- fifo_ctrl2.wtm = (uint8_t)((0x0100U & val) >> 8);
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL1, (uint8_t *)&fifo_ctrl1, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&fifo_ctrl2, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl1_t fifo_ctrl1;
+ lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
+ if (ret == 0) {
+ fifo_ctrl1.wtm = 0x00FFU & (uint8_t)val;
+ fifo_ctrl2.wtm = (uint8_t)(( 0x0100U & val ) >> 8);
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL1, (uint8_t*)&fifo_ctrl1, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
+ }
+ return ret;
}
/**
@@ -5191,16 +5030,16 @@
*/
int32_t lsm6dso_fifo_watermark_get(lsm6dso_ctx_t *ctx, uint16_t *val)
{
- lsm6dso_fifo_ctrl1_t fifo_ctrl1;
- lsm6dso_fifo_ctrl2_t fifo_ctrl2;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL1, (uint8_t *)&fifo_ctrl1, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)&fifo_ctrl2, 1);
- *val = ((uint16_t)fifo_ctrl2.wtm << 8) + (uint16_t)fifo_ctrl1.wtm;
- }
- return ret;
+ lsm6dso_fifo_ctrl1_t fifo_ctrl1;
+ lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL1, (uint8_t*)&fifo_ctrl1, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)&fifo_ctrl2, 1);
+ *val = ((uint16_t)fifo_ctrl2.wtm << 8) + (uint16_t)fifo_ctrl1.wtm;
+ }
+ return ret;
}
/**
@@ -5213,22 +5052,22 @@
*/
int32_t lsm6dso_compression_algo_init_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_emb_func_init_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.fifo_compr_init = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_init_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.fifo_compr_init = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -5241,19 +5080,19 @@
*/
int32_t lsm6dso_compression_algo_init_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_init_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.fifo_compr_init;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_init_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.fifo_compr_init;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -5267,35 +5106,19 @@
int32_t lsm6dso_compression_algo_set(lsm6dso_ctx_t *ctx,
lsm6dso_uncoptr_rate_t val)
{
- lsm6dso_emb_func_en_b_t emb_func_en_b;
- lsm6dso_fifo_ctrl2_t fifo_ctrl2;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
- (uint8_t *)&emb_func_en_b, 1);
- }
- if (ret == 0) {
- emb_func_en_b.fifo_compr_en = ((uint8_t)val & 0x04U) >> 2;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
- (uint8_t *)&emb_func_en_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- if (ret == 0) {
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
- (uint8_t *)&fifo_ctrl2, 1);
- }
- if (ret == 0) {
- fifo_ctrl2.fifo_compr_rt_en = ((uint8_t)val & 0x04U) >> 2;
- fifo_ctrl2.uncoptr_rate = (uint8_t)val & 0x03U;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2,
- (uint8_t *)&fifo_ctrl2, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2,
+ (uint8_t*)&fifo_ctrl2, 1);
+
+ if (ret == 0) {
+ fifo_ctrl2.fifo_compr_rt_en = ((uint8_t)val & 0x04U) >> 2;
+ fifo_ctrl2.uncoptr_rate = (uint8_t)val & 0x03U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2,
+ (uint8_t*)&fifo_ctrl2, 1);
+ }
+ return ret;
}
/**
@@ -5309,32 +5132,32 @@
int32_t lsm6dso_compression_algo_get(lsm6dso_ctx_t *ctx,
lsm6dso_uncoptr_rate_t *val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
-
- switch ((reg.fifo_compr_rt_en << 2) | reg.uncoptr_rate) {
- case LSM6DSO_CMP_DISABLE:
- *val = LSM6DSO_CMP_DISABLE;
- break;
- case LSM6DSO_CMP_ALWAYS:
- *val = LSM6DSO_CMP_ALWAYS;
- break;
- case LSM6DSO_CMP_8_TO_1:
- *val = LSM6DSO_CMP_8_TO_1;
- break;
- case LSM6DSO_CMP_16_TO_1:
- *val = LSM6DSO_CMP_16_TO_1;
- break;
- case LSM6DSO_CMP_32_TO_1:
- *val = LSM6DSO_CMP_32_TO_1;
- break;
- default:
- *val = LSM6DSO_CMP_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+
+ switch ((reg.fifo_compr_rt_en<<2) | reg.uncoptr_rate) {
+ case LSM6DSO_CMP_DISABLE:
+ *val = LSM6DSO_CMP_DISABLE;
+ break;
+ case LSM6DSO_CMP_ALWAYS:
+ *val = LSM6DSO_CMP_ALWAYS;
+ break;
+ case LSM6DSO_CMP_8_TO_1:
+ *val = LSM6DSO_CMP_8_TO_1;
+ break;
+ case LSM6DSO_CMP_16_TO_1:
+ *val = LSM6DSO_CMP_16_TO_1;
+ break;
+ case LSM6DSO_CMP_32_TO_1:
+ *val = LSM6DSO_CMP_32_TO_1;
+ break;
+ default:
+ *val = LSM6DSO_CMP_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -5347,15 +5170,15 @@
int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(lsm6dso_ctx_t *ctx,
uint8_t val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.odrchg_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.odrchg_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5368,13 +5191,13 @@
int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(lsm6dso_ctx_t *ctx,
uint8_t *val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- *val = reg.odrchg_en;
-
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ *val = reg.odrchg_en;
+
+ return ret;
}
/**
@@ -5388,15 +5211,15 @@
int32_t lsm6dso_compression_algo_real_time_set(lsm6dso_ctx_t *ctx,
uint8_t val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fifo_compr_rt_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fifo_compr_rt_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5409,13 +5232,13 @@
int32_t lsm6dso_compression_algo_real_time_get(lsm6dso_ctx_t *ctx,
uint8_t *val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- *val = reg.fifo_compr_rt_en;
-
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ *val = reg.fifo_compr_rt_en;
+
+ return ret;
}
/**
@@ -5428,15 +5251,15 @@
*/
int32_t lsm6dso_fifo_stop_on_wtm_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.stop_on_wtm = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.stop_on_wtm = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5449,13 +5272,13 @@
*/
int32_t lsm6dso_fifo_stop_on_wtm_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_fifo_ctrl2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t *)®, 1);
- *val = reg.stop_on_wtm;
-
- return ret;
+ lsm6dso_fifo_ctrl2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL2, (uint8_t*)®, 1);
+ *val = reg.stop_on_wtm;
+
+ return ret;
}
/**
@@ -5468,15 +5291,15 @@
*/
int32_t lsm6dso_fifo_xl_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t val)
{
- lsm6dso_fifo_ctrl3_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.bdr_xl = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl3_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.bdr_xl = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5489,53 +5312,53 @@
*/
int32_t lsm6dso_fifo_xl_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t *val)
{
- lsm6dso_fifo_ctrl3_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)®, 1);
- switch (reg.bdr_xl) {
- case LSM6DSO_XL_NOT_BATCHED:
- *val = LSM6DSO_XL_NOT_BATCHED;
- break;
- case LSM6DSO_XL_BATCHED_AT_12Hz5:
- *val = LSM6DSO_XL_BATCHED_AT_12Hz5;
- break;
- case LSM6DSO_XL_BATCHED_AT_26Hz:
- *val = LSM6DSO_XL_BATCHED_AT_26Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_52Hz:
- *val = LSM6DSO_XL_BATCHED_AT_52Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_104Hz:
- *val = LSM6DSO_XL_BATCHED_AT_104Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_208Hz:
- *val = LSM6DSO_XL_BATCHED_AT_208Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_417Hz:
- *val = LSM6DSO_XL_BATCHED_AT_417Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_833Hz:
- *val = LSM6DSO_XL_BATCHED_AT_833Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_1667Hz:
- *val = LSM6DSO_XL_BATCHED_AT_1667Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_3333Hz:
- *val = LSM6DSO_XL_BATCHED_AT_3333Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_6667Hz:
- *val = LSM6DSO_XL_BATCHED_AT_6667Hz;
- break;
- case LSM6DSO_XL_BATCHED_AT_6Hz5:
- *val = LSM6DSO_XL_BATCHED_AT_6Hz5;
- break;
- default:
- *val = LSM6DSO_XL_NOT_BATCHED;
- break;
- }
-
- return ret;
+ lsm6dso_fifo_ctrl3_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t*)®, 1);
+ switch (reg.bdr_xl) {
+ case LSM6DSO_XL_NOT_BATCHED:
+ *val = LSM6DSO_XL_NOT_BATCHED;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_12Hz5:
+ *val = LSM6DSO_XL_BATCHED_AT_12Hz5;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_26Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_26Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_52Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_52Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_104Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_104Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_208Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_208Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_417Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_417Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_833Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_833Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_1667Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_1667Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_3333Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_3333Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_6667Hz:
+ *val = LSM6DSO_XL_BATCHED_AT_6667Hz;
+ break;
+ case LSM6DSO_XL_BATCHED_AT_6Hz5:
+ *val = LSM6DSO_XL_BATCHED_AT_6Hz5;
+ break;
+ default:
+ *val = LSM6DSO_XL_NOT_BATCHED;
+ break;
+ }
+
+ return ret;
}
/**
@@ -5548,15 +5371,15 @@
*/
int32_t lsm6dso_fifo_gy_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t val)
{
- lsm6dso_fifo_ctrl3_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.bdr_gy = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl3_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.bdr_gy = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5569,52 +5392,52 @@
*/
int32_t lsm6dso_fifo_gy_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t *val)
{
- lsm6dso_fifo_ctrl3_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t *)®, 1);
- switch (reg.bdr_gy) {
- case LSM6DSO_GY_NOT_BATCHED:
- *val = LSM6DSO_GY_NOT_BATCHED;
- break;
- case LSM6DSO_GY_BATCHED_AT_12Hz5:
- *val = LSM6DSO_GY_BATCHED_AT_12Hz5;
- break;
- case LSM6DSO_GY_BATCHED_AT_26Hz:
- *val = LSM6DSO_GY_BATCHED_AT_26Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_52Hz:
- *val = LSM6DSO_GY_BATCHED_AT_52Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_104Hz:
- *val = LSM6DSO_GY_BATCHED_AT_104Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_208Hz:
- *val = LSM6DSO_GY_BATCHED_AT_208Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_417Hz:
- *val = LSM6DSO_GY_BATCHED_AT_417Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_833Hz:
- *val = LSM6DSO_GY_BATCHED_AT_833Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_1667Hz:
- *val = LSM6DSO_GY_BATCHED_AT_1667Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_3333Hz:
- *val = LSM6DSO_GY_BATCHED_AT_3333Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_6667Hz:
- *val = LSM6DSO_GY_BATCHED_AT_6667Hz;
- break;
- case LSM6DSO_GY_BATCHED_AT_6Hz5:
- *val = LSM6DSO_GY_BATCHED_AT_6Hz5;
- break;
- default:
- *val = LSM6DSO_GY_NOT_BATCHED;
- break;
- }
- return ret;
+ lsm6dso_fifo_ctrl3_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL3, (uint8_t*)®, 1);
+ switch (reg.bdr_gy) {
+ case LSM6DSO_GY_NOT_BATCHED:
+ *val = LSM6DSO_GY_NOT_BATCHED;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_12Hz5:
+ *val = LSM6DSO_GY_BATCHED_AT_12Hz5;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_26Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_26Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_52Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_52Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_104Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_104Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_208Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_208Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_417Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_417Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_833Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_833Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_1667Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_1667Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_3333Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_3333Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_6667Hz:
+ *val = LSM6DSO_GY_BATCHED_AT_6667Hz;
+ break;
+ case LSM6DSO_GY_BATCHED_AT_6Hz5:
+ *val = LSM6DSO_GY_BATCHED_AT_6Hz5;
+ break;
+ default:
+ *val = LSM6DSO_GY_NOT_BATCHED;
+ break;
+ }
+ return ret;
}
/**
@@ -5626,15 +5449,15 @@
*/
int32_t lsm6dso_fifo_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t val)
{
- lsm6dso_fifo_ctrl4_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.fifo_mode = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl4_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.fifo_mode = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5646,35 +5469,35 @@
*/
int32_t lsm6dso_fifo_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t *val)
{
- lsm6dso_fifo_ctrl4_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
-
- switch (reg.fifo_mode) {
- case LSM6DSO_BYPASS_MODE:
- *val = LSM6DSO_BYPASS_MODE;
- break;
- case LSM6DSO_FIFO_MODE:
- *val = LSM6DSO_FIFO_MODE;
- break;
- case LSM6DSO_STREAM_TO_FIFO_MODE:
- *val = LSM6DSO_STREAM_TO_FIFO_MODE;
- break;
- case LSM6DSO_BYPASS_TO_STREAM_MODE:
- *val = LSM6DSO_BYPASS_TO_STREAM_MODE;
- break;
- case LSM6DSO_STREAM_MODE:
- *val = LSM6DSO_STREAM_MODE;
- break;
- case LSM6DSO_BYPASS_TO_FIFO_MODE:
- *val = LSM6DSO_BYPASS_TO_FIFO_MODE;
- break;
- default:
- *val = LSM6DSO_BYPASS_MODE;
- break;
- }
- return ret;
+ lsm6dso_fifo_ctrl4_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+
+ switch (reg.fifo_mode) {
+ case LSM6DSO_BYPASS_MODE:
+ *val = LSM6DSO_BYPASS_MODE;
+ break;
+ case LSM6DSO_FIFO_MODE:
+ *val = LSM6DSO_FIFO_MODE;
+ break;
+ case LSM6DSO_STREAM_TO_FIFO_MODE:
+ *val = LSM6DSO_STREAM_TO_FIFO_MODE;
+ break;
+ case LSM6DSO_BYPASS_TO_STREAM_MODE:
+ *val = LSM6DSO_BYPASS_TO_STREAM_MODE;
+ break;
+ case LSM6DSO_STREAM_MODE:
+ *val = LSM6DSO_STREAM_MODE;
+ break;
+ case LSM6DSO_BYPASS_TO_FIFO_MODE:
+ *val = LSM6DSO_BYPASS_TO_FIFO_MODE;
+ break;
+ default:
+ *val = LSM6DSO_BYPASS_MODE;
+ break;
+ }
+ return ret;
}
/**
@@ -5688,15 +5511,15 @@
int32_t lsm6dso_fifo_temp_batch_set(lsm6dso_ctx_t *ctx,
lsm6dso_odr_t_batch_t val)
{
- lsm6dso_fifo_ctrl4_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.odr_t_batch = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl4_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.odr_t_batch = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5710,29 +5533,29 @@
int32_t lsm6dso_fifo_temp_batch_get(lsm6dso_ctx_t *ctx,
lsm6dso_odr_t_batch_t *val)
{
- lsm6dso_fifo_ctrl4_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
-
- switch (reg.odr_t_batch) {
- case LSM6DSO_TEMP_NOT_BATCHED:
- *val = LSM6DSO_TEMP_NOT_BATCHED;
- break;
- case LSM6DSO_TEMP_BATCHED_AT_1Hz6:
- *val = LSM6DSO_TEMP_BATCHED_AT_1Hz6;
- break;
- case LSM6DSO_TEMP_BATCHED_AT_12Hz5:
- *val = LSM6DSO_TEMP_BATCHED_AT_12Hz5;
- break;
- case LSM6DSO_TEMP_BATCHED_AT_52Hz:
- *val = LSM6DSO_TEMP_BATCHED_AT_52Hz;
- break;
- default:
- *val = LSM6DSO_TEMP_NOT_BATCHED;
- break;
- }
- return ret;
+ lsm6dso_fifo_ctrl4_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+
+ switch (reg.odr_t_batch) {
+ case LSM6DSO_TEMP_NOT_BATCHED:
+ *val = LSM6DSO_TEMP_NOT_BATCHED;
+ break;
+ case LSM6DSO_TEMP_BATCHED_AT_1Hz6:
+ *val = LSM6DSO_TEMP_BATCHED_AT_1Hz6;
+ break;
+ case LSM6DSO_TEMP_BATCHED_AT_12Hz5:
+ *val = LSM6DSO_TEMP_BATCHED_AT_12Hz5;
+ break;
+ case LSM6DSO_TEMP_BATCHED_AT_52Hz:
+ *val = LSM6DSO_TEMP_BATCHED_AT_52Hz;
+ break;
+ default:
+ *val = LSM6DSO_TEMP_NOT_BATCHED;
+ break;
+ }
+ return ret;
}
/**
@@ -5747,15 +5570,15 @@
int32_t lsm6dso_fifo_timestamp_decimation_set(lsm6dso_ctx_t *ctx,
lsm6dso_odr_ts_batch_t val)
{
- lsm6dso_fifo_ctrl4_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.odr_ts_batch = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_fifo_ctrl4_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.odr_ts_batch = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5770,28 +5593,28 @@
int32_t lsm6dso_fifo_timestamp_decimation_get(lsm6dso_ctx_t *ctx,
lsm6dso_odr_ts_batch_t *val)
{
- lsm6dso_fifo_ctrl4_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t *)®, 1);
- switch (reg.odr_ts_batch) {
- case LSM6DSO_NO_DECIMATION:
- *val = LSM6DSO_NO_DECIMATION;
- break;
- case LSM6DSO_DEC_1:
- *val = LSM6DSO_DEC_1;
- break;
- case LSM6DSO_DEC_8:
- *val = LSM6DSO_DEC_8;
- break;
- case LSM6DSO_DEC_32:
- *val = LSM6DSO_DEC_32;
- break;
- default:
- *val = LSM6DSO_NO_DECIMATION;
- break;
- }
- return ret;
+ lsm6dso_fifo_ctrl4_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_CTRL4, (uint8_t*)®, 1);
+ switch (reg.odr_ts_batch) {
+ case LSM6DSO_NO_DECIMATION:
+ *val = LSM6DSO_NO_DECIMATION;
+ break;
+ case LSM6DSO_DEC_1:
+ *val = LSM6DSO_DEC_1;
+ break;
+ case LSM6DSO_DEC_8:
+ *val = LSM6DSO_DEC_8;
+ break;
+ case LSM6DSO_DEC_32:
+ *val = LSM6DSO_DEC_32;
+ break;
+ default:
+ *val = LSM6DSO_NO_DECIMATION;
+ break;
+ }
+ return ret;
}
/**
@@ -5806,15 +5629,15 @@
int32_t lsm6dso_fifo_cnt_event_batch_set(lsm6dso_ctx_t *ctx,
lsm6dso_trig_counter_bdr_t val)
{
- lsm6dso_counter_bdr_reg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.trig_counter_bdr = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_counter_bdr_reg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.trig_counter_bdr = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5829,22 +5652,22 @@
int32_t lsm6dso_fifo_cnt_event_batch_get(lsm6dso_ctx_t *ctx,
lsm6dso_trig_counter_bdr_t *val)
{
- lsm6dso_counter_bdr_reg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- switch (reg.trig_counter_bdr) {
- case LSM6DSO_XL_BATCH_EVENT:
- *val = LSM6DSO_XL_BATCH_EVENT;
- break;
- case LSM6DSO_GYRO_BATCH_EVENT:
- *val = LSM6DSO_GYRO_BATCH_EVENT;
- break;
- default:
- *val = LSM6DSO_XL_BATCH_EVENT;
- break;
- }
- return ret;
+ lsm6dso_counter_bdr_reg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ switch (reg.trig_counter_bdr) {
+ case LSM6DSO_XL_BATCH_EVENT:
+ *val = LSM6DSO_XL_BATCH_EVENT;
+ break;
+ case LSM6DSO_GYRO_BATCH_EVENT:
+ *val = LSM6DSO_GYRO_BATCH_EVENT;
+ break;
+ default:
+ *val = LSM6DSO_XL_BATCH_EVENT;
+ break;
+ }
+ return ret;
}
/**
@@ -5858,15 +5681,15 @@
*/
int32_t lsm6dso_rst_batch_counter_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_counter_bdr_reg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.rst_counter_bdr = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- }
- return ret;
+ lsm6dso_counter_bdr_reg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.rst_counter_bdr = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ }
+ return ret;
}
/**
@@ -5880,13 +5703,13 @@
*/
int32_t lsm6dso_rst_batch_counter_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_counter_bdr_reg1_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®, 1);
- *val = reg.rst_counter_bdr;
-
- return ret;
+ lsm6dso_counter_bdr_reg1_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)®, 1);
+ *val = reg.rst_counter_bdr;
+
+ return ret;
}
/**
@@ -5899,23 +5722,23 @@
*/
int32_t lsm6dso_batch_counter_threshold_set(lsm6dso_ctx_t *ctx, uint16_t val)
{
- lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
- lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
- (uint8_t *)&counter_bdr_reg1, 1);
- if (ret == 0) {
- counter_bdr_reg2.cnt_bdr_th = 0x00FFU & (uint8_t)val;
- counter_bdr_reg1.cnt_bdr_th = (uint8_t)(0x0700U & val) >> 8;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
- (uint8_t *)&counter_bdr_reg1, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
- (uint8_t *)&counter_bdr_reg2, 1);
- }
- return ret;
+ lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
+ lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+ (uint8_t*)&counter_bdr_reg1, 1);
+ if (ret == 0) {
+ counter_bdr_reg2.cnt_bdr_th = 0x00FFU & (uint8_t)val;
+ counter_bdr_reg1.cnt_bdr_th = (uint8_t)(0x0700U & val) >> 8;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+ (uint8_t*)&counter_bdr_reg1, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
+ (uint8_t*)&counter_bdr_reg2, 1);
+ }
+ return ret;
}
/**
@@ -5928,21 +5751,21 @@
*/
int32_t lsm6dso_batch_counter_threshold_get(lsm6dso_ctx_t *ctx, uint16_t *val)
{
- lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
- lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
- (uint8_t *)&counter_bdr_reg1, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
- (uint8_t *)&counter_bdr_reg2, 1);
-
- *val = ((uint16_t)counter_bdr_reg1.cnt_bdr_th << 8)
- + (uint16_t)counter_bdr_reg2.cnt_bdr_th;
- }
-
- return ret;
+ lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
+ lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1,
+ (uint8_t*)&counter_bdr_reg1, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG2,
+ (uint8_t*)&counter_bdr_reg2, 1);
+
+ *val = ((uint16_t)counter_bdr_reg1.cnt_bdr_th << 8)
+ + (uint16_t)counter_bdr_reg2.cnt_bdr_th;
+ }
+
+ return ret;
}
/**
@@ -5954,19 +5777,19 @@
*/
int32_t lsm6dso_fifo_data_level_get(lsm6dso_ctx_t *ctx, uint16_t *val)
{
- lsm6dso_fifo_status1_t fifo_status1;
- lsm6dso_fifo_status2_t fifo_status2;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS1,
- (uint8_t *)&fifo_status1, 1);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2,
- (uint8_t *)&fifo_status2, 1);
- *val = ((uint16_t)fifo_status2.diff_fifo << 8) +
- (uint16_t)fifo_status1.diff_fifo;
- }
- return ret;
+ lsm6dso_fifo_status1_t fifo_status1;
+ lsm6dso_fifo_status2_t fifo_status2;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS1,
+ (uint8_t*)&fifo_status1, 1);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2,
+ (uint8_t*)&fifo_status2, 1);
+ *val = ((uint16_t)fifo_status2.diff_fifo << 8) +
+ (uint16_t)fifo_status1.diff_fifo;
+ }
+ return ret;
}
/**
@@ -5979,9 +5802,9 @@
int32_t lsm6dso_fifo_status_get(lsm6dso_ctx_t *ctx,
lsm6dso_fifo_status2_t *val)
{
- int32_t ret;
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *) val, 1);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t*) val, 1);
+ return ret;
}
/**
@@ -5993,13 +5816,13 @@
*/
int32_t lsm6dso_fifo_full_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_fifo_status2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)®, 1);
- *val = reg.fifo_full_ia;
-
- return ret;
+ lsm6dso_fifo_status2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t*)®, 1);
+ *val = reg.fifo_full_ia;
+
+ return ret;
}
/**
@@ -6012,13 +5835,13 @@
*/
int32_t lsm6dso_fifo_ovr_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_fifo_status2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)®, 1);
- *val = reg.fifo_ovr_ia;
-
- return ret;
+ lsm6dso_fifo_status2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t*)®, 1);
+ *val = reg.fifo_ovr_ia;
+
+ return ret;
}
/**
@@ -6030,13 +5853,13 @@
*/
int32_t lsm6dso_fifo_wtm_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_fifo_status2_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t *)®, 1);
- *val = reg.fifo_wtm_ia;
-
- return ret;
+ lsm6dso_fifo_status2_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2, (uint8_t*)®, 1);
+ *val = reg.fifo_wtm_ia;
+
+ return ret;
}
/**
@@ -6049,79 +5872,79 @@
int32_t lsm6dso_fifo_sensor_tag_get(lsm6dso_ctx_t *ctx,
lsm6dso_fifo_tag_t *val)
{
- lsm6dso_fifo_data_out_tag_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_TAG, (uint8_t *)®, 1);
- switch (reg.tag_sensor) {
- case LSM6DSO_GYRO_NC_TAG:
- *val = LSM6DSO_GYRO_NC_TAG;
- break;
- case LSM6DSO_XL_NC_TAG:
- *val = LSM6DSO_XL_NC_TAG;
- break;
- case LSM6DSO_TEMPERATURE_TAG:
- *val = LSM6DSO_TEMPERATURE_TAG;
- break;
- case LSM6DSO_CFG_CHANGE_TAG:
- *val = LSM6DSO_CFG_CHANGE_TAG;
- break;
- case LSM6DSO_XL_NC_T_2_TAG:
- *val = LSM6DSO_XL_NC_T_2_TAG;
- break;
- case LSM6DSO_XL_NC_T_1_TAG:
- *val = LSM6DSO_XL_NC_T_1_TAG;
- break;
- case LSM6DSO_XL_2XC_TAG:
- *val = LSM6DSO_XL_2XC_TAG;
- break;
- case LSM6DSO_XL_3XC_TAG:
- *val = LSM6DSO_XL_3XC_TAG;
- break;
- case LSM6DSO_GYRO_NC_T_2_TAG:
- *val = LSM6DSO_GYRO_NC_T_2_TAG;
- break;
- case LSM6DSO_GYRO_NC_T_1_TAG:
- *val = LSM6DSO_GYRO_NC_T_1_TAG;
- break;
- case LSM6DSO_GYRO_2XC_TAG:
- *val = LSM6DSO_GYRO_2XC_TAG;
- break;
- case LSM6DSO_GYRO_3XC_TAG:
- *val = LSM6DSO_GYRO_3XC_TAG;
- break;
- case LSM6DSO_SENSORHUB_SLAVE0_TAG:
- *val = LSM6DSO_SENSORHUB_SLAVE0_TAG;
- break;
- case LSM6DSO_SENSORHUB_SLAVE1_TAG:
- *val = LSM6DSO_SENSORHUB_SLAVE1_TAG;
- break;
- case LSM6DSO_SENSORHUB_SLAVE2_TAG:
- *val = LSM6DSO_SENSORHUB_SLAVE2_TAG;
- break;
- case LSM6DSO_SENSORHUB_SLAVE3_TAG:
- *val = LSM6DSO_SENSORHUB_SLAVE3_TAG;
- break;
- case LSM6DSO_STEP_CPUNTER_TAG:
- *val = LSM6DSO_STEP_CPUNTER_TAG;
- break;
- case LSM6DSO_GAME_ROTATION_TAG:
- *val = LSM6DSO_GAME_ROTATION_TAG;
- break;
- case LSM6DSO_GEOMAG_ROTATION_TAG:
- *val = LSM6DSO_GEOMAG_ROTATION_TAG;
- break;
- case LSM6DSO_ROTATION_TAG:
- *val = LSM6DSO_ROTATION_TAG;
- break;
- case LSM6DSO_SENSORHUB_NACK_TAG:
- *val = LSM6DSO_SENSORHUB_NACK_TAG;
- break;
- default:
- *val = LSM6DSO_GYRO_NC_TAG;
- break;
- }
- return ret;
+ lsm6dso_fifo_data_out_tag_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_TAG, (uint8_t*)®, 1);
+ switch (reg.tag_sensor) {
+ case LSM6DSO_GYRO_NC_TAG:
+ *val = LSM6DSO_GYRO_NC_TAG;
+ break;
+ case LSM6DSO_XL_NC_TAG:
+ *val = LSM6DSO_XL_NC_TAG;
+ break;
+ case LSM6DSO_TEMPERATURE_TAG:
+ *val = LSM6DSO_TEMPERATURE_TAG;
+ break;
+ case LSM6DSO_CFG_CHANGE_TAG:
+ *val = LSM6DSO_CFG_CHANGE_TAG;
+ break;
+ case LSM6DSO_XL_NC_T_2_TAG:
+ *val = LSM6DSO_XL_NC_T_2_TAG;
+ break;
+ case LSM6DSO_XL_NC_T_1_TAG:
+ *val = LSM6DSO_XL_NC_T_1_TAG;
+ break;
+ case LSM6DSO_XL_2XC_TAG:
+ *val = LSM6DSO_XL_2XC_TAG;
+ break;
+ case LSM6DSO_XL_3XC_TAG:
+ *val = LSM6DSO_XL_3XC_TAG;
+ break;
+ case LSM6DSO_GYRO_NC_T_2_TAG:
+ *val = LSM6DSO_GYRO_NC_T_2_TAG;
+ break;
+ case LSM6DSO_GYRO_NC_T_1_TAG:
+ *val = LSM6DSO_GYRO_NC_T_1_TAG;
+ break;
+ case LSM6DSO_GYRO_2XC_TAG:
+ *val = LSM6DSO_GYRO_2XC_TAG;
+ break;
+ case LSM6DSO_GYRO_3XC_TAG:
+ *val = LSM6DSO_GYRO_3XC_TAG;
+ break;
+ case LSM6DSO_SENSORHUB_SLAVE0_TAG:
+ *val = LSM6DSO_SENSORHUB_SLAVE0_TAG;
+ break;
+ case LSM6DSO_SENSORHUB_SLAVE1_TAG:
+ *val = LSM6DSO_SENSORHUB_SLAVE1_TAG;
+ break;
+ case LSM6DSO_SENSORHUB_SLAVE2_TAG:
+ *val = LSM6DSO_SENSORHUB_SLAVE2_TAG;
+ break;
+ case LSM6DSO_SENSORHUB_SLAVE3_TAG:
+ *val = LSM6DSO_SENSORHUB_SLAVE3_TAG;
+ break;
+ case LSM6DSO_STEP_CPUNTER_TAG:
+ *val = LSM6DSO_STEP_CPUNTER_TAG;
+ break;
+ case LSM6DSO_GAME_ROTATION_TAG:
+ *val = LSM6DSO_GAME_ROTATION_TAG;
+ break;
+ case LSM6DSO_GEOMAG_ROTATION_TAG:
+ *val = LSM6DSO_GEOMAG_ROTATION_TAG;
+ break;
+ case LSM6DSO_ROTATION_TAG:
+ *val = LSM6DSO_ROTATION_TAG;
+ break;
+ case LSM6DSO_SENSORHUB_NACK_TAG:
+ *val = LSM6DSO_SENSORHUB_NACK_TAG;
+ break;
+ default:
+ *val = LSM6DSO_GYRO_NC_TAG;
+ break;
+ }
+ return ret;
}
/**
@@ -6135,22 +5958,22 @@
*/
int32_t lsm6dso_fifo_pedo_batch_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_emb_func_fifo_cfg_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.pedo_fifo_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
- (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_emb_func_fifo_cfg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.pedo_fifo_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -6163,18 +5986,18 @@
*/
int32_t lsm6dso_fifo_pedo_batch_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_fifo_cfg_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.pedo_fifo_en;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_emb_func_fifo_cfg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_FIFO_CFG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.pedo_fifo_en;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -6187,21 +6010,21 @@
*/
int32_t lsm6dso_sh_batch_slave_0_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_slv0_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.batch_ext_sens_0_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv0_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.batch_ext_sens_0_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -6214,18 +6037,18 @@
*/
int32_t lsm6dso_sh_batch_slave_0_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_slv0_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.batch_ext_sens_0_en;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv0_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.batch_ext_sens_0_en;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -6238,22 +6061,22 @@
*/
int32_t lsm6dso_sh_batch_slave_1_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_slv1_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.batch_ext_sens_1_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv1_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.batch_ext_sens_1_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -6266,18 +6089,18 @@
*/
int32_t lsm6dso_sh_batch_slave_1_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_slv1_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)®, 1);
- *val = reg.batch_ext_sens_1_en;
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv1_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t*)®, 1);
+ *val = reg.batch_ext_sens_1_en;
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -6290,22 +6113,22 @@
*/
int32_t lsm6dso_sh_batch_slave_2_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_slv2_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
-
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.batch_ext_sens_2_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv2_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.batch_ext_sens_2_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -6318,19 +6141,19 @@
*/
int32_t lsm6dso_sh_batch_slave_2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_slv2_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.batch_ext_sens_2_en;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv2_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.batch_ext_sens_2_en;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -6343,22 +6166,22 @@
*/
int32_t lsm6dso_sh_batch_slave_3_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_slv3_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.batch_ext_sens_3_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv3_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.batch_ext_sens_3_en = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -6371,19 +6194,19 @@
*/
int32_t lsm6dso_sh_batch_slave_3_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_slv3_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.batch_ext_sens_3_en;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv3_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.batch_ext_sens_3_en;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -6408,16 +6231,16 @@
*/
int32_t lsm6dso_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t val)
{
- lsm6dso_ctrl6_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_mode = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl6_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_mode = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -6429,32 +6252,32 @@
*/
int32_t lsm6dso_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t *val)
{
- lsm6dso_ctrl6_c_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t *)®, 1);
-
- switch (reg.den_mode) {
- case LSM6DSO_DEN_DISABLE:
- *val = LSM6DSO_DEN_DISABLE;
- break;
- case LSM6DSO_LEVEL_FIFO:
- *val = LSM6DSO_LEVEL_FIFO;
- break;
- case LSM6DSO_LEVEL_LETCHED:
- *val = LSM6DSO_LEVEL_LETCHED;
- break;
- case LSM6DSO_LEVEL_TRIGGER:
- *val = LSM6DSO_LEVEL_TRIGGER;
- break;
- case LSM6DSO_EDGE_TRIGGER:
- *val = LSM6DSO_EDGE_TRIGGER;
- break;
- default:
- *val = LSM6DSO_DEN_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_ctrl6_c_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)®, 1);
+
+ switch (reg.den_mode) {
+ case LSM6DSO_DEN_DISABLE:
+ *val = LSM6DSO_DEN_DISABLE;
+ break;
+ case LSM6DSO_LEVEL_FIFO:
+ *val = LSM6DSO_LEVEL_FIFO;
+ break;
+ case LSM6DSO_LEVEL_LETCHED:
+ *val = LSM6DSO_LEVEL_LETCHED;
+ break;
+ case LSM6DSO_LEVEL_TRIGGER:
+ *val = LSM6DSO_LEVEL_TRIGGER;
+ break;
+ case LSM6DSO_EDGE_TRIGGER:
+ *val = LSM6DSO_EDGE_TRIGGER;
+ break;
+ default:
+ *val = LSM6DSO_DEN_DISABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -6466,16 +6289,16 @@
*/
int32_t lsm6dso_den_polarity_set(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_lh = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_lh = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -6487,23 +6310,23 @@
*/
int32_t lsm6dso_den_polarity_get(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t *val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
-
- switch (reg.den_lh) {
- case LSM6DSO_DEN_ACT_LOW:
- *val = LSM6DSO_DEN_ACT_LOW;
- break;
- case LSM6DSO_DEN_ACT_HIGH:
- *val = LSM6DSO_DEN_ACT_HIGH;
- break;
- default:
- *val = LSM6DSO_DEN_ACT_LOW;
- break;
- }
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+
+ switch (reg.den_lh) {
+ case LSM6DSO_DEN_ACT_LOW:
+ *val = LSM6DSO_DEN_ACT_LOW;
+ break;
+ case LSM6DSO_DEN_ACT_HIGH:
+ *val = LSM6DSO_DEN_ACT_HIGH;
+ break;
+ default:
+ *val = LSM6DSO_DEN_ACT_LOW;
+ break;
+ }
+ return ret;
}
/**
@@ -6515,16 +6338,16 @@
*/
int32_t lsm6dso_den_enable_set(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_xl_g = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_xl_g = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -6536,26 +6359,26 @@
*/
int32_t lsm6dso_den_enable_get(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t *val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
-
- switch (reg.den_xl_g) {
- case LSM6DSO_STAMP_IN_GY_DATA:
- *val = LSM6DSO_STAMP_IN_GY_DATA;
- break;
- case LSM6DSO_STAMP_IN_XL_DATA:
- *val = LSM6DSO_STAMP_IN_XL_DATA;
- break;
- case LSM6DSO_STAMP_IN_GY_XL_DATA:
- *val = LSM6DSO_STAMP_IN_GY_XL_DATA;
- break;
- default:
- *val = LSM6DSO_STAMP_IN_GY_DATA;
- break;
- }
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+
+ switch (reg.den_xl_g) {
+ case LSM6DSO_STAMP_IN_GY_DATA:
+ *val = LSM6DSO_STAMP_IN_GY_DATA;
+ break;
+ case LSM6DSO_STAMP_IN_XL_DATA:
+ *val = LSM6DSO_STAMP_IN_XL_DATA;
+ break;
+ case LSM6DSO_STAMP_IN_GY_XL_DATA:
+ *val = LSM6DSO_STAMP_IN_GY_XL_DATA;
+ break;
+ default:
+ *val = LSM6DSO_STAMP_IN_GY_DATA;
+ break;
+ }
+ return ret;
}
/**
@@ -6567,16 +6390,16 @@
*/
int32_t lsm6dso_den_mark_axis_x_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_z = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_z = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -6588,13 +6411,13 @@
*/
int32_t lsm6dso_den_mark_axis_x_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- *val = reg.den_z;
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ *val = reg.den_z;
+
+ return ret;
}
/**
@@ -6606,16 +6429,16 @@
*/
int32_t lsm6dso_den_mark_axis_y_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_y = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_y = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -6627,13 +6450,13 @@
*/
int32_t lsm6dso_den_mark_axis_y_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- *val = reg.den_y;
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ *val = reg.den_y;
+
+ return ret;
}
/**
@@ -6645,16 +6468,16 @@
*/
int32_t lsm6dso_den_mark_axis_z_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- if (ret == 0) {
- reg.den_x = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- }
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ if (ret == 0) {
+ reg.den_x = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ }
+
+ return ret;
}
/**
@@ -6666,13 +6489,13 @@
*/
int32_t lsm6dso_den_mark_axis_z_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_ctrl9_xl_t reg;
- int32_t ret;
-
- ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t *)®, 1);
- *val = reg.den_x;
-
- return ret;
+ lsm6dso_ctrl9_xl_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL, (uint8_t*)®, 1);
+ *val = reg.den_x;
+
+ return ret;
}
/**
@@ -6696,45 +6519,19 @@
*/
int32_t lsm6dso_pedo_sens_set(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t val)
{
- lsm6dso_emb_func_en_a_t emb_func_en_a;
- lsm6dso_emb_func_en_b_t emb_func_en_b;
- lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
- (uint8_t *)&pedo_cmd_reg);
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
- (uint8_t *)&emb_func_en_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
- (uint8_t *)&emb_func_en_b, 1);
-
- emb_func_en_a.pedo_en = (uint8_t)val & 0x01U;
- emb_func_en_b.pedo_adv_en = ((uint8_t)val & 0x02U) >> 1;
- pedo_cmd_reg.fp_rejection_en = ((uint8_t)val & 0x10U) >> 4;
- pedo_cmd_reg.ad_det_en = ((uint8_t)val & 0x20U) >> 5;
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
- (uint8_t *)&emb_func_en_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
- (uint8_t *)&emb_func_en_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
- (uint8_t *)&pedo_cmd_reg);
- }
- return ret;
+ lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+ (uint8_t*)&pedo_cmd_reg);
+
+ if (ret == 0) {
+ pedo_cmd_reg.fp_rejection_en = ((uint8_t)val & 0x10U)>>4;
+ pedo_cmd_reg.ad_det_en = ((uint8_t)val & 0x20U)>>5;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+ (uint8_t*)&pedo_cmd_reg);
+ }
+ return ret;
}
/**
@@ -6746,49 +6543,26 @@
*/
int32_t lsm6dso_pedo_sens_get(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t *val)
{
- lsm6dso_emb_func_en_a_t emb_func_en_a;
- lsm6dso_emb_func_en_b_t emb_func_en_b;
- lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
- (uint8_t *)&pedo_cmd_reg);
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
- (uint8_t *)&emb_func_en_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
- (uint8_t *)&emb_func_en_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- switch ((pedo_cmd_reg.ad_det_en << 5) | (pedo_cmd_reg.fp_rejection_en << 4) |
- (emb_func_en_b.pedo_adv_en << 1) | emb_func_en_a.pedo_en) {
- case LSM6DSO_PEDO_DISABLE:
- *val = LSM6DSO_PEDO_DISABLE;
- break;
- case LSM6DSO_PEDO_BASE_MODE:
- *val = LSM6DSO_PEDO_BASE_MODE;
- break;
- case LSM6DSO_PEDO_ADV_MODE:
- *val = LSM6DSO_PEDO_ADV_MODE;
- break;
- case LSM6DSO_FALSE_STEP_REJ:
- *val = LSM6DSO_FALSE_STEP_REJ;
- break;
- case LSM6DSO_FALSE_STEP_REJ_ADV_MODE:
- *val = LSM6DSO_FALSE_STEP_REJ_ADV_MODE;
- break;
- default:
- *val = LSM6DSO_PEDO_DISABLE;
- break;
- }
- return ret;
+ lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+ (uint8_t*)&pedo_cmd_reg);
+ switch ( (pedo_cmd_reg.ad_det_en <<5) | (pedo_cmd_reg.fp_rejection_en << 4) ) {
+ case LSM6DSO_PEDO_BASE_MODE:
+ *val = LSM6DSO_PEDO_BASE_MODE;
+ break;
+ case LSM6DSO_FALSE_STEP_REJ:
+ *val = LSM6DSO_FALSE_STEP_REJ;
+ break;
+ case LSM6DSO_FALSE_STEP_REJ_ADV_MODE:
+ *val = LSM6DSO_FALSE_STEP_REJ_ADV_MODE;
+ break;
+ default:
+ *val = LSM6DSO_PEDO_BASE_MODE;
+ break;
+ }
+ return ret;
}
/**
@@ -6800,19 +6574,19 @@
*/
int32_t lsm6dso_pedo_step_detect_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_status_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.is_step_det;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_status_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.is_step_det;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -6824,9 +6598,9 @@
*/
int32_t lsm6dso_pedo_debounce_steps_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF, buff);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF, buff);
+ return ret;
}
/**
@@ -6838,9 +6612,9 @@
*/
int32_t lsm6dso_pedo_debounce_steps_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF, buff);
- return ret;
+ int32_t ret;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_DEB_STEPS_CONF, buff);
+ return ret;
}
/**
@@ -6852,17 +6626,17 @@
*/
int32_t lsm6dso_pedo_steps_period_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L, &buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
- &buff[index]);
- }
- return ret;
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L, &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
+ &buff[index]);
+ }
+ return ret;
}
/**
@@ -6874,17 +6648,17 @@
*/
int32_t lsm6dso_pedo_steps_period_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L, &buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
- &buff[index]);
- }
- return ret;
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_L, &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_SC_DELTAT_H,
+ &buff[index]);
+ }
+ return ret;
}
/**
@@ -6898,16 +6672,16 @@
int32_t lsm6dso_pedo_int_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_carry_count_en_t val)
{
- lsm6dso_pedo_cmd_reg_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG, (uint8_t *)®);
- if (ret == 0) {
- reg.carry_count_en = (uint8_t)val;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
- (uint8_t *)®);
- }
- return ret;
+ lsm6dso_pedo_cmd_reg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG, (uint8_t*)®);
+ if (ret == 0) {
+ reg.carry_count_en = (uint8_t)val;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_PEDO_CMD_REG,
+ (uint8_t*)®);
+ }
+ return ret;
}
/**
@@ -6921,22 +6695,22 @@
int32_t lsm6dso_pedo_int_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_carry_count_en_t *val)
{
- lsm6dso_pedo_cmd_reg_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG, (uint8_t *)®);
- switch (reg.carry_count_en) {
- case LSM6DSO_EVERY_STEP:
- *val = LSM6DSO_EVERY_STEP;
- break;
- case LSM6DSO_COUNT_OVERFLOW:
- *val = LSM6DSO_COUNT_OVERFLOW;
- break;
- default:
- *val = LSM6DSO_EVERY_STEP;
- break;
- }
- return ret;
+ lsm6dso_pedo_cmd_reg_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_PEDO_CMD_REG, (uint8_t*)®);
+ switch (reg.carry_count_en) {
+ case LSM6DSO_EVERY_STEP:
+ *val = LSM6DSO_EVERY_STEP;
+ break;
+ case LSM6DSO_COUNT_OVERFLOW:
+ *val = LSM6DSO_COUNT_OVERFLOW;
+ break;
+ default:
+ *val = LSM6DSO_EVERY_STEP;
+ break;
+ }
+ return ret;
}
/**
@@ -6953,55 +6727,6 @@
*/
/**
- * @brief Enable significant motion detection function.[set]
- *
- * @param ctx read / write interface definitions
- * @param val change the values of sign_motion_en in reg EMB_FUNC_EN_A
- *
- */
-int32_t lsm6dso_motion_sens_set(lsm6dso_ctx_t *ctx, uint8_t val)
-{
- lsm6dso_emb_func_en_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.sign_motion_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
-}
-
-/**
- * @brief Enable significant motion detection function.[get]
- *
- * @param ctx read / write interface definitions
- * @param val change the values of sign_motion_en in reg EMB_FUNC_EN_A
- *
- */
-int32_t lsm6dso_motion_sens_get(lsm6dso_ctx_t *ctx, uint8_t *val)
-{
- lsm6dso_emb_func_en_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.sign_motion_en;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
-}
-
-/**
* @brief Interrupt status bit for significant motion detection.[get]
*
* @param ctx read / write interface definitions
@@ -7010,19 +6735,19 @@
*/
int32_t lsm6dso_motion_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_status_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.is_sigmot;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_status_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.is_sigmot;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7039,56 +6764,6 @@
*/
/**
- * @brief Enable tilt calculation.[set]
- *
- * @param ctx read / write interface definitions
- * @param val change the values of tilt_en in reg EMB_FUNC_EN_A
- *
- */
-int32_t lsm6dso_tilt_sens_set(lsm6dso_ctx_t *ctx, uint8_t val)
-{
- lsm6dso_emb_func_en_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.tilt_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
-}
-
-/**
- * @brief Enable tilt calculation.[get]
- *
- * @param ctx read / write interface definitions
- * @param val change the values of tilt_en in reg EMB_FUNC_EN_A
- *
- */
-int32_t lsm6dso_tilt_sens_get(lsm6dso_ctx_t *ctx, uint8_t *val)
-{
- lsm6dso_emb_func_en_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.tilt_en;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
-}
-
-/**
* @brief Interrupt status bit for tilt detection.[get]
*
* @param ctx read / write interface definitions
@@ -7097,19 +6772,19 @@
*/
int32_t lsm6dso_tilt_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_status_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.is_tilt;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_status_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.is_tilt;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7134,19 +6809,19 @@
*/
int32_t lsm6dso_mag_sensitivity_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
+ &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
&buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
- &buff[index]);
- }
-
- return ret;
+ }
+
+ return ret;
}
/**
@@ -7158,19 +6833,19 @@
*/
int32_t lsm6dso_mag_sensitivity_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_L,
+ &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
&buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SENSITIVITY_H,
- &buff[index]);
- }
-
- return ret;
+ }
+
+ return ret;
}
/**
@@ -7182,34 +6857,34 @@
*/
int32_t lsm6dso_mag_offset_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[index]);
- }
-
- return ret;
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[index]);
+ }
+
+ return ret;
}
/**
@@ -7221,34 +6896,34 @@
*/
int32_t lsm6dso_mag_offset_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[index]);
- }
- return ret;
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_L, &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFX_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFY_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_OFFZ_H, &buff[index]);
+ }
+ return ret;
}
/**
@@ -7266,62 +6941,62 @@
*/
int32_t lsm6dso_mag_soft_iron_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_L, &buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_H, &buff[index]);
- }
-
- return ret;
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_L, &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XX_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XY_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_XZ_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YY_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_YZ_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_SI_ZZ_H, &buff[index]);
+ }
+
+ return ret;
}
/**
@@ -7340,62 +7015,62 @@
*/
int32_t lsm6dso_mag_soft_iron_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- uint8_t index;
-
- index = 0x00U;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_L, &buff[index]);
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_H, &buff[index]);
- }
- if (ret == 0) {
- index++;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_L, &buff[index]);
- }
- if (ret == 0) {
- index++;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_H, &buff[index]);
- }
-
- return ret;
+ int32_t ret;
+ uint8_t index;
+
+ index = 0x00U;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_L, &buff[index]);
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XX_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XY_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_XZ_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YY_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_YZ_H, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_L, &buff[index]);
+ }
+ if (ret == 0) {
+ index++;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_SI_ZZ_H, &buff[index]);
+ }
+
+ return ret;
}
/**
@@ -7410,16 +7085,16 @@
*/
int32_t lsm6dso_mag_z_orient_set(lsm6dso_ctx_t *ctx, lsm6dso_mag_z_axis_t val)
{
- lsm6dso_mag_cfg_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t *)®);
- if (ret == 0) {
- reg.mag_z_axis = (uint8_t) val;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t *)®);
- }
-
- return ret;
+ lsm6dso_mag_cfg_a_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t*)®);
+ if (ret == 0) {
+ reg.mag_z_axis = (uint8_t) val;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t*)®);
+ }
+
+ return ret;
}
/**
@@ -7435,33 +7110,33 @@
int32_t lsm6dso_mag_z_orient_get(lsm6dso_ctx_t *ctx,
lsm6dso_mag_z_axis_t *val)
{
- lsm6dso_mag_cfg_a_t reg;
- int32_t ret;
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t *)®);
- switch (reg.mag_z_axis) {
- case LSM6DSO_Z_EQ_Y:
- *val = LSM6DSO_Z_EQ_Y;
- break;
- case LSM6DSO_Z_EQ_MIN_Y:
- *val = LSM6DSO_Z_EQ_MIN_Y;
- break;
- case LSM6DSO_Z_EQ_X:
- *val = LSM6DSO_Z_EQ_X;
- break;
- case LSM6DSO_Z_EQ_MIN_X:
- *val = LSM6DSO_Z_EQ_MIN_X;
- break;
- case LSM6DSO_Z_EQ_MIN_Z:
- *val = LSM6DSO_Z_EQ_MIN_Z;
- break;
- case LSM6DSO_Z_EQ_Z:
- *val = LSM6DSO_Z_EQ_Z;
- break;
- default:
- *val = LSM6DSO_Z_EQ_Y;
- break;
- }
- return ret;
+ lsm6dso_mag_cfg_a_t reg;
+ int32_t ret;
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t*)®);
+ switch (reg.mag_z_axis) {
+ case LSM6DSO_Z_EQ_Y:
+ *val = LSM6DSO_Z_EQ_Y;
+ break;
+ case LSM6DSO_Z_EQ_MIN_Y:
+ *val = LSM6DSO_Z_EQ_MIN_Y;
+ break;
+ case LSM6DSO_Z_EQ_X:
+ *val = LSM6DSO_Z_EQ_X;
+ break;
+ case LSM6DSO_Z_EQ_MIN_X:
+ *val = LSM6DSO_Z_EQ_MIN_X;
+ break;
+ case LSM6DSO_Z_EQ_MIN_Z:
+ *val = LSM6DSO_Z_EQ_MIN_Z;
+ break;
+ case LSM6DSO_Z_EQ_Z:
+ *val = LSM6DSO_Z_EQ_Z;
+ break;
+ default:
+ *val = LSM6DSO_Z_EQ_Y;
+ break;
+ }
+ return ret;
}
/**
@@ -7477,15 +7152,15 @@
int32_t lsm6dso_mag_y_orient_set(lsm6dso_ctx_t *ctx,
lsm6dso_mag_y_axis_t val)
{
- lsm6dso_mag_cfg_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t *)®);
- if (ret == 0) {
- reg.mag_y_axis = (uint8_t)val;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t *) ®);
- }
- return ret;
+ lsm6dso_mag_cfg_a_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t*)®);
+ if (ret == 0) {
+ reg.mag_y_axis = (uint8_t)val;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_A,(uint8_t*) ®);
+ }
+ return ret;
}
/**
@@ -7501,34 +7176,34 @@
int32_t lsm6dso_mag_y_orient_get(lsm6dso_ctx_t *ctx,
lsm6dso_mag_y_axis_t *val)
{
- lsm6dso_mag_cfg_a_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t *)®);
- switch (reg.mag_y_axis) {
- case LSM6DSO_Y_EQ_Y:
- *val = LSM6DSO_Y_EQ_Y;
- break;
- case LSM6DSO_Y_EQ_MIN_Y:
- *val = LSM6DSO_Y_EQ_MIN_Y;
- break;
- case LSM6DSO_Y_EQ_X:
- *val = LSM6DSO_Y_EQ_X;
- break;
- case LSM6DSO_Y_EQ_MIN_X:
- *val = LSM6DSO_Y_EQ_MIN_X;
- break;
- case LSM6DSO_Y_EQ_MIN_Z:
- *val = LSM6DSO_Y_EQ_MIN_Z;
- break;
- case LSM6DSO_Y_EQ_Z:
- *val = LSM6DSO_Y_EQ_Z;
- break;
- default:
- *val = LSM6DSO_Y_EQ_Y;
- break;
- }
- return ret;
+ lsm6dso_mag_cfg_a_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_A, (uint8_t*)®);
+ switch (reg.mag_y_axis) {
+ case LSM6DSO_Y_EQ_Y:
+ *val = LSM6DSO_Y_EQ_Y;
+ break;
+ case LSM6DSO_Y_EQ_MIN_Y:
+ *val = LSM6DSO_Y_EQ_MIN_Y;
+ break;
+ case LSM6DSO_Y_EQ_X:
+ *val = LSM6DSO_Y_EQ_X;
+ break;
+ case LSM6DSO_Y_EQ_MIN_X:
+ *val = LSM6DSO_Y_EQ_MIN_X;
+ break;
+ case LSM6DSO_Y_EQ_MIN_Z:
+ *val = LSM6DSO_Y_EQ_MIN_Z;
+ break;
+ case LSM6DSO_Y_EQ_Z:
+ *val = LSM6DSO_Y_EQ_Z;
+ break;
+ default:
+ *val = LSM6DSO_Y_EQ_Y;
+ break;
+ }
+ return ret;
}
/**
@@ -7544,15 +7219,15 @@
int32_t lsm6dso_mag_x_orient_set(lsm6dso_ctx_t *ctx,
lsm6dso_mag_x_axis_t val)
{
- lsm6dso_mag_cfg_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B, (uint8_t *)®);
- if (ret == 0) {
- reg.mag_x_axis = (uint8_t)val;
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_B, (uint8_t *)®);
- }
- return ret;
+ lsm6dso_mag_cfg_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B, (uint8_t*)®);
+ if (ret == 0) {
+ reg.mag_x_axis = (uint8_t)val;
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_MAG_CFG_B, (uint8_t*)®);
+ }
+ return ret;
}
/**
@@ -7568,34 +7243,34 @@
int32_t lsm6dso_mag_x_orient_get(lsm6dso_ctx_t *ctx,
lsm6dso_mag_x_axis_t *val)
{
- lsm6dso_mag_cfg_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B, (uint8_t *)®);
- switch (reg.mag_x_axis) {
- case LSM6DSO_X_EQ_Y:
- *val = LSM6DSO_X_EQ_Y;
- break;
- case LSM6DSO_X_EQ_MIN_Y:
- *val = LSM6DSO_X_EQ_MIN_Y;
- break;
- case LSM6DSO_X_EQ_X:
- *val = LSM6DSO_X_EQ_X;
- break;
- case LSM6DSO_X_EQ_MIN_X:
- *val = LSM6DSO_X_EQ_MIN_X;
- break;
- case LSM6DSO_X_EQ_MIN_Z:
- *val = LSM6DSO_X_EQ_MIN_Z;
- break;
- case LSM6DSO_X_EQ_Z:
- *val = LSM6DSO_X_EQ_Z;
- break;
- default:
- *val = LSM6DSO_X_EQ_Y;
- break;
- }
- return ret;
+ lsm6dso_mag_cfg_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_MAG_CFG_B, (uint8_t*)®);
+ switch (reg.mag_x_axis) {
+ case LSM6DSO_X_EQ_Y:
+ *val = LSM6DSO_X_EQ_Y;
+ break;
+ case LSM6DSO_X_EQ_MIN_Y:
+ *val = LSM6DSO_X_EQ_MIN_Y;
+ break;
+ case LSM6DSO_X_EQ_X:
+ *val = LSM6DSO_X_EQ_X;
+ break;
+ case LSM6DSO_X_EQ_MIN_X:
+ *val = LSM6DSO_X_EQ_MIN_X;
+ break;
+ case LSM6DSO_X_EQ_MIN_Z:
+ *val = LSM6DSO_X_EQ_MIN_Z;
+ break;
+ case LSM6DSO_X_EQ_Z:
+ *val = LSM6DSO_X_EQ_Z;
+ break;
+ default:
+ *val = LSM6DSO_X_EQ_Y;
+ break;
+ }
+ return ret;
}
/**
@@ -7604,7 +7279,7 @@
*/
/**
- * @defgroup LSM6DSO_significant_motion
+ * @defgroup LSM6DSO_finite_state_machine
* @brief This section groups all the functions that manage the
* state_machine.
* @{
@@ -7621,71 +7296,18 @@
*/
int32_t lsm6dso_long_cnt_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_status_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.is_fsm_lc;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
-}
-
-/**
- * @brief Final State Machine global enable.[set]
- *
- * @param ctx read / write interface definitions
- * @param val change the values of fsm_en in reg EMB_FUNC_EN_B
- *
- */
-int32_t lsm6dso_emb_fsm_en_set(lsm6dso_ctx_t *ctx, uint8_t val)
-{
- int32_t ret;
- lsm6dso_emb_func_en_b_t reg;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.fsm_en = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
-}
-
-/**
- * @brief Final State Machine global enable.[get]
- *
- * @param ctx read / write interface definitions
- * @param uint8_t *: return the values of fsm_en in reg EMB_FUNC_EN_B
- *
- */
-int32_t lsm6dso_emb_fsm_en_get(lsm6dso_ctx_t *ctx, uint8_t *val)
-{
- int32_t ret;
- lsm6dso_emb_func_en_b_t reg;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.fsm_en;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_status_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.is_fsm_lc;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -7698,51 +7320,22 @@
int32_t lsm6dso_fsm_enable_set(lsm6dso_ctx_t *ctx,
lsm6dso_emb_fsm_enable_t *val)
{
- int32_t ret;
- lsm6dso_emb_func_en_b_t reg;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_A,
- (uint8_t *)&val->fsm_enable_a, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_B,
- (uint8_t *)&val->fsm_enable_b, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- if ((val->fsm_enable_a.fsm1_en |
- val->fsm_enable_a.fsm2_en |
- val->fsm_enable_a.fsm3_en |
- val->fsm_enable_a.fsm4_en |
- val->fsm_enable_a.fsm5_en |
- val->fsm_enable_a.fsm6_en |
- val->fsm_enable_a.fsm7_en |
- val->fsm_enable_a.fsm8_en |
- val->fsm_enable_b.fsm9_en |
- val->fsm_enable_b.fsm10_en |
- val->fsm_enable_b.fsm11_en |
- val->fsm_enable_b.fsm12_en |
- val->fsm_enable_b.fsm13_en |
- val->fsm_enable_b.fsm14_en |
- val->fsm_enable_b.fsm15_en |
- val->fsm_enable_b.fsm16_en)
- != PROPERTY_DISABLE) {
- reg.fsm_en = PROPERTY_ENABLE;
- } else {
- reg.fsm_en = PROPERTY_DISABLE;
- }
-
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_A,
+ (uint8_t*)&val->fsm_enable_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_ENABLE_B,
+ (uint8_t*)&val->fsm_enable_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7755,16 +7348,16 @@
int32_t lsm6dso_fsm_enable_get(lsm6dso_ctx_t *ctx,
lsm6dso_emb_fsm_enable_t *val)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, (uint8_t *) val, 2);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, (uint8_t*) val, 2);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -7777,17 +7370,17 @@
*/
int32_t lsm6dso_long_cnt_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7800,17 +7393,17 @@
*/
int32_t lsm6dso_long_cnt_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_L, buff, 2);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7823,23 +7416,23 @@
*/
int32_t lsm6dso_long_clr_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t val)
{
- lsm6dso_fsm_long_counter_clear_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
- (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg. fsm_lc_clr = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
- (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_fsm_long_counter_clear_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg. fsm_lc_clr = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -7852,36 +7445,36 @@
*/
int32_t lsm6dso_long_clr_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t *val)
{
- lsm6dso_fsm_long_counter_clear_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
- (uint8_t *)®, 1);
+ lsm6dso_fsm_long_counter_clear_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_LONG_COUNTER_CLEAR,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.fsm_lc_clr) {
+ case LSM6DSO_LC_NORMAL:
+ *val = LSM6DSO_LC_NORMAL;
+ break;
+ case LSM6DSO_LC_CLEAR:
+ *val = LSM6DSO_LC_CLEAR;
+ break;
+ case LSM6DSO_LC_CLEAR_DONE:
+ *val = LSM6DSO_LC_CLEAR_DONE;
+ break;
+ default:
+ *val = LSM6DSO_LC_NORMAL;
+ break;
}
- if (ret == 0) {
- switch (reg.fsm_lc_clr) {
- case LSM6DSO_LC_NORMAL:
- *val = LSM6DSO_LC_NORMAL;
- break;
- case LSM6DSO_LC_CLEAR:
- *val = LSM6DSO_LC_CLEAR;
- break;
- case LSM6DSO_LC_CLEAR_DONE:
- *val = LSM6DSO_LC_CLEAR_DONE;
- break;
- default:
- *val = LSM6DSO_LC_NORMAL;
- break;
- }
- }
-
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7893,17 +7486,17 @@
*/
int32_t lsm6dso_fsm_out_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_out_t *val)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_OUTS1, (uint8_t *)val, 16);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_OUTS1, (uint8_t*)val, 16);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7915,25 +7508,25 @@
*/
int32_t lsm6dso_fsm_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t val)
{
- lsm6dso_emb_func_odr_cfg_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
- (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.not_used_01 = 3; /* set default values */
- reg.not_used_02 = 2; /* set default values */
- reg.fsm_odr = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
- (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_emb_func_odr_cfg_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.not_used_01 = 3; /* set default values */
+ reg.not_used_02 = 2; /* set default values */
+ reg.fsm_odr = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -7945,36 +7538,36 @@
*/
int32_t lsm6dso_fsm_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t *val)
{
- lsm6dso_emb_func_odr_cfg_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
- (uint8_t *)®, 1);
+ lsm6dso_emb_func_odr_cfg_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B,
+ (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.fsm_odr) {
+ case LSM6DSO_ODR_FSM_12Hz5:
+ *val = LSM6DSO_ODR_FSM_12Hz5;
+ break;
+ case LSM6DSO_ODR_FSM_26Hz:
+ *val = LSM6DSO_ODR_FSM_26Hz;
+ break;
+ case LSM6DSO_ODR_FSM_52Hz:
+ *val = LSM6DSO_ODR_FSM_52Hz;
+ break;
+ case LSM6DSO_ODR_FSM_104Hz:
+ *val = LSM6DSO_ODR_FSM_104Hz;
+ break;
+ default:
+ *val = LSM6DSO_ODR_FSM_12Hz5;
+ break;
}
- if (ret == 0) {
- switch (reg.fsm_odr) {
- case LSM6DSO_ODR_FSM_12Hz5:
- *val = LSM6DSO_ODR_FSM_12Hz5;
- break;
- case LSM6DSO_ODR_FSM_26Hz:
- *val = LSM6DSO_ODR_FSM_26Hz;
- break;
- case LSM6DSO_ODR_FSM_52Hz:
- *val = LSM6DSO_ODR_FSM_52Hz;
- break;
- case LSM6DSO_ODR_FSM_104Hz:
- *val = LSM6DSO_ODR_FSM_104Hz;
- break;
- default:
- *val = LSM6DSO_ODR_FSM_12Hz5;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -7986,22 +7579,22 @@
*/
int32_t lsm6dso_fsm_init_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_emb_func_init_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.fsm_init = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_emb_func_init_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.fsm_init = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8013,18 +7606,18 @@
*/
int32_t lsm6dso_fsm_init_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_emb_func_init_b_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.fsm_init;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_emb_func_init_b_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.fsm_init;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8039,19 +7632,19 @@
*/
int32_t lsm6dso_long_cnt_int_value_set(lsm6dso_ctx_t *ctx, uint16_t val)
{
- int32_t ret;
- uint8_t add_l;
- uint8_t add_h;
-
- add_h = (uint8_t)((val & 0xFF00U) >> 8);
- add_l = (uint8_t)(val & 0x00FFU);
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L, &add_l);
- if (ret == 0) {
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H, &add_h);
- }
-
- return ret;
+ int32_t ret;
+ uint8_t add_l;
+ uint8_t add_h;
+
+ add_h = (uint8_t)( ( val & 0xFF00U ) >> 8 );
+ add_l = (uint8_t)( val & 0x00FFU );
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L, &add_l);
+ if (ret == 0) {
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H, &add_h);
+ }
+
+ return ret;
}
/**
@@ -8066,19 +7659,19 @@
*/
int32_t lsm6dso_long_cnt_int_value_get(lsm6dso_ctx_t *ctx, uint16_t *val)
{
- int32_t ret;
- uint8_t add_l;
- uint8_t add_h;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L, &add_l);
- if (ret == 0) {
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H, &add_h);
- *val = add_h;
- *val = *val << 8;
- *val += add_l;
- }
-
- return ret;
+ int32_t ret;
+ uint8_t add_l;
+ uint8_t add_h;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_L, &add_l);
+ if (ret == 0) {
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_LC_TIMEOUT_H, &add_h);
+ *val = add_h;
+ *val = *val << 8;
+ *val += add_l;
+ }
+
+ return ret;
}
/**
@@ -8090,11 +7683,11 @@
*/
int32_t lsm6dso_fsm_number_of_programs_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- int32_t ret;
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_PROGRAMS, &val);
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_PROGRAMS, &val);
+
+ return ret;
}
/**
@@ -8106,11 +7699,11 @@
*/
int32_t lsm6dso_fsm_number_of_programs_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- int32_t ret;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_PROGRAMS, val);
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_PROGRAMS, val);
+
+ return ret;
}
/**
@@ -8123,18 +7716,18 @@
*/
int32_t lsm6dso_fsm_start_address_set(lsm6dso_ctx_t *ctx, uint16_t val)
{
- int32_t ret;
- uint8_t add_l;
- uint8_t add_h;
-
- add_h = (uint8_t)((val & 0xFF00U) >> 8);
- add_l = (uint8_t)(val & 0x00FFU);
-
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_L, &add_l);
- if (ret == 0) {
- ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_H, &add_h);
- }
- return ret;
+ int32_t ret;
+ uint8_t add_l;
+ uint8_t add_h;
+
+ add_h = (uint8_t)( ( val & 0xFF00U ) >> 8 );
+ add_l = (uint8_t)( val & 0x00FFU );
+
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_L, &add_l);
+ if (ret == 0) {
+ ret = lsm6dso_ln_pg_write_byte(ctx, LSM6DSO_FSM_START_ADD_H, &add_h);
+ }
+ return ret;
}
/**
@@ -8147,18 +7740,18 @@
*/
int32_t lsm6dso_fsm_start_address_get(lsm6dso_ctx_t *ctx, uint16_t *val)
{
- int32_t ret;
- uint8_t add_l;
- uint8_t add_h;
-
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_L, &add_l);
- if (ret == 0) {
- ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_H, &add_h);
- *val = add_h;
- *val = *val << 8;
- *val += add_l;
- }
- return ret;
+ int32_t ret;
+ uint8_t add_l;
+ uint8_t add_h;
+
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_L, &add_l);
+ if (ret == 0) {
+ ret = lsm6dso_ln_pg_read_byte(ctx, LSM6DSO_FSM_START_ADD_H, &add_h);
+ *val = add_h;
+ *val = *val << 8;
+ *val += add_l;
+ }
+ return ret;
}
/**
@@ -8185,17 +7778,17 @@
int32_t lsm6dso_sh_read_data_raw_get(lsm6dso_ctx_t *ctx, uint8_t *val,
uint8_t len)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SENSOR_HUB_1, (uint8_t *) val, len);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SENSOR_HUB_1, (uint8_t*) val, len);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8208,21 +7801,21 @@
int32_t lsm6dso_sh_slave_connected_set(lsm6dso_ctx_t *ctx,
lsm6dso_aux_sens_on_t val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.aux_sens_on = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.aux_sens_on = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8235,35 +7828,35 @@
int32_t lsm6dso_sh_slave_connected_get(lsm6dso_ctx_t *ctx,
lsm6dso_aux_sens_on_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.aux_sens_on) {
+ case LSM6DSO_SLV_0:
+ *val = LSM6DSO_SLV_0;
+ break;
+ case LSM6DSO_SLV_0_1:
+ *val = LSM6DSO_SLV_0_1;
+ break;
+ case LSM6DSO_SLV_0_1_2:
+ *val = LSM6DSO_SLV_0_1_2;
+ break;
+ case LSM6DSO_SLV_0_1_2_3:
+ *val = LSM6DSO_SLV_0_1_2_3;
+ break;
+ default:
+ *val = LSM6DSO_SLV_0;
+ break;
}
- if (ret == 0) {
- switch (reg.aux_sens_on) {
- case LSM6DSO_SLV_0:
- *val = LSM6DSO_SLV_0;
- break;
- case LSM6DSO_SLV_0_1:
- *val = LSM6DSO_SLV_0_1;
- break;
- case LSM6DSO_SLV_0_1_2:
- *val = LSM6DSO_SLV_0_1_2;
- break;
- case LSM6DSO_SLV_0_1_2_3:
- *val = LSM6DSO_SLV_0_1_2_3;
- break;
- default:
- *val = LSM6DSO_SLV_0;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8275,21 +7868,21 @@
*/
int32_t lsm6dso_sh_master_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.master_on = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.master_on = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8301,19 +7894,19 @@
*/
int32_t lsm6dso_sh_master_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.master_on;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.master_on;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8325,22 +7918,22 @@
*/
int32_t lsm6dso_sh_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.shub_pu_en = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.shub_pu_en = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8353,29 +7946,29 @@
int32_t lsm6dso_sh_pin_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_shub_pu_en_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.shub_pu_en) {
+ case LSM6DSO_EXT_PULL_UP:
+ *val = LSM6DSO_EXT_PULL_UP;
+ break;
+ case LSM6DSO_INTERNAL_PULL_UP:
+ *val = LSM6DSO_INTERNAL_PULL_UP;
+ break;
+ default:
+ *val = LSM6DSO_EXT_PULL_UP;
+ break;
}
- if (ret == 0) {
- switch (reg.shub_pu_en) {
- case LSM6DSO_EXT_PULL_UP:
- *val = LSM6DSO_EXT_PULL_UP;
- break;
- case LSM6DSO_INTERNAL_PULL_UP:
- *val = LSM6DSO_INTERNAL_PULL_UP;
- break;
- default:
- *val = LSM6DSO_EXT_PULL_UP;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8388,22 +7981,22 @@
*/
int32_t lsm6dso_sh_pass_through_set(lsm6dso_ctx_t *ctx, uint8_t val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.pass_through_mode = val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.pass_through_mode = val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8416,19 +8009,19 @@
*/
int32_t lsm6dso_sh_pass_through_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.pass_through_mode;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.pass_through_mode;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8441,22 +8034,22 @@
int32_t lsm6dso_sh_syncro_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_start_config_t val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.start_config = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.start_config = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8469,28 +8062,28 @@
int32_t lsm6dso_sh_syncro_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_start_config_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.start_config) {
+ case LSM6DSO_EXT_ON_INT2_PIN:
+ *val = LSM6DSO_EXT_ON_INT2_PIN;
+ break;
+ case LSM6DSO_XL_GY_DRDY:
+ *val = LSM6DSO_XL_GY_DRDY;
+ break;
+ default:
+ *val = LSM6DSO_EXT_ON_INT2_PIN;
+ break;
}
- if (ret == 0) {
- switch (reg.start_config) {
- case LSM6DSO_EXT_ON_INT2_PIN:
- *val = LSM6DSO_EXT_ON_INT2_PIN;
- break;
- case LSM6DSO_XL_GY_DRDY:
- *val = LSM6DSO_XL_GY_DRDY;
- break;
- default:
- *val = LSM6DSO_EXT_ON_INT2_PIN;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8504,22 +8097,22 @@
int32_t lsm6dso_sh_write_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_write_once_t val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.write_once = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.write_once = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8533,29 +8126,29 @@
int32_t lsm6dso_sh_write_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_write_once_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.write_once) {
+ case LSM6DSO_EACH_SH_CYCLE:
+ *val = LSM6DSO_EACH_SH_CYCLE;
+ break;
+ case LSM6DSO_ONLY_FIRST_CYCLE:
+ *val = LSM6DSO_ONLY_FIRST_CYCLE;
+ break;
+ default:
+ *val = LSM6DSO_EACH_SH_CYCLE;
+ break;
}
- if (ret == 0) {
- switch (reg.write_once) {
- case LSM6DSO_EACH_SH_CYCLE:
- *val = LSM6DSO_EACH_SH_CYCLE;
- break;
- case LSM6DSO_ONLY_FIRST_CYCLE:
- *val = LSM6DSO_ONLY_FIRST_CYCLE;
- break;
- default:
- *val = LSM6DSO_EACH_SH_CYCLE;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8566,26 +8159,26 @@
*/
int32_t lsm6dso_sh_reset_set(lsm6dso_ctx_t *ctx)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.rst_master_regs = PROPERTY_ENABLE;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.rst_master_regs = PROPERTY_DISABLE;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.rst_master_regs = PROPERTY_ENABLE;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.rst_master_regs = PROPERTY_DISABLE;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8597,18 +8190,18 @@
*/
int32_t lsm6dso_sh_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
{
- lsm6dso_master_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- *val = reg.rst_master_regs;
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_master_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MASTER_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ *val = reg.rst_master_regs;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8620,22 +8213,22 @@
*/
int32_t lsm6dso_sh_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t val)
{
- lsm6dso_slv0_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- reg.shub_odr = (uint8_t)val;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv0_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ reg.shub_odr = (uint8_t)val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8648,35 +8241,35 @@
int32_t lsm6dso_sh_data_rate_get(lsm6dso_ctx_t *ctx,
lsm6dso_shub_odr_t *val)
{
- lsm6dso_slv0_config_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t *)®, 1);
+ lsm6dso_slv0_config_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ switch (reg.shub_odr) {
+ case LSM6DSO_SH_ODR_104Hz:
+ *val = LSM6DSO_SH_ODR_104Hz;
+ break;
+ case LSM6DSO_SH_ODR_52Hz:
+ *val = LSM6DSO_SH_ODR_52Hz;
+ break;
+ case LSM6DSO_SH_ODR_26Hz:
+ *val = LSM6DSO_SH_ODR_26Hz;
+ break;
+ case LSM6DSO_SH_ODR_13Hz:
+ *val = LSM6DSO_SH_ODR_13Hz;
+ break;
+ default:
+ *val = LSM6DSO_SH_ODR_104Hz;
+ break;
}
- if (ret == 0) {
- switch (reg.shub_odr) {
- case LSM6DSO_SH_ODR_104Hz:
- *val = LSM6DSO_SH_ODR_104Hz;
- break;
- case LSM6DSO_SH_ODR_52Hz:
- *val = LSM6DSO_SH_ODR_52Hz;
- break;
- case LSM6DSO_SH_ODR_26Hz:
- *val = LSM6DSO_SH_ODR_26Hz;
- break;
- case LSM6DSO_SH_ODR_13Hz:
- *val = LSM6DSO_SH_ODR_13Hz;
- break;
- default:
- *val = LSM6DSO_SH_ODR_104Hz;
- break;
- }
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8691,27 +8284,27 @@
*/
int32_t lsm6dso_sh_cfg_write(lsm6dso_ctx_t *ctx, lsm6dso_sh_cfg_write_t *val)
{
- lsm6dso_slv0_add_t reg;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- reg.slave0 = val->slv0_add;
- reg.rw_0 = 0;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)®, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
- &(val->slv0_subadd), 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_DATAWRITE_SLV0,
- &(val->slv0_data), 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv0_add_t reg;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ reg.slave0 = val->slv0_add;
+ reg.rw_0 = 0;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t*)®, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
+ &(val->slv0_subadd), 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_DATAWRITE_SLV0,
+ &(val->slv0_data), 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8727,34 +8320,34 @@
int32_t lsm6dso_sh_slv0_cfg_read(lsm6dso_ctx_t *ctx,
lsm6dso_sh_cfg_read_t *val)
{
- lsm6dso_slv0_add_t slv0_add;
- lsm6dso_slv0_config_t slv0_config;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- slv0_add.slave0 = val->slv_add;
- slv0_add.rw_0 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t *)&slv0_add, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
- &(val->slv_subadd), 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG,
- (uint8_t *)&slv0_config, 1);
- }
- if (ret == 0) {
- slv0_config.slave0_numop = val->slv_len;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG,
- (uint8_t *)&slv0_config, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv0_add_t slv0_add;
+ lsm6dso_slv0_config_t slv0_config;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ slv0_add.slave0 = val->slv_add;
+ slv0_add.rw_0 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_ADD, (uint8_t*)&slv0_add, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_SUBADD,
+ &(val->slv_subadd), 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV0_CONFIG,
+ (uint8_t*)&slv0_config, 1);
+ }
+ if (ret == 0) {
+ slv0_config.slave0_numop = val->slv_len;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV0_CONFIG,
+ (uint8_t*)&slv0_config, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8770,34 +8363,34 @@
int32_t lsm6dso_sh_slv1_cfg_read(lsm6dso_ctx_t *ctx,
lsm6dso_sh_cfg_read_t *val)
{
- lsm6dso_slv1_add_t slv1_add;
- lsm6dso_slv1_config_t slv1_config;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- slv1_add.slave1_add = val->slv_add;
- slv1_add.r_1 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_ADD, (uint8_t *)&slv1_add, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_SUBADD,
- &(val->slv_subadd), 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG,
- (uint8_t *)&slv1_config, 1);
- }
- if (ret == 0) {
- slv1_config.slave1_numop = val->slv_len;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG,
- (uint8_t *)&slv1_config, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
-
- return ret;
+ lsm6dso_slv1_add_t slv1_add;
+ lsm6dso_slv1_config_t slv1_config;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ slv1_add.slave1_add = val->slv_add;
+ slv1_add.r_1 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_ADD, (uint8_t*)&slv1_add, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_SUBADD,
+ &(val->slv_subadd), 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV1_CONFIG,
+ (uint8_t*)&slv1_config, 1);
+ }
+ if (ret == 0) {
+ slv1_config.slave1_numop = val->slv_len;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV1_CONFIG,
+ (uint8_t*)&slv1_config, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
@@ -8813,33 +8406,33 @@
int32_t lsm6dso_sh_slv2_cfg_read(lsm6dso_ctx_t *ctx,
lsm6dso_sh_cfg_read_t *val)
{
- lsm6dso_slv2_add_t slv2_add;
- lsm6dso_slv2_config_t slv2_config;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- slv2_add.slave2_add = val->slv_add;
- slv2_add.r_2 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_ADD, (uint8_t *)&slv2_add, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_SUBADD,
- &(val->slv_subadd), 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG,
- (uint8_t *)&slv2_config, 1);
- }
- if (ret == 0) {
- slv2_config.slave2_numop = val->slv_len;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG,
- (uint8_t *)&slv2_config, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv2_add_t slv2_add;
+ lsm6dso_slv2_config_t slv2_config;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ slv2_add.slave2_add = val->slv_add;
+ slv2_add.r_2 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_ADD, (uint8_t*)&slv2_add, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_SUBADD,
+ &(val->slv_subadd), 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV2_CONFIG,
+ (uint8_t*)&slv2_config, 1);
+ }
+ if (ret == 0) {
+ slv2_config.slave2_numop = val->slv_len;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV2_CONFIG,
+ (uint8_t*)&slv2_config, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8855,33 +8448,33 @@
int32_t lsm6dso_sh_slv3_cfg_read(lsm6dso_ctx_t *ctx,
lsm6dso_sh_cfg_read_t *val)
{
- lsm6dso_slv3_add_t slv3_add;
- lsm6dso_slv3_config_t slv3_config;
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
- if (ret == 0) {
- slv3_add.slave3_add = val->slv_add;
- slv3_add.r_3 = 1;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_ADD, (uint8_t *)&slv3_add, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_SUBADD,
- &(val->slv_subadd), 1);
- }
- if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG,
- (uint8_t *)&slv3_config, 1);
- }
- if (ret == 0) {
- slv3_config.slave3_numop = val->slv_len;
- ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG,
- (uint8_t *)&slv3_config, 1);
- }
- if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
- }
- return ret;
+ lsm6dso_slv3_add_t slv3_add;
+ lsm6dso_slv3_config_t slv3_config;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ slv3_add.slave3_add = val->slv_add;
+ slv3_add.r_3 = 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_ADD, (uint8_t*)&slv3_add, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_SUBADD,
+ &(val->slv_subadd), 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_SLV3_CONFIG,
+ (uint8_t*)&slv3_config, 1);
+ }
+ if (ret == 0) {
+ slv3_config.slave3_numop = val->slv_len;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_SLV3_CONFIG,
+ (uint8_t*)&slv3_config, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
}
/**
@@ -8894,17 +8487,2288 @@
int32_t lsm6dso_sh_status_get(lsm6dso_ctx_t *ctx,
lsm6dso_status_master_t *val)
{
- int32_t ret;
-
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER, (uint8_t*) val, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
+}
+
+/**
+ * @}
+ *
+ */
+
+/**
+ * @defgroup Basic configuration
+ * @brief This section groups all the functions concerning
+ * device basic configuration.
+ * @{
+ *
+ */
+
+/**
+ * @brief Device "Who am I".[get]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val ID values read from the two interfaces. ID values
+ * will be the same.(ptr)
+ *
+ */
+int32_t lsm6dso_id_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_id_t *val)
+{
+ int32_t ret = 0;
+
+ if (ctx != NULL){
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I,
+ (uint8_t*)&(val->ui), 1);
+ }
+ if (aux_ctx != NULL){
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_WHO_AM_I,
+ (uint8_t*)&(val->aux), 1);
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Re-initialize the device.[set]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val re-initialization mode. Refer to datasheet
+ * and application note for more information
+ * about differencies beetween boot and sw_reset
+ * procedure.
+ *
+ */
+int32_t lsm6dso_init_set(lsm6dso_ctx_t *ctx, lsm6dso_init_t val)
+{
+ lsm6dso_emb_func_init_a_t emb_func_init_a;
+ lsm6dso_emb_func_init_b_t emb_func_init_b;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B,
+ (uint8_t*)&emb_func_init_b, 1);
+ }
+ if (ret == 0) {
+ emb_func_init_b.fifo_compr_init = (uint8_t)val
+ & ( (uint8_t)LSM6DSO_FIFO_COMP >> 2 );
+ emb_func_init_b.fsm_init = (uint8_t)val
+ & ( (uint8_t)LSM6DSO_FSM >> 3 );
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_B,
+ (uint8_t*)&emb_func_init_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INIT_A,
+ (uint8_t*)&emb_func_init_a, 1);
+ }
+ if (ret == 0) {
+ emb_func_init_a.step_det_init = ( (uint8_t)val
+ & (uint8_t)LSM6DSO_PEDO ) >> 5;
+ emb_func_init_a.tilt_init = ( (uint8_t)val
+ & (uint8_t)LSM6DSO_TILT ) >> 6;
+ emb_func_init_a.sig_mot_init = ( (uint8_t)val
+ & (uint8_t)LSM6DSO_SMOTION ) >> 7;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INIT_A,
+ (uint8_t*)&emb_func_init_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+ if ( ( (val == LSM6DSO_BOOT) || (val == LSM6DSO_RESET) ) && (ret == 0) ) {
+ ctrl3_c.boot = (uint8_t)val & (uint8_t)LSM6DSO_BOOT;
+ ctrl3_c.sw_reset = ( (uint8_t)val & (uint8_t)LSM6DSO_RESET) >> 1;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+ if ( ( val == LSM6DSO_DRV_RDY )
+ && ( (ctrl3_c.bdu == PROPERTY_DISABLE)
+ || (ctrl3_c.if_inc == PROPERTY_DISABLE) ) && (ret == 0) ) {
+ ctrl3_c.bdu = PROPERTY_ENABLE;
+ ctrl3_c.if_inc = PROPERTY_ENABLE;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Configures the bus operating mode.[set]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val configures the bus operating mode for both the
+ * main and the auxiliary interface.
+ *
+ */
+int32_t lsm6dso_bus_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_bus_mode_t val)
+{
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ lsm6dso_ctrl9_xl_t ctrl9_xl;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ uint8_t bit_val;
+ int32_t ret;
+
+ ret = 0;
+
+ if (aux_ctx != NULL) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
+ (uint8_t*)&ctrl1_ois, 1);
+
+ bit_val = ( (uint8_t)val.aux_bus_md & 0x04U ) >> 2;
+ if ( ( ret == 0 ) && ( ctrl1_ois.sim_ois != bit_val ) ) {
+ ctrl1_ois.sim_ois = bit_val;
+ ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
+ (uint8_t*)&ctrl1_ois, 1);
+ }
+ }
+
+ if (ctx != NULL) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL,
+ (uint8_t*)&ctrl9_xl, 1);
+ }
+
+ bit_val = ((uint8_t)val.ui_bus_md & 0x04U) >> 2;
+ if ( ( ret == 0 ) && ( ctrl9_xl.i3c_disable != bit_val ) ) {
+ ctrl9_xl.i3c_disable = bit_val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL9_XL,
+ (uint8_t*)&ctrl9_xl, 1);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+
+ bit_val = ((uint8_t)val.ui_bus_md & 0x30U) >> 4;
+ if ( ( ret == 0 ) && ( i3c_bus_avb.i3c_bus_avb_sel != bit_val ) ) {
+ i3c_bus_avb.i3c_bus_avb_sel = bit_val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C,
+ (uint8_t*)&ctrl4_c, 1);
+ }
+ bit_val = ( (uint8_t)val.ui_bus_md & 0x02U ) >> 1;
+ if ( ( ret == 0 ) && ( ctrl4_c.i2c_disable != bit_val ) ) {
+ ctrl4_c.i2c_disable = bit_val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C,
+ (uint8_t*)&ctrl4_c, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C,
+ (uint8_t*)&ctrl3_c, 1);
+ }
+ bit_val = (uint8_t)val.ui_bus_md & 0x01U;
+ if ( ( ret == 0 ) && ( ctrl3_c.sim != bit_val ) ) {
+ ctrl3_c.sim = bit_val;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C,
+ (uint8_t*)&ctrl3_c, 1);
+ }
+ }
+
+ return ret;
+
+}
+
+/**
+ * @brief Get the bus operating mode.[get]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val retrieves the bus operating mode for both the main
+ * and the auxiliary interface.(ptr)
+ *
+ */
+int32_t lsm6dso_bus_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_bus_mode_t *val)
+{
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ lsm6dso_ctrl9_xl_t ctrl9_xl;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+
+ int32_t ret = 0;
+
+ if (aux_ctx != NULL) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS,
+ (uint8_t*)&ctrl1_ois, 1);
+ switch ( ctrl1_ois.sim_ois ) {
+ case LSM6DSO_SPI_4W_AUX:
+ val->aux_bus_md = LSM6DSO_SPI_4W_AUX;
+ break;
+ case LSM6DSO_SPI_3W_AUX:
+ val->aux_bus_md = LSM6DSO_SPI_3W_AUX;
+ break;
+ default:
+ val->aux_bus_md = LSM6DSO_SPI_4W_AUX;
+ break;
+ }
+ }
+
+ if (ctx != NULL) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL9_XL,
+ (uint8_t*)&ctrl9_xl, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C,
+ (uint8_t*)&ctrl4_c, 1);
+ }
if (ret == 0) {
- ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_MASTER, (uint8_t *) val, 1);
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C,
+ (uint8_t*)&ctrl3_c, 1);
+
+ switch ( ( i3c_bus_avb.i3c_bus_avb_sel << 4 ) &
+ ( ctrl9_xl.i3c_disable << 2 ) &
+ ( ctrl4_c.i2c_disable << 1) & ctrl3_c.sim ) {
+ case LSM6DSO_SEL_BY_HW:
+ val->ui_bus_md = LSM6DSO_SEL_BY_HW;
+ break;
+ case LSM6DSO_SPI_4W:
+ val->ui_bus_md = LSM6DSO_SPI_4W;
+ break;
+ case LSM6DSO_SPI_3W:
+ val->ui_bus_md = LSM6DSO_SPI_3W;
+ break;
+ case LSM6DSO_I2C:
+ val->ui_bus_md = LSM6DSO_I2C;
+ break;
+ case LSM6DSO_I3C_T_50us:
+ val->ui_bus_md = LSM6DSO_I3C_T_50us;
+ break;
+ case LSM6DSO_I3C_T_2us:
+ val->ui_bus_md = LSM6DSO_I3C_T_2us;
+ break;
+ case LSM6DSO_I3C_T_1ms:
+ val->ui_bus_md = LSM6DSO_I3C_T_1ms;
+ break;
+ case LSM6DSO_I3C_T_25ms:
+ val->ui_bus_md = LSM6DSO_I3C_T_25ms;
+ break;
+ default:
+ val->ui_bus_md = LSM6DSO_SEL_BY_HW;
+ break;
+ }
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Get the status of the device.[get]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val the status of the device.(ptr)
+ *
+ */
+int32_t lsm6dso_status_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_status_t *val)
+{
+ lsm6dso_status_spiaux_t status_spiaux;
+ lsm6dso_status_reg_t status_reg;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ int32_t ret;
+
+ ret = 0;
+
+ if (aux_ctx != NULL){
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_STATUS_SPIAUX,
+ (uint8_t*)&status_spiaux, 1);
+ val->ois_drdy_xl = status_spiaux.xlda;
+ val->ois_drdy_g = status_spiaux.gda;
+ val->ois_gyro_settling = status_spiaux.gyro_settling;
+ }
+
+ if (ctx != NULL){
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ val->sw_reset = ctrl3_c.sw_reset;
+ val->boot = ctrl3_c.boot;
+
+ if ( (ret == 0) && ( ctrl3_c.sw_reset == PROPERTY_DISABLE ) &&
+ ( ctrl3_c.boot == PROPERTY_DISABLE ) ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG,
+ (uint8_t*)&status_reg, 1);
+ val->drdy_xl = status_reg.xlda;
+ val->drdy_g = status_reg.gda;
+ val->drdy_temp = status_reg.tda;
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Electrical pin configuration.[set]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the electrical settings for the configurable
+ * pins.
+ *
+ */
+int32_t lsm6dso_pin_conf_set(lsm6dso_ctx_t *ctx, lsm6dso_pin_conf_t val)
+{
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ lsm6dso_pin_ctrl_t pin_ctrl;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&pin_ctrl, 1);
+ if (ret == 0) {
+ pin_ctrl.ois_pu_dis = ~val.aux_sdo_ocs_pull_up;
+ pin_ctrl.sdo_pu_en = val.sdo_sa0_pull_up;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&pin_ctrl, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+ if (ret == 0) {
+ ctrl3_c.pp_od = ~val.int1_int2_push_pull;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+ if (ret == 0) {
+ i3c_bus_avb.pd_dis_int1 = ~val.int1_pull_down;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+ return ret;
+}
+
+/**
+ * @brief Electrical pin configuration.[get]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the electrical settings for the configurable
+ * pins.(ptr)
+ *
+ */
+int32_t lsm6dso_pin_conf_get(lsm6dso_ctx_t *ctx, lsm6dso_pin_conf_t *val)
+{
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ lsm6dso_pin_ctrl_t pin_ctrl;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&pin_ctrl, 1);
+ if (ret == 0) {
+ val->aux_sdo_ocs_pull_up = ~pin_ctrl.ois_pu_dis;
+ val->aux_sdo_ocs_pull_up = pin_ctrl.sdo_pu_en;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+ if (ret == 0) {
+ val->int1_int2_push_pull = ~ctrl3_c.pp_od;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_I3C_BUS_AVB,
+ (uint8_t*)&i3c_bus_avb, 1);
+ }
+ if (ret == 0) {
+ val->int1_pull_down = ~i3c_bus_avb.pd_dis_int1;
+ }
+ return ret;
+}
+
+/**
+ * @brief Interrupt pins hardware signal configuration.[set]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the pins hardware signal settings.
+ *
+ */
+int32_t lsm6dso_interrupt_mode_set(lsm6dso_ctx_t *ctx,
+ lsm6dso_int_mode_t val)
+{
+ lsm6dso_tap_cfg0_t tap_cfg0;
+ lsm6dso_page_rw_t page_rw;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ if (ret == 0) {
+ ctrl3_c.h_lactive = val.active_low;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*) &tap_cfg0, 1);
+ }
+ if (ret == 0) {
+ tap_cfg0.lir = val.base_latched;
+ tap_cfg0.int_clr_on_read = val.base_latched | val.emb_latched;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*) &tap_cfg0, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.emb_func_lir = val.emb_latched;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
+}
+
+/**
+ * @brief Interrupt pins hardware signal configuration.[get]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the pins hardware signal settings.(ptr)
+ *
+ */
+int32_t lsm6dso_interrupt_mode_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_int_mode_t *val)
+{
+ lsm6dso_tap_cfg0_t tap_cfg0;
+ lsm6dso_page_rw_t page_rw;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&ctrl3_c, 1);
+ if (ret == 0) {
+ ctrl3_c.h_lactive = val->active_low;
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*) &tap_cfg0, 1);
+ }
+ if (ret == 0) {
+ tap_cfg0.lir = val->base_latched;
+ tap_cfg0.int_clr_on_read = val->base_latched | val->emb_latched;
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ page_rw.emb_func_lir = val->emb_latched;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ return ret;
+}
+
+/**
+ * @brief Route interrupt signals on int1 pin.[set]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the signals to route on int1 pin.
+ *
+ */
+int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx,
+ lsm6dso_pin_int1_route_t val)
+{
+ lsm6dso_pin_int2_route_t pin_int2_route;
+ lsm6dso_emb_func_int1_t emb_func_int1;
+ lsm6dso_fsm_int1_a_t fsm_int1_a;
+ lsm6dso_fsm_int1_b_t fsm_int1_b;
+ lsm6dso_int1_ctrl_t int1_ctrl;
+ lsm6dso_int2_ctrl_t int2_ctrl;
+ lsm6dso_tap_cfg2_t tap_cfg2;
+ lsm6dso_md2_cfg_t md2_cfg;
+ lsm6dso_md1_cfg_t md1_cfg;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ int32_t ret;
+
+ int1_ctrl.int1_drdy_xl = val.drdy_xl;
+ int1_ctrl.int1_drdy_g = val.drdy_g;
+ int1_ctrl.int1_boot = val.boot;
+ int1_ctrl.int1_fifo_th = val.fifo_th;
+ int1_ctrl.int1_fifo_ovr = val.fifo_ovr;
+ int1_ctrl.int1_fifo_full = val.fifo_full;
+ int1_ctrl.int1_cnt_bdr = val.fifo_bdr;
+ int1_ctrl.den_drdy_flag = val.den_flag;
+
+ md1_cfg.int1_shub = val.sh_endop;
+ md1_cfg.int1_6d = val.six_d;
+ md1_cfg.int1_double_tap = val.double_tap;
+ md1_cfg.int1_ff = val.free_fall;
+ md1_cfg.int1_wu = val.wake_up;
+ md1_cfg.int1_single_tap = val.single_tap;
+ md1_cfg.int1_sleep_change = val.sleep_change;
+
+ emb_func_int1.int1_step_detector = val.step_detector;
+ emb_func_int1.int1_tilt = val.tilt;
+ emb_func_int1.int1_sig_mot = val.sig_mot;
+ emb_func_int1.int1_fsm_lc = val.fsm_lc;
+
+ fsm_int1_a.int1_fsm1 = val.fsm1;
+ fsm_int1_a.int1_fsm2 = val.fsm2;
+ fsm_int1_a.int1_fsm3 = val.fsm3;
+ fsm_int1_a.int1_fsm4 = val.fsm4;
+ fsm_int1_a.int1_fsm5 = val.fsm5;
+ fsm_int1_a.int1_fsm6 = val.fsm6;
+ fsm_int1_a.int1_fsm7 = val.fsm7;
+ fsm_int1_a.int1_fsm8 = val.fsm8;
+
+ fsm_int1_b.int1_fsm9 = val.fsm9 ;
+ fsm_int1_b.int1_fsm10 = val.fsm10;
+ fsm_int1_b.int1_fsm11 = val.fsm11;
+ fsm_int1_b.int1_fsm12 = val.fsm12;
+ fsm_int1_b.int1_fsm13 = val.fsm13;
+ fsm_int1_b.int1_fsm14 = val.fsm14;
+ fsm_int1_b.int1_fsm15 = val.fsm15;
+ fsm_int1_b.int1_fsm16 = val.fsm16;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
+ if (ret == 0) {
+ if( ( val.drdy_temp | val.timestamp ) != PROPERTY_DISABLE) {
+ ctrl4_c.int2_on_int1 = PROPERTY_ENABLE;
+ }
+ else{
+ ctrl4_c.int2_on_int1 = PROPERTY_DISABLE;
+ }
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
+ (uint8_t*)&emb_func_int1, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_A,
+ (uint8_t*)&fsm_int1_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT1_B,
+ (uint8_t*)&fsm_int1_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ if (ret == 0) {
+ if ( ( emb_func_int1.int1_fsm_lc
+ | emb_func_int1.int1_sig_mot
+ | emb_func_int1.int1_step_detector
+ | emb_func_int1.int1_tilt
+ | fsm_int1_a.int1_fsm1
+ | fsm_int1_a.int1_fsm2
+ | fsm_int1_a.int1_fsm3
+ | fsm_int1_a.int1_fsm4
+ | fsm_int1_a.int1_fsm5
+ | fsm_int1_a.int1_fsm6
+ | fsm_int1_a.int1_fsm7
+ | fsm_int1_a.int1_fsm8
+ | fsm_int1_b.int1_fsm9
+ | fsm_int1_b.int1_fsm10
+ | fsm_int1_b.int1_fsm11
+ | fsm_int1_b.int1_fsm12
+ | fsm_int1_b.int1_fsm13
+ | fsm_int1_b.int1_fsm14
+ | fsm_int1_b.int1_fsm15
+ | fsm_int1_b.int1_fsm16) != PROPERTY_DISABLE){
+ md1_cfg.int1_emb_func = PROPERTY_ENABLE;
+ }
+ else{
+ md1_cfg.int1_emb_func = PROPERTY_DISABLE;
+ }
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT1_CTRL,
+ (uint8_t*)&int1_ctrl, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t*)&md1_cfg, 1);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t*)&int2_ctrl, 1);
+ }
+ if (ret == 0) {
+ int2_ctrl.int2_drdy_temp = val.drdy_temp;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t*)&int2_ctrl, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t*)&md2_cfg, 1);
+ }
+ if (ret == 0) {
+ md2_cfg.int2_timestamp = val.timestamp;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t*)&md2_cfg, 1);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*) &tap_cfg2, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_pin_int2_route_get(ctx, NULL, &pin_int2_route);
+ }
+ if (ret == 0) {
+ if ( ( pin_int2_route.fifo_bdr
+ | pin_int2_route.drdy_g
+ | pin_int2_route.drdy_temp
+ | pin_int2_route.drdy_xl
+ | pin_int2_route.fifo_full
+ | pin_int2_route.fifo_ovr
+ | pin_int2_route.fifo_th
+ | pin_int2_route.six_d
+ | pin_int2_route.double_tap
+ | pin_int2_route.free_fall
+ | pin_int2_route.wake_up
+ | pin_int2_route.single_tap
+ | pin_int2_route.sleep_change
+ | int1_ctrl.den_drdy_flag
+ | int1_ctrl.int1_boot
+ | int1_ctrl.int1_cnt_bdr
+ | int1_ctrl.int1_drdy_g
+ | int1_ctrl.int1_drdy_xl
+ | int1_ctrl.int1_fifo_full
+ | int1_ctrl.int1_fifo_ovr
+ | int1_ctrl.int1_fifo_th
+ | md1_cfg.int1_shub
+ | md1_cfg.int1_6d
+ | md1_cfg.int1_double_tap
+ | md1_cfg.int1_ff
+ | md1_cfg.int1_wu
+ | md1_cfg.int1_single_tap
+ | md1_cfg.int1_sleep_change) != PROPERTY_DISABLE) {
+ tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
+ }
+ else{
+ tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
+ }
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*) &tap_cfg2, 1);
+ }
+ return ret;
+}
+
+/**
+ * @brief Route interrupt signals on int1 pin.[get]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the signals that are routed on int1 pin.(ptr)
+ *
+ */
+int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_pin_int1_route_t *val)
+{
+ lsm6dso_emb_func_int1_t emb_func_int1;
+ lsm6dso_fsm_int1_a_t fsm_int1_a;
+ lsm6dso_fsm_int1_b_t fsm_int1_b;
+ lsm6dso_int1_ctrl_t int1_ctrl;
+ lsm6dso_int2_ctrl_t int2_ctrl;
+ lsm6dso_md2_cfg_t md2_cfg;
+ lsm6dso_md1_cfg_t md1_cfg;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT1,
+ (uint8_t*)&emb_func_int1, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_A,
+ (uint8_t*)&fsm_int1_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT1_B,
+ (uint8_t*)&fsm_int1_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT1_CTRL,
+ (uint8_t*)&int1_ctrl, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MD1_CFG, (uint8_t*)&md1_cfg, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
+ }
+ if (ctrl4_c.int2_on_int1 == PROPERTY_ENABLE){
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t*)&int2_ctrl, 1);
+ val->drdy_temp = int2_ctrl.int2_drdy_temp;
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t*)&md2_cfg, 1);
+ val->timestamp = md2_cfg.int2_timestamp;
+ }
+ }
+ else {
+ val->drdy_temp = PROPERTY_DISABLE;
+ val->timestamp = PROPERTY_DISABLE;
+ }
+
+ val->drdy_xl = int1_ctrl.int1_drdy_xl;
+ val->drdy_g = int1_ctrl.int1_drdy_g;
+ val->boot = int1_ctrl.int1_boot;
+ val->fifo_th = int1_ctrl.int1_fifo_th;
+ val->fifo_ovr = int1_ctrl.int1_fifo_ovr;
+ val->fifo_full = int1_ctrl.int1_fifo_full;
+ val->fifo_bdr = int1_ctrl.int1_cnt_bdr;
+ val->den_flag = int1_ctrl.den_drdy_flag;
+
+ val->sh_endop = md1_cfg.int1_shub;
+ val->six_d = md1_cfg.int1_6d;
+ val->double_tap = md1_cfg.int1_double_tap;
+ val->free_fall = md1_cfg.int1_ff;
+ val->wake_up = md1_cfg.int1_wu;
+ val->single_tap = md1_cfg.int1_single_tap;
+ val->sleep_change = md1_cfg.int1_sleep_change;
+
+ val->step_detector = emb_func_int1.int1_step_detector;
+ val->tilt = emb_func_int1.int1_tilt;
+ val->sig_mot = emb_func_int1.int1_sig_mot;
+ val->fsm_lc = emb_func_int1.int1_fsm_lc;
+
+ val->fsm1 = fsm_int1_a.int1_fsm1;
+ val->fsm2 = fsm_int1_a.int1_fsm2;
+ val->fsm3 = fsm_int1_a.int1_fsm3;
+ val->fsm4 = fsm_int1_a.int1_fsm4;
+ val->fsm5 = fsm_int1_a.int1_fsm5;
+ val->fsm6 = fsm_int1_a.int1_fsm6;
+ val->fsm7 = fsm_int1_a.int1_fsm7;
+ val->fsm8 = fsm_int1_a.int1_fsm8;
+
+ val->fsm9 = fsm_int1_b.int1_fsm9;
+ val->fsm10 = fsm_int1_b.int1_fsm10;
+ val->fsm11 = fsm_int1_b.int1_fsm11;
+ val->fsm12 = fsm_int1_b.int1_fsm12;
+ val->fsm13 = fsm_int1_b.int1_fsm13;
+ val->fsm14 = fsm_int1_b.int1_fsm14;
+ val->fsm15 = fsm_int1_b.int1_fsm15;
+ val->fsm16 = fsm_int1_b.int1_fsm16;
+
+ return ret;
+}
+
+/**
+ * @brief Route interrupt signals on int2 pin.[set]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val the signals to route on int2 pin.
+ *
+ */
+int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_pin_int2_route_t val)
+{
+ lsm6dso_pin_int1_route_t pin_int1_route;
+ lsm6dso_emb_func_int2_t emb_func_int2;
+ lsm6dso_fsm_int2_a_t fsm_int2_a;
+ lsm6dso_fsm_int2_b_t fsm_int2_b;
+ lsm6dso_int2_ctrl_t int2_ctrl;
+ lsm6dso_tap_cfg2_t tap_cfg2;
+ lsm6dso_md2_cfg_t md2_cfg;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ lsm6dso_int_ois_t int_ois;
+ int32_t ret;
+
+ ret = 0;
+
+ if( aux_ctx != NULL ) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_INT_OIS,
+ (uint8_t*)&int_ois, 1);
+ if (ret == 0) {
+ int_ois.int2_drdy_ois = val.drdy_ois;
+ ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_INT_OIS,
+ (uint8_t*)&int_ois, 1);
+ }
+ }
+
+ if( ctx != NULL ) {
+ int2_ctrl.int2_drdy_xl = val.drdy_xl;
+ int2_ctrl.int2_drdy_g = val.drdy_g;
+ int2_ctrl.int2_drdy_temp = val.drdy_temp;
+ int2_ctrl.int2_fifo_th = val.fifo_th;
+ int2_ctrl.int2_fifo_ovr = val.fifo_ovr;
+ int2_ctrl.int2_fifo_full = val.fifo_full;
+ int2_ctrl.int2_cnt_bdr = val.fifo_bdr;
+
+ md2_cfg.int2_timestamp = val.timestamp;
+ md2_cfg.int2_6d = val.six_d;
+ md2_cfg.int2_double_tap = val.double_tap;
+ md2_cfg.int2_ff = val.free_fall;
+ md2_cfg.int2_wu = val.wake_up;
+ md2_cfg.int2_single_tap = val.single_tap;
+ md2_cfg.int2_sleep_change = val.sleep_change;
+
+ emb_func_int2. int2_step_detector = val.step_detector;
+ emb_func_int2.int2_tilt = val.tilt;
+ emb_func_int2.int2_fsm_lc = val.fsm_lc;
+
+ fsm_int2_a.int2_fsm1 = val.fsm1;
+ fsm_int2_a.int2_fsm2 = val.fsm2;
+ fsm_int2_a.int2_fsm3 = val.fsm3;
+ fsm_int2_a.int2_fsm4 = val.fsm4;
+ fsm_int2_a.int2_fsm5 = val.fsm5;
+ fsm_int2_a.int2_fsm6 = val.fsm6;
+ fsm_int2_a.int2_fsm7 = val.fsm7;
+ fsm_int2_a.int2_fsm8 = val.fsm8;
+
+ fsm_int2_b.int2_fsm9 = val.fsm9 ;
+ fsm_int2_b.int2_fsm10 = val.fsm10;
+ fsm_int2_b.int2_fsm11 = val.fsm11;
+ fsm_int2_b.int2_fsm12 = val.fsm12;
+ fsm_int2_b.int2_fsm13 = val.fsm13;
+ fsm_int2_b.int2_fsm14 = val.fsm14;
+ fsm_int2_b.int2_fsm15 = val.fsm15;
+ fsm_int2_b.int2_fsm16 = val.fsm16;
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
+ if (ret == 0) {
+ if ( ( val.drdy_temp | val.timestamp ) != PROPERTY_DISABLE ) {
+ ctrl4_c.int2_on_int1 = PROPERTY_DISABLE;
+ }
+ else{
+ ctrl4_c.int2_on_int1 = PROPERTY_ENABLE;
+ }
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
+ }
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
+ (uint8_t*)&emb_func_int2, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_A,
+ (uint8_t*)&fsm_int2_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FSM_INT2_B,
+ (uint8_t*)&fsm_int2_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ if (ret == 0) {
+ if (( emb_func_int2.int2_fsm_lc
+ | emb_func_int2.int2_sig_mot
+ | emb_func_int2.int2_step_detector
+ | emb_func_int2.int2_tilt
+ | fsm_int2_a.int2_fsm1
+ | fsm_int2_a.int2_fsm2
+ | fsm_int2_a.int2_fsm3
+ | fsm_int2_a.int2_fsm4
+ | fsm_int2_a.int2_fsm5
+ | fsm_int2_a.int2_fsm6
+ | fsm_int2_a.int2_fsm7
+ | fsm_int2_a.int2_fsm8
+ | fsm_int2_b.int2_fsm9
+ | fsm_int2_b.int2_fsm10
+ | fsm_int2_b.int2_fsm11
+ | fsm_int2_b.int2_fsm12
+ | fsm_int2_b.int2_fsm13
+ | fsm_int2_b.int2_fsm14
+ | fsm_int2_b.int2_fsm15
+ | fsm_int2_b.int2_fsm16)!= PROPERTY_DISABLE ){
+ md2_cfg.int2_emb_func = PROPERTY_ENABLE;
+ }
+ else{
+ md2_cfg.int2_emb_func = PROPERTY_DISABLE;
+ }
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL,
+ (uint8_t*)&int2_ctrl, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t*)&md2_cfg, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*) &tap_cfg2, 1);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_pin_int1_route_get(ctx, &pin_int1_route);
+ }
+
+ if (ret == 0) {
+ if ( ( val.fifo_bdr
+ | val.drdy_g
+ | val.drdy_temp
+ | val.drdy_xl
+ | val.fifo_full
+ | val.fifo_ovr
+ | val.fifo_th
+ | val.six_d
+ | val.double_tap
+ | val.free_fall
+ | val.wake_up
+ | val.single_tap
+ | val.sleep_change
+ | pin_int1_route.den_flag
+ | pin_int1_route.boot
+ | pin_int1_route.fifo_bdr
+ | pin_int1_route.drdy_g
+ | pin_int1_route.drdy_xl
+ | pin_int1_route.fifo_full
+ | pin_int1_route.fifo_ovr
+ | pin_int1_route.fifo_th
+ | pin_int1_route.six_d
+ | pin_int1_route.double_tap
+ | pin_int1_route.free_fall
+ | pin_int1_route.wake_up
+ | pin_int1_route.single_tap
+ | pin_int1_route.sleep_change ) != PROPERTY_DISABLE) {
+ tap_cfg2.interrupts_enable = PROPERTY_ENABLE;
+ }
+ else{
+ tap_cfg2.interrupts_enable = PROPERTY_DISABLE;
+ }
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG2, (uint8_t*) &tap_cfg2, 1);
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Route interrupt signals on int2 pin.[get]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val the signals that are routed on int2 pin.(ptr)
+ *
+ */
+int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_pin_int2_route_t *val)
+{
+ lsm6dso_emb_func_int2_t emb_func_int2;
+ lsm6dso_fsm_int2_a_t fsm_int2_a;
+ lsm6dso_fsm_int2_b_t fsm_int2_b;
+ lsm6dso_int2_ctrl_t int2_ctrl;
+ lsm6dso_md2_cfg_t md2_cfg;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ lsm6dso_int_ois_t int_ois;
+ int32_t ret;
+
+ ret = 0;
+
+ if( aux_ctx != NULL ) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_INT_OIS,
+ (uint8_t*)&int_ois, 1);
+ val->drdy_ois = int_ois.int2_drdy_ois;
+ }
+
+ if( ctx != NULL ) {
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_INT2,
+ (uint8_t*)&emb_func_int2, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_A,
+ (uint8_t*)&fsm_int2_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_INT2_B,
+ (uint8_t*)&fsm_int2_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ if (ret == 0) {
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
+ (uint8_t*)&int2_ctrl, 1);
}
if (ret == 0) {
- ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG,
+ (uint8_t*)&md2_cfg, 1);
+ }
+
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&ctrl4_c, 1);
+ }
+ if (ctrl4_c.int2_on_int1 == PROPERTY_DISABLE){
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
+ (uint8_t*)&int2_ctrl, 1);
+ val->drdy_temp = int2_ctrl.int2_drdy_temp;
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_MD2_CFG, (uint8_t*)&md2_cfg, 1);
+ val->timestamp = md2_cfg.int2_timestamp;
+ }
+ }
+ else {
+ val->drdy_temp = PROPERTY_DISABLE;
+ val->timestamp = PROPERTY_DISABLE;
+ }
+
+ val->drdy_xl = int2_ctrl.int2_drdy_xl;
+ val->drdy_g = int2_ctrl.int2_drdy_g;
+ val->drdy_temp = int2_ctrl.int2_drdy_temp;
+ val->fifo_th = int2_ctrl.int2_fifo_th;
+ val->fifo_ovr = int2_ctrl.int2_fifo_ovr;
+ val->fifo_full = int2_ctrl.int2_fifo_full;
+ val->fifo_bdr = int2_ctrl.int2_cnt_bdr;
+
+ val->timestamp = md2_cfg.int2_timestamp;
+ val->six_d = md2_cfg.int2_6d;
+ val->double_tap = md2_cfg.int2_double_tap;
+ val->free_fall = md2_cfg.int2_ff;
+ val->wake_up = md2_cfg.int2_wu;
+ val->single_tap = md2_cfg.int2_single_tap;
+ val->sleep_change = md2_cfg.int2_sleep_change;
+
+ val->step_detector = emb_func_int2. int2_step_detector;
+ val->tilt = emb_func_int2.int2_tilt;
+ val->fsm_lc = emb_func_int2.int2_fsm_lc;
+
+ val->fsm1 = fsm_int2_a.int2_fsm1;
+ val->fsm2 = fsm_int2_a.int2_fsm2;
+ val->fsm3 = fsm_int2_a.int2_fsm3;
+ val->fsm4 = fsm_int2_a.int2_fsm4;
+ val->fsm5 = fsm_int2_a.int2_fsm5;
+ val->fsm6 = fsm_int2_a.int2_fsm6;
+ val->fsm7 = fsm_int2_a.int2_fsm7;
+ val->fsm8 = fsm_int2_a.int2_fsm8;
+
+ val->fsm9 = fsm_int2_b.int2_fsm9;
+ val->fsm10 = fsm_int2_b.int2_fsm10;
+ val->fsm11 = fsm_int2_b.int2_fsm11;
+ val->fsm12 = fsm_int2_b.int2_fsm12;
+ val->fsm13 = fsm_int2_b.int2_fsm13;
+ val->fsm14 = fsm_int2_b.int2_fsm14;
+ val->fsm15 = fsm_int2_b.int2_fsm15;
+ val->fsm16 = fsm_int2_b.int2_fsm16;
+
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Get the status of all the interrupt sources.[get]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param val the status of all the interrupt sources.(ptr)
+ *
+ */
+int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_all_sources_t *val)
+{
+ lsm6dso_emb_func_status_mainpage_t emb_func_status_mainpage;
+ lsm6dso_status_master_mainpage_t status_master_mainpage;
+ lsm6dso_fsm_status_a_mainpage_t fsm_status_a_mainpage;
+ lsm6dso_fsm_status_b_mainpage_t fsm_status_b_mainpage;
+ lsm6dso_fifo_status1_t fifo_status1;
+ lsm6dso_fifo_status2_t fifo_status2;
+ lsm6dso_all_int_src_t all_int_src;
+ lsm6dso_wake_up_src_t wake_up_src;
+ lsm6dso_status_reg_t status_reg;
+ lsm6dso_tap_src_t tap_src;
+ lsm6dso_d6d_src_t d6d_src;
+ lsm6dso_ctrl5_c_t ctrl5_c;
+ uint8_t reg[12];
+ int32_t ret;
+
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
+ if (ret == 0) {
+ ctrl5_c.not_used_01 = PROPERTY_ENABLE;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_ALL_INT_SRC, reg, 12);
+ }
+
+ if (ret == 0) {
+ bytecpy(( uint8_t*)&all_int_src, ®[0]);
+ bytecpy(( uint8_t*)&wake_up_src, ®[1]);
+ bytecpy(( uint8_t*)&tap_src, ®[2]);
+ bytecpy(( uint8_t*)&d6d_src, ®[3]);
+ bytecpy(( uint8_t*)&status_reg, ®[4]);
+ bytecpy(( uint8_t*)&emb_func_status_mainpage, ®[5]);
+ bytecpy(( uint8_t*)&fsm_status_a_mainpage, ®[6]);
+ bytecpy(( uint8_t*)&fsm_status_b_mainpage, ®[7]);
+ bytecpy(( uint8_t*)&status_master_mainpage, ®[9]);
+ bytecpy(( uint8_t*)&fifo_status1, ®[10]);
+ bytecpy(( uint8_t*)&fifo_status2, ®[11]);
+
+ val->timestamp = all_int_src.timestamp_endcount;
+
+ val->wake_up_z = wake_up_src.z_wu;
+ val->wake_up_y = wake_up_src.y_wu;
+ val->wake_up_x = wake_up_src.x_wu;
+ val->wake_up = wake_up_src.wu_ia;
+ val->sleep_state = wake_up_src.sleep_state;
+ val->free_fall = wake_up_src.ff_ia;
+ val->sleep_change = wake_up_src.sleep_change_ia;
+
+ val->tap_x = tap_src.x_tap;
+ val->tap_y = tap_src.y_tap;
+ val->tap_z = tap_src.z_tap;
+ val->tap_sign = tap_src.tap_sign;
+ val->double_tap = tap_src.double_tap;
+ val->single_tap = tap_src.single_tap;
+
+ val->six_d_xl = d6d_src.xl;
+ val->six_d_xh = d6d_src.xh;
+ val->six_d_yl = d6d_src.yl;
+ val->six_d_yh = d6d_src.yh;
+ val->six_d_zl = d6d_src.zl;
+ val->six_d_zh = d6d_src.zh;
+ val->six_d = d6d_src.d6d_ia;
+ val->den_flag = d6d_src.den_drdy;
+
+ val->drdy_xl = status_reg.xlda;
+ val->drdy_g = status_reg.gda;
+ val->drdy_temp = status_reg.tda;
+
+ val->step_detector = emb_func_status_mainpage.is_step_det;
+ val->tilt = emb_func_status_mainpage.is_tilt;
+ val->sig_mot = emb_func_status_mainpage.is_sigmot;
+ val->fsm_lc = emb_func_status_mainpage.is_fsm_lc;
+
+ val->fsm1 = fsm_status_a_mainpage.is_fsm1;
+ val->fsm2 = fsm_status_a_mainpage.is_fsm2;
+ val->fsm3 = fsm_status_a_mainpage.is_fsm3;
+ val->fsm4 = fsm_status_a_mainpage.is_fsm4;
+ val->fsm5 = fsm_status_a_mainpage.is_fsm5;
+ val->fsm6 = fsm_status_a_mainpage.is_fsm6;
+ val->fsm7 = fsm_status_a_mainpage.is_fsm7;
+ val->fsm8 = fsm_status_a_mainpage.is_fsm8;
+
+ val->fsm9 = fsm_status_b_mainpage.is_fsm9;
+ val->fsm10 = fsm_status_b_mainpage.is_fsm10;
+ val->fsm11 = fsm_status_b_mainpage.is_fsm11;
+ val->fsm12 = fsm_status_b_mainpage.is_fsm12;
+ val->fsm13 = fsm_status_b_mainpage.is_fsm13;
+ val->fsm14 = fsm_status_b_mainpage.is_fsm14;
+ val->fsm15 = fsm_status_b_mainpage.is_fsm15;
+ val->fsm16 = fsm_status_b_mainpage.is_fsm16;
+
+ val->sh_endop = status_master_mainpage.sens_hub_endop;
+ val->sh_slave0_nack = status_master_mainpage.slave0_nack;
+ val->sh_slave1_nack = status_master_mainpage.slave1_nack;
+ val->sh_slave2_nack = status_master_mainpage.slave2_nack;
+ val->sh_slave3_nack = status_master_mainpage.slave3_nack;
+ val->sh_wr_once = status_master_mainpage.wr_once_done;
+
+ val->fifo_diff = (256U * fifo_status2.diff_fifo) + fifo_status1.diff_fifo;
+
+ val->fifo_ovr_latched = fifo_status2.over_run_latched;
+ val->fifo_bdr = fifo_status2.counter_bdr_ia;
+ val->fifo_full = fifo_status2.fifo_full_ia;
+ val->fifo_ovr = fifo_status2.fifo_ovr_ia;
+ val->fifo_th = fifo_status2.fifo_wtm_ia;
+
+ ctrl5_c.not_used_01 = PROPERTY_DISABLE;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&ctrl5_c, 1);
+
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Sensor conversion parameters selection.[set]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val set the sensor conversion parameters by checking
+ * the constraints of the device.(ptr)
+ *
+ */
+int32_t lsm6dso_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_md_t *val)
+{
+ lsm6dso_func_cfg_access_t func_cfg_access;
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_ctrl2_ois_t ctrl2_ois;
+ lsm6dso_ctrl3_ois_t ctrl3_ois;
+ lsm6dso_ctrl1_xl_t ctrl1_xl;
+ lsm6dso_ctrl8_xl_t ctrl8_xl;
+ lsm6dso_ctrl2_g_t ctrl2_g;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ lsm6dso_ctrl5_c_t ctrl5_c;
+ lsm6dso_ctrl6_c_t ctrl6_c;
+ lsm6dso_ctrl7_g_t ctrl7_g;
+ uint8_t xl_hm_mode;
+ uint8_t g_hm_mode;
+ uint8_t xl_ulp_en;
+ uint8_t odr_gy;
+ uint8_t odr_xl;
+ uint8_t reg[8];
+ int32_t ret;
+
+ ret = 0;
+
+ /* reading input configuration */
+ xl_hm_mode = ( (uint8_t)val->ui.xl.odr & 0x10U ) >> 4;
+ xl_ulp_en = ( (uint8_t)val->ui.xl.odr & 0x20U ) >> 5;
+ odr_xl = (uint8_t)val->ui.xl.odr & 0x0FU;
+
+ /* if enable xl ultra low power mode disable gy and OIS chain */
+ if (xl_ulp_en == PROPERTY_ENABLE) {
+ val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+ val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+ val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+ }
+ /* if OIS xl is enabled also gyro OIS is enabled */
+ if (val->ois.xl.odr == LSM6DSO_XL_OIS_6667Hz_HP){
+ val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
+ }
+ g_hm_mode = ( (uint8_t)val->ui.gy.odr & 0x10U ) >> 4;
+ odr_gy = (uint8_t)val->ui.gy.odr & 0x0FU;
+
+ /* reading registers to be configured */
+ if( ctx != NULL ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, reg, 8);
+ bytecpy(( uint8_t*)&ctrl1_xl, ®[0]);
+ bytecpy(( uint8_t*)&ctrl2_g, ®[1]);
+ bytecpy(( uint8_t*)&ctrl3_c, ®[2]);
+ bytecpy(( uint8_t*)&ctrl4_c, ®[3]);
+ bytecpy(( uint8_t*)&ctrl5_c, ®[4]);
+ bytecpy(( uint8_t*)&ctrl6_c, ®[5]);
+ bytecpy(( uint8_t*)&ctrl7_g, ®[6]);
+ bytecpy(( uint8_t*)&ctrl8_xl, ®[7]);
+ if ( ret == 0 ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
+ (uint8_t*)&func_cfg_access, 1);
+ }
+ /* if toggle xl ultra low power mode, turn off xl before reconfigure */
+ if (ctrl5_c.xl_ulp_en != xl_ulp_en) {
+ ctrl1_xl.odr_xl = (uint8_t) 0x00U;
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL,
+ (uint8_t*)&ctrl1_xl, 1);
+ }
+ }
+
+ /* reading OIS registers to be configured */
+ if( aux_ctx != NULL ) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+ }
+ bytecpy(( uint8_t*)&ctrl1_ois, ®[0]);
+ bytecpy(( uint8_t*)&ctrl2_ois, ®[1]);
+ bytecpy(( uint8_t*)&ctrl3_ois, ®[2]);
+ }
+ else {
+ if( ctx != NULL ) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+ }
+ bytecpy(( uint8_t*)&ctrl1_ois, ®[0]);
+ bytecpy(( uint8_t*)&ctrl2_ois, ®[1]);
+ bytecpy(( uint8_t*)&ctrl3_ois, ®[2]);
+ }
+ }
+
+ /* Check the Finite State Machine data rate constraints */
+ if (val->fsm.sens != LSM6DSO_FSM_DISABLE) {
+ switch (val->fsm.odr) {
+ case LSM6DSO_FSM_12Hz5:
+ if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl == 0x00U) ) {
+ odr_xl = 0x01U;
+ }
+ if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy == 0x00U) ) {
+ xl_ulp_en = PROPERTY_DISABLE;
+ odr_gy = 0x01U;
+ }
+ break;
+ case LSM6DSO_FSM_26Hz:
+ if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x02U) ) {
+ odr_xl = 0x02U;
+ }
+ if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x02U) ) {
+ xl_ulp_en = PROPERTY_DISABLE;
+ odr_gy = 0x02U;
+ }
+ break;
+ case LSM6DSO_FSM_52Hz:
+ if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x03U) ) {
+ odr_xl = 0x03U;
+ }
+ if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x03U) ) {
+ xl_ulp_en = PROPERTY_DISABLE;
+ odr_gy = 0x03U;
+ }
+ break;
+ case LSM6DSO_FSM_104Hz:
+ if ( (val->fsm.sens != LSM6DSO_FSM_GY) && (odr_xl < 0x04U) ) {
+ odr_xl = 0x04U;
+ }
+ if ( (val->fsm.sens != LSM6DSO_FSM_XL) && (odr_gy < 0x04U) ) {
+ xl_ulp_en = PROPERTY_DISABLE;
+ odr_gy = 0x04U;
+ }
+ break;
+ default:
+ odr_xl = 0x00U;
+ odr_gy = 0x00U;
+ break;
+ }
+ }
+
+ /* Updating the accelerometer data rate configuration */
+ switch ( ( ctrl5_c.xl_ulp_en << 5 ) | ( ctrl6_c.xl_hm_mode << 4 ) |
+ ctrl1_xl.odr_xl ) {
+ case LSM6DSO_XL_UI_OFF:
+ val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+ break;
+ case LSM6DSO_XL_UI_12Hz5_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_HP;
+ break;
+ case LSM6DSO_XL_UI_26Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_52Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_104Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_208Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_416Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_416Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_833Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_833Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_1667Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_1667Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_3333Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_3333Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_6667Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_6667Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_1Hz6_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_LP;
+ break;
+ case LSM6DSO_XL_UI_12Hz5_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_LP;
+ break;
+ case LSM6DSO_XL_UI_26Hz_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_LP;
+ break;
+ case LSM6DSO_XL_UI_52Hz_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_LP;
+ break;
+ case LSM6DSO_XL_UI_104Hz_NM:
+ val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_NM;
+ break;
+ case LSM6DSO_XL_UI_208Hz_NM:
+ val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_NM;
+ break;
+ case LSM6DSO_XL_UI_1Hz6_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_ULP;
+ break;
+ case LSM6DSO_XL_UI_12Hz5_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_ULP;
+ break;
+ case LSM6DSO_XL_UI_26Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_ULP;
+ break;
+ case LSM6DSO_XL_UI_52Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_ULP;
+ break;
+ case LSM6DSO_XL_UI_104Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_ULP;
+ break;
+ case LSM6DSO_XL_UI_208Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_ULP;
+ break;
+ default:
+ val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+ break;
+ }
+
+ /* Updating the accelerometer data rate configuration */
+ switch ( (ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g) {
+ case LSM6DSO_GY_UI_OFF:
+ val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+ break;
+ case LSM6DSO_GY_UI_12Hz5_LP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_LP;
+ break;
+ case LSM6DSO_GY_UI_12Hz5_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_HP;
+ break;
+ case LSM6DSO_GY_UI_26Hz_LP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_LP;
+ break;
+ case LSM6DSO_GY_UI_26Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_52Hz_LP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_LP;
+ break;
+ case LSM6DSO_GY_UI_52Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_104Hz_NM:
+ val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_NM;
+ break;
+ case LSM6DSO_GY_UI_104Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_208Hz_NM:
+ val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_NM;
+ break;
+ case LSM6DSO_GY_UI_208Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_416Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_416Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_833Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_833Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_1667Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_1667Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_3333Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_3333Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_6667Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_6667Hz_HP;
+ break;
+ default:
+ val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+ break;
+ }
+
+ /* Check accelerometer full scale constraints */
+ /* Full scale of 16g must be the same for UI and OIS */
+ if ( (val->ui.xl.fs == LSM6DSO_XL_UI_16g) ||
+ (val->ois.xl.fs == LSM6DSO_XL_OIS_16g) ){
+ val->ui.xl.fs = LSM6DSO_XL_UI_16g;
+ val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
+ }
+
+ /* prapare new configuration */
+
+ /* Full scale of 16g must be the same for UI and OIS */
+ if (val->ui.xl.fs == LSM6DSO_XL_UI_16g) {
+ ctrl8_xl.xl_fs_mode = PROPERTY_DISABLE;
+ }
+ else {
+ ctrl8_xl.xl_fs_mode = PROPERTY_ENABLE;
+ }
+
+ /* OIS new configuration */
+ ctrl7_g.ois_on_en = val->ois.ctrl_md & 0x01U;
+
+ switch (val->ois.ctrl_md) {
+ case LSM6DSO_OIS_ONLY_AUX:
+ ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+ ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr | (uint8_t)val->ois.xl.odr;
+ ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+ ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+ break;
+ case LSM6DSO_OIS_MIXED:
+ ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+ ctrl7_g.ois_on = (uint8_t)val->ois.gy.odr | (uint8_t)val->ois.xl.odr;
+ ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+ ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+ break;
+ default:
+ ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+ ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr | (uint8_t)val->ois.xl.odr;
+ ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+ ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+ break;
+ }
+
+ /* UI new configuration */
+ ctrl1_xl.odr_xl = odr_xl;
+ ctrl1_xl.fs_xl = (uint8_t)val->ui.xl.fs;
+ ctrl5_c.xl_ulp_en = xl_ulp_en;
+ ctrl6_c.xl_hm_mode = xl_hm_mode;
+ ctrl7_g.g_hm_mode = g_hm_mode;
+ ctrl2_g.odr_g = odr_gy;
+ ctrl2_g.fs_g = (uint8_t) val->ui.gy.fs;
+
+ /* writing checked configuration */
+ if( ctx != NULL ) {
+ bytecpy(®[0], ( uint8_t*)&ctrl1_xl);
+ bytecpy(®[1], ( uint8_t*)&ctrl2_g);
+ bytecpy(®[2], ( uint8_t*)&ctrl3_c);
+ bytecpy(®[3], ( uint8_t*)&ctrl4_c);
+ bytecpy(®[4], ( uint8_t*)&ctrl5_c);
+ bytecpy(®[5], ( uint8_t*)&ctrl6_c);
+ bytecpy(®[6], ( uint8_t*)&ctrl7_g);
+ bytecpy(®[7], ( uint8_t*)&ctrl8_xl);
+ if ( ret == 0 ) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)®, 8);
+ }
+ if ( ret == 0 ) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
+ (uint8_t*)&func_cfg_access, 1);
+ }
+ }
+
+ /* writing OIS checked configuration */
+ if( aux_ctx != NULL ) {
+ bytecpy(®[0], ( uint8_t*)&ctrl1_ois);
+ bytecpy(®[1], ( uint8_t*)&ctrl2_ois);
+ bytecpy(®[2], ( uint8_t*)&ctrl3_ois);
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Sensor conversion parameters selection.[get]
+ *
+ * @param ctx communication interface handler. Use NULL to ingnore
+ * this interface.(ptr)
+ * @param aux_ctx auxiliary communication interface handler. Use NULL
+ * to ingnore this interface.(ptr)
+ * @param val get the sensor conversion parameters.(ptr)
+ *
+ */
+int32_t lsm6dso_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_md_t *val)
+{
+
+ lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
+ lsm6dso_func_cfg_access_t func_cfg_access;
+ lsm6dso_emb_func_en_b_t emb_func_en_b;
+ lsm6dso_fsm_enable_a_t fsm_enable_a;
+ lsm6dso_fsm_enable_b_t fsm_enable_b;
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_ctrl2_ois_t ctrl2_ois;
+ lsm6dso_ctrl3_ois_t ctrl3_ois;
+ lsm6dso_ctrl1_xl_t ctrl1_xl;
+ lsm6dso_ctrl2_g_t ctrl2_g;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ lsm6dso_ctrl5_c_t ctrl5_c;
+ lsm6dso_ctrl6_c_t ctrl6_c;
+ lsm6dso_ctrl7_g_t ctrl7_g;
+
+ uint8_t reg[8];
+ int32_t ret;
+
+ ret = 0;
+
+ /* reading the registers of the device */
+ if( ctx != NULL ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, reg, 7);
+ bytecpy(( uint8_t*)&ctrl1_xl, ®[0]);
+ bytecpy(( uint8_t*)&ctrl2_g, ®[1]);
+ bytecpy(( uint8_t*)&ctrl3_c, ®[2]);
+ bytecpy(( uint8_t*)&ctrl4_c, ®[3]);
+ bytecpy(( uint8_t*)&ctrl5_c, ®[4]);
+ bytecpy(( uint8_t*)&ctrl6_c, ®[5]);
+ bytecpy(( uint8_t*)&ctrl7_g, ®[6]);
+ if ( ret == 0 ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS,
+ (uint8_t*)&func_cfg_access, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_ODR_CFG_B, reg, 1);
+ bytecpy(( uint8_t*)&emb_func_odr_cfg_b, ®[0]);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+ (uint8_t*)&emb_func_en_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_ENABLE_A, reg, 2);
+ bytecpy(( uint8_t*)&fsm_enable_a, ®[0]);
+ bytecpy(( uint8_t*)&fsm_enable_b, ®[1]);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+ }
+
+ if( aux_ctx != NULL ) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_CTRL1_OIS, reg, 3);
}
-
- return ret;
+ bytecpy(( uint8_t*)&ctrl1_ois, ®[0]);
+ bytecpy(( uint8_t*)&ctrl2_ois, ®[1]);
+ bytecpy(( uint8_t*)&ctrl3_ois, ®[2]);
+ }
+ else {
+ if( ctx != NULL ) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, reg, 3);
+ }
+ bytecpy(( uint8_t*)&ctrl1_ois, ®[0]);
+ bytecpy(( uint8_t*)&ctrl2_ois, ®[1]);
+ bytecpy(( uint8_t*)&ctrl3_ois, ®[2]);
+ }
+ }
+
+ /* fill the input structure */
+
+ /* get accelerometer configuration */
+ switch ( (ctrl5_c.xl_ulp_en << 5) | (ctrl6_c.xl_hm_mode << 4) |
+ ctrl1_xl.odr_xl ) {
+ case LSM6DSO_XL_UI_OFF:
+ val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+ break;
+ case LSM6DSO_XL_UI_12Hz5_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_HP;
+ break;
+ case LSM6DSO_XL_UI_26Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_52Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_104Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_208Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_416Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_416Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_833Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_833Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_1667Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_1667Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_3333Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_3333Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_6667Hz_HP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_6667Hz_HP;
+ break;
+ case LSM6DSO_XL_UI_1Hz6_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_LP;
+ break;
+ case LSM6DSO_XL_UI_12Hz5_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_LP;
+ break;
+ case LSM6DSO_XL_UI_26Hz_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_LP;
+ break;
+ case LSM6DSO_XL_UI_52Hz_LP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_LP;
+ break;
+ case LSM6DSO_XL_UI_104Hz_NM:
+ val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_NM;
+ break;
+ case LSM6DSO_XL_UI_208Hz_NM:
+ val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_NM;
+ break;
+ case LSM6DSO_XL_UI_1Hz6_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_1Hz6_ULP;
+ break;
+ case LSM6DSO_XL_UI_12Hz5_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_12Hz5_ULP;
+ break;
+ case LSM6DSO_XL_UI_26Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_26Hz_ULP;
+ break;
+ case LSM6DSO_XL_UI_52Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_52Hz_ULP;
+ break;
+ case LSM6DSO_XL_UI_104Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_104Hz_ULP;
+ break;
+ case LSM6DSO_XL_UI_208Hz_ULP:
+ val->ui.xl.odr = LSM6DSO_XL_UI_208Hz_ULP;
+ break;
+ default:
+ val->ui.xl.odr = LSM6DSO_XL_UI_OFF;
+ break;
+ }
+
+ switch ( ctrl1_xl.fs_xl ) {
+ case LSM6DSO_XL_UI_2g:
+ val->ui.xl.fs = LSM6DSO_XL_UI_2g;
+ break;
+ case LSM6DSO_XL_UI_4g:
+ val->ui.xl.fs = LSM6DSO_XL_UI_4g;
+ break;
+ case LSM6DSO_XL_UI_8g:
+ val->ui.xl.fs = LSM6DSO_XL_UI_8g;
+ break;
+ case LSM6DSO_XL_UI_16g:
+ val->ui.xl.fs = LSM6DSO_XL_UI_16g;
+ break;
+ default:
+ val->ui.xl.fs = LSM6DSO_XL_UI_2g;
+ break;
+ }
+
+ /* get gyroscope configuration */
+ switch ( (ctrl7_g.g_hm_mode << 4) | ctrl2_g.odr_g) {
+ case LSM6DSO_GY_UI_OFF:
+ val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+ break;
+ case LSM6DSO_GY_UI_12Hz5_LP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_LP;
+ break;
+ case LSM6DSO_GY_UI_12Hz5_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_12Hz5_HP;
+ break;
+ case LSM6DSO_GY_UI_26Hz_LP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_LP;
+ break;
+ case LSM6DSO_GY_UI_26Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_26Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_52Hz_LP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_LP;
+ break;
+ case LSM6DSO_GY_UI_52Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_52Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_104Hz_NM:
+ val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_NM;
+ break;
+ case LSM6DSO_GY_UI_104Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_104Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_208Hz_NM:
+ val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_NM;
+ break;
+ case LSM6DSO_GY_UI_208Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_208Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_416Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_416Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_833Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_833Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_1667Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_1667Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_3333Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_3333Hz_HP;
+ break;
+ case LSM6DSO_GY_UI_6667Hz_HP:
+ val->ui.gy.odr = LSM6DSO_GY_UI_6667Hz_HP;
+ break;
+ default:
+ val->ui.gy.odr = LSM6DSO_GY_UI_OFF;
+ break;
+ }
+
+ switch (ctrl2_g.fs_g) {
+ case LSM6DSO_GY_UI_125dps:
+ val->ui.gy.fs = LSM6DSO_GY_UI_125dps;
+ break;
+ case LSM6DSO_GY_UI_250dps:
+ val->ui.gy.fs = LSM6DSO_GY_UI_250dps;
+ break;
+ case LSM6DSO_GY_UI_500dps:
+ val->ui.gy.fs = LSM6DSO_GY_UI_500dps;
+ break;
+ case LSM6DSO_GY_UI_1000dps:
+ val->ui.gy.fs = LSM6DSO_GY_UI_1000dps;
+ break;
+ case LSM6DSO_GY_UI_2000dps:
+ val->ui.gy.fs = LSM6DSO_GY_UI_2000dps;
+ break;
+ default:
+ val->ui.gy.fs = LSM6DSO_GY_UI_125dps;
+ break;
+ }
+
+ /* get finite state machine configuration */
+ if ( (fsm_enable_a.fsm1_en | fsm_enable_a.fsm2_en | fsm_enable_a.fsm3_en |
+ fsm_enable_a.fsm4_en | fsm_enable_a.fsm5_en | fsm_enable_a.fsm6_en |
+ fsm_enable_a.fsm7_en | fsm_enable_a.fsm8_en | fsm_enable_b.fsm9_en |
+ fsm_enable_b.fsm10_en | fsm_enable_b.fsm11_en |
+ fsm_enable_b.fsm12_en | fsm_enable_b.fsm13_en |
+ fsm_enable_b.fsm14_en | fsm_enable_b.fsm15_en |
+ fsm_enable_b.fsm16_en) == PROPERTY_ENABLE ){
+ switch (emb_func_odr_cfg_b.fsm_odr) {
+ case LSM6DSO_FSM_12Hz5:
+ val->fsm.odr = LSM6DSO_FSM_12Hz5;
+ break;
+ case LSM6DSO_FSM_26Hz:
+ val->fsm.odr = LSM6DSO_FSM_26Hz;
+ break;
+ case LSM6DSO_FSM_52Hz:
+ val->fsm.odr = LSM6DSO_FSM_52Hz;
+ break;
+ case LSM6DSO_FSM_104Hz:
+ val->fsm.odr = LSM6DSO_FSM_104Hz;
+ break;
+ default:
+ val->fsm.odr = LSM6DSO_FSM_12Hz5;
+ break;
+ }
+
+ val->fsm.sens = LSM6DSO_FSM_XL_GY;
+ if (val->ui.gy.odr == LSM6DSO_GY_UI_OFF) {
+ val->fsm.sens = LSM6DSO_FSM_XL;
+ }
+ if (val->ui.xl.odr == LSM6DSO_XL_UI_OFF) {
+ val->fsm.sens = LSM6DSO_FSM_GY;
+ }
+ }
+ else {
+ val->fsm.sens = LSM6DSO_FSM_DISABLE;
+ }
+
+ /* get ois configuration */
+
+ /* OIS configuration mode */
+ switch ( ctrl7_g.ois_on_en ) {
+ case LSM6DSO_OIS_ONLY_AUX:
+ switch ( ctrl3_ois.fs_xl_ois ) {
+ case LSM6DSO_XL_OIS_2g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+ break;
+ case LSM6DSO_XL_OIS_4g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_4g;
+ break;
+ case LSM6DSO_XL_OIS_8g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_8g;
+ break;
+ case LSM6DSO_XL_OIS_16g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
+ break;
+ default:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+ break;
+ }
+ switch ( ctrl1_ois.mode4_en ) {
+ case LSM6DSO_XL_OIS_OFF:
+ val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+ break;
+ case LSM6DSO_XL_OIS_6667Hz_HP:
+ val->ois.xl.odr = LSM6DSO_XL_OIS_6667Hz_HP;
+ break;
+ default:
+ val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+ break;
+ }
+ switch ( ctrl1_ois.fs_g_ois ) {
+ case LSM6DSO_GY_OIS_250dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+ break;
+ case LSM6DSO_GY_OIS_500dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_500dps;
+ break;
+ case LSM6DSO_GY_OIS_1000dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_1000dps;
+ break;
+ case LSM6DSO_GY_OIS_2000dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_2000dps;
+ break;
+ default:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+ break;
+ }
+ switch ( ctrl1_ois.ois_en_spi2 ) {
+ case LSM6DSO_GY_OIS_OFF:
+ val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+ break;
+ case LSM6DSO_GY_OIS_6667Hz_HP:
+ val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
+ break;
+ default:
+ val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+ break;
+ }
+ val->ois.ctrl_md = LSM6DSO_OIS_ONLY_AUX;
+ break;
+ case LSM6DSO_OIS_MIXED:
+ switch ( ctrl3_ois.fs_xl_ois ) {
+ case LSM6DSO_XL_OIS_2g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+ break;
+ case LSM6DSO_XL_OIS_4g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_4g;
+ break;
+ case LSM6DSO_XL_OIS_8g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_8g;
+ break;
+ case LSM6DSO_XL_OIS_16g:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_16g;
+ break;
+ default:
+ val->ois.xl.fs = LSM6DSO_XL_OIS_2g;
+ break;
+ }
+ switch ( ctrl1_ois.mode4_en ) {
+ case LSM6DSO_XL_OIS_OFF:
+ val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+ break;
+ case LSM6DSO_XL_OIS_6667Hz_HP:
+ val->ois.xl.odr = LSM6DSO_XL_OIS_6667Hz_HP;
+ break;
+ default:
+ val->ois.xl.odr = LSM6DSO_XL_OIS_OFF;
+ break;
+ }
+ switch ( ctrl1_ois.fs_g_ois ) {
+ case LSM6DSO_GY_OIS_250dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+ break;
+ case LSM6DSO_GY_OIS_500dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_500dps;
+ break;
+ case LSM6DSO_GY_OIS_1000dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_1000dps;
+ break;
+ case LSM6DSO_GY_OIS_2000dps:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_2000dps;
+ break;
+ default:
+ val->ois.gy.fs = LSM6DSO_GY_OIS_250dps;
+ break;
+ }
+ switch ( ctrl1_ois.ois_en_spi2 ) {
+ case LSM6DSO_GY_OIS_OFF:
+ val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+ break;
+ case LSM6DSO_GY_OIS_6667Hz_HP:
+ val->ois.gy.odr = LSM6DSO_GY_OIS_6667Hz_HP;
+ break;
+ default:
+ val->ois.gy.odr = LSM6DSO_GY_OIS_OFF;
+ break;
+ }
+ val->ois.ctrl_md = LSM6DSO_OIS_MIXED;
+ break;
+ default:
+ ctrl1_ois.fs_g_ois = (uint8_t)val->ois.gy.fs;
+ ctrl1_ois.ois_en_spi2 = (uint8_t)val->ois.gy.odr | (uint8_t)val->ois.xl.odr;
+ ctrl1_ois.mode4_en = (uint8_t) val->ois.xl.odr;
+ ctrl3_ois.fs_xl_ois = (uint8_t)val->ois.xl.fs;
+ val->ois.ctrl_md = LSM6DSO_OIS_ONLY_AUX;
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Read data in engineering unit.[get]
+ *
+ * @param ctx communication interface handler.(ptr)
+ * @param md the sensor conversion parameters.(ptr)
+ *
+ */
+int32_t lsm6dso_data_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_md_t *md, lsm6dso_data_t *data)
+{
+ uint8_t buff[14];
+ int32_t ret;
+ uint8_t i;
+ uint8_t j;
+
+ ret = 0;
+
+ /* read data */
+ if( ctx != NULL ) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 14);
+ }
+ j = 0;
+
+ /* temperature conversion */
+ data->ui.heat.raw = (int16_t)buff[j+1U];
+ data->ui.heat.raw = ( ((int16_t)data->ui.heat.raw * (int16_t)256) + (int16_t)buff[j] );
+ j+=2U;
+ data->ui.heat.deg_c = lsm6dso_from_lsb_to_celsius((int16_t)data->ui.heat.raw);
+
+ /* angular rate conversion */
+ for (i = 0U; i < 3U; i++) {
+ data->ui.gy.raw[i] = (int16_t)buff[j+1U];
+ data->ui.gy.raw[i] = (data->ui.gy.raw[i] * 256) + (int16_t) buff[j];
+ j+=2U;
+ switch ( md->ui.gy.fs ) {
+ case LSM6DSO_GY_UI_250dps:
+ data->ui.gy.mdps[i] = lsm6dso_from_fs250_to_mdps(data->ui.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_125dps:
+ data->ui.gy.mdps[i] = lsm6dso_from_fs125_to_mdps(data->ui.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_500dps:
+ data->ui.gy.mdps[i] = lsm6dso_from_fs500_to_mdps(data->ui.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_1000dps:
+ data->ui.gy.mdps[i] = lsm6dso_from_fs1000_to_mdps(data->ui.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_2000dps:
+ data->ui.gy.mdps[i] = lsm6dso_from_fs2000_to_mdps(data->ui.gy.raw[i]);
+ break;
+ default:
+ data->ui.gy.mdps[i] = 0.0f;
+ break;
+ }
+ }
+
+ /* acceleration conversion */
+ for (i = 0U; i < 3U; i++) {
+ data->ui.xl.raw[i] = (int16_t)buff[j+1U];
+ data->ui.xl.raw[i] = (data->ui.xl.raw[i] * 256) + (int16_t) buff[j];
+ j+=2U;
+ switch ( md->ui.xl.fs ) {
+ case LSM6DSO_XL_UI_2g:
+ data->ui.xl.mg[i] =lsm6dso_from_fs2_to_mg(data->ui.xl.raw[i]);
+ break;
+ case LSM6DSO_XL_UI_4g:
+ data->ui.xl.mg[i] =lsm6dso_from_fs4_to_mg(data->ui.xl.raw[i]);
+ break;
+ case LSM6DSO_XL_UI_8g:
+ data->ui.xl.mg[i] =lsm6dso_from_fs8_to_mg(data->ui.xl.raw[i]);
+ break;
+ case LSM6DSO_XL_UI_16g:
+ data->ui.xl.mg[i] =lsm6dso_from_fs16_to_mg(data->ui.xl.raw[i]);
+ break;
+ default:
+ data->ui.xl.mg[i] = 0.0f;
+ break;
+ }
+
+ }
+
+ /* read data from ois chain */
+ if (aux_ctx != NULL) {
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(aux_ctx, LSM6DSO_OUTX_L_G, buff, 12);
+ }
+ }
+ j = 0;
+
+ /* ois angular rate conversion */
+ for (i = 0U; i < 3U; i++) {
+ data->ois.gy.raw[i] = (int16_t) buff[j+1U];
+ data->ois.gy.raw[i] = (data->ois.gy.raw[i] * 256) + (int16_t) buff[j];
+ j+=2U;
+ switch ( md->ois.gy.fs ) {
+ case LSM6DSO_GY_UI_250dps:
+ data->ois.gy.mdps[i] = lsm6dso_from_fs250_to_mdps(data->ois.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_125dps:
+ data->ois.gy.mdps[i] = lsm6dso_from_fs125_to_mdps(data->ois.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_500dps:
+ data->ois.gy.mdps[i] = lsm6dso_from_fs500_to_mdps(data->ois.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_1000dps:
+ data->ois.gy.mdps[i] = lsm6dso_from_fs1000_to_mdps(data->ois.gy.raw[i]);
+ break;
+ case LSM6DSO_GY_UI_2000dps:
+ data->ois.gy.mdps[i] = lsm6dso_from_fs2000_to_mdps(data->ois.gy.raw[i]);
+ break;
+ default:
+ data->ois.gy.mdps[i] = 0.0f;
+ break;
+ }
+ }
+
+ /* ois acceleration conversion */
+ for (i = 0U; i < 3U; i++) {
+ data->ois.xl.raw[i] = (int16_t) buff[j+1U];
+ data->ois.xl.raw[i] = (data->ois.xl.raw[i] * 256) + (int16_t) buff[j];
+ j+=2U;
+ switch ( md->ois.xl.fs ) {
+ case LSM6DSO_XL_UI_2g:
+ data->ois.xl.mg[i] =lsm6dso_from_fs2_to_mg(data->ois.xl.raw[i]);
+ break;
+ case LSM6DSO_XL_UI_4g:
+ data->ois.xl.mg[i] =lsm6dso_from_fs4_to_mg(data->ois.xl.raw[i]);
+ break;
+ case LSM6DSO_XL_UI_8g:
+ data->ois.xl.mg[i] =lsm6dso_from_fs8_to_mg(data->ois.xl.raw[i]);
+ break;
+ case LSM6DSO_XL_UI_16g:
+ data->ois.xl.mg[i] =lsm6dso_from_fs16_to_mg(data->ois.xl.raw[i]);
+ break;
+ default:
+ data->ois.xl.mg[i] = 0.0f;
+ break;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Embedded functions.[set]
+ *
+ * @param ctx read / write interface definitions
+ * @param val change the values of registers
+ * EMB_FUNC_EN_A e EMB_FUNC_EN_B.
+ *
+ */
+int32_t lsm6dso_embedded_sens_set(lsm6dso_ctx_t *ctx,
+ lsm6dso_emb_sens_t *val)
+{
+ lsm6dso_emb_func_en_a_t emb_func_en_a;
+ lsm6dso_emb_func_en_b_t emb_func_en_b;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+ (uint8_t*)&emb_func_en_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+ (uint8_t*)&emb_func_en_b, 1);
+
+ emb_func_en_b.fsm_en = val->fsm;
+ emb_func_en_a.tilt_en = val->tilt;
+ emb_func_en_a.pedo_en = val->step;
+ emb_func_en_b.pedo_adv_en = val->step_adv;
+ emb_func_en_a.sign_motion_en = val->sig_mot;
+ emb_func_en_b.fifo_compr_en = val->fifo_compr;
+
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+ (uint8_t*)&emb_func_en_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+ (uint8_t*)&emb_func_en_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Embedded functions.[get]
+ *
+ * @param ctx read / write interface definitions
+ * @param val get the values of registers
+ * EMB_FUNC_EN_A e EMB_FUNC_EN_B.
+ *
+ */
+int32_t lsm6dso_embedded_sens_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_emb_sens_t *emb_sens)
+{
+ lsm6dso_emb_func_en_a_t emb_func_en_a;
+ lsm6dso_emb_func_en_b_t emb_func_en_b;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+ (uint8_t*)&emb_func_en_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+ (uint8_t*)&emb_func_en_b, 1);
+
+ emb_sens->fsm = emb_func_en_b.fsm_en;
+ emb_sens->tilt = emb_func_en_a.tilt_en;
+ emb_sens->step = emb_func_en_a.pedo_en;
+ emb_sens->step_adv = emb_func_en_b.pedo_adv_en;
+ emb_sens->sig_mot = emb_func_en_a.sign_motion_en;
+ emb_sens->fifo_compr = emb_func_en_b.fifo_compr_en;
+
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
+}
+
+/**
+ * @brief turn off all embedded functions.[get]
+ *
+ * @param ctx read / write interface definitions
+ * @param val get the values of registers
+ * EMB_FUNC_EN_A e EMB_FUNC_EN_B.
+ *
+ */
+int32_t lsm6dso_embedded_sens_off(lsm6dso_ctx_t *ctx)
+{
+ lsm6dso_emb_func_en_a_t emb_func_en_a;
+ lsm6dso_emb_func_en_b_t emb_func_en_b;
+ int32_t ret;
+
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+ (uint8_t*)&emb_func_en_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+ (uint8_t*)&emb_func_en_b, 1);
+
+ emb_func_en_b.fsm_en = PROPERTY_DISABLE;
+ emb_func_en_a.tilt_en = PROPERTY_DISABLE;
+ emb_func_en_a.pedo_en = PROPERTY_DISABLE;
+ emb_func_en_b.pedo_adv_en = PROPERTY_DISABLE;
+ emb_func_en_a.sign_motion_en = PROPERTY_DISABLE;
+ emb_func_en_b.fifo_compr_en = PROPERTY_DISABLE;
+
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_A,
+ (uint8_t*)&emb_func_en_a, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_EN_B,
+ (uint8_t*)&emb_func_en_b, 1);
+ }
+ if (ret == 0) {
+ ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
+ }
+
+ return ret;
}
/**
--- a/lsm6dso_reg.h Wed Jul 24 14:19:35 2019 +0000
+++ b/lsm6dso_reg.h Thu Oct 29 12:50:52 2020 +0000
@@ -1,50 +1,34 @@
/*
******************************************************************************
* @file lsm6dso_reg.h
- * @author Sensor Solutions Software Team
+ * @author Sensors Software Solution Team
* @brief This file contains all the functions prototypes for the
* lsm6dso_reg.c driver.
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
+ * <h2><center>© Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
-*/
+ ******************************************************************************
+ */
/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef LSM6DSO_DRIVER_H
-#define LSM6DSO_DRIVER_H
+#ifndef LSM6DSO_REGS_H
+#define LSM6DSO_REGS_H
#ifdef __cplusplus
-extern "C" {
+ extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
+#include <stddef.h>
#include <math.h>
/** @addtogroup LSM6DSO
@@ -52,7 +36,7 @@
*
*/
-/** @defgroup LSM6DSO_sensors_common_types
+/** @defgroup STMicroelectronics sensors common types
* @{
*
*/
@@ -113,6 +97,32 @@
#endif /* MEMS_SHARED_TYPES */
+#ifndef MEMS_UCF_SHARED_TYPES
+#define MEMS_UCF_SHARED_TYPES
+
+/** @defgroup Generic address-data structure definition
+ * @brief This structure is useful to load a predefined configuration
+ * of a sensor.
+ * You can create a sensor configuration by your own or using
+ * Unico / Unicleo tools available on STMicroelectronics
+ * web site.
+ *
+ * @{
+ *
+ */
+
+typedef struct {
+ uint8_t address;
+ uint8_t data;
+} ucf_line_t;
+
+/**
+ * @}
+ *
+ */
+
+#endif /* MEMS_UCF_SHARED_TYPES */
+
/**
* @}
*
@@ -161,243 +171,243 @@
#define LSM6DSO_FUNC_CFG_ACCESS 0x01U
typedef struct {
- uint8_t not_used_01 : 6;
- uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */
+ uint8_t not_used_01 : 6;
+ uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */
} lsm6dso_func_cfg_access_t;
#define LSM6DSO_PIN_CTRL 0x02U
typedef struct {
- uint8_t not_used_01 : 6;
- uint8_t sdo_pu_en : 1;
- uint8_t ois_pu_dis : 1;
+ uint8_t not_used_01 : 6;
+ uint8_t sdo_pu_en : 1;
+ uint8_t ois_pu_dis : 1;
} lsm6dso_pin_ctrl_t;
#define LSM6DSO_FIFO_CTRL1 0x07U
typedef struct {
- uint8_t wtm : 8;
+ uint8_t wtm : 8;
} lsm6dso_fifo_ctrl1_t;
#define LSM6DSO_FIFO_CTRL2 0x08U
typedef struct {
- uint8_t wtm : 1;
- uint8_t uncoptr_rate : 2;
- uint8_t not_used_01 : 1;
- uint8_t odrchg_en : 1;
- uint8_t not_used_02 : 1;
- uint8_t fifo_compr_rt_en : 1;
- uint8_t stop_on_wtm : 1;
+ uint8_t wtm : 1;
+ uint8_t uncoptr_rate : 2;
+ uint8_t not_used_01 : 1;
+ uint8_t odrchg_en : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t fifo_compr_rt_en : 1;
+ uint8_t stop_on_wtm : 1;
} lsm6dso_fifo_ctrl2_t;
#define LSM6DSO_FIFO_CTRL3 0x09U
typedef struct {
- uint8_t bdr_xl : 4;
- uint8_t bdr_gy : 4;
+ uint8_t bdr_xl : 4;
+ uint8_t bdr_gy : 4;
} lsm6dso_fifo_ctrl3_t;
#define LSM6DSO_FIFO_CTRL4 0x0AU
typedef struct {
- uint8_t fifo_mode : 3;
- uint8_t not_used_01 : 1;
- uint8_t odr_t_batch : 2;
- uint8_t odr_ts_batch : 2;
+ uint8_t fifo_mode : 3;
+ uint8_t not_used_01 : 1;
+ uint8_t odr_t_batch : 2;
+ uint8_t odr_ts_batch : 2;
} lsm6dso_fifo_ctrl4_t;
#define LSM6DSO_COUNTER_BDR_REG1 0x0BU
typedef struct {
- uint8_t cnt_bdr_th : 3;
- uint8_t not_used_01 : 2;
- uint8_t trig_counter_bdr : 1;
- uint8_t rst_counter_bdr : 1;
- uint8_t dataready_pulsed : 1;
+ uint8_t cnt_bdr_th : 3;
+ uint8_t not_used_01 : 2;
+ uint8_t trig_counter_bdr : 1;
+ uint8_t rst_counter_bdr : 1;
+ uint8_t dataready_pulsed : 1;
} lsm6dso_counter_bdr_reg1_t;
#define LSM6DSO_COUNTER_BDR_REG2 0x0CU
typedef struct {
- uint8_t cnt_bdr_th : 8;
+ uint8_t cnt_bdr_th : 8;
} lsm6dso_counter_bdr_reg2_t;
#define LSM6DSO_INT1_CTRL 0x0D
typedef struct {
- uint8_t int1_drdy_xl : 1;
- uint8_t int1_drdy_g : 1;
- uint8_t int1_boot : 1;
- uint8_t int1_fifo_th : 1;
- uint8_t int1_fifo_ovr : 1;
- uint8_t int1_fifo_full : 1;
- uint8_t int1_cnt_bdr : 1;
- uint8_t den_drdy_flag : 1;
+ uint8_t int1_drdy_xl : 1;
+ uint8_t int1_drdy_g : 1;
+ uint8_t int1_boot : 1;
+ uint8_t int1_fifo_th : 1;
+ uint8_t int1_fifo_ovr : 1;
+ uint8_t int1_fifo_full : 1;
+ uint8_t int1_cnt_bdr : 1;
+ uint8_t den_drdy_flag : 1;
} lsm6dso_int1_ctrl_t;
#define LSM6DSO_INT2_CTRL 0x0EU
typedef struct {
- uint8_t int2_drdy_xl : 1;
- uint8_t int2_drdy_g : 1;
- uint8_t int2_drdy_temp : 1;
- uint8_t int2_fifo_th : 1;
- uint8_t int2_fifo_ovr : 1;
- uint8_t int2_fifo_full : 1;
- uint8_t int2_cnt_bdr : 1;
- uint8_t not_used_01 : 1;
+ uint8_t int2_drdy_xl : 1;
+ uint8_t int2_drdy_g : 1;
+ uint8_t int2_drdy_temp : 1;
+ uint8_t int2_fifo_th : 1;
+ uint8_t int2_fifo_ovr : 1;
+ uint8_t int2_fifo_full : 1;
+ uint8_t int2_cnt_bdr : 1;
+ uint8_t not_used_01 : 1;
} lsm6dso_int2_ctrl_t;
#define LSM6DSO_WHO_AM_I 0x0FU
#define LSM6DSO_CTRL1_XL 0x10U
typedef struct {
- uint8_t not_used_01 : 1;
- uint8_t lpf2_xl_en : 1;
- uint8_t fs_xl : 2;
- uint8_t odr_xl : 4;
+ uint8_t not_used_01 : 1;
+ uint8_t lpf2_xl_en : 1;
+ uint8_t fs_xl : 2;
+ uint8_t odr_xl : 4;
} lsm6dso_ctrl1_xl_t;
#define LSM6DSO_CTRL2_G 0x11U
typedef struct {
- uint8_t not_used_01 : 1;
- uint8_t fs_g : 3; /* fs_125 + fs_g */
- uint8_t odr_g : 4;
+ uint8_t not_used_01 : 1;
+ uint8_t fs_g : 3; /* fs_125 + fs_g */
+ uint8_t odr_g : 4;
} lsm6dso_ctrl2_g_t;
#define LSM6DSO_CTRL3_C 0x12U
typedef struct {
- uint8_t sw_reset : 1;
- uint8_t not_used_01 : 1;
- uint8_t if_inc : 1;
- uint8_t sim : 1;
- uint8_t pp_od : 1;
- uint8_t h_lactive : 1;
- uint8_t bdu : 1;
- uint8_t boot : 1;
+ uint8_t sw_reset : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t if_inc : 1;
+ uint8_t sim : 1;
+ uint8_t pp_od : 1;
+ uint8_t h_lactive : 1;
+ uint8_t bdu : 1;
+ uint8_t boot : 1;
} lsm6dso_ctrl3_c_t;
#define LSM6DSO_CTRL4_C 0x13U
typedef struct {
- uint8_t not_used_01 : 1;
- uint8_t lpf1_sel_g : 1;
- uint8_t i2c_disable : 1;
- uint8_t drdy_mask : 1;
- uint8_t not_used_02 : 1;
- uint8_t int2_on_int1 : 1;
- uint8_t sleep_g : 1;
- uint8_t not_used_03 : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t lpf1_sel_g : 1;
+ uint8_t i2c_disable : 1;
+ uint8_t drdy_mask : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t int2_on_int1 : 1;
+ uint8_t sleep_g : 1;
+ uint8_t not_used_03 : 1;
} lsm6dso_ctrl4_c_t;
#define LSM6DSO_CTRL5_C 0x14U
typedef struct {
- uint8_t st_xl : 2;
- uint8_t st_g : 2;
- uint8_t not_used_01 : 1;
- uint8_t rounding : 2;
- uint8_t xl_ulp_en : 1;
+ uint8_t st_xl : 2;
+ uint8_t st_g : 2;
+ uint8_t not_used_01 : 1;
+ uint8_t rounding : 2;
+ uint8_t xl_ulp_en : 1;
} lsm6dso_ctrl5_c_t;
#define LSM6DSO_CTRL6_C 0x15U
typedef struct {
- uint8_t ftype : 3;
- uint8_t usr_off_w : 1;
- uint8_t xl_hm_mode : 1;
- uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */
+ uint8_t ftype : 3;
+ uint8_t usr_off_w : 1;
+ uint8_t xl_hm_mode : 1;
+ uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */
} lsm6dso_ctrl6_c_t;
#define LSM6DSO_CTRL7_G 0x16U
typedef struct {
- uint8_t ois_on : 1;
- uint8_t usr_off_on_out : 1;
- uint8_t ois_on_en : 1;
- uint8_t not_used_01 : 1;
- uint8_t hpm_g : 2;
- uint8_t hp_en_g : 1;
- uint8_t g_hm_mode : 1;
+ uint8_t ois_on : 1;
+ uint8_t usr_off_on_out : 1;
+ uint8_t ois_on_en : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t hpm_g : 2;
+ uint8_t hp_en_g : 1;
+ uint8_t g_hm_mode : 1;
} lsm6dso_ctrl7_g_t;
#define LSM6DSO_CTRL8_XL 0x17U
typedef struct {
- uint8_t low_pass_on_6d : 1;
- uint8_t xl_fs_mode : 1;
- uint8_t hp_slope_xl_en : 1;
- uint8_t fastsettl_mode_xl : 1;
- uint8_t hp_ref_mode_xl : 1;
- uint8_t hpcf_xl : 3;
+ uint8_t low_pass_on_6d : 1;
+ uint8_t xl_fs_mode : 1;
+ uint8_t hp_slope_xl_en : 1;
+ uint8_t fastsettl_mode_xl : 1;
+ uint8_t hp_ref_mode_xl : 1;
+ uint8_t hpcf_xl : 3;
} lsm6dso_ctrl8_xl_t;
#define LSM6DSO_CTRL9_XL 0x18U
typedef struct {
- uint8_t not_used_01 : 1;
- uint8_t i3c_disable : 1;
- uint8_t den_lh : 1;
- uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
- uint8_t den_z : 1;
- uint8_t den_y : 1;
- uint8_t den_x : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t i3c_disable : 1;
+ uint8_t den_lh : 1;
+ uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
+ uint8_t den_z : 1;
+ uint8_t den_y : 1;
+ uint8_t den_x : 1;
} lsm6dso_ctrl9_xl_t;
#define LSM6DSO_CTRL10_C 0x19U
typedef struct {
- uint8_t not_used_01 : 5;
- uint8_t timestamp_en : 1;
- uint8_t not_used_02 : 2;
+ uint8_t not_used_01 : 5;
+ uint8_t timestamp_en : 1;
+ uint8_t not_used_02 : 2;
} lsm6dso_ctrl10_c_t;
#define LSM6DSO_ALL_INT_SRC 0x1AU
typedef struct {
- uint8_t ff_ia : 1;
- uint8_t wu_ia : 1;
- uint8_t single_tap : 1;
- uint8_t double_tap : 1;
- uint8_t d6d_ia : 1;
- uint8_t sleep_change_ia : 1;
- uint8_t not_used_01 : 1;
- uint8_t timestamp_endcount : 1;
+ uint8_t ff_ia : 1;
+ uint8_t wu_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t d6d_ia : 1;
+ uint8_t sleep_change_ia : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t timestamp_endcount : 1;
} lsm6dso_all_int_src_t;
#define LSM6DSO_WAKE_UP_SRC 0x1BU
typedef struct {
- uint8_t z_wu : 1;
- uint8_t y_wu : 1;
- uint8_t x_wu : 1;
- uint8_t wu_ia : 1;
- uint8_t sleep_state : 1;
- uint8_t ff_ia : 1;
- uint8_t sleep_change_ia : 1;
- uint8_t not_used_01 : 1;
+ uint8_t z_wu : 1;
+ uint8_t y_wu : 1;
+ uint8_t x_wu : 1;
+ uint8_t wu_ia : 1;
+ uint8_t sleep_state : 1;
+ uint8_t ff_ia : 1;
+ uint8_t sleep_change_ia : 1;
+ uint8_t not_used_01 : 1;
} lsm6dso_wake_up_src_t;
#define LSM6DSO_TAP_SRC 0x1CU
typedef struct {
- uint8_t z_tap : 1;
- uint8_t y_tap : 1;
- uint8_t x_tap : 1;
- uint8_t tap_sign : 1;
- uint8_t double_tap : 1;
- uint8_t single_tap : 1;
- uint8_t tap_ia : 1;
- uint8_t not_used_02 : 1;
+ uint8_t z_tap : 1;
+ uint8_t y_tap : 1;
+ uint8_t x_tap : 1;
+ uint8_t tap_sign : 1;
+ uint8_t double_tap : 1;
+ uint8_t single_tap : 1;
+ uint8_t tap_ia : 1;
+ uint8_t not_used_02 : 1;
} lsm6dso_tap_src_t;
#define LSM6DSO_D6D_SRC 0x1DU
typedef struct {
- uint8_t xl : 1;
- uint8_t xh : 1;
- uint8_t yl : 1;
- uint8_t yh : 1;
- uint8_t zl : 1;
- uint8_t zh : 1;
- uint8_t d6d_ia : 1;
- uint8_t den_drdy : 1;
+ uint8_t xl : 1;
+ uint8_t xh : 1;
+ uint8_t yl : 1;
+ uint8_t yh : 1;
+ uint8_t zl : 1;
+ uint8_t zh : 1;
+ uint8_t d6d_ia : 1;
+ uint8_t den_drdy : 1;
} lsm6dso_d6d_src_t;
#define LSM6DSO_STATUS_REG 0x1EU
typedef struct {
- uint8_t xlda : 1;
- uint8_t gda : 1;
- uint8_t tda : 1;
- uint8_t not_used_01 : 5;
+ uint8_t xlda : 1;
+ uint8_t gda : 1;
+ uint8_t tda : 1;
+ uint8_t not_used_01 : 5;
} lsm6dso_status_reg_t;
#define LSM6DSO_STATUS_SPIAUX 0x1EU
typedef struct {
- uint8_t xlda : 1;
- uint8_t gda : 1;
- uint8_t gyro_settling : 1;
- uint8_t not_used_01 : 5;
+ uint8_t xlda : 1;
+ uint8_t gda : 1;
+ uint8_t gyro_settling : 1;
+ uint8_t not_used_01 : 5;
} lsm6dso_status_spiaux_t;
#define LSM6DSO_OUT_TEMP_L 0x20U
@@ -416,63 +426,63 @@
#define LSM6DSO_OUTZ_H_A 0x2DU
#define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE 0x35U
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t is_step_det : 1;
- uint8_t is_tilt : 1;
- uint8_t is_sigmot : 1;
- uint8_t not_used_02 : 1;
- uint8_t is_fsm_lc : 1;
+ uint8_t not_used_01 : 3;
+ uint8_t is_step_det : 1;
+ uint8_t is_tilt : 1;
+ uint8_t is_sigmot : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t is_fsm_lc : 1;
} lsm6dso_emb_func_status_mainpage_t;
#define LSM6DSO_FSM_STATUS_A_MAINPAGE 0x36U
typedef struct {
- uint8_t is_fsm1 : 1;
- uint8_t is_fsm2 : 1;
- uint8_t is_fsm3 : 1;
- uint8_t is_fsm4 : 1;
- uint8_t is_fsm5 : 1;
- uint8_t is_fsm6 : 1;
- uint8_t is_fsm7 : 1;
- uint8_t is_fsm8 : 1;
-} lsm6dso_fsm_status_a_mainpage_t;
+ uint8_t is_fsm1 : 1;
+ uint8_t is_fsm2 : 1;
+ uint8_t is_fsm3 : 1;
+ uint8_t is_fsm4 : 1;
+ uint8_t is_fsm5 : 1;
+ uint8_t is_fsm6 : 1;
+ uint8_t is_fsm7 : 1;
+ uint8_t is_fsm8 : 1;
+ } lsm6dso_fsm_status_a_mainpage_t;
#define LSM6DSO_FSM_STATUS_B_MAINPAGE 0x37U
typedef struct {
- uint8_t IS_FSM9 : 1;
- uint8_t IS_FSM10 : 1;
- uint8_t IS_FSM11 : 1;
- uint8_t IS_FSM12 : 1;
- uint8_t IS_FSM13 : 1;
- uint8_t IS_FSM14 : 1;
- uint8_t IS_FSM15 : 1;
- uint8_t IS_FSM16 : 1;
+ uint8_t is_fsm9 : 1;
+ uint8_t is_fsm10 : 1;
+ uint8_t is_fsm11 : 1;
+ uint8_t is_fsm12 : 1;
+ uint8_t is_fsm13 : 1;
+ uint8_t is_fsm14 : 1;
+ uint8_t is_fsm15 : 1;
+ uint8_t is_fsm16 : 1;
} lsm6dso_fsm_status_b_mainpage_t;
#define LSM6DSO_STATUS_MASTER_MAINPAGE 0x39U
typedef struct {
- uint8_t sens_hub_endop : 1;
- uint8_t not_used_01 : 2;
- uint8_t slave0_nack : 1;
- uint8_t slave1_nack : 1;
- uint8_t slave2_nack : 1;
- uint8_t slave3_nack : 1;
- uint8_t wr_once_done : 1;
+ uint8_t sens_hub_endop : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t slave0_nack : 1;
+ uint8_t slave1_nack : 1;
+ uint8_t slave2_nack : 1;
+ uint8_t slave3_nack : 1;
+ uint8_t wr_once_done : 1;
} lsm6dso_status_master_mainpage_t;
#define LSM6DSO_FIFO_STATUS1 0x3AU
typedef struct {
- uint8_t diff_fifo : 8;
+ uint8_t diff_fifo : 8;
} lsm6dso_fifo_status1_t;
#define LSM6DSO_FIFO_STATUS2 0x3B
typedef struct {
- uint8_t diff_fifo : 2;
- uint8_t not_used_01 : 1;
- uint8_t over_run_latched : 1;
- uint8_t counter_bdr_ia : 1;
- uint8_t fifo_full_ia : 1;
- uint8_t fifo_ovr_ia : 1;
- uint8_t fifo_wtm_ia : 1;
+ uint8_t diff_fifo : 2;
+ uint8_t not_used_01 : 1;
+ uint8_t over_run_latched : 1;
+ uint8_t counter_bdr_ia : 1;
+ uint8_t fifo_full_ia : 1;
+ uint8_t fifo_ovr_ia : 1;
+ uint8_t fifo_wtm_ia : 1;
} lsm6dso_fifo_status2_t;
#define LSM6DSO_TIMESTAMP0 0x40U
@@ -481,135 +491,135 @@
#define LSM6DSO_TIMESTAMP3 0x43U
#define LSM6DSO_TAP_CFG0 0x56U
typedef struct {
- uint8_t lir : 1;
- uint8_t tap_z_en : 1;
- uint8_t tap_y_en : 1;
- uint8_t tap_x_en : 1;
- uint8_t slope_fds : 1;
- uint8_t sleep_status_on_int : 1;
- uint8_t int_clr_on_read : 1;
- uint8_t not_used_01 : 1;
+ uint8_t lir : 1;
+ uint8_t tap_z_en : 1;
+ uint8_t tap_y_en : 1;
+ uint8_t tap_x_en : 1;
+ uint8_t slope_fds : 1;
+ uint8_t sleep_status_on_int : 1;
+ uint8_t int_clr_on_read : 1;
+ uint8_t not_used_01 : 1;
} lsm6dso_tap_cfg0_t;
#define LSM6DSO_TAP_CFG1 0x57U
typedef struct {
- uint8_t tap_ths_x : 5;
- uint8_t tap_priority : 3;
+ uint8_t tap_ths_x : 5;
+ uint8_t tap_priority : 3;
} lsm6dso_tap_cfg1_t;
#define LSM6DSO_TAP_CFG2 0x58U
typedef struct {
- uint8_t tap_ths_y : 5;
- uint8_t inact_en : 2;
- uint8_t interrupts_enable : 1;
+ uint8_t tap_ths_y : 5;
+ uint8_t inact_en : 2;
+ uint8_t interrupts_enable : 1;
} lsm6dso_tap_cfg2_t;
#define LSM6DSO_TAP_THS_6D 0x59U
typedef struct {
- uint8_t tap_ths_z : 5;
- uint8_t sixd_ths : 2;
- uint8_t d4d_en : 1;
+ uint8_t tap_ths_z : 5;
+ uint8_t sixd_ths : 2;
+ uint8_t d4d_en : 1;
} lsm6dso_tap_ths_6d_t;
#define LSM6DSO_INT_DUR2 0x5AU
typedef struct {
- uint8_t shock : 2;
- uint8_t quiet : 2;
- uint8_t dur : 4;
+ uint8_t shock : 2;
+ uint8_t quiet : 2;
+ uint8_t dur : 4;
} lsm6dso_int_dur2_t;
#define LSM6DSO_WAKE_UP_THS 0x5BU
typedef struct {
- uint8_t wk_ths : 6;
- uint8_t usr_off_on_wu : 1;
- uint8_t single_double_tap : 1;
+ uint8_t wk_ths : 6;
+ uint8_t usr_off_on_wu : 1;
+ uint8_t single_double_tap : 1;
} lsm6dso_wake_up_ths_t;
#define LSM6DSO_WAKE_UP_DUR 0x5CU
typedef struct {
- uint8_t sleep_dur : 4;
- uint8_t wake_ths_w : 1;
- uint8_t wake_dur : 2;
- uint8_t ff_dur : 1;
+ uint8_t sleep_dur : 4;
+ uint8_t wake_ths_w : 1;
+ uint8_t wake_dur : 2;
+ uint8_t ff_dur : 1;
} lsm6dso_wake_up_dur_t;
#define LSM6DSO_FREE_FALL 0x5DU
typedef struct {
- uint8_t ff_ths : 3;
- uint8_t ff_dur : 5;
+ uint8_t ff_ths : 3;
+ uint8_t ff_dur : 5;
} lsm6dso_free_fall_t;
#define LSM6DSO_MD1_CFG 0x5EU
typedef struct {
- uint8_t int1_shub : 1;
- uint8_t int1_emb_func : 1;
- uint8_t int1_6d : 1;
- uint8_t int1_double_tap : 1;
- uint8_t int1_ff : 1;
- uint8_t int1_wu : 1;
- uint8_t int1_single_tap : 1;
- uint8_t int1_sleep_change : 1;
+ uint8_t int1_shub : 1;
+ uint8_t int1_emb_func : 1;
+ uint8_t int1_6d : 1;
+ uint8_t int1_double_tap : 1;
+ uint8_t int1_ff : 1;
+ uint8_t int1_wu : 1;
+ uint8_t int1_single_tap : 1;
+ uint8_t int1_sleep_change : 1;
} lsm6dso_md1_cfg_t;
#define LSM6DSO_MD2_CFG 0x5FU
typedef struct {
- uint8_t int2_timestamp : 1;
- uint8_t int2_emb_func : 1;
- uint8_t int2_6d : 1;
- uint8_t int2_double_tap : 1;
- uint8_t int2_ff : 1;
- uint8_t int2_wu : 1;
- uint8_t int2_single_tap : 1;
- uint8_t int2_sleep_change : 1;
+ uint8_t int2_timestamp : 1;
+ uint8_t int2_emb_func : 1;
+ uint8_t int2_6d : 1;
+ uint8_t int2_double_tap : 1;
+ uint8_t int2_ff : 1;
+ uint8_t int2_wu : 1;
+ uint8_t int2_single_tap : 1;
+ uint8_t int2_sleep_change : 1;
} lsm6dso_md2_cfg_t;
#define LSM6DSO_I3C_BUS_AVB 0x62U
typedef struct {
- uint8_t pd_dis_int1 : 1;
- uint8_t not_used_01 : 2;
- uint8_t i3c_bus_avb_sel : 2;
- uint8_t not_used_02 : 3;
+ uint8_t pd_dis_int1 : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t i3c_bus_avb_sel : 2;
+ uint8_t not_used_02 : 3;
} lsm6dso_i3c_bus_avb_t;
#define LSM6DSO_INTERNAL_FREQ_FINE 0x63U
typedef struct {
- uint8_t freq_fine : 8;
+ uint8_t freq_fine : 8;
} lsm6dso_internal_freq_fine_t;
#define LSM6DSO_INT_OIS 0x6FU
typedef struct {
- uint8_t st_xl_ois : 2;
- uint8_t not_used_01 : 3;
- uint8_t den_lh_ois : 1;
- uint8_t lvl2_ois : 1;
- uint8_t int2_drdy_ois : 1;
+ uint8_t st_xl_ois : 2;
+ uint8_t not_used_01 : 3;
+ uint8_t den_lh_ois : 1;
+ uint8_t lvl2_ois : 1;
+ uint8_t int2_drdy_ois : 1;
} lsm6dso_int_ois_t;
#define LSM6DSO_CTRL1_OIS 0x70U
typedef struct {
- uint8_t ois_en_spi2 : 1;
- uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
- uint8_t mode4_en : 1;
- uint8_t sim_ois : 1;
- uint8_t lvl1_ois : 1;
- uint8_t not_used_01 : 1;
+ uint8_t ois_en_spi2 : 1;
+ uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
+ uint8_t mode4_en : 1;
+ uint8_t sim_ois : 1;
+ uint8_t lvl1_ois : 1;
+ uint8_t not_used_01 : 1;
} lsm6dso_ctrl1_ois_t;
#define LSM6DSO_CTRL2_OIS 0x71U
typedef struct {
- uint8_t hp_en_ois : 1;
- uint8_t ftype_ois : 2;
- uint8_t not_used_01 : 1;
- uint8_t hpm_ois : 2;
- uint8_t not_used_02 : 2;
+ uint8_t hp_en_ois : 1;
+ uint8_t ftype_ois : 2;
+ uint8_t not_used_01 : 1;
+ uint8_t hpm_ois : 2;
+ uint8_t not_used_02 : 2;
} lsm6dso_ctrl2_ois_t;
#define LSM6DSO_CTRL3_OIS 0x72U
typedef struct {
- uint8_t st_ois_clampdis : 1;
- uint8_t st_ois : 2;
- uint8_t filter_xl_conf_ois : 3;
- uint8_t fs_xl_ois : 2;
+ uint8_t st_ois_clampdis : 1;
+ uint8_t st_ois : 2;
+ uint8_t filter_xl_conf_ois : 3;
+ uint8_t fs_xl_ois : 2;
} lsm6dso_ctrl3_ois_t;
#define LSM6DSO_X_OFS_USR 0x73U
@@ -617,9 +627,9 @@
#define LSM6DSO_Z_OFS_USR 0x75U
#define LSM6DSO_FIFO_DATA_OUT_TAG 0x78U
typedef struct {
- uint8_t tag_parity : 1;
- uint8_t tag_cnt : 2;
- uint8_t tag_sensor : 5;
+ uint8_t tag_parity : 1;
+ uint8_t tag_cnt : 2;
+ uint8_t tag_sensor : 5;
} lsm6dso_fifo_data_out_tag_t;
#define LSM6DSO_FIFO_DATA_OUT_X_L 0x79U
@@ -630,413 +640,413 @@
#define LSM6DSO_FIFO_DATA_OUT_Z_H 0x7EU
#define LSM6DSO_PAGE_SEL 0x02U
typedef struct {
- uint8_t not_used_01 : 4;
- uint8_t page_sel : 4;
+ uint8_t not_used_01 : 4;
+ uint8_t page_sel : 4;
} lsm6dso_page_sel_t;
#define LSM6DSO_EMB_FUNC_EN_A 0x04U
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t pedo_en : 1;
- uint8_t tilt_en : 1;
- uint8_t sign_motion_en : 1;
- uint8_t not_used_02 : 2;
+ uint8_t not_used_01 : 3;
+ uint8_t pedo_en : 1;
+ uint8_t tilt_en : 1;
+ uint8_t sign_motion_en : 1;
+ uint8_t not_used_02 : 2;
} lsm6dso_emb_func_en_a_t;
#define LSM6DSO_EMB_FUNC_EN_B 0x05U
typedef struct {
- uint8_t fsm_en : 1;
- uint8_t not_used_01 : 2;
- uint8_t fifo_compr_en : 1;
- uint8_t pedo_adv_en : 1;
- uint8_t not_used_02 : 3;
+ uint8_t fsm_en : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t fifo_compr_en : 1;
+ uint8_t pedo_adv_en : 1;
+ uint8_t not_used_02 : 3;
} lsm6dso_emb_func_en_b_t;
#define LSM6DSO_PAGE_ADDRESS 0x08U
typedef struct {
- uint8_t page_addr : 8;
+ uint8_t page_addr : 8;
} lsm6dso_page_address_t;
#define LSM6DSO_PAGE_VALUE 0x09U
typedef struct {
- uint8_t page_value : 8;
+ uint8_t page_value : 8;
} lsm6dso_page_value_t;
#define LSM6DSO_EMB_FUNC_INT1 0x0AU
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t int1_step_detector : 1;
- uint8_t int1_tilt : 1;
- uint8_t int1_sig_mot : 1;
- uint8_t not_used_02 : 1;
- uint8_t int1_fsm_lc : 1;
+ uint8_t not_used_01 : 3;
+ uint8_t int1_step_detector : 1;
+ uint8_t int1_tilt : 1;
+ uint8_t int1_sig_mot : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t int1_fsm_lc : 1;
} lsm6dso_emb_func_int1_t;
#define LSM6DSO_FSM_INT1_A 0x0BU
typedef struct {
- uint8_t int1_fsm1 : 1;
- uint8_t int1_fsm2 : 1;
- uint8_t int1_fsm3 : 1;
- uint8_t int1_fsm4 : 1;
- uint8_t int1_fsm5 : 1;
- uint8_t int1_fsm6 : 1;
- uint8_t int1_fsm7 : 1;
- uint8_t int1_fsm8 : 1;
+ uint8_t int1_fsm1 : 1;
+ uint8_t int1_fsm2 : 1;
+ uint8_t int1_fsm3 : 1;
+ uint8_t int1_fsm4 : 1;
+ uint8_t int1_fsm5 : 1;
+ uint8_t int1_fsm6 : 1;
+ uint8_t int1_fsm7 : 1;
+ uint8_t int1_fsm8 : 1;
} lsm6dso_fsm_int1_a_t;
#define LSM6DSO_FSM_INT1_B 0x0CU
typedef struct {
- uint8_t int1_fsm9 : 1;
- uint8_t int1_fsm10 : 1;
- uint8_t int1_fsm11 : 1;
- uint8_t int1_fsm12 : 1;
- uint8_t int1_fsm13 : 1;
- uint8_t int1_fsm14 : 1;
- uint8_t int1_fsm15 : 1;
- uint8_t int1_fsm16 : 1;
+ uint8_t int1_fsm9 : 1;
+ uint8_t int1_fsm10 : 1;
+ uint8_t int1_fsm11 : 1;
+ uint8_t int1_fsm12 : 1;
+ uint8_t int1_fsm13 : 1;
+ uint8_t int1_fsm14 : 1;
+ uint8_t int1_fsm15 : 1;
+ uint8_t int1_fsm16 : 1;
} lsm6dso_fsm_int1_b_t;
#define LSM6DSO_EMB_FUNC_INT2 0x0EU
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t int2_step_detector : 1;
- uint8_t int2_tilt : 1;
- uint8_t int2_sig_mot : 1;
- uint8_t not_used_02 : 1;
- uint8_t int2_fsm_lc : 1;
+ uint8_t not_used_01 : 3;
+ uint8_t int2_step_detector : 1;
+ uint8_t int2_tilt : 1;
+ uint8_t int2_sig_mot : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t int2_fsm_lc : 1;
} lsm6dso_emb_func_int2_t;
#define LSM6DSO_FSM_INT2_A 0x0FU
typedef struct {
- uint8_t int2_fsm1 : 1;
- uint8_t int2_fsm2 : 1;
- uint8_t int2_fsm3 : 1;
- uint8_t int2_fsm4 : 1;
- uint8_t int2_fsm5 : 1;
- uint8_t int2_fsm6 : 1;
- uint8_t int2_fsm7 : 1;
- uint8_t int2_fsm8 : 1;
+ uint8_t int2_fsm1 : 1;
+ uint8_t int2_fsm2 : 1;
+ uint8_t int2_fsm3 : 1;
+ uint8_t int2_fsm4 : 1;
+ uint8_t int2_fsm5 : 1;
+ uint8_t int2_fsm6 : 1;
+ uint8_t int2_fsm7 : 1;
+ uint8_t int2_fsm8 : 1;
} lsm6dso_fsm_int2_a_t;
#define LSM6DSO_FSM_INT2_B 0x10U
typedef struct {
- uint8_t int2_fsm9 : 1;
- uint8_t int2_fsm10 : 1;
- uint8_t int2_fsm11 : 1;
- uint8_t int2_fsm12 : 1;
- uint8_t int2_fsm13 : 1;
- uint8_t int2_fsm14 : 1;
- uint8_t int2_fsm15 : 1;
- uint8_t int2_fsm16 : 1;
+ uint8_t int2_fsm9 : 1;
+ uint8_t int2_fsm10 : 1;
+ uint8_t int2_fsm11 : 1;
+ uint8_t int2_fsm12 : 1;
+ uint8_t int2_fsm13 : 1;
+ uint8_t int2_fsm14 : 1;
+ uint8_t int2_fsm15 : 1;
+ uint8_t int2_fsm16 : 1;
} lsm6dso_fsm_int2_b_t;
#define LSM6DSO_EMB_FUNC_STATUS 0x12U
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t is_step_det : 1;
- uint8_t is_tilt : 1;
- uint8_t is_sigmot : 1;
- uint8_t not_used_02 : 1;
- uint8_t is_fsm_lc : 1;
+ uint8_t not_used_01 : 3;
+ uint8_t is_step_det : 1;
+ uint8_t is_tilt : 1;
+ uint8_t is_sigmot : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t is_fsm_lc : 1;
} lsm6dso_emb_func_status_t;
#define LSM6DSO_FSM_STATUS_A 0x13U
typedef struct {
- uint8_t is_fsm1 : 1;
- uint8_t is_fsm2 : 1;
- uint8_t is_fsm3 : 1;
- uint8_t is_fsm4 : 1;
- uint8_t is_fsm5 : 1;
- uint8_t is_fsm6 : 1;
- uint8_t is_fsm7 : 1;
- uint8_t is_fsm8 : 1;
+ uint8_t is_fsm1 : 1;
+ uint8_t is_fsm2 : 1;
+ uint8_t is_fsm3 : 1;
+ uint8_t is_fsm4 : 1;
+ uint8_t is_fsm5 : 1;
+ uint8_t is_fsm6 : 1;
+ uint8_t is_fsm7 : 1;
+ uint8_t is_fsm8 : 1;
} lsm6dso_fsm_status_a_t;
#define LSM6DSO_FSM_STATUS_B 0x14U
typedef struct {
- uint8_t is_fsm9 : 1;
- uint8_t is_fsm10 : 1;
- uint8_t is_fsm11 : 1;
- uint8_t is_fsm12 : 1;
- uint8_t is_fsm13 : 1;
- uint8_t is_fsm14 : 1;
- uint8_t is_fsm15 : 1;
- uint8_t is_fsm16 : 1;
+ uint8_t is_fsm9 : 1;
+ uint8_t is_fsm10 : 1;
+ uint8_t is_fsm11 : 1;
+ uint8_t is_fsm12 : 1;
+ uint8_t is_fsm13 : 1;
+ uint8_t is_fsm14 : 1;
+ uint8_t is_fsm15 : 1;
+ uint8_t is_fsm16 : 1;
} lsm6dso_fsm_status_b_t;
#define LSM6DSO_PAGE_RW 0x17U
typedef struct {
- uint8_t not_used_01 : 5;
- uint8_t page_rw : 2; /* page_write + page_read */
- uint8_t emb_func_lir : 1;
+ uint8_t not_used_01 : 5;
+ uint8_t page_rw : 2; /* page_write + page_read */
+ uint8_t emb_func_lir : 1;
} lsm6dso_page_rw_t;
-#define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U
+#define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U
typedef struct {
- uint8_t not_used_00 : 6;
- uint8_t pedo_fifo_en : 1;
- uint8_t not_used_01 : 1;
+ uint8_t not_used_00 : 6;
+ uint8_t pedo_fifo_en : 1;
+ uint8_t not_used_01 : 1;
} lsm6dso_emb_func_fifo_cfg_t;
#define LSM6DSO_FSM_ENABLE_A 0x46U
typedef struct {
- uint8_t fsm1_en : 1;
- uint8_t fsm2_en : 1;
- uint8_t fsm3_en : 1;
- uint8_t fsm4_en : 1;
- uint8_t fsm5_en : 1;
- uint8_t fsm6_en : 1;
- uint8_t fsm7_en : 1;
- uint8_t fsm8_en : 1;
+ uint8_t fsm1_en : 1;
+ uint8_t fsm2_en : 1;
+ uint8_t fsm3_en : 1;
+ uint8_t fsm4_en : 1;
+ uint8_t fsm5_en : 1;
+ uint8_t fsm6_en : 1;
+ uint8_t fsm7_en : 1;
+ uint8_t fsm8_en : 1;
} lsm6dso_fsm_enable_a_t;
#define LSM6DSO_FSM_ENABLE_B 0x47U
typedef struct {
- uint8_t fsm9_en : 1;
- uint8_t fsm10_en : 1;
- uint8_t fsm11_en : 1;
- uint8_t fsm12_en : 1;
- uint8_t fsm13_en : 1;
- uint8_t fsm14_en : 1;
- uint8_t fsm15_en : 1;
- uint8_t fsm16_en : 1;
+ uint8_t fsm9_en : 1;
+ uint8_t fsm10_en : 1;
+ uint8_t fsm11_en : 1;
+ uint8_t fsm12_en : 1;
+ uint8_t fsm13_en : 1;
+ uint8_t fsm14_en : 1;
+ uint8_t fsm15_en : 1;
+ uint8_t fsm16_en : 1;
} lsm6dso_fsm_enable_b_t;
#define LSM6DSO_FSM_LONG_COUNTER_L 0x48U
#define LSM6DSO_FSM_LONG_COUNTER_H 0x49U
#define LSM6DSO_FSM_LONG_COUNTER_CLEAR 0x4AU
typedef struct {
- uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */
- uint8_t not_used_01 : 6;
+ uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */
+ uint8_t not_used_01 : 6;
} lsm6dso_fsm_long_counter_clear_t;
#define LSM6DSO_FSM_OUTS1 0x4CU
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs1_t;
#define LSM6DSO_FSM_OUTS2 0x4DU
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs2_t;
#define LSM6DSO_FSM_OUTS3 0x4EU
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs3_t;
#define LSM6DSO_FSM_OUTS4 0x4FU
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs4_t;
#define LSM6DSO_FSM_OUTS5 0x50U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs5_t;
#define LSM6DSO_FSM_OUTS6 0x51U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs6_t;
#define LSM6DSO_FSM_OUTS7 0x52U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs7_t;
#define LSM6DSO_FSM_OUTS8 0x53U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs8_t;
#define LSM6DSO_FSM_OUTS9 0x54U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs9_t;
#define LSM6DSO_FSM_OUTS10 0x55U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs10_t;
#define LSM6DSO_FSM_OUTS11 0x56U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs11_t;
#define LSM6DSO_FSM_OUTS12 0x57U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs12_t;
#define LSM6DSO_FSM_OUTS13 0x58U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs13_t;
#define LSM6DSO_FSM_OUTS14 0x59U
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs14_t;
#define LSM6DSO_FSM_OUTS15 0x5AU
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs15_t;
#define LSM6DSO_FSM_OUTS16 0x5BU
typedef struct {
- uint8_t n_v : 1;
- uint8_t p_v : 1;
- uint8_t n_z : 1;
- uint8_t p_z : 1;
- uint8_t n_y : 1;
- uint8_t p_y : 1;
- uint8_t n_x : 1;
- uint8_t p_x : 1;
+ uint8_t n_v : 1;
+ uint8_t p_v : 1;
+ uint8_t n_z : 1;
+ uint8_t p_z : 1;
+ uint8_t n_y : 1;
+ uint8_t p_y : 1;
+ uint8_t n_x : 1;
+ uint8_t p_x : 1;
} lsm6dso_fsm_outs16_t;
#define LSM6DSO_EMB_FUNC_ODR_CFG_B 0x5FU
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t fsm_odr : 2;
- uint8_t not_used_02 : 3;
+ uint8_t not_used_01 : 3;
+ uint8_t fsm_odr : 2;
+ uint8_t not_used_02 : 3;
} lsm6dso_emb_func_odr_cfg_b_t;
#define LSM6DSO_STEP_COUNTER_L 0x62U
#define LSM6DSO_STEP_COUNTER_H 0x63U
#define LSM6DSO_EMB_FUNC_SRC 0x64U
typedef struct {
- uint8_t not_used_01 : 2;
- uint8_t stepcounter_bit_set : 1;
- uint8_t step_overflow : 1;
- uint8_t step_count_delta_ia : 1;
- uint8_t step_detected : 1;
- uint8_t not_used_02 : 1;
- uint8_t pedo_rst_step : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t stepcounter_bit_set : 1;
+ uint8_t step_overflow : 1;
+ uint8_t step_count_delta_ia : 1;
+ uint8_t step_detected : 1;
+ uint8_t not_used_02 : 1;
+ uint8_t pedo_rst_step : 1;
} lsm6dso_emb_func_src_t;
#define LSM6DSO_EMB_FUNC_INIT_A 0x66U
typedef struct {
- uint8_t not_used_01 : 3;
- uint8_t step_det_init : 1;
- uint8_t tilt_init : 1;
- uint8_t sig_mot_init : 1;
- uint8_t not_used_02 : 2;
+ uint8_t not_used_01 : 3;
+ uint8_t step_det_init : 1;
+ uint8_t tilt_init : 1;
+ uint8_t sig_mot_init : 1;
+ uint8_t not_used_02 : 2;
} lsm6dso_emb_func_init_a_t;
#define LSM6DSO_EMB_FUNC_INIT_B 0x67U
typedef struct {
- uint8_t fsm_init : 1;
- uint8_t not_used_01 : 2;
- uint8_t fifo_compr_init : 1;
- uint8_t not_used_02 : 4;
+ uint8_t fsm_init : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t fifo_compr_init : 1;
+ uint8_t not_used_02 : 4;
} lsm6dso_emb_func_init_b_t;
#define LSM6DSO_MAG_SENSITIVITY_L 0xBAU
@@ -1061,16 +1071,16 @@
#define LSM6DSO_MAG_SI_ZZ_H 0xD1U
#define LSM6DSO_MAG_CFG_A 0xD4U
typedef struct {
- uint8_t mag_z_axis : 3;
- uint8_t not_used_01 : 1;
- uint8_t mag_y_axis : 3;
- uint8_t not_used_02 : 1;
+ uint8_t mag_z_axis : 3;
+ uint8_t not_used_01 : 1;
+ uint8_t mag_y_axis : 3;
+ uint8_t not_used_02 : 1;
} lsm6dso_mag_cfg_a_t;
#define LSM6DSO_MAG_CFG_B 0xD5U
typedef struct {
- uint8_t mag_x_axis : 3;
- uint8_t not_used_01 : 5;
+ uint8_t mag_x_axis : 3;
+ uint8_t not_used_01 : 5;
} lsm6dso_mag_cfg_b_t;
#define LSM6DSO_FSM_LC_TIMEOUT_L 0x17AU
@@ -1080,11 +1090,11 @@
#define LSM6DSO_FSM_START_ADD_H 0x17FU
#define LSM6DSO_PEDO_CMD_REG 0x183U
typedef struct {
- uint8_t ad_det_en : 1;
- uint8_t not_used_01 : 1;
- uint8_t fp_rejection_en : 1;
- uint8_t carry_count_en : 1;
- uint8_t not_used_02 : 4;
+ uint8_t ad_det_en : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t fp_rejection_en : 1;
+ uint8_t carry_count_en : 1;
+ uint8_t not_used_02 : 4;
} lsm6dso_pedo_cmd_reg_t;
#define LSM6DSO_PEDO_DEB_STEPS_CONF 0x184U
@@ -1092,318 +1102,318 @@
#define LSM6DSO_PEDO_SC_DELTAT_H 0x1D1U
#define LSM6DSO_SENSOR_HUB_1 0x02U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_1_t;
#define LSM6DSO_SENSOR_HUB_2 0x03U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_2_t;
#define LSM6DSO_SENSOR_HUB_3 0x04U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_3_t;
#define LSM6DSO_SENSOR_HUB_4 0x05U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_4_t;
#define LSM6DSO_SENSOR_HUB_5 0x06U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_5_t;
#define LSM6DSO_SENSOR_HUB_6 0x07U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_6_t;
#define LSM6DSO_SENSOR_HUB_7 0x08U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_7_t;
#define LSM6DSO_SENSOR_HUB_8 0x09U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_8_t;
#define LSM6DSO_SENSOR_HUB_9 0x0AU
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_9_t;
#define LSM6DSO_SENSOR_HUB_10 0x0BU
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_10_t;
#define LSM6DSO_SENSOR_HUB_11 0x0CU
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_11_t;
#define LSM6DSO_SENSOR_HUB_12 0x0DU
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_12_t;
#define LSM6DSO_SENSOR_HUB_13 0x0EU
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_13_t;
#define LSM6DSO_SENSOR_HUB_14 0x0FU
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_14_t;
#define LSM6DSO_SENSOR_HUB_15 0x10U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_15_t;
#define LSM6DSO_SENSOR_HUB_16 0x11U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_16_t;
#define LSM6DSO_SENSOR_HUB_17 0x12U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_17_t;
#define LSM6DSO_SENSOR_HUB_18 0x13U
typedef struct {
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} lsm6dso_sensor_hub_18_t;
#define LSM6DSO_MASTER_CONFIG 0x14U
typedef struct {
- uint8_t aux_sens_on : 2;
- uint8_t master_on : 1;
- uint8_t shub_pu_en : 1;
- uint8_t pass_through_mode : 1;
- uint8_t start_config : 1;
- uint8_t write_once : 1;
- uint8_t rst_master_regs : 1;
+ uint8_t aux_sens_on : 2;
+ uint8_t master_on : 1;
+ uint8_t shub_pu_en : 1;
+ uint8_t pass_through_mode : 1;
+ uint8_t start_config : 1;
+ uint8_t write_once : 1;
+ uint8_t rst_master_regs : 1;
} lsm6dso_master_config_t;
#define LSM6DSO_SLV0_ADD 0x15U
typedef struct {
- uint8_t rw_0 : 1;
- uint8_t slave0 : 7;
+ uint8_t rw_0 : 1;
+ uint8_t slave0 : 7;
} lsm6dso_slv0_add_t;
#define LSM6DSO_SLV0_SUBADD 0x16U
typedef struct {
- uint8_t slave0_reg : 8;
+ uint8_t slave0_reg : 8;
} lsm6dso_slv0_subadd_t;
#define LSM6DSO_SLV0_CONFIG 0x17U
typedef struct {
- uint8_t slave0_numop : 3;
- uint8_t batch_ext_sens_0_en : 1;
- uint8_t not_used_01 : 2;
- uint8_t shub_odr : 2;
+ uint8_t slave0_numop : 3;
+ uint8_t batch_ext_sens_0_en : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t shub_odr : 2;
} lsm6dso_slv0_config_t;
#define LSM6DSO_SLV1_ADD 0x18U
typedef struct {
- uint8_t r_1 : 1;
- uint8_t slave1_add : 7;
+ uint8_t r_1 : 1;
+ uint8_t slave1_add : 7;
} lsm6dso_slv1_add_t;
#define LSM6DSO_SLV1_SUBADD 0x19U
typedef struct {
- uint8_t slave1_reg : 8;
+ uint8_t slave1_reg : 8;
} lsm6dso_slv1_subadd_t;
#define LSM6DSO_SLV1_CONFIG 0x1AU
typedef struct {
- uint8_t slave1_numop : 3;
- uint8_t batch_ext_sens_1_en : 1;
- uint8_t not_used_01 : 4;
+ uint8_t slave1_numop : 3;
+ uint8_t batch_ext_sens_1_en : 1;
+ uint8_t not_used_01 : 4;
} lsm6dso_slv1_config_t;
#define LSM6DSO_SLV2_ADD 0x1BU
typedef struct {
- uint8_t r_2 : 1;
- uint8_t slave2_add : 7;
+ uint8_t r_2 : 1;
+ uint8_t slave2_add : 7;
} lsm6dso_slv2_add_t;
#define LSM6DSO_SLV2_SUBADD 0x1CU
typedef struct {
- uint8_t slave2_reg : 8;
+ uint8_t slave2_reg : 8;
} lsm6dso_slv2_subadd_t;
#define LSM6DSO_SLV2_CONFIG 0x1DU
typedef struct {
- uint8_t slave2_numop : 3;
- uint8_t batch_ext_sens_2_en : 1;
- uint8_t not_used_01 : 4;
+ uint8_t slave2_numop : 3;
+ uint8_t batch_ext_sens_2_en : 1;
+ uint8_t not_used_01 : 4;
} lsm6dso_slv2_config_t;
#define LSM6DSO_SLV3_ADD 0x1EU
typedef struct {
- uint8_t r_3 : 1;
- uint8_t slave3_add : 7;
+ uint8_t r_3 : 1;
+ uint8_t slave3_add : 7;
} lsm6dso_slv3_add_t;
#define LSM6DSO_SLV3_SUBADD 0x1FU
typedef struct {
- uint8_t slave3_reg : 8;
+ uint8_t slave3_reg : 8;
} lsm6dso_slv3_subadd_t;
#define LSM6DSO_SLV3_CONFIG 0x20U
typedef struct {
- uint8_t slave3_numop : 3;
- uint8_t batch_ext_sens_3_en : 1;
- uint8_t not_used_01 : 4;
+ uint8_t slave3_numop : 3;
+ uint8_t batch_ext_sens_3_en : 1;
+ uint8_t not_used_01 : 4;
} lsm6dso_slv3_config_t;
#define LSM6DSO_DATAWRITE_SLV0 0x21U
typedef struct {
- uint8_t slave0_dataw : 8;
+ uint8_t slave0_dataw : 8;
} lsm6dso_datawrite_src_mode_sub_slv0_t;
#define LSM6DSO_STATUS_MASTER 0x22U
typedef struct {
- uint8_t sens_hub_endop : 1;
- uint8_t not_used_01 : 2;
- uint8_t slave0_nack : 1;
- uint8_t slave1_nack : 1;
- uint8_t slave2_nack : 1;
- uint8_t slave3_nack : 1;
- uint8_t wr_once_done : 1;
+ uint8_t sens_hub_endop : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t slave0_nack : 1;
+ uint8_t slave1_nack : 1;
+ uint8_t slave2_nack : 1;
+ uint8_t slave3_nack : 1;
+ uint8_t wr_once_done : 1;
} lsm6dso_status_master_t;
#define LSM6DSO_START_FSM_ADD 0x0400U
@@ -1420,129 +1430,129 @@
* @{
*
*/
-typedef union {
- lsm6dso_func_cfg_access_t func_cfg_access;
- lsm6dso_pin_ctrl_t pin_ctrl;
- lsm6dso_fifo_ctrl1_t fifo_ctrl1;
- lsm6dso_fifo_ctrl2_t fifo_ctrl2;
- lsm6dso_fifo_ctrl3_t fifo_ctrl3;
- lsm6dso_fifo_ctrl4_t fifo_ctrl4;
- lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
- lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
- lsm6dso_int1_ctrl_t int1_ctrl;
- lsm6dso_int2_ctrl_t int2_ctrl;
- lsm6dso_ctrl1_xl_t ctrl1_xl;
- lsm6dso_ctrl2_g_t ctrl2_g;
- lsm6dso_ctrl3_c_t ctrl3_c;
- lsm6dso_ctrl4_c_t ctrl4_c;
- lsm6dso_ctrl5_c_t ctrl5_c;
- lsm6dso_ctrl6_c_t ctrl6_c;
- lsm6dso_ctrl7_g_t ctrl7_g;
- lsm6dso_ctrl8_xl_t ctrl8_xl;
- lsm6dso_ctrl9_xl_t ctrl9_xl;
- lsm6dso_ctrl10_c_t ctrl10_c;
- lsm6dso_all_int_src_t all_int_src;
- lsm6dso_wake_up_src_t wake_up_src;
- lsm6dso_tap_src_t tap_src;
- lsm6dso_d6d_src_t d6d_src;
- lsm6dso_status_reg_t status_reg;
- lsm6dso_status_spiaux_t status_spiaux;
- lsm6dso_fifo_status1_t fifo_status1;
- lsm6dso_fifo_status2_t fifo_status2;
- lsm6dso_tap_cfg0_t tap_cfg0;
- lsm6dso_tap_cfg1_t tap_cfg1;
- lsm6dso_tap_cfg2_t tap_cfg2;
- lsm6dso_tap_ths_6d_t tap_ths_6d;
- lsm6dso_int_dur2_t int_dur2;
- lsm6dso_wake_up_ths_t wake_up_ths;
- lsm6dso_wake_up_dur_t wake_up_dur;
- lsm6dso_free_fall_t free_fall;
- lsm6dso_md1_cfg_t md1_cfg;
- lsm6dso_md2_cfg_t md2_cfg;
- lsm6dso_i3c_bus_avb_t i3c_bus_avb;
- lsm6dso_internal_freq_fine_t internal_freq_fine;
- lsm6dso_int_ois_t int_ois;
- lsm6dso_ctrl1_ois_t ctrl1_ois;
- lsm6dso_ctrl2_ois_t ctrl2_ois;
- lsm6dso_ctrl3_ois_t ctrl3_ois;
- lsm6dso_fifo_data_out_tag_t fifo_data_out_tag;
- lsm6dso_page_sel_t page_sel;
- lsm6dso_emb_func_en_a_t emb_func_en_a;
- lsm6dso_emb_func_en_b_t emb_func_en_b;
- lsm6dso_page_address_t page_address;
- lsm6dso_page_value_t page_value;
- lsm6dso_emb_func_int1_t emb_func_int1;
- lsm6dso_fsm_int1_a_t fsm_int1_a;
- lsm6dso_fsm_int1_b_t fsm_int1_b;
- lsm6dso_emb_func_int2_t emb_func_int2;
- lsm6dso_fsm_int2_a_t fsm_int2_a;
- lsm6dso_fsm_int2_b_t fsm_int2_b;
- lsm6dso_emb_func_status_t emb_func_status;
- lsm6dso_fsm_status_a_t fsm_status_a;
- lsm6dso_fsm_status_b_t fsm_status_b;
- lsm6dso_page_rw_t page_rw;
- lsm6dso_emb_func_fifo_cfg_t emb_func_fifo_cfg;
- lsm6dso_fsm_enable_a_t fsm_enable_a;
- lsm6dso_fsm_enable_b_t fsm_enable_b;
- lsm6dso_fsm_long_counter_clear_t fsm_long_counter_clear;
- lsm6dso_fsm_outs1_t fsm_outs1;
- lsm6dso_fsm_outs2_t fsm_outs2;
- lsm6dso_fsm_outs3_t fsm_outs3;
- lsm6dso_fsm_outs4_t fsm_outs4;
- lsm6dso_fsm_outs5_t fsm_outs5;
- lsm6dso_fsm_outs6_t fsm_outs6;
- lsm6dso_fsm_outs7_t fsm_outs7;
- lsm6dso_fsm_outs8_t fsm_outs8;
- lsm6dso_fsm_outs9_t fsm_outs9;
- lsm6dso_fsm_outs10_t fsm_outs10;
- lsm6dso_fsm_outs11_t fsm_outs11;
- lsm6dso_fsm_outs12_t fsm_outs12;
- lsm6dso_fsm_outs13_t fsm_outs13;
- lsm6dso_fsm_outs14_t fsm_outs14;
- lsm6dso_fsm_outs15_t fsm_outs15;
- lsm6dso_fsm_outs16_t fsm_outs16;
- lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
- lsm6dso_emb_func_src_t emb_func_src;
- lsm6dso_emb_func_init_a_t emb_func_init_a;
- lsm6dso_emb_func_init_b_t emb_func_init_b;
- lsm6dso_mag_cfg_a_t mag_cfg_a;
- lsm6dso_mag_cfg_b_t mag_cfg_b;
- lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
- lsm6dso_sensor_hub_1_t sensor_hub_1;
- lsm6dso_sensor_hub_2_t sensor_hub_2;
- lsm6dso_sensor_hub_3_t sensor_hub_3;
- lsm6dso_sensor_hub_4_t sensor_hub_4;
- lsm6dso_sensor_hub_5_t sensor_hub_5;
- lsm6dso_sensor_hub_6_t sensor_hub_6;
- lsm6dso_sensor_hub_7_t sensor_hub_7;
- lsm6dso_sensor_hub_8_t sensor_hub_8;
- lsm6dso_sensor_hub_9_t sensor_hub_9;
- lsm6dso_sensor_hub_10_t sensor_hub_10;
- lsm6dso_sensor_hub_11_t sensor_hub_11;
- lsm6dso_sensor_hub_12_t sensor_hub_12;
- lsm6dso_sensor_hub_13_t sensor_hub_13;
- lsm6dso_sensor_hub_14_t sensor_hub_14;
- lsm6dso_sensor_hub_15_t sensor_hub_15;
- lsm6dso_sensor_hub_16_t sensor_hub_16;
- lsm6dso_sensor_hub_17_t sensor_hub_17;
- lsm6dso_sensor_hub_18_t sensor_hub_18;
- lsm6dso_master_config_t master_config;
- lsm6dso_slv0_add_t slv0_add;
- lsm6dso_slv0_subadd_t slv0_subadd;
- lsm6dso_slv0_config_t slv0_config;
- lsm6dso_slv1_add_t slv1_add;
- lsm6dso_slv1_subadd_t slv1_subadd;
- lsm6dso_slv1_config_t slv1_config;
- lsm6dso_slv2_add_t slv2_add;
- lsm6dso_slv2_subadd_t slv2_subadd;
- lsm6dso_slv2_config_t slv2_config;
- lsm6dso_slv3_add_t slv3_add;
- lsm6dso_slv3_subadd_t slv3_subadd;
- lsm6dso_slv3_config_t slv3_config;
- lsm6dso_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0;
- lsm6dso_status_master_t status_master;
- bitwise_t bitwise;
- uint8_t byte;
+typedef union{
+ lsm6dso_func_cfg_access_t func_cfg_access;
+ lsm6dso_pin_ctrl_t pin_ctrl;
+ lsm6dso_fifo_ctrl1_t fifo_ctrl1;
+ lsm6dso_fifo_ctrl2_t fifo_ctrl2;
+ lsm6dso_fifo_ctrl3_t fifo_ctrl3;
+ lsm6dso_fifo_ctrl4_t fifo_ctrl4;
+ lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
+ lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
+ lsm6dso_int1_ctrl_t int1_ctrl;
+ lsm6dso_int2_ctrl_t int2_ctrl;
+ lsm6dso_ctrl1_xl_t ctrl1_xl;
+ lsm6dso_ctrl2_g_t ctrl2_g;
+ lsm6dso_ctrl3_c_t ctrl3_c;
+ lsm6dso_ctrl4_c_t ctrl4_c;
+ lsm6dso_ctrl5_c_t ctrl5_c;
+ lsm6dso_ctrl6_c_t ctrl6_c;
+ lsm6dso_ctrl7_g_t ctrl7_g;
+ lsm6dso_ctrl8_xl_t ctrl8_xl;
+ lsm6dso_ctrl9_xl_t ctrl9_xl;
+ lsm6dso_ctrl10_c_t ctrl10_c;
+ lsm6dso_all_int_src_t all_int_src;
+ lsm6dso_wake_up_src_t wake_up_src;
+ lsm6dso_tap_src_t tap_src;
+ lsm6dso_d6d_src_t d6d_src;
+ lsm6dso_status_reg_t status_reg;
+ lsm6dso_status_spiaux_t status_spiaux;
+ lsm6dso_fifo_status1_t fifo_status1;
+ lsm6dso_fifo_status2_t fifo_status2;
+ lsm6dso_tap_cfg0_t tap_cfg0;
+ lsm6dso_tap_cfg1_t tap_cfg1;
+ lsm6dso_tap_cfg2_t tap_cfg2;
+ lsm6dso_tap_ths_6d_t tap_ths_6d;
+ lsm6dso_int_dur2_t int_dur2;
+ lsm6dso_wake_up_ths_t wake_up_ths;
+ lsm6dso_wake_up_dur_t wake_up_dur;
+ lsm6dso_free_fall_t free_fall;
+ lsm6dso_md1_cfg_t md1_cfg;
+ lsm6dso_md2_cfg_t md2_cfg;
+ lsm6dso_i3c_bus_avb_t i3c_bus_avb;
+ lsm6dso_internal_freq_fine_t internal_freq_fine;
+ lsm6dso_int_ois_t int_ois;
+ lsm6dso_ctrl1_ois_t ctrl1_ois;
+ lsm6dso_ctrl2_ois_t ctrl2_ois;
+ lsm6dso_ctrl3_ois_t ctrl3_ois;
+ lsm6dso_fifo_data_out_tag_t fifo_data_out_tag;
+ lsm6dso_page_sel_t page_sel;
+ lsm6dso_emb_func_en_a_t emb_func_en_a;
+ lsm6dso_emb_func_en_b_t emb_func_en_b;
+ lsm6dso_page_address_t page_address;
+ lsm6dso_page_value_t page_value;
+ lsm6dso_emb_func_int1_t emb_func_int1;
+ lsm6dso_fsm_int1_a_t fsm_int1_a;
+ lsm6dso_fsm_int1_b_t fsm_int1_b;
+ lsm6dso_emb_func_int2_t emb_func_int2;
+ lsm6dso_fsm_int2_a_t fsm_int2_a;
+ lsm6dso_fsm_int2_b_t fsm_int2_b;
+ lsm6dso_emb_func_status_t emb_func_status;
+ lsm6dso_fsm_status_a_t fsm_status_a;
+ lsm6dso_fsm_status_b_t fsm_status_b;
+ lsm6dso_page_rw_t page_rw;
+ lsm6dso_emb_func_fifo_cfg_t emb_func_fifo_cfg;
+ lsm6dso_fsm_enable_a_t fsm_enable_a;
+ lsm6dso_fsm_enable_b_t fsm_enable_b;
+ lsm6dso_fsm_long_counter_clear_t fsm_long_counter_clear;
+ lsm6dso_fsm_outs1_t fsm_outs1;
+ lsm6dso_fsm_outs2_t fsm_outs2;
+ lsm6dso_fsm_outs3_t fsm_outs3;
+ lsm6dso_fsm_outs4_t fsm_outs4;
+ lsm6dso_fsm_outs5_t fsm_outs5;
+ lsm6dso_fsm_outs6_t fsm_outs6;
+ lsm6dso_fsm_outs7_t fsm_outs7;
+ lsm6dso_fsm_outs8_t fsm_outs8;
+ lsm6dso_fsm_outs9_t fsm_outs9;
+ lsm6dso_fsm_outs10_t fsm_outs10;
+ lsm6dso_fsm_outs11_t fsm_outs11;
+ lsm6dso_fsm_outs12_t fsm_outs12;
+ lsm6dso_fsm_outs13_t fsm_outs13;
+ lsm6dso_fsm_outs14_t fsm_outs14;
+ lsm6dso_fsm_outs15_t fsm_outs15;
+ lsm6dso_fsm_outs16_t fsm_outs16;
+ lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
+ lsm6dso_emb_func_src_t emb_func_src;
+ lsm6dso_emb_func_init_a_t emb_func_init_a;
+ lsm6dso_emb_func_init_b_t emb_func_init_b;
+ lsm6dso_mag_cfg_a_t mag_cfg_a;
+ lsm6dso_mag_cfg_b_t mag_cfg_b;
+ lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
+ lsm6dso_sensor_hub_1_t sensor_hub_1;
+ lsm6dso_sensor_hub_2_t sensor_hub_2;
+ lsm6dso_sensor_hub_3_t sensor_hub_3;
+ lsm6dso_sensor_hub_4_t sensor_hub_4;
+ lsm6dso_sensor_hub_5_t sensor_hub_5;
+ lsm6dso_sensor_hub_6_t sensor_hub_6;
+ lsm6dso_sensor_hub_7_t sensor_hub_7;
+ lsm6dso_sensor_hub_8_t sensor_hub_8;
+ lsm6dso_sensor_hub_9_t sensor_hub_9;
+ lsm6dso_sensor_hub_10_t sensor_hub_10;
+ lsm6dso_sensor_hub_11_t sensor_hub_11;
+ lsm6dso_sensor_hub_12_t sensor_hub_12;
+ lsm6dso_sensor_hub_13_t sensor_hub_13;
+ lsm6dso_sensor_hub_14_t sensor_hub_14;
+ lsm6dso_sensor_hub_15_t sensor_hub_15;
+ lsm6dso_sensor_hub_16_t sensor_hub_16;
+ lsm6dso_sensor_hub_17_t sensor_hub_17;
+ lsm6dso_sensor_hub_18_t sensor_hub_18;
+ lsm6dso_master_config_t master_config;
+ lsm6dso_slv0_add_t slv0_add;
+ lsm6dso_slv0_subadd_t slv0_subadd;
+ lsm6dso_slv0_config_t slv0_config;
+ lsm6dso_slv1_add_t slv1_add;
+ lsm6dso_slv1_subadd_t slv1_subadd;
+ lsm6dso_slv1_config_t slv1_config;
+ lsm6dso_slv2_add_t slv2_add;
+ lsm6dso_slv2_subadd_t slv2_subadd;
+ lsm6dso_slv2_config_t slv2_config;
+ lsm6dso_slv3_add_t slv3_add;
+ lsm6dso_slv3_subadd_t slv3_subadd;
+ lsm6dso_slv3_config_t slv3_config;
+ lsm6dso_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0;
+ lsm6dso_status_master_t status_master;
+ bitwise_t bitwise;
+ uint8_t byte;
} lsm6dso_reg_t;
/**
@@ -1550,9 +1560,9 @@
*
*/
-int32_t lsm6dso_read_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data,
+int32_t lsm6dso_read_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t* data,
uint16_t len);
-int32_t lsm6dso_write_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t *data,
+int32_t lsm6dso_write_reg(lsm6dso_ctx_t *ctx, uint8_t reg, uint8_t* data,
uint16_t len);
extern float_t lsm6dso_from_fs2_to_mg(int16_t lsb);
@@ -1568,53 +1578,53 @@
extern float_t lsm6dso_from_lsb_to_nsec(int16_t lsb);
typedef enum {
- LSM6DSO_2g = 0,
- LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */
- LSM6DSO_4g = 2,
- LSM6DSO_8g = 3,
+ LSM6DSO_2g = 0,
+ LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */
+ LSM6DSO_4g = 2,
+ LSM6DSO_8g = 3,
} lsm6dso_fs_xl_t;
int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t val);
int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t *val);
typedef enum {
- LSM6DSO_XL_ODR_OFF = 0,
- LSM6DSO_XL_ODR_12Hz5 = 1,
- LSM6DSO_XL_ODR_26Hz = 2,
- LSM6DSO_XL_ODR_52Hz = 3,
- LSM6DSO_XL_ODR_104Hz = 4,
- LSM6DSO_XL_ODR_208Hz = 5,
- LSM6DSO_XL_ODR_417Hz = 6,
- LSM6DSO_XL_ODR_833Hz = 7,
- LSM6DSO_XL_ODR_1667Hz = 8,
- LSM6DSO_XL_ODR_3333Hz = 9,
- LSM6DSO_XL_ODR_6667Hz = 10,
- LSM6DSO_XL_ODR_6Hz5 = 11, /* (low power only) */
+ LSM6DSO_XL_ODR_OFF = 0,
+ LSM6DSO_XL_ODR_12Hz5 = 1,
+ LSM6DSO_XL_ODR_26Hz = 2,
+ LSM6DSO_XL_ODR_52Hz = 3,
+ LSM6DSO_XL_ODR_104Hz = 4,
+ LSM6DSO_XL_ODR_208Hz = 5,
+ LSM6DSO_XL_ODR_417Hz = 6,
+ LSM6DSO_XL_ODR_833Hz = 7,
+ LSM6DSO_XL_ODR_1667Hz = 8,
+ LSM6DSO_XL_ODR_3333Hz = 9,
+ LSM6DSO_XL_ODR_6667Hz = 10,
+ LSM6DSO_XL_ODR_1Hz6 = 11, /* (low power only) */
} lsm6dso_odr_xl_t;
int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val);
int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t *val);
typedef enum {
- LSM6DSO_250dps = 0,
- LSM6DSO_125dps = 1,
- LSM6DSO_500dps = 2,
- LSM6DSO_1000dps = 4,
- LSM6DSO_2000dps = 6,
+ LSM6DSO_250dps = 0,
+ LSM6DSO_125dps = 1,
+ LSM6DSO_500dps = 2,
+ LSM6DSO_1000dps = 4,
+ LSM6DSO_2000dps = 6,
} lsm6dso_fs_g_t;
int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val);
int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t *val);
typedef enum {
- LSM6DSO_GY_ODR_OFF = 0,
- LSM6DSO_GY_ODR_12Hz5 = 1,
- LSM6DSO_GY_ODR_26Hz = 2,
- LSM6DSO_GY_ODR_52Hz = 3,
- LSM6DSO_GY_ODR_104Hz = 4,
- LSM6DSO_GY_ODR_208Hz = 5,
- LSM6DSO_GY_ODR_417Hz = 6,
- LSM6DSO_GY_ODR_833Hz = 7,
- LSM6DSO_GY_ODR_1667Hz = 8,
- LSM6DSO_GY_ODR_3333Hz = 9,
- LSM6DSO_GY_ODR_6667Hz = 10,
+ LSM6DSO_GY_ODR_OFF = 0,
+ LSM6DSO_GY_ODR_12Hz5 = 1,
+ LSM6DSO_GY_ODR_26Hz = 2,
+ LSM6DSO_GY_ODR_52Hz = 3,
+ LSM6DSO_GY_ODR_104Hz = 4,
+ LSM6DSO_GY_ODR_208Hz = 5,
+ LSM6DSO_GY_ODR_417Hz = 6,
+ LSM6DSO_GY_ODR_833Hz = 7,
+ LSM6DSO_GY_ODR_1667Hz = 8,
+ LSM6DSO_GY_ODR_3333Hz = 9,
+ LSM6DSO_GY_ODR_6667Hz = 10,
} lsm6dso_odr_g_t;
int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val);
int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t *val);
@@ -1623,8 +1633,8 @@
int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_LSb_1mg = 0,
- LSM6DSO_LSb_16mg = 1,
+ LSM6DSO_LSb_1mg = 0,
+ LSM6DSO_LSb_16mg = 1,
} lsm6dso_usr_off_w_t;
int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx,
lsm6dso_usr_off_w_t val);
@@ -1632,9 +1642,9 @@
lsm6dso_usr_off_w_t *val);
typedef enum {
- LSM6DSO_HIGH_PERFORMANCE_MD = 0,
- LSM6DSO_LOW_NORMAL_POWER_MD = 1,
- LSM6DSO_ULTRA_LOW_POWER_MD = 2,
+ LSM6DSO_HIGH_PERFORMANCE_MD = 0,
+ LSM6DSO_LOW_NORMAL_POWER_MD = 1,
+ LSM6DSO_ULTRA_LOW_POWER_MD = 2,
} lsm6dso_xl_hm_mode_t;
int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_xl_hm_mode_t val);
@@ -1642,27 +1652,14 @@
lsm6dso_xl_hm_mode_t *val);
typedef enum {
- LSM6DSO_GY_HIGH_PERFORMANCE = 0,
- LSM6DSO_GY_NORMAL = 1,
+ LSM6DSO_GY_HIGH_PERFORMANCE = 0,
+ LSM6DSO_GY_NORMAL = 1,
} lsm6dso_g_hm_mode_t;
int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_g_hm_mode_t val);
int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_g_hm_mode_t *val);
-typedef struct {
- lsm6dso_all_int_src_t all_int_src;
- lsm6dso_wake_up_src_t wake_up_src;
- lsm6dso_tap_src_t tap_src;
- lsm6dso_d6d_src_t d6d_src;
- lsm6dso_status_reg_t status_reg;
- lsm6dso_emb_func_status_t emb_func_status;
- lsm6dso_fsm_status_a_t fsm_status_a;
- lsm6dso_fsm_status_b_t fsm_status_b;
-} lsm6dso_all_sources_t;
-int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
- lsm6dso_all_sources_t *val);
-
int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx,
lsm6dso_status_reg_t *val);
@@ -1684,21 +1681,23 @@
int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val);
int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t *ctx, uint8_t *val);
+int32_t lsm6dso_timestamp_rst(lsm6dso_ctx_t *ctx);
+
int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val);
int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t *ctx, uint8_t *val);
int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff);
typedef enum {
- LSM6DSO_NO_ROUND = 0,
- LSM6DSO_ROUND_XL = 1,
- LSM6DSO_ROUND_GY = 2,
- LSM6DSO_ROUND_GY_XL = 3,
+ LSM6DSO_NO_ROUND = 0,
+ LSM6DSO_ROUND_XL = 1,
+ LSM6DSO_ROUND_GY = 2,
+ LSM6DSO_ROUND_GY_XL = 3,
} lsm6dso_rounding_t;
int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx,
- lsm6dso_rounding_t val);
+ lsm6dso_rounding_t val);
int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx,
- lsm6dso_rounding_t *val);
+ lsm6dso_rounding_t *val);
int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff);
@@ -1716,9 +1715,9 @@
int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_USER_BANK = 0,
- LSM6DSO_SENSOR_HUB_BANK = 1,
- LSM6DSO_EMBEDDED_FUNC_BANK = 2,
+ LSM6DSO_USER_BANK = 0,
+ LSM6DSO_SENSOR_HUB_BANK = 1,
+ LSM6DSO_EMBEDDED_FUNC_BANK = 2,
} lsm6dso_reg_access_t;
int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val);
int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t *val);
@@ -1733,8 +1732,8 @@
uint8_t *val);
typedef enum {
- LSM6DSO_DRDY_LATCHED = 0,
- LSM6DSO_DRDY_PULSED = 1,
+ LSM6DSO_DRDY_LATCHED = 0,
+ LSM6DSO_DRDY_PULSED = 1,
} lsm6dso_dataready_pulsed_t;
int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_dataready_pulsed_t val);
@@ -1753,17 +1752,17 @@
int32_t lsm6dso_boot_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_XL_ST_DISABLE = 0,
- LSM6DSO_XL_ST_POSITIVE = 1,
- LSM6DSO_XL_ST_NEGATIVE = 2,
+ LSM6DSO_XL_ST_DISABLE = 0,
+ LSM6DSO_XL_ST_POSITIVE = 1,
+ LSM6DSO_XL_ST_NEGATIVE = 2,
} lsm6dso_st_xl_t;
int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val);
int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t *val);
typedef enum {
- LSM6DSO_GY_ST_DISABLE = 0,
- LSM6DSO_GY_ST_POSITIVE = 1,
- LSM6DSO_GY_ST_NEGATIVE = 3,
+ LSM6DSO_GY_ST_DISABLE = 0,
+ LSM6DSO_GY_ST_POSITIVE = 1,
+ LSM6DSO_GY_ST_NEGATIVE = 3,
} lsm6dso_st_g_t;
int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val);
int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t *val);
@@ -1780,14 +1779,14 @@
uint8_t *val);
typedef enum {
- LSM6DSO_ULTRA_LIGHT = 0,
- LSM6DSO_VERY_LIGHT = 1,
- LSM6DSO_LIGHT = 2,
- LSM6DSO_MEDIUM = 3,
- LSM6DSO_STRONG = 4, /* not available for data rate > 1k670Hz */
- LSM6DSO_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */
- LSM6DSO_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */
- LSM6DSO_XTREME = 7, /* not available for data rate > 1k670Hz */
+ LSM6DSO_ULTRA_LIGHT = 0,
+ LSM6DSO_VERY_LIGHT = 1,
+ LSM6DSO_LIGHT = 2,
+ LSM6DSO_MEDIUM = 3,
+ LSM6DSO_STRONG = 4, /* not available for data rate > 1k670Hz */
+ LSM6DSO_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */
+ LSM6DSO_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */
+ LSM6DSO_XTREME = 7, /* not available for data rate > 1k670Hz */
} lsm6dso_ftype_t;
int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
lsm6dso_ftype_t val);
@@ -1798,29 +1797,29 @@
int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00,
- LSM6DSO_SLOPE_ODR_DIV_4 = 0x10,
- LSM6DSO_HP_ODR_DIV_10 = 0x11,
- LSM6DSO_HP_ODR_DIV_20 = 0x12,
- LSM6DSO_HP_ODR_DIV_45 = 0x13,
- LSM6DSO_HP_ODR_DIV_100 = 0x14,
- LSM6DSO_HP_ODR_DIV_200 = 0x15,
- LSM6DSO_HP_ODR_DIV_400 = 0x16,
- LSM6DSO_HP_ODR_DIV_800 = 0x17,
- LSM6DSO_HP_REF_MD_ODR_DIV_10 = 0x31,
- LSM6DSO_HP_REF_MD_ODR_DIV_20 = 0x32,
- LSM6DSO_HP_REF_MD_ODR_DIV_45 = 0x33,
- LSM6DSO_HP_REF_MD_ODR_DIV_100 = 0x34,
- LSM6DSO_HP_REF_MD_ODR_DIV_200 = 0x35,
- LSM6DSO_HP_REF_MD_ODR_DIV_400 = 0x36,
- LSM6DSO_HP_REF_MD_ODR_DIV_800 = 0x37,
- LSM6DSO_LP_ODR_DIV_10 = 0x01,
- LSM6DSO_LP_ODR_DIV_20 = 0x02,
- LSM6DSO_LP_ODR_DIV_45 = 0x03,
- LSM6DSO_LP_ODR_DIV_100 = 0x04,
- LSM6DSO_LP_ODR_DIV_200 = 0x05,
- LSM6DSO_LP_ODR_DIV_400 = 0x06,
- LSM6DSO_LP_ODR_DIV_800 = 0x07,
+ LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00,
+ LSM6DSO_SLOPE_ODR_DIV_4 = 0x10,
+ LSM6DSO_HP_ODR_DIV_10 = 0x11,
+ LSM6DSO_HP_ODR_DIV_20 = 0x12,
+ LSM6DSO_HP_ODR_DIV_45 = 0x13,
+ LSM6DSO_HP_ODR_DIV_100 = 0x14,
+ LSM6DSO_HP_ODR_DIV_200 = 0x15,
+ LSM6DSO_HP_ODR_DIV_400 = 0x16,
+ LSM6DSO_HP_ODR_DIV_800 = 0x17,
+ LSM6DSO_HP_REF_MD_ODR_DIV_10 = 0x31,
+ LSM6DSO_HP_REF_MD_ODR_DIV_20 = 0x32,
+ LSM6DSO_HP_REF_MD_ODR_DIV_45 = 0x33,
+ LSM6DSO_HP_REF_MD_ODR_DIV_100 = 0x34,
+ LSM6DSO_HP_REF_MD_ODR_DIV_200 = 0x35,
+ LSM6DSO_HP_REF_MD_ODR_DIV_400 = 0x36,
+ LSM6DSO_HP_REF_MD_ODR_DIV_800 = 0x37,
+ LSM6DSO_LP_ODR_DIV_10 = 0x01,
+ LSM6DSO_LP_ODR_DIV_20 = 0x02,
+ LSM6DSO_LP_ODR_DIV_45 = 0x03,
+ LSM6DSO_LP_ODR_DIV_100 = 0x04,
+ LSM6DSO_LP_ODR_DIV_200 = 0x05,
+ LSM6DSO_LP_ODR_DIV_400 = 0x06,
+ LSM6DSO_LP_ODR_DIV_800 = 0x07,
} lsm6dso_hp_slope_xl_en_t;
int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx,
lsm6dso_hp_slope_xl_en_t val);
@@ -1831,29 +1830,29 @@
int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_USE_SLOPE = 0,
- LSM6DSO_USE_HPF = 1,
+ LSM6DSO_USE_SLOPE = 0,
+ LSM6DSO_USE_HPF = 1,
} lsm6dso_slope_fds_t;
int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx,
- lsm6dso_slope_fds_t val);
+ lsm6dso_slope_fds_t val);
int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx,
- lsm6dso_slope_fds_t *val);
+ lsm6dso_slope_fds_t *val);
typedef enum {
- LSM6DSO_HP_FILTER_NONE = 0x00,
- LSM6DSO_HP_FILTER_16mHz = 0x80,
- LSM6DSO_HP_FILTER_65mHz = 0x81,
- LSM6DSO_HP_FILTER_260mHz = 0x82,
- LSM6DSO_HP_FILTER_1Hz04 = 0x83,
+ LSM6DSO_HP_FILTER_NONE = 0x00,
+ LSM6DSO_HP_FILTER_16mHz = 0x80,
+ LSM6DSO_HP_FILTER_65mHz = 0x81,
+ LSM6DSO_HP_FILTER_260mHz = 0x82,
+ LSM6DSO_HP_FILTER_1Hz04 = 0x83,
} lsm6dso_hpm_g_t;
int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx,
- lsm6dso_hpm_g_t val);
+ lsm6dso_hpm_g_t val);
int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx,
- lsm6dso_hpm_g_t *val);
+ lsm6dso_hpm_g_t *val);
typedef enum {
- LSM6DSO_AUX_PULL_UP_DISC = 0,
- LSM6DSO_AUX_PULL_UP_CONNECT = 1,
+ LSM6DSO_AUX_PULL_UP_DISC = 0,
+ LSM6DSO_AUX_PULL_UP_CONNECT = 1,
} lsm6dso_ois_pu_dis_t;
int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_ois_pu_dis_t val);
@@ -1861,15 +1860,15 @@
lsm6dso_ois_pu_dis_t *val);
typedef enum {
- LSM6DSO_AUX_ON = 1,
- LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0,
+ LSM6DSO_AUX_ON = 1,
+ LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0,
} lsm6dso_ois_on_t;
int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val);
int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t *val);
typedef enum {
- LSM6DSO_USE_SAME_XL_FS = 0,
- LSM6DSO_USE_DIFFERENT_XL_FS = 1,
+ LSM6DSO_USE_SAME_XL_FS = 0,
+ LSM6DSO_USE_DIFFERENT_XL_FS = 1,
} lsm6dso_xl_fs_mode_t;
int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_xl_fs_mode_t val);
@@ -1886,9 +1885,9 @@
int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_AUX_XL_DISABLE = 0,
- LSM6DSO_AUX_XL_POS = 1,
- LSM6DSO_AUX_XL_NEG = 2,
+ LSM6DSO_AUX_XL_DISABLE = 0,
+ LSM6DSO_AUX_XL_POS = 1,
+ LSM6DSO_AUX_XL_NEG = 2,
} lsm6dso_st_xl_ois_t;
int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx,
lsm6dso_st_xl_ois_t val);
@@ -1896,8 +1895,8 @@
lsm6dso_st_xl_ois_t *val);
typedef enum {
- LSM6DSO_AUX_DEN_ACTIVE_LOW = 0,
- LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1,
+ LSM6DSO_AUX_DEN_ACTIVE_LOW = 0,
+ LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1,
} lsm6dso_den_lh_ois_t;
int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx,
lsm6dso_den_lh_ois_t val);
@@ -1905,9 +1904,9 @@
lsm6dso_den_lh_ois_t *val);
typedef enum {
- LSM6DSO_AUX_DEN_DISABLE = 0,
- LSM6DSO_AUX_DEN_LEVEL_LATCH = 3,
- LSM6DSO_AUX_DEN_LEVEL_TRIG = 2,
+ LSM6DSO_AUX_DEN_DISABLE = 0,
+ LSM6DSO_AUX_DEN_LEVEL_LATCH = 3,
+ LSM6DSO_AUX_DEN_LEVEL_TRIG = 2,
} lsm6dso_lvl2_ois_t;
int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val);
int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t *val);
@@ -1916,19 +1915,19 @@
int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_AUX_DISABLE = 0,
- LSM6DSO_MODE_3_GY = 1,
- LSM6DSO_MODE_4_GY_XL = 3,
+ LSM6DSO_AUX_DISABLE = 0,
+ LSM6DSO_MODE_3_GY = 1,
+ LSM6DSO_MODE_4_GY_XL = 3,
} lsm6dso_ois_en_spi2_t;
int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val);
int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val);
typedef enum {
- LSM6DSO_250dps_AUX = 0,
- LSM6DSO_125dps_AUX = 1,
- LSM6DSO_500dps_AUX = 2,
- LSM6DSO_1000dps_AUX = 4,
- LSM6DSO_2000dps_AUX = 6,
+ LSM6DSO_250dps_AUX = 0,
+ LSM6DSO_125dps_AUX = 1,
+ LSM6DSO_500dps_AUX = 2,
+ LSM6DSO_1000dps_AUX = 4,
+ LSM6DSO_2000dps_AUX = 6,
} lsm6dso_fs_g_ois_t;
int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx,
lsm6dso_fs_g_ois_t val);
@@ -1936,38 +1935,38 @@
lsm6dso_fs_g_ois_t *val);
typedef enum {
- LSM6DSO_AUX_SPI_4_WIRE = 0,
- LSM6DSO_AUX_SPI_3_WIRE = 1,
+ LSM6DSO_AUX_SPI_4_WIRE = 0,
+ LSM6DSO_AUX_SPI_3_WIRE = 1,
} lsm6dso_sim_ois_t;
int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val);
int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t *val);
typedef enum {
- LSM6DSO_351Hz39 = 0,
- LSM6DSO_236Hz63 = 1,
- LSM6DSO_172Hz70 = 2,
- LSM6DSO_937Hz91 = 3,
+ LSM6DSO_351Hz39 = 0,
+ LSM6DSO_236Hz63 = 1,
+ LSM6DSO_172Hz70 = 2,
+ LSM6DSO_937Hz91 = 3,
} lsm6dso_ftype_ois_t;
int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
- lsm6dso_ftype_ois_t val);
+ lsm6dso_ftype_ois_t val);
int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx,
- lsm6dso_ftype_ois_t *val);
+ lsm6dso_ftype_ois_t *val);
typedef enum {
- LSM6DSO_AUX_HP_DISABLE = 0x00,
- LSM6DSO_AUX_HP_Hz016 = 0x10,
- LSM6DSO_AUX_HP_Hz065 = 0x11,
- LSM6DSO_AUX_HP_Hz260 = 0x12,
- LSM6DSO_AUX_HP_1Hz040 = 0x13,
+ LSM6DSO_AUX_HP_DISABLE = 0x00,
+ LSM6DSO_AUX_HP_Hz016 = 0x10,
+ LSM6DSO_AUX_HP_Hz065 = 0x11,
+ LSM6DSO_AUX_HP_Hz260 = 0x12,
+ LSM6DSO_AUX_HP_1Hz040 = 0x13,
} lsm6dso_hpm_ois_t;
int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx,
- lsm6dso_hpm_ois_t val);
+ lsm6dso_hpm_ois_t val);
int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx,
- lsm6dso_hpm_ois_t *val);
+ lsm6dso_hpm_ois_t *val);
typedef enum {
- LSM6DSO_ENABLE_CLAMP = 0,
- LSM6DSO_DISABLE_CLAMP = 1,
+ LSM6DSO_ENABLE_CLAMP = 0,
+ LSM6DSO_DISABLE_CLAMP = 1,
} lsm6dso_st_ois_clampdis_t;
int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx,
lsm6dso_st_ois_clampdis_t val);
@@ -1975,9 +1974,9 @@
lsm6dso_st_ois_clampdis_t *val);
typedef enum {
- LSM6DSO_AUX_GY_DISABLE = 0,
- LSM6DSO_AUX_GY_POS = 1,
- LSM6DSO_AUX_GY_NEG = 3,
+ LSM6DSO_AUX_GY_DISABLE = 0,
+ LSM6DSO_AUX_GY_POS = 1,
+ LSM6DSO_AUX_GY_NEG = 3,
} lsm6dso_st_ois_t;
int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx,
lsm6dso_st_ois_t val);
@@ -1985,14 +1984,14 @@
lsm6dso_st_ois_t *val);
typedef enum {
- LSM6DSO_289Hz = 0,
- LSM6DSO_258Hz = 1,
- LSM6DSO_120Hz = 2,
- LSM6DSO_65Hz2 = 3,
- LSM6DSO_33Hz2 = 4,
- LSM6DSO_16Hz6 = 5,
- LSM6DSO_8Hz30 = 6,
- LSM6DSO_4Hz15 = 7,
+ LSM6DSO_289Hz = 0,
+ LSM6DSO_258Hz = 1,
+ LSM6DSO_120Hz = 2,
+ LSM6DSO_65Hz2 = 3,
+ LSM6DSO_33Hz2 = 4,
+ LSM6DSO_16Hz6 = 5,
+ LSM6DSO_8Hz30 = 6,
+ LSM6DSO_4Hz15 = 7,
} lsm6dso_filter_xl_conf_ois_t;
int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx,
lsm6dso_filter_xl_conf_ois_t val);
@@ -2000,10 +1999,10 @@
lsm6dso_filter_xl_conf_ois_t *val);
typedef enum {
- LSM6DSO_AUX_2g = 0,
- LSM6DSO_AUX_16g = 1,
- LSM6DSO_AUX_4g = 2,
- LSM6DSO_AUX_8g = 3,
+ LSM6DSO_AUX_2g = 0,
+ LSM6DSO_AUX_16g = 1,
+ LSM6DSO_AUX_4g = 2,
+ LSM6DSO_AUX_8g = 3,
} lsm6dso_fs_xl_ois_t;
int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx,
lsm6dso_fs_xl_ois_t val);
@@ -2011,8 +2010,8 @@
lsm6dso_fs_xl_ois_t *val);
typedef enum {
- LSM6DSO_PULL_UP_DISC = 0,
- LSM6DSO_PULL_UP_CONNECT = 1,
+ LSM6DSO_PULL_UP_DISC = 0,
+ LSM6DSO_PULL_UP_CONNECT = 1,
} lsm6dso_sdo_pu_en_t;
int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_sdo_pu_en_t val);
@@ -2020,15 +2019,15 @@
lsm6dso_sdo_pu_en_t *val);
typedef enum {
- LSM6DSO_SPI_4_WIRE = 0,
- LSM6DSO_SPI_3_WIRE = 1,
+ LSM6DSO_SPI_4_WIRE = 0,
+ LSM6DSO_SPI_3_WIRE = 1,
} lsm6dso_sim_t;
int32_t lsm6dso_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_t val);
int32_t lsm6dso_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_t *val);
typedef enum {
- LSM6DSO_I2C_ENABLE = 0,
- LSM6DSO_I2C_DISABLE = 1,
+ LSM6DSO_I2C_ENABLE = 0,
+ LSM6DSO_I2C_DISABLE = 1,
} lsm6dso_i2c_disable_t;
int32_t lsm6dso_i2c_interface_set(lsm6dso_ctx_t *ctx,
lsm6dso_i2c_disable_t val);
@@ -2036,11 +2035,11 @@
lsm6dso_i2c_disable_t *val);
typedef enum {
- LSM6DSO_I3C_DISABLE = 0x80,
- LSM6DSO_I3C_ENABLE_T_50us = 0x00,
- LSM6DSO_I3C_ENABLE_T_2us = 0x01,
- LSM6DSO_I3C_ENABLE_T_1ms = 0x02,
- LSM6DSO_I3C_ENABLE_T_25ms = 0x03,
+ LSM6DSO_I3C_DISABLE = 0x80,
+ LSM6DSO_I3C_ENABLE_T_50us = 0x00,
+ LSM6DSO_I3C_ENABLE_T_2us = 0x01,
+ LSM6DSO_I3C_ENABLE_T_1ms = 0x02,
+ LSM6DSO_I3C_ENABLE_T_25ms = 0x03,
} lsm6dso_i3c_disable_t;
int32_t lsm6dso_i3c_disable_set(lsm6dso_ctx_t *ctx,
lsm6dso_i3c_disable_t val);
@@ -2048,48 +2047,24 @@
lsm6dso_i3c_disable_t *val);
typedef enum {
- LSM6DSO_PULL_DOWN_DISC = 0,
- LSM6DSO_PULL_DOWN_CONNECT = 1,
+ LSM6DSO_PULL_DOWN_DISC = 0,
+ LSM6DSO_PULL_DOWN_CONNECT = 1,
} lsm6dso_int1_pd_en_t;
int32_t lsm6dso_int1_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_int1_pd_en_t val);
int32_t lsm6dso_int1_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_int1_pd_en_t *val);
-typedef struct {
- lsm6dso_int1_ctrl_t int1_ctrl;
- lsm6dso_md1_cfg_t md1_cfg;
- lsm6dso_emb_func_int1_t emb_func_int1;
- lsm6dso_fsm_int1_a_t fsm_int1_a;
- lsm6dso_fsm_int1_b_t fsm_int1_b;
-} lsm6dso_pin_int1_route_t;
-int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int1_route_t *val);
-int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int1_route_t *val);
-
-typedef struct {
- lsm6dso_int2_ctrl_t int2_ctrl;
- lsm6dso_md2_cfg_t md2_cfg;
- lsm6dso_emb_func_int2_t emb_func_int2;
- lsm6dso_fsm_int2_a_t fsm_int2_a;
- lsm6dso_fsm_int2_b_t fsm_int2_b;
-} lsm6dso_pin_int2_route_t;
-int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int2_route_t *val);
-int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx,
- lsm6dso_pin_int2_route_t *val);
-
typedef enum {
- LSM6DSO_PUSH_PULL = 0,
- LSM6DSO_OPEN_DRAIN = 1,
+ LSM6DSO_PUSH_PULL = 0,
+ LSM6DSO_OPEN_DRAIN = 1,
} lsm6dso_pp_od_t;
int32_t lsm6dso_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t val);
int32_t lsm6dso_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t *val);
typedef enum {
- LSM6DSO_ACTIVE_HIGH = 0,
- LSM6DSO_ACTIVE_LOW = 1,
+ LSM6DSO_ACTIVE_HIGH = 0,
+ LSM6DSO_ACTIVE_LOW = 1,
} lsm6dso_h_lactive_t;
int32_t lsm6dso_pin_polarity_set(lsm6dso_ctx_t *ctx,
lsm6dso_h_lactive_t val);
@@ -2100,22 +2075,22 @@
int32_t lsm6dso_all_on_int1_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_ALL_INT_PULSED = 0,
- LSM6DSO_BASE_LATCHED_EMB_PULSED = 1,
- LSM6DSO_BASE_PULSED_EMB_LATCHED = 2,
- LSM6DSO_ALL_INT_LATCHED = 3,
+ LSM6DSO_ALL_INT_PULSED = 0,
+ LSM6DSO_BASE_LATCHED_EMB_PULSED = 1,
+ LSM6DSO_BASE_PULSED_EMB_LATCHED = 2,
+ LSM6DSO_ALL_INT_LATCHED = 3,
} lsm6dso_lir_t;
int32_t lsm6dso_int_notification_set(lsm6dso_ctx_t *ctx, lsm6dso_lir_t val);
int32_t lsm6dso_int_notification_get(lsm6dso_ctx_t *ctx, lsm6dso_lir_t *val);
typedef enum {
- LSM6DSO_LSb_FS_DIV_64 = 0,
- LSM6DSO_LSb_FS_DIV_256 = 1,
+ LSM6DSO_LSb_FS_DIV_64 = 0,
+ LSM6DSO_LSb_FS_DIV_256 = 1,
} lsm6dso_wake_ths_w_t;
int32_t lsm6dso_wkup_ths_weight_set(lsm6dso_ctx_t *ctx,
- lsm6dso_wake_ths_w_t val);
+ lsm6dso_wake_ths_w_t val);
int32_t lsm6dso_wkup_ths_weight_get(lsm6dso_ctx_t *ctx,
- lsm6dso_wake_ths_w_t *val);
+ lsm6dso_wake_ths_w_t *val);
int32_t lsm6dso_wkup_threshold_set(lsm6dso_ctx_t *ctx, uint8_t val);
int32_t lsm6dso_wkup_threshold_get(lsm6dso_ctx_t *ctx, uint8_t *val);
@@ -2130,8 +2105,8 @@
int32_t lsm6dso_gy_sleep_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0,
- LSM6DSO_DRIVE_SLEEP_STATUS = 1,
+ LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0,
+ LSM6DSO_DRIVE_SLEEP_STATUS = 1,
} lsm6dso_sleep_status_on_int_t;
int32_t lsm6dso_act_pin_notification_set(lsm6dso_ctx_t *ctx,
lsm6dso_sleep_status_on_int_t val);
@@ -2139,10 +2114,10 @@
lsm6dso_sleep_status_on_int_t *val);
typedef enum {
- LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0,
- LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1,
- LSM6DSO_XL_12Hz5_GY_SLEEP = 2,
- LSM6DSO_XL_12Hz5_GY_PD = 3,
+ LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0,
+ LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1,
+ LSM6DSO_XL_12Hz5_GY_SLEEP = 2,
+ LSM6DSO_XL_12Hz5_GY_PD = 3,
} lsm6dso_inact_en_t;
int32_t lsm6dso_act_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t val);
int32_t lsm6dso_act_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t *val);
@@ -2163,12 +2138,12 @@
int32_t lsm6dso_tap_threshold_x_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_XYZ = 0,
- LSM6DSO_YXZ = 1,
- LSM6DSO_XZY = 2,
- LSM6DSO_ZYX = 3,
- LSM6DSO_YZX = 5,
- LSM6DSO_ZXY = 6,
+ LSM6DSO_XYZ = 0,
+ LSM6DSO_YXZ = 1,
+ LSM6DSO_XZY = 2,
+ LSM6DSO_ZYX = 3,
+ LSM6DSO_YZX = 5,
+ LSM6DSO_ZXY = 6,
} lsm6dso_tap_priority_t;
int32_t lsm6dso_tap_axis_priority_set(lsm6dso_ctx_t *ctx,
lsm6dso_tap_priority_t val);
@@ -2191,8 +2166,8 @@
int32_t lsm6dso_tap_dur_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_ONLY_SINGLE = 0,
- LSM6DSO_BOTH_SINGLE_DOUBLE = 1,
+ LSM6DSO_ONLY_SINGLE = 0,
+ LSM6DSO_BOTH_SINGLE_DOUBLE = 1,
} lsm6dso_single_double_tap_t;
int32_t lsm6dso_tap_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_single_double_tap_t val);
@@ -2200,10 +2175,10 @@
lsm6dso_single_double_tap_t *val);
typedef enum {
- LSM6DSO_DEG_80 = 0,
- LSM6DSO_DEG_70 = 1,
- LSM6DSO_DEG_60 = 2,
- LSM6DSO_DEG_50 = 3,
+ LSM6DSO_DEG_80 = 0,
+ LSM6DSO_DEG_70 = 1,
+ LSM6DSO_DEG_60 = 2,
+ LSM6DSO_DEG_50 = 3,
} lsm6dso_sixd_ths_t;
int32_t lsm6dso_6d_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t val);
int32_t lsm6dso_6d_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t *val);
@@ -2212,14 +2187,14 @@
int32_t lsm6dso_4d_mode_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_FF_TSH_156mg = 0,
- LSM6DSO_FF_TSH_219mg = 1,
- LSM6DSO_FF_TSH_250mg = 2,
- LSM6DSO_FF_TSH_312mg = 3,
- LSM6DSO_FF_TSH_344mg = 4,
- LSM6DSO_FF_TSH_406mg = 5,
- LSM6DSO_FF_TSH_469mg = 6,
- LSM6DSO_FF_TSH_500mg = 7,
+ LSM6DSO_FF_TSH_156mg = 0,
+ LSM6DSO_FF_TSH_219mg = 1,
+ LSM6DSO_FF_TSH_250mg = 2,
+ LSM6DSO_FF_TSH_312mg = 3,
+ LSM6DSO_FF_TSH_344mg = 4,
+ LSM6DSO_FF_TSH_406mg = 5,
+ LSM6DSO_FF_TSH_469mg = 6,
+ LSM6DSO_FF_TSH_500mg = 7,
} lsm6dso_ff_ths_t;
int32_t lsm6dso_ff_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t val);
int32_t lsm6dso_ff_threshold_get(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t *val);
@@ -2234,11 +2209,11 @@
int32_t lsm6dso_compression_algo_init_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_CMP_DISABLE = 0x00,
- LSM6DSO_CMP_ALWAYS = 0x04,
- LSM6DSO_CMP_8_TO_1 = 0x05,
- LSM6DSO_CMP_16_TO_1 = 0x06,
- LSM6DSO_CMP_32_TO_1 = 0x07,
+ LSM6DSO_CMP_DISABLE = 0x00,
+ LSM6DSO_CMP_ALWAYS = 0x04,
+ LSM6DSO_CMP_8_TO_1 = 0x05,
+ LSM6DSO_CMP_16_TO_1 = 0x06,
+ LSM6DSO_CMP_32_TO_1 = 0x07,
} lsm6dso_uncoptr_rate_t;
int32_t lsm6dso_compression_algo_set(lsm6dso_ctx_t *ctx,
lsm6dso_uncoptr_rate_t val);
@@ -2259,55 +2234,55 @@
int32_t lsm6dso_fifo_stop_on_wtm_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_XL_NOT_BATCHED = 0,
- LSM6DSO_XL_BATCHED_AT_12Hz5 = 1,
- LSM6DSO_XL_BATCHED_AT_26Hz = 2,
- LSM6DSO_XL_BATCHED_AT_52Hz = 3,
- LSM6DSO_XL_BATCHED_AT_104Hz = 4,
- LSM6DSO_XL_BATCHED_AT_208Hz = 5,
- LSM6DSO_XL_BATCHED_AT_417Hz = 6,
- LSM6DSO_XL_BATCHED_AT_833Hz = 7,
- LSM6DSO_XL_BATCHED_AT_1667Hz = 8,
- LSM6DSO_XL_BATCHED_AT_3333Hz = 9,
- LSM6DSO_XL_BATCHED_AT_6667Hz = 10,
- LSM6DSO_XL_BATCHED_AT_6Hz5 = 11,
+ LSM6DSO_XL_NOT_BATCHED = 0,
+ LSM6DSO_XL_BATCHED_AT_12Hz5 = 1,
+ LSM6DSO_XL_BATCHED_AT_26Hz = 2,
+ LSM6DSO_XL_BATCHED_AT_52Hz = 3,
+ LSM6DSO_XL_BATCHED_AT_104Hz = 4,
+ LSM6DSO_XL_BATCHED_AT_208Hz = 5,
+ LSM6DSO_XL_BATCHED_AT_417Hz = 6,
+ LSM6DSO_XL_BATCHED_AT_833Hz = 7,
+ LSM6DSO_XL_BATCHED_AT_1667Hz = 8,
+ LSM6DSO_XL_BATCHED_AT_3333Hz = 9,
+ LSM6DSO_XL_BATCHED_AT_6667Hz = 10,
+ LSM6DSO_XL_BATCHED_AT_6Hz5 = 11,
} lsm6dso_bdr_xl_t;
int32_t lsm6dso_fifo_xl_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t val);
int32_t lsm6dso_fifo_xl_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t *val);
typedef enum {
- LSM6DSO_GY_NOT_BATCHED = 0,
- LSM6DSO_GY_BATCHED_AT_12Hz5 = 1,
- LSM6DSO_GY_BATCHED_AT_26Hz = 2,
- LSM6DSO_GY_BATCHED_AT_52Hz = 3,
- LSM6DSO_GY_BATCHED_AT_104Hz = 4,
- LSM6DSO_GY_BATCHED_AT_208Hz = 5,
- LSM6DSO_GY_BATCHED_AT_417Hz = 6,
- LSM6DSO_GY_BATCHED_AT_833Hz = 7,
- LSM6DSO_GY_BATCHED_AT_1667Hz = 8,
- LSM6DSO_GY_BATCHED_AT_3333Hz = 9,
- LSM6DSO_GY_BATCHED_AT_6667Hz = 10,
- LSM6DSO_GY_BATCHED_AT_6Hz5 = 11,
+ LSM6DSO_GY_NOT_BATCHED = 0,
+ LSM6DSO_GY_BATCHED_AT_12Hz5 = 1,
+ LSM6DSO_GY_BATCHED_AT_26Hz = 2,
+ LSM6DSO_GY_BATCHED_AT_52Hz = 3,
+ LSM6DSO_GY_BATCHED_AT_104Hz = 4,
+ LSM6DSO_GY_BATCHED_AT_208Hz = 5,
+ LSM6DSO_GY_BATCHED_AT_417Hz = 6,
+ LSM6DSO_GY_BATCHED_AT_833Hz = 7,
+ LSM6DSO_GY_BATCHED_AT_1667Hz = 8,
+ LSM6DSO_GY_BATCHED_AT_3333Hz = 9,
+ LSM6DSO_GY_BATCHED_AT_6667Hz = 10,
+ LSM6DSO_GY_BATCHED_AT_6Hz5 = 11,
} lsm6dso_bdr_gy_t;
int32_t lsm6dso_fifo_gy_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t val);
int32_t lsm6dso_fifo_gy_batch_get(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t *val);
typedef enum {
- LSM6DSO_BYPASS_MODE = 0,
- LSM6DSO_FIFO_MODE = 1,
- LSM6DSO_STREAM_TO_FIFO_MODE = 3,
- LSM6DSO_BYPASS_TO_STREAM_MODE = 4,
- LSM6DSO_STREAM_MODE = 6,
- LSM6DSO_BYPASS_TO_FIFO_MODE = 7,
+ LSM6DSO_BYPASS_MODE = 0,
+ LSM6DSO_FIFO_MODE = 1,
+ LSM6DSO_STREAM_TO_FIFO_MODE = 3,
+ LSM6DSO_BYPASS_TO_STREAM_MODE = 4,
+ LSM6DSO_STREAM_MODE = 6,
+ LSM6DSO_BYPASS_TO_FIFO_MODE = 7,
} lsm6dso_fifo_mode_t;
int32_t lsm6dso_fifo_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t val);
int32_t lsm6dso_fifo_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t *val);
typedef enum {
- LSM6DSO_TEMP_NOT_BATCHED = 0,
- LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1,
- LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2,
- LSM6DSO_TEMP_BATCHED_AT_52Hz = 3,
+ LSM6DSO_TEMP_NOT_BATCHED = 0,
+ LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1,
+ LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2,
+ LSM6DSO_TEMP_BATCHED_AT_52Hz = 3,
} lsm6dso_odr_t_batch_t;
int32_t lsm6dso_fifo_temp_batch_set(lsm6dso_ctx_t *ctx,
lsm6dso_odr_t_batch_t val);
@@ -2315,10 +2290,10 @@
lsm6dso_odr_t_batch_t *val);
typedef enum {
- LSM6DSO_NO_DECIMATION = 0,
- LSM6DSO_DEC_1 = 1,
- LSM6DSO_DEC_8 = 2,
- LSM6DSO_DEC_32 = 3,
+ LSM6DSO_NO_DECIMATION = 0,
+ LSM6DSO_DEC_1 = 1,
+ LSM6DSO_DEC_8 = 2,
+ LSM6DSO_DEC_32 = 3,
} lsm6dso_odr_ts_batch_t;
int32_t lsm6dso_fifo_timestamp_decimation_set(lsm6dso_ctx_t *ctx,
lsm6dso_odr_ts_batch_t val);
@@ -2326,38 +2301,38 @@
lsm6dso_odr_ts_batch_t *val);
typedef enum {
- LSM6DSO_XL_BATCH_EVENT = 0,
- LSM6DSO_GYRO_BATCH_EVENT = 1,
+ LSM6DSO_XL_BATCH_EVENT = 0,
+ LSM6DSO_GYRO_BATCH_EVENT = 1,
} lsm6dso_trig_counter_bdr_t;
typedef enum {
- LSM6DSO_GYRO_NC_TAG = 1,
- LSM6DSO_XL_NC_TAG,
- LSM6DSO_TEMPERATURE_TAG,
- LSM6DSO_TIMESTAMP_TAG,
- LSM6DSO_CFG_CHANGE_TAG,
- LSM6DSO_XL_NC_T_2_TAG,
- LSM6DSO_XL_NC_T_1_TAG,
- LSM6DSO_XL_2XC_TAG,
- LSM6DSO_XL_3XC_TAG,
- LSM6DSO_GYRO_NC_T_2_TAG,
- LSM6DSO_GYRO_NC_T_1_TAG,
- LSM6DSO_GYRO_2XC_TAG,
- LSM6DSO_GYRO_3XC_TAG,
- LSM6DSO_SENSORHUB_SLAVE0_TAG,
- LSM6DSO_SENSORHUB_SLAVE1_TAG,
- LSM6DSO_SENSORHUB_SLAVE2_TAG,
- LSM6DSO_SENSORHUB_SLAVE3_TAG,
- LSM6DSO_STEP_CPUNTER_TAG,
- LSM6DSO_GAME_ROTATION_TAG,
- LSM6DSO_GEOMAG_ROTATION_TAG,
- LSM6DSO_ROTATION_TAG,
- LSM6DSO_SENSORHUB_NACK_TAG = 0x19,
+ LSM6DSO_GYRO_NC_TAG = 1,
+ LSM6DSO_XL_NC_TAG,
+ LSM6DSO_TEMPERATURE_TAG,
+ LSM6DSO_TIMESTAMP_TAG,
+ LSM6DSO_CFG_CHANGE_TAG,
+ LSM6DSO_XL_NC_T_2_TAG,
+ LSM6DSO_XL_NC_T_1_TAG,
+ LSM6DSO_XL_2XC_TAG,
+ LSM6DSO_XL_3XC_TAG,
+ LSM6DSO_GYRO_NC_T_2_TAG,
+ LSM6DSO_GYRO_NC_T_1_TAG,
+ LSM6DSO_GYRO_2XC_TAG,
+ LSM6DSO_GYRO_3XC_TAG,
+ LSM6DSO_SENSORHUB_SLAVE0_TAG,
+ LSM6DSO_SENSORHUB_SLAVE1_TAG,
+ LSM6DSO_SENSORHUB_SLAVE2_TAG,
+ LSM6DSO_SENSORHUB_SLAVE3_TAG,
+ LSM6DSO_STEP_CPUNTER_TAG,
+ LSM6DSO_GAME_ROTATION_TAG,
+ LSM6DSO_GEOMAG_ROTATION_TAG,
+ LSM6DSO_ROTATION_TAG,
+ LSM6DSO_SENSORHUB_NACK_TAG = 0x19,
} lsm6dso_fifo_tag_t;
int32_t lsm6dso_fifo_cnt_event_batch_set(lsm6dso_ctx_t *ctx,
- lsm6dso_trig_counter_bdr_t val);
+ lsm6dso_trig_counter_bdr_t val);
int32_t lsm6dso_fifo_cnt_event_batch_get(lsm6dso_ctx_t *ctx,
- lsm6dso_trig_counter_bdr_t *val);
+ lsm6dso_trig_counter_bdr_t *val);
int32_t lsm6dso_rst_batch_counter_set(lsm6dso_ctx_t *ctx, uint8_t val);
int32_t lsm6dso_rst_batch_counter_get(lsm6dso_ctx_t *ctx, uint8_t *val);
@@ -2379,7 +2354,7 @@
int32_t lsm6dso_fifo_wtm_flag_get(lsm6dso_ctx_t *ctx, uint8_t *val);
int32_t lsm6dso_fifo_sensor_tag_get(lsm6dso_ctx_t *ctx,
- lsm6dso_fifo_tag_t *val);
+ lsm6dso_fifo_tag_t *val);
int32_t lsm6dso_fifo_pedo_batch_set(lsm6dso_ctx_t *ctx, uint8_t val);
int32_t lsm6dso_fifo_pedo_batch_get(lsm6dso_ctx_t *ctx, uint8_t *val);
@@ -2397,26 +2372,26 @@
int32_t lsm6dso_sh_batch_slave_3_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_DEN_DISABLE = 0,
- LSM6DSO_LEVEL_FIFO = 6,
- LSM6DSO_LEVEL_LETCHED = 3,
- LSM6DSO_LEVEL_TRIGGER = 2,
- LSM6DSO_EDGE_TRIGGER = 4,
+ LSM6DSO_DEN_DISABLE = 0,
+ LSM6DSO_LEVEL_FIFO = 6,
+ LSM6DSO_LEVEL_LETCHED = 3,
+ LSM6DSO_LEVEL_TRIGGER = 2,
+ LSM6DSO_EDGE_TRIGGER = 4,
} lsm6dso_den_mode_t;
int32_t lsm6dso_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t val);
int32_t lsm6dso_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t *val);
typedef enum {
- LSM6DSO_DEN_ACT_LOW = 0,
- LSM6DSO_DEN_ACT_HIGH = 1,
+ LSM6DSO_DEN_ACT_LOW = 0,
+ LSM6DSO_DEN_ACT_HIGH = 1,
} lsm6dso_den_lh_t;
int32_t lsm6dso_den_polarity_set(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t val);
int32_t lsm6dso_den_polarity_get(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t *val);
typedef enum {
- LSM6DSO_STAMP_IN_GY_DATA = 0,
- LSM6DSO_STAMP_IN_XL_DATA = 1,
- LSM6DSO_STAMP_IN_GY_XL_DATA = 2,
+ LSM6DSO_STAMP_IN_GY_DATA = 0,
+ LSM6DSO_STAMP_IN_XL_DATA = 1,
+ LSM6DSO_STAMP_IN_GY_XL_DATA = 2,
} lsm6dso_den_xl_g_t;
int32_t lsm6dso_den_enable_set(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t val);
int32_t lsm6dso_den_enable_get(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t *val);
@@ -2431,11 +2406,9 @@
int32_t lsm6dso_den_mark_axis_z_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_PEDO_DISABLE = 0x00,
- LSM6DSO_PEDO_BASE_MODE = 0x01,
- LSM6DSO_PEDO_ADV_MODE = 0x03,
- LSM6DSO_FALSE_STEP_REJ = 0x13,
- LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x33,
+ LSM6DSO_PEDO_BASE_MODE = 0x00,
+ LSM6DSO_FALSE_STEP_REJ = 0x10,
+ LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x30,
} lsm6dso_pedo_md_t;
int32_t lsm6dso_pedo_sens_set(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t val);
int32_t lsm6dso_pedo_sens_get(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t *val);
@@ -2443,33 +2416,27 @@
int32_t lsm6dso_pedo_step_detect_get(lsm6dso_ctx_t *ctx, uint8_t *val);
int32_t lsm6dso_pedo_debounce_steps_set(lsm6dso_ctx_t *ctx,
- uint8_t *buff);
+ uint8_t *buff);
int32_t lsm6dso_pedo_debounce_steps_get(lsm6dso_ctx_t *ctx,
- uint8_t *buff);
+ uint8_t *buff);
int32_t lsm6dso_pedo_steps_period_set(lsm6dso_ctx_t *ctx, uint8_t *buff);
int32_t lsm6dso_pedo_steps_period_get(lsm6dso_ctx_t *ctx, uint8_t *buff);
typedef enum {
- LSM6DSO_EVERY_STEP = 0,
- LSM6DSO_COUNT_OVERFLOW = 1,
+ LSM6DSO_EVERY_STEP = 0,
+ LSM6DSO_COUNT_OVERFLOW = 1,
} lsm6dso_carry_count_en_t;
int32_t lsm6dso_pedo_int_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_carry_count_en_t val);
int32_t lsm6dso_pedo_int_mode_get(lsm6dso_ctx_t *ctx,
lsm6dso_carry_count_en_t *val);
-int32_t lsm6dso_motion_sens_set(lsm6dso_ctx_t *ctx, uint8_t val);
-int32_t lsm6dso_motion_sens_get(lsm6dso_ctx_t *ctx, uint8_t *val);
-
int32_t lsm6dso_motion_flag_data_ready_get(lsm6dso_ctx_t *ctx,
- uint8_t *val);
-
-int32_t lsm6dso_tilt_sens_set(lsm6dso_ctx_t *ctx, uint8_t val);
-int32_t lsm6dso_tilt_sens_get(lsm6dso_ctx_t *ctx, uint8_t *val);
+ uint8_t *val);
int32_t lsm6dso_tilt_flag_data_ready_get(lsm6dso_ctx_t *ctx,
- uint8_t *val);
+ uint8_t *val);
int32_t lsm6dso_mag_sensitivity_set(lsm6dso_ctx_t *ctx, uint8_t *buff);
int32_t lsm6dso_mag_sensitivity_get(lsm6dso_ctx_t *ctx, uint8_t *buff);
@@ -2481,50 +2448,47 @@
int32_t lsm6dso_mag_soft_iron_get(lsm6dso_ctx_t *ctx, uint8_t *buff);
typedef enum {
- LSM6DSO_Z_EQ_Y = 0,
- LSM6DSO_Z_EQ_MIN_Y = 1,
- LSM6DSO_Z_EQ_X = 2,
- LSM6DSO_Z_EQ_MIN_X = 3,
- LSM6DSO_Z_EQ_MIN_Z = 4,
- LSM6DSO_Z_EQ_Z = 5,
+ LSM6DSO_Z_EQ_Y = 0,
+ LSM6DSO_Z_EQ_MIN_Y = 1,
+ LSM6DSO_Z_EQ_X = 2,
+ LSM6DSO_Z_EQ_MIN_X = 3,
+ LSM6DSO_Z_EQ_MIN_Z = 4,
+ LSM6DSO_Z_EQ_Z = 5,
} lsm6dso_mag_z_axis_t;
int32_t lsm6dso_mag_z_orient_set(lsm6dso_ctx_t *ctx,
- lsm6dso_mag_z_axis_t val);
+ lsm6dso_mag_z_axis_t val);
int32_t lsm6dso_mag_z_orient_get(lsm6dso_ctx_t *ctx,
- lsm6dso_mag_z_axis_t *val);
+ lsm6dso_mag_z_axis_t *val);
typedef enum {
- LSM6DSO_Y_EQ_Y = 0,
- LSM6DSO_Y_EQ_MIN_Y = 1,
- LSM6DSO_Y_EQ_X = 2,
- LSM6DSO_Y_EQ_MIN_X = 3,
- LSM6DSO_Y_EQ_MIN_Z = 4,
- LSM6DSO_Y_EQ_Z = 5,
+ LSM6DSO_Y_EQ_Y = 0,
+ LSM6DSO_Y_EQ_MIN_Y = 1,
+ LSM6DSO_Y_EQ_X = 2,
+ LSM6DSO_Y_EQ_MIN_X = 3,
+ LSM6DSO_Y_EQ_MIN_Z = 4,
+ LSM6DSO_Y_EQ_Z = 5,
} lsm6dso_mag_y_axis_t;
int32_t lsm6dso_mag_y_orient_set(lsm6dso_ctx_t *ctx,
- lsm6dso_mag_y_axis_t val);
+ lsm6dso_mag_y_axis_t val);
int32_t lsm6dso_mag_y_orient_get(lsm6dso_ctx_t *ctx,
- lsm6dso_mag_y_axis_t *val);
+ lsm6dso_mag_y_axis_t *val);
typedef enum {
- LSM6DSO_X_EQ_Y = 0,
- LSM6DSO_X_EQ_MIN_Y = 1,
- LSM6DSO_X_EQ_X = 2,
- LSM6DSO_X_EQ_MIN_X = 3,
- LSM6DSO_X_EQ_MIN_Z = 4,
- LSM6DSO_X_EQ_Z = 5,
+ LSM6DSO_X_EQ_Y = 0,
+ LSM6DSO_X_EQ_MIN_Y = 1,
+ LSM6DSO_X_EQ_X = 2,
+ LSM6DSO_X_EQ_MIN_X = 3,
+ LSM6DSO_X_EQ_MIN_Z = 4,
+ LSM6DSO_X_EQ_Z = 5,
} lsm6dso_mag_x_axis_t;
int32_t lsm6dso_mag_x_orient_set(lsm6dso_ctx_t *ctx,
- lsm6dso_mag_x_axis_t val);
+ lsm6dso_mag_x_axis_t val);
int32_t lsm6dso_mag_x_orient_get(lsm6dso_ctx_t *ctx,
- lsm6dso_mag_x_axis_t *val);
+ lsm6dso_mag_x_axis_t *val);
int32_t lsm6dso_long_cnt_flag_data_ready_get(lsm6dso_ctx_t *ctx,
uint8_t *val);
-int32_t lsm6dso_emb_fsm_en_set(lsm6dso_ctx_t *ctx, uint8_t val);
-int32_t lsm6dso_emb_fsm_en_get(lsm6dso_ctx_t *ctx, uint8_t *val);
-
typedef struct {
lsm6dso_fsm_enable_a_t fsm_enable_a;
lsm6dso_fsm_enable_b_t fsm_enable_b;
@@ -2538,9 +2502,9 @@
int32_t lsm6dso_long_cnt_get(lsm6dso_ctx_t *ctx, uint8_t *buff);
typedef enum {
- LSM6DSO_LC_NORMAL = 0,
- LSM6DSO_LC_CLEAR = 1,
- LSM6DSO_LC_CLEAR_DONE = 2,
+ LSM6DSO_LC_NORMAL = 0,
+ LSM6DSO_LC_CLEAR = 1,
+ LSM6DSO_LC_CLEAR_DONE = 2,
} lsm6dso_fsm_lc_clr_t;
int32_t lsm6dso_long_clr_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t val);
int32_t lsm6dso_long_clr_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t *val);
@@ -2566,10 +2530,10 @@
int32_t lsm6dso_fsm_out_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_out_t *val);
typedef enum {
- LSM6DSO_ODR_FSM_12Hz5 = 0,
- LSM6DSO_ODR_FSM_26Hz = 1,
- LSM6DSO_ODR_FSM_52Hz = 2,
- LSM6DSO_ODR_FSM_104Hz = 3,
+ LSM6DSO_ODR_FSM_12Hz5 = 0,
+ LSM6DSO_ODR_FSM_26Hz = 1,
+ LSM6DSO_ODR_FSM_52Hz = 2,
+ LSM6DSO_ODR_FSM_104Hz = 3,
} lsm6dso_fsm_odr_t;
int32_t lsm6dso_fsm_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t val);
int32_t lsm6dso_fsm_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t *val);
@@ -2590,10 +2554,10 @@
uint8_t len);
typedef enum {
- LSM6DSO_SLV_0 = 0,
- LSM6DSO_SLV_0_1 = 1,
- LSM6DSO_SLV_0_1_2 = 2,
- LSM6DSO_SLV_0_1_2_3 = 3,
+ LSM6DSO_SLV_0 = 0,
+ LSM6DSO_SLV_0_1 = 1,
+ LSM6DSO_SLV_0_1_2 = 2,
+ LSM6DSO_SLV_0_1_2_3 = 3,
} lsm6dso_aux_sens_on_t;
int32_t lsm6dso_sh_slave_connected_set(lsm6dso_ctx_t *ctx,
lsm6dso_aux_sens_on_t val);
@@ -2604,8 +2568,8 @@
int32_t lsm6dso_sh_master_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_EXT_PULL_UP = 0,
- LSM6DSO_INTERNAL_PULL_UP = 1,
+ LSM6DSO_EXT_PULL_UP = 0,
+ LSM6DSO_INTERNAL_PULL_UP = 1,
} lsm6dso_shub_pu_en_t;
int32_t lsm6dso_sh_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t val);
int32_t lsm6dso_sh_pin_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t *val);
@@ -2614,8 +2578,8 @@
int32_t lsm6dso_sh_pass_through_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_EXT_ON_INT2_PIN = 0,
- LSM6DSO_XL_GY_DRDY = 1,
+ LSM6DSO_EXT_ON_INT2_PIN = 0,
+ LSM6DSO_XL_GY_DRDY = 1,
} lsm6dso_start_config_t;
int32_t lsm6dso_sh_syncro_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_start_config_t val);
@@ -2623,8 +2587,8 @@
lsm6dso_start_config_t *val);
typedef enum {
- LSM6DSO_EACH_SH_CYCLE = 0,
- LSM6DSO_ONLY_FIRST_CYCLE = 1,
+ LSM6DSO_EACH_SH_CYCLE = 0,
+ LSM6DSO_ONLY_FIRST_CYCLE = 1,
} lsm6dso_write_once_t;
int32_t lsm6dso_sh_write_mode_set(lsm6dso_ctx_t *ctx,
lsm6dso_write_once_t val);
@@ -2635,25 +2599,25 @@
int32_t lsm6dso_sh_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val);
typedef enum {
- LSM6DSO_SH_ODR_104Hz = 0,
- LSM6DSO_SH_ODR_52Hz = 1,
- LSM6DSO_SH_ODR_26Hz = 2,
- LSM6DSO_SH_ODR_13Hz = 3,
+ LSM6DSO_SH_ODR_104Hz = 0,
+ LSM6DSO_SH_ODR_52Hz = 1,
+ LSM6DSO_SH_ODR_26Hz = 2,
+ LSM6DSO_SH_ODR_13Hz = 3,
} lsm6dso_shub_odr_t;
int32_t lsm6dso_sh_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t val);
int32_t lsm6dso_sh_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t *val);
-typedef struct {
- uint8_t slv0_add;
- uint8_t slv0_subadd;
- uint8_t slv0_data;
+typedef struct{
+ uint8_t slv0_add;
+ uint8_t slv0_subadd;
+ uint8_t slv0_data;
} lsm6dso_sh_cfg_write_t;
int32_t lsm6dso_sh_cfg_write(lsm6dso_ctx_t *ctx, lsm6dso_sh_cfg_write_t *val);
-typedef struct {
- uint8_t slv_add;
- uint8_t slv_subadd;
- uint8_t slv_len;
+typedef struct{
+ uint8_t slv_add;
+ uint8_t slv_subadd;
+ uint8_t slv_len;
} lsm6dso_sh_cfg_read_t;
int32_t lsm6dso_sh_slv0_cfg_read(lsm6dso_ctx_t *ctx,
lsm6dso_sh_cfg_read_t *val);
@@ -2667,6 +2631,414 @@
int32_t lsm6dso_sh_status_get(lsm6dso_ctx_t *ctx,
lsm6dso_status_master_t *val);
+
+typedef struct {
+ uint8_t ui;
+ uint8_t aux;
+} lsm6dso_id_t;
+int32_t lsm6dso_id_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_id_t *val);
+
+typedef struct {
+ enum {
+ LSM6DSO_SEL_BY_HW = 0x00, /* bus mode select by HW (SPI 3W disable) */
+ LSM6DSO_SPI_4W = 0x06, /* Only SPI: SDO / SDI separated pins */
+ LSM6DSO_SPI_3W = 0x07, /* Only SPI: SDO / SDI share the same pin */
+ LSM6DSO_I2C = 0x04, /* Only I2C */
+ LSM6DSO_I3C_T_50us = 0x02, /* I3C: available time equal to 50 μs */
+ LSM6DSO_I3C_T_2us = 0x12, /* I3C: available time equal to 2 μs */
+ LSM6DSO_I3C_T_1ms = 0x22, /* I3C: available time equal to 1 ms */
+ LSM6DSO_I3C_T_25ms = 0x32, /* I3C: available time equal to 25 ms */
+ } ui_bus_md;
+ enum {
+ LSM6DSO_SPI_4W_AUX = 0x00,
+ LSM6DSO_SPI_3W_AUX = 0x01,
+ } aux_bus_md;
+} lsm6dso_bus_mode_t;
+int32_t lsm6dso_bus_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_bus_mode_t val);
+int32_t lsm6dso_bus_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_bus_mode_t *val);
+
+typedef enum {
+ LSM6DSO_DRV_RDY = 0x00, /* Initialize the device for driver usage */
+ LSM6DSO_BOOT = 0x01, /* Restore calib. param. ( it takes 10ms ) */
+ LSM6DSO_RESET = 0x02, /* Reset configuration registers */
+ LSM6DSO_FIFO_COMP = 0x04, /* FIFO compression initialization request. */
+ LSM6DSO_FSM = 0x08, /* Finite State Machine initialization request */
+ LSM6DSO_PEDO = 0x20, /* Pedometer algo initialization request. */
+ LSM6DSO_TILT = 0x40, /* Tilt algo initialization request */
+ LSM6DSO_SMOTION = 0x80, /* Significant Motion initialization request */
+} lsm6dso_init_t;
+int32_t lsm6dso_init_set(lsm6dso_ctx_t *ctx, lsm6dso_init_t val);
+
+typedef struct {
+ uint8_t sw_reset : 1; /* Restoring configuration registers */
+ uint8_t boot : 1; /* Restoring calibration parameters */
+ uint8_t drdy_xl : 1; /* Accelerometer data ready */
+ uint8_t drdy_g : 1; /* Gyroscope data ready */
+ uint8_t drdy_temp : 1; /* Temperature data ready */
+ uint8_t ois_drdy_xl : 1; /* Accelerometer data ready on OIS */
+ uint8_t ois_drdy_g : 1; /* Gyroscope data ready on OIS */
+ uint8_t ois_gyro_settling : 1; /* Gyroscope is in the settling phase */
+} lsm6dso_status_t;
+int32_t lsm6dso_status_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_status_t *val);
+
+typedef struct {
+ uint8_t sdo_sa0_pull_up : 1; /* 1 = pull-up on SDO/SA0 pin */
+ uint8_t aux_sdo_ocs_pull_up : 1; /* 1 = pull-up on OCS_Aux/SDO_Aux pins */
+ uint8_t int1_int2_push_pull : 1; /* 1 = push-pull / 0 = open-drain*/
+ uint8_t int1_pull_down : 1; /* 1 = pull-down always disabled (0=auto) */
+} lsm6dso_pin_conf_t;
+int32_t lsm6dso_pin_conf_set(lsm6dso_ctx_t *ctx, lsm6dso_pin_conf_t val);
+int32_t lsm6dso_pin_conf_get(lsm6dso_ctx_t *ctx, lsm6dso_pin_conf_t *val);
+
+typedef struct {
+ uint8_t active_low : 1; /* 1 = active low / 0 = active high */
+ uint8_t base_latched : 1; /* base functions are: FF, WU, 6D, Tap, Act/Inac */
+ uint8_t emb_latched : 1; /* emb functions are: Pedo, Tilt, SMot, Timestamp */
+} lsm6dso_int_mode_t;
+int32_t lsm6dso_interrupt_mode_set(lsm6dso_ctx_t *ctx,
+ lsm6dso_int_mode_t val);
+int32_t lsm6dso_interrupt_mode_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_int_mode_t *val);
+
+typedef struct {
+ uint8_t drdy_xl : 1; /* Accelerometer data ready */
+ uint8_t drdy_g : 1; /* Gyroscope data ready */
+ uint8_t drdy_temp : 1; /* Temperature data ready (1 = int2 pin disable) */
+ uint8_t boot : 1; /* Restoring calibration parameters */
+ uint8_t fifo_th : 1; /* FIFO threshold reached */
+ uint8_t fifo_ovr : 1; /* FIFO overrun */
+ uint8_t fifo_full : 1; /* FIFO full */
+ uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */
+ uint8_t den_flag : 1; /* external trigger level recognition (DEN) */
+ uint8_t sh_endop : 1; /* sensor hub end operation */
+ uint8_t timestamp : 1; /* timestamp overflow (1 = int2 pin disable) */
+ uint8_t six_d : 1; /* orientation change (6D/4D detection) */
+ uint8_t double_tap : 1; /* double-tap event */
+ uint8_t free_fall : 1; /* free fall event */
+ uint8_t wake_up : 1; /* wake up event */
+ uint8_t single_tap : 1; /* single-tap event */
+ uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */
+ uint8_t step_detector : 1; /* Step detected */
+ uint8_t tilt : 1; /* Relative tilt event detected */
+ uint8_t sig_mot : 1; /* "significant motion" event detected */
+ uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */
+ uint8_t fsm1 : 1; /* fsm 1 interrupt event */
+ uint8_t fsm2 : 1; /* fsm 2 interrupt event */
+ uint8_t fsm3 : 1; /* fsm 3 interrupt event */
+ uint8_t fsm4 : 1; /* fsm 4 interrupt event */
+ uint8_t fsm5 : 1; /* fsm 5 interrupt event */
+ uint8_t fsm6 : 1; /* fsm 6 interrupt event */
+ uint8_t fsm7 : 1; /* fsm 7 interrupt event */
+ uint8_t fsm8 : 1; /* fsm 8 interrupt event */
+ uint8_t fsm9 : 1; /* fsm 9 interrupt event */
+ uint8_t fsm10 : 1; /* fsm 10 interrupt event */
+ uint8_t fsm11 : 1; /* fsm 11 interrupt event */
+ uint8_t fsm12 : 1; /* fsm 12 interrupt event */
+ uint8_t fsm13 : 1; /* fsm 13 interrupt event */
+ uint8_t fsm14 : 1; /* fsm 14 interrupt event */
+ uint8_t fsm15 : 1; /* fsm 15 interrupt event */
+ uint8_t fsm16 : 1; /* fsm 16 interrupt event */
+ uint8_t mlc1 : 1; /* mlc 1 interrupt event */
+ uint8_t mlc2 : 1; /* mlc 2 interrupt event */
+ uint8_t mlc3 : 1; /* mlc 3 interrupt event */
+ uint8_t mlc4 : 1; /* mlc 4 interrupt event */
+ uint8_t mlc5 : 1; /* mlc 5 interrupt event */
+ uint8_t mlc6 : 1; /* mlc 6 interrupt event */
+ uint8_t mlc7 : 1; /* mlc 7 interrupt event */
+ uint8_t mlc8 : 1; /* mlc 8 interrupt event */
+} lsm6dso_pin_int1_route_t;
+
+int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx,
+ lsm6dso_pin_int1_route_t val);
+int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_pin_int1_route_t *val);
+
+typedef struct {
+ uint8_t drdy_ois : 1; /* OIS chain data ready */
+ uint8_t drdy_xl : 1; /* Accelerometer data ready */
+ uint8_t drdy_g : 1; /* Gyroscope data ready */
+ uint8_t drdy_temp : 1; /* Temperature data ready */
+ uint8_t fifo_th : 1; /* FIFO threshold reached */
+ uint8_t fifo_ovr : 1; /* FIFO overrun */
+ uint8_t fifo_full : 1; /* FIFO full */
+ uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */
+ uint8_t timestamp : 1; /* timestamp overflow */
+ uint8_t six_d : 1; /* orientation change (6D/4D detection) */
+ uint8_t double_tap : 1; /* double-tap event */
+ uint8_t free_fall : 1; /* free fall event */
+ uint8_t wake_up : 1; /* wake up event */
+ uint8_t single_tap : 1; /* single-tap event */
+ uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */
+ uint8_t step_detector : 1; /* Step detected */
+ uint8_t tilt : 1; /* Relative tilt event detected */
+ uint8_t sig_mot : 1; /* "significant motion" event detected */
+ uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */
+ uint8_t fsm1 : 1; /* fsm 1 interrupt event */
+ uint8_t fsm2 : 1; /* fsm 2 interrupt event */
+ uint8_t fsm3 : 1; /* fsm 3 interrupt event */
+ uint8_t fsm4 : 1; /* fsm 4 interrupt event */
+ uint8_t fsm5 : 1; /* fsm 5 interrupt event */
+ uint8_t fsm6 : 1; /* fsm 6 interrupt event */
+ uint8_t fsm7 : 1; /* fsm 7 interrupt event */
+ uint8_t fsm8 : 1; /* fsm 8 interrupt event */
+ uint8_t fsm9 : 1; /* fsm 9 interrupt event */
+ uint8_t fsm10 : 1; /* fsm 10 interrupt event */
+ uint8_t fsm11 : 1; /* fsm 11 interrupt event */
+ uint8_t fsm12 : 1; /* fsm 12 interrupt event */
+ uint8_t fsm13 : 1; /* fsm 13 interrupt event */
+ uint8_t fsm14 : 1; /* fsm 14 interrupt event */
+ uint8_t fsm15 : 1; /* fsm 15 interrupt event */
+ uint8_t fsm16 : 1; /* fsm 16 interrupt event */
+ uint8_t mlc1 : 1; /* mlc 1 interrupt event */
+ uint8_t mlc2 : 1; /* mlc 2 interrupt event */
+ uint8_t mlc3 : 1; /* mlc 3 interrupt event */
+ uint8_t mlc4 : 1; /* mlc 4 interrupt event */
+ uint8_t mlc5 : 1; /* mlc 5 interrupt event */
+ uint8_t mlc6 : 1; /* mlc 6 interrupt event */
+ uint8_t mlc7 : 1; /* mlc 7 interrupt event */
+ uint8_t mlc8 : 1; /* mlc 8 interrupt event */
+} lsm6dso_pin_int2_route_t;
+
+int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_pin_int2_route_t val);
+int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_pin_int2_route_t *val);
+
+typedef struct {
+ uint8_t drdy_xl : 1; /* Accelerometer data ready */
+ uint8_t drdy_g : 1; /* Gyroscope data ready */
+ uint8_t drdy_temp : 1; /* Temperature data ready */
+ uint8_t den_flag : 1; /* external trigger level recognition (DEN) */
+ uint8_t timestamp : 1; /* timestamp overflow (1 = int2 pin disable) */
+ uint8_t free_fall : 1; /* free fall event */
+ uint8_t wake_up : 1; /* wake up event */
+ uint8_t wake_up_z : 1; /* wake up on Z axis event */
+ uint8_t wake_up_y : 1; /* wake up on Y axis event */
+ uint8_t wake_up_x : 1; /* wake up on X axis event */
+ uint8_t single_tap : 1; /* single-tap event */
+ uint8_t double_tap : 1; /* double-tap event */
+ uint8_t tap_z : 1; /* single-tap on Z axis event */
+ uint8_t tap_y : 1; /* single-tap on Y axis event */
+ uint8_t tap_x : 1; /* single-tap on X axis event */
+ uint8_t tap_sign : 1; /* sign of tap event (0-pos / 1-neg) */
+ uint8_t six_d : 1; /* orientation change (6D/4D detection) */
+ uint8_t six_d_xl : 1; /* X-axis low 6D/4D event (under threshold) */
+ uint8_t six_d_xh : 1; /* X-axis high 6D/4D event (over threshold) */
+ uint8_t six_d_yl : 1; /* Y-axis low 6D/4D event (under threshold) */
+ uint8_t six_d_yh : 1; /* Y-axis high 6D/4D event (over threshold) */
+ uint8_t six_d_zl : 1; /* Z-axis low 6D/4D event (under threshold) */
+ uint8_t six_d_zh : 1; /* Z-axis high 6D/4D event (over threshold) */
+ uint8_t sleep_change : 1; /* Act/Inact (or Vice-versa) status changed */
+ uint8_t sleep_state : 1; /* Act/Inact status flag (0-Act / 1-Inact) */
+ uint8_t step_detector : 1; /* Step detected */
+ uint8_t tilt : 1; /* Relative tilt event detected */
+ uint8_t sig_mot : 1; /* "significant motion" event detected */
+ uint8_t fsm_lc : 1; /* fsm long counter timeout interrupt event */
+ uint8_t fsm1 : 1; /* fsm 1 interrupt event */
+ uint8_t fsm2 : 1; /* fsm 2 interrupt event */
+ uint8_t fsm3 : 1; /* fsm 3 interrupt event */
+ uint8_t fsm4 : 1; /* fsm 4 interrupt event */
+ uint8_t fsm5 : 1; /* fsm 5 interrupt event */
+ uint8_t fsm6 : 1; /* fsm 6 interrupt event */
+ uint8_t fsm7 : 1; /* fsm 7 interrupt event */
+ uint8_t fsm8 : 1; /* fsm 8 interrupt event */
+ uint8_t fsm9 : 1; /* fsm 9 interrupt event */
+ uint8_t fsm10 : 1; /* fsm 10 interrupt event */
+ uint8_t fsm11 : 1; /* fsm 11 interrupt event */
+ uint8_t fsm12 : 1; /* fsm 12 interrupt event */
+ uint8_t fsm13 : 1; /* fsm 13 interrupt event */
+ uint8_t fsm14 : 1; /* fsm 14 interrupt event */
+ uint8_t fsm15 : 1; /* fsm 15 interrupt event */
+ uint8_t fsm16 : 1; /* fsm 16 interrupt event */
+ uint8_t mlc1 : 1; /* mlc 1 interrupt event */
+ uint8_t mlc2 : 1; /* mlc 2 interrupt event */
+ uint8_t mlc3 : 1; /* mlc 3 interrupt event */
+ uint8_t mlc4 : 1; /* mlc 4 interrupt event */
+ uint8_t mlc5 : 1; /* mlc 5 interrupt event */
+ uint8_t mlc6 : 1; /* mlc 6 interrupt event */
+ uint8_t mlc7 : 1; /* mlc 7 interrupt event */
+ uint8_t mlc8 : 1; /* mlc 8 interrupt event */
+ uint8_t sh_endop : 1; /* sensor hub end operation */
+ uint8_t sh_slave0_nack : 1; /* Not acknowledge on sensor hub slave 0 */
+ uint8_t sh_slave1_nack : 1; /* Not acknowledge on sensor hub slave 1 */
+ uint8_t sh_slave2_nack : 1; /* Not acknowledge on sensor hub slave 2 */
+ uint8_t sh_slave3_nack : 1; /* Not acknowledge on sensor hub slave 3 */
+ uint8_t sh_wr_once : 1; /* "WRITE_ONCE" end on sensor hub slave 0 */
+ uint16_t fifo_diff : 10; /* Number of unread sensor data in FIFO*/
+ uint8_t fifo_ovr_latched : 1; /* Latched FIFO overrun status */
+ uint8_t fifo_bdr : 1; /* FIFO Batch counter threshold reached */
+ uint8_t fifo_full : 1; /* FIFO full */
+ uint8_t fifo_ovr : 1; /* FIFO overrun */
+ uint8_t fifo_th : 1; /* FIFO threshold reached */
+} lsm6dso_all_sources_t;
+int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_all_sources_t *val);
+
+typedef struct{
+ uint8_t odr_fine_tune;
+} dev_cal_t;
+int32_t lsm6dso_calibration_get(lsm6dso_ctx_t *ctx, dev_cal_t *val);
+
+typedef struct {
+ struct {
+ struct {
+ enum {
+ LSM6DSO_XL_UI_OFF = 0x00, /* in power down */
+ LSM6DSO_XL_UI_1Hz6_LP = 0x1B, /* @1Hz6 (low power) */
+ LSM6DSO_XL_UI_1Hz6_ULP = 0x2B, /* @1Hz6 (ultra low/Gy, OIS imu off) */
+ LSM6DSO_XL_UI_12Hz5_HP = 0x01, /* @12Hz5 (high performance) */
+ LSM6DSO_XL_UI_12Hz5_LP = 0x11, /* @12Hz5 (low power) */
+ LSM6DSO_XL_UI_12Hz5_ULP = 0x21, /* @12Hz5 (ultra low/Gy, OIS imu off) */
+ LSM6DSO_XL_UI_26Hz_HP = 0x02, /* @26Hz (high performance) */
+ LSM6DSO_XL_UI_26Hz_LP = 0x12, /* @26Hz (low power) */
+ LSM6DSO_XL_UI_26Hz_ULP = 0x22, /* @26Hz (ultra low/Gy, OIS imu off) */
+ LSM6DSO_XL_UI_52Hz_HP = 0x03, /* @52Hz (high performance) */
+ LSM6DSO_XL_UI_52Hz_LP = 0x13, /* @52Hz (low power) */
+ LSM6DSO_XL_UI_52Hz_ULP = 0x23, /* @52Hz (ultra low/Gy, OIS imu off) */
+ LSM6DSO_XL_UI_104Hz_HP = 0x04, /* @104Hz (high performance) */
+ LSM6DSO_XL_UI_104Hz_NM = 0x14, /* @104Hz (normal mode) */
+ LSM6DSO_XL_UI_104Hz_ULP = 0x24, /* @104Hz (ultra low/Gy, OIS imu off) */
+ LSM6DSO_XL_UI_208Hz_HP = 0x05, /* @208Hz (high performance) */
+ LSM6DSO_XL_UI_208Hz_NM = 0x15, /* @208Hz (normal mode) */
+ LSM6DSO_XL_UI_208Hz_ULP = 0x25, /* @208Hz (ultra low/Gy, OIS imu off) */
+ LSM6DSO_XL_UI_416Hz_HP = 0x06, /* @416Hz (high performance) */
+ LSM6DSO_XL_UI_833Hz_HP = 0x07, /* @833Hz (high performance) */
+ LSM6DSO_XL_UI_1667Hz_HP = 0x08, /* @1kHz66 (high performance) */
+ LSM6DSO_XL_UI_3333Hz_HP = 0x09, /* @3kHz33 (high performance) */
+ LSM6DSO_XL_UI_6667Hz_HP = 0x0A, /* @6kHz66 (high performance) */
+ } odr;
+ enum {
+ LSM6DSO_XL_UI_2g = 0,
+ LSM6DSO_XL_UI_4g = 2,
+ LSM6DSO_XL_UI_8g = 3,
+ LSM6DSO_XL_UI_16g = 1, /* OIS full scale is also forced to be 16g */
+ } fs;
+ } xl;
+ struct {
+ enum {
+ LSM6DSO_GY_UI_OFF = 0x00, /* gy in power down */
+ LSM6DSO_GY_UI_12Hz5_LP = 0x11, /* gy @12Hz5 (low power) */
+ LSM6DSO_GY_UI_12Hz5_HP = 0x01, /* gy @12Hz5 (high performance) */
+ LSM6DSO_GY_UI_26Hz_LP = 0x12, /* gy @26Hz (low power) */
+ LSM6DSO_GY_UI_26Hz_HP = 0x02, /* gy @26Hz (high performance) */
+ LSM6DSO_GY_UI_52Hz_LP = 0x13, /* gy @52Hz (low power) */
+ LSM6DSO_GY_UI_52Hz_HP = 0x03, /* gy @52Hz (high performance) */
+ LSM6DSO_GY_UI_104Hz_NM = 0x14, /* gy @104Hz (low power) */
+ LSM6DSO_GY_UI_104Hz_HP = 0x04, /* gy @104Hz (high performance) */
+ LSM6DSO_GY_UI_208Hz_NM = 0x15, /* gy @208Hz (low power) */
+ LSM6DSO_GY_UI_208Hz_HP = 0x05, /* gy @208Hz (high performance) */
+ LSM6DSO_GY_UI_416Hz_HP = 0x06, /* gy @416Hz (high performance) */
+ LSM6DSO_GY_UI_833Hz_HP = 0x07, /* gy @833Hz (high performance) */
+ LSM6DSO_GY_UI_1667Hz_HP = 0x08, /* gy @1kHz66 (high performance) */
+ LSM6DSO_GY_UI_3333Hz_HP = 0x09, /* gy @3kHz33 (high performance) */
+ LSM6DSO_GY_UI_6667Hz_HP = 0x0A, /* gy @6kHz66 (high performance) */
+ } odr;
+ enum {
+ LSM6DSO_GY_UI_250dps = 0,
+ LSM6DSO_GY_UI_125dps = 1,
+ LSM6DSO_GY_UI_500dps = 2,
+ LSM6DSO_GY_UI_1000dps = 4,
+ LSM6DSO_GY_UI_2000dps = 6,
+ } fs;
+ }gy;
+ } ui;
+ struct {
+ enum {
+ LSM6DSO_OIS_ONLY_AUX = 0x00, /* Auxiliary SPI full control */
+ LSM6DSO_OIS_MIXED = 0x01, /* Enabling by UI / read-config by AUX */
+ } ctrl_md;
+ struct {
+ enum {
+ LSM6DSO_XL_OIS_OFF = 0x00, /* in power down */
+ LSM6DSO_XL_OIS_6667Hz_HP = 0x01, /* @6kHz OIS imu active/NO ULP on UI */
+ } odr;
+ enum {
+ LSM6DSO_XL_OIS_2g = 0,
+ LSM6DSO_XL_OIS_4g = 2,
+ LSM6DSO_XL_OIS_8g = 3,
+ LSM6DSO_XL_OIS_16g = 1, /* UI full scale is also forced to be 16g */
+ } fs;
+ } xl;
+ struct {
+ enum {
+ LSM6DSO_GY_OIS_OFF = 0x00, /* in power down */
+ LSM6DSO_GY_OIS_6667Hz_HP = 0x01, /* @6kHz No Ultra Low Power*/
+ } odr;
+ enum {
+ LSM6DSO_GY_OIS_250dps = 0,
+ LSM6DSO_GY_OIS_125dps = 1,
+ LSM6DSO_GY_OIS_500dps = 2,
+ LSM6DSO_GY_OIS_1000dps = 4,
+ LSM6DSO_GY_OIS_2000dps = 6,
+ } fs;
+ } gy;
+ } ois;
+ struct {
+ enum {
+ LSM6DSO_FSM_DISABLE = 0x00,
+ LSM6DSO_FSM_XL = 0x01,
+ LSM6DSO_FSM_GY = 0x02,
+ LSM6DSO_FSM_XL_GY = 0x03,
+ } sens;
+ enum {
+ LSM6DSO_FSM_12Hz5 = 0x00,
+ LSM6DSO_FSM_26Hz = 0x01,
+ LSM6DSO_FSM_52Hz = 0x02,
+ LSM6DSO_FSM_104Hz = 0x03,
+ } odr;
+ } fsm;
+} lsm6dso_md_t;
+int32_t lsm6dso_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_md_t *val);
+int32_t lsm6dso_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_md_t *val);
+typedef struct {
+ struct {
+ struct {
+ float mg[3];
+ int16_t raw[3];
+ }xl;
+ struct {
+ float mdps[3];
+ int16_t raw[3];
+ }gy;
+ struct {
+ float deg_c;
+ int16_t raw;
+ }heat;
+ } ui;
+ struct {
+ struct {
+ float mg[3];
+ int16_t raw[3];
+ }xl;
+ struct {
+ float mdps[3];
+ int16_t raw[3];
+ }gy;
+ } ois;
+} lsm6dso_data_t;
+int32_t lsm6dso_data_get(lsm6dso_ctx_t *ctx, lsm6dso_ctx_t *aux_ctx,
+ lsm6dso_md_t *md, lsm6dso_data_t *data);
+
+typedef struct {
+ uint8_t sig_mot : 1; /* significant motion */
+ uint8_t tilt : 1; /* tilt detection */
+ uint8_t step : 1; /* step counter/detector */
+ uint8_t step_adv : 1; /* step counter advanced mode */
+ uint8_t fsm : 1; /* finite state machine */
+ uint8_t fifo_compr : 1; /* FIFO compression */
+} lsm6dso_emb_sens_t;
+int32_t lsm6dso_embedded_sens_set(lsm6dso_ctx_t *ctx,
+ lsm6dso_emb_sens_t *emb_sens);
+int32_t lsm6dso_embedded_sens_get(lsm6dso_ctx_t *ctx,
+ lsm6dso_emb_sens_t *emb_sens);
+int32_t lsm6dso_embedded_sens_off(lsm6dso_ctx_t *ctx);
+
/**
* @}
*