iNEMO inertial module: 3D accelerometer and 3D gyroscope.

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3

Committer:
cparata
Date:
Tue Mar 05 16:26:47 2019 +0000
Revision:
0:6d69e896ce38
Child:
2:4d14e9edf37e
First version of the LSM6DSO library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cparata 0:6d69e896ce38 1 /*
cparata 0:6d69e896ce38 2 ******************************************************************************
cparata 0:6d69e896ce38 3 * @file lsm6dso_reg.c
cparata 0:6d69e896ce38 4 * @author Sensor Solutions Software Team
cparata 0:6d69e896ce38 5 * @brief LSM6DSO driver file
cparata 0:6d69e896ce38 6 ******************************************************************************
cparata 0:6d69e896ce38 7 * @attention
cparata 0:6d69e896ce38 8 *
cparata 0:6d69e896ce38 9 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:6d69e896ce38 10 *
cparata 0:6d69e896ce38 11 * Redistribution and use in source and binary forms, with or without
cparata 0:6d69e896ce38 12 * modification, are permitted provided that the following conditions
cparata 0:6d69e896ce38 13 * are met:
cparata 0:6d69e896ce38 14 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:6d69e896ce38 15 * this list of conditions and the following disclaimer.
cparata 0:6d69e896ce38 16 * 2. Redistributions in binary form must reproduce the above copyright
cparata 0:6d69e896ce38 17 * notice, this list of conditions and the following disclaimer in the
cparata 0:6d69e896ce38 18 * documentation and/or other materials provided with the distribution.
cparata 0:6d69e896ce38 19 * 3. Neither the name of STMicroelectronics nor the names of its
cparata 0:6d69e896ce38 20 * contributors may be used to endorse or promote products derived from
cparata 0:6d69e896ce38 21 * this software without specific prior written permission.
cparata 0:6d69e896ce38 22 *
cparata 0:6d69e896ce38 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:6d69e896ce38 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:6d69e896ce38 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cparata 0:6d69e896ce38 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
cparata 0:6d69e896ce38 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cparata 0:6d69e896ce38 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cparata 0:6d69e896ce38 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cparata 0:6d69e896ce38 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cparata 0:6d69e896ce38 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cparata 0:6d69e896ce38 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cparata 0:6d69e896ce38 33 * POSSIBILITY OF SUCH DAMAGE.
cparata 0:6d69e896ce38 34 *
cparata 0:6d69e896ce38 35 */
cparata 0:6d69e896ce38 36
cparata 0:6d69e896ce38 37 #include "lsm6dso_reg.h"
cparata 0:6d69e896ce38 38
cparata 0:6d69e896ce38 39 /**
cparata 0:6d69e896ce38 40 * @defgroup LSM6DSO
cparata 0:6d69e896ce38 41 * @brief This file provides a set of functions needed to drive the
cparata 0:6d69e896ce38 42 * lsm6dso enhanced inertial module.
cparata 0:6d69e896ce38 43 * @{
cparata 0:6d69e896ce38 44 *
cparata 0:6d69e896ce38 45 */
cparata 0:6d69e896ce38 46
cparata 0:6d69e896ce38 47 /**
cparata 0:6d69e896ce38 48 * @defgroup LSM6DSO_Interfaces_Functions
cparata 0:6d69e896ce38 49 * @brief This section provide a set of functions used to read and
cparata 0:6d69e896ce38 50 * write a generic register of the device.
cparata 0:6d69e896ce38 51 * MANDATORY: return 0 -> no Error.
cparata 0:6d69e896ce38 52 * @{
cparata 0:6d69e896ce38 53 *
cparata 0:6d69e896ce38 54 */
cparata 0:6d69e896ce38 55
cparata 0:6d69e896ce38 56 /**
cparata 0:6d69e896ce38 57 * @brief Read generic device register
cparata 0:6d69e896ce38 58 *
cparata 0:6d69e896ce38 59 * @param ctx read / write interface definitions(ptr)
cparata 0:6d69e896ce38 60 * @param reg register to read
cparata 0:6d69e896ce38 61 * @param data pointer to buffer that store the data read(ptr)
cparata 0:6d69e896ce38 62 * @param len number of consecutive register to read
cparata 0:6d69e896ce38 63 * @retval interface status (MANDATORY: return 0 -> no Error)
cparata 0:6d69e896ce38 64 *
cparata 0:6d69e896ce38 65 */
cparata 0:6d69e896ce38 66 int32_t lsm6dso_read_reg(lsm6dso_ctx_t* ctx, uint8_t reg, uint8_t* data,
cparata 0:6d69e896ce38 67 uint16_t len)
cparata 0:6d69e896ce38 68 {
cparata 0:6d69e896ce38 69 int32_t ret;
cparata 0:6d69e896ce38 70 ret = ctx->read_reg(ctx->handle, reg, data, len);
cparata 0:6d69e896ce38 71 return ret;
cparata 0:6d69e896ce38 72 }
cparata 0:6d69e896ce38 73
cparata 0:6d69e896ce38 74 /**
cparata 0:6d69e896ce38 75 * @brief Write generic device register
cparata 0:6d69e896ce38 76 *
cparata 0:6d69e896ce38 77 * @param ctx read / write interface definitions(ptr)
cparata 0:6d69e896ce38 78 * @param reg register to write
cparata 0:6d69e896ce38 79 * @param data pointer to data to write in register reg(ptr)
cparata 0:6d69e896ce38 80 * @param len number of consecutive register to write
cparata 0:6d69e896ce38 81 * @retval interface status (MANDATORY: return 0 -> no Error)
cparata 0:6d69e896ce38 82 *
cparata 0:6d69e896ce38 83 */
cparata 0:6d69e896ce38 84 int32_t lsm6dso_write_reg(lsm6dso_ctx_t* ctx, uint8_t reg, uint8_t* data,
cparata 0:6d69e896ce38 85 uint16_t len)
cparata 0:6d69e896ce38 86 {
cparata 0:6d69e896ce38 87 int32_t ret;
cparata 0:6d69e896ce38 88 ret = ctx->write_reg(ctx->handle, reg, data, len);
cparata 0:6d69e896ce38 89 return ret;
cparata 0:6d69e896ce38 90 }
cparata 0:6d69e896ce38 91
cparata 0:6d69e896ce38 92 /**
cparata 0:6d69e896ce38 93 * @}
cparata 0:6d69e896ce38 94 *
cparata 0:6d69e896ce38 95 */
cparata 0:6d69e896ce38 96
cparata 0:6d69e896ce38 97 /**
cparata 0:6d69e896ce38 98 * @defgroup LSM6DSO_Sensitivity
cparata 0:6d69e896ce38 99 * @brief These functions convert raw-data into engineering units.
cparata 0:6d69e896ce38 100 * @{
cparata 0:6d69e896ce38 101 *
cparata 0:6d69e896ce38 102 */
cparata 0:6d69e896ce38 103 float lsm6dso_from_fs2_to_mg(int16_t lsb)
cparata 0:6d69e896ce38 104 {
cparata 0:6d69e896ce38 105 return ((float)lsb) * 0.061f;
cparata 0:6d69e896ce38 106 }
cparata 0:6d69e896ce38 107
cparata 0:6d69e896ce38 108 float lsm6dso_from_fs4_to_mg(int16_t lsb)
cparata 0:6d69e896ce38 109 {
cparata 0:6d69e896ce38 110 return ((float)lsb) * 0.122f;
cparata 0:6d69e896ce38 111 }
cparata 0:6d69e896ce38 112
cparata 0:6d69e896ce38 113 float lsm6dso_from_fs8_to_mg(int16_t lsb)
cparata 0:6d69e896ce38 114 {
cparata 0:6d69e896ce38 115 return ((float)lsb) * 0.244f;
cparata 0:6d69e896ce38 116 }
cparata 0:6d69e896ce38 117
cparata 0:6d69e896ce38 118 float lsm6dso_from_fs16_to_mg(int16_t lsb)
cparata 0:6d69e896ce38 119 {
cparata 0:6d69e896ce38 120 return ((float)lsb) *0.488f;
cparata 0:6d69e896ce38 121 }
cparata 0:6d69e896ce38 122
cparata 0:6d69e896ce38 123 float lsm6dso_from_fs125_to_mdps(int16_t lsb)
cparata 0:6d69e896ce38 124 {
cparata 0:6d69e896ce38 125 return ((float)lsb) *4.375f;
cparata 0:6d69e896ce38 126 }
cparata 0:6d69e896ce38 127
cparata 0:6d69e896ce38 128 float lsm6dso_from_fs500_to_mdps(int16_t lsb)
cparata 0:6d69e896ce38 129 {
cparata 0:6d69e896ce38 130 return ((float)lsb) *1.750f;
cparata 0:6d69e896ce38 131 }
cparata 0:6d69e896ce38 132
cparata 0:6d69e896ce38 133 float lsm6dso_from_fs250_to_mdps(int16_t lsb)
cparata 0:6d69e896ce38 134 {
cparata 0:6d69e896ce38 135 return ((float)lsb) *0.875f;
cparata 0:6d69e896ce38 136 }
cparata 0:6d69e896ce38 137
cparata 0:6d69e896ce38 138 float lsm6dso_from_fs1000_to_mdps(int16_t lsb)
cparata 0:6d69e896ce38 139 {
cparata 0:6d69e896ce38 140 return ((float)lsb) *0.035f;
cparata 0:6d69e896ce38 141 }
cparata 0:6d69e896ce38 142
cparata 0:6d69e896ce38 143 float lsm6dso_from_fs2000_to_mdps(int16_t lsb)
cparata 0:6d69e896ce38 144 {
cparata 0:6d69e896ce38 145 return ((float)lsb) *0.070f;
cparata 0:6d69e896ce38 146 }
cparata 0:6d69e896ce38 147
cparata 0:6d69e896ce38 148 float lsm6dso_from_lsb_to_celsius(int16_t lsb)
cparata 0:6d69e896ce38 149 {
cparata 0:6d69e896ce38 150 return (((float)lsb / 256.0f) + 25.0f);
cparata 0:6d69e896ce38 151 }
cparata 0:6d69e896ce38 152
cparata 0:6d69e896ce38 153 float lsm6dso_from_lsb_to_nsec(int16_t lsb)
cparata 0:6d69e896ce38 154 {
cparata 0:6d69e896ce38 155 return ((float)lsb * 25000.0f);
cparata 0:6d69e896ce38 156 }
cparata 0:6d69e896ce38 157
cparata 0:6d69e896ce38 158 /**
cparata 0:6d69e896ce38 159 * @}
cparata 0:6d69e896ce38 160 *
cparata 0:6d69e896ce38 161 */
cparata 0:6d69e896ce38 162
cparata 0:6d69e896ce38 163 /**
cparata 0:6d69e896ce38 164 * @defgroup LSM6DSO_Data_Generation
cparata 0:6d69e896ce38 165 * @brief This section groups all the functions concerning
cparata 0:6d69e896ce38 166 * data generation.
cparata 0:6d69e896ce38 167 *
cparata 0:6d69e896ce38 168 */
cparata 0:6d69e896ce38 169
cparata 0:6d69e896ce38 170 /**
cparata 0:6d69e896ce38 171 * @brief Accelerometer full-scale selection.[set]
cparata 0:6d69e896ce38 172 *
cparata 0:6d69e896ce38 173 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 174 * @param val change the values of fs_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 175 *
cparata 0:6d69e896ce38 176 */
cparata 0:6d69e896ce38 177 int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 178 lsm6dso_fs_xl_t val)
cparata 0:6d69e896ce38 179 {
cparata 0:6d69e896ce38 180 lsm6dso_ctrl1_xl_t reg;
cparata 0:6d69e896ce38 181 int32_t ret;
cparata 0:6d69e896ce38 182
cparata 0:6d69e896ce38 183 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 184 if (ret == 0) {
cparata 0:6d69e896ce38 185 reg.fs_xl = (uint8_t) val;
cparata 0:6d69e896ce38 186 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 187 }
cparata 0:6d69e896ce38 188 return ret;
cparata 0:6d69e896ce38 189 }
cparata 0:6d69e896ce38 190
cparata 0:6d69e896ce38 191 /**
cparata 0:6d69e896ce38 192 * @brief Accelerometer full-scale selection.[get]
cparata 0:6d69e896ce38 193 *
cparata 0:6d69e896ce38 194 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 195 * @param val Get the values of fs_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 196 *
cparata 0:6d69e896ce38 197 */
cparata 0:6d69e896ce38 198 int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t *val)
cparata 0:6d69e896ce38 199 {
cparata 0:6d69e896ce38 200 lsm6dso_ctrl1_xl_t reg;
cparata 0:6d69e896ce38 201 int32_t ret;
cparata 0:6d69e896ce38 202
cparata 0:6d69e896ce38 203 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 204 switch (reg.fs_xl) {
cparata 0:6d69e896ce38 205 case LSM6DSO_2g:
cparata 0:6d69e896ce38 206 *val = LSM6DSO_2g;
cparata 0:6d69e896ce38 207 break;
cparata 0:6d69e896ce38 208 case LSM6DSO_16g:
cparata 0:6d69e896ce38 209 *val = LSM6DSO_16g;
cparata 0:6d69e896ce38 210 break;
cparata 0:6d69e896ce38 211 case LSM6DSO_4g:
cparata 0:6d69e896ce38 212 *val = LSM6DSO_4g;
cparata 0:6d69e896ce38 213 break;
cparata 0:6d69e896ce38 214 case LSM6DSO_8g:
cparata 0:6d69e896ce38 215 *val = LSM6DSO_8g;
cparata 0:6d69e896ce38 216 break;
cparata 0:6d69e896ce38 217 default:
cparata 0:6d69e896ce38 218 *val = LSM6DSO_2g;
cparata 0:6d69e896ce38 219 break;
cparata 0:6d69e896ce38 220 }
cparata 0:6d69e896ce38 221
cparata 0:6d69e896ce38 222 return ret;
cparata 0:6d69e896ce38 223 }
cparata 0:6d69e896ce38 224
cparata 0:6d69e896ce38 225 /**
cparata 0:6d69e896ce38 226 * @brief Accelerometer UI data rate selection.[set]
cparata 0:6d69e896ce38 227 *
cparata 0:6d69e896ce38 228 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 229 * @param val change the values of odr_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 230 *
cparata 0:6d69e896ce38 231 */
cparata 0:6d69e896ce38 232 int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val)
cparata 0:6d69e896ce38 233 {
cparata 0:6d69e896ce38 234 lsm6dso_ctrl1_xl_t reg;
cparata 0:6d69e896ce38 235 int32_t ret;
cparata 0:6d69e896ce38 236
cparata 0:6d69e896ce38 237 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 238 if (ret == 0) {
cparata 0:6d69e896ce38 239 reg.odr_xl = (uint8_t) val;
cparata 0:6d69e896ce38 240 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 241 }
cparata 0:6d69e896ce38 242 return ret;
cparata 0:6d69e896ce38 243 }
cparata 0:6d69e896ce38 244
cparata 0:6d69e896ce38 245 /**
cparata 0:6d69e896ce38 246 * @brief Accelerometer UI data rate selection.[get]
cparata 0:6d69e896ce38 247 *
cparata 0:6d69e896ce38 248 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 249 * @param val Get the values of odr_xl in reg CTRL1_XL
cparata 0:6d69e896ce38 250 *
cparata 0:6d69e896ce38 251 */
cparata 0:6d69e896ce38 252 int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t *val)
cparata 0:6d69e896ce38 253 {
cparata 0:6d69e896ce38 254 lsm6dso_ctrl1_xl_t reg;
cparata 0:6d69e896ce38 255 int32_t ret;
cparata 0:6d69e896ce38 256
cparata 0:6d69e896ce38 257 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 258
cparata 0:6d69e896ce38 259 switch (reg.odr_xl) {
cparata 0:6d69e896ce38 260 case LSM6DSO_XL_ODR_OFF:
cparata 0:6d69e896ce38 261 *val = LSM6DSO_XL_ODR_OFF;
cparata 0:6d69e896ce38 262 break;
cparata 0:6d69e896ce38 263 case LSM6DSO_XL_ODR_12Hz5:
cparata 0:6d69e896ce38 264 *val = LSM6DSO_XL_ODR_12Hz5;
cparata 0:6d69e896ce38 265 break;
cparata 0:6d69e896ce38 266 case LSM6DSO_XL_ODR_26Hz:
cparata 0:6d69e896ce38 267 *val = LSM6DSO_XL_ODR_26Hz;
cparata 0:6d69e896ce38 268 break;
cparata 0:6d69e896ce38 269 case LSM6DSO_XL_ODR_52Hz:
cparata 0:6d69e896ce38 270 *val = LSM6DSO_XL_ODR_52Hz;
cparata 0:6d69e896ce38 271 break;
cparata 0:6d69e896ce38 272 case LSM6DSO_XL_ODR_104Hz:
cparata 0:6d69e896ce38 273 *val = LSM6DSO_XL_ODR_104Hz;
cparata 0:6d69e896ce38 274 break;
cparata 0:6d69e896ce38 275 case LSM6DSO_XL_ODR_208Hz:
cparata 0:6d69e896ce38 276 *val = LSM6DSO_XL_ODR_208Hz;
cparata 0:6d69e896ce38 277 break;
cparata 0:6d69e896ce38 278 case LSM6DSO_XL_ODR_417Hz:
cparata 0:6d69e896ce38 279 *val = LSM6DSO_XL_ODR_417Hz;
cparata 0:6d69e896ce38 280 break;
cparata 0:6d69e896ce38 281 case LSM6DSO_XL_ODR_833Hz:
cparata 0:6d69e896ce38 282 *val = LSM6DSO_XL_ODR_833Hz;
cparata 0:6d69e896ce38 283 break;
cparata 0:6d69e896ce38 284 case LSM6DSO_XL_ODR_1667Hz:
cparata 0:6d69e896ce38 285 *val = LSM6DSO_XL_ODR_1667Hz;
cparata 0:6d69e896ce38 286 break;
cparata 0:6d69e896ce38 287 case LSM6DSO_XL_ODR_3333Hz:
cparata 0:6d69e896ce38 288 *val = LSM6DSO_XL_ODR_3333Hz;
cparata 0:6d69e896ce38 289 break;
cparata 0:6d69e896ce38 290 case LSM6DSO_XL_ODR_6667Hz:
cparata 0:6d69e896ce38 291 *val = LSM6DSO_XL_ODR_6667Hz;
cparata 0:6d69e896ce38 292 break;
cparata 0:6d69e896ce38 293 case LSM6DSO_XL_ODR_6Hz5:
cparata 0:6d69e896ce38 294 *val = LSM6DSO_XL_ODR_6Hz5;
cparata 0:6d69e896ce38 295 break;
cparata 0:6d69e896ce38 296 default:
cparata 0:6d69e896ce38 297 *val = LSM6DSO_XL_ODR_OFF;
cparata 0:6d69e896ce38 298 break;
cparata 0:6d69e896ce38 299 }
cparata 0:6d69e896ce38 300 return ret;
cparata 0:6d69e896ce38 301 }
cparata 0:6d69e896ce38 302
cparata 0:6d69e896ce38 303 /**
cparata 0:6d69e896ce38 304 * @brief Gyroscope UI chain full-scale selection.[set]
cparata 0:6d69e896ce38 305 *
cparata 0:6d69e896ce38 306 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 307 * @param val change the values of fs_g in reg CTRL2_G
cparata 0:6d69e896ce38 308 *
cparata 0:6d69e896ce38 309 */
cparata 0:6d69e896ce38 310 int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val)
cparata 0:6d69e896ce38 311 {
cparata 0:6d69e896ce38 312 lsm6dso_ctrl2_g_t reg;
cparata 0:6d69e896ce38 313 int32_t ret;
cparata 0:6d69e896ce38 314
cparata 0:6d69e896ce38 315 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 316 if (ret == 0) {
cparata 0:6d69e896ce38 317 reg.fs_g = (uint8_t) val;
cparata 0:6d69e896ce38 318 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 319 }
cparata 0:6d69e896ce38 320
cparata 0:6d69e896ce38 321 return ret;
cparata 0:6d69e896ce38 322 }
cparata 0:6d69e896ce38 323
cparata 0:6d69e896ce38 324 /**
cparata 0:6d69e896ce38 325 * @brief Gyroscope UI chain full-scale selection.[get]
cparata 0:6d69e896ce38 326 *
cparata 0:6d69e896ce38 327 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 328 * @param val Get the values of fs_g in reg CTRL2_G
cparata 0:6d69e896ce38 329 *
cparata 0:6d69e896ce38 330 */
cparata 0:6d69e896ce38 331 int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t *val)
cparata 0:6d69e896ce38 332 {
cparata 0:6d69e896ce38 333 lsm6dso_ctrl2_g_t reg;
cparata 0:6d69e896ce38 334 int32_t ret;
cparata 0:6d69e896ce38 335
cparata 0:6d69e896ce38 336 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 337 switch (reg.fs_g) {
cparata 0:6d69e896ce38 338 case LSM6DSO_250dps:
cparata 0:6d69e896ce38 339 *val = LSM6DSO_250dps;
cparata 0:6d69e896ce38 340 break;
cparata 0:6d69e896ce38 341 case LSM6DSO_125dps:
cparata 0:6d69e896ce38 342 *val = LSM6DSO_125dps;
cparata 0:6d69e896ce38 343 break;
cparata 0:6d69e896ce38 344 case LSM6DSO_500dps:
cparata 0:6d69e896ce38 345 *val = LSM6DSO_500dps;
cparata 0:6d69e896ce38 346 break;
cparata 0:6d69e896ce38 347 case LSM6DSO_1000dps:
cparata 0:6d69e896ce38 348 *val = LSM6DSO_1000dps;
cparata 0:6d69e896ce38 349 break;
cparata 0:6d69e896ce38 350 case LSM6DSO_2000dps:
cparata 0:6d69e896ce38 351 *val = LSM6DSO_2000dps;
cparata 0:6d69e896ce38 352 break;
cparata 0:6d69e896ce38 353 default:
cparata 0:6d69e896ce38 354 *val = LSM6DSO_250dps;
cparata 0:6d69e896ce38 355 break;
cparata 0:6d69e896ce38 356 }
cparata 0:6d69e896ce38 357
cparata 0:6d69e896ce38 358 return ret;
cparata 0:6d69e896ce38 359 }
cparata 0:6d69e896ce38 360
cparata 0:6d69e896ce38 361 /**
cparata 0:6d69e896ce38 362 * @brief Gyroscope UI data rate selection.[set]
cparata 0:6d69e896ce38 363 *
cparata 0:6d69e896ce38 364 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 365 * @param val change the values of odr_g in reg CTRL2_G
cparata 0:6d69e896ce38 366 *
cparata 0:6d69e896ce38 367 */
cparata 0:6d69e896ce38 368 int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val)
cparata 0:6d69e896ce38 369 {
cparata 0:6d69e896ce38 370 lsm6dso_ctrl2_g_t reg;
cparata 0:6d69e896ce38 371 int32_t ret;
cparata 0:6d69e896ce38 372
cparata 0:6d69e896ce38 373 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 374 if (ret == 0) {
cparata 0:6d69e896ce38 375 reg.odr_g = (uint8_t) val;
cparata 0:6d69e896ce38 376 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 377 }
cparata 0:6d69e896ce38 378
cparata 0:6d69e896ce38 379 return ret;
cparata 0:6d69e896ce38 380 }
cparata 0:6d69e896ce38 381
cparata 0:6d69e896ce38 382 /**
cparata 0:6d69e896ce38 383 * @brief Gyroscope UI data rate selection.[get]
cparata 0:6d69e896ce38 384 *
cparata 0:6d69e896ce38 385 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 386 * @param val Get the values of odr_g in reg CTRL2_G
cparata 0:6d69e896ce38 387 *
cparata 0:6d69e896ce38 388 */
cparata 0:6d69e896ce38 389 int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t *val)
cparata 0:6d69e896ce38 390 {
cparata 0:6d69e896ce38 391 lsm6dso_ctrl2_g_t reg;
cparata 0:6d69e896ce38 392 int32_t ret;
cparata 0:6d69e896ce38 393
cparata 0:6d69e896ce38 394 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 395 switch (reg.odr_g) {
cparata 0:6d69e896ce38 396 case LSM6DSO_GY_ODR_OFF:
cparata 0:6d69e896ce38 397 *val = LSM6DSO_GY_ODR_OFF;
cparata 0:6d69e896ce38 398 break;
cparata 0:6d69e896ce38 399 case LSM6DSO_GY_ODR_12Hz5:
cparata 0:6d69e896ce38 400 *val = LSM6DSO_GY_ODR_12Hz5;
cparata 0:6d69e896ce38 401 break;
cparata 0:6d69e896ce38 402 case LSM6DSO_GY_ODR_26Hz:
cparata 0:6d69e896ce38 403 *val = LSM6DSO_GY_ODR_26Hz;
cparata 0:6d69e896ce38 404 break;
cparata 0:6d69e896ce38 405 case LSM6DSO_GY_ODR_52Hz:
cparata 0:6d69e896ce38 406 *val = LSM6DSO_GY_ODR_52Hz;
cparata 0:6d69e896ce38 407 break;
cparata 0:6d69e896ce38 408 case LSM6DSO_GY_ODR_104Hz:
cparata 0:6d69e896ce38 409 *val = LSM6DSO_GY_ODR_104Hz;
cparata 0:6d69e896ce38 410 break;
cparata 0:6d69e896ce38 411 case LSM6DSO_GY_ODR_208Hz:
cparata 0:6d69e896ce38 412 *val = LSM6DSO_GY_ODR_208Hz;
cparata 0:6d69e896ce38 413 break;
cparata 0:6d69e896ce38 414 case LSM6DSO_GY_ODR_417Hz:
cparata 0:6d69e896ce38 415 *val = LSM6DSO_GY_ODR_417Hz;
cparata 0:6d69e896ce38 416 break;
cparata 0:6d69e896ce38 417 case LSM6DSO_GY_ODR_833Hz:
cparata 0:6d69e896ce38 418 *val = LSM6DSO_GY_ODR_833Hz;
cparata 0:6d69e896ce38 419 break;
cparata 0:6d69e896ce38 420 case LSM6DSO_GY_ODR_1667Hz:
cparata 0:6d69e896ce38 421 *val = LSM6DSO_GY_ODR_1667Hz;
cparata 0:6d69e896ce38 422 break;
cparata 0:6d69e896ce38 423 case LSM6DSO_GY_ODR_3333Hz:
cparata 0:6d69e896ce38 424 *val = LSM6DSO_GY_ODR_3333Hz;
cparata 0:6d69e896ce38 425 break;
cparata 0:6d69e896ce38 426 case LSM6DSO_GY_ODR_6667Hz:
cparata 0:6d69e896ce38 427 *val = LSM6DSO_GY_ODR_6667Hz;
cparata 0:6d69e896ce38 428 break;
cparata 0:6d69e896ce38 429 default:
cparata 0:6d69e896ce38 430 *val = LSM6DSO_GY_ODR_OFF;
cparata 0:6d69e896ce38 431 break;
cparata 0:6d69e896ce38 432 }
cparata 0:6d69e896ce38 433 return ret;
cparata 0:6d69e896ce38 434 }
cparata 0:6d69e896ce38 435
cparata 0:6d69e896ce38 436 /**
cparata 0:6d69e896ce38 437 * @brief Block data update.[set]
cparata 0:6d69e896ce38 438 *
cparata 0:6d69e896ce38 439 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 440 * @param val change the values of bdu in reg CTRL3_C
cparata 0:6d69e896ce38 441 *
cparata 0:6d69e896ce38 442 */
cparata 0:6d69e896ce38 443 int32_t lsm6dso_block_data_update_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 444 {
cparata 0:6d69e896ce38 445 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 446 int32_t ret;
cparata 0:6d69e896ce38 447
cparata 0:6d69e896ce38 448 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 449 if (ret == 0) {
cparata 0:6d69e896ce38 450 reg.bdu = val;
cparata 0:6d69e896ce38 451 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 452 }
cparata 0:6d69e896ce38 453 return ret;
cparata 0:6d69e896ce38 454 }
cparata 0:6d69e896ce38 455
cparata 0:6d69e896ce38 456 /**
cparata 0:6d69e896ce38 457 * @brief Block data update.[get]
cparata 0:6d69e896ce38 458 *
cparata 0:6d69e896ce38 459 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 460 * @param val change the values of bdu in reg CTRL3_C
cparata 0:6d69e896ce38 461 *
cparata 0:6d69e896ce38 462 */
cparata 0:6d69e896ce38 463 int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 464 {
cparata 0:6d69e896ce38 465 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 466 int32_t ret;
cparata 0:6d69e896ce38 467
cparata 0:6d69e896ce38 468 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 469 *val = reg.bdu;
cparata 0:6d69e896ce38 470
cparata 0:6d69e896ce38 471 return ret;
cparata 0:6d69e896ce38 472 }
cparata 0:6d69e896ce38 473
cparata 0:6d69e896ce38 474 /**
cparata 0:6d69e896ce38 475 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
cparata 0:6d69e896ce38 476 * Y_OFS_USR (74h), Z_OFS_USR (75h).[set]
cparata 0:6d69e896ce38 477 *
cparata 0:6d69e896ce38 478 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 479 * @param val change the values of usr_off_w in reg CTRL6_C
cparata 0:6d69e896ce38 480 *
cparata 0:6d69e896ce38 481 */
cparata 0:6d69e896ce38 482 int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 483 lsm6dso_usr_off_w_t val)
cparata 0:6d69e896ce38 484 {
cparata 0:6d69e896ce38 485 lsm6dso_ctrl6_c_t reg;
cparata 0:6d69e896ce38 486 int32_t ret;
cparata 0:6d69e896ce38 487
cparata 0:6d69e896ce38 488 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 489 if (ret == 0) {
cparata 0:6d69e896ce38 490 reg.usr_off_w = (uint8_t)val;
cparata 0:6d69e896ce38 491 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 492 }
cparata 0:6d69e896ce38 493 return ret;
cparata 0:6d69e896ce38 494 }
cparata 0:6d69e896ce38 495
cparata 0:6d69e896ce38 496 /**
cparata 0:6d69e896ce38 497 * @brief Weight of XL user offset bits of registers X_OFS_USR (73h),
cparata 0:6d69e896ce38 498 * Y_OFS_USR (74h), Z_OFS_USR (75h).[get]
cparata 0:6d69e896ce38 499 *
cparata 0:6d69e896ce38 500 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 501 * @param val Get the values of usr_off_w in reg CTRL6_C
cparata 0:6d69e896ce38 502 *
cparata 0:6d69e896ce38 503 */
cparata 0:6d69e896ce38 504 int32_t lsm6dso_xl_offset_weight_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 505 lsm6dso_usr_off_w_t *val)
cparata 0:6d69e896ce38 506 {
cparata 0:6d69e896ce38 507 lsm6dso_ctrl6_c_t reg;
cparata 0:6d69e896ce38 508 int32_t ret;
cparata 0:6d69e896ce38 509
cparata 0:6d69e896ce38 510 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 511
cparata 0:6d69e896ce38 512 switch (reg.usr_off_w) {
cparata 0:6d69e896ce38 513 case LSM6DSO_LSb_1mg:
cparata 0:6d69e896ce38 514 *val = LSM6DSO_LSb_1mg;
cparata 0:6d69e896ce38 515 break;
cparata 0:6d69e896ce38 516 case LSM6DSO_LSb_16mg:
cparata 0:6d69e896ce38 517 *val = LSM6DSO_LSb_16mg;
cparata 0:6d69e896ce38 518 break;
cparata 0:6d69e896ce38 519 default:
cparata 0:6d69e896ce38 520 *val = LSM6DSO_LSb_1mg;
cparata 0:6d69e896ce38 521 break;
cparata 0:6d69e896ce38 522 }
cparata 0:6d69e896ce38 523 return ret;
cparata 0:6d69e896ce38 524 }
cparata 0:6d69e896ce38 525
cparata 0:6d69e896ce38 526 /**
cparata 0:6d69e896ce38 527 * @brief Accelerometer power mode.[set]
cparata 0:6d69e896ce38 528 *
cparata 0:6d69e896ce38 529 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 530 * @param val change the values of xl_hm_mode in
cparata 0:6d69e896ce38 531 * reg CTRL6_C
cparata 0:6d69e896ce38 532 *
cparata 0:6d69e896ce38 533 */
cparata 0:6d69e896ce38 534 int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 535 lsm6dso_xl_hm_mode_t val)
cparata 0:6d69e896ce38 536 {
cparata 0:6d69e896ce38 537 lsm6dso_ctrl5_c_t ctrl5_c;
cparata 0:6d69e896ce38 538 lsm6dso_ctrl6_c_t ctrl6_c;
cparata 0:6d69e896ce38 539 int32_t ret;
cparata 0:6d69e896ce38 540
cparata 0:6d69e896ce38 541 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*) &ctrl5_c, 1);
cparata 0:6d69e896ce38 542 if (ret == 0) {
cparata 0:6d69e896ce38 543 ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x02U) >> 1;
cparata 0:6d69e896ce38 544 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*) &ctrl5_c, 1);
cparata 0:6d69e896ce38 545 }
cparata 0:6d69e896ce38 546 if (ret == 0) {
cparata 0:6d69e896ce38 547 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*) &ctrl6_c, 1);
cparata 0:6d69e896ce38 548 }
cparata 0:6d69e896ce38 549 if (ret == 0) {
cparata 0:6d69e896ce38 550 ctrl6_c.xl_hm_mode = (uint8_t)val & 0x01U;
cparata 0:6d69e896ce38 551 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*) &ctrl6_c, 1);
cparata 0:6d69e896ce38 552 }
cparata 0:6d69e896ce38 553 return ret;
cparata 0:6d69e896ce38 554 }
cparata 0:6d69e896ce38 555
cparata 0:6d69e896ce38 556 /**
cparata 0:6d69e896ce38 557 * @brief Accelerometer power mode.[get]
cparata 0:6d69e896ce38 558 *
cparata 0:6d69e896ce38 559 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 560 * @param val Get the values of xl_hm_mode in reg CTRL6_C
cparata 0:6d69e896ce38 561 *
cparata 0:6d69e896ce38 562 */
cparata 0:6d69e896ce38 563 int32_t lsm6dso_xl_power_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 564 lsm6dso_xl_hm_mode_t *val)
cparata 0:6d69e896ce38 565 {
cparata 0:6d69e896ce38 566 lsm6dso_ctrl5_c_t ctrl5_c;
cparata 0:6d69e896ce38 567 lsm6dso_ctrl6_c_t ctrl6_c;
cparata 0:6d69e896ce38 568 int32_t ret;
cparata 0:6d69e896ce38 569
cparata 0:6d69e896ce38 570 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*) &ctrl5_c, 1);
cparata 0:6d69e896ce38 571 if (ret == 0) {
cparata 0:6d69e896ce38 572 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*) &ctrl6_c, 1);
cparata 0:6d69e896ce38 573 switch ( (ctrl5_c.xl_ulp_en << 1) | ctrl6_c.xl_hm_mode) {
cparata 0:6d69e896ce38 574 case LSM6DSO_HIGH_PERFORMANCE_MD:
cparata 0:6d69e896ce38 575 *val = LSM6DSO_HIGH_PERFORMANCE_MD;
cparata 0:6d69e896ce38 576 break;
cparata 0:6d69e896ce38 577 case LSM6DSO_LOW_NORMAL_POWER_MD:
cparata 0:6d69e896ce38 578 *val = LSM6DSO_LOW_NORMAL_POWER_MD;
cparata 0:6d69e896ce38 579 break;
cparata 0:6d69e896ce38 580 case LSM6DSO_ULTRA_LOW_POWER_MD:
cparata 0:6d69e896ce38 581 *val = LSM6DSO_ULTRA_LOW_POWER_MD;
cparata 0:6d69e896ce38 582 break;
cparata 0:6d69e896ce38 583 default:
cparata 0:6d69e896ce38 584 *val = LSM6DSO_HIGH_PERFORMANCE_MD;
cparata 0:6d69e896ce38 585 break;
cparata 0:6d69e896ce38 586 }
cparata 0:6d69e896ce38 587 }
cparata 0:6d69e896ce38 588 return ret;
cparata 0:6d69e896ce38 589 }
cparata 0:6d69e896ce38 590
cparata 0:6d69e896ce38 591 /**
cparata 0:6d69e896ce38 592 * @brief Operating mode for gyroscope.[set]
cparata 0:6d69e896ce38 593 *
cparata 0:6d69e896ce38 594 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 595 * @param val change the values of g_hm_mode in reg CTRL7_G
cparata 0:6d69e896ce38 596 *
cparata 0:6d69e896ce38 597 */
cparata 0:6d69e896ce38 598 int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 599 lsm6dso_g_hm_mode_t val)
cparata 0:6d69e896ce38 600 {
cparata 0:6d69e896ce38 601 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 602 int32_t ret;
cparata 0:6d69e896ce38 603
cparata 0:6d69e896ce38 604 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 605 if (ret == 0) {
cparata 0:6d69e896ce38 606 reg.g_hm_mode = (uint8_t)val;
cparata 0:6d69e896ce38 607 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 608 }
cparata 0:6d69e896ce38 609 return ret;
cparata 0:6d69e896ce38 610 }
cparata 0:6d69e896ce38 611
cparata 0:6d69e896ce38 612 /**
cparata 0:6d69e896ce38 613 * @brief Operating mode for gyroscope.[get]
cparata 0:6d69e896ce38 614 *
cparata 0:6d69e896ce38 615 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 616 * @param val Get the values of g_hm_mode in reg CTRL7_G
cparata 0:6d69e896ce38 617 *
cparata 0:6d69e896ce38 618 */
cparata 0:6d69e896ce38 619 int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 620 lsm6dso_g_hm_mode_t *val)
cparata 0:6d69e896ce38 621 {
cparata 0:6d69e896ce38 622 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 623 int32_t ret;
cparata 0:6d69e896ce38 624
cparata 0:6d69e896ce38 625 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 626 switch (reg.g_hm_mode) {
cparata 0:6d69e896ce38 627 case LSM6DSO_GY_HIGH_PERFORMANCE:
cparata 0:6d69e896ce38 628 *val = LSM6DSO_GY_HIGH_PERFORMANCE;
cparata 0:6d69e896ce38 629 break;
cparata 0:6d69e896ce38 630 case LSM6DSO_GY_NORMAL:
cparata 0:6d69e896ce38 631 *val = LSM6DSO_GY_NORMAL;
cparata 0:6d69e896ce38 632 break;
cparata 0:6d69e896ce38 633 default:
cparata 0:6d69e896ce38 634 *val = LSM6DSO_GY_HIGH_PERFORMANCE;
cparata 0:6d69e896ce38 635 break;
cparata 0:6d69e896ce38 636 }
cparata 0:6d69e896ce38 637 return ret;
cparata 0:6d69e896ce38 638 }
cparata 0:6d69e896ce38 639
cparata 0:6d69e896ce38 640 /**
cparata 0:6d69e896ce38 641 * @brief Read all the interrupt flag of the device.[get]
cparata 0:6d69e896ce38 642 *
cparata 0:6d69e896ce38 643 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 644 * @param val registers ALL_INT_SRC; WAKE_UP_SRC;
cparata 0:6d69e896ce38 645 * TAP_SRC; D6D_SRC; STATUS_REG;
cparata 0:6d69e896ce38 646 * EMB_FUNC_STATUS; FSM_STATUS_A/B
cparata 0:6d69e896ce38 647 *
cparata 0:6d69e896ce38 648 */
cparata 0:6d69e896ce38 649 int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 650 lsm6dso_all_sources_t *val)
cparata 0:6d69e896ce38 651 {
cparata 0:6d69e896ce38 652 int32_t ret;
cparata 0:6d69e896ce38 653
cparata 0:6d69e896ce38 654 ret = lsm6dso_read_reg(ctx, LSM6DSO_ALL_INT_SRC,
cparata 0:6d69e896ce38 655 (uint8_t*)&val->all_int_src, 1);
cparata 0:6d69e896ce38 656 if (ret == 0) {
cparata 0:6d69e896ce38 657 ret = lsm6dso_read_reg(ctx, LSM6DSO_WAKE_UP_SRC,
cparata 0:6d69e896ce38 658 (uint8_t*)&val->wake_up_src, 1);
cparata 0:6d69e896ce38 659 }
cparata 0:6d69e896ce38 660 if (ret == 0) {
cparata 0:6d69e896ce38 661 ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_SRC,
cparata 0:6d69e896ce38 662 (uint8_t*)&val->tap_src, 1);
cparata 0:6d69e896ce38 663 }
cparata 0:6d69e896ce38 664 if (ret == 0) {
cparata 0:6d69e896ce38 665 ret = lsm6dso_read_reg(ctx, LSM6DSO_D6D_SRC,
cparata 0:6d69e896ce38 666 (uint8_t*)&val->d6d_src, 1);
cparata 0:6d69e896ce38 667 }
cparata 0:6d69e896ce38 668 if (ret == 0) {
cparata 0:6d69e896ce38 669 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG,
cparata 0:6d69e896ce38 670 (uint8_t*)&val->status_reg, 1);
cparata 0:6d69e896ce38 671 }
cparata 0:6d69e896ce38 672 if (ret == 0) {
cparata 0:6d69e896ce38 673
cparata 0:6d69e896ce38 674 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 0:6d69e896ce38 675 }
cparata 0:6d69e896ce38 676 if (ret == 0) {
cparata 0:6d69e896ce38 677 ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_STATUS,
cparata 0:6d69e896ce38 678 (uint8_t*)&val->emb_func_status, 1);
cparata 0:6d69e896ce38 679 }
cparata 0:6d69e896ce38 680 if (ret == 0) {
cparata 0:6d69e896ce38 681 ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_STATUS_A,
cparata 0:6d69e896ce38 682 (uint8_t*)&val->fsm_status_a, 1);
cparata 0:6d69e896ce38 683 }
cparata 0:6d69e896ce38 684 if (ret == 0) {
cparata 0:6d69e896ce38 685 ret = lsm6dso_read_reg(ctx, LSM6DSO_FSM_STATUS_B,
cparata 0:6d69e896ce38 686 (uint8_t*)&val->fsm_status_b, 1);
cparata 0:6d69e896ce38 687 }
cparata 0:6d69e896ce38 688 if (ret == 0) {
cparata 0:6d69e896ce38 689 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 0:6d69e896ce38 690 }
cparata 0:6d69e896ce38 691 return ret;
cparata 0:6d69e896ce38 692 }
cparata 0:6d69e896ce38 693
cparata 0:6d69e896ce38 694 /**
cparata 0:6d69e896ce38 695 * @brief The STATUS_REG register is read by the primary interface.[get]
cparata 0:6d69e896ce38 696 *
cparata 0:6d69e896ce38 697 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 698 * @param val register STATUS_REG
cparata 0:6d69e896ce38 699 *
cparata 0:6d69e896ce38 700 */
cparata 0:6d69e896ce38 701 int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx, lsm6dso_status_reg_t *val)
cparata 0:6d69e896ce38 702 {
cparata 0:6d69e896ce38 703 int32_t ret;
cparata 0:6d69e896ce38 704 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*) val, 1);
cparata 0:6d69e896ce38 705 return ret;
cparata 0:6d69e896ce38 706 }
cparata 0:6d69e896ce38 707
cparata 0:6d69e896ce38 708 /**
cparata 0:6d69e896ce38 709 * @brief Accelerometer new data available.[get]
cparata 0:6d69e896ce38 710 *
cparata 0:6d69e896ce38 711 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 712 * @param val change the values of xlda in reg STATUS_REG
cparata 0:6d69e896ce38 713 *
cparata 0:6d69e896ce38 714 */
cparata 0:6d69e896ce38 715 int32_t lsm6dso_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 716 {
cparata 0:6d69e896ce38 717 lsm6dso_status_reg_t reg;
cparata 0:6d69e896ce38 718 int32_t ret;
cparata 0:6d69e896ce38 719
cparata 0:6d69e896ce38 720 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 721 *val = reg.xlda;
cparata 0:6d69e896ce38 722
cparata 0:6d69e896ce38 723 return ret;
cparata 0:6d69e896ce38 724 }
cparata 0:6d69e896ce38 725
cparata 0:6d69e896ce38 726 /**
cparata 0:6d69e896ce38 727 * @brief Gyroscope new data available.[get]
cparata 0:6d69e896ce38 728 *
cparata 0:6d69e896ce38 729 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 730 * @param val change the values of gda in reg STATUS_REG
cparata 0:6d69e896ce38 731 *
cparata 0:6d69e896ce38 732 */
cparata 0:6d69e896ce38 733 int32_t lsm6dso_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 734 {
cparata 0:6d69e896ce38 735 lsm6dso_status_reg_t reg;
cparata 0:6d69e896ce38 736 int32_t ret;
cparata 0:6d69e896ce38 737
cparata 0:6d69e896ce38 738 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 739 *val = reg.gda;
cparata 0:6d69e896ce38 740
cparata 0:6d69e896ce38 741 return ret;
cparata 0:6d69e896ce38 742 }
cparata 0:6d69e896ce38 743
cparata 0:6d69e896ce38 744 /**
cparata 0:6d69e896ce38 745 * @brief Temperature new data available.[get]
cparata 0:6d69e896ce38 746 *
cparata 0:6d69e896ce38 747 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 748 * @param val change the values of tda in reg STATUS_REG
cparata 0:6d69e896ce38 749 *
cparata 0:6d69e896ce38 750 */
cparata 0:6d69e896ce38 751 int32_t lsm6dso_temp_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 752 {
cparata 0:6d69e896ce38 753 lsm6dso_status_reg_t reg;
cparata 0:6d69e896ce38 754 int32_t ret;
cparata 0:6d69e896ce38 755
cparata 0:6d69e896ce38 756 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_REG, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 757 *val = reg.tda;
cparata 0:6d69e896ce38 758
cparata 0:6d69e896ce38 759 return ret;
cparata 0:6d69e896ce38 760 }
cparata 0:6d69e896ce38 761
cparata 0:6d69e896ce38 762 /**
cparata 0:6d69e896ce38 763 * @brief Accelerometer X-axis user offset correction expressed in
cparata 0:6d69e896ce38 764 * two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 765 * The value must be in the range [-127 127].[set]
cparata 0:6d69e896ce38 766 *
cparata 0:6d69e896ce38 767 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 768 * @param buff buffer that contains data to write
cparata 0:6d69e896ce38 769 *
cparata 0:6d69e896ce38 770 */
cparata 0:6d69e896ce38 771 int32_t lsm6dso_xl_usr_offset_x_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 772 {
cparata 0:6d69e896ce38 773 int32_t ret;
cparata 0:6d69e896ce38 774 ret = lsm6dso_write_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
cparata 0:6d69e896ce38 775 return ret;
cparata 0:6d69e896ce38 776 }
cparata 0:6d69e896ce38 777
cparata 0:6d69e896ce38 778 /**
cparata 0:6d69e896ce38 779 * @brief Accelerometer X-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 780 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 781 * The value must be in the range [-127 127].[get]
cparata 0:6d69e896ce38 782 *
cparata 0:6d69e896ce38 783 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 784 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 785 *
cparata 0:6d69e896ce38 786 */
cparata 0:6d69e896ce38 787 int32_t lsm6dso_xl_usr_offset_x_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 788 {
cparata 0:6d69e896ce38 789 int32_t ret;
cparata 0:6d69e896ce38 790 ret = lsm6dso_read_reg(ctx, LSM6DSO_X_OFS_USR, buff, 1);
cparata 0:6d69e896ce38 791 return ret;
cparata 0:6d69e896ce38 792 }
cparata 0:6d69e896ce38 793
cparata 0:6d69e896ce38 794 /**
cparata 0:6d69e896ce38 795 * @brief Accelerometer Y-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 796 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 797 * The value must be in the range [-127 127].[set]
cparata 0:6d69e896ce38 798 *
cparata 0:6d69e896ce38 799 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 800 * @param buff buffer that contains data to write
cparata 0:6d69e896ce38 801 *
cparata 0:6d69e896ce38 802 */
cparata 0:6d69e896ce38 803 int32_t lsm6dso_xl_usr_offset_y_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 804 {
cparata 0:6d69e896ce38 805 int32_t ret;
cparata 0:6d69e896ce38 806 ret = lsm6dso_write_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
cparata 0:6d69e896ce38 807 return ret;
cparata 0:6d69e896ce38 808 }
cparata 0:6d69e896ce38 809
cparata 0:6d69e896ce38 810 /**
cparata 0:6d69e896ce38 811 * @brief Accelerometer Y-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 812 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 813 * The value must be in the range [-127 127].[get]
cparata 0:6d69e896ce38 814 *
cparata 0:6d69e896ce38 815 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 816 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 817 *
cparata 0:6d69e896ce38 818 */
cparata 0:6d69e896ce38 819 int32_t lsm6dso_xl_usr_offset_y_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 820 {
cparata 0:6d69e896ce38 821 int32_t ret;
cparata 0:6d69e896ce38 822 ret = lsm6dso_read_reg(ctx, LSM6DSO_Y_OFS_USR, buff, 1);
cparata 0:6d69e896ce38 823 return ret;
cparata 0:6d69e896ce38 824 }
cparata 0:6d69e896ce38 825
cparata 0:6d69e896ce38 826 /**
cparata 0:6d69e896ce38 827 * @brief Accelerometer Z-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 828 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 829 * The value must be in the range [-127 127].[set]
cparata 0:6d69e896ce38 830 *
cparata 0:6d69e896ce38 831 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 832 * @param buff buffer that contains data to write
cparata 0:6d69e896ce38 833 *
cparata 0:6d69e896ce38 834 */
cparata 0:6d69e896ce38 835 int32_t lsm6dso_xl_usr_offset_z_set(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 836 {
cparata 0:6d69e896ce38 837 int32_t ret;
cparata 0:6d69e896ce38 838 ret = lsm6dso_write_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
cparata 0:6d69e896ce38 839 return ret;
cparata 0:6d69e896ce38 840 }
cparata 0:6d69e896ce38 841
cparata 0:6d69e896ce38 842 /**
cparata 0:6d69e896ce38 843 * @brief Accelerometer Z-axis user offset correction expressed in two’s
cparata 0:6d69e896ce38 844 * complement, weight depends on USR_OFF_W in CTRL6_C (15h).
cparata 0:6d69e896ce38 845 * The value must be in the range [-127 127].[get]
cparata 0:6d69e896ce38 846 *
cparata 0:6d69e896ce38 847 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 848 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 849 *
cparata 0:6d69e896ce38 850 */
cparata 0:6d69e896ce38 851 int32_t lsm6dso_xl_usr_offset_z_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 852 {
cparata 0:6d69e896ce38 853 int32_t ret;
cparata 0:6d69e896ce38 854 ret = lsm6dso_read_reg(ctx, LSM6DSO_Z_OFS_USR, buff, 1);
cparata 0:6d69e896ce38 855 return ret;
cparata 0:6d69e896ce38 856 }
cparata 0:6d69e896ce38 857
cparata 0:6d69e896ce38 858 /**
cparata 0:6d69e896ce38 859 * @brief Enables user offset on out.[set]
cparata 0:6d69e896ce38 860 *
cparata 0:6d69e896ce38 861 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 862 * @param val change the values of usr_off_on_out in reg CTRL7_G
cparata 0:6d69e896ce38 863 *
cparata 0:6d69e896ce38 864 */
cparata 0:6d69e896ce38 865 int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 866 {
cparata 0:6d69e896ce38 867 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 868 int32_t ret;
cparata 0:6d69e896ce38 869
cparata 0:6d69e896ce38 870 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 871 if (ret == 0) {
cparata 0:6d69e896ce38 872 reg.usr_off_on_out = val;
cparata 0:6d69e896ce38 873 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 874 }
cparata 0:6d69e896ce38 875 return ret;
cparata 0:6d69e896ce38 876 }
cparata 0:6d69e896ce38 877
cparata 0:6d69e896ce38 878 /**
cparata 0:6d69e896ce38 879 * @brief User offset on out flag.[get]
cparata 0:6d69e896ce38 880 *
cparata 0:6d69e896ce38 881 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 882 * @param val values of usr_off_on_out in reg CTRL7_G
cparata 0:6d69e896ce38 883 *
cparata 0:6d69e896ce38 884 */
cparata 0:6d69e896ce38 885 int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 886 {
cparata 0:6d69e896ce38 887 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 888 int32_t ret;
cparata 0:6d69e896ce38 889
cparata 0:6d69e896ce38 890 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 891 *val = reg.usr_off_on_out;
cparata 0:6d69e896ce38 892
cparata 0:6d69e896ce38 893 return ret;
cparata 0:6d69e896ce38 894 }
cparata 0:6d69e896ce38 895
cparata 0:6d69e896ce38 896 /**
cparata 0:6d69e896ce38 897 * @}
cparata 0:6d69e896ce38 898 *
cparata 0:6d69e896ce38 899 */
cparata 0:6d69e896ce38 900
cparata 0:6d69e896ce38 901 /**
cparata 0:6d69e896ce38 902 * @defgroup LSM6DSO_Timestamp
cparata 0:6d69e896ce38 903 * @brief This section groups all the functions that manage the
cparata 0:6d69e896ce38 904 * timestamp generation.
cparata 0:6d69e896ce38 905 * @{
cparata 0:6d69e896ce38 906 *
cparata 0:6d69e896ce38 907 */
cparata 0:6d69e896ce38 908
cparata 0:6d69e896ce38 909 /**
cparata 0:6d69e896ce38 910 * @brief Enables timestamp counter.[set]
cparata 0:6d69e896ce38 911 *
cparata 0:6d69e896ce38 912 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 913 * @param val change the values of timestamp_en in reg CTRL10_C
cparata 0:6d69e896ce38 914 *
cparata 0:6d69e896ce38 915 */
cparata 0:6d69e896ce38 916 int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 917 {
cparata 0:6d69e896ce38 918 lsm6dso_ctrl10_c_t reg;
cparata 0:6d69e896ce38 919 int32_t ret;
cparata 0:6d69e896ce38 920
cparata 0:6d69e896ce38 921 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 922 if (ret == 0) {
cparata 0:6d69e896ce38 923 reg.timestamp_en = val;
cparata 0:6d69e896ce38 924 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 925 }
cparata 0:6d69e896ce38 926 return ret;
cparata 0:6d69e896ce38 927 }
cparata 0:6d69e896ce38 928
cparata 0:6d69e896ce38 929 /**
cparata 0:6d69e896ce38 930 * @brief Enables timestamp counter.[get]
cparata 0:6d69e896ce38 931 *
cparata 0:6d69e896ce38 932 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 933 * @param val change the values of timestamp_en in reg CTRL10_C
cparata 0:6d69e896ce38 934 *
cparata 0:6d69e896ce38 935 */
cparata 0:6d69e896ce38 936 int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 937 {
cparata 0:6d69e896ce38 938 lsm6dso_ctrl10_c_t reg;
cparata 0:6d69e896ce38 939 int32_t ret;
cparata 0:6d69e896ce38 940
cparata 0:6d69e896ce38 941 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL10_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 942 *val = reg.timestamp_en;
cparata 0:6d69e896ce38 943
cparata 0:6d69e896ce38 944 return ret;
cparata 0:6d69e896ce38 945 }
cparata 0:6d69e896ce38 946
cparata 0:6d69e896ce38 947 /**
cparata 0:6d69e896ce38 948 * @brief Timestamp first data output register (r).
cparata 0:6d69e896ce38 949 * The value is expressed as a 32-bit word and the bit
cparata 0:6d69e896ce38 950 * resolution is 25 μs.[get]
cparata 0:6d69e896ce38 951 *
cparata 0:6d69e896ce38 952 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 953 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 954 *
cparata 0:6d69e896ce38 955 */
cparata 0:6d69e896ce38 956 int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 957 {
cparata 0:6d69e896ce38 958 int32_t ret;
cparata 0:6d69e896ce38 959 ret = lsm6dso_read_reg(ctx, LSM6DSO_TIMESTAMP0, buff, 4);
cparata 0:6d69e896ce38 960 return ret;
cparata 0:6d69e896ce38 961 }
cparata 0:6d69e896ce38 962
cparata 0:6d69e896ce38 963 /**
cparata 0:6d69e896ce38 964 * @}
cparata 0:6d69e896ce38 965 *
cparata 0:6d69e896ce38 966 */
cparata 0:6d69e896ce38 967
cparata 0:6d69e896ce38 968 /**
cparata 0:6d69e896ce38 969 * @defgroup LSM6DSO_Data output
cparata 0:6d69e896ce38 970 * @brief This section groups all the data output functions.
cparata 0:6d69e896ce38 971 * @{
cparata 0:6d69e896ce38 972 *
cparata 0:6d69e896ce38 973 */
cparata 0:6d69e896ce38 974
cparata 0:6d69e896ce38 975 /**
cparata 0:6d69e896ce38 976 * @brief Circular burst-mode (rounding) read of the output
cparata 0:6d69e896ce38 977 * registers.[set]
cparata 0:6d69e896ce38 978 *
cparata 0:6d69e896ce38 979 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 980 * @param val change the values of rounding in reg CTRL5_C
cparata 0:6d69e896ce38 981 *
cparata 0:6d69e896ce38 982 */
cparata 0:6d69e896ce38 983 int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 984 lsm6dso_rounding_t val)
cparata 0:6d69e896ce38 985 {
cparata 0:6d69e896ce38 986 lsm6dso_ctrl5_c_t reg;
cparata 0:6d69e896ce38 987 int32_t ret;
cparata 0:6d69e896ce38 988
cparata 0:6d69e896ce38 989 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 990 if (ret == 0) {
cparata 0:6d69e896ce38 991 reg.rounding = (uint8_t)val;
cparata 0:6d69e896ce38 992 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 993 }
cparata 0:6d69e896ce38 994 return ret;
cparata 0:6d69e896ce38 995 }
cparata 0:6d69e896ce38 996
cparata 0:6d69e896ce38 997 /**
cparata 0:6d69e896ce38 998 * @brief Gyroscope UI chain full-scale selection.[get]
cparata 0:6d69e896ce38 999 *
cparata 0:6d69e896ce38 1000 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1001 * @param val Get the values of rounding in reg CTRL5_C
cparata 0:6d69e896ce38 1002 *
cparata 0:6d69e896ce38 1003 */
cparata 0:6d69e896ce38 1004 int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1005 lsm6dso_rounding_t *val)
cparata 0:6d69e896ce38 1006 {
cparata 0:6d69e896ce38 1007 lsm6dso_ctrl5_c_t reg;
cparata 0:6d69e896ce38 1008 int32_t ret;
cparata 0:6d69e896ce38 1009
cparata 0:6d69e896ce38 1010 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1011 switch (reg.rounding) {
cparata 0:6d69e896ce38 1012 case LSM6DSO_NO_ROUND:
cparata 0:6d69e896ce38 1013 *val = LSM6DSO_NO_ROUND;
cparata 0:6d69e896ce38 1014 break;
cparata 0:6d69e896ce38 1015 case LSM6DSO_ROUND_XL:
cparata 0:6d69e896ce38 1016 *val = LSM6DSO_ROUND_XL;
cparata 0:6d69e896ce38 1017 break;
cparata 0:6d69e896ce38 1018 case LSM6DSO_ROUND_GY:
cparata 0:6d69e896ce38 1019 *val = LSM6DSO_ROUND_GY;
cparata 0:6d69e896ce38 1020 break;
cparata 0:6d69e896ce38 1021 case LSM6DSO_ROUND_GY_XL:
cparata 0:6d69e896ce38 1022 *val = LSM6DSO_ROUND_GY_XL;
cparata 0:6d69e896ce38 1023 break;
cparata 0:6d69e896ce38 1024 default:
cparata 0:6d69e896ce38 1025 *val = LSM6DSO_NO_ROUND;
cparata 0:6d69e896ce38 1026 break;
cparata 0:6d69e896ce38 1027 }
cparata 0:6d69e896ce38 1028 return ret;
cparata 0:6d69e896ce38 1029 }
cparata 0:6d69e896ce38 1030
cparata 0:6d69e896ce38 1031 /**
cparata 0:6d69e896ce38 1032 * @brief Temperature data output register (r).
cparata 0:6d69e896ce38 1033 * L and H registers together express a 16-bit word in two’s
cparata 0:6d69e896ce38 1034 * complement.[get]
cparata 0:6d69e896ce38 1035 *
cparata 0:6d69e896ce38 1036 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1037 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1038 *
cparata 0:6d69e896ce38 1039 */
cparata 0:6d69e896ce38 1040 int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1041 {
cparata 0:6d69e896ce38 1042 int32_t ret;
cparata 0:6d69e896ce38 1043 ret = lsm6dso_read_reg(ctx, LSM6DSO_OUT_TEMP_L, buff, 2);
cparata 0:6d69e896ce38 1044 return ret;
cparata 0:6d69e896ce38 1045 }
cparata 0:6d69e896ce38 1046
cparata 0:6d69e896ce38 1047 /**
cparata 0:6d69e896ce38 1048 * @brief Angular rate sensor. The value is expressed as a 16-bit
cparata 0:6d69e896ce38 1049 * word in two’s complement.[get]
cparata 0:6d69e896ce38 1050 *
cparata 0:6d69e896ce38 1051 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1052 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1053 *
cparata 0:6d69e896ce38 1054 */
cparata 0:6d69e896ce38 1055 int32_t lsm6dso_angular_rate_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1056 {
cparata 0:6d69e896ce38 1057 int32_t ret;
cparata 0:6d69e896ce38 1058 ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_G, buff, 6);
cparata 0:6d69e896ce38 1059 return ret;
cparata 0:6d69e896ce38 1060 }
cparata 0:6d69e896ce38 1061
cparata 0:6d69e896ce38 1062 /**
cparata 0:6d69e896ce38 1063 * @brief Linear acceleration output register.
cparata 0:6d69e896ce38 1064 * The value is expressed as a 16-bit word in two’s complement.[get]
cparata 0:6d69e896ce38 1065 *
cparata 0:6d69e896ce38 1066 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1067 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1068 *
cparata 0:6d69e896ce38 1069 */
cparata 0:6d69e896ce38 1070 int32_t lsm6dso_acceleration_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1071 {
cparata 0:6d69e896ce38 1072 int32_t ret;
cparata 0:6d69e896ce38 1073 ret = lsm6dso_read_reg(ctx, LSM6DSO_OUTX_L_A, buff, 6);
cparata 0:6d69e896ce38 1074 return ret;
cparata 0:6d69e896ce38 1075 }
cparata 0:6d69e896ce38 1076
cparata 0:6d69e896ce38 1077 /**
cparata 0:6d69e896ce38 1078 * @brief FIFO data output [get]
cparata 0:6d69e896ce38 1079 *
cparata 0:6d69e896ce38 1080 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1081 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1082 *
cparata 0:6d69e896ce38 1083 */
cparata 0:6d69e896ce38 1084 int32_t lsm6dso_fifo_out_raw_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1085 {
cparata 0:6d69e896ce38 1086 int32_t ret;
cparata 0:6d69e896ce38 1087 ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_DATA_OUT_X_L, buff, 6);
cparata 0:6d69e896ce38 1088 return ret;
cparata 0:6d69e896ce38 1089 }
cparata 0:6d69e896ce38 1090
cparata 0:6d69e896ce38 1091 /**
cparata 0:6d69e896ce38 1092 * @brief Step counter output register.[get]
cparata 0:6d69e896ce38 1093 *
cparata 0:6d69e896ce38 1094 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1095 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1096 *
cparata 0:6d69e896ce38 1097 */
cparata 0:6d69e896ce38 1098 int32_t lsm6dso_number_of_steps_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1099 {
cparata 0:6d69e896ce38 1100 int32_t ret;
cparata 0:6d69e896ce38 1101
cparata 0:6d69e896ce38 1102 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 0:6d69e896ce38 1103 if (ret == 0) {
cparata 0:6d69e896ce38 1104 ret = lsm6dso_read_reg(ctx, LSM6DSO_STEP_COUNTER_L, buff, 2);
cparata 0:6d69e896ce38 1105 }
cparata 0:6d69e896ce38 1106 if (ret == 0) {
cparata 0:6d69e896ce38 1107 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 0:6d69e896ce38 1108 }
cparata 0:6d69e896ce38 1109 return ret;
cparata 0:6d69e896ce38 1110 }
cparata 0:6d69e896ce38 1111
cparata 0:6d69e896ce38 1112 /**
cparata 0:6d69e896ce38 1113 * @brief Reset step counter register.[get]
cparata 0:6d69e896ce38 1114 *
cparata 0:6d69e896ce38 1115 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1116 *
cparata 0:6d69e896ce38 1117 */
cparata 0:6d69e896ce38 1118 int32_t lsm6dso_steps_reset(lsm6dso_ctx_t *ctx)
cparata 0:6d69e896ce38 1119 {
cparata 0:6d69e896ce38 1120 lsm6dso_emb_func_src_t reg;
cparata 0:6d69e896ce38 1121 int32_t ret;
cparata 0:6d69e896ce38 1122
cparata 0:6d69e896ce38 1123 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 0:6d69e896ce38 1124 if (ret == 0) {
cparata 0:6d69e896ce38 1125 ret = lsm6dso_read_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1126 }
cparata 0:6d69e896ce38 1127 if (ret == 0) {
cparata 0:6d69e896ce38 1128 reg.pedo_rst_step = PROPERTY_ENABLE;
cparata 0:6d69e896ce38 1129 ret = lsm6dso_write_reg(ctx, LSM6DSO_EMB_FUNC_SRC, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1130 }
cparata 0:6d69e896ce38 1131 if (ret == 0) {
cparata 0:6d69e896ce38 1132 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 0:6d69e896ce38 1133 }
cparata 0:6d69e896ce38 1134 return ret;
cparata 0:6d69e896ce38 1135 }
cparata 0:6d69e896ce38 1136
cparata 0:6d69e896ce38 1137 /**
cparata 0:6d69e896ce38 1138 * @}
cparata 0:6d69e896ce38 1139 *
cparata 0:6d69e896ce38 1140 */
cparata 0:6d69e896ce38 1141
cparata 0:6d69e896ce38 1142 /**
cparata 0:6d69e896ce38 1143 * @defgroup LSM6DSO_common
cparata 0:6d69e896ce38 1144 * @brief This section groups common usefull functions.
cparata 0:6d69e896ce38 1145 * @{
cparata 0:6d69e896ce38 1146 *
cparata 0:6d69e896ce38 1147 */
cparata 0:6d69e896ce38 1148
cparata 0:6d69e896ce38 1149 /**
cparata 0:6d69e896ce38 1150 * @brief Difference in percentage of the effective ODR(and timestamp rate)
cparata 0:6d69e896ce38 1151 * with respect to the typical.
cparata 0:6d69e896ce38 1152 * Step: 0.15%. 8-bit format, 2's complement.[set]
cparata 0:6d69e896ce38 1153 *
cparata 0:6d69e896ce38 1154 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1155 * @param val change the values of freq_fine in reg
cparata 0:6d69e896ce38 1156 * INTERNAL_FREQ_FINE
cparata 0:6d69e896ce38 1157 *
cparata 0:6d69e896ce38 1158 */
cparata 0:6d69e896ce38 1159 int32_t lsm6dso_odr_cal_reg_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1160 {
cparata 0:6d69e896ce38 1161 lsm6dso_internal_freq_fine_t reg;
cparata 0:6d69e896ce38 1162 int32_t ret;
cparata 0:6d69e896ce38 1163
cparata 0:6d69e896ce38 1164 ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1165 if (ret == 0) {
cparata 0:6d69e896ce38 1166 reg.freq_fine = val;
cparata 0:6d69e896ce38 1167 ret = lsm6dso_write_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE,
cparata 0:6d69e896ce38 1168 (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1169 }
cparata 0:6d69e896ce38 1170 return ret;
cparata 0:6d69e896ce38 1171 }
cparata 0:6d69e896ce38 1172
cparata 0:6d69e896ce38 1173 /**
cparata 0:6d69e896ce38 1174 * @brief Difference in percentage of the effective ODR(and timestamp rate)
cparata 0:6d69e896ce38 1175 * with respect to the typical.
cparata 0:6d69e896ce38 1176 * Step: 0.15%. 8-bit format, 2's complement.[get]
cparata 0:6d69e896ce38 1177 *
cparata 0:6d69e896ce38 1178 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1179 * @param val change the values of freq_fine in reg INTERNAL_FREQ_FINE
cparata 0:6d69e896ce38 1180 *
cparata 0:6d69e896ce38 1181 */
cparata 0:6d69e896ce38 1182 int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1183 {
cparata 0:6d69e896ce38 1184 lsm6dso_internal_freq_fine_t reg;
cparata 0:6d69e896ce38 1185 int32_t ret;
cparata 0:6d69e896ce38 1186
cparata 0:6d69e896ce38 1187 ret = lsm6dso_read_reg(ctx, LSM6DSO_INTERNAL_FREQ_FINE, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1188 *val = reg.freq_fine;
cparata 0:6d69e896ce38 1189
cparata 0:6d69e896ce38 1190 return ret;
cparata 0:6d69e896ce38 1191 }
cparata 0:6d69e896ce38 1192
cparata 0:6d69e896ce38 1193
cparata 0:6d69e896ce38 1194 /**
cparata 0:6d69e896ce38 1195 * @brief Enable access to the embedded functions/sensor
cparata 0:6d69e896ce38 1196 * hub configuration registers.[set]
cparata 0:6d69e896ce38 1197 *
cparata 0:6d69e896ce38 1198 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1199 * @param val change the values of reg_access in
cparata 0:6d69e896ce38 1200 * reg FUNC_CFG_ACCESS
cparata 0:6d69e896ce38 1201 *
cparata 0:6d69e896ce38 1202 */
cparata 0:6d69e896ce38 1203 int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val)
cparata 0:6d69e896ce38 1204 {
cparata 0:6d69e896ce38 1205 lsm6dso_func_cfg_access_t reg;
cparata 0:6d69e896ce38 1206 int32_t ret;
cparata 0:6d69e896ce38 1207
cparata 0:6d69e896ce38 1208 ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1209 if (ret == 0) {
cparata 0:6d69e896ce38 1210 reg.reg_access = (uint8_t)val;
cparata 0:6d69e896ce38 1211 ret = lsm6dso_write_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1212 }
cparata 0:6d69e896ce38 1213 return ret;
cparata 0:6d69e896ce38 1214 }
cparata 0:6d69e896ce38 1215
cparata 0:6d69e896ce38 1216 /**
cparata 0:6d69e896ce38 1217 * @brief Enable access to the embedded functions/sensor
cparata 0:6d69e896ce38 1218 * hub configuration registers.[get]
cparata 0:6d69e896ce38 1219 *
cparata 0:6d69e896ce38 1220 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1221 * @param val Get the values of reg_access in
cparata 0:6d69e896ce38 1222 * reg FUNC_CFG_ACCESS
cparata 0:6d69e896ce38 1223 *
cparata 0:6d69e896ce38 1224 */
cparata 0:6d69e896ce38 1225 int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t *val)
cparata 0:6d69e896ce38 1226 {
cparata 0:6d69e896ce38 1227 lsm6dso_func_cfg_access_t reg;
cparata 0:6d69e896ce38 1228 int32_t ret;
cparata 0:6d69e896ce38 1229
cparata 0:6d69e896ce38 1230 ret = lsm6dso_read_reg(ctx, LSM6DSO_FUNC_CFG_ACCESS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1231 switch (reg.reg_access) {
cparata 0:6d69e896ce38 1232 case LSM6DSO_USER_BANK:
cparata 0:6d69e896ce38 1233 *val = LSM6DSO_USER_BANK;
cparata 0:6d69e896ce38 1234 break;
cparata 0:6d69e896ce38 1235 case LSM6DSO_SENSOR_HUB_BANK:
cparata 0:6d69e896ce38 1236 *val = LSM6DSO_SENSOR_HUB_BANK;
cparata 0:6d69e896ce38 1237 break;
cparata 0:6d69e896ce38 1238 case LSM6DSO_EMBEDDED_FUNC_BANK:
cparata 0:6d69e896ce38 1239 *val = LSM6DSO_EMBEDDED_FUNC_BANK;
cparata 0:6d69e896ce38 1240 break;
cparata 0:6d69e896ce38 1241 default:
cparata 0:6d69e896ce38 1242 *val = LSM6DSO_USER_BANK;
cparata 0:6d69e896ce38 1243 break;
cparata 0:6d69e896ce38 1244 }
cparata 0:6d69e896ce38 1245 return ret;
cparata 0:6d69e896ce38 1246 }
cparata 0:6d69e896ce38 1247
cparata 0:6d69e896ce38 1248 /**
cparata 0:6d69e896ce38 1249 * @brief Write a line(byte) in a page.[set]
cparata 0:6d69e896ce38 1250 *
cparata 0:6d69e896ce38 1251 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1252 * @param uint8_t address: page line address
cparata 0:6d69e896ce38 1253 * @param val value to write
cparata 0:6d69e896ce38 1254 *
cparata 0:6d69e896ce38 1255 */
cparata 0:6d69e896ce38 1256 int32_t lsm6dso_ln_pg_write_byte(lsm6dso_ctx_t *ctx, uint16_t address,
cparata 0:6d69e896ce38 1257 uint8_t *val)
cparata 0:6d69e896ce38 1258 {
cparata 0:6d69e896ce38 1259 lsm6dso_page_rw_t page_rw;
cparata 0:6d69e896ce38 1260 lsm6dso_page_sel_t page_sel;
cparata 0:6d69e896ce38 1261 lsm6dso_page_address_t page_address;
cparata 0:6d69e896ce38 1262 int32_t ret;
cparata 0:6d69e896ce38 1263
cparata 0:6d69e896ce38 1264 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 0:6d69e896ce38 1265
cparata 0:6d69e896ce38 1266 if (ret == 0) {
cparata 0:6d69e896ce38 1267 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1268 }
cparata 0:6d69e896ce38 1269 if (ret == 0) {
cparata 0:6d69e896ce38 1270 page_rw.page_rw = 0x02; /* page_write enable */
cparata 0:6d69e896ce38 1271 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1272 }
cparata 0:6d69e896ce38 1273 if (ret == 0) {
cparata 0:6d69e896ce38 1274 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1275 }
cparata 0:6d69e896ce38 1276
cparata 0:6d69e896ce38 1277 if (ret == 0) {
cparata 0:6d69e896ce38 1278 page_sel.page_sel = (((uint8_t)address >> 8) & 0x0FU);
cparata 0:6d69e896ce38 1279 page_sel.not_used_01 = 1;
cparata 0:6d69e896ce38 1280 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1281 }
cparata 0:6d69e896ce38 1282 if (ret == 0) {
cparata 0:6d69e896ce38 1283 page_address.page_addr = (uint8_t)address & 0xFFU;
cparata 0:6d69e896ce38 1284 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
cparata 0:6d69e896ce38 1285 (uint8_t*)&page_address, 1);
cparata 0:6d69e896ce38 1286 }
cparata 0:6d69e896ce38 1287 if (ret == 0) {
cparata 0:6d69e896ce38 1288 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, val, 1);
cparata 0:6d69e896ce38 1289 }
cparata 0:6d69e896ce38 1290 if (ret == 0) {
cparata 0:6d69e896ce38 1291 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1292 }
cparata 0:6d69e896ce38 1293 if (ret == 0) {
cparata 0:6d69e896ce38 1294 page_rw.page_rw = 0x00; /* page_write disable */
cparata 0:6d69e896ce38 1295 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1296 }
cparata 0:6d69e896ce38 1297 if (ret == 0) {
cparata 0:6d69e896ce38 1298
cparata 0:6d69e896ce38 1299 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 0:6d69e896ce38 1300 }
cparata 0:6d69e896ce38 1301 return ret;
cparata 0:6d69e896ce38 1302 }
cparata 0:6d69e896ce38 1303
cparata 0:6d69e896ce38 1304 /**
cparata 0:6d69e896ce38 1305 * @brief Write buffer in a page.[set]
cparata 0:6d69e896ce38 1306 *
cparata 0:6d69e896ce38 1307 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1308 * @param uint8_t address: page line address
cparata 0:6d69e896ce38 1309 * @param uint8_t *buf: buffer to write
cparata 0:6d69e896ce38 1310 * @param uint8_t len: buffer len
cparata 0:6d69e896ce38 1311 *
cparata 0:6d69e896ce38 1312 */
cparata 0:6d69e896ce38 1313 int32_t lsm6dso_ln_pg_write(lsm6dso_ctx_t *ctx, uint16_t address,
cparata 0:6d69e896ce38 1314 uint8_t *buf, uint8_t len)
cparata 0:6d69e896ce38 1315 {
cparata 0:6d69e896ce38 1316 lsm6dso_page_rw_t page_rw;
cparata 0:6d69e896ce38 1317 lsm6dso_page_sel_t page_sel;
cparata 0:6d69e896ce38 1318 lsm6dso_page_address_t page_address;
cparata 0:6d69e896ce38 1319 int32_t ret;
cparata 0:6d69e896ce38 1320 uint8_t msb, lsb;
cparata 0:6d69e896ce38 1321 uint8_t i ;
cparata 0:6d69e896ce38 1322
cparata 0:6d69e896ce38 1323 msb = (((uint8_t)address >> 8) & 0x0fU);
cparata 0:6d69e896ce38 1324 lsb = (uint8_t)address & 0xFFU;
cparata 0:6d69e896ce38 1325
cparata 0:6d69e896ce38 1326 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 0:6d69e896ce38 1327 if (ret == 0) {
cparata 0:6d69e896ce38 1328
cparata 0:6d69e896ce38 1329 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1330 }
cparata 0:6d69e896ce38 1331 if (ret == 0) {
cparata 0:6d69e896ce38 1332 page_rw.page_rw = 0x02; /* page_write enable*/
cparata 0:6d69e896ce38 1333 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1334 }
cparata 0:6d69e896ce38 1335 if (ret == 0) {
cparata 0:6d69e896ce38 1336 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1337 }
cparata 0:6d69e896ce38 1338 if (ret == 0) {
cparata 0:6d69e896ce38 1339 page_sel.page_sel = msb;
cparata 0:6d69e896ce38 1340 page_sel.not_used_01 = 1;
cparata 0:6d69e896ce38 1341 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1342 }
cparata 0:6d69e896ce38 1343 if (ret == 0) {
cparata 0:6d69e896ce38 1344 page_address.page_addr = lsb;
cparata 0:6d69e896ce38 1345 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
cparata 0:6d69e896ce38 1346 (uint8_t*)&page_address, 1);
cparata 0:6d69e896ce38 1347 }
cparata 0:6d69e896ce38 1348
cparata 0:6d69e896ce38 1349 if (ret == 0) {
cparata 0:6d69e896ce38 1350
cparata 0:6d69e896ce38 1351 for (i = 0; ( (i < len) && (ret == 0) ); i++)
cparata 0:6d69e896ce38 1352 {
cparata 0:6d69e896ce38 1353 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_VALUE, &buf[i], 1);
cparata 0:6d69e896ce38 1354
cparata 0:6d69e896ce38 1355 /* Check if page wrap */
cparata 0:6d69e896ce38 1356 if ( (lsb == 0x00U) && (ret == 0) ) {
cparata 0:6d69e896ce38 1357 lsb++;
cparata 0:6d69e896ce38 1358 msb++;
cparata 0:6d69e896ce38 1359 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*)&page_sel, 1);
cparata 0:6d69e896ce38 1360 if (ret == 0) {
cparata 0:6d69e896ce38 1361 page_sel.page_sel = msb;
cparata 0:6d69e896ce38 1362 page_sel.not_used_01 = 1;
cparata 0:6d69e896ce38 1363 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL,
cparata 0:6d69e896ce38 1364 (uint8_t*)&page_sel, 1);
cparata 0:6d69e896ce38 1365 }
cparata 0:6d69e896ce38 1366 }
cparata 0:6d69e896ce38 1367 }
cparata 0:6d69e896ce38 1368 page_sel.page_sel = 0;
cparata 0:6d69e896ce38 1369 page_sel.not_used_01 = 1;
cparata 0:6d69e896ce38 1370 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1371 }
cparata 0:6d69e896ce38 1372 if (ret == 0) {
cparata 0:6d69e896ce38 1373
cparata 0:6d69e896ce38 1374 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1375 }
cparata 0:6d69e896ce38 1376 if (ret == 0) {
cparata 0:6d69e896ce38 1377 page_rw.page_rw = 0x00; /* page_write disable */
cparata 0:6d69e896ce38 1378 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1379 }
cparata 0:6d69e896ce38 1380
cparata 0:6d69e896ce38 1381 if (ret == 0) {
cparata 0:6d69e896ce38 1382
cparata 0:6d69e896ce38 1383 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 0:6d69e896ce38 1384 }
cparata 0:6d69e896ce38 1385 return ret;
cparata 0:6d69e896ce38 1386 }
cparata 0:6d69e896ce38 1387
cparata 0:6d69e896ce38 1388 /**
cparata 0:6d69e896ce38 1389 * @brief Read a line(byte) in a page.[get]
cparata 0:6d69e896ce38 1390 *
cparata 0:6d69e896ce38 1391 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1392 * @param uint8_t address: page line address
cparata 0:6d69e896ce38 1393 * @param val read value
cparata 0:6d69e896ce38 1394 *
cparata 0:6d69e896ce38 1395 */
cparata 0:6d69e896ce38 1396 int32_t lsm6dso_ln_pg_read_byte(lsm6dso_ctx_t *ctx, uint16_t address,
cparata 0:6d69e896ce38 1397 uint8_t *val)
cparata 0:6d69e896ce38 1398 {
cparata 0:6d69e896ce38 1399 lsm6dso_page_rw_t page_rw;
cparata 0:6d69e896ce38 1400 lsm6dso_page_sel_t page_sel;
cparata 0:6d69e896ce38 1401 lsm6dso_page_address_t page_address;
cparata 0:6d69e896ce38 1402 int32_t ret;
cparata 0:6d69e896ce38 1403
cparata 0:6d69e896ce38 1404 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_EMBEDDED_FUNC_BANK);
cparata 0:6d69e896ce38 1405 if (ret == 0) {
cparata 0:6d69e896ce38 1406
cparata 0:6d69e896ce38 1407 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1408 }
cparata 0:6d69e896ce38 1409 if (ret == 0) {
cparata 0:6d69e896ce38 1410 page_rw.page_rw = 0x01; /* page_read enable*/
cparata 0:6d69e896ce38 1411 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1412 }
cparata 0:6d69e896ce38 1413 if (ret == 0) {
cparata 0:6d69e896ce38 1414
cparata 0:6d69e896ce38 1415 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1416 }
cparata 0:6d69e896ce38 1417 if (ret == 0) {
cparata 0:6d69e896ce38 1418 page_sel.page_sel = (((uint8_t)address >> 8) & 0x0FU);
cparata 0:6d69e896ce38 1419 page_sel.not_used_01 = 1;
cparata 0:6d69e896ce38 1420 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_SEL, (uint8_t*) &page_sel, 1);
cparata 0:6d69e896ce38 1421 }
cparata 0:6d69e896ce38 1422 if (ret == 0) {
cparata 0:6d69e896ce38 1423 page_address.page_addr = (uint8_t)address & 0x00FFU;
cparata 0:6d69e896ce38 1424 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_ADDRESS,
cparata 0:6d69e896ce38 1425 (uint8_t*)&page_address, 1);
cparata 0:6d69e896ce38 1426 }
cparata 0:6d69e896ce38 1427 if (ret == 0) {
cparata 0:6d69e896ce38 1428
cparata 0:6d69e896ce38 1429 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_VALUE, val, 2);
cparata 0:6d69e896ce38 1430 }
cparata 0:6d69e896ce38 1431 if (ret == 0) {
cparata 0:6d69e896ce38 1432 ret = lsm6dso_read_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1433 }
cparata 0:6d69e896ce38 1434 if (ret == 0) {
cparata 0:6d69e896ce38 1435 page_rw.page_rw = 0x00; /* page_read disable */
cparata 0:6d69e896ce38 1436 ret = lsm6dso_write_reg(ctx, LSM6DSO_PAGE_RW, (uint8_t*) &page_rw, 1);
cparata 0:6d69e896ce38 1437 }
cparata 0:6d69e896ce38 1438 if (ret == 0) {
cparata 0:6d69e896ce38 1439 ret = lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
cparata 0:6d69e896ce38 1440 }
cparata 0:6d69e896ce38 1441
cparata 0:6d69e896ce38 1442 return ret;
cparata 0:6d69e896ce38 1443 }
cparata 0:6d69e896ce38 1444
cparata 0:6d69e896ce38 1445 /**
cparata 0:6d69e896ce38 1446 * @brief Data-ready pulsed / letched mode.[set]
cparata 0:6d69e896ce38 1447 *
cparata 0:6d69e896ce38 1448 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1449 * @param val change the values of
cparata 0:6d69e896ce38 1450 * dataready_pulsed in
cparata 0:6d69e896ce38 1451 * reg COUNTER_BDR_REG1
cparata 0:6d69e896ce38 1452 *
cparata 0:6d69e896ce38 1453 */
cparata 0:6d69e896ce38 1454 int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1455 lsm6dso_dataready_pulsed_t val)
cparata 0:6d69e896ce38 1456 {
cparata 0:6d69e896ce38 1457 lsm6dso_counter_bdr_reg1_t reg;
cparata 0:6d69e896ce38 1458 int32_t ret;
cparata 0:6d69e896ce38 1459
cparata 0:6d69e896ce38 1460 ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1461 if (ret == 0) {
cparata 0:6d69e896ce38 1462 reg.dataready_pulsed = (uint8_t)val;
cparata 0:6d69e896ce38 1463 ret = lsm6dso_write_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1464 }
cparata 0:6d69e896ce38 1465 return ret;
cparata 0:6d69e896ce38 1466 }
cparata 0:6d69e896ce38 1467
cparata 0:6d69e896ce38 1468 /**
cparata 0:6d69e896ce38 1469 * @brief Data-ready pulsed / letched mode.[get]
cparata 0:6d69e896ce38 1470 *
cparata 0:6d69e896ce38 1471 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1472 * @param val Get the values of
cparata 0:6d69e896ce38 1473 * dataready_pulsed in
cparata 0:6d69e896ce38 1474 * reg COUNTER_BDR_REG1
cparata 0:6d69e896ce38 1475 *
cparata 0:6d69e896ce38 1476 */
cparata 0:6d69e896ce38 1477 int32_t lsm6dso_data_ready_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1478 lsm6dso_dataready_pulsed_t *val)
cparata 0:6d69e896ce38 1479 {
cparata 0:6d69e896ce38 1480 lsm6dso_counter_bdr_reg1_t reg;
cparata 0:6d69e896ce38 1481 int32_t ret;
cparata 0:6d69e896ce38 1482
cparata 0:6d69e896ce38 1483 ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1484 switch (reg.dataready_pulsed) {
cparata 0:6d69e896ce38 1485 case LSM6DSO_DRDY_LATCHED:
cparata 0:6d69e896ce38 1486 *val = LSM6DSO_DRDY_LATCHED;
cparata 0:6d69e896ce38 1487 break;
cparata 0:6d69e896ce38 1488 case LSM6DSO_DRDY_PULSED:
cparata 0:6d69e896ce38 1489 *val = LSM6DSO_DRDY_PULSED;
cparata 0:6d69e896ce38 1490 break;
cparata 0:6d69e896ce38 1491 default:
cparata 0:6d69e896ce38 1492 *val = LSM6DSO_DRDY_LATCHED;
cparata 0:6d69e896ce38 1493 break;
cparata 0:6d69e896ce38 1494 }
cparata 0:6d69e896ce38 1495 return ret;
cparata 0:6d69e896ce38 1496 }
cparata 0:6d69e896ce38 1497
cparata 0:6d69e896ce38 1498 /**
cparata 0:6d69e896ce38 1499 * @brief Device "Who am I".[get]
cparata 0:6d69e896ce38 1500 *
cparata 0:6d69e896ce38 1501 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1502 * @param buff buffer that stores data read
cparata 0:6d69e896ce38 1503 *
cparata 0:6d69e896ce38 1504 */
cparata 0:6d69e896ce38 1505 int32_t lsm6dso_device_id_get(lsm6dso_ctx_t *ctx, uint8_t *buff)
cparata 0:6d69e896ce38 1506 {
cparata 0:6d69e896ce38 1507 int32_t ret;
cparata 0:6d69e896ce38 1508 ret = lsm6dso_read_reg(ctx, LSM6DSO_WHO_AM_I, buff, 1);
cparata 0:6d69e896ce38 1509 return ret;
cparata 0:6d69e896ce38 1510 }
cparata 0:6d69e896ce38 1511
cparata 0:6d69e896ce38 1512 /**
cparata 0:6d69e896ce38 1513 * @brief Software reset. Restore the default values
cparata 0:6d69e896ce38 1514 * in user registers[set]
cparata 0:6d69e896ce38 1515 *
cparata 0:6d69e896ce38 1516 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1517 * @param val change the values of sw_reset in reg CTRL3_C
cparata 0:6d69e896ce38 1518 *
cparata 0:6d69e896ce38 1519 */
cparata 0:6d69e896ce38 1520 int32_t lsm6dso_reset_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1521 {
cparata 0:6d69e896ce38 1522 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 1523 int32_t ret;
cparata 0:6d69e896ce38 1524
cparata 0:6d69e896ce38 1525 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1526 if (ret == 0) {
cparata 0:6d69e896ce38 1527 reg.sw_reset = val;
cparata 0:6d69e896ce38 1528 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1529 }
cparata 0:6d69e896ce38 1530
cparata 0:6d69e896ce38 1531 return ret;
cparata 0:6d69e896ce38 1532 }
cparata 0:6d69e896ce38 1533
cparata 0:6d69e896ce38 1534 /**
cparata 0:6d69e896ce38 1535 * @brief Software reset. Restore the default values in user registers.[get]
cparata 0:6d69e896ce38 1536 *
cparata 0:6d69e896ce38 1537 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1538 * @param val change the values of sw_reset in reg CTRL3_C
cparata 0:6d69e896ce38 1539 *
cparata 0:6d69e896ce38 1540 */
cparata 0:6d69e896ce38 1541 int32_t lsm6dso_reset_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1542 {
cparata 0:6d69e896ce38 1543 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 1544 int32_t ret;
cparata 0:6d69e896ce38 1545
cparata 0:6d69e896ce38 1546 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1547 *val = reg.sw_reset;
cparata 0:6d69e896ce38 1548
cparata 0:6d69e896ce38 1549 return ret;
cparata 0:6d69e896ce38 1550 }
cparata 0:6d69e896ce38 1551
cparata 0:6d69e896ce38 1552 /**
cparata 0:6d69e896ce38 1553 * @brief Register address automatically incremented during a multiple byte
cparata 0:6d69e896ce38 1554 * access with a serial interface.[set]
cparata 0:6d69e896ce38 1555 *
cparata 0:6d69e896ce38 1556 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1557 * @param val change the values of if_inc in reg CTRL3_C
cparata 0:6d69e896ce38 1558 *
cparata 0:6d69e896ce38 1559 */
cparata 0:6d69e896ce38 1560 int32_t lsm6dso_auto_increment_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1561 {
cparata 0:6d69e896ce38 1562 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 1563 int32_t ret;
cparata 0:6d69e896ce38 1564
cparata 0:6d69e896ce38 1565 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1566 if (ret == 0) {
cparata 0:6d69e896ce38 1567 reg.if_inc = val;
cparata 0:6d69e896ce38 1568 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1569 }
cparata 0:6d69e896ce38 1570 return ret;
cparata 0:6d69e896ce38 1571 }
cparata 0:6d69e896ce38 1572
cparata 0:6d69e896ce38 1573 /**
cparata 0:6d69e896ce38 1574 * @brief Register address automatically incremented during a multiple byte
cparata 0:6d69e896ce38 1575 * access with a serial interface.[get]
cparata 0:6d69e896ce38 1576 *
cparata 0:6d69e896ce38 1577 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1578 * @param val change the values of if_inc in reg CTRL3_C
cparata 0:6d69e896ce38 1579 *
cparata 0:6d69e896ce38 1580 */
cparata 0:6d69e896ce38 1581 int32_t lsm6dso_auto_increment_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1582 {
cparata 0:6d69e896ce38 1583 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 1584 int32_t ret;
cparata 0:6d69e896ce38 1585
cparata 0:6d69e896ce38 1586 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1587 *val = reg.if_inc;
cparata 0:6d69e896ce38 1588
cparata 0:6d69e896ce38 1589 return ret;
cparata 0:6d69e896ce38 1590 }
cparata 0:6d69e896ce38 1591
cparata 0:6d69e896ce38 1592 /**
cparata 0:6d69e896ce38 1593 * @brief Reboot memory content. Reload the calibration parameters.[set]
cparata 0:6d69e896ce38 1594 *
cparata 0:6d69e896ce38 1595 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1596 * @param val change the values of boot in reg CTRL3_C
cparata 0:6d69e896ce38 1597 *
cparata 0:6d69e896ce38 1598 */
cparata 0:6d69e896ce38 1599 int32_t lsm6dso_boot_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1600 {
cparata 0:6d69e896ce38 1601 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 1602 int32_t ret;
cparata 0:6d69e896ce38 1603
cparata 0:6d69e896ce38 1604 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1605 if (ret == 0) {
cparata 0:6d69e896ce38 1606 reg.boot = val;
cparata 0:6d69e896ce38 1607 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1608 }
cparata 0:6d69e896ce38 1609 return ret;
cparata 0:6d69e896ce38 1610 }
cparata 0:6d69e896ce38 1611
cparata 0:6d69e896ce38 1612 /**
cparata 0:6d69e896ce38 1613 * @brief Reboot memory content. Reload the calibration parameters.[get]
cparata 0:6d69e896ce38 1614 *
cparata 0:6d69e896ce38 1615 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1616 * @param val change the values of boot in reg CTRL3_C
cparata 0:6d69e896ce38 1617 *
cparata 0:6d69e896ce38 1618 */
cparata 0:6d69e896ce38 1619 int32_t lsm6dso_boot_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1620 {
cparata 0:6d69e896ce38 1621 lsm6dso_ctrl3_c_t reg;
cparata 0:6d69e896ce38 1622 int32_t ret;
cparata 0:6d69e896ce38 1623
cparata 0:6d69e896ce38 1624 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1625 *val = reg.boot;
cparata 0:6d69e896ce38 1626
cparata 0:6d69e896ce38 1627 return ret;
cparata 0:6d69e896ce38 1628 }
cparata 0:6d69e896ce38 1629
cparata 0:6d69e896ce38 1630 /**
cparata 0:6d69e896ce38 1631 * @brief Linear acceleration sensor self-test enable.[set]
cparata 0:6d69e896ce38 1632 *
cparata 0:6d69e896ce38 1633 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1634 * @param val change the values of st_xl in reg CTRL5_C
cparata 0:6d69e896ce38 1635 *
cparata 0:6d69e896ce38 1636 */
cparata 0:6d69e896ce38 1637 int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val)
cparata 0:6d69e896ce38 1638 {
cparata 0:6d69e896ce38 1639 lsm6dso_ctrl5_c_t reg;
cparata 0:6d69e896ce38 1640 int32_t ret;
cparata 0:6d69e896ce38 1641
cparata 0:6d69e896ce38 1642 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1643 if (ret == 0) {
cparata 0:6d69e896ce38 1644 reg.st_xl = (uint8_t)val;
cparata 0:6d69e896ce38 1645 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1646 }
cparata 0:6d69e896ce38 1647 return ret;
cparata 0:6d69e896ce38 1648 }
cparata 0:6d69e896ce38 1649
cparata 0:6d69e896ce38 1650 /**
cparata 0:6d69e896ce38 1651 * @brief Linear acceleration sensor self-test enable.[get]
cparata 0:6d69e896ce38 1652 *
cparata 0:6d69e896ce38 1653 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1654 * @param val Get the values of st_xl in reg CTRL5_C
cparata 0:6d69e896ce38 1655 *
cparata 0:6d69e896ce38 1656 */
cparata 0:6d69e896ce38 1657 int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t *val)
cparata 0:6d69e896ce38 1658 {
cparata 0:6d69e896ce38 1659 lsm6dso_ctrl5_c_t reg;
cparata 0:6d69e896ce38 1660 int32_t ret;
cparata 0:6d69e896ce38 1661
cparata 0:6d69e896ce38 1662 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1663 switch (reg.st_xl) {
cparata 0:6d69e896ce38 1664 case LSM6DSO_XL_ST_DISABLE:
cparata 0:6d69e896ce38 1665 *val = LSM6DSO_XL_ST_DISABLE;
cparata 0:6d69e896ce38 1666 break;
cparata 0:6d69e896ce38 1667 case LSM6DSO_XL_ST_POSITIVE:
cparata 0:6d69e896ce38 1668 *val = LSM6DSO_XL_ST_POSITIVE;
cparata 0:6d69e896ce38 1669 break;
cparata 0:6d69e896ce38 1670 case LSM6DSO_XL_ST_NEGATIVE:
cparata 0:6d69e896ce38 1671 *val = LSM6DSO_XL_ST_NEGATIVE;
cparata 0:6d69e896ce38 1672 break;
cparata 0:6d69e896ce38 1673 default:
cparata 0:6d69e896ce38 1674 *val = LSM6DSO_XL_ST_DISABLE;
cparata 0:6d69e896ce38 1675 break;
cparata 0:6d69e896ce38 1676 }
cparata 0:6d69e896ce38 1677 return ret;
cparata 0:6d69e896ce38 1678 }
cparata 0:6d69e896ce38 1679
cparata 0:6d69e896ce38 1680 /**
cparata 0:6d69e896ce38 1681 * @brief Angular rate sensor self-test enable.[set]
cparata 0:6d69e896ce38 1682 *
cparata 0:6d69e896ce38 1683 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1684 * @param val change the values of st_g in reg CTRL5_C
cparata 0:6d69e896ce38 1685 *
cparata 0:6d69e896ce38 1686 */
cparata 0:6d69e896ce38 1687 int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val)
cparata 0:6d69e896ce38 1688 {
cparata 0:6d69e896ce38 1689 lsm6dso_ctrl5_c_t reg;
cparata 0:6d69e896ce38 1690 int32_t ret;
cparata 0:6d69e896ce38 1691
cparata 0:6d69e896ce38 1692 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1693 if (ret == 0) {
cparata 0:6d69e896ce38 1694 reg.st_g = (uint8_t)val;
cparata 0:6d69e896ce38 1695 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1696 }
cparata 0:6d69e896ce38 1697 return ret;
cparata 0:6d69e896ce38 1698 }
cparata 0:6d69e896ce38 1699
cparata 0:6d69e896ce38 1700 /**
cparata 0:6d69e896ce38 1701 * @brief Angular rate sensor self-test enable.[get]
cparata 0:6d69e896ce38 1702 *
cparata 0:6d69e896ce38 1703 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1704 * @param val Get the values of st_g in reg CTRL5_C
cparata 0:6d69e896ce38 1705 *
cparata 0:6d69e896ce38 1706 */
cparata 0:6d69e896ce38 1707 int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t *val)
cparata 0:6d69e896ce38 1708 {
cparata 0:6d69e896ce38 1709 lsm6dso_ctrl5_c_t reg;
cparata 0:6d69e896ce38 1710 int32_t ret;
cparata 0:6d69e896ce38 1711
cparata 0:6d69e896ce38 1712 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL5_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1713 switch (reg.st_g) {
cparata 0:6d69e896ce38 1714 case LSM6DSO_GY_ST_DISABLE:
cparata 0:6d69e896ce38 1715 *val = LSM6DSO_GY_ST_DISABLE;
cparata 0:6d69e896ce38 1716 break;
cparata 0:6d69e896ce38 1717 case LSM6DSO_GY_ST_POSITIVE:
cparata 0:6d69e896ce38 1718 *val = LSM6DSO_GY_ST_POSITIVE;
cparata 0:6d69e896ce38 1719 break;
cparata 0:6d69e896ce38 1720 case LSM6DSO_GY_ST_NEGATIVE:
cparata 0:6d69e896ce38 1721 *val = LSM6DSO_GY_ST_NEGATIVE;
cparata 0:6d69e896ce38 1722 break;
cparata 0:6d69e896ce38 1723 default:
cparata 0:6d69e896ce38 1724 *val = LSM6DSO_GY_ST_DISABLE;
cparata 0:6d69e896ce38 1725 break;
cparata 0:6d69e896ce38 1726 }
cparata 0:6d69e896ce38 1727 return ret;
cparata 0:6d69e896ce38 1728 }
cparata 0:6d69e896ce38 1729
cparata 0:6d69e896ce38 1730 /**
cparata 0:6d69e896ce38 1731 * @}
cparata 0:6d69e896ce38 1732 *
cparata 0:6d69e896ce38 1733 */
cparata 0:6d69e896ce38 1734
cparata 0:6d69e896ce38 1735 /**
cparata 0:6d69e896ce38 1736 * @defgroup LSM6DSO_filters
cparata 0:6d69e896ce38 1737 * @brief This section group all the functions concerning the
cparata 0:6d69e896ce38 1738 * filters configuration
cparata 0:6d69e896ce38 1739 * @{
cparata 0:6d69e896ce38 1740 *
cparata 0:6d69e896ce38 1741 */
cparata 0:6d69e896ce38 1742
cparata 0:6d69e896ce38 1743 /**
cparata 0:6d69e896ce38 1744 * @brief Accelerometer output from LPF2 filtering stage selection.[set]
cparata 0:6d69e896ce38 1745 *
cparata 0:6d69e896ce38 1746 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1747 * @param val change the values of lpf2_xl_en in reg CTRL1_XL
cparata 0:6d69e896ce38 1748 *
cparata 0:6d69e896ce38 1749 */
cparata 0:6d69e896ce38 1750 int32_t lsm6dso_xl_filter_lp2_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1751 {
cparata 0:6d69e896ce38 1752 lsm6dso_ctrl1_xl_t reg;
cparata 0:6d69e896ce38 1753 int32_t ret;
cparata 0:6d69e896ce38 1754
cparata 0:6d69e896ce38 1755 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1756 if (ret == 0) {
cparata 0:6d69e896ce38 1757 reg.lpf2_xl_en = val;
cparata 0:6d69e896ce38 1758 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1759 }
cparata 0:6d69e896ce38 1760 return ret;
cparata 0:6d69e896ce38 1761 }
cparata 0:6d69e896ce38 1762
cparata 0:6d69e896ce38 1763 /**
cparata 0:6d69e896ce38 1764 * @brief Accelerometer output from LPF2 filtering stage selection.[get]
cparata 0:6d69e896ce38 1765 *
cparata 0:6d69e896ce38 1766 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1767 * @param val change the values of lpf2_xl_en in reg CTRL1_XL
cparata 0:6d69e896ce38 1768 *
cparata 0:6d69e896ce38 1769 */
cparata 0:6d69e896ce38 1770 int32_t lsm6dso_xl_filter_lp2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1771 {
cparata 0:6d69e896ce38 1772 lsm6dso_ctrl1_xl_t reg;
cparata 0:6d69e896ce38 1773 int32_t ret;
cparata 0:6d69e896ce38 1774
cparata 0:6d69e896ce38 1775 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1776 *val = reg.lpf2_xl_en;
cparata 0:6d69e896ce38 1777
cparata 0:6d69e896ce38 1778 return ret;
cparata 0:6d69e896ce38 1779 }
cparata 0:6d69e896ce38 1780
cparata 0:6d69e896ce38 1781 /**
cparata 0:6d69e896ce38 1782 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
cparata 0:6d69e896ce38 1783 * the bandwidth can be selected through FTYPE [2:0]
cparata 0:6d69e896ce38 1784 * in CTRL6_C (15h).[set]
cparata 0:6d69e896ce38 1785 *
cparata 0:6d69e896ce38 1786 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1787 * @param val change the values of lpf1_sel_g in reg CTRL4_C
cparata 0:6d69e896ce38 1788 *
cparata 0:6d69e896ce38 1789 */
cparata 0:6d69e896ce38 1790 int32_t lsm6dso_gy_filter_lp1_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1791 {
cparata 0:6d69e896ce38 1792 lsm6dso_ctrl4_c_t reg;
cparata 0:6d69e896ce38 1793 int32_t ret;
cparata 0:6d69e896ce38 1794
cparata 0:6d69e896ce38 1795 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1796 if (ret == 0) {
cparata 0:6d69e896ce38 1797 reg.lpf1_sel_g = val;
cparata 0:6d69e896ce38 1798 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1799 }
cparata 0:6d69e896ce38 1800 return ret;
cparata 0:6d69e896ce38 1801 }
cparata 0:6d69e896ce38 1802
cparata 0:6d69e896ce38 1803 /**
cparata 0:6d69e896ce38 1804 * @brief Enables gyroscope digital LPF1 if auxiliary SPI is disabled;
cparata 0:6d69e896ce38 1805 * the bandwidth can be selected through FTYPE [2:0]
cparata 0:6d69e896ce38 1806 * in CTRL6_C (15h).[get]
cparata 0:6d69e896ce38 1807 *
cparata 0:6d69e896ce38 1808 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1809 * @param val change the values of lpf1_sel_g in reg CTRL4_C
cparata 0:6d69e896ce38 1810 *
cparata 0:6d69e896ce38 1811 */
cparata 0:6d69e896ce38 1812 int32_t lsm6dso_gy_filter_lp1_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1813 {
cparata 0:6d69e896ce38 1814 lsm6dso_ctrl4_c_t reg;
cparata 0:6d69e896ce38 1815 int32_t ret;
cparata 0:6d69e896ce38 1816
cparata 0:6d69e896ce38 1817 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1818 *val = reg.lpf1_sel_g;
cparata 0:6d69e896ce38 1819
cparata 0:6d69e896ce38 1820 return ret;
cparata 0:6d69e896ce38 1821 }
cparata 0:6d69e896ce38 1822
cparata 0:6d69e896ce38 1823 /**
cparata 0:6d69e896ce38 1824 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
cparata 0:6d69e896ce38 1825 * (XL and Gyro independently masked).[set]
cparata 0:6d69e896ce38 1826 *
cparata 0:6d69e896ce38 1827 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1828 * @param val change the values of drdy_mask in reg CTRL4_C
cparata 0:6d69e896ce38 1829 *
cparata 0:6d69e896ce38 1830 */
cparata 0:6d69e896ce38 1831 int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1832 {
cparata 0:6d69e896ce38 1833 lsm6dso_ctrl4_c_t reg;
cparata 0:6d69e896ce38 1834 int32_t ret;
cparata 0:6d69e896ce38 1835
cparata 0:6d69e896ce38 1836 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1837 if (ret == 0) {
cparata 0:6d69e896ce38 1838 reg.drdy_mask = val;
cparata 0:6d69e896ce38 1839 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1840 }
cparata 0:6d69e896ce38 1841 return ret;
cparata 0:6d69e896ce38 1842 }
cparata 0:6d69e896ce38 1843
cparata 0:6d69e896ce38 1844 /**
cparata 0:6d69e896ce38 1845 * @brief Mask DRDY on pin (both XL & Gyro) until filter settling ends
cparata 0:6d69e896ce38 1846 * (XL and Gyro independently masked).[get]
cparata 0:6d69e896ce38 1847 *
cparata 0:6d69e896ce38 1848 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1849 * @param val change the values of drdy_mask in reg CTRL4_C
cparata 0:6d69e896ce38 1850 *
cparata 0:6d69e896ce38 1851 */
cparata 0:6d69e896ce38 1852 int32_t lsm6dso_filter_settling_mask_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1853 {
cparata 0:6d69e896ce38 1854 lsm6dso_ctrl4_c_t reg;
cparata 0:6d69e896ce38 1855 int32_t ret;
cparata 0:6d69e896ce38 1856
cparata 0:6d69e896ce38 1857 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1858 *val = reg.drdy_mask;
cparata 0:6d69e896ce38 1859
cparata 0:6d69e896ce38 1860 return ret;
cparata 0:6d69e896ce38 1861 }
cparata 0:6d69e896ce38 1862
cparata 0:6d69e896ce38 1863 /**
cparata 0:6d69e896ce38 1864 * @brief Gyroscope lp1 bandwidth.[set]
cparata 0:6d69e896ce38 1865 *
cparata 0:6d69e896ce38 1866 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1867 * @param val change the values of ftype in reg CTRL6_C
cparata 0:6d69e896ce38 1868 *
cparata 0:6d69e896ce38 1869 */
cparata 0:6d69e896ce38 1870 int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx, lsm6dso_ftype_t val)
cparata 0:6d69e896ce38 1871 {
cparata 0:6d69e896ce38 1872 lsm6dso_ctrl6_c_t reg;
cparata 0:6d69e896ce38 1873 int32_t ret;
cparata 0:6d69e896ce38 1874
cparata 0:6d69e896ce38 1875 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1876 if (ret == 0) {
cparata 0:6d69e896ce38 1877 reg.ftype = (uint8_t)val;
cparata 0:6d69e896ce38 1878 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1879 }
cparata 0:6d69e896ce38 1880 return ret;
cparata 0:6d69e896ce38 1881 }
cparata 0:6d69e896ce38 1882
cparata 0:6d69e896ce38 1883 /**
cparata 0:6d69e896ce38 1884 * @brief Gyroscope lp1 bandwidth.[get]
cparata 0:6d69e896ce38 1885 *
cparata 0:6d69e896ce38 1886 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1887 * @param val Get the values of ftype in reg CTRL6_C
cparata 0:6d69e896ce38 1888 *
cparata 0:6d69e896ce38 1889 */
cparata 0:6d69e896ce38 1890 int32_t lsm6dso_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx, lsm6dso_ftype_t *val)
cparata 0:6d69e896ce38 1891 {
cparata 0:6d69e896ce38 1892 lsm6dso_ctrl6_c_t reg;
cparata 0:6d69e896ce38 1893 int32_t ret;
cparata 0:6d69e896ce38 1894
cparata 0:6d69e896ce38 1895 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL6_C, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1896 switch (reg.ftype) {
cparata 0:6d69e896ce38 1897 case LSM6DSO_ULTRA_LIGHT:
cparata 0:6d69e896ce38 1898 *val = LSM6DSO_ULTRA_LIGHT;
cparata 0:6d69e896ce38 1899 break;
cparata 0:6d69e896ce38 1900 case LSM6DSO_VERY_LIGHT:
cparata 0:6d69e896ce38 1901 *val = LSM6DSO_VERY_LIGHT;
cparata 0:6d69e896ce38 1902 break;
cparata 0:6d69e896ce38 1903 case LSM6DSO_LIGHT:
cparata 0:6d69e896ce38 1904 *val = LSM6DSO_LIGHT;
cparata 0:6d69e896ce38 1905 break;
cparata 0:6d69e896ce38 1906 case LSM6DSO_MEDIUM:
cparata 0:6d69e896ce38 1907 *val = LSM6DSO_MEDIUM;
cparata 0:6d69e896ce38 1908 break;
cparata 0:6d69e896ce38 1909 case LSM6DSO_STRONG:
cparata 0:6d69e896ce38 1910 *val = LSM6DSO_STRONG;
cparata 0:6d69e896ce38 1911 break;
cparata 0:6d69e896ce38 1912 case LSM6DSO_VERY_STRONG:
cparata 0:6d69e896ce38 1913 *val = LSM6DSO_VERY_STRONG;
cparata 0:6d69e896ce38 1914 break;
cparata 0:6d69e896ce38 1915 case LSM6DSO_AGGRESSIVE:
cparata 0:6d69e896ce38 1916 *val = LSM6DSO_AGGRESSIVE;
cparata 0:6d69e896ce38 1917 break;
cparata 0:6d69e896ce38 1918 case LSM6DSO_XTREME:
cparata 0:6d69e896ce38 1919 *val = LSM6DSO_XTREME;
cparata 0:6d69e896ce38 1920 break;
cparata 0:6d69e896ce38 1921 default:
cparata 0:6d69e896ce38 1922 *val = LSM6DSO_ULTRA_LIGHT;
cparata 0:6d69e896ce38 1923 break;
cparata 0:6d69e896ce38 1924 }
cparata 0:6d69e896ce38 1925 return ret;
cparata 0:6d69e896ce38 1926 }
cparata 0:6d69e896ce38 1927
cparata 0:6d69e896ce38 1928 /**
cparata 0:6d69e896ce38 1929 * @brief Low pass filter 2 on 6D function selection.[set]
cparata 0:6d69e896ce38 1930 *
cparata 0:6d69e896ce38 1931 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1932 * @param val change the values of low_pass_on_6d in reg CTRL8_XL
cparata 0:6d69e896ce38 1933 *
cparata 0:6d69e896ce38 1934 */
cparata 0:6d69e896ce38 1935 int32_t lsm6dso_xl_lp2_on_6d_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 1936 {
cparata 0:6d69e896ce38 1937 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 1938 int32_t ret;
cparata 0:6d69e896ce38 1939
cparata 0:6d69e896ce38 1940 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1941 if (ret == 0) {
cparata 0:6d69e896ce38 1942 reg.low_pass_on_6d = val;
cparata 0:6d69e896ce38 1943 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1944 }
cparata 0:6d69e896ce38 1945 return ret;
cparata 0:6d69e896ce38 1946 }
cparata 0:6d69e896ce38 1947
cparata 0:6d69e896ce38 1948 /**
cparata 0:6d69e896ce38 1949 * @brief Low pass filter 2 on 6D function selection.[get]
cparata 0:6d69e896ce38 1950 *
cparata 0:6d69e896ce38 1951 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1952 * @param val change the values of low_pass_on_6d in reg CTRL8_XL
cparata 0:6d69e896ce38 1953 *
cparata 0:6d69e896ce38 1954 */
cparata 0:6d69e896ce38 1955 int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 1956 {
cparata 0:6d69e896ce38 1957 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 1958 int32_t ret;
cparata 0:6d69e896ce38 1959
cparata 0:6d69e896ce38 1960 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1961 *val = reg.low_pass_on_6d;
cparata 0:6d69e896ce38 1962
cparata 0:6d69e896ce38 1963 return ret;
cparata 0:6d69e896ce38 1964 }
cparata 0:6d69e896ce38 1965
cparata 0:6d69e896ce38 1966 /**
cparata 0:6d69e896ce38 1967 * @brief Accelerometer slope filter / high-pass filter selection
cparata 0:6d69e896ce38 1968 * on output.[set]
cparata 0:6d69e896ce38 1969 *
cparata 0:6d69e896ce38 1970 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1971 * @param val change the values of hp_slope_xl_en
cparata 0:6d69e896ce38 1972 * in reg CTRL8_XL
cparata 0:6d69e896ce38 1973 *
cparata 0:6d69e896ce38 1974 */
cparata 0:6d69e896ce38 1975 int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 1976 lsm6dso_hp_slope_xl_en_t val)
cparata 0:6d69e896ce38 1977 {
cparata 0:6d69e896ce38 1978 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 1979 int32_t ret;
cparata 0:6d69e896ce38 1980
cparata 0:6d69e896ce38 1981 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1982 if (ret == 0) {
cparata 0:6d69e896ce38 1983 reg.hp_slope_xl_en = ((uint8_t)val & 0x10U) >> 4;
cparata 0:6d69e896ce38 1984 reg.hp_ref_mode_xl = ((uint8_t)val & 0x20U) >> 5;
cparata 0:6d69e896ce38 1985 reg.hpcf_xl = (uint8_t)val & 0x07U;
cparata 0:6d69e896ce38 1986 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 1987 }
cparata 0:6d69e896ce38 1988 return ret;
cparata 0:6d69e896ce38 1989 }
cparata 0:6d69e896ce38 1990
cparata 0:6d69e896ce38 1991 /**
cparata 0:6d69e896ce38 1992 * @brief Accelerometer slope filter / high-pass filter selection
cparata 0:6d69e896ce38 1993 * on output.[get]
cparata 0:6d69e896ce38 1994 *
cparata 0:6d69e896ce38 1995 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 1996 * @param val Get the values of hp_slope_xl_en
cparata 0:6d69e896ce38 1997 * in reg CTRL8_XL
cparata 0:6d69e896ce38 1998 *
cparata 0:6d69e896ce38 1999 */
cparata 0:6d69e896ce38 2000 int32_t lsm6dso_xl_hp_path_on_out_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2001 lsm6dso_hp_slope_xl_en_t *val)
cparata 0:6d69e896ce38 2002 {
cparata 0:6d69e896ce38 2003 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 2004 int32_t ret;
cparata 0:6d69e896ce38 2005
cparata 0:6d69e896ce38 2006 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2007 switch ((reg.hp_ref_mode_xl << 5) | (reg.hp_slope_xl_en << 4) |
cparata 0:6d69e896ce38 2008 reg.hpcf_xl) {
cparata 0:6d69e896ce38 2009 case LSM6DSO_HP_PATH_DISABLE_ON_OUT:
cparata 0:6d69e896ce38 2010 *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
cparata 0:6d69e896ce38 2011 break;
cparata 0:6d69e896ce38 2012 case LSM6DSO_SLOPE_ODR_DIV_4:
cparata 0:6d69e896ce38 2013 *val = LSM6DSO_SLOPE_ODR_DIV_4;
cparata 0:6d69e896ce38 2014 break;
cparata 0:6d69e896ce38 2015 case LSM6DSO_HP_ODR_DIV_10:
cparata 0:6d69e896ce38 2016 *val = LSM6DSO_HP_ODR_DIV_10;
cparata 0:6d69e896ce38 2017 break;
cparata 0:6d69e896ce38 2018 case LSM6DSO_HP_ODR_DIV_20:
cparata 0:6d69e896ce38 2019 *val = LSM6DSO_HP_ODR_DIV_20;
cparata 0:6d69e896ce38 2020 break;
cparata 0:6d69e896ce38 2021 case LSM6DSO_HP_ODR_DIV_45:
cparata 0:6d69e896ce38 2022 *val = LSM6DSO_HP_ODR_DIV_45;
cparata 0:6d69e896ce38 2023 break;
cparata 0:6d69e896ce38 2024 case LSM6DSO_HP_ODR_DIV_100:
cparata 0:6d69e896ce38 2025 *val = LSM6DSO_HP_ODR_DIV_100;
cparata 0:6d69e896ce38 2026 break;
cparata 0:6d69e896ce38 2027 case LSM6DSO_HP_ODR_DIV_200:
cparata 0:6d69e896ce38 2028 *val = LSM6DSO_HP_ODR_DIV_200;
cparata 0:6d69e896ce38 2029 break;
cparata 0:6d69e896ce38 2030 case LSM6DSO_HP_ODR_DIV_400:
cparata 0:6d69e896ce38 2031 *val = LSM6DSO_HP_ODR_DIV_400;
cparata 0:6d69e896ce38 2032 break;
cparata 0:6d69e896ce38 2033 case LSM6DSO_HP_ODR_DIV_800:
cparata 0:6d69e896ce38 2034 *val = LSM6DSO_HP_ODR_DIV_800;
cparata 0:6d69e896ce38 2035 break;
cparata 0:6d69e896ce38 2036 case LSM6DSO_HP_REF_MD_ODR_DIV_10:
cparata 0:6d69e896ce38 2037 *val = LSM6DSO_HP_REF_MD_ODR_DIV_10;
cparata 0:6d69e896ce38 2038 break;
cparata 0:6d69e896ce38 2039 case LSM6DSO_HP_REF_MD_ODR_DIV_20:
cparata 0:6d69e896ce38 2040 *val = LSM6DSO_HP_REF_MD_ODR_DIV_20;
cparata 0:6d69e896ce38 2041 break;
cparata 0:6d69e896ce38 2042 case LSM6DSO_HP_REF_MD_ODR_DIV_45:
cparata 0:6d69e896ce38 2043 *val = LSM6DSO_HP_REF_MD_ODR_DIV_45;
cparata 0:6d69e896ce38 2044 break;
cparata 0:6d69e896ce38 2045 case LSM6DSO_HP_REF_MD_ODR_DIV_100:
cparata 0:6d69e896ce38 2046 *val = LSM6DSO_HP_REF_MD_ODR_DIV_100;
cparata 0:6d69e896ce38 2047 break;
cparata 0:6d69e896ce38 2048 case LSM6DSO_HP_REF_MD_ODR_DIV_200:
cparata 0:6d69e896ce38 2049 *val = LSM6DSO_HP_REF_MD_ODR_DIV_200;
cparata 0:6d69e896ce38 2050 break;
cparata 0:6d69e896ce38 2051 case LSM6DSO_HP_REF_MD_ODR_DIV_400:
cparata 0:6d69e896ce38 2052 *val = LSM6DSO_HP_REF_MD_ODR_DIV_400;
cparata 0:6d69e896ce38 2053 break;
cparata 0:6d69e896ce38 2054 case LSM6DSO_HP_REF_MD_ODR_DIV_800:
cparata 0:6d69e896ce38 2055 *val = LSM6DSO_HP_REF_MD_ODR_DIV_800;
cparata 0:6d69e896ce38 2056 break;
cparata 0:6d69e896ce38 2057 case LSM6DSO_LP_ODR_DIV_10:
cparata 0:6d69e896ce38 2058 *val = LSM6DSO_LP_ODR_DIV_10;
cparata 0:6d69e896ce38 2059 break;
cparata 0:6d69e896ce38 2060 case LSM6DSO_LP_ODR_DIV_20:
cparata 0:6d69e896ce38 2061 *val = LSM6DSO_LP_ODR_DIV_20;
cparata 0:6d69e896ce38 2062 break;
cparata 0:6d69e896ce38 2063 case LSM6DSO_LP_ODR_DIV_45:
cparata 0:6d69e896ce38 2064 *val = LSM6DSO_LP_ODR_DIV_45;
cparata 0:6d69e896ce38 2065 break;
cparata 0:6d69e896ce38 2066 case LSM6DSO_LP_ODR_DIV_100:
cparata 0:6d69e896ce38 2067 *val = LSM6DSO_LP_ODR_DIV_100;
cparata 0:6d69e896ce38 2068 break;
cparata 0:6d69e896ce38 2069 case LSM6DSO_LP_ODR_DIV_200:
cparata 0:6d69e896ce38 2070 *val = LSM6DSO_LP_ODR_DIV_200;
cparata 0:6d69e896ce38 2071 break;
cparata 0:6d69e896ce38 2072 case LSM6DSO_LP_ODR_DIV_400:
cparata 0:6d69e896ce38 2073 *val = LSM6DSO_LP_ODR_DIV_400;
cparata 0:6d69e896ce38 2074 break;
cparata 0:6d69e896ce38 2075 case LSM6DSO_LP_ODR_DIV_800:
cparata 0:6d69e896ce38 2076 *val = LSM6DSO_LP_ODR_DIV_800;
cparata 0:6d69e896ce38 2077 break;
cparata 0:6d69e896ce38 2078 default:
cparata 0:6d69e896ce38 2079 *val = LSM6DSO_HP_PATH_DISABLE_ON_OUT;
cparata 0:6d69e896ce38 2080 break;
cparata 0:6d69e896ce38 2081 }
cparata 0:6d69e896ce38 2082
cparata 0:6d69e896ce38 2083 return ret;
cparata 0:6d69e896ce38 2084 }
cparata 0:6d69e896ce38 2085
cparata 0:6d69e896ce38 2086 /**
cparata 0:6d69e896ce38 2087 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
cparata 0:6d69e896ce38 2088 * The filter sets the second samples after writing this bit.
cparata 0:6d69e896ce38 2089 * Active only during device exit from power-down mode.[set]
cparata 0:6d69e896ce38 2090 *
cparata 0:6d69e896ce38 2091 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2092 * @param val change the values of fastsettl_mode_xl in
cparata 0:6d69e896ce38 2093 * reg CTRL8_XL
cparata 0:6d69e896ce38 2094 *
cparata 0:6d69e896ce38 2095 */
cparata 0:6d69e896ce38 2096 int32_t lsm6dso_xl_fast_settling_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 2097 {
cparata 0:6d69e896ce38 2098 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 2099 int32_t ret;
cparata 0:6d69e896ce38 2100
cparata 0:6d69e896ce38 2101 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2102 if (ret == 0) {
cparata 0:6d69e896ce38 2103 reg.fastsettl_mode_xl = val;
cparata 0:6d69e896ce38 2104 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2105 }
cparata 0:6d69e896ce38 2106 return ret;
cparata 0:6d69e896ce38 2107 }
cparata 0:6d69e896ce38 2108
cparata 0:6d69e896ce38 2109 /**
cparata 0:6d69e896ce38 2110 * @brief Enables accelerometer LPF2 and HPF fast-settling mode.
cparata 0:6d69e896ce38 2111 * The filter sets the second samples after writing this bit.
cparata 0:6d69e896ce38 2112 * Active only during device exit from power-down mode.[get]
cparata 0:6d69e896ce38 2113 *
cparata 0:6d69e896ce38 2114 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2115 * @param val change the values of fastsettl_mode_xl in reg CTRL8_XL
cparata 0:6d69e896ce38 2116 *
cparata 0:6d69e896ce38 2117 */
cparata 0:6d69e896ce38 2118 int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2119 {
cparata 0:6d69e896ce38 2120 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 2121 int32_t ret;
cparata 0:6d69e896ce38 2122
cparata 0:6d69e896ce38 2123 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2124 *val = reg.fastsettl_mode_xl;
cparata 0:6d69e896ce38 2125
cparata 0:6d69e896ce38 2126 return ret;
cparata 0:6d69e896ce38 2127 }
cparata 0:6d69e896ce38 2128
cparata 0:6d69e896ce38 2129 /**
cparata 0:6d69e896ce38 2130 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
cparata 0:6d69e896ce38 2131 * functions.[set]
cparata 0:6d69e896ce38 2132 *
cparata 0:6d69e896ce38 2133 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2134 * @param val change the values of slope_fds in reg TAP_CFG0
cparata 0:6d69e896ce38 2135 *
cparata 0:6d69e896ce38 2136 */
cparata 0:6d69e896ce38 2137 int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2138 lsm6dso_slope_fds_t val)
cparata 0:6d69e896ce38 2139 {
cparata 0:6d69e896ce38 2140 lsm6dso_tap_cfg0_t reg;
cparata 0:6d69e896ce38 2141 int32_t ret;
cparata 0:6d69e896ce38 2142
cparata 0:6d69e896ce38 2143 ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2144 if (ret == 0) {
cparata 0:6d69e896ce38 2145 reg.slope_fds = (uint8_t)val;
cparata 0:6d69e896ce38 2146 ret = lsm6dso_write_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2147 }
cparata 0:6d69e896ce38 2148 return ret;
cparata 0:6d69e896ce38 2149 }
cparata 0:6d69e896ce38 2150
cparata 0:6d69e896ce38 2151 /**
cparata 0:6d69e896ce38 2152 * @brief HPF or SLOPE filter selection on wake-up and Activity/Inactivity
cparata 0:6d69e896ce38 2153 * functions.[get]
cparata 0:6d69e896ce38 2154 *
cparata 0:6d69e896ce38 2155 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2156 * @param val Get the values of slope_fds in reg TAP_CFG0
cparata 0:6d69e896ce38 2157 *
cparata 0:6d69e896ce38 2158 */
cparata 0:6d69e896ce38 2159 int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2160 lsm6dso_slope_fds_t *val)
cparata 0:6d69e896ce38 2161 {
cparata 0:6d69e896ce38 2162 lsm6dso_tap_cfg0_t reg;
cparata 0:6d69e896ce38 2163 int32_t ret;
cparata 0:6d69e896ce38 2164
cparata 0:6d69e896ce38 2165 ret = lsm6dso_read_reg(ctx, LSM6DSO_TAP_CFG0, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2166 switch (reg.slope_fds) {
cparata 0:6d69e896ce38 2167 case LSM6DSO_USE_SLOPE:
cparata 0:6d69e896ce38 2168 *val = LSM6DSO_USE_SLOPE;
cparata 0:6d69e896ce38 2169 break;
cparata 0:6d69e896ce38 2170 case LSM6DSO_USE_HPF:
cparata 0:6d69e896ce38 2171 *val = LSM6DSO_USE_HPF;
cparata 0:6d69e896ce38 2172 break;
cparata 0:6d69e896ce38 2173 default:
cparata 0:6d69e896ce38 2174 *val = LSM6DSO_USE_SLOPE;
cparata 0:6d69e896ce38 2175 break;
cparata 0:6d69e896ce38 2176 }
cparata 0:6d69e896ce38 2177 return ret;
cparata 0:6d69e896ce38 2178 }
cparata 0:6d69e896ce38 2179
cparata 0:6d69e896ce38 2180 /**
cparata 0:6d69e896ce38 2181 * @brief Enables gyroscope digital high-pass filter. The filter is
cparata 0:6d69e896ce38 2182 * enabled only if the gyro is in HP mode.[set]
cparata 0:6d69e896ce38 2183 *
cparata 0:6d69e896ce38 2184 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2185 * @param val Get the values of hp_en_g and hp_en_g
cparata 0:6d69e896ce38 2186 * in reg CTRL7_G
cparata 0:6d69e896ce38 2187 *
cparata 0:6d69e896ce38 2188 */
cparata 0:6d69e896ce38 2189 int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2190 lsm6dso_hpm_g_t val)
cparata 0:6d69e896ce38 2191 {
cparata 0:6d69e896ce38 2192 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 2193 int32_t ret;
cparata 0:6d69e896ce38 2194
cparata 0:6d69e896ce38 2195 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2196 if (ret == 0) {
cparata 0:6d69e896ce38 2197 reg.hp_en_g = ((uint8_t)val & 0x80U) >> 7;
cparata 0:6d69e896ce38 2198 reg.hpm_g = (uint8_t)val & 0x03U;
cparata 0:6d69e896ce38 2199 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2200 }
cparata 0:6d69e896ce38 2201 return ret;
cparata 0:6d69e896ce38 2202 }
cparata 0:6d69e896ce38 2203
cparata 0:6d69e896ce38 2204 /**
cparata 0:6d69e896ce38 2205 * @brief Enables gyroscope digital high-pass filter. The filter is
cparata 0:6d69e896ce38 2206 * enabled only if the gyro is in HP mode.[get]
cparata 0:6d69e896ce38 2207 *
cparata 0:6d69e896ce38 2208 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2209 * @param val Get the values of hp_en_g and hp_en_g
cparata 0:6d69e896ce38 2210 * in reg CTRL7_G
cparata 0:6d69e896ce38 2211 *
cparata 0:6d69e896ce38 2212 */
cparata 0:6d69e896ce38 2213 int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2214 lsm6dso_hpm_g_t *val)
cparata 0:6d69e896ce38 2215 {
cparata 0:6d69e896ce38 2216 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 2217 int32_t ret;
cparata 0:6d69e896ce38 2218
cparata 0:6d69e896ce38 2219 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2220 switch ((reg.hp_en_g << 7) + reg.hpm_g) {
cparata 0:6d69e896ce38 2221 case LSM6DSO_HP_FILTER_NONE:
cparata 0:6d69e896ce38 2222 *val = LSM6DSO_HP_FILTER_NONE;
cparata 0:6d69e896ce38 2223 break;
cparata 0:6d69e896ce38 2224 case LSM6DSO_HP_FILTER_16mHz:
cparata 0:6d69e896ce38 2225 *val = LSM6DSO_HP_FILTER_16mHz;
cparata 0:6d69e896ce38 2226 break;
cparata 0:6d69e896ce38 2227 case LSM6DSO_HP_FILTER_65mHz:
cparata 0:6d69e896ce38 2228 *val = LSM6DSO_HP_FILTER_65mHz;
cparata 0:6d69e896ce38 2229 break;
cparata 0:6d69e896ce38 2230 case LSM6DSO_HP_FILTER_260mHz:
cparata 0:6d69e896ce38 2231 *val = LSM6DSO_HP_FILTER_260mHz;
cparata 0:6d69e896ce38 2232 break;
cparata 0:6d69e896ce38 2233 case LSM6DSO_HP_FILTER_1Hz04:
cparata 0:6d69e896ce38 2234 *val = LSM6DSO_HP_FILTER_1Hz04;
cparata 0:6d69e896ce38 2235 break;
cparata 0:6d69e896ce38 2236 default:
cparata 0:6d69e896ce38 2237 *val = LSM6DSO_HP_FILTER_NONE;
cparata 0:6d69e896ce38 2238 break;
cparata 0:6d69e896ce38 2239 }
cparata 0:6d69e896ce38 2240 return ret;
cparata 0:6d69e896ce38 2241 }
cparata 0:6d69e896ce38 2242
cparata 0:6d69e896ce38 2243 /**
cparata 0:6d69e896ce38 2244 * @}
cparata 0:6d69e896ce38 2245 *
cparata 0:6d69e896ce38 2246 */
cparata 0:6d69e896ce38 2247
cparata 0:6d69e896ce38 2248 /**
cparata 0:6d69e896ce38 2249 * @defgroup LSM6DSO_ Auxiliary_interface
cparata 0:6d69e896ce38 2250 * @brief This section groups all the functions concerning
cparata 0:6d69e896ce38 2251 * auxiliary interface.
cparata 0:6d69e896ce38 2252 * @{
cparata 0:6d69e896ce38 2253 *
cparata 0:6d69e896ce38 2254 */
cparata 0:6d69e896ce38 2255
cparata 0:6d69e896ce38 2256 /**
cparata 0:6d69e896ce38 2257 * @brief aOn auxiliary interface connect/disconnect SDO and OCS
cparata 0:6d69e896ce38 2258 * internal pull-up.[set]
cparata 0:6d69e896ce38 2259 *
cparata 0:6d69e896ce38 2260 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2261 * @param val change the values of ois_pu_dis in
cparata 0:6d69e896ce38 2262 * reg PIN_CTRL
cparata 0:6d69e896ce38 2263 *
cparata 0:6d69e896ce38 2264 */
cparata 0:6d69e896ce38 2265 int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2266 lsm6dso_ois_pu_dis_t val)
cparata 0:6d69e896ce38 2267 {
cparata 0:6d69e896ce38 2268 lsm6dso_pin_ctrl_t reg;
cparata 0:6d69e896ce38 2269 int32_t ret;
cparata 0:6d69e896ce38 2270
cparata 0:6d69e896ce38 2271 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2272 if (ret == 0) {
cparata 0:6d69e896ce38 2273 reg.ois_pu_dis = (uint8_t)val;
cparata 0:6d69e896ce38 2274 ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2275 }
cparata 0:6d69e896ce38 2276 return ret;
cparata 0:6d69e896ce38 2277 }
cparata 0:6d69e896ce38 2278
cparata 0:6d69e896ce38 2279 /**
cparata 0:6d69e896ce38 2280 * @brief On auxiliary interface connect/disconnect SDO and OCS
cparata 0:6d69e896ce38 2281 * internal pull-up.[get]
cparata 0:6d69e896ce38 2282 *
cparata 0:6d69e896ce38 2283 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2284 * @param val Get the values of ois_pu_dis in reg PIN_CTRL
cparata 0:6d69e896ce38 2285 *
cparata 0:6d69e896ce38 2286 */
cparata 0:6d69e896ce38 2287 int32_t lsm6dso_aux_sdo_ocs_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2288 lsm6dso_ois_pu_dis_t *val)
cparata 0:6d69e896ce38 2289 {
cparata 0:6d69e896ce38 2290 lsm6dso_pin_ctrl_t reg;
cparata 0:6d69e896ce38 2291 int32_t ret;
cparata 0:6d69e896ce38 2292
cparata 0:6d69e896ce38 2293 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2294 switch (reg.ois_pu_dis) {
cparata 0:6d69e896ce38 2295 case LSM6DSO_AUX_PULL_UP_DISC:
cparata 0:6d69e896ce38 2296 *val = LSM6DSO_AUX_PULL_UP_DISC;
cparata 0:6d69e896ce38 2297 break;
cparata 0:6d69e896ce38 2298 case LSM6DSO_AUX_PULL_UP_CONNECT:
cparata 0:6d69e896ce38 2299 *val = LSM6DSO_AUX_PULL_UP_CONNECT;
cparata 0:6d69e896ce38 2300 break;
cparata 0:6d69e896ce38 2301 default:
cparata 0:6d69e896ce38 2302 *val = LSM6DSO_AUX_PULL_UP_DISC;
cparata 0:6d69e896ce38 2303 break;
cparata 0:6d69e896ce38 2304 }
cparata 0:6d69e896ce38 2305 return ret;
cparata 0:6d69e896ce38 2306 }
cparata 0:6d69e896ce38 2307
cparata 0:6d69e896ce38 2308 /**
cparata 0:6d69e896ce38 2309 * @brief OIS chain on aux interface power on mode.[set]
cparata 0:6d69e896ce38 2310 *
cparata 0:6d69e896ce38 2311 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2312 * @param val change the values of ois_on in reg CTRL7_G
cparata 0:6d69e896ce38 2313 *
cparata 0:6d69e896ce38 2314 */
cparata 0:6d69e896ce38 2315 int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val)
cparata 0:6d69e896ce38 2316 {
cparata 0:6d69e896ce38 2317 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 2318 int32_t ret;
cparata 0:6d69e896ce38 2319
cparata 0:6d69e896ce38 2320 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2321 if (ret == 0) {
cparata 0:6d69e896ce38 2322 reg.ois_on_en = (uint8_t)val & 0x01U;
cparata 0:6d69e896ce38 2323 reg.ois_on = (uint8_t)val & 0x01U;
cparata 0:6d69e896ce38 2324 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2325 }
cparata 0:6d69e896ce38 2326 return ret;
cparata 0:6d69e896ce38 2327 }
cparata 0:6d69e896ce38 2328
cparata 0:6d69e896ce38 2329 /**
cparata 0:6d69e896ce38 2330 * @brief aux_pw_on_ctrl: [get] OIS chain on aux interface power on mode
cparata 0:6d69e896ce38 2331 *
cparata 0:6d69e896ce38 2332 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2333 * @param val Get the values of ois_on in reg CTRL7_G
cparata 0:6d69e896ce38 2334 *
cparata 0:6d69e896ce38 2335 */
cparata 0:6d69e896ce38 2336 int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t *val)
cparata 0:6d69e896ce38 2337 {
cparata 0:6d69e896ce38 2338 lsm6dso_ctrl7_g_t reg;
cparata 0:6d69e896ce38 2339 int32_t ret;
cparata 0:6d69e896ce38 2340
cparata 0:6d69e896ce38 2341 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL7_G, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2342 switch (reg.ois_on) {
cparata 0:6d69e896ce38 2343 case LSM6DSO_AUX_ON:
cparata 0:6d69e896ce38 2344 *val = LSM6DSO_AUX_ON;
cparata 0:6d69e896ce38 2345 break;
cparata 0:6d69e896ce38 2346 case LSM6DSO_AUX_ON_BY_AUX_INTERFACE:
cparata 0:6d69e896ce38 2347 *val = LSM6DSO_AUX_ON_BY_AUX_INTERFACE;
cparata 0:6d69e896ce38 2348 break;
cparata 0:6d69e896ce38 2349 default:
cparata 0:6d69e896ce38 2350 *val = LSM6DSO_AUX_ON;
cparata 0:6d69e896ce38 2351 break;
cparata 0:6d69e896ce38 2352 }
cparata 0:6d69e896ce38 2353
cparata 0:6d69e896ce38 2354 return ret;
cparata 0:6d69e896ce38 2355 }
cparata 0:6d69e896ce38 2356
cparata 0:6d69e896ce38 2357 /**
cparata 0:6d69e896ce38 2358 * @brief Accelerometer full-scale management between UI chain and
cparata 0:6d69e896ce38 2359 * OIS chain. When XL UI is on, the full scale is the same
cparata 0:6d69e896ce38 2360 * between UI/OIS and is chosen by the UI CTRL registers;
cparata 0:6d69e896ce38 2361 * when XL UI is in PD, the OIS can choose the FS.
cparata 0:6d69e896ce38 2362 * Full scales are independent between the UI/OIS chain
cparata 0:6d69e896ce38 2363 * but both bound to 8 g.[set]
cparata 0:6d69e896ce38 2364 *
cparata 0:6d69e896ce38 2365 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2366 * @param val change the values of xl_fs_mode in
cparata 0:6d69e896ce38 2367 * reg CTRL8_XL
cparata 0:6d69e896ce38 2368 *
cparata 0:6d69e896ce38 2369 */
cparata 0:6d69e896ce38 2370 int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2371 lsm6dso_xl_fs_mode_t val)
cparata 0:6d69e896ce38 2372 {
cparata 0:6d69e896ce38 2373 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 2374 int32_t ret;
cparata 0:6d69e896ce38 2375
cparata 0:6d69e896ce38 2376 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2377 if (ret == 0) {
cparata 0:6d69e896ce38 2378 reg.xl_fs_mode = (uint8_t)val;
cparata 0:6d69e896ce38 2379 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2380 }
cparata 0:6d69e896ce38 2381 return ret;
cparata 0:6d69e896ce38 2382 }
cparata 0:6d69e896ce38 2383
cparata 0:6d69e896ce38 2384 /**
cparata 0:6d69e896ce38 2385 * @brief Accelerometer full-scale management between UI chain and
cparata 0:6d69e896ce38 2386 * OIS chain. When XL UI is on, the full scale is the same
cparata 0:6d69e896ce38 2387 * between UI/OIS and is chosen by the UI CTRL registers;
cparata 0:6d69e896ce38 2388 * when XL UI is in PD, the OIS can choose the FS.
cparata 0:6d69e896ce38 2389 * Full scales are independent between the UI/OIS chain
cparata 0:6d69e896ce38 2390 * but both bound to 8 g.[get]
cparata 0:6d69e896ce38 2391 *
cparata 0:6d69e896ce38 2392 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2393 * @param val Get the values of xl_fs_mode in reg CTRL8_XL
cparata 0:6d69e896ce38 2394 *
cparata 0:6d69e896ce38 2395 */
cparata 0:6d69e896ce38 2396 int32_t lsm6dso_aux_xl_fs_mode_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2397 lsm6dso_xl_fs_mode_t *val)
cparata 0:6d69e896ce38 2398 {
cparata 0:6d69e896ce38 2399 lsm6dso_ctrl8_xl_t reg;
cparata 0:6d69e896ce38 2400 int32_t ret;
cparata 0:6d69e896ce38 2401
cparata 0:6d69e896ce38 2402 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL8_XL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2403 switch (reg.xl_fs_mode) {
cparata 0:6d69e896ce38 2404 case LSM6DSO_USE_SAME_XL_FS:
cparata 0:6d69e896ce38 2405 *val = LSM6DSO_USE_SAME_XL_FS;
cparata 0:6d69e896ce38 2406 break;
cparata 0:6d69e896ce38 2407 case LSM6DSO_USE_DIFFERENT_XL_FS:
cparata 0:6d69e896ce38 2408 *val = LSM6DSO_USE_DIFFERENT_XL_FS;
cparata 0:6d69e896ce38 2409 break;
cparata 0:6d69e896ce38 2410 default:
cparata 0:6d69e896ce38 2411 *val = LSM6DSO_USE_SAME_XL_FS;
cparata 0:6d69e896ce38 2412 break;
cparata 0:6d69e896ce38 2413 }
cparata 0:6d69e896ce38 2414
cparata 0:6d69e896ce38 2415 return ret;
cparata 0:6d69e896ce38 2416 }
cparata 0:6d69e896ce38 2417
cparata 0:6d69e896ce38 2418 /**
cparata 0:6d69e896ce38 2419 * @brief The STATUS_SPIAux register is read by the auxiliary SPI.[get]
cparata 0:6d69e896ce38 2420 *
cparata 0:6d69e896ce38 2421 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2422 * @param lsm6dso_status_spiaux_t: registers STATUS_SPIAUX
cparata 0:6d69e896ce38 2423 *
cparata 0:6d69e896ce38 2424 */
cparata 0:6d69e896ce38 2425 int32_t lsm6dso_aux_status_reg_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2426 lsm6dso_status_spiaux_t *val)
cparata 0:6d69e896ce38 2427 {
cparata 0:6d69e896ce38 2428 int32_t ret;
cparata 0:6d69e896ce38 2429 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*) val, 1);
cparata 0:6d69e896ce38 2430 return ret;
cparata 0:6d69e896ce38 2431 }
cparata 0:6d69e896ce38 2432
cparata 0:6d69e896ce38 2433 /**
cparata 0:6d69e896ce38 2434 * @brief aux_xl_flag_data_ready: [get] AUX accelerometer data available
cparata 0:6d69e896ce38 2435 *
cparata 0:6d69e896ce38 2436 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2437 * @param val change the values of xlda in reg STATUS_SPIAUX
cparata 0:6d69e896ce38 2438 *
cparata 0:6d69e896ce38 2439 */
cparata 0:6d69e896ce38 2440 int32_t lsm6dso_aux_xl_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2441 {
cparata 0:6d69e896ce38 2442 lsm6dso_status_spiaux_t reg;
cparata 0:6d69e896ce38 2443 int32_t ret;
cparata 0:6d69e896ce38 2444
cparata 0:6d69e896ce38 2445 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2446 *val = reg.xlda;
cparata 0:6d69e896ce38 2447
cparata 0:6d69e896ce38 2448 return ret;
cparata 0:6d69e896ce38 2449 }
cparata 0:6d69e896ce38 2450
cparata 0:6d69e896ce38 2451 /**
cparata 0:6d69e896ce38 2452 * @brief aux_gy_flag_data_ready: [get] AUX gyroscope data available.
cparata 0:6d69e896ce38 2453 *
cparata 0:6d69e896ce38 2454 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2455 * @param val change the values of gda in reg STATUS_SPIAUX
cparata 0:6d69e896ce38 2456 *
cparata 0:6d69e896ce38 2457 */
cparata 0:6d69e896ce38 2458 int32_t lsm6dso_aux_gy_flag_data_ready_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2459 {
cparata 0:6d69e896ce38 2460 lsm6dso_status_spiaux_t reg;
cparata 0:6d69e896ce38 2461 int32_t ret;
cparata 0:6d69e896ce38 2462
cparata 0:6d69e896ce38 2463 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2464 *val = reg.gda;
cparata 0:6d69e896ce38 2465
cparata 0:6d69e896ce38 2466 return ret;
cparata 0:6d69e896ce38 2467 }
cparata 0:6d69e896ce38 2468
cparata 0:6d69e896ce38 2469 /**
cparata 0:6d69e896ce38 2470 * @brief High when the gyroscope output is in the settling phase.[get]
cparata 0:6d69e896ce38 2471 *
cparata 0:6d69e896ce38 2472 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2473 * @param val change the values of gyro_settling in reg STATUS_SPIAUX
cparata 0:6d69e896ce38 2474 *
cparata 0:6d69e896ce38 2475 */
cparata 0:6d69e896ce38 2476 int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2477 {
cparata 0:6d69e896ce38 2478 lsm6dso_status_spiaux_t reg;
cparata 0:6d69e896ce38 2479 int32_t ret;
cparata 0:6d69e896ce38 2480
cparata 0:6d69e896ce38 2481 ret = lsm6dso_read_reg(ctx, LSM6DSO_STATUS_SPIAUX, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2482 *val = reg.gyro_settling;
cparata 0:6d69e896ce38 2483
cparata 0:6d69e896ce38 2484 return ret;
cparata 0:6d69e896ce38 2485 }
cparata 0:6d69e896ce38 2486
cparata 0:6d69e896ce38 2487 /**
cparata 0:6d69e896ce38 2488 * @brief Selects accelerometer self-test. Effective only if XL OIS
cparata 0:6d69e896ce38 2489 * chain is enabled.[set]
cparata 0:6d69e896ce38 2490 *
cparata 0:6d69e896ce38 2491 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2492 * @param val change the values of st_xl_ois in reg INT_OIS
cparata 0:6d69e896ce38 2493 *
cparata 0:6d69e896ce38 2494 */
cparata 0:6d69e896ce38 2495 int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2496 lsm6dso_st_xl_ois_t val)
cparata 0:6d69e896ce38 2497 {
cparata 0:6d69e896ce38 2498 lsm6dso_int_ois_t reg;
cparata 0:6d69e896ce38 2499 int32_t ret;
cparata 0:6d69e896ce38 2500
cparata 0:6d69e896ce38 2501 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2502 if (ret == 0) {
cparata 0:6d69e896ce38 2503 reg.st_xl_ois = (uint8_t)val;
cparata 0:6d69e896ce38 2504 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2505 }
cparata 0:6d69e896ce38 2506 return ret;
cparata 0:6d69e896ce38 2507 }
cparata 0:6d69e896ce38 2508
cparata 0:6d69e896ce38 2509 /**
cparata 0:6d69e896ce38 2510 * @brief Selects accelerometer self-test. Effective only if XL OIS
cparata 0:6d69e896ce38 2511 * chain is enabled.[get]
cparata 0:6d69e896ce38 2512 *
cparata 0:6d69e896ce38 2513 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2514 * @param val Get the values of st_xl_ois in reg INT_OIS
cparata 0:6d69e896ce38 2515 *
cparata 0:6d69e896ce38 2516 */
cparata 0:6d69e896ce38 2517 int32_t lsm6dso_aux_xl_self_test_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2518 lsm6dso_st_xl_ois_t *val)
cparata 0:6d69e896ce38 2519 {
cparata 0:6d69e896ce38 2520 lsm6dso_int_ois_t reg;
cparata 0:6d69e896ce38 2521 int32_t ret;
cparata 0:6d69e896ce38 2522
cparata 0:6d69e896ce38 2523 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2524 switch (reg.st_xl_ois) {
cparata 0:6d69e896ce38 2525 case LSM6DSO_AUX_XL_DISABLE:
cparata 0:6d69e896ce38 2526 *val = LSM6DSO_AUX_XL_DISABLE;
cparata 0:6d69e896ce38 2527 break;
cparata 0:6d69e896ce38 2528 case LSM6DSO_AUX_XL_POS:
cparata 0:6d69e896ce38 2529 *val = LSM6DSO_AUX_XL_POS;
cparata 0:6d69e896ce38 2530 break;
cparata 0:6d69e896ce38 2531 case LSM6DSO_AUX_XL_NEG:
cparata 0:6d69e896ce38 2532 *val = LSM6DSO_AUX_XL_NEG;
cparata 0:6d69e896ce38 2533 break;
cparata 0:6d69e896ce38 2534 default:
cparata 0:6d69e896ce38 2535 *val = LSM6DSO_AUX_XL_DISABLE;
cparata 0:6d69e896ce38 2536 break;
cparata 0:6d69e896ce38 2537 }
cparata 0:6d69e896ce38 2538 return ret;
cparata 0:6d69e896ce38 2539 }
cparata 0:6d69e896ce38 2540
cparata 0:6d69e896ce38 2541 /**
cparata 0:6d69e896ce38 2542 * @brief Indicates polarity of DEN signal on OIS chain.[set]
cparata 0:6d69e896ce38 2543 *
cparata 0:6d69e896ce38 2544 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2545 * @param val change the values of den_lh_ois in
cparata 0:6d69e896ce38 2546 * reg INT_OIS
cparata 0:6d69e896ce38 2547 *
cparata 0:6d69e896ce38 2548 */
cparata 0:6d69e896ce38 2549 int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2550 lsm6dso_den_lh_ois_t val)
cparata 0:6d69e896ce38 2551 {
cparata 0:6d69e896ce38 2552 lsm6dso_int_ois_t reg;
cparata 0:6d69e896ce38 2553 int32_t ret;
cparata 0:6d69e896ce38 2554
cparata 0:6d69e896ce38 2555 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2556 if (ret == 0) {
cparata 0:6d69e896ce38 2557 reg.den_lh_ois = (uint8_t)val;
cparata 0:6d69e896ce38 2558 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2559 }
cparata 0:6d69e896ce38 2560 return ret;
cparata 0:6d69e896ce38 2561 }
cparata 0:6d69e896ce38 2562
cparata 0:6d69e896ce38 2563 /**
cparata 0:6d69e896ce38 2564 * @brief Indicates polarity of DEN signal on OIS chain.[get]
cparata 0:6d69e896ce38 2565 *
cparata 0:6d69e896ce38 2566 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2567 * @param val Get the values of den_lh_ois in reg INT_OIS
cparata 0:6d69e896ce38 2568 *
cparata 0:6d69e896ce38 2569 */
cparata 0:6d69e896ce38 2570 int32_t lsm6dso_aux_den_polarity_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2571 lsm6dso_den_lh_ois_t *val)
cparata 0:6d69e896ce38 2572 {
cparata 0:6d69e896ce38 2573 lsm6dso_int_ois_t reg;
cparata 0:6d69e896ce38 2574 int32_t ret;
cparata 0:6d69e896ce38 2575
cparata 0:6d69e896ce38 2576 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2577 switch (reg.den_lh_ois) {
cparata 0:6d69e896ce38 2578 case LSM6DSO_AUX_DEN_ACTIVE_LOW:
cparata 0:6d69e896ce38 2579 *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
cparata 0:6d69e896ce38 2580 break;
cparata 0:6d69e896ce38 2581 case LSM6DSO_AUX_DEN_ACTIVE_HIGH:
cparata 0:6d69e896ce38 2582 *val = LSM6DSO_AUX_DEN_ACTIVE_HIGH;
cparata 0:6d69e896ce38 2583 break;
cparata 0:6d69e896ce38 2584 default:
cparata 0:6d69e896ce38 2585 *val = LSM6DSO_AUX_DEN_ACTIVE_LOW;
cparata 0:6d69e896ce38 2586 break;
cparata 0:6d69e896ce38 2587 }
cparata 0:6d69e896ce38 2588 return ret;
cparata 0:6d69e896ce38 2589 }
cparata 0:6d69e896ce38 2590
cparata 0:6d69e896ce38 2591 /**
cparata 0:6d69e896ce38 2592 * @brief Configure DEN mode on the OIS chain.[set]
cparata 0:6d69e896ce38 2593 *
cparata 0:6d69e896ce38 2594 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2595 * @param val change the values of lvl2_ois in reg INT_OIS
cparata 0:6d69e896ce38 2596 *
cparata 0:6d69e896ce38 2597 */
cparata 0:6d69e896ce38 2598 int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val)
cparata 0:6d69e896ce38 2599 {
cparata 0:6d69e896ce38 2600 lsm6dso_ctrl1_ois_t ctrl1_ois;
cparata 0:6d69e896ce38 2601 lsm6dso_int_ois_t int_ois;
cparata 0:6d69e896ce38 2602 int32_t ret;
cparata 0:6d69e896ce38 2603
cparata 0:6d69e896ce38 2604 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*) &int_ois, 1);
cparata 0:6d69e896ce38 2605 if (ret == 0) {
cparata 0:6d69e896ce38 2606 int_ois.lvl2_ois = (uint8_t)val & 0x01U;
cparata 0:6d69e896ce38 2607 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*) &int_ois, 1);
cparata 0:6d69e896ce38 2608 }
cparata 0:6d69e896ce38 2609 if (ret == 0) {
cparata 0:6d69e896ce38 2610 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*) &ctrl1_ois, 1);
cparata 0:6d69e896ce38 2611 }
cparata 0:6d69e896ce38 2612 if (ret == 0) {
cparata 0:6d69e896ce38 2613 ctrl1_ois.lvl1_ois = ((uint8_t)val & 0x02U) >> 1;
cparata 0:6d69e896ce38 2614 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*) &ctrl1_ois, 1);
cparata 0:6d69e896ce38 2615 }
cparata 0:6d69e896ce38 2616 return ret;
cparata 0:6d69e896ce38 2617 }
cparata 0:6d69e896ce38 2618
cparata 0:6d69e896ce38 2619 /**
cparata 0:6d69e896ce38 2620 * @brief Configure DEN mode on the OIS chain.[get]
cparata 0:6d69e896ce38 2621 *
cparata 0:6d69e896ce38 2622 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2623 * @param val Get the values of lvl2_ois in reg INT_OIS
cparata 0:6d69e896ce38 2624 *
cparata 0:6d69e896ce38 2625 */
cparata 0:6d69e896ce38 2626 int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t *val)
cparata 0:6d69e896ce38 2627 {
cparata 0:6d69e896ce38 2628 lsm6dso_ctrl1_ois_t ctrl1_ois;
cparata 0:6d69e896ce38 2629 lsm6dso_int_ois_t int_ois;
cparata 0:6d69e896ce38 2630 int32_t ret;
cparata 0:6d69e896ce38 2631
cparata 0:6d69e896ce38 2632 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*) &int_ois, 1);
cparata 0:6d69e896ce38 2633 if (ret == 0) {
cparata 0:6d69e896ce38 2634 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*) &ctrl1_ois, 1);
cparata 0:6d69e896ce38 2635 switch ((ctrl1_ois.lvl1_ois << 1) + int_ois.lvl2_ois) {
cparata 0:6d69e896ce38 2636 case LSM6DSO_AUX_DEN_DISABLE:
cparata 0:6d69e896ce38 2637 *val = LSM6DSO_AUX_DEN_DISABLE;
cparata 0:6d69e896ce38 2638 break;
cparata 0:6d69e896ce38 2639 case LSM6DSO_AUX_DEN_LEVEL_LATCH:
cparata 0:6d69e896ce38 2640 *val = LSM6DSO_AUX_DEN_LEVEL_LATCH;
cparata 0:6d69e896ce38 2641 break;
cparata 0:6d69e896ce38 2642 case LSM6DSO_AUX_DEN_LEVEL_TRIG:
cparata 0:6d69e896ce38 2643 *val = LSM6DSO_AUX_DEN_LEVEL_TRIG;
cparata 0:6d69e896ce38 2644 break;
cparata 0:6d69e896ce38 2645 default:
cparata 0:6d69e896ce38 2646 *val = LSM6DSO_AUX_DEN_DISABLE;
cparata 0:6d69e896ce38 2647 break;
cparata 0:6d69e896ce38 2648 }
cparata 0:6d69e896ce38 2649 }
cparata 0:6d69e896ce38 2650 return ret;
cparata 0:6d69e896ce38 2651 }
cparata 0:6d69e896ce38 2652
cparata 0:6d69e896ce38 2653 /**
cparata 0:6d69e896ce38 2654 * @brief Enables/Disable OIS chain DRDY on INT2 pin.
cparata 0:6d69e896ce38 2655 * This setting has priority over all other INT2 settings.[set]
cparata 0:6d69e896ce38 2656 *
cparata 0:6d69e896ce38 2657 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2658 * @param val change the values of int2_drdy_ois in reg INT_OIS
cparata 0:6d69e896ce38 2659 *
cparata 0:6d69e896ce38 2660 */
cparata 0:6d69e896ce38 2661 int32_t lsm6dso_aux_drdy_on_int2_set(lsm6dso_ctx_t *ctx, uint8_t val)
cparata 0:6d69e896ce38 2662 {
cparata 0:6d69e896ce38 2663 lsm6dso_int_ois_t reg;
cparata 0:6d69e896ce38 2664 int32_t ret;
cparata 0:6d69e896ce38 2665
cparata 0:6d69e896ce38 2666 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2667 if (ret == 0) {
cparata 0:6d69e896ce38 2668 reg.int2_drdy_ois = val;
cparata 0:6d69e896ce38 2669 ret = lsm6dso_write_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2670 }
cparata 0:6d69e896ce38 2671 return ret;
cparata 0:6d69e896ce38 2672 }
cparata 0:6d69e896ce38 2673
cparata 0:6d69e896ce38 2674 /**
cparata 0:6d69e896ce38 2675 * @brief Enables/Disable OIS chain DRDY on INT2 pin.
cparata 0:6d69e896ce38 2676 * This setting has priority over all other INT2 settings.[get]
cparata 0:6d69e896ce38 2677 *
cparata 0:6d69e896ce38 2678 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2679 * @param val change the values of int2_drdy_ois in reg INT_OIS
cparata 0:6d69e896ce38 2680 *
cparata 0:6d69e896ce38 2681 */
cparata 0:6d69e896ce38 2682 int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t *ctx, uint8_t *val)
cparata 0:6d69e896ce38 2683 {
cparata 0:6d69e896ce38 2684 lsm6dso_int_ois_t reg;
cparata 0:6d69e896ce38 2685 int32_t ret;
cparata 0:6d69e896ce38 2686
cparata 0:6d69e896ce38 2687 ret = lsm6dso_read_reg(ctx, LSM6DSO_INT_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2688 *val = reg.int2_drdy_ois;
cparata 0:6d69e896ce38 2689
cparata 0:6d69e896ce38 2690 return ret;
cparata 0:6d69e896ce38 2691 }
cparata 0:6d69e896ce38 2692
cparata 0:6d69e896ce38 2693 /**
cparata 0:6d69e896ce38 2694 * @brief Enables OIS chain data processing for gyro in Mode 3 and Mode 4
cparata 0:6d69e896ce38 2695 * (mode4_en = 1) and accelerometer data in and Mode 4 (mode4_en = 1).
cparata 0:6d69e896ce38 2696 * When the OIS chain is enabled, the OIS outputs are available
cparata 0:6d69e896ce38 2697 * through the SPI2 in registers OUTX_L_G (22h) through
cparata 0:6d69e896ce38 2698 * OUTZ_H_G (27h) and STATUS_REG (1Eh) / STATUS_SPIAux, and
cparata 0:6d69e896ce38 2699 * LPF1 is dedicated to this chain.[set]
cparata 0:6d69e896ce38 2700 *
cparata 0:6d69e896ce38 2701 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2702 * @param val change the values of ois_en_spi2 in
cparata 0:6d69e896ce38 2703 * reg CTRL1_OIS
cparata 0:6d69e896ce38 2704 *
cparata 0:6d69e896ce38 2705 */
cparata 0:6d69e896ce38 2706 int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val)
cparata 0:6d69e896ce38 2707 {
cparata 0:6d69e896ce38 2708 lsm6dso_ctrl1_ois_t reg;
cparata 0:6d69e896ce38 2709 int32_t ret;
cparata 0:6d69e896ce38 2710
cparata 0:6d69e896ce38 2711 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2712 if (ret == 0) {
cparata 0:6d69e896ce38 2713 reg.ois_en_spi2 = (uint8_t)val & 0x01U;
cparata 0:6d69e896ce38 2714 reg.mode4_en = ((uint8_t)val & 0x02U) >> 1;
cparata 0:6d69e896ce38 2715 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2716 }
cparata 0:6d69e896ce38 2717 return ret;
cparata 0:6d69e896ce38 2718 }
cparata 0:6d69e896ce38 2719
cparata 0:6d69e896ce38 2720 /**
cparata 0:6d69e896ce38 2721 * @brief Enables OIS chain data processing for gyro in Mode 3 and Mode 4
cparata 0:6d69e896ce38 2722 * (mode4_en = 1) and accelerometer data in and Mode 4 (mode4_en = 1).
cparata 0:6d69e896ce38 2723 * When the OIS chain is enabled, the OIS outputs are available
cparata 0:6d69e896ce38 2724 * through the SPI2 in registers OUTX_L_G (22h) through
cparata 0:6d69e896ce38 2725 * OUTZ_H_G (27h) and STATUS_REG (1Eh) / STATUS_SPIAux, and
cparata 0:6d69e896ce38 2726 * LPF1 is dedicated to this chain.[get]
cparata 0:6d69e896ce38 2727 *
cparata 0:6d69e896ce38 2728 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2729 * @param val Get the values of ois_en_spi2 in
cparata 0:6d69e896ce38 2730 * reg CTRL1_OIS
cparata 0:6d69e896ce38 2731 *
cparata 0:6d69e896ce38 2732 */
cparata 0:6d69e896ce38 2733 int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t *val)
cparata 0:6d69e896ce38 2734 {
cparata 0:6d69e896ce38 2735 lsm6dso_ctrl1_ois_t reg;
cparata 0:6d69e896ce38 2736 int32_t ret;
cparata 0:6d69e896ce38 2737
cparata 0:6d69e896ce38 2738 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2739 switch ((reg.mode4_en << 1) | reg.ois_en_spi2) {
cparata 0:6d69e896ce38 2740 case LSM6DSO_AUX_DISABLE:
cparata 0:6d69e896ce38 2741 *val = LSM6DSO_AUX_DISABLE;
cparata 0:6d69e896ce38 2742 break;
cparata 0:6d69e896ce38 2743 case LSM6DSO_MODE_3_GY:
cparata 0:6d69e896ce38 2744 *val = LSM6DSO_MODE_3_GY;
cparata 0:6d69e896ce38 2745 break;
cparata 0:6d69e896ce38 2746 case LSM6DSO_MODE_4_GY_XL:
cparata 0:6d69e896ce38 2747 *val = LSM6DSO_MODE_4_GY_XL;
cparata 0:6d69e896ce38 2748 break;
cparata 0:6d69e896ce38 2749 default:
cparata 0:6d69e896ce38 2750 *val = LSM6DSO_AUX_DISABLE;
cparata 0:6d69e896ce38 2751 break;
cparata 0:6d69e896ce38 2752 }
cparata 0:6d69e896ce38 2753 return ret;
cparata 0:6d69e896ce38 2754 }
cparata 0:6d69e896ce38 2755
cparata 0:6d69e896ce38 2756 /**
cparata 0:6d69e896ce38 2757 * @brief Selects gyroscope OIS chain full-scale.[set]
cparata 0:6d69e896ce38 2758 *
cparata 0:6d69e896ce38 2759 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2760 * @param val change the values of fs_g_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2761 *
cparata 0:6d69e896ce38 2762 */
cparata 0:6d69e896ce38 2763 int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2764 lsm6dso_fs_g_ois_t val)
cparata 0:6d69e896ce38 2765 {
cparata 0:6d69e896ce38 2766 lsm6dso_ctrl1_ois_t reg;
cparata 0:6d69e896ce38 2767 int32_t ret;
cparata 0:6d69e896ce38 2768
cparata 0:6d69e896ce38 2769 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2770 if (ret == 0) {
cparata 0:6d69e896ce38 2771 reg.fs_g_ois = (uint8_t)val;
cparata 0:6d69e896ce38 2772 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2773 }
cparata 0:6d69e896ce38 2774 return ret;
cparata 0:6d69e896ce38 2775 }
cparata 0:6d69e896ce38 2776
cparata 0:6d69e896ce38 2777 /**
cparata 0:6d69e896ce38 2778 * @brief Selects gyroscope OIS chain full-scale.[get]
cparata 0:6d69e896ce38 2779 *
cparata 0:6d69e896ce38 2780 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2781 * @param val Get the values of fs_g_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2782 *
cparata 0:6d69e896ce38 2783 */
cparata 0:6d69e896ce38 2784 int32_t lsm6dso_aux_gy_full_scale_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2785 lsm6dso_fs_g_ois_t *val)
cparata 0:6d69e896ce38 2786 {
cparata 0:6d69e896ce38 2787 lsm6dso_ctrl1_ois_t reg;
cparata 0:6d69e896ce38 2788 int32_t ret;
cparata 0:6d69e896ce38 2789
cparata 0:6d69e896ce38 2790 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2791 switch (reg.fs_g_ois) {
cparata 0:6d69e896ce38 2792 case LSM6DSO_250dps_AUX:
cparata 0:6d69e896ce38 2793 *val = LSM6DSO_250dps_AUX;
cparata 0:6d69e896ce38 2794 break;
cparata 0:6d69e896ce38 2795 case LSM6DSO_125dps_AUX:
cparata 0:6d69e896ce38 2796 *val = LSM6DSO_125dps_AUX;
cparata 0:6d69e896ce38 2797 break;
cparata 0:6d69e896ce38 2798 case LSM6DSO_500dps_AUX:
cparata 0:6d69e896ce38 2799 *val = LSM6DSO_500dps_AUX;
cparata 0:6d69e896ce38 2800 break;
cparata 0:6d69e896ce38 2801 case LSM6DSO_1000dps_AUX:
cparata 0:6d69e896ce38 2802 *val = LSM6DSO_1000dps_AUX;
cparata 0:6d69e896ce38 2803 break;
cparata 0:6d69e896ce38 2804 case LSM6DSO_2000dps_AUX:
cparata 0:6d69e896ce38 2805 *val = LSM6DSO_2000dps_AUX;
cparata 0:6d69e896ce38 2806 break;
cparata 0:6d69e896ce38 2807 default:
cparata 0:6d69e896ce38 2808 *val = LSM6DSO_250dps_AUX;
cparata 0:6d69e896ce38 2809 break;
cparata 0:6d69e896ce38 2810 }
cparata 0:6d69e896ce38 2811 return ret;
cparata 0:6d69e896ce38 2812 }
cparata 0:6d69e896ce38 2813
cparata 0:6d69e896ce38 2814 /**
cparata 0:6d69e896ce38 2815 * @brief SPI2 3- or 4-wire interface.[set]
cparata 0:6d69e896ce38 2816 *
cparata 0:6d69e896ce38 2817 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2818 * @param val change the values of sim_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2819 *
cparata 0:6d69e896ce38 2820 */
cparata 0:6d69e896ce38 2821 int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val)
cparata 0:6d69e896ce38 2822 {
cparata 0:6d69e896ce38 2823 lsm6dso_ctrl1_ois_t reg;
cparata 0:6d69e896ce38 2824 int32_t ret;
cparata 0:6d69e896ce38 2825
cparata 0:6d69e896ce38 2826 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2827 if (ret == 0) {
cparata 0:6d69e896ce38 2828 reg.sim_ois = (uint8_t)val;
cparata 0:6d69e896ce38 2829 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2830 }
cparata 0:6d69e896ce38 2831 return ret;
cparata 0:6d69e896ce38 2832 }
cparata 0:6d69e896ce38 2833
cparata 0:6d69e896ce38 2834 /**
cparata 0:6d69e896ce38 2835 * @brief SPI2 3- or 4-wire interface.[get]
cparata 0:6d69e896ce38 2836 *
cparata 0:6d69e896ce38 2837 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2838 * @param val Get the values of sim_ois in reg CTRL1_OIS
cparata 0:6d69e896ce38 2839 *
cparata 0:6d69e896ce38 2840 */
cparata 0:6d69e896ce38 2841 int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t *val)
cparata 0:6d69e896ce38 2842 {
cparata 0:6d69e896ce38 2843 lsm6dso_ctrl1_ois_t reg;
cparata 0:6d69e896ce38 2844 int32_t ret;
cparata 0:6d69e896ce38 2845
cparata 0:6d69e896ce38 2846 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL1_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2847 switch (reg.sim_ois) {
cparata 0:6d69e896ce38 2848 case LSM6DSO_AUX_SPI_4_WIRE:
cparata 0:6d69e896ce38 2849 *val = LSM6DSO_AUX_SPI_4_WIRE;
cparata 0:6d69e896ce38 2850 break;
cparata 0:6d69e896ce38 2851 case LSM6DSO_AUX_SPI_3_WIRE:
cparata 0:6d69e896ce38 2852 *val = LSM6DSO_AUX_SPI_3_WIRE;
cparata 0:6d69e896ce38 2853 break;
cparata 0:6d69e896ce38 2854 default:
cparata 0:6d69e896ce38 2855 *val = LSM6DSO_AUX_SPI_4_WIRE;
cparata 0:6d69e896ce38 2856 break;
cparata 0:6d69e896ce38 2857 }
cparata 0:6d69e896ce38 2858 return ret;
cparata 0:6d69e896ce38 2859 }
cparata 0:6d69e896ce38 2860
cparata 0:6d69e896ce38 2861 /**
cparata 0:6d69e896ce38 2862 * @brief Selects gyroscope digital LPF1 filter bandwidth.[set]
cparata 0:6d69e896ce38 2863 *
cparata 0:6d69e896ce38 2864 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2865 * @param val change the values of ftype_ois in
cparata 0:6d69e896ce38 2866 * reg CTRL2_OIS
cparata 0:6d69e896ce38 2867 *
cparata 0:6d69e896ce38 2868 */
cparata 0:6d69e896ce38 2869 int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2870 lsm6dso_ftype_ois_t val)
cparata 0:6d69e896ce38 2871 {
cparata 0:6d69e896ce38 2872 lsm6dso_ctrl2_ois_t reg;
cparata 0:6d69e896ce38 2873 int32_t ret;
cparata 0:6d69e896ce38 2874
cparata 0:6d69e896ce38 2875 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2876 if (ret == 0) {
cparata 0:6d69e896ce38 2877 reg.ftype_ois = (uint8_t)val;
cparata 0:6d69e896ce38 2878 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2879 }
cparata 0:6d69e896ce38 2880 return ret;
cparata 0:6d69e896ce38 2881 }
cparata 0:6d69e896ce38 2882
cparata 0:6d69e896ce38 2883 /**
cparata 0:6d69e896ce38 2884 * @brief Selects gyroscope digital LPF1 filter bandwidth.[get]
cparata 0:6d69e896ce38 2885 *
cparata 0:6d69e896ce38 2886 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2887 * @param val Get the values of ftype_ois in reg CTRL2_OIS
cparata 0:6d69e896ce38 2888 *
cparata 0:6d69e896ce38 2889 */
cparata 0:6d69e896ce38 2890 int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2891 lsm6dso_ftype_ois_t *val)
cparata 0:6d69e896ce38 2892 {
cparata 0:6d69e896ce38 2893 lsm6dso_ctrl2_ois_t reg;
cparata 0:6d69e896ce38 2894 int32_t ret;
cparata 0:6d69e896ce38 2895
cparata 0:6d69e896ce38 2896 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2897 switch (reg.ftype_ois) {
cparata 0:6d69e896ce38 2898 case LSM6DSO_351Hz39:
cparata 0:6d69e896ce38 2899 *val = LSM6DSO_351Hz39;
cparata 0:6d69e896ce38 2900 break;
cparata 0:6d69e896ce38 2901 case LSM6DSO_236Hz63:
cparata 0:6d69e896ce38 2902 *val = LSM6DSO_236Hz63;
cparata 0:6d69e896ce38 2903 break;
cparata 0:6d69e896ce38 2904 case LSM6DSO_172Hz70:
cparata 0:6d69e896ce38 2905 *val = LSM6DSO_172Hz70;
cparata 0:6d69e896ce38 2906 break;
cparata 0:6d69e896ce38 2907 case LSM6DSO_937Hz91:
cparata 0:6d69e896ce38 2908 *val = LSM6DSO_937Hz91;
cparata 0:6d69e896ce38 2909 break;
cparata 0:6d69e896ce38 2910 default:
cparata 0:6d69e896ce38 2911 *val = LSM6DSO_351Hz39;
cparata 0:6d69e896ce38 2912 break;
cparata 0:6d69e896ce38 2913 }
cparata 0:6d69e896ce38 2914 return ret;
cparata 0:6d69e896ce38 2915 }
cparata 0:6d69e896ce38 2916
cparata 0:6d69e896ce38 2917 /**
cparata 0:6d69e896ce38 2918 * @brief Selects gyroscope OIS chain digital high-pass filter cutoff.[set]
cparata 0:6d69e896ce38 2919 *
cparata 0:6d69e896ce38 2920 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2921 * @param val change the values of hpm_ois in reg CTRL2_OIS
cparata 0:6d69e896ce38 2922 *
cparata 0:6d69e896ce38 2923 */
cparata 0:6d69e896ce38 2924 int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2925 lsm6dso_hpm_ois_t val)
cparata 0:6d69e896ce38 2926 {
cparata 0:6d69e896ce38 2927 lsm6dso_ctrl2_ois_t reg;
cparata 0:6d69e896ce38 2928 int32_t ret;
cparata 0:6d69e896ce38 2929
cparata 0:6d69e896ce38 2930 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2931 if (ret == 0) {
cparata 0:6d69e896ce38 2932 reg.hpm_ois = (uint8_t)val & 0x03U;
cparata 0:6d69e896ce38 2933 reg.hp_en_ois = ((uint8_t)val & 0x10U) >> 4;
cparata 0:6d69e896ce38 2934 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2935 }
cparata 0:6d69e896ce38 2936 return ret;
cparata 0:6d69e896ce38 2937 }
cparata 0:6d69e896ce38 2938
cparata 0:6d69e896ce38 2939 /**
cparata 0:6d69e896ce38 2940 * @brief Selects gyroscope OIS chain digital high-pass filter cutoff.[get]
cparata 0:6d69e896ce38 2941 *
cparata 0:6d69e896ce38 2942 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2943 * @param val Get the values of hpm_ois in reg CTRL2_OIS
cparata 0:6d69e896ce38 2944 *
cparata 0:6d69e896ce38 2945 */
cparata 0:6d69e896ce38 2946 int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2947 lsm6dso_hpm_ois_t *val)
cparata 0:6d69e896ce38 2948 {
cparata 0:6d69e896ce38 2949 lsm6dso_ctrl2_ois_t reg;
cparata 0:6d69e896ce38 2950 int32_t ret;
cparata 0:6d69e896ce38 2951
cparata 0:6d69e896ce38 2952 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL2_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2953 switch ((reg.hp_en_ois << 4) | reg.hpm_ois) {
cparata 0:6d69e896ce38 2954 case LSM6DSO_AUX_HP_DISABLE:
cparata 0:6d69e896ce38 2955 *val = LSM6DSO_AUX_HP_DISABLE;
cparata 0:6d69e896ce38 2956 break;
cparata 0:6d69e896ce38 2957 case LSM6DSO_AUX_HP_Hz016:
cparata 0:6d69e896ce38 2958 *val = LSM6DSO_AUX_HP_Hz016;
cparata 0:6d69e896ce38 2959 break;
cparata 0:6d69e896ce38 2960 case LSM6DSO_AUX_HP_Hz065:
cparata 0:6d69e896ce38 2961 *val = LSM6DSO_AUX_HP_Hz065;
cparata 0:6d69e896ce38 2962 break;
cparata 0:6d69e896ce38 2963 case LSM6DSO_AUX_HP_Hz260:
cparata 0:6d69e896ce38 2964 *val = LSM6DSO_AUX_HP_Hz260;
cparata 0:6d69e896ce38 2965 break;
cparata 0:6d69e896ce38 2966 case LSM6DSO_AUX_HP_1Hz040:
cparata 0:6d69e896ce38 2967 *val = LSM6DSO_AUX_HP_1Hz040;
cparata 0:6d69e896ce38 2968 break;
cparata 0:6d69e896ce38 2969 default:
cparata 0:6d69e896ce38 2970 *val = LSM6DSO_AUX_HP_DISABLE;
cparata 0:6d69e896ce38 2971 break;
cparata 0:6d69e896ce38 2972 }
cparata 0:6d69e896ce38 2973 return ret;
cparata 0:6d69e896ce38 2974 }
cparata 0:6d69e896ce38 2975
cparata 0:6d69e896ce38 2976 /**
cparata 0:6d69e896ce38 2977 * @brief Enable / Disables OIS chain clamp.
cparata 0:6d69e896ce38 2978 * Enable: All OIS chain outputs = 8000h
cparata 0:6d69e896ce38 2979 * during self-test; Disable: OIS chain self-test
cparata 0:6d69e896ce38 2980 * outputs dependent from the aux gyro full
cparata 0:6d69e896ce38 2981 * scale selected.[set]
cparata 0:6d69e896ce38 2982 *
cparata 0:6d69e896ce38 2983 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 2984 * @param val change the values of st_ois_clampdis in
cparata 0:6d69e896ce38 2985 * reg CTRL3_OIS
cparata 0:6d69e896ce38 2986 *
cparata 0:6d69e896ce38 2987 */
cparata 0:6d69e896ce38 2988 int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 2989 lsm6dso_st_ois_clampdis_t val)
cparata 0:6d69e896ce38 2990 {
cparata 0:6d69e896ce38 2991 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 2992 int32_t ret;
cparata 0:6d69e896ce38 2993
cparata 0:6d69e896ce38 2994 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2995 if (ret == 0) {
cparata 0:6d69e896ce38 2996 reg.st_ois_clampdis = (uint8_t)val;
cparata 0:6d69e896ce38 2997 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 2998 }
cparata 0:6d69e896ce38 2999 return ret;
cparata 0:6d69e896ce38 3000 }
cparata 0:6d69e896ce38 3001
cparata 0:6d69e896ce38 3002 /**
cparata 0:6d69e896ce38 3003 * @brief Enable / Disables OIS chain clamp.
cparata 0:6d69e896ce38 3004 * Enable: All OIS chain outputs = 8000h
cparata 0:6d69e896ce38 3005 * during self-test; Disable: OIS chain self-test
cparata 0:6d69e896ce38 3006 * outputs dependent from the aux gyro full
cparata 0:6d69e896ce38 3007 * scale selected.[set]
cparata 0:6d69e896ce38 3008 *
cparata 0:6d69e896ce38 3009 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3010 * @param val Get the values of st_ois_clampdis in
cparata 0:6d69e896ce38 3011 * reg CTRL3_OIS
cparata 0:6d69e896ce38 3012 *
cparata 0:6d69e896ce38 3013 */
cparata 0:6d69e896ce38 3014 int32_t lsm6dso_aux_gy_clamp_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3015 lsm6dso_st_ois_clampdis_t *val)
cparata 0:6d69e896ce38 3016 {
cparata 0:6d69e896ce38 3017 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3018 int32_t ret;
cparata 0:6d69e896ce38 3019
cparata 0:6d69e896ce38 3020 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3021 switch (reg.st_ois_clampdis) {
cparata 0:6d69e896ce38 3022 case LSM6DSO_ENABLE_CLAMP:
cparata 0:6d69e896ce38 3023 *val = LSM6DSO_ENABLE_CLAMP;
cparata 0:6d69e896ce38 3024 break;
cparata 0:6d69e896ce38 3025 case LSM6DSO_DISABLE_CLAMP:
cparata 0:6d69e896ce38 3026 *val = LSM6DSO_DISABLE_CLAMP;
cparata 0:6d69e896ce38 3027 break;
cparata 0:6d69e896ce38 3028 default:
cparata 0:6d69e896ce38 3029 *val = LSM6DSO_ENABLE_CLAMP;
cparata 0:6d69e896ce38 3030 break;
cparata 0:6d69e896ce38 3031 }
cparata 0:6d69e896ce38 3032 return ret;
cparata 0:6d69e896ce38 3033 }
cparata 0:6d69e896ce38 3034
cparata 0:6d69e896ce38 3035 /**
cparata 0:6d69e896ce38 3036 * @brief Selects gyroscope OIS chain self-test.[set]
cparata 0:6d69e896ce38 3037 *
cparata 0:6d69e896ce38 3038 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3039 * @param val change the values of st_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3040 *
cparata 0:6d69e896ce38 3041 */
cparata 0:6d69e896ce38 3042 int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_ois_t val)
cparata 0:6d69e896ce38 3043 {
cparata 0:6d69e896ce38 3044 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3045 int32_t ret;
cparata 0:6d69e896ce38 3046
cparata 0:6d69e896ce38 3047 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3048 if (ret == 0) {
cparata 0:6d69e896ce38 3049 reg.st_ois = (uint8_t)val;
cparata 0:6d69e896ce38 3050 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3051 }
cparata 0:6d69e896ce38 3052 return ret;
cparata 0:6d69e896ce38 3053 }
cparata 0:6d69e896ce38 3054
cparata 0:6d69e896ce38 3055 /**
cparata 0:6d69e896ce38 3056 * @brief Selects gyroscope OIS chain self-test.[get]
cparata 0:6d69e896ce38 3057 *
cparata 0:6d69e896ce38 3058 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3059 * @param val Get the values of st_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3060 *
cparata 0:6d69e896ce38 3061 */
cparata 0:6d69e896ce38 3062 int32_t lsm6dso_aux_gy_self_test_get(lsm6dso_ctx_t *ctx, lsm6dso_st_ois_t *val)
cparata 0:6d69e896ce38 3063 {
cparata 0:6d69e896ce38 3064 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3065 int32_t ret;
cparata 0:6d69e896ce38 3066
cparata 0:6d69e896ce38 3067 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3068 switch (reg.st_ois) {
cparata 0:6d69e896ce38 3069 case LSM6DSO_AUX_GY_DISABLE:
cparata 0:6d69e896ce38 3070 *val = LSM6DSO_AUX_GY_DISABLE;
cparata 0:6d69e896ce38 3071 break;
cparata 0:6d69e896ce38 3072 case LSM6DSO_AUX_GY_POS:
cparata 0:6d69e896ce38 3073 *val = LSM6DSO_AUX_GY_POS;
cparata 0:6d69e896ce38 3074 break;
cparata 0:6d69e896ce38 3075 case LSM6DSO_AUX_GY_NEG:
cparata 0:6d69e896ce38 3076 *val = LSM6DSO_AUX_GY_NEG;
cparata 0:6d69e896ce38 3077 break;
cparata 0:6d69e896ce38 3078 default:
cparata 0:6d69e896ce38 3079 *val = LSM6DSO_AUX_GY_DISABLE;
cparata 0:6d69e896ce38 3080 break;
cparata 0:6d69e896ce38 3081 }
cparata 0:6d69e896ce38 3082 return ret;
cparata 0:6d69e896ce38 3083 }
cparata 0:6d69e896ce38 3084
cparata 0:6d69e896ce38 3085 /**
cparata 0:6d69e896ce38 3086 * @brief Selects accelerometer OIS channel bandwidth.[set]
cparata 0:6d69e896ce38 3087 *
cparata 0:6d69e896ce38 3088 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3089 * @param val change the values of
cparata 0:6d69e896ce38 3090 * filter_xl_conf_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3091 *
cparata 0:6d69e896ce38 3092 */
cparata 0:6d69e896ce38 3093 int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3094 lsm6dso_filter_xl_conf_ois_t val)
cparata 0:6d69e896ce38 3095 {
cparata 0:6d69e896ce38 3096 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3097 int32_t ret;
cparata 0:6d69e896ce38 3098
cparata 0:6d69e896ce38 3099 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3100 if (ret == 0) {
cparata 0:6d69e896ce38 3101 reg.filter_xl_conf_ois = (uint8_t)val;
cparata 0:6d69e896ce38 3102 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3103 }
cparata 0:6d69e896ce38 3104 return ret;
cparata 0:6d69e896ce38 3105 }
cparata 0:6d69e896ce38 3106
cparata 0:6d69e896ce38 3107 /**
cparata 0:6d69e896ce38 3108 * @brief Selects accelerometer OIS channel bandwidth.[get]
cparata 0:6d69e896ce38 3109 *
cparata 0:6d69e896ce38 3110 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3111 * @param val Get the values of
cparata 0:6d69e896ce38 3112 * filter_xl_conf_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3113 *
cparata 0:6d69e896ce38 3114 */
cparata 0:6d69e896ce38 3115 int32_t lsm6dso_aux_xl_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3116 lsm6dso_filter_xl_conf_ois_t *val)
cparata 0:6d69e896ce38 3117 {
cparata 0:6d69e896ce38 3118 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3119 int32_t ret;
cparata 0:6d69e896ce38 3120
cparata 0:6d69e896ce38 3121 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3122
cparata 0:6d69e896ce38 3123 switch (reg.filter_xl_conf_ois) {
cparata 0:6d69e896ce38 3124 case LSM6DSO_289Hz:
cparata 0:6d69e896ce38 3125 *val = LSM6DSO_289Hz;
cparata 0:6d69e896ce38 3126 break;
cparata 0:6d69e896ce38 3127 case LSM6DSO_258Hz:
cparata 0:6d69e896ce38 3128 *val = LSM6DSO_258Hz;
cparata 0:6d69e896ce38 3129 break;
cparata 0:6d69e896ce38 3130 case LSM6DSO_120Hz:
cparata 0:6d69e896ce38 3131 *val = LSM6DSO_120Hz;
cparata 0:6d69e896ce38 3132 break;
cparata 0:6d69e896ce38 3133 case LSM6DSO_65Hz2:
cparata 0:6d69e896ce38 3134 *val = LSM6DSO_65Hz2;
cparata 0:6d69e896ce38 3135 break;
cparata 0:6d69e896ce38 3136 case LSM6DSO_33Hz2:
cparata 0:6d69e896ce38 3137 *val = LSM6DSO_33Hz2;
cparata 0:6d69e896ce38 3138 break;
cparata 0:6d69e896ce38 3139 case LSM6DSO_16Hz6:
cparata 0:6d69e896ce38 3140 *val = LSM6DSO_16Hz6;
cparata 0:6d69e896ce38 3141 break;
cparata 0:6d69e896ce38 3142 case LSM6DSO_8Hz30:
cparata 0:6d69e896ce38 3143 *val = LSM6DSO_8Hz30;
cparata 0:6d69e896ce38 3144 break;
cparata 0:6d69e896ce38 3145 case LSM6DSO_4Hz15:
cparata 0:6d69e896ce38 3146 *val = LSM6DSO_4Hz15;
cparata 0:6d69e896ce38 3147 break;
cparata 0:6d69e896ce38 3148 default:
cparata 0:6d69e896ce38 3149 *val = LSM6DSO_289Hz;
cparata 0:6d69e896ce38 3150 break;
cparata 0:6d69e896ce38 3151 }
cparata 0:6d69e896ce38 3152 return ret;
cparata 0:6d69e896ce38 3153 }
cparata 0:6d69e896ce38 3154
cparata 0:6d69e896ce38 3155 /**
cparata 0:6d69e896ce38 3156 * @brief Selects accelerometer OIS channel full-scale.[set]
cparata 0:6d69e896ce38 3157 *
cparata 0:6d69e896ce38 3158 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3159 * @param val change the values of fs_xl_ois in
cparata 0:6d69e896ce38 3160 * reg CTRL3_OIS
cparata 0:6d69e896ce38 3161 *
cparata 0:6d69e896ce38 3162 */
cparata 0:6d69e896ce38 3163 int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3164 lsm6dso_fs_xl_ois_t val)
cparata 0:6d69e896ce38 3165 {
cparata 0:6d69e896ce38 3166 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3167 int32_t ret;
cparata 0:6d69e896ce38 3168
cparata 0:6d69e896ce38 3169 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3170 if (ret == 0) {
cparata 0:6d69e896ce38 3171 reg.fs_xl_ois = (uint8_t)val;
cparata 0:6d69e896ce38 3172 ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3173 }
cparata 0:6d69e896ce38 3174 return ret;
cparata 0:6d69e896ce38 3175 }
cparata 0:6d69e896ce38 3176
cparata 0:6d69e896ce38 3177 /**
cparata 0:6d69e896ce38 3178 * @brief Selects accelerometer OIS channel full-scale.[get]
cparata 0:6d69e896ce38 3179 *
cparata 0:6d69e896ce38 3180 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3181 * @param val Get the values of fs_xl_ois in reg CTRL3_OIS
cparata 0:6d69e896ce38 3182 *
cparata 0:6d69e896ce38 3183 */
cparata 0:6d69e896ce38 3184 int32_t lsm6dso_aux_xl_full_scale_get(lsm6dso_ctx_t *ctx,
cparata 0:6d69e896ce38 3185 lsm6dso_fs_xl_ois_t *val)
cparata 0:6d69e896ce38 3186 {
cparata 0:6d69e896ce38 3187 lsm6dso_ctrl3_ois_t reg;
cparata 0:6d69e896ce38 3188 int32_t ret;
cparata 0:6d69e896ce38 3189
cparata 0:6d69e896ce38 3190 ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL3_OIS, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3191 switch (reg.fs_xl_ois) {
cparata 0:6d69e896ce38 3192 case LSM6DSO_AUX_2g:
cparata 0:6d69e896ce38 3193 *val = LSM6DSO_AUX_2g;
cparata 0:6d69e896ce38 3194 break;
cparata 0:6d69e896ce38 3195 case LSM6DSO_AUX_16g:
cparata 0:6d69e896ce38 3196 *val = LSM6DSO_AUX_16g;
cparata 0:6d69e896ce38 3197 break;
cparata 0:6d69e896ce38 3198 case LSM6DSO_AUX_4g:
cparata 0:6d69e896ce38 3199 *val = LSM6DSO_AUX_4g;
cparata 0:6d69e896ce38 3200 break;
cparata 0:6d69e896ce38 3201 case LSM6DSO_AUX_8g:
cparata 0:6d69e896ce38 3202 *val = LSM6DSO_AUX_8g;
cparata 0:6d69e896ce38 3203 break;
cparata 0:6d69e896ce38 3204 default:
cparata 0:6d69e896ce38 3205 *val = LSM6DSO_AUX_2g;
cparata 0:6d69e896ce38 3206 break;
cparata 0:6d69e896ce38 3207 }
cparata 0:6d69e896ce38 3208 return ret;
cparata 0:6d69e896ce38 3209 }
cparata 0:6d69e896ce38 3210
cparata 0:6d69e896ce38 3211 /**
cparata 0:6d69e896ce38 3212 * @}
cparata 0:6d69e896ce38 3213 *
cparata 0:6d69e896ce38 3214 */
cparata 0:6d69e896ce38 3215
cparata 0:6d69e896ce38 3216 /**
cparata 0:6d69e896ce38 3217 * @defgroup LSM6DSO_ main_serial_interface
cparata 0:6d69e896ce38 3218 * @brief This section groups all the functions concerning main
cparata 0:6d69e896ce38 3219 * serial interface management (not auxiliary)
cparata 0:6d69e896ce38 3220 * @{
cparata 0:6d69e896ce38 3221 *
cparata 0:6d69e896ce38 3222 */
cparata 0:6d69e896ce38 3223
cparata 0:6d69e896ce38 3224 /**
cparata 0:6d69e896ce38 3225 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[set]
cparata 0:6d69e896ce38 3226 *
cparata 0:6d69e896ce38 3227 * @param ctx read / write interface definitions
cparata 0:6d69e896ce38 3228 * @param val change the values of sdo_pu_en in
cparata 0:6d69e896ce38 3229 * reg PIN_CTRL
cparata 0:6d69e896ce38 3230 *
cparata 0:6d69e896ce38 3231 */
cparata 0:6d69e896ce38 3232 int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sdo_pu_en_t val)
cparata 0:6d69e896ce38 3233 {
cparata 0:6d69e896ce38 3234 lsm6dso_pin_ctrl_t reg;
cparata 0:6d69e896ce38 3235 int32_t ret;
cparata 0:6d69e896ce38 3236
cparata 0:6d69e896ce38 3237 ret = lsm6dso_read_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3238 if (ret == 0) {
cparata 0:6d69e896ce38 3239 reg.sdo_pu_en = (uint8_t)val;
cparata 0:6d69e896ce38 3240 ret = lsm6dso_write_reg(ctx, LSM6DSO_PIN_CTRL, (uint8_t*)&reg, 1);
cparata 0:6d69e896ce38 3241 }
cparata 0:6d69e896ce38 3242 return ret;
cparata 0:6d69e896ce38 3243 }
cparata 0:6d69e896ce38 3244
cparata 0:6d69e896ce38 3245 /**
cparata 0:6d69e896ce38 3246 * @brief Connect/Disconnect SDO/SA0 internal pull-up.[get]
cparata 0:6d69e896ce38 3247 *
cparata