ST
MEMS nano pressure sensor: 260-1260 hPa absolute digital output barometer.
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3
Revision 1:978cae936ddb, committed 2019-07-24
- Comitter:
- cparata
- Date:
- Wed Jul 24 14:19:09 2019 +0000
- Parent:
- 0:c761bc6186e8
- Commit message:
- Format with Astyle
Changed in this revision
--- a/LPS22HHSensor.cpp Wed Mar 06 09:18:20 2019 +0000
+++ b/LPS22HHSensor.cpp Wed Jul 24 14:19:09 2019 +0000
@@ -4,7 +4,7 @@
* @author SRA
* @version V1.0.0
* @date February 2019
- * @brief Implementation of a LPS22HH pressure sensor.
+ * @brief Implementation of a LPS22HH pressure sensor.
******************************************************************************
* @attention
*
@@ -51,28 +51,26 @@
*/
LPS22HHSensor::LPS22HHSensor(SPI *spi, PinName cs_pin, PinName int_pin, SPI_type_t spi_type) : _dev_spi(spi), _cs_pin(cs_pin), _int_irq(int_pin), _spi_type(spi_type)
{
- assert (spi);
- if (cs_pin == NC)
- {
- printf ("ERROR LPS22HH CS MUST NOT BE NC\n\r");
- _dev_spi = NULL;
- _dev_i2c = NULL;
- return;
- }
+ assert(spi);
+ if (cs_pin == NC) {
+ printf("ERROR LPS22HH CS MUST NOT BE NC\n\r");
+ _dev_spi = NULL;
+ _dev_i2c = NULL;
+ return;
+ }
- _reg_ctx.write_reg = LPS22HH_io_write;
- _reg_ctx.read_reg = LPS22HH_io_read;
- _reg_ctx.handle = (void *)this;
- _cs_pin = 1;
- _dev_i2c = NULL;
- _address = 0;
-
- if (_spi_type == SPI3W)
- {
- /* Enable SPI 3-Wires on the component */
- uint8_t data = 0x01;
- lps22hh_write_reg(&_reg_ctx, LPS22HH_CTRL_REG1, &data, 1);
- }
+ _reg_ctx.write_reg = LPS22HH_io_write;
+ _reg_ctx.read_reg = LPS22HH_io_read;
+ _reg_ctx.handle = (void *)this;
+ _cs_pin = 1;
+ _dev_i2c = NULL;
+ _address = 0;
+
+ if (_spi_type == SPI3W) {
+ /* Enable SPI 3-Wires on the component */
+ uint8_t data = 0x01;
+ lps22hh_write_reg(&_reg_ctx, LPS22HH_CTRL_REG1, &data, 1);
+ }
}
/** Constructor
@@ -82,11 +80,11 @@
*/
LPS22HHSensor::LPS22HHSensor(DevI2C *i2c, uint8_t address, PinName int_pin) : _dev_i2c(i2c), _address(address), _cs_pin(NC), _int_irq(int_pin)
{
- assert (i2c);
- _dev_spi = NULL;
- _reg_ctx.write_reg = LPS22HH_io_write;
- _reg_ctx.read_reg = LPS22HH_io_read;
- _reg_ctx.handle = (void *)this;
+ assert(i2c);
+ _dev_spi = NULL;
+ _reg_ctx.write_reg = LPS22HH_io_write;
+ _reg_ctx.read_reg = LPS22HH_io_read;
+ _reg_ctx.handle = (void *)this;
}
@@ -98,39 +96,34 @@
int LPS22HHSensor::init(void *init)
{
/* Disable MIPI I3C(SM) interface */
- if (lps22hh_i3c_interface_set(&_reg_ctx, LPS22HH_I3C_DISABLE) != 0)
- {
- return 1;
- }
+ if (lps22hh_i3c_interface_set(&_reg_ctx, LPS22HH_I3C_DISABLE) != 0) {
+ return 1;
+ }
- /* Power down the device, set Low Noise Enable (bit 5), clear One Shot (bit 4) */
- if (lps22hh_data_rate_set(&_reg_ctx, (lps22hh_odr_t)(LPS22HH_POWER_DOWN | 0x10)) != 0)
- {
- return 1;
- }
+ /* Power down the device, set Low Noise Enable (bit 5), clear One Shot (bit 4) */
+ if (lps22hh_data_rate_set(&_reg_ctx, (lps22hh_odr_t)(LPS22HH_POWER_DOWN | 0x10)) != 0) {
+ return 1;
+ }
- /* Disable low-pass filter on LPS22HH pressure data */
- if (lps22hh_lp_bandwidth_set(&_reg_ctx, LPS22HH_LPF_ODR_DIV_2) != 0)
- {
- return 1;
- }
+ /* Disable low-pass filter on LPS22HH pressure data */
+ if (lps22hh_lp_bandwidth_set(&_reg_ctx, LPS22HH_LPF_ODR_DIV_2) != 0) {
+ return 1;
+ }
- /* Set block data update mode */
- if (lps22hh_block_data_update_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
+ /* Set block data update mode */
+ if (lps22hh_block_data_update_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
- /* Set autoincrement for multi-byte read/write */
- if (lps22hh_auto_increment_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
+ /* Set autoincrement for multi-byte read/write */
+ if (lps22hh_auto_increment_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
- _last_odr = LPS22HH_25_Hz;
- _is_enabled = 0;
+ _last_odr = LPS22HH_25_Hz;
+ _is_enabled = 0;
- return 0;
+ return 0;
}
/**
@@ -140,12 +133,11 @@
*/
int LPS22HHSensor::read_id(uint8_t *id)
{
- if (lps22hh_device_id_get(&_reg_ctx, id) != 0)
- {
- return 1;
- }
+ if (lps22hh_device_id_get(&_reg_ctx, id) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -154,21 +146,19 @@
*/
int LPS22HHSensor::enable()
{
- /* Check if the component is already _is_enabled */
- if (_is_enabled == 1U)
- {
- return 0;
- }
+ /* Check if the component is already _is_enabled */
+ if (_is_enabled == 1U) {
+ return 0;
+ }
- /* Output data rate selection. */
- if (lps22hh_data_rate_set(&_reg_ctx, _last_odr) != 0)
- {
- return 1;
- }
+ /* Output data rate selection. */
+ if (lps22hh_data_rate_set(&_reg_ctx, _last_odr) != 0) {
+ return 1;
+ }
- _is_enabled = 1;
+ _is_enabled = 1;
- return 0;
+ return 0;
}
/**
@@ -177,27 +167,24 @@
*/
int LPS22HHSensor::disable()
{
- /* Check if the component is already disabled */
- if (_is_enabled == 0U)
- {
- return 0;
- }
+ /* Check if the component is already disabled */
+ if (_is_enabled == 0U) {
+ return 0;
+ }
- /* Get current output data rate. */
- if (lps22hh_data_rate_get(&_reg_ctx, &_last_odr) != 0)
- {
- return 1;
- }
- /* Output data rate selection - power down. */
- if (lps22hh_data_rate_set(&_reg_ctx, LPS22HH_POWER_DOWN) != 0)
- {
- return 1;
- }
+ /* Get current output data rate. */
+ if (lps22hh_data_rate_get(&_reg_ctx, &_last_odr) != 0) {
+ return 1;
+ }
+ /* Output data rate selection - power down. */
+ if (lps22hh_data_rate_set(&_reg_ctx, LPS22HH_POWER_DOWN) != 0) {
+ return 1;
+ }
- _is_enabled = 0;
+ _is_enabled = 0;
- return 0;
+ return 0;
}
@@ -208,54 +195,52 @@
*/
int LPS22HHSensor::get_odr(float *odr)
{
- int ret = 0;
- lps22hh_odr_t odr_low_level;
+ int ret = 0;
+ lps22hh_odr_t odr_low_level;
- if (lps22hh_data_rate_get(&_reg_ctx, &odr_low_level) != 0)
- {
- return 1;
- }
+ if (lps22hh_data_rate_get(&_reg_ctx, &odr_low_level) != 0) {
+ return 1;
+ }
- switch (odr_low_level)
- {
- case LPS22HH_POWER_DOWN:
- *odr = 0.0f;
- break;
+ switch (odr_low_level) {
+ case LPS22HH_POWER_DOWN:
+ *odr = 0.0f;
+ break;
- case LPS22HH_1_Hz:
- *odr = 1.0f;
- break;
+ case LPS22HH_1_Hz:
+ *odr = 1.0f;
+ break;
- case LPS22HH_10_Hz:
- *odr = 10.0f;
- break;
+ case LPS22HH_10_Hz:
+ *odr = 10.0f;
+ break;
- case LPS22HH_25_Hz:
- *odr = 25.0f;
- break;
+ case LPS22HH_25_Hz:
+ *odr = 25.0f;
+ break;
- case LPS22HH_50_Hz:
- *odr = 50.0f;
- break;
+ case LPS22HH_50_Hz:
+ *odr = 50.0f;
+ break;
- case LPS22HH_75_Hz:
- *odr = 75.0f;
- break;
+ case LPS22HH_75_Hz:
+ *odr = 75.0f;
+ break;
- case LPS22HH_100_Hz:
- *odr = 100.0f;
- break;
+ case LPS22HH_100_Hz:
+ *odr = 100.0f;
+ break;
- case LPS22HH_200_Hz:
- *odr = 200.0f;
- break;
+ case LPS22HH_200_Hz:
+ *odr = 200.0f;
+ break;
- default:
- ret = 1;
- break;
- }
+ default:
+ ret = 1;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -265,15 +250,12 @@
*/
int LPS22HHSensor::set_odr(float odr)
{
- /* Check if the component is _is_enabled */
- if (_is_enabled == 1U)
- {
- return set_odr_when_enabled(odr);
- }
- else
- {
- return set_odr_when_disabled(odr);
- }
+ /* Check if the component is _is_enabled */
+ if (_is_enabled == 1U) {
+ return set_odr_when_enabled(odr);
+ } else {
+ return set_odr_when_disabled(odr);
+ }
}
@@ -284,27 +266,25 @@
*/
int LPS22HHSensor::set_odr_when_enabled(float odr)
{
- lps22hh_odr_t new_odr;
+ lps22hh_odr_t new_odr;
- new_odr = (odr <= 1.0f) ? LPS22HH_1_Hz
- : (odr <= 10.0f) ? LPS22HH_10_Hz
- : (odr <= 25.0f) ? LPS22HH_25_Hz
- : (odr <= 50.0f) ? LPS22HH_50_Hz
- : (odr <= 75.0f) ? LPS22HH_75_Hz
- : (odr <= 100.0f) ? LPS22HH_100_Hz
- : LPS22HH_200_Hz;
+ new_odr = (odr <= 1.0f) ? LPS22HH_1_Hz
+ : (odr <= 10.0f) ? LPS22HH_10_Hz
+ : (odr <= 25.0f) ? LPS22HH_25_Hz
+ : (odr <= 50.0f) ? LPS22HH_50_Hz
+ : (odr <= 75.0f) ? LPS22HH_75_Hz
+ : (odr <= 100.0f) ? LPS22HH_100_Hz
+ : LPS22HH_200_Hz;
- if (lps22hh_data_rate_set(&_reg_ctx, new_odr) != 0)
- {
- return 1;
- }
+ if (lps22hh_data_rate_set(&_reg_ctx, new_odr) != 0) {
+ return 1;
+ }
- if (lps22hh_data_rate_get(&_reg_ctx, &_last_odr) != 0)
- {
- return 1;
- }
+ if (lps22hh_data_rate_get(&_reg_ctx, &_last_odr) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -314,15 +294,15 @@
*/
int LPS22HHSensor::set_odr_when_disabled(float odr)
{
- _last_odr = (odr <= 1.0f) ? LPS22HH_1_Hz
- : (odr <= 10.0f) ? LPS22HH_10_Hz
- : (odr <= 25.0f) ? LPS22HH_25_Hz
- : (odr <= 50.0f) ? LPS22HH_50_Hz
- : (odr <= 75.0f) ? LPS22HH_75_Hz
- : (odr <= 100.0f) ? LPS22HH_100_Hz
- : LPS22HH_200_Hz;
+ _last_odr = (odr <= 1.0f) ? LPS22HH_1_Hz
+ : (odr <= 10.0f) ? LPS22HH_10_Hz
+ : (odr <= 25.0f) ? LPS22HH_25_Hz
+ : (odr <= 50.0f) ? LPS22HH_50_Hz
+ : (odr <= 75.0f) ? LPS22HH_75_Hz
+ : (odr <= 100.0f) ? LPS22HH_100_Hz
+ : LPS22HH_200_Hz;
- return 0;
+ return 0;
}
/**
@@ -332,17 +312,16 @@
*/
int LPS22HHSensor::get_pressure(float *value)
{
- axis1bit32_t data_raw_pressure;
+ axis1bit32_t data_raw_pressure;
- (void)memset(data_raw_pressure.u8bit, 0x00, sizeof(int32_t));
- if (lps22hh_pressure_raw_get(&_reg_ctx, data_raw_pressure.u8bit) != 0)
- {
- return 1;
- }
+ (void)memset(data_raw_pressure.u8bit, 0x00, sizeof(int32_t));
+ if (lps22hh_pressure_raw_get(&_reg_ctx, data_raw_pressure.u8bit) != 0) {
+ return 1;
+ }
- *value = LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit));
+ *value = LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit));
- return 0;
+ return 0;
}
/**
@@ -352,12 +331,11 @@
*/
int LPS22HHSensor::get_press_drdy_status(uint8_t *status)
{
- if (lps22hh_press_flag_data_ready_get(&_reg_ctx, status) != 0)
- {
- return 1;
- }
+ if (lps22hh_press_flag_data_ready_get(&_reg_ctx, status) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -367,17 +345,16 @@
*/
int LPS22HHSensor::get_temperature(float *value)
{
- axis1bit16_t data_raw_temperature;
+ axis1bit16_t data_raw_temperature;
- (void)memset(data_raw_temperature.u8bit, 0x00, sizeof(int16_t));
- if (lps22hh_temperature_raw_get(&_reg_ctx, data_raw_temperature.u8bit) != 0)
- {
- return 1;
- }
+ (void)memset(data_raw_temperature.u8bit, 0x00, sizeof(int16_t));
+ if (lps22hh_temperature_raw_get(&_reg_ctx, data_raw_temperature.u8bit) != 0) {
+ return 1;
+ }
- *value = LPS22HH_FROM_LSB_TO_degC((float)(data_raw_temperature.i16bit));
+ *value = LPS22HH_FROM_LSB_TO_degC((float)(data_raw_temperature.i16bit));
- return 0;
+ return 0;
}
/**
@@ -387,12 +364,11 @@
*/
int LPS22HHSensor::get_temp_drdy_status(uint8_t *status)
{
- if (lps22hh_temp_flag_data_ready_get(&_reg_ctx, status) != 0)
- {
- return 1;
- }
+ if (lps22hh_temp_flag_data_ready_get(&_reg_ctx, status) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -403,12 +379,11 @@
*/
int LPS22HHSensor::read_reg(uint8_t reg, uint8_t *data)
{
- if (lps22hh_read_reg(&_reg_ctx, reg, data, 1) != 0)
- {
- return 1;
- }
+ if (lps22hh_read_reg(&_reg_ctx, reg, data, 1) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -419,12 +394,11 @@
*/
int LPS22HHSensor::write_reg(uint8_t reg, uint8_t data)
{
- if (lps22hh_write_reg(&_reg_ctx, reg, &data, 1) != 0)
- {
- return 1;
- }
+ if (lps22hh_write_reg(&_reg_ctx, reg, &data, 1) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -435,26 +409,24 @@
*/
int LPS22HHSensor::get_fifo_data(float *press, float *temp)
{
- axis1bit32_t data_raw_pressure;
- axis1bit16_t data_raw_temperature;
+ axis1bit32_t data_raw_pressure;
+ axis1bit16_t data_raw_temperature;
- (void)memset(data_raw_pressure.u8bit, 0x00, sizeof(int32_t));
- if (lps22hh_fifo_pressure_raw_get(&_reg_ctx, data_raw_pressure.u8bit) != 0)
- {
- return 1;
- }
+ (void)memset(data_raw_pressure.u8bit, 0x00, sizeof(int32_t));
+ if (lps22hh_fifo_pressure_raw_get(&_reg_ctx, data_raw_pressure.u8bit) != 0) {
+ return 1;
+ }
- *press = LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit));
+ *press = LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit));
- (void)memset(data_raw_temperature.u8bit, 0x00, sizeof(int16_t));
- if (lps22hh_fifo_temperature_raw_get(&_reg_ctx, data_raw_temperature.u8bit) != 0)
- {
- return 1;
- }
+ (void)memset(data_raw_temperature.u8bit, 0x00, sizeof(int16_t));
+ if (lps22hh_fifo_temperature_raw_get(&_reg_ctx, data_raw_temperature.u8bit) != 0) {
+ return 1;
+ }
- *temp = LPS22HH_FROM_LSB_TO_degC((float)(data_raw_temperature.i16bit));
+ *temp = LPS22HH_FROM_LSB_TO_degC((float)(data_raw_temperature.i16bit));
- return 0;
+ return 0;
}
/**
@@ -464,12 +436,11 @@
*/
int LPS22HHSensor::get_fifo_fth_status(uint8_t *status)
{
- if (lps22hh_fifo_wtm_flag_get(&_reg_ctx, status) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_wtm_flag_get(&_reg_ctx, status) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -479,12 +450,11 @@
*/
int LPS22HHSensor::get_fifo_full_status(uint8_t *status)
{
- if (lps22hh_fifo_full_flag_get(&_reg_ctx, status) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_full_flag_get(&_reg_ctx, status) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -494,12 +464,11 @@
*/
int LPS22HHSensor::get_fifo_ovr_status(uint8_t *status)
{
- if (lps22hh_fifo_ovr_flag_get(&_reg_ctx, status) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_ovr_flag_get(&_reg_ctx, status) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -509,12 +478,11 @@
*/
int LPS22HHSensor::get_fifo_level(uint8_t *status)
{
- if (lps22hh_fifo_data_level_get(&_reg_ctx, status) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_data_level_get(&_reg_ctx, status) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -524,31 +492,27 @@
*/
int LPS22HHSensor::reset_fifo_interrupt(uint8_t interrupt)
{
- switch (interrupt)
- {
- case 0:
- if (lps22hh_fifo_threshold_on_int_set(&_reg_ctx, PROPERTY_DISABLE) != 0)
- {
- return 1;
- }
- break;
- case 1:
- if (lps22hh_fifo_full_on_int_set(&_reg_ctx, PROPERTY_DISABLE) != 0)
- {
- return 1;
- }
- break;
- case 2:
- if (lps22hh_fifo_ovr_on_int_set(&_reg_ctx, PROPERTY_DISABLE) != 0)
- {
- return 1;
- }
- break;
- default:
- return 1;
- }
+ switch (interrupt) {
+ case 0:
+ if (lps22hh_fifo_threshold_on_int_set(&_reg_ctx, PROPERTY_DISABLE) != 0) {
+ return 1;
+ }
+ break;
+ case 1:
+ if (lps22hh_fifo_full_on_int_set(&_reg_ctx, PROPERTY_DISABLE) != 0) {
+ return 1;
+ }
+ break;
+ case 2:
+ if (lps22hh_fifo_ovr_on_int_set(&_reg_ctx, PROPERTY_DISABLE) != 0) {
+ return 1;
+ }
+ break;
+ default:
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -558,31 +522,27 @@
*/
int LPS22HHSensor::set_fifo_interrupt(uint8_t interrupt)
{
- switch (interrupt)
- {
- case 0:
- if (lps22hh_fifo_threshold_on_int_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
- break;
- case 1:
- if (lps22hh_fifo_full_on_int_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
- break;
- case 2:
- if (lps22hh_fifo_ovr_on_int_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
- {
- return 1;
- }
- break;
- default:
- return 1;
- }
+ switch (interrupt) {
+ case 0:
+ if (lps22hh_fifo_threshold_on_int_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
+ break;
+ case 1:
+ if (lps22hh_fifo_full_on_int_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
+ break;
+ case 2:
+ if (lps22hh_fifo_ovr_on_int_set(&_reg_ctx, PROPERTY_ENABLE) != 0) {
+ return 1;
+ }
+ break;
+ default:
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -592,26 +552,24 @@
*/
int LPS22HHSensor::set_fifo_mode(uint8_t mode)
{
- /* Verify that the passed parameter contains one of the valid values */
- switch ((lps22hh_f_mode_t)mode)
- {
- case LPS22HH_BYPASS_MODE:
- case LPS22HH_FIFO_MODE:
- case LPS22HH_STREAM_MODE:
- case LPS22HH_STREAM_TO_FIFO_MODE:
- case LPS22HH_BYPASS_TO_STREAM_MODE:
- case LPS22HH_BYPASS_TO_FIFO_MODE:
- break;
- default:
- return 1;
- }
+ /* Verify that the passed parameter contains one of the valid values */
+ switch ((lps22hh_f_mode_t)mode) {
+ case LPS22HH_BYPASS_MODE:
+ case LPS22HH_FIFO_MODE:
+ case LPS22HH_STREAM_MODE:
+ case LPS22HH_STREAM_TO_FIFO_MODE:
+ case LPS22HH_BYPASS_TO_STREAM_MODE:
+ case LPS22HH_BYPASS_TO_FIFO_MODE:
+ break;
+ default:
+ return 1;
+ }
- if (lps22hh_fifo_mode_set(&_reg_ctx, (lps22hh_f_mode_t)mode) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_mode_set(&_reg_ctx, (lps22hh_f_mode_t)mode) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -621,12 +579,11 @@
*/
int LPS22HHSensor::set_fifo_watermark_level(uint8_t watermark)
{
- if (lps22hh_fifo_watermark_set(&_reg_ctx, watermark) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_watermark_set(&_reg_ctx, watermark) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -636,12 +593,11 @@
*/
int LPS22HHSensor::stop_fifo_on_watermark(uint8_t stop)
{
- if (lps22hh_fifo_stop_on_wtm_set(&_reg_ctx, stop) != 0)
- {
- return 1;
- }
+ if (lps22hh_fifo_stop_on_wtm_set(&_reg_ctx, stop) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -650,13 +606,12 @@
*/
int LPS22HHSensor::set_one_shot()
{
- /* Start One Shot Measurement */
- if(lps22hh_data_rate_set(&_reg_ctx, LPS22HH_ONE_SHOOT) != 0)
- {
- return 1;
- }
+ /* Start One Shot Measurement */
+ if (lps22hh_data_rate_set(&_reg_ctx, LPS22HH_ONE_SHOOT) != 0) {
+ return 1;
+ }
- return 0;
+ return 0;
}
/**
@@ -666,39 +621,34 @@
*/
int LPS22HHSensor::get_one_shot_status(uint8_t *status)
{
- uint8_t p_da;
- uint8_t t_da;
+ uint8_t p_da;
+ uint8_t t_da;
- /* Get DataReady for pressure */
- if(lps22hh_press_flag_data_ready_get(&_reg_ctx, &p_da) != 0)
- {
- return 1;
- }
+ /* Get DataReady for pressure */
+ if (lps22hh_press_flag_data_ready_get(&_reg_ctx, &p_da) != 0) {
+ return 1;
+ }
- /* Get DataReady for temperature */
- if(lps22hh_temp_flag_data_ready_get(&_reg_ctx, &t_da) != 0)
- {
- return 1;
- }
+ /* Get DataReady for temperature */
+ if (lps22hh_temp_flag_data_ready_get(&_reg_ctx, &t_da) != 0) {
+ return 1;
+ }
- if(p_da && t_da)
- {
- *status = 1;
- }
- else
- {
- *status = 0;
- }
+ if (p_da && t_da) {
+ *status = 1;
+ } else {
+ *status = 0;
+ }
- return 0;
+ return 0;
}
int32_t LPS22HH_io_write(void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite)
{
- return ((LPS22HHSensor *)handle)->io_write(pBuffer, WriteAddr, nBytesToWrite);
+ return ((LPS22HHSensor *)handle)->io_write(pBuffer, WriteAddr, nBytesToWrite);
}
int32_t LPS22HH_io_read(void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead)
{
- return ((LPS22HHSensor *)handle)->io_read(pBuffer, ReadAddr, nBytesToRead);
+ return ((LPS22HHSensor *)handle)->io_read(pBuffer, ReadAddr, nBytesToRead);
}
--- a/LPS22HHSensor.h Wed Mar 06 09:18:20 2019 +0000
+++ b/LPS22HHSensor.h Wed Jul 24 14:19:09 2019 +0000
@@ -53,16 +53,15 @@
/* Defines -------------------------------------------------------------------*/
/* Typedefs ------------------------------------------------------------------*/
/* Class Declaration ---------------------------------------------------------*/
-
+
/**
* Abstract class of a LPS22HH pressure sensor.
*/
-class LPS22HHSensor : public PressureSensor, public TempSensor
-{
- public:
- enum SPI_type_t {SPI3W, SPI4W};
- LPS22HHSensor(SPI *spi, PinName cs_pin, PinName int_pin=NC, SPI_type_t spi_type=SPI4W);
- LPS22HHSensor(DevI2C *i2c, uint8_t address=LPS22HH_I2C_ADD_H, PinName int_pin=NC);
+class LPS22HHSensor : public PressureSensor, public TempSensor {
+public:
+ enum SPI_type_t {SPI3W, SPI4W};
+ LPS22HHSensor(SPI *spi, PinName cs_pin, PinName int_pin = NC, SPI_type_t spi_type = SPI4W);
+ LPS22HHSensor(DevI2C *i2c, uint8_t address = LPS22HH_I2C_ADD_H, PinName int_pin = NC);
virtual int init(void *init);
virtual int read_id(uint8_t *id);
virtual int get_pressure(float *value);
@@ -107,7 +106,7 @@
{
_int_irq.enable_irq();
}
-
+
/**
* @brief Disabling the INT interrupt handling.
* @param None.
@@ -126,30 +125,32 @@
* @param NumByteToRead: number of bytes to be read.
* @retval 0 if ok, an error code otherwise.
*/
- uint8_t io_read(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
+ uint8_t io_read(uint8_t *pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
{
if (_dev_spi) {
/* Write Reg Address */
_dev_spi->lock();
- _cs_pin = 0;
- if (_spi_type == SPI4W) {
+ _cs_pin = 0;
+ if (_spi_type == SPI4W) {
_dev_spi->write(RegisterAddr | 0x80);
- for (int i=0; i<NumByteToRead; i++) {
- *(pBuffer+i) = _dev_spi->write(0x00);
+ for (int i = 0; i < NumByteToRead; i++) {
+ *(pBuffer + i) = _dev_spi->write(0x00);
}
- } else if (_spi_type == SPI3W){
+ } else if (_spi_type == SPI3W) {
/* Write RD Reg Address with RD bit*/
- uint8_t TxByte = RegisterAddr | 0x80;
+ uint8_t TxByte = RegisterAddr | 0x80;
_dev_spi->write((char *)&TxByte, 1, (char *)pBuffer, (int) NumByteToRead);
- }
+ }
_cs_pin = 1;
- _dev_spi->unlock();
+ _dev_spi->unlock();
return 0;
- }
- if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
+ }
+ if (_dev_i2c) {
+ return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
+ }
return 1;
}
-
+
/**
* @brief Utility function to write data.
* @param pBuffer: pointer to data to be written.
@@ -157,49 +158,51 @@
* @param NumByteToWrite: number of bytes to write.
* @retval 0 if ok, an error code otherwise.
*/
- uint8_t io_write(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
+ uint8_t io_write(uint8_t *pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
{
- if (_dev_spi) {
+ if (_dev_spi) {
_dev_spi->lock();
_cs_pin = 0;
- _dev_spi->write(RegisterAddr);
- _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
- _cs_pin = 1;
+ _dev_spi->write(RegisterAddr);
+ _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
+ _cs_pin = 1;
_dev_spi->unlock();
- return 0;
- }
- if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
+ return 0;
+ }
+ if (_dev_i2c) {
+ return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
+ }
return 1;
}
- private:
+private:
int set_odr_when_enabled(float odr);
int set_odr_when_disabled(float odr);
/* Helper classes. */
DevI2C *_dev_i2c;
- SPI *_dev_spi;
-
+ SPI *_dev_spi;
+
/* Configuration */
uint8_t _address;
- DigitalOut _cs_pin;
- InterruptIn _int_irq;
- SPI_type_t _spi_type;
-
+ DigitalOut _cs_pin;
+ InterruptIn _int_irq;
+ SPI_type_t _spi_type;
+
uint8_t _is_enabled;
lps22hh_odr_t _last_odr;
-
+
lps22hh_ctx_t _reg_ctx;
-
+
};
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
-int32_t LPS22HH_io_write( void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite );
-int32_t LPS22HH_io_read( void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead );
+int32_t LPS22HH_io_write(void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite);
+int32_t LPS22HH_io_read(void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead);
#ifdef __cplusplus
- }
+}
#endif
#endif
--- a/lps22hh_reg.c Wed Mar 06 09:18:20 2019 +0000
+++ b/lps22hh_reg.c Wed Jul 24 14:19:09 2019 +0000
@@ -63,12 +63,12 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lps22hh_read_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data,
+int32_t lps22hh_read_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len)
{
- int32_t ret;
- ret = ctx->read_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->read_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
@@ -81,12 +81,12 @@
* @retval interface status (MANDATORY: return 0 -> no Error)
*
*/
-int32_t lps22hh_write_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data,
- uint16_t len)
+int32_t lps22hh_write_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
+ uint16_t len)
{
- int32_t ret;
- ret = ctx->write_reg(ctx->handle, reg, data, len);
- return ret;
+ int32_t ret;
+ ret = ctx->write_reg(ctx->handle, reg, data, len);
+ return ret;
}
/**
@@ -102,12 +102,12 @@
*/
float lps22hh_from_lsb_to_hpa(int16_t lsb)
{
- return ( (float) lsb / 4096.0f );
+ return ((float) lsb / 4096.0f);
}
float lps22hh_from_lsb_to_celsius(int16_t lsb)
{
- return ( (float) lsb / 100.0f );
+ return ((float) lsb / 100.0f);
}
/**
@@ -133,15 +133,15 @@
*/
int32_t lps22hh_autozero_rst_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.reset_az = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.reset_az = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -154,13 +154,13 @@
*/
int32_t lps22hh_autozero_rst_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- *val = reg.reset_az;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ *val = reg.reset_az;
- return ret;
+ return ret;
}
/**
@@ -173,15 +173,15 @@
*/
int32_t lps22hh_autozero_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.autozero = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.autozero = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -194,13 +194,13 @@
*/
int32_t lps22hh_autozero_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- *val = reg.autozero;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ *val = reg.autozero;
- return ret;
+ return ret;
}
/**
@@ -213,15 +213,15 @@
*/
int32_t lps22hh_pressure_snap_rst_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.reset_arp = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.reset_arp = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -234,13 +234,13 @@
*/
int32_t lps22hh_pressure_snap_rst_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- *val = reg.reset_arp;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ *val = reg.reset_arp;
- return ret;
+ return ret;
}
/**
@@ -253,15 +253,15 @@
*/
int32_t lps22hh_pressure_snap_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.autorefp = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.autorefp = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -274,13 +274,13 @@
*/
int32_t lps22hh_pressure_snap_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- *val = reg.autorefp;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ *val = reg.autorefp;
- return ret;
+ return ret;
}
/**
@@ -293,15 +293,15 @@
*/
int32_t lps22hh_block_data_update_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_ctrl_reg1_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg1_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.bdu = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.bdu = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -314,13 +314,13 @@
*/
int32_t lps22hh_block_data_update_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_ctrl_reg1_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg1_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- *val = reg.bdu;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ *val = reg.bdu;
- return ret;
+ return ret;
}
/**
@@ -333,24 +333,24 @@
*/
int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val)
{
- lps22hh_ctrl_reg1_t ctrl_reg1;
- lps22hh_ctrl_reg2_t ctrl_reg2;
- int32_t ret;
+ lps22hh_ctrl_reg1_t ctrl_reg1;
+ lps22hh_ctrl_reg2_t ctrl_reg2;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1);
- if (ret == 0) {
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1);
- }
- if (ret == 0) {
- ctrl_reg1.odr = (uint8_t)val & 0x07U;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1);
- }
- if (ret == 0) {
- ctrl_reg2.low_noise_en = ((uint8_t)val & 0x10U) >> 4;
- ctrl_reg2.one_shot = ((uint8_t)val & 0x08U) >> 3;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
+ if (ret == 0) {
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
+ }
+ if (ret == 0) {
+ ctrl_reg1.odr = (uint8_t)val & 0x07U;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
+ }
+ if (ret == 0) {
+ ctrl_reg2.low_noise_en = ((uint8_t)val & 0x10U) >> 4;
+ ctrl_reg2.one_shot = ((uint8_t)val & 0x08U) >> 3;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
+ }
+ return ret;
}
/**
@@ -363,66 +363,66 @@
*/
int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val)
{
- lps22hh_ctrl_reg1_t ctrl_reg1;
- lps22hh_ctrl_reg2_t ctrl_reg2;
- int32_t ret;
+ lps22hh_ctrl_reg1_t ctrl_reg1;
+ lps22hh_ctrl_reg2_t ctrl_reg2;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1);
- if (ret == 0) {
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1);
- }
- if (ret == 0) {
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1);
- switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) +
- ctrl_reg1.odr )) {
- case LPS22HH_POWER_DOWN:
- *val = LPS22HH_POWER_DOWN;
- break;
- case LPS22HH_ONE_SHOOT:
- *val = LPS22HH_ONE_SHOOT;
- break;
- case LPS22HH_1_Hz:
- *val = LPS22HH_1_Hz;
- break;
- case LPS22HH_10_Hz:
- *val = LPS22HH_10_Hz;
- break;
- case LPS22HH_25_Hz:
- *val = LPS22HH_25_Hz;
- break;
- case LPS22HH_50_Hz:
- *val = LPS22HH_50_Hz;
- break;
- case LPS22HH_75_Hz:
- *val = LPS22HH_75_Hz;
- break;
- case LPS22HH_1_Hz_LOW_NOISE:
- *val = LPS22HH_1_Hz_LOW_NOISE;
- break;
- case LPS22HH_10_Hz_LOW_NOISE:
- *val = LPS22HH_10_Hz_LOW_NOISE;
- break;
- case LPS22HH_25_Hz_LOW_NOISE:
- *val = LPS22HH_25_Hz_LOW_NOISE;
- break;
- case LPS22HH_50_Hz_LOW_NOISE:
- *val = LPS22HH_50_Hz_LOW_NOISE;
- break;
- case LPS22HH_75_Hz_LOW_NOISE:
- *val = LPS22HH_75_Hz_LOW_NOISE;
- break;
- case LPS22HH_100_Hz:
- *val = LPS22HH_100_Hz;
- break;
- case LPS22HH_200_Hz:
- *val = LPS22HH_200_Hz;
- break;
- default:
- *val = LPS22HH_POWER_DOWN;
- break;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *)&ctrl_reg1, 1);
+ if (ret == 0) {
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
}
- }
- return ret;
+ if (ret == 0) {
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *)&ctrl_reg2, 1);
+ switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) +
+ ctrl_reg1.odr)) {
+ case LPS22HH_POWER_DOWN:
+ *val = LPS22HH_POWER_DOWN;
+ break;
+ case LPS22HH_ONE_SHOOT:
+ *val = LPS22HH_ONE_SHOOT;
+ break;
+ case LPS22HH_1_Hz:
+ *val = LPS22HH_1_Hz;
+ break;
+ case LPS22HH_10_Hz:
+ *val = LPS22HH_10_Hz;
+ break;
+ case LPS22HH_25_Hz:
+ *val = LPS22HH_25_Hz;
+ break;
+ case LPS22HH_50_Hz:
+ *val = LPS22HH_50_Hz;
+ break;
+ case LPS22HH_75_Hz:
+ *val = LPS22HH_75_Hz;
+ break;
+ case LPS22HH_1_Hz_LOW_NOISE:
+ *val = LPS22HH_1_Hz_LOW_NOISE;
+ break;
+ case LPS22HH_10_Hz_LOW_NOISE:
+ *val = LPS22HH_10_Hz_LOW_NOISE;
+ break;
+ case LPS22HH_25_Hz_LOW_NOISE:
+ *val = LPS22HH_25_Hz_LOW_NOISE;
+ break;
+ case LPS22HH_50_Hz_LOW_NOISE:
+ *val = LPS22HH_50_Hz_LOW_NOISE;
+ break;
+ case LPS22HH_75_Hz_LOW_NOISE:
+ *val = LPS22HH_75_Hz_LOW_NOISE;
+ break;
+ case LPS22HH_100_Hz:
+ *val = LPS22HH_100_Hz;
+ break;
+ case LPS22HH_200_Hz:
+ *val = LPS22HH_200_Hz;
+ break;
+ default:
+ *val = LPS22HH_POWER_DOWN;
+ break;
+ }
+ }
+ return ret;
}
/**
@@ -437,9 +437,9 @@
*/
int32_t lps22hh_pressure_ref_set(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_write_reg(ctx, LPS22HH_REF_P_XL, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lps22hh_write_reg(ctx, LPS22HH_REF_P_XL, buff, 2);
+ return ret;
}
/**
@@ -455,9 +455,9 @@
*/
int32_t lps22hh_pressure_ref_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_REF_P_XL, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_REF_P_XL, buff, 2);
+ return ret;
}
/**
@@ -472,9 +472,9 @@
*/
int32_t lps22hh_pressure_offset_set(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_write_reg(ctx, LPS22HH_RPDS_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lps22hh_write_reg(ctx, LPS22HH_RPDS_L, buff, 2);
+ return ret;
}
/**
@@ -490,9 +490,9 @@
*/
int32_t lps22hh_pressure_offset_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_RPDS_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_RPDS_L, buff, 2);
+ return ret;
}
/**
@@ -505,19 +505,19 @@
*/
int32_t lps22hh_all_sources_get(lps22hh_ctx_t *ctx, lps22hh_all_sources_t *val)
{
- int32_t ret;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INT_SOURCE,
- (uint8_t*) &(val->int_source), 1);
- if (ret == 0) {
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2,
- (uint8_t*) &(val->fifo_status2), 1);
- }
- if (ret == 0) {
- ret = lps22hh_read_reg(ctx, LPS22HH_STATUS,
- (uint8_t*) &(val->status), 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INT_SOURCE,
+ (uint8_t *) & (val->int_source), 1);
+ if (ret == 0) {
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2,
+ (uint8_t *) & (val->fifo_status2), 1);
+ }
+ if (ret == 0) {
+ ret = lps22hh_read_reg(ctx, LPS22HH_STATUS,
+ (uint8_t *) & (val->status), 1);
+ }
+ return ret;
}
/**
@@ -530,9 +530,9 @@
*/
int32_t lps22hh_status_reg_get(lps22hh_ctx_t *ctx, lps22hh_status_t *val)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -545,13 +545,13 @@
*/
int32_t lps22hh_press_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_status_t reg;
- int32_t ret;
+ lps22hh_status_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) ®, 1);
- *val = reg.p_da;
+ ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) ®, 1);
+ *val = reg.p_da;
- return ret;
+ return ret;
}
/**
@@ -564,13 +564,13 @@
*/
int32_t lps22hh_temp_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_status_t reg;
- int32_t ret;
+ lps22hh_status_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) ®, 1);
- *val = reg.t_da;
+ ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t *) ®, 1);
+ *val = reg.t_da;
- return ret;
+ return ret;
}
/**
@@ -595,9 +595,9 @@
*/
int32_t lps22hh_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_PRESSURE_OUT_XL, buff, 3);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_PRESSURE_OUT_XL, buff, 3);
+ return ret;
}
/**
@@ -610,9 +610,9 @@
*/
int32_t lps22hh_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_TEMP_OUT_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_TEMP_OUT_L, buff, 2);
+ return ret;
}
/**
@@ -625,9 +625,9 @@
*/
int32_t lps22hh_fifo_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_PRESS_XL, buff, 3);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_PRESS_XL, buff, 3);
+ return ret;
}
/**
@@ -640,9 +640,9 @@
*/
int32_t lps22hh_fifo_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_TEMP_L, buff, 2);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_TEMP_L, buff, 2);
+ return ret;
}
/**
@@ -667,9 +667,9 @@
*/
int32_t lps22hh_device_id_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_WHO_AM_I, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_WHO_AM_I, buff, 1);
+ return ret;
}
/**
@@ -683,15 +683,15 @@
*/
int32_t lps22hh_reset_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.swreset = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.swreset = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -705,13 +705,13 @@
*/
int32_t lps22hh_reset_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- *val = reg.swreset;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ *val = reg.swreset;
- return ret;
+ return ret;
}
/**
@@ -726,15 +726,15 @@
*/
int32_t lps22hh_auto_increment_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.if_add_inc = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.if_add_inc = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -749,13 +749,13 @@
*/
int32_t lps22hh_auto_increment_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- *val = reg.if_add_inc;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ *val = reg.if_add_inc;
- return ret;
+ return ret;
}
/**
@@ -769,15 +769,15 @@
*/
int32_t lps22hh_boot_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.boot = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.boot = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -791,13 +791,13 @@
*/
int32_t lps22hh_boot_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- *val = reg.boot;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ *val = reg.boot;
- return ret;
+ return ret;
}
/**
@@ -823,15 +823,15 @@
*/
int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val)
{
- lps22hh_ctrl_reg1_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg1_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.lpfp_cfg = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.lpfp_cfg = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -844,26 +844,26 @@
*/
int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val)
{
- lps22hh_ctrl_reg1_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg1_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- switch (reg.lpfp_cfg) {
- case LPS22HH_LPF_ODR_DIV_2:
- *val = LPS22HH_LPF_ODR_DIV_2;
- break;
- case LPS22HH_LPF_ODR_DIV_9:
- *val = LPS22HH_LPF_ODR_DIV_9;
- break;
- case LPS22HH_LPF_ODR_DIV_20:
- *val = LPS22HH_LPF_ODR_DIV_20;
- break;
- default:
- *val = LPS22HH_LPF_ODR_DIV_2;
- break;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ switch (reg.lpfp_cfg) {
+ case LPS22HH_LPF_ODR_DIV_2:
+ *val = LPS22HH_LPF_ODR_DIV_2;
+ break;
+ case LPS22HH_LPF_ODR_DIV_9:
+ *val = LPS22HH_LPF_ODR_DIV_9;
+ break;
+ case LPS22HH_LPF_ODR_DIV_20:
+ *val = LPS22HH_LPF_ODR_DIV_20;
+ break;
+ default:
+ *val = LPS22HH_LPF_ODR_DIV_2;
+ break;
}
- return ret;
+ return ret;
}
/**
@@ -890,15 +890,15 @@
int32_t lps22hh_i2c_interface_set(lps22hh_ctx_t *ctx,
lps22hh_i2c_disable_t val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.i2c_disable = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.i2c_disable = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -912,23 +912,23 @@
int32_t lps22hh_i2c_interface_get(lps22hh_ctx_t *ctx,
lps22hh_i2c_disable_t *val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- switch (reg.i2c_disable) {
- case LPS22HH_I2C_ENABLE:
- *val = LPS22HH_I2C_ENABLE;
- break;
- case LPS22HH_I2C_DISABLE:
- *val = LPS22HH_I2C_DISABLE;
- break;
- default:
- *val = LPS22HH_I2C_ENABLE;
- break;
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ switch (reg.i2c_disable) {
+ case LPS22HH_I2C_ENABLE:
+ *val = LPS22HH_I2C_ENABLE;
+ break;
+ case LPS22HH_I2C_DISABLE:
+ *val = LPS22HH_I2C_DISABLE;
+ break;
+ default:
+ *val = LPS22HH_I2C_ENABLE;
+ break;
}
- return ret;
+ return ret;
}
/**
@@ -942,16 +942,16 @@
int32_t lps22hh_i3c_interface_set(lps22hh_ctx_t *ctx,
lps22hh_i3c_disable_t val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.i3c_disable = ((uint8_t)val & 0x01u);
- reg.int_en_i3c = ((uint8_t)val & 0x10U) >> 4;
- ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.i3c_disable = ((uint8_t)val & 0x01u);
+ reg.int_en_i3c = ((uint8_t)val & 0x10U) >> 4;
+ ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -965,26 +965,26 @@
int32_t lps22hh_i3c_interface_get(lps22hh_ctx_t *ctx,
lps22hh_i3c_disable_t *val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
- switch ((reg.int_en_i3c << 4) + reg.int_en_i3c) {
- case LPS22HH_I3C_ENABLE:
- *val = LPS22HH_I3C_ENABLE;
- break;
- case LPS22HH_I3C_ENABLE_INT_PIN_ENABLE:
- *val = LPS22HH_I3C_ENABLE_INT_PIN_ENABLE;
- break;
- case LPS22HH_I3C_DISABLE:
- *val = LPS22HH_I3C_DISABLE;
- break;
- default:
- *val = LPS22HH_I3C_ENABLE;
- break;
- }
- return ret;
+ switch ((reg.int_en_i3c << 4) + reg.int_en_i3c) {
+ case LPS22HH_I3C_ENABLE:
+ *val = LPS22HH_I3C_ENABLE;
+ break;
+ case LPS22HH_I3C_ENABLE_INT_PIN_ENABLE:
+ *val = LPS22HH_I3C_ENABLE_INT_PIN_ENABLE;
+ break;
+ case LPS22HH_I3C_DISABLE:
+ *val = LPS22HH_I3C_DISABLE;
+ break;
+ default:
+ *val = LPS22HH_I3C_ENABLE;
+ break;
+ }
+ return ret;
}
/**
@@ -997,15 +997,15 @@
*/
int32_t lps22hh_sdo_sa0_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sdo_pu_en = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sdo_pu_en = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1018,23 +1018,23 @@
*/
int32_t lps22hh_sdo_sa0_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- switch (reg.sdo_pu_en) {
- case LPS22HH_PULL_UP_DISCONNECT:
- *val = LPS22HH_PULL_UP_DISCONNECT;
- break;
- case LPS22HH_PULL_UP_CONNECT:
- *val = LPS22HH_PULL_UP_CONNECT;
- break;
- default:
- *val = LPS22HH_PULL_UP_DISCONNECT;
- break;
- }
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ switch (reg.sdo_pu_en) {
+ case LPS22HH_PULL_UP_DISCONNECT:
+ *val = LPS22HH_PULL_UP_DISCONNECT;
+ break;
+ case LPS22HH_PULL_UP_CONNECT:
+ *val = LPS22HH_PULL_UP_CONNECT;
+ break;
+ default:
+ *val = LPS22HH_PULL_UP_DISCONNECT;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -1047,15 +1047,15 @@
*/
int32_t lps22hh_sda_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sda_pu_en = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sda_pu_en = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1068,22 +1068,22 @@
*/
int32_t lps22hh_sda_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val)
{
- lps22hh_if_ctrl_t reg;
- int32_t ret;
+ lps22hh_if_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t*) ®, 1);
- switch (reg.sda_pu_en) {
- case LPS22HH_PULL_UP_DISCONNECT:
- *val = LPS22HH_PULL_UP_DISCONNECT;
- break;
- case LPS22HH_PULL_UP_CONNECT:
- *val = LPS22HH_PULL_UP_CONNECT;
- break;
- default:
- *val = LPS22HH_PULL_UP_DISCONNECT;
- break;
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_IF_CTRL, (uint8_t *) ®, 1);
+ switch (reg.sda_pu_en) {
+ case LPS22HH_PULL_UP_DISCONNECT:
+ *val = LPS22HH_PULL_UP_DISCONNECT;
+ break;
+ case LPS22HH_PULL_UP_CONNECT:
+ *val = LPS22HH_PULL_UP_CONNECT;
+ break;
+ default:
+ *val = LPS22HH_PULL_UP_DISCONNECT;
+ break;
+ }
+ return ret;
}
/**
@@ -1096,15 +1096,15 @@
*/
int32_t lps22hh_spi_mode_set(lps22hh_ctx_t *ctx, lps22hh_sim_t val)
{
- lps22hh_ctrl_reg1_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg1_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.sim = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.sim = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1117,22 +1117,22 @@
*/
int32_t lps22hh_spi_mode_get(lps22hh_ctx_t *ctx, lps22hh_sim_t *val)
{
- lps22hh_ctrl_reg1_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg1_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1);
- switch (reg.sim) {
- case LPS22HH_SPI_4_WIRE:
- *val = LPS22HH_SPI_4_WIRE;
- break;
- case LPS22HH_SPI_3_WIRE:
- *val = LPS22HH_SPI_3_WIRE;
- break;
- default:
- *val = LPS22HH_SPI_4_WIRE;
- break;
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t *) ®, 1);
+ switch (reg.sim) {
+ case LPS22HH_SPI_4_WIRE:
+ *val = LPS22HH_SPI_4_WIRE;
+ break;
+ case LPS22HH_SPI_3_WIRE:
+ *val = LPS22HH_SPI_3_WIRE;
+ break;
+ default:
+ *val = LPS22HH_SPI_4_WIRE;
+ break;
+ }
+ return ret;
}
/**
@@ -1158,15 +1158,15 @@
*/
int32_t lps22hh_int_notification_set(lps22hh_ctx_t *ctx, lps22hh_lir_t val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.lir = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.lir = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1179,23 +1179,23 @@
*/
int32_t lps22hh_int_notification_get(lps22hh_ctx_t *ctx, lps22hh_lir_t *val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
- switch (reg.lir) {
- case LPS22HH_INT_PULSED:
- *val = LPS22HH_INT_PULSED;
- break;
- case LPS22HH_INT_LATCHED:
- *val = LPS22HH_INT_LATCHED;
- break;
- default:
- *val = LPS22HH_INT_PULSED;
- break;
- }
- return ret;
+ switch (reg.lir) {
+ case LPS22HH_INT_PULSED:
+ *val = LPS22HH_INT_PULSED;
+ break;
+ case LPS22HH_INT_LATCHED:
+ *val = LPS22HH_INT_LATCHED;
+ break;
+ default:
+ *val = LPS22HH_INT_PULSED;
+ break;
+ }
+ return ret;
}
/**
@@ -1208,16 +1208,16 @@
*/
int32_t lps22hh_pin_mode_set(lps22hh_ctx_t *ctx, lps22hh_pp_od_t val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.pp_od = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- }
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.pp_od = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -1230,25 +1230,25 @@
*/
int32_t lps22hh_pin_mode_get(lps22hh_ctx_t *ctx, lps22hh_pp_od_t *val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
- switch (reg.pp_od) {
- case LPS22HH_PUSH_PULL:
- *val = LPS22HH_PUSH_PULL;
- break;
- case LPS22HH_OPEN_DRAIN:
- *val = LPS22HH_OPEN_DRAIN;
- break;
- default:
- *val = LPS22HH_PUSH_PULL;
- break;
- }
+ switch (reg.pp_od) {
+ case LPS22HH_PUSH_PULL:
+ *val = LPS22HH_PUSH_PULL;
+ break;
+ case LPS22HH_OPEN_DRAIN:
+ *val = LPS22HH_OPEN_DRAIN;
+ break;
+ default:
+ *val = LPS22HH_PUSH_PULL;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -1261,16 +1261,16 @@
*/
int32_t lps22hh_pin_polarity_set(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.int_h_l = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
- }
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.int_h_l = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
+ }
- return ret;
+ return ret;
}
/**
@@ -1283,24 +1283,24 @@
*/
int32_t lps22hh_pin_polarity_get(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t *val)
{
- lps22hh_ctrl_reg2_t reg;
- int32_t ret;
+ lps22hh_ctrl_reg2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t *) ®, 1);
- switch (reg.int_h_l) {
- case LPS22HH_ACTIVE_HIGH:
- *val = LPS22HH_ACTIVE_HIGH;
- break;
- case LPS22HH_ACTIVE_LOW:
- *val = LPS22HH_ACTIVE_LOW;
- break;
- default:
- *val = LPS22HH_ACTIVE_HIGH;
- break;
- }
+ switch (reg.int_h_l) {
+ case LPS22HH_ACTIVE_HIGH:
+ *val = LPS22HH_ACTIVE_HIGH;
+ break;
+ case LPS22HH_ACTIVE_LOW:
+ *val = LPS22HH_ACTIVE_LOW;
+ break;
+ default:
+ *val = LPS22HH_ACTIVE_HIGH;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -1314,9 +1314,9 @@
int32_t lps22hh_pin_int_route_set(lps22hh_ctx_t *ctx,
lps22hh_ctrl_reg3_t *val)
{
- int32_t ret;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -1330,9 +1330,9 @@
int32_t lps22hh_pin_int_route_get(lps22hh_ctx_t *ctx,
lps22hh_ctrl_reg3_t *val)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -1358,22 +1358,21 @@
*/
int32_t lps22hh_int_on_threshold_set(lps22hh_ctx_t *ctx, lps22hh_pe_t val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.pe = (uint8_t)val;
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.pe = (uint8_t)val;
- if (val == LPS22HH_NO_THRESHOLD){
- reg.diff_en = PROPERTY_DISABLE;
+ if (val == LPS22HH_NO_THRESHOLD) {
+ reg.diff_en = PROPERTY_DISABLE;
+ } else {
+ reg.diff_en = PROPERTY_ENABLE;
+ }
+ ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
}
- else{
- reg.diff_en = PROPERTY_ENABLE;
- }
- ret = lps22hh_write_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
- }
- return ret;
+ return ret;
}
/**
@@ -1386,30 +1385,30 @@
*/
int32_t lps22hh_int_on_threshold_get(lps22hh_ctx_t *ctx, lps22hh_pe_t *val)
{
- lps22hh_interrupt_cfg_t reg;
- int32_t ret;
+ lps22hh_interrupt_cfg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t*) ®, 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_INTERRUPT_CFG, (uint8_t *) ®, 1);
- switch (reg.pe) {
- case LPS22HH_NO_THRESHOLD:
- *val = LPS22HH_NO_THRESHOLD;
- break;
- case LPS22HH_POSITIVE:
- *val = LPS22HH_POSITIVE;
- break;
- case LPS22HH_NEGATIVE:
- *val = LPS22HH_NEGATIVE;
- break;
- case LPS22HH_BOTH:
- *val = LPS22HH_BOTH;
- break;
- default:
- *val = LPS22HH_NO_THRESHOLD;
- break;
- }
+ switch (reg.pe) {
+ case LPS22HH_NO_THRESHOLD:
+ *val = LPS22HH_NO_THRESHOLD;
+ break;
+ case LPS22HH_POSITIVE:
+ *val = LPS22HH_POSITIVE;
+ break;
+ case LPS22HH_NEGATIVE:
+ *val = LPS22HH_NEGATIVE;
+ break;
+ case LPS22HH_BOTH:
+ *val = LPS22HH_BOTH;
+ break;
+ default:
+ *val = LPS22HH_NO_THRESHOLD;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -1422,20 +1421,20 @@
*/
int32_t lps22hh_int_treshold_set(lps22hh_ctx_t *ctx, uint16_t buff)
{
- int32_t ret;
- lps22hh_ths_p_l_t ths_p_l;
- lps22hh_ths_p_h_t ths_p_h;
-
- ths_p_l.ths = (uint8_t)(buff & 0x00FFU);
- ths_p_h.ths = (uint8_t)((buff & 0x7F00U) >> 8);
-
- ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_L,
- (uint8_t*)&ths_p_l, 1);
- if (ret == 0) {
- ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_H,
- (uint8_t*)&ths_p_h, 1);
- }
- return ret;
+ int32_t ret;
+ lps22hh_ths_p_l_t ths_p_l;
+ lps22hh_ths_p_h_t ths_p_h;
+
+ ths_p_l.ths = (uint8_t)(buff & 0x00FFU);
+ ths_p_h.ths = (uint8_t)((buff & 0x7F00U) >> 8);
+
+ ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_L,
+ (uint8_t *)&ths_p_l, 1);
+ if (ret == 0) {
+ ret = lps22hh_write_reg(ctx, LPS22HH_THS_P_H,
+ (uint8_t *)&ths_p_h, 1);
+ }
+ return ret;
}
/**
@@ -1448,19 +1447,19 @@
*/
int32_t lps22hh_int_treshold_get(lps22hh_ctx_t *ctx, uint16_t *buff)
{
- int32_t ret;
- lps22hh_ths_p_l_t ths_p_l;
- lps22hh_ths_p_h_t ths_p_h;
-
- ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_L,
- (uint8_t*)&ths_p_l, 1);
- if (ret == 0) {
- ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_H,
- (uint8_t*)&ths_p_h, 1);
- *buff = (uint16_t)ths_p_h.ths << 8;
- *buff |= (uint16_t)ths_p_l.ths;
- }
- return ret;
+ int32_t ret;
+ lps22hh_ths_p_l_t ths_p_l;
+ lps22hh_ths_p_h_t ths_p_h;
+
+ ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_L,
+ (uint8_t *)&ths_p_l, 1);
+ if (ret == 0) {
+ ret = lps22hh_read_reg(ctx, LPS22HH_THS_P_H,
+ (uint8_t *)&ths_p_h, 1);
+ *buff = (uint16_t)ths_p_h.ths << 8;
+ *buff |= (uint16_t)ths_p_l.ths;
+ }
+ return ret;
}
/**
@@ -1485,15 +1484,15 @@
*/
int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val)
{
- lps22hh_fifo_ctrl_t reg;
- int32_t ret;
+ lps22hh_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.f_mode = (uint8_t)val;
- ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.f_mode = (uint8_t)val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1506,39 +1505,39 @@
*/
int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val)
{
- lps22hh_fifo_ctrl_t reg;
- int32_t ret;
+ lps22hh_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1);
- switch (reg.f_mode) {
- case LPS22HH_BYPASS_MODE:
- *val = LPS22HH_BYPASS_MODE;
- break;
- case LPS22HH_FIFO_MODE:
- *val = LPS22HH_FIFO_MODE;
- break;
- case LPS22HH_STREAM_MODE:
- *val = LPS22HH_STREAM_MODE;
- break;
- case LPS22HH_DYNAMIC_STREAM_MODE:
- *val = LPS22HH_DYNAMIC_STREAM_MODE;
- break;
- case LPS22HH_BYPASS_TO_FIFO_MODE:
- *val = LPS22HH_BYPASS_TO_FIFO_MODE;
- break;
- case LPS22HH_BYPASS_TO_STREAM_MODE:
- *val = LPS22HH_BYPASS_TO_STREAM_MODE;
- break;
- case LPS22HH_STREAM_TO_FIFO_MODE:
- *val = LPS22HH_STREAM_TO_FIFO_MODE;
- break;
- default:
- *val = LPS22HH_BYPASS_MODE;
- break;
- }
+ switch (reg.f_mode) {
+ case LPS22HH_BYPASS_MODE:
+ *val = LPS22HH_BYPASS_MODE;
+ break;
+ case LPS22HH_FIFO_MODE:
+ *val = LPS22HH_FIFO_MODE;
+ break;
+ case LPS22HH_STREAM_MODE:
+ *val = LPS22HH_STREAM_MODE;
+ break;
+ case LPS22HH_DYNAMIC_STREAM_MODE:
+ *val = LPS22HH_DYNAMIC_STREAM_MODE;
+ break;
+ case LPS22HH_BYPASS_TO_FIFO_MODE:
+ *val = LPS22HH_BYPASS_TO_FIFO_MODE;
+ break;
+ case LPS22HH_BYPASS_TO_STREAM_MODE:
+ *val = LPS22HH_BYPASS_TO_STREAM_MODE;
+ break;
+ case LPS22HH_STREAM_TO_FIFO_MODE:
+ *val = LPS22HH_STREAM_TO_FIFO_MODE;
+ break;
+ default:
+ *val = LPS22HH_BYPASS_MODE;
+ break;
+ }
- return ret;
+ return ret;
}
/**
@@ -1552,15 +1551,15 @@
*/
int32_t lps22hh_fifo_stop_on_wtm_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_fifo_ctrl_t reg;
- int32_t ret;
+ lps22hh_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.stop_on_wtm = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.stop_on_wtm = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1574,13 +1573,13 @@
*/
int32_t lps22hh_fifo_stop_on_wtm_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_fifo_ctrl_t reg;
- int32_t ret;
+ lps22hh_fifo_ctrl_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1);
- *val = reg.stop_on_wtm;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t *) ®, 1);
+ *val = reg.stop_on_wtm;
- return ret;
+ return ret;
}
/**
@@ -1593,15 +1592,15 @@
*/
int32_t lps22hh_fifo_watermark_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_fifo_wtm_t reg;
- int32_t ret;
+ lps22hh_fifo_wtm_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1);
- if (ret == 0) {
- reg.wtm = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1);
- }
- return ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) ®, 1);
+ if (ret == 0) {
+ reg.wtm = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) ®, 1);
+ }
+ return ret;
}
/**
@@ -1614,13 +1613,13 @@
*/
int32_t lps22hh_fifo_watermark_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_fifo_wtm_t reg;
- int32_t ret;
+ lps22hh_fifo_wtm_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1);
- *val = reg.wtm;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t *) ®, 1);
+ *val = reg.wtm;
- return ret;
+ return ret;
}
/**
@@ -1633,9 +1632,9 @@
*/
int32_t lps22hh_fifo_data_level_get(lps22hh_ctx_t *ctx, uint8_t *buff)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS1, buff, 1);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS1, buff, 1);
+ return ret;
}
/**
@@ -1648,9 +1647,9 @@
*/
int32_t lps22hh_fifo_src_get(lps22hh_ctx_t *ctx, lps22hh_fifo_status2_t *val)
{
- int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) val, 1);
- return ret;
+ int32_t ret;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) val, 1);
+ return ret;
}
/**
@@ -1663,13 +1662,13 @@
*/
int32_t lps22hh_fifo_full_flag_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_fifo_status2_t reg;
- int32_t ret;
+ lps22hh_fifo_status2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1);
- *val = reg.fifo_full_ia;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) ®, 1);
+ *val = reg.fifo_full_ia;
- return ret;
+ return ret;
}
/**
@@ -1682,13 +1681,13 @@
*/
int32_t lps22hh_fifo_ovr_flag_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_fifo_status2_t reg;
- int32_t ret;
+ lps22hh_fifo_status2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1);
- *val = reg.fifo_ovr_ia;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) ®, 1);
+ *val = reg.fifo_ovr_ia;
- return ret;
+ return ret;
}
/**
@@ -1701,13 +1700,13 @@
*/
int32_t lps22hh_fifo_wtm_flag_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_fifo_status2_t reg;
- int32_t ret;
+ lps22hh_fifo_status2_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1);
- *val = reg.fifo_wtm_ia;
+ ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t *) ®, 1);
+ *val = reg.fifo_wtm_ia;
- return ret;
+ return ret;
}
/**
@@ -1719,14 +1718,14 @@
*/
int32_t lps22hh_fifo_ovr_on_int_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_reg_t reg;
- int32_t ret;
+ lps22hh_reg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- reg.ctrl_reg3.int_f_ovr = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ reg.ctrl_reg3.int_f_ovr = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- return ret;
+ return ret;
}
/**
@@ -1738,13 +1737,13 @@
*/
int32_t lps22hh_fifo_ovr_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_reg_t reg;
- int32_t ret;
+ lps22hh_reg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- *val = reg.ctrl_reg3.int_f_ovr;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ *val = reg.ctrl_reg3.int_f_ovr;
- return ret;
+ return ret;
}
/**
@@ -1756,14 +1755,14 @@
*/
int32_t lps22hh_fifo_threshold_on_int_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_reg_t reg;
- int32_t ret;
+ lps22hh_reg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- reg.ctrl_reg3.int_f_wtm = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ reg.ctrl_reg3.int_f_wtm = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- return ret;
+ return ret;
}
/**
@@ -1775,13 +1774,13 @@
*/
int32_t lps22hh_fifo_threshold_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_reg_t reg;
- int32_t ret;
+ lps22hh_reg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- *val = reg.ctrl_reg3.int_f_wtm;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ *val = reg.ctrl_reg3.int_f_wtm;
- return ret;
+ return ret;
}
/**
@@ -1793,14 +1792,14 @@
*/
int32_t lps22hh_fifo_full_on_int_set(lps22hh_ctx_t *ctx, uint8_t val)
{
- lps22hh_reg_t reg;
- int32_t ret;
+ lps22hh_reg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- reg.ctrl_reg3.int_f_full = val;
- ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ reg.ctrl_reg3.int_f_full = val;
+ ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- return ret;
+ return ret;
}
/**
@@ -1812,13 +1811,13 @@
*/
int32_t lps22hh_fifo_full_on_int_get(lps22hh_ctx_t *ctx, uint8_t *val)
{
- lps22hh_reg_t reg;
- int32_t ret;
+ lps22hh_reg_t reg;
+ int32_t ret;
- ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
- *val = reg.ctrl_reg3.int_f_full;
+ ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1);
+ *val = reg.ctrl_reg3.int_f_full;
- return ret;
+ return ret;
}
/**
--- a/lps22hh_reg.h Wed Mar 06 09:18:20 2019 +0000
+++ b/lps22hh_reg.h Wed Jul 24 14:19:09 2019 +0000
@@ -40,7 +40,7 @@
#define LPS22HH_DRIVER_H
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
@@ -72,24 +72,24 @@
*
*/
-typedef union{
- int16_t i16bit[3];
- uint8_t u8bit[6];
+typedef union {
+ int16_t i16bit[3];
+ uint8_t u8bit[6];
} axis3bit16_t;
-typedef union{
- int16_t i16bit;
- uint8_t u8bit[2];
+typedef union {
+ int16_t i16bit;
+ uint8_t u8bit[2];
} axis1bit16_t;
-typedef union{
- int32_t i32bit[3];
- uint8_t u8bit[12];
+typedef union {
+ int32_t i32bit[3];
+ uint8_t u8bit[12];
} axis3bit32_t;
-typedef union{
- int32_t i32bit;
- uint8_t u8bit[4];
+typedef union {
+ int32_t i32bit;
+ uint8_t u8bit[4];
} axis1bit32_t;
/**
@@ -97,15 +97,15 @@
*
*/
-typedef struct{
- uint8_t bit0 : 1;
- uint8_t bit1 : 1;
- uint8_t bit2 : 1;
- uint8_t bit3 : 1;
- uint8_t bit4 : 1;
- uint8_t bit5 : 1;
- uint8_t bit6 : 1;
- uint8_t bit7 : 1;
+typedef struct {
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
} bitwise_t;
#define PROPERTY_DISABLE (0U)
@@ -126,15 +126,15 @@
*
*/
-typedef int32_t (*lps22hh_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
-typedef int32_t (*lps22hh_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
+typedef int32_t (*lps22hh_write_ptr)(void *, uint8_t, uint8_t *, uint16_t);
+typedef int32_t (*lps22hh_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
typedef struct {
- /** Component mandatory fields **/
- lps22hh_write_ptr write_reg;
- lps22hh_read_ptr read_reg;
- /** Customizable optional pointer **/
- void *handle;
+ /** Component mandatory fields **/
+ lps22hh_write_ptr write_reg;
+ lps22hh_read_ptr read_reg;
+ /** Customizable optional pointer **/
+ void *handle;
} lps22hh_ctx_t;
/**
@@ -183,80 +183,80 @@
#define LPS22HH_INTERRUPT_CFG 0x0BU
typedef struct {
- uint8_t pe : 2; /* ple + phe */
- uint8_t lir : 1;
- uint8_t diff_en : 1;
- uint8_t reset_az : 1;
- uint8_t autozero : 1;
- uint8_t reset_arp : 1;
- uint8_t autorefp : 1;
+ uint8_t pe : 2; /* ple + phe */
+ uint8_t lir : 1;
+ uint8_t diff_en : 1;
+ uint8_t reset_az : 1;
+ uint8_t autozero : 1;
+ uint8_t reset_arp : 1;
+ uint8_t autorefp : 1;
} lps22hh_interrupt_cfg_t;
#define LPS22HH_THS_P_L 0x0CU
typedef struct {
- uint8_t ths : 8;
+ uint8_t ths : 8;
} lps22hh_ths_p_l_t;
#define LPS22HH_THS_P_H 0x0DU
typedef struct {
- uint8_t ths : 7;
- uint8_t not_used_01 : 1;
+ uint8_t ths : 7;
+ uint8_t not_used_01 : 1;
} lps22hh_ths_p_h_t;
#define LPS22HH_IF_CTRL 0x0EU
typedef struct {
- uint8_t i2c_disable : 1;
- uint8_t i3c_disable : 1;
- uint8_t pd_dis_int1 : 1;
- uint8_t sdo_pu_en : 1;
- uint8_t sda_pu_en : 1;
- uint8_t not_used_01 : 2;
- uint8_t int_en_i3c : 1;
+ uint8_t i2c_disable : 1;
+ uint8_t i3c_disable : 1;
+ uint8_t pd_dis_int1 : 1;
+ uint8_t sdo_pu_en : 1;
+ uint8_t sda_pu_en : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t int_en_i3c : 1;
} lps22hh_if_ctrl_t;
#define LPS22HH_WHO_AM_I 0x0FU
#define LPS22HH_CTRL_REG1 0x10U
typedef struct {
- uint8_t sim : 1;
- uint8_t bdu : 1;
- uint8_t lpfp_cfg : 2; /* en_lpfp + lpfp_cfg */
- uint8_t odr : 3;
- uint8_t not_used_01 : 1;
+ uint8_t sim : 1;
+ uint8_t bdu : 1;
+ uint8_t lpfp_cfg : 2; /* en_lpfp + lpfp_cfg */
+ uint8_t odr : 3;
+ uint8_t not_used_01 : 1;
} lps22hh_ctrl_reg1_t;
#define LPS22HH_CTRL_REG2 0x11U
typedef struct {
- uint8_t one_shot : 1;
- uint8_t low_noise_en : 1;
- uint8_t swreset : 1;
- uint8_t not_used_01 : 1;
- uint8_t if_add_inc : 1;
- uint8_t pp_od : 1;
- uint8_t int_h_l : 1;
- uint8_t boot : 1;
+ uint8_t one_shot : 1;
+ uint8_t low_noise_en : 1;
+ uint8_t swreset : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t if_add_inc : 1;
+ uint8_t pp_od : 1;
+ uint8_t int_h_l : 1;
+ uint8_t boot : 1;
} lps22hh_ctrl_reg2_t;
#define LPS22HH_CTRL_REG3 0x12U
typedef struct {
- uint8_t int_s : 2;
- uint8_t drdy : 1;
- uint8_t int_f_ovr : 1;
- uint8_t int_f_wtm : 1;
- uint8_t int_f_full : 1;
- uint8_t not_used_01 : 2;
+ uint8_t int_s : 2;
+ uint8_t drdy : 1;
+ uint8_t int_f_ovr : 1;
+ uint8_t int_f_wtm : 1;
+ uint8_t int_f_full : 1;
+ uint8_t not_used_01 : 2;
} lps22hh_ctrl_reg3_t;
#define LPS22HH_FIFO_CTRL 0x13U
typedef struct {
- uint8_t f_mode : 3; /* f_mode + trig_modes */
- uint8_t stop_on_wtm : 1;
- uint8_t not_used_01 : 4;
+ uint8_t f_mode : 3; /* f_mode + trig_modes */
+ uint8_t stop_on_wtm : 1;
+ uint8_t not_used_01 : 4;
} lps22hh_fifo_ctrl_t;
#define LPS22HH_FIFO_WTM 0x14U
typedef struct {
- uint8_t wtm : 7;
- uint8_t not_used_01 : 1;
+ uint8_t wtm : 7;
+ uint8_t not_used_01 : 1;
} lps22hh_fifo_wtm_t;
#define LPS22HH_REF_P_XL 0x15U
@@ -265,29 +265,29 @@
#define LPS22HH_RPDS_H 0x19U
#define LPS22HH_INT_SOURCE 0x24U
typedef struct {
- uint8_t ph : 1;
- uint8_t pl : 1;
- uint8_t ia : 1;
- uint8_t not_used_01 : 5;
+ uint8_t ph : 1;
+ uint8_t pl : 1;
+ uint8_t ia : 1;
+ uint8_t not_used_01 : 5;
} lps22hh_int_source_t;
#define LPS22HH_FIFO_STATUS1 0x25U
#define LPS22HH_FIFO_STATUS2 0x26U
typedef struct {
- uint8_t not_used_01 : 5;
- uint8_t fifo_full_ia : 1;
- uint8_t fifo_ovr_ia : 1;
- uint8_t fifo_wtm_ia : 1;
+ uint8_t not_used_01 : 5;
+ uint8_t fifo_full_ia : 1;
+ uint8_t fifo_ovr_ia : 1;
+ uint8_t fifo_wtm_ia : 1;
} lps22hh_fifo_status2_t;
#define LPS22HH_STATUS 0x27U
typedef struct {
- uint8_t p_da : 1;
- uint8_t t_da : 1;
- uint8_t not_used_01 : 2;
- uint8_t p_or : 1;
- uint8_t t_or : 1;
- uint8_t not_used_02 : 2;
+ uint8_t p_da : 1;
+ uint8_t t_da : 1;
+ uint8_t not_used_01 : 2;
+ uint8_t p_or : 1;
+ uint8_t t_or : 1;
+ uint8_t not_used_02 : 2;
} lps22hh_status_t;
#define LPS22HH_PRESSURE_OUT_XL 0x28U
@@ -313,19 +313,19 @@
* @{
*
*/
-typedef union{
- lps22hh_interrupt_cfg_t interrupt_cfg;
- lps22hh_if_ctrl_t if_ctrl;
- lps22hh_ctrl_reg1_t ctrl_reg1;
- lps22hh_ctrl_reg2_t ctrl_reg2;
- lps22hh_ctrl_reg3_t ctrl_reg3;
- lps22hh_fifo_ctrl_t fifo_ctrl;
- lps22hh_fifo_wtm_t fifo_wtm;
- lps22hh_int_source_t int_source;
- lps22hh_fifo_status2_t fifo_status2;
- lps22hh_status_t status;
- bitwise_t bitwise;
- uint8_t byte;
+typedef union {
+ lps22hh_interrupt_cfg_t interrupt_cfg;
+ lps22hh_if_ctrl_t if_ctrl;
+ lps22hh_ctrl_reg1_t ctrl_reg1;
+ lps22hh_ctrl_reg2_t ctrl_reg2;
+ lps22hh_ctrl_reg3_t ctrl_reg3;
+ lps22hh_fifo_ctrl_t fifo_ctrl;
+ lps22hh_fifo_wtm_t fifo_wtm;
+ lps22hh_int_source_t int_source;
+ lps22hh_fifo_status2_t fifo_status2;
+ lps22hh_status_t status;
+ bitwise_t bitwise;
+ uint8_t byte;
} lps22hh_reg_t;
/**
@@ -333,9 +333,9 @@
*
*/
-int32_t lps22hh_read_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t* data,
+int32_t lps22hh_read_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len);
-int32_t lps22hh_write_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t* data,
+int32_t lps22hh_write_reg(lps22hh_ctx_t *ctx, uint8_t reg, uint8_t *data,
uint16_t len);
extern float lps22hh_from_lsb_to_hpa(int16_t lsb);
@@ -357,20 +357,20 @@
int32_t lps22hh_block_data_update_get(lps22hh_ctx_t *ctx, uint8_t *val);
typedef enum {
- LPS22HH_POWER_DOWN = 0x00,
- LPS22HH_ONE_SHOOT = 0x08,
- LPS22HH_1_Hz = 0x01,
- LPS22HH_10_Hz = 0x02,
- LPS22HH_25_Hz = 0x03,
- LPS22HH_50_Hz = 0x04,
- LPS22HH_75_Hz = 0x05,
- LPS22HH_1_Hz_LOW_NOISE = 0x11,
- LPS22HH_10_Hz_LOW_NOISE = 0x12,
- LPS22HH_25_Hz_LOW_NOISE = 0x13,
- LPS22HH_50_Hz_LOW_NOISE = 0x14,
- LPS22HH_75_Hz_LOW_NOISE = 0x15,
- LPS22HH_100_Hz = 0x06,
- LPS22HH_200_Hz = 0x07,
+ LPS22HH_POWER_DOWN = 0x00,
+ LPS22HH_ONE_SHOOT = 0x08,
+ LPS22HH_1_Hz = 0x01,
+ LPS22HH_10_Hz = 0x02,
+ LPS22HH_25_Hz = 0x03,
+ LPS22HH_50_Hz = 0x04,
+ LPS22HH_75_Hz = 0x05,
+ LPS22HH_1_Hz_LOW_NOISE = 0x11,
+ LPS22HH_10_Hz_LOW_NOISE = 0x12,
+ LPS22HH_25_Hz_LOW_NOISE = 0x13,
+ LPS22HH_50_Hz_LOW_NOISE = 0x14,
+ LPS22HH_75_Hz_LOW_NOISE = 0x15,
+ LPS22HH_100_Hz = 0x06,
+ LPS22HH_200_Hz = 0x07,
} lps22hh_odr_t;
int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val);
int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val);
@@ -381,10 +381,10 @@
int32_t lps22hh_pressure_offset_set(lps22hh_ctx_t *ctx, uint8_t *buff);
int32_t lps22hh_pressure_offset_get(lps22hh_ctx_t *ctx, uint8_t *buff);
-typedef struct{
- lps22hh_int_source_t int_source;
- lps22hh_fifo_status2_t fifo_status2;
- lps22hh_status_t status;
+typedef struct {
+ lps22hh_int_source_t int_source;
+ lps22hh_fifo_status2_t fifo_status2;
+ lps22hh_status_t status;
} lps22hh_all_sources_t;
int32_t lps22hh_all_sources_get(lps22hh_ctx_t *ctx,
lps22hh_all_sources_t *val);
@@ -415,16 +415,16 @@
int32_t lps22hh_boot_get(lps22hh_ctx_t *ctx, uint8_t *val);
typedef enum {
- LPS22HH_LPF_ODR_DIV_2 = 0,
- LPS22HH_LPF_ODR_DIV_9 = 2,
- LPS22HH_LPF_ODR_DIV_20 = 3,
+ LPS22HH_LPF_ODR_DIV_2 = 0,
+ LPS22HH_LPF_ODR_DIV_9 = 2,
+ LPS22HH_LPF_ODR_DIV_20 = 3,
} lps22hh_lpfp_cfg_t;
int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val);
int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val);
typedef enum {
- LPS22HH_I2C_ENABLE = 0,
- LPS22HH_I2C_DISABLE = 1,
+ LPS22HH_I2C_ENABLE = 0,
+ LPS22HH_I2C_DISABLE = 1,
} lps22hh_i2c_disable_t;
int32_t lps22hh_i2c_interface_set(lps22hh_ctx_t *ctx,
lps22hh_i2c_disable_t val);
@@ -432,9 +432,9 @@
lps22hh_i2c_disable_t *val);
typedef enum {
- LPS22HH_I3C_ENABLE = 0x00,
- LPS22HH_I3C_ENABLE_INT_PIN_ENABLE = 0x10,
- LPS22HH_I3C_DISABLE = 0x11,
+ LPS22HH_I3C_ENABLE = 0x00,
+ LPS22HH_I3C_ENABLE_INT_PIN_ENABLE = 0x10,
+ LPS22HH_I3C_DISABLE = 0x11,
} lps22hh_i3c_disable_t;
int32_t lps22hh_i3c_interface_set(lps22hh_ctx_t *ctx,
lps22hh_i3c_disable_t val);
@@ -442,8 +442,8 @@
lps22hh_i3c_disable_t *val);
typedef enum {
- LPS22HH_PULL_UP_DISCONNECT = 0,
- LPS22HH_PULL_UP_CONNECT = 1,
+ LPS22HH_PULL_UP_DISCONNECT = 0,
+ LPS22HH_PULL_UP_CONNECT = 1,
} lps22hh_pu_en_t;
int32_t lps22hh_sdo_sa0_mode_set(lps22hh_ctx_t *ctx, lps22hh_pu_en_t val);
int32_t lps22hh_sdo_sa0_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val);
@@ -451,29 +451,29 @@
int32_t lps22hh_sda_mode_get(lps22hh_ctx_t *ctx, lps22hh_pu_en_t *val);
typedef enum {
- LPS22HH_SPI_4_WIRE = 0,
- LPS22HH_SPI_3_WIRE = 1,
+ LPS22HH_SPI_4_WIRE = 0,
+ LPS22HH_SPI_3_WIRE = 1,
} lps22hh_sim_t;
int32_t lps22hh_spi_mode_set(lps22hh_ctx_t *ctx, lps22hh_sim_t val);
int32_t lps22hh_spi_mode_get(lps22hh_ctx_t *ctx, lps22hh_sim_t *val);
typedef enum {
- LPS22HH_INT_PULSED = 0,
- LPS22HH_INT_LATCHED = 1,
+ LPS22HH_INT_PULSED = 0,
+ LPS22HH_INT_LATCHED = 1,
} lps22hh_lir_t;
int32_t lps22hh_int_notification_set(lps22hh_ctx_t *ctx, lps22hh_lir_t val);
int32_t lps22hh_int_notification_get(lps22hh_ctx_t *ctx, lps22hh_lir_t *val);
typedef enum {
- LPS22HH_PUSH_PULL = 0,
- LPS22HH_OPEN_DRAIN = 1,
+ LPS22HH_PUSH_PULL = 0,
+ LPS22HH_OPEN_DRAIN = 1,
} lps22hh_pp_od_t;
int32_t lps22hh_pin_mode_set(lps22hh_ctx_t *ctx, lps22hh_pp_od_t val);
int32_t lps22hh_pin_mode_get(lps22hh_ctx_t *ctx, lps22hh_pp_od_t *val);
typedef enum {
- LPS22HH_ACTIVE_HIGH = 0,
- LPS22HH_ACTIVE_LOW = 1,
+ LPS22HH_ACTIVE_HIGH = 0,
+ LPS22HH_ACTIVE_LOW = 1,
} lps22hh_int_h_l_t;
int32_t lps22hh_pin_polarity_set(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t val);
int32_t lps22hh_pin_polarity_get(lps22hh_ctx_t *ctx, lps22hh_int_h_l_t *val);
@@ -484,10 +484,10 @@
lps22hh_ctrl_reg3_t *val);
typedef enum {
- LPS22HH_NO_THRESHOLD = 0,
- LPS22HH_POSITIVE = 1,
- LPS22HH_NEGATIVE = 2,
- LPS22HH_BOTH = 3,
+ LPS22HH_NO_THRESHOLD = 0,
+ LPS22HH_POSITIVE = 1,
+ LPS22HH_NEGATIVE = 2,
+ LPS22HH_BOTH = 3,
} lps22hh_pe_t;
int32_t lps22hh_int_on_threshold_set(lps22hh_ctx_t *ctx, lps22hh_pe_t val);
int32_t lps22hh_int_on_threshold_get(lps22hh_ctx_t *ctx, lps22hh_pe_t *val);
@@ -496,13 +496,13 @@
int32_t lps22hh_int_treshold_get(lps22hh_ctx_t *ctx, uint16_t *buff);
typedef enum {
- LPS22HH_BYPASS_MODE = 0,
- LPS22HH_FIFO_MODE = 1,
- LPS22HH_STREAM_MODE = 2,
- LPS22HH_DYNAMIC_STREAM_MODE = 3,
- LPS22HH_BYPASS_TO_FIFO_MODE = 5,
- LPS22HH_BYPASS_TO_STREAM_MODE = 6,
- LPS22HH_STREAM_TO_FIFO_MODE = 7,
+ LPS22HH_BYPASS_MODE = 0,
+ LPS22HH_FIFO_MODE = 1,
+ LPS22HH_STREAM_MODE = 2,
+ LPS22HH_DYNAMIC_STREAM_MODE = 3,
+ LPS22HH_BYPASS_TO_FIFO_MODE = 5,
+ LPS22HH_BYPASS_TO_STREAM_MODE = 6,
+ LPS22HH_STREAM_TO_FIFO_MODE = 7,
} lps22hh_f_mode_t;
int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val);
int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val);