ST
3-axis MEMS ultra low power accelerometer
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3
Revision 0:dff8803aace7, committed 2018-11-19
- Comitter:
- cparata
- Date:
- Mon Nov 19 13:20:07 2018 +0000
- Child:
- 1:94e908301953
- Commit message:
- First release of LIS2DW12 driver
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LIS2DW12Sensor.cpp Mon Nov 19 13:20:07 2018 +0000
@@ -0,0 +1,1540 @@
+/**
+ ******************************************************************************
+ * @file LIS2DW12Sensor.cpp
+ * @author CLab
+ * @version V1.0.0
+ * @date 15 November 2018
+ * @brief Implementation of an LIS2DW12 Inertial Measurement Unit (IMU) 3 axes
+ * sensor.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "LIS2DW12Sensor.h"
+
+
+/* Class Implementation ------------------------------------------------------*/
+
+/** Constructor
+ * @param i2c object of an helper class which handles the I2C peripheral
+ * @param address the address of the component's instance
+ * @param int1_pin the interrupt 1 pin
+ * @param int2_pin the interrupt 2 pin
+ */
+LIS2DW12Sensor::LIS2DW12Sensor(DevI2C *i2c, uint8_t address, PinName int1_pin, PinName int2_pin) :
+ _dev_i2c(i2c), _address(address), _cs_pin(NC), _int1_irq(int1_pin), _int2_irq(int2_pin)
+{
+ assert (i2c);
+ _dev_spi = NULL;
+ _reg_ctx.write_reg = LIS2DW12_io_write;
+ _reg_ctx.read_reg = LIS2DW12_io_read;
+ _reg_ctx.handle = (void *)this;
+}
+
+/** Constructor
+ * @param spi object of an helper class which handles the SPI peripheral
+ * @param cs_pin the chip select pin
+ * @param int1_pin the interrupt 1 pin
+ * @param int2_pin the interrupt 2 pin
+ * @param spi_type the SPI type (4-Wires or 3-Wires)
+ */
+LIS2DW12Sensor::LIS2DW12Sensor(SPI *spi, PinName cs_pin, PinName int1_pin, PinName int2_pin, SPI_type_t spi_type ) :
+ _dev_spi(spi), _cs_pin(cs_pin), _int1_irq(int1_pin), _int2_irq(int2_pin), _spi_type(spi_type)
+{
+ assert (spi);
+ if (cs_pin == NC)
+ {
+ printf ("ERROR LPS22HBSensor CS MUST NOT BE NC\n\r");
+ _dev_spi = NULL;
+ _dev_i2c = NULL;
+ return;
+ }
+ _reg_ctx.write_reg = LIS2DW12_io_write;
+ _reg_ctx.read_reg = LIS2DW12_io_read;
+ _reg_ctx.handle = (void *)this;
+ _cs_pin = 1;
+ _dev_i2c = NULL;
+ _address = 0;
+
+ if (_spi_type == SPI3W)
+ {
+ /* Enable SPI 3-Wires on the component */
+ uint8_t data = 0x05;
+ lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL2, &data, 1);
+ }
+
+ /* Disable I2C on the component */
+ lis2dw12_i2c_interface_set(&_reg_ctx, LIS2DW12_I2C_DISABLE);
+}
+
+/**
+ * @brief Initializing the component.
+ * @param[in] init pointer to device specific initalization structure.
+ * @retval "0" in case of success, an error code otherwise.
+ */
+int LIS2DW12Sensor::init(void *init)
+{
+ /* Enable register address automatically incremented during a multiple byte
+ access with a serial interface. */
+ if (lis2dw12_auto_increment_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
+ {
+ return 1;
+ }
+
+ /* Enable BDU */
+ if (lis2dw12_block_data_update_set(&_reg_ctx, PROPERTY_ENABLE) != 0)
+ {
+ return 1;
+ }
+
+ /* FIFO mode selection */
+ if (lis2dw12_fifo_mode_set(&_reg_ctx, LIS2DW12_BYPASS_MODE) != 0)
+ {
+ return 1;
+ }
+
+ /* Power mode selection */
+ if (lis2dw12_power_mode_set(&_reg_ctx, LIS2DW12_HIGH_PERFORMANCE) != 0)
+ {
+ return 1;
+ }
+
+ /* Output data rate selection - power down. */
+ if (lis2dw12_data_rate_set(&_reg_ctx, LIS2DW12_XL_ODR_OFF) != 0)
+ {
+ return 1;
+ }
+
+ /* Full scale selection. */
+ if (lis2dw12_full_scale_set(&_reg_ctx, LIS2DW12_2g) != 0)
+ {
+ return 1;
+ }
+
+ /* Select default output data rate. */
+ _x_last_odr = 100.0f;
+
+ _x_last_operating_mode = LIS2DW12_HIGH_PERFORMANCE_MODE;
+
+ _x_last_noise = LIS2DW12_LOW_NOISE_DISABLE;
+
+ _x_is_enabled = 0;
+
+ return 0;
+}
+
+/**
+ * @brief Enable LIS2DW12 Accelerator
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::enable_x(void)
+{
+ /* Check if the component is already enabled */
+ if ( _x_is_enabled == 1 )
+ {
+ return 0;
+ }
+
+ /* Output data rate selection. */
+ if ( set_x_odr_when_enabled( _x_last_odr, _x_last_operating_mode, _x_last_noise ) == 1 )
+ {
+ return 1;
+ }
+
+ _x_is_enabled = 1;
+
+ return 0;
+}
+
+/**
+ * @brief Disable LIS2DW12 Accelerator
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::disable_x(void)
+{
+ /* Check if the component is already disabled */
+ if ( _x_is_enabled == 0 )
+ {
+ return 0;
+ }
+
+ /* Output data rate selection - power down. */
+ if (lis2dw12_data_rate_set(&_reg_ctx, LIS2DW12_XL_ODR_OFF) != 0)
+ {
+ return 1;
+ }
+
+ _x_is_enabled = 0;
+
+ return 0;
+}
+
+/**
+ * @brief Read ID of LIS2DW12 Accelerometer and Gyroscope
+ * @param p_id the pointer where the ID of the device is stored
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::read_id(uint8_t *id)
+{
+ if(!id)
+ {
+ return 1;
+ }
+
+ /* Read WHO AM I register */
+ if (lis2dw12_device_id_get(&_reg_ctx, id) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Read data from LIS2DW12 Accelerometer
+ * @param acceleration the pointer where the accelerometer data are stored
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_x_axes(int32_t *acceleration)
+{
+ int16_t data_raw[3];
+ float sensitivity = 0;
+
+ /* Read raw data from LIS2DW12 output register. */
+ if ( get_x_axes_raw( data_raw ) == 1 )
+ {
+ return 1;
+ }
+
+ /* Get LIS2DW12 actual sensitivity. */
+ if ( get_x_sensitivity( &sensitivity ) == 1 )
+ {
+ return 1;
+ }
+
+ /* Calculate the data. */
+ acceleration[0] = ( int32_t )( data_raw[0] * sensitivity );
+ acceleration[1] = ( int32_t )( data_raw[1] * sensitivity );
+ acceleration[2] = ( int32_t )( data_raw[2] * sensitivity );
+
+ return 0;
+}
+
+/**
+ * @brief Read Accelerometer Sensitivity
+ * @param sensitivity the pointer where the accelerometer sensitivity is stored
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_x_sensitivity(float *sensitivity)
+{
+ int32_t ret = 0;
+ lis2dw12_fs_t full_scale;
+ lis2dw12_mode_t mode;
+
+ /* Read actual full scale selection from sensor. */
+ if (lis2dw12_full_scale_get(&_reg_ctx, &full_scale) != 0)
+ {
+ return 1;
+ }
+
+ /* Read actual power mode selection from sensor. */
+ if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0)
+ {
+ return 1;
+ }
+
+ switch(mode)
+ {
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ switch (full_scale)
+ {
+ case LIS2DW12_2g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_LOPOW1_MODE;
+ break;
+
+ case LIS2DW12_4g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_LOPOW1_MODE;
+ break;
+
+ case LIS2DW12_8g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_LOPOW1_MODE;
+ break;
+
+ case LIS2DW12_16g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_LOPOW1_MODE;
+ break;
+
+ default:
+ *sensitivity = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ switch (full_scale)
+ {
+ case LIS2DW12_2g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_OTHER_MODES;
+ break;
+
+ case LIS2DW12_4g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_OTHER_MODES;
+ break;
+
+ case LIS2DW12_8g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_OTHER_MODES;
+ break;
+
+ case LIS2DW12_16g:
+ *sensitivity = LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_OTHER_MODES;
+ break;
+
+ default:
+ *sensitivity = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ default:
+ *sensitivity = -1.0f;
+ ret = 1;
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Read raw data from LIS2DW12 Accelerometer
+ * @param value the pointer where the accelerometer raw data are stored
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_x_axes_raw(int16_t *value)
+{
+ axis3bit16_t data_raw;
+ lis2dw12_mode_t mode;
+ int32_t ret = 0;
+
+ /* Read actual power mode selection from sensor. */
+ if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0)
+ {
+ return 1;
+ }
+
+ /* Read raw data values. */
+ if (lis2dw12_acceleration_raw_get(&_reg_ctx, data_raw.u8bit) != 0)
+ {
+ return 1;
+ }
+
+ switch(mode)
+ {
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ /* Data format 12 bits. */
+ value[0] = (data_raw.i16bit[0] / 16);
+ value[1] = (data_raw.i16bit[1] / 16);
+ value[2] = (data_raw.i16bit[2] / 16);
+ break;
+
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ /* Data format 14 bits. */
+ value[0] = (data_raw.i16bit[0] / 4);
+ value[1] = (data_raw.i16bit[1] / 4);
+ value[2] = (data_raw.i16bit[2] / 4);
+ break;
+
+ default:
+ ret = 1;
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Read LIS2DW12 Accelerometer output data rate
+ * @param odr the pointer to the output data rate
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_x_odr(float* odr)
+{
+ int32_t ret = 0;
+ lis2dw12_odr_t odr_low_level;
+ lis2dw12_mode_t mode;
+
+ /* Get current output data rate. */
+ if (lis2dw12_data_rate_get(&_reg_ctx, &odr_low_level) != 0)
+ {
+ return 1;
+ }
+
+ /* Read actual power mode selection from sensor. */
+ if (lis2dw12_power_mode_get(&_reg_ctx, &mode) != 0)
+ {
+ return 1;
+ }
+
+ switch (odr_low_level)
+ {
+ case LIS2DW12_XL_ODR_OFF:
+ case LIS2DW12_XL_SET_SW_TRIG:
+ case LIS2DW12_XL_SET_PIN_TRIG:
+ *odr = 0.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_1Hz6_LP_ONLY:
+ switch (mode)
+ {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 12.5f;
+ break;
+
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 1.6f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ case LIS2DW12_XL_ODR_12Hz5:
+ *odr = 12.5f;
+ break;
+
+ case LIS2DW12_XL_ODR_25Hz:
+ *odr = 25.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_50Hz:
+ *odr = 50.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_100Hz:
+ *odr = 100.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_200Hz:
+ *odr = 200.0f;
+ break;
+
+ case LIS2DW12_XL_ODR_400Hz:
+ switch (mode)
+ {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 400.0f;
+ break;
+
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 200.0f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ case LIS2DW12_XL_ODR_800Hz:
+ switch (mode)
+ {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 800.0f;
+ break;
+
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 200.0f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ case LIS2DW12_XL_ODR_1k6Hz:
+ switch (mode)
+ {
+ case LIS2DW12_HIGH_PERFORMANCE:
+ case LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE:
+ *odr = 1600.0f;
+ break;
+
+ case LIS2DW12_CONT_LOW_PWR_4:
+ case LIS2DW12_CONT_LOW_PWR_3:
+ case LIS2DW12_CONT_LOW_PWR_2:
+ case LIS2DW12_CONT_LOW_PWR_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_4:
+ case LIS2DW12_SINGLE_LOW_PWR_3:
+ case LIS2DW12_SINGLE_LOW_PWR_2:
+ case LIS2DW12_SINGLE_LOW_PWR_12bit:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3:
+ case LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2:
+ case LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit:
+ *odr = 200.0f;
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+ break;
+
+ default:
+ *odr = -1.0f;
+ ret = 1;
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Set LIS2DW12 Accelerometer output data rate
+ * @param odr the output data rate to be set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_x_odr(float odr)
+{
+ return set_x_odr_with_mode(odr, LIS2DW12_HIGH_PERFORMANCE_MODE, LIS2DW12_LOW_NOISE_DISABLE);
+}
+
+/**
+ * @brief Set LIS2DW12 Accelerometer output data rate
+ * @param odr the output data rate to be set
+ * @param mode the operating mode to be used
+ * @param noise the low noise option
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_x_odr_with_mode(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise)
+{
+ if(_x_is_enabled == 1)
+ {
+ if(set_x_odr_when_enabled(odr, mode, noise) != 0)
+ {
+ return 1;
+ }
+ }
+ else
+ {
+ if(set_x_odr_when_disabled(odr, mode, noise) != 0)
+ {
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Set LIS2DW12 Accelerometer output data rate when enabled
+ * @param odr the output data rate to be set
+ * @param mode the operating mode to be used
+ * @param noise the low noise option
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_x_odr_when_enabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise)
+{
+ lis2dw12_odr_t new_odr;
+ lis2dw12_mode_t new_power_mode;
+
+ switch (mode)
+ {
+ case LIS2DW12_HIGH_PERFORMANCE_MODE:
+ default:
+ switch (noise)
+ {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_HIGH_PERFORMANCE;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE;
+ break;
+ }
+
+ /* If High Performance mode minimum ODR is 12.5Hz */
+ if(odr < 12.5f)
+ {
+ odr = 12.5f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE4:
+ switch (noise)
+ {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_4;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4;
+ break;
+ }
+
+ /* If Low Power mode maximum ODR is 200Hz */
+ if(odr > 200.0f)
+ {
+ odr = 200.0f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE3:
+ switch (noise)
+ {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_3;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3;
+ break;
+ }
+
+ /* If Low Power mode maximum ODR is 200Hz */
+ if(odr > 200.0f)
+ {
+ odr = 200.0f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE2:
+ switch (noise)
+ {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_2;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2;
+ break;
+ }
+
+ /* If Low Power mode maximum ODR is 200Hz */
+ if(odr > 200.0f)
+ {
+ odr = 200.0f;
+ }
+ break;
+ case LIS2DW12_LOW_POWER_MODE1:
+ switch (noise)
+ {
+ case LIS2DW12_LOW_NOISE_DISABLE:
+ default:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_12bit;
+ break;
+ case LIS2DW12_LOW_NOISE_ENABLE:
+ new_power_mode = LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit;
+ break;
+ }
+
+ /* If Low Power mode maximum ODR is 200Hz */
+ if(odr > 200.0f)
+ {
+ odr = 200.0f;
+ }
+ break;
+ }
+
+
+ new_odr = (odr <= 1.6f) ? LIS2DW12_XL_ODR_1Hz6_LP_ONLY
+ : (odr <= 12.5f) ? LIS2DW12_XL_ODR_12Hz5
+ : (odr <= 25.0f) ? LIS2DW12_XL_ODR_25Hz
+ : (odr <= 50.0f) ? LIS2DW12_XL_ODR_50Hz
+ : (odr <= 100.0f) ? LIS2DW12_XL_ODR_100Hz
+ : (odr <= 200.0f) ? LIS2DW12_XL_ODR_200Hz
+ : (odr <= 400.0f) ? LIS2DW12_XL_ODR_400Hz
+ : (odr <= 800.0f) ? LIS2DW12_XL_ODR_800Hz
+ : LIS2DW12_XL_ODR_1k6Hz;
+
+ /* Output data rate selection. */
+ if (lis2dw12_data_rate_set(&_reg_ctx, new_odr) != 0)
+ {
+ return 1;
+ }
+
+ /* Power mode selection. */
+ if (lis2dw12_power_mode_set(&_reg_ctx, new_power_mode) != 0)
+ {
+ return 1;
+ }
+
+ /* Store actual output data rate, operating mode and low noise. */
+ _x_last_odr = odr;
+ _x_last_operating_mode = mode;
+ _x_last_noise = noise;
+
+ return 0;
+}
+
+/**
+ * @brief Set LIS2DW12 Accelerometer output data rate when disabled
+ * @param odr the output data rate to be set
+ * @param mode the operating mode to be used
+ * @param noise the low noise option
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_x_odr_when_disabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise)
+{
+ _x_last_operating_mode = mode;
+ _x_last_noise = noise;
+
+ _x_last_odr = (odr <= 1.6f) ? 1.6f
+ : (odr <= 12.5f) ? 12.5f
+ : (odr <= 25.0f) ? 25.0f
+ : (odr <= 50.0f) ? 50.0f
+ : (odr <= 100.0f) ? 100.0f
+ : (odr <= 200.0f) ? 200.0f
+ : (odr <= 400.0f) ? 400.0f
+ : (odr <= 800.0f) ? 800.0f
+ : 1600.0f;
+
+ return 0;
+}
+
+/**
+ * @brief Read LIS2DW12 Accelerometer full scale
+ * @param full_scale the pointer to the full scale
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_x_fs(float* full_scale)
+{
+ int32_t ret = 0;
+ lis2dw12_fs_t fs_low_level;
+
+ /* Read actual full scale selection from sensor. */
+ if (lis2dw12_full_scale_get(&_reg_ctx, &fs_low_level) != 0)
+ {
+ return 1;
+ }
+
+ switch (fs_low_level)
+ {
+ case LIS2DW12_2g:
+ *full_scale = 2;
+ break;
+
+ case LIS2DW12_4g:
+ *full_scale = 4;
+ break;
+
+ case LIS2DW12_8g:
+ *full_scale = 8;
+ break;
+
+ case LIS2DW12_16g:
+ *full_scale = 16;
+ break;
+
+ default:
+ *full_scale = -1;
+ ret = 1;
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Set LIS2DW12 Accelerometer full scale
+ * @param full_scale the full scale to be set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_x_fs(float full_scale)
+{
+ lis2dw12_fs_t new_fs;
+
+ /* Seems like MISRA C-2012 rule 14.3a violation but only from single file statical analysis point of view because
+ the parameter passed to the function is not known at the moment of analysis */
+ new_fs = (full_scale <= 2) ? LIS2DW12_2g
+ : (full_scale <= 4) ? LIS2DW12_4g
+ : (full_scale <= 8) ? LIS2DW12_8g
+ : LIS2DW12_16g;
+
+ if (lis2dw12_full_scale_set(&_reg_ctx, new_fs) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Enable the wake up detection for LIS2DW12 accelerometer sensor
+ * @note This function sets the LIS2DW12 accelerometer ODR to 200Hz and the LIS2DW12 accelerometer full scale to 2g
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::enable_wake_up_detection(void)
+{
+ int32_t ret = 0;
+ lis2dw12_ctrl4_int1_pad_ctrl_t val;
+
+ /* Output Data Rate selection */
+ if (set_x_odr(200.0f) != 0)
+ {
+ return 1;
+ }
+
+ /* Full scale selection */
+ if (set_x_fs(2) != 0)
+ {
+ return 1;
+ }
+
+ /* WAKE_DUR setting */
+ if (lis2dw12_wkup_dur_set(&_reg_ctx, 0x00) != 0)
+ {
+ return 1;
+ }
+
+ /* Set wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x02) != 0)
+ {
+ return 1;
+ }
+
+ if (lis2dw12_pin_int1_route_get(&_reg_ctx, &val) != 0)
+ {
+ return 1;
+ }
+
+ val.int1_wu = PROPERTY_ENABLE;
+
+ if (lis2dw12_pin_int1_route_set(&_reg_ctx, &val) != 0)
+ {
+ return 1;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Disable the wake up detection for LIS2DW12 accelerometer sensor
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::disable_wake_up_detection(void)
+{
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+
+ /* Disable wake up event on INT1 pin. */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ ctrl4_int1_reg.int1_wu = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ /* Read INT2 Sleep Change */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ /*Disable Interrupts bit if none event is still enabled */
+ if(ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0)
+ {
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
+ {
+ return 1;
+ }
+
+ ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Reset wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x00) != 0)
+ {
+ return 1;
+ }
+
+ /* WAKE_DUR setting */
+ if (lis2dw12_wkup_dur_set(&_reg_ctx, 0x00) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Set the wake up threshold for LIS2DW12 accelerometer sensor
+ * @param thr the threshold to be set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_wake_up_threshold(uint8_t thr)
+{
+ /* Set wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, thr) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Set the wake up duration for LIS2DW12 accelerometer sensor
+ * @param dur the duration to be set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_wake_up_duration(uint8_t dur)
+{
+ /* Set wake up duration. */
+ if (lis2dw12_wkup_dur_set(&_reg_ctx, dur) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Enable the inactivity detection for LIS2DW12 accelerometer sensor
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::enable_inactivity_detection(void)
+{
+ int32_t ret = 0;
+ lis2dw12_ctrl5_int2_pad_ctrl_t val;
+
+ /* Output Data Rate and Full scale must be selected externally */
+
+ /* SLEEP_DUR setting */
+ if (lis2dw12_act_sleep_dur_set(&_reg_ctx, 0x01) != 0)
+ {
+ return 1;
+ }
+
+ /* Set wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x02) != 0)
+ {
+ return 1;
+ }
+
+ /* Enable inactivity detection. */
+ if (lis2dw12_act_mode_set(&_reg_ctx, LIS2DW12_DETECT_ACT_INACT) != 0)
+ {
+ return 1;
+ }
+
+ if (lis2dw12_pin_int2_route_get(&_reg_ctx, &val) != 0)
+ {
+ return 1;
+ }
+
+ val.int2_sleep_chg = PROPERTY_ENABLE;
+
+ if (lis2dw12_pin_int2_route_set(&_reg_ctx, &val) != 0)
+ {
+ return 1;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Disable the inactivity detection for LIS2DW12 accelerometer sensor
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::disable_inactivity_detection(void)
+{
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+
+ /* Disable inactivity event on INT2 pin */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ ctrl5_int2_reg.int2_sleep_chg = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ /* Read INT1 Wake Up event and INT1 6D Orientation event */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ /*Disable Interrupts bit if none event is still enabled */
+ if(ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0)
+ {
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
+ {
+ return 1;
+ }
+
+ ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Disable inactivity detection. */
+ if (lis2dw12_act_mode_set(&_reg_ctx, LIS2DW12_NO_DETECTION) != 0)
+ {
+ return 1;
+ }
+
+ /* Reset wake up threshold. */
+ if (lis2dw12_wkup_threshold_set(&_reg_ctx, 0x00) != 0)
+ {
+ return 1;
+ }
+
+ /* SLEEP_DUR setting */
+ if (lis2dw12_act_sleep_dur_set(&_reg_ctx, 0x00) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Set the sleep duration for LIS2DW12 accelerometer sensor
+ * @param dur the duration to be set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_sleep_duration(uint8_t dur)
+{
+ /* Set sleep duration. */
+ if (lis2dw12_act_sleep_dur_set(&_reg_ctx, dur) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Enable the 6D orientation detection for LIS2DW12 accelerometer sensor
+ * @note This function sets the LIS2DW12 accelerometer ODR to 200Hz and the LIS2DW12 accelerometer full scale to 2g
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::enable_6d_orientation(void)
+{
+ int32_t ret = 0;
+ lis2dw12_ctrl4_int1_pad_ctrl_t val;
+
+ /* Output Data Rate selection */
+ if(set_x_odr(200.0f) == 1)
+ {
+ return 1;
+ }
+
+ /* Full scale selection. */
+ if(set_x_fs(2.0f) == 1)
+ {
+ return 1;
+ }
+
+ /* 6D orientation threshold. */
+ if (lis2dw12_6d_threshold_set(&_reg_ctx, 2) != 0) /* 60 degrees */
+ {
+ return 1;
+ }
+
+ /* Enable 6D orientation event on INT1 pin */
+ if (lis2dw12_pin_int1_route_get(&_reg_ctx, &val) != 0)
+ {
+ return 1;
+ }
+
+ val.int1_6d = PROPERTY_ENABLE;
+
+ if (lis2dw12_pin_int1_route_set(&_reg_ctx, &val) != 0)
+ {
+ return 1;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Disable the 6D orientation detection for LIS2DW12 accelerometer sensor
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::disable_6d_orientation(void)
+{
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+
+ /* Disable 6D orientation event on INT1 pin */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ ctrl4_int1_reg.int1_6d = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ /* Read INT2 Sleep Change */
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ /*Disable Interrupts bit if none event is still enabled */
+ if(ctrl5_int2_reg.int2_sleep_chg == 0 && ctrl4_int1_reg.int1_wu == 0 && ctrl4_int1_reg.int1_6d == 0)
+ {
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
+ {
+ return 1;
+ }
+
+ ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+
+ if (lis2dw12_write_reg(&_reg_ctx, LIS2DW12_CTRL_REG7, (uint8_t *)&ctrl_reg7, 1) != 0)
+ {
+ return 1;
+ }
+ }
+
+ /* Reset 6D orientation threshold. */
+ if (lis2dw12_6d_threshold_set(&_reg_ctx, 0) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Set the 6D orientation threshold for LIS2DW12 accelerometer sensor
+ * @param thr the threshold to be set
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_6d_orientation_threshold(uint8_t thr)
+{
+ if(thr > 3)
+ {
+ return 1;
+ }
+
+ if (lis2dw12_6d_threshold_set(&_reg_ctx, thr) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Get the 6D orientation XL axis for LIS2DW12 accelerometer sensor
+ * @param xl the pointer to the 6D orientation XL axis
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_6d_orientation_xl(uint8_t *xl)
+{
+ lis2dw12_sixd_src_t data;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
+ {
+ return 1;
+ }
+
+ *xl = data.xl;
+
+ return 0;
+}
+
+/**
+ * @brief Get the 6D orientation XH axis for LIS2DW12 accelerometer sensor
+ * @param xh the pointer to the 6D orientation XH axis
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_6d_orientation_xh(uint8_t *xh)
+{
+ lis2dw12_sixd_src_t data;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
+ {
+ return 1;
+ }
+
+ *xh = data.xh;
+
+ return 0;
+}
+
+/**
+ * @brief Get the 6D orientation YL axis for LIS2DW12 accelerometer sensor
+ * @param yl the pointer to the 6D orientation YL axis
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_6d_orientation_yl(uint8_t *yl)
+{
+ lis2dw12_sixd_src_t data;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
+ {
+ return 1;
+ }
+
+ *yl = data.yl;
+
+ return 0;
+}
+
+/**
+ * @brief Get the 6D orientation YH axis for LIS2DW12 accelerometer sensor
+ * @param yh the pointer to the 6D orientation YH axis
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_6d_orientation_yh(uint8_t *yh)
+{
+ lis2dw12_sixd_src_t data;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
+ {
+ return 1;
+ }
+
+ *yh = data.yh;
+
+ return 0;
+}
+
+/**
+ * @brief Get the 6D orientation ZL axis for LIS2DW12 accelerometer sensor
+ * @param zl the pointer to the 6D orientation ZL axis
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_6d_orientation_zl(uint8_t *zl)
+{
+ lis2dw12_sixd_src_t data;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
+ {
+ return 1;
+ }
+
+ *zl = data.zl;
+
+ return 0;
+}
+
+/**
+ * @brief Get the 6D orientation ZH axis for LIS2DW12 accelerometer sensor
+ * @param zh the pointer to the 6D orientation ZH axis
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_6d_orientation_zh(uint8_t *zh)
+{
+ lis2dw12_sixd_src_t data;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_SIXD_SRC, (uint8_t *)&data, 1) != 0)
+ {
+ return 1;
+ }
+
+ *zh = data.zh;
+
+ return 0;
+}
+
+/**
+ * @brief Get the status of all hardware events for LIS2DW12 accelerometer sensor
+ * @param status the pointer to the status of all hardware events
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_event_status(LIS2DW12_Event_Status_t *status)
+{
+ lis2dw12_status_t status_reg;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_reg;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_reg;
+
+ (void)memset((void *)status, 0x0, sizeof(LIS2DW12_Event_Status_t));
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_STATUS, (uint8_t *)&status_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL, (uint8_t *)&ctrl4_int1_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL, (uint8_t *)&ctrl5_int2_reg, 1) != 0)
+ {
+ return 1;
+ }
+
+ if (ctrl4_int1_reg.int1_wu == 1U)
+ {
+ if (status_reg.wu_ia == 1U)
+ {
+ status->WakeUpStatus = 1;
+ }
+ }
+
+ if (ctrl4_int1_reg.int1_6d == 1U)
+ {
+ if (status_reg._6d_ia == 1U)
+ {
+ status->D6DOrientationStatus = 1;
+ }
+ }
+
+ if (ctrl5_int2_reg.int2_sleep_chg == 1U)
+ {
+ if (status_reg.sleep_state == 1U)
+ {
+ status->SleepStatus = 1;
+ }
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Get the number of samples contained into the FIFO
+ * @param num_samples the number of samples contained into the FIFO
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::get_fifo_num_samples(uint16_t *num_samples)
+{
+ lis2dw12_fifo_samples_t fifo_samples;
+
+ if (lis2dw12_read_reg(&_reg_ctx, LIS2DW12_FIFO_SAMPLES, (uint8_t *)&fifo_samples, 1) != 0)
+ {
+ return 1;
+ }
+
+ if(fifo_samples.diff == 0x20)
+ {
+ *num_samples = 32;
+ }
+ else
+ {
+ *num_samples = fifo_samples.diff;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Set the FIFO mode
+ * @param mode FIFO mode
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::set_fifo_mode(uint8_t mode)
+{
+ int32_t ret = 0;
+
+ /* Verify that the passed parameter contains one of the valid values. */
+ switch ((lis2dw12_fmode_t)mode)
+ {
+ case LIS2DW12_BYPASS_MODE:
+ case LIS2DW12_FIFO_MODE:
+ case LIS2DW12_STREAM_TO_FIFO_MODE:
+ case LIS2DW12_BYPASS_TO_STREAM_MODE:
+ case LIS2DW12_STREAM_MODE:
+ break;
+
+ default:
+ ret = 1;
+ break;
+ }
+
+ if (ret == 1)
+ {
+ return ret;
+ }
+
+ if (lis2dw12_fifo_mode_set(&_reg_ctx, (lis2dw12_fmode_t)mode) != 0)
+ {
+ return 1;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Read the data from register
+ * @param reg register address
+ * @param data register data
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::read_reg(uint8_t reg, uint8_t *data)
+{
+
+ if (lis2dw12_read_reg(&_reg_ctx, reg, data, 1) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief Write the data to register
+ * @param reg register address
+ * @param data register data
+ * @retval 0 in case of success, an error code otherwise
+ */
+int LIS2DW12Sensor::write_reg(uint8_t reg, uint8_t data)
+{
+
+ if (lis2dw12_write_reg(&_reg_ctx, reg, &data, 1) != 0)
+ {
+ return 1;
+ }
+
+ return 0;
+}
+
+
+int32_t LIS2DW12_io_write(void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite)
+{
+ return ((LIS2DW12Sensor *)handle)->io_write(pBuffer, WriteAddr, nBytesToWrite);
+}
+
+int32_t LIS2DW12_io_read(void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead)
+{
+ return ((LIS2DW12Sensor *)handle)->io_read(pBuffer, ReadAddr, nBytesToRead);
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/LIS2DW12Sensor.h Mon Nov 19 13:20:07 2018 +0000
@@ -0,0 +1,282 @@
+/**
+ ******************************************************************************
+ * @file LIS2DW12Sensor.h
+ * @author CLab
+ * @version V1.0.0
+ * @date 15 November 2018
+ * @brief Abstract Class of an LIS2DW12 Inertial Measurement Unit (IMU) 3 axes
+ * sensor.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+
+/* Prevent recursive inclusion -----------------------------------------------*/
+
+#ifndef __LIS2DW12Sensor_H__
+#define __LIS2DW12Sensor_H__
+
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "DevI2C.h"
+#include "lis2dw12_reg.h"
+#include "MotionSensor.h"
+#include <assert.h>
+
+/* Defines -------------------------------------------------------------------*/
+
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_LOPOW1_MODE 0.976f /**< Sensitivity value for 2g full scale, Low-power1 mode [mg/LSB] */
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_2G_OTHER_MODES 0.244f /**< Sensitivity value for 2g full scale, all other modes except Low-power1 [mg/LSB] */
+
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_LOPOW1_MODE 1.952f /**< Sensitivity value for 4g full scale, Low-power1 mode [mg/LSB] */
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_4G_OTHER_MODES 0.488f /**< Sensitivity value for 4g full scale, all other modes except Low-power1 [mg/LSB] */
+
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_LOPOW1_MODE 3.904f /**< Sensitivity value for 8g full scale, Low-power1 mode [mg/LSB] */
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_8G_OTHER_MODES 0.976f /**< Sensitivity value for 8g full scale, all other modes except Low-power1 [mg/LSB] */
+
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_LOPOW1_MODE 7.808f /**< Sensitivity value for 16g full scale, Low-power1 mode [mg/LSB] */
+#define LIS2DW12_ACC_SENSITIVITY_FOR_FS_16G_OTHER_MODES 1.952f /**< Sensitivity value for 16g full scale, all other modes except Low-power1 [mg/LSB] */
+
+/* Typedefs ------------------------------------------------------------------*/
+
+typedef struct
+{
+ unsigned int WakeUpStatus : 1;
+ unsigned int D6DOrientationStatus : 1;
+ unsigned int SleepStatus : 1;
+} LIS2DW12_Event_Status_t;
+
+typedef enum
+{
+ LIS2DW12_HIGH_PERFORMANCE_MODE,
+ LIS2DW12_LOW_POWER_MODE4,
+ LIS2DW12_LOW_POWER_MODE3,
+ LIS2DW12_LOW_POWER_MODE2,
+ LIS2DW12_LOW_POWER_MODE1
+} LIS2DW12_Operating_Mode_t;
+
+typedef enum
+{
+ LIS2DW12_LOW_NOISE_DISABLE,
+ LIS2DW12_LOW_NOISE_ENABLE
+} LIS2DW12_Low_Noise_t;
+
+/* Class Declaration ---------------------------------------------------------*/
+
+/**
+ * Abstract class of an LIS2DW12 Inertial Measurement Unit (IMU) 3 axes
+ * sensor.
+ */
+class LIS2DW12Sensor : public MotionSensor
+{
+ public:
+ enum SPI_type_t {SPI3W, SPI4W};
+ LIS2DW12Sensor(DevI2C *i2c, uint8_t address=LIS2DW12_I2C_ADD_H, PinName int1_pin=NC, PinName int2_pin=NC);
+ LIS2DW12Sensor(SPI *spi, PinName cs_pin, PinName int1_pin=NC, PinName int2_pin=NC, SPI_type_t spi_type=SPI4W);
+ virtual int init(void *init);
+ virtual int read_id(uint8_t *id);
+ virtual int get_x_axes(int32_t *pData);
+ virtual int get_x_sensitivity(float *pfData);
+ virtual int get_x_axes_raw(int16_t *pData);
+ virtual int get_x_odr(float *odr);
+ virtual int set_x_odr(float odr);
+ virtual int get_x_fs(float *fullScale);
+ virtual int set_x_fs(float fullScale);
+ int set_x_odr_with_mode(float odr, LIS2DW12_Operating_Mode_t mode=LIS2DW12_HIGH_PERFORMANCE_MODE, LIS2DW12_Low_Noise_t noise=LIS2DW12_LOW_NOISE_DISABLE);
+ int enable_x(void);
+ int disable_x(void);
+ int enable_wake_up_detection(void);
+ int disable_wake_up_detection(void);
+ int set_wake_up_threshold(uint8_t thr);
+ int set_wake_up_duration(uint8_t dur);
+ int enable_inactivity_detection(void);
+ int disable_inactivity_detection(void);
+ int set_sleep_duration(uint8_t dur);
+ int enable_6d_orientation(void);
+ int disable_6d_orientation(void);
+ int set_6d_orientation_threshold(uint8_t thr);
+ int get_6d_orientation_xl(uint8_t *xl);
+ int get_6d_orientation_xh(uint8_t *xh);
+ int get_6d_orientation_yl(uint8_t *yl);
+ int get_6d_orientation_yh(uint8_t *yh);
+ int get_6d_orientation_zl(uint8_t *zl);
+ int get_6d_orientation_zh(uint8_t *zh);
+ int get_event_status(LIS2DW12_Event_Status_t *status);
+ int get_fifo_num_samples(uint16_t *num_samples);
+ int set_fifo_mode(uint8_t mode);
+ int read_reg(uint8_t reg, uint8_t *data);
+ int write_reg(uint8_t reg, uint8_t data);
+
+ /**
+ * @brief Attaching an interrupt handler to the INT1 interrupt.
+ * @param fptr An interrupt handler.
+ * @retval None.
+ */
+ void attach_int1_irq(void (*fptr)(void))
+ {
+ _int1_irq.rise(fptr);
+ }
+
+ /**
+ * @brief Enabling the INT1 interrupt handling.
+ * @param None.
+ * @retval None.
+ */
+ void enable_int1_irq(void)
+ {
+ _int1_irq.enable_irq();
+ }
+
+ /**
+ * @brief Disabling the INT1 interrupt handling.
+ * @param None.
+ * @retval None.
+ */
+ void disable_int1_irq(void)
+ {
+ _int1_irq.disable_irq();
+ }
+
+ /**
+ * @brief Attaching an interrupt handler to the INT2 interrupt.
+ * @param fptr An interrupt handler.
+ * @retval None.
+ */
+ void attach_int2_irq(void (*fptr)(void))
+ {
+ _int2_irq.rise(fptr);
+ }
+
+ /**
+ * @brief Enabling the INT2 interrupt handling.
+ * @param None.
+ * @retval None.
+ */
+ void enable_int2_irq(void)
+ {
+ _int2_irq.enable_irq();
+ }
+
+ /**
+ * @brief Disabling the INT2 interrupt handling.
+ * @param None.
+ * @retval None.
+ */
+ void disable_int2_irq(void)
+ {
+ _int2_irq.disable_irq();
+ }
+
+ /**
+ * @brief Utility function to read data.
+ * @param pBuffer: pointer to data to be read.
+ * @param RegisterAddr: specifies internal address register to be read.
+ * @param NumByteToRead: number of bytes to be read.
+ * @retval 0 if ok, an error code otherwise.
+ */
+ uint8_t io_read(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToRead)
+ {
+ if (_dev_spi) {
+ /* Write Reg Address */
+ _dev_spi->lock();
+ _cs_pin = 0;
+ if (_spi_type == SPI4W) {
+ _dev_spi->write(RegisterAddr | 0x80);
+ for (int i=0; i<NumByteToRead; i++) {
+ *(pBuffer+i) = _dev_spi->write(0x00);
+ }
+ } else if (_spi_type == SPI3W){
+ /* Write RD Reg Address with RD bit*/
+ uint8_t TxByte = RegisterAddr | 0x80;
+ _dev_spi->write((char *)&TxByte, 1, (char *)pBuffer, (int) NumByteToRead);
+ }
+ _cs_pin = 1;
+ _dev_spi->unlock();
+ return 0;
+ }
+ if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_read(pBuffer, _address, RegisterAddr, NumByteToRead);
+ return 1;
+ }
+
+ /**
+ * @brief Utility function to write data.
+ * @param pBuffer: pointer to data to be written.
+ * @param RegisterAddr: specifies internal address register to be written.
+ * @param NumByteToWrite: number of bytes to write.
+ * @retval 0 if ok, an error code otherwise.
+ */
+ uint8_t io_write(uint8_t* pBuffer, uint8_t RegisterAddr, uint16_t NumByteToWrite)
+ {
+ if (_dev_spi) {
+ _dev_spi->lock();
+ _cs_pin = 0;
+ _dev_spi->write(RegisterAddr);
+ _dev_spi->write((char *)pBuffer, (int) NumByteToWrite, NULL, 0);
+ _cs_pin = 1;
+ _dev_spi->unlock();
+ return 0;
+ }
+ if (_dev_i2c) return (uint8_t) _dev_i2c->i2c_write(pBuffer, _address, RegisterAddr, NumByteToWrite);
+ return 1;
+ }
+
+ private:
+ int set_x_odr_when_enabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise);
+ int set_x_odr_when_disabled(float odr, LIS2DW12_Operating_Mode_t mode, LIS2DW12_Low_Noise_t noise);
+
+ /* Helper classes. */
+ DevI2C *_dev_i2c;
+ SPI *_dev_spi;
+
+ /* Configuration */
+ uint8_t _address;
+ DigitalOut _cs_pin;
+ InterruptIn _int1_irq;
+ InterruptIn _int2_irq;
+ SPI_type_t _spi_type;
+
+ uint8_t _x_is_enabled;
+ float _x_last_odr;
+ LIS2DW12_Operating_Mode_t _x_last_operating_mode;
+ LIS2DW12_Low_Noise_t _x_last_noise;
+
+ lis2dw12_ctx_t _reg_ctx;
+};
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+int32_t LIS2DW12_io_write( void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite );
+int32_t LIS2DW12_io_read( void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead );
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/ST_INTERFACES.lib Mon Nov 19 13:20:07 2018 +0000 @@ -0,0 +1,1 @@ +https://developer.mbed.org/teams/ST/code/ST_INTERFACES/#d3c9b33b992c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/X_NUCLEO_COMMON.lib Mon Nov 19 13:20:07 2018 +0000 @@ -0,0 +1,1 @@ +https://developer.mbed.org/teams/ST/code/X_NUCLEO_COMMON/#21096473f63e
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/lis2dw12_reg.c Mon Nov 19 13:20:07 2018 +0000
@@ -0,0 +1,2252 @@
+/*
+ ******************************************************************************
+ * @file lis2dw12_reg.c
+ * @author MEMS Software Solution Team
+ * @date 25-January-2018
+ * @brief LIS2DW12 driver file
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include "lis2dw12_reg.h"
+
+/**
+ * @addtogroup lis2dw12
+ * @brief This file provides a set of functions needed to drive the
+ * lis2dw12 enanced inertial module.
+ * @{
+ */
+
+/**
+ * @addtogroup interfaces_functions
+ * @brief This section provide a set of functions used to read and write
+ * a generic register of the device.
+ * @{
+ */
+
+/**
+ * @brief Read generic device register
+ *
+ * @param lis2dw12_ctx_t* ctx: read / write interface definitions
+ * @param uint8_t reg: register to read
+ * @param uint8_t* data: pointer to buffer that store the data read
+ * @param uint16_t len: number of consecutive register to read
+ *
+ */
+int32_t lis2dw12_read_reg(lis2dw12_ctx_t* ctx, uint8_t reg, uint8_t* data,
+ uint16_t len)
+{
+ return ctx->read_reg(ctx->handle, reg, data, len);
+}
+
+/**
+ * @brief Write generic device register
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t reg: register to write
+ * @param uint8_t* data: pointer to data to write in register reg
+ * @param uint16_t len: number of consecutive register to write
+ *
+*/
+int32_t lis2dw12_write_reg(lis2dw12_ctx_t* ctx, uint8_t reg, uint8_t* data,
+ uint16_t len)
+{
+ return ctx->write_reg(ctx->handle, reg, data, len);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup data_generation_c
+ * @brief This section groups all the functions concerning data generation
+ * @{
+ */
+
+/**
+ * @brief power_mode: [set] Select accelerometer operating modes.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_mode_t: change the values of mode / lp_mode in reg CTRL1
+ * and low_noise in reg CTRL6
+ *
+ */
+int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, ®.byte, 1);
+ reg.ctrl1.mode = ( val & 0x0C ) >> 2;
+ reg.ctrl1.lp_mode = val & 0x03 ;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, ®.byte, 1);
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+ reg.ctrl6.low_noise = ( val & 0x10 ) >> 4;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief power_mode: [get] Select accelerometer operating modes.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_mode_t: change the values of mode / lp_mode in reg CTRL1
+ * and low_noise in reg CTRL6
+ *
+ */
+int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, ®[0].byte, 1);
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®[1].byte, 1);
+ *val = (lis2dw12_mode_t) ((reg[1].ctrl6.low_noise << 4) +
+ (reg[0].ctrl1.mode << 2) + reg[0].ctrl1.lp_mode);
+
+ return mm_error;
+}
+
+/**
+ * @brief data_rate: [set] Accelerometer data rate selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_odr_t: change the values of odr in reg CTRL1
+ *
+ */
+int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, ®.byte, 1);
+ reg.ctrl1.odr = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL1, ®.byte, 1);
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ reg.ctrl3.slp_mode = ( val & 0x30 ) >> 4;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief data_rate: [get] Accelerometer data rate selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_odr_t: Get the values of odr in reg CTRL1
+ *
+ */
+int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL1, ®[0].byte, 1);
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®[1].byte, 1);
+ *val = (lis2dw12_odr_t) ((reg[1].ctrl3.slp_mode << 4) + reg[0].ctrl1.odr);
+
+ return mm_error;
+}
+
+/**
+ * @brief block_data_update: [set] Blockdataupdate.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of bdu in reg CTRL2
+ *
+ */
+int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.bdu = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief block_data_update: [get] Blockdataupdate.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of bdu in reg CTRL2
+ *
+ */
+int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = reg.ctrl2.bdu;
+
+ return mm_error;
+}
+
+/**
+ * @brief full_scale: [set] Accelerometer full-scale selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_fs_t: change the values of fs in reg CTRL6
+ *
+ */
+int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+ reg.ctrl6.fs = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief full_scale: [get] Accelerometer full-scale selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_fs_t: Get the values of fs in reg CTRL6
+ *
+ */
+int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+ *val = (lis2dw12_fs_t) reg.ctrl6.fs;
+
+ return mm_error;
+}
+
+/**
+ * @brief status_reg: [get] The STATUS_REG register of the device.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_: union of registers from STATUS to
+ *
+ */
+int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_STATUS, (uint8_t*) val, 1);
+}
+/**
+ * @brief flag_data_ready: [get] Accelerometer new data available.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of drdy in reg STATUS
+ *
+ */
+int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_STATUS, ®.byte, 1);
+ *val = reg.status.drdy;
+
+ return mm_error;
+}
+/**
+ * @brief all_sources: [get] Read all the interrupt/status flag of
+ * the device.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_all_sources: registers STATUS_DUP, WAKE_UP_SRC,
+ * TAP_SRC, SIXD_SRC, ALL_INT_SRC
+ *
+ */
+int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_all_sources_t *val)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_STATUS_DUP, (uint8_t*) val, 5);
+}
+/**
+ * @brief usr_offset_x: [set] Accelerometer X-axis user offset correction
+ * expressed in two’s complement, weight
+ * depends on bit USR_OFF_W. The value must be
+ * in the range [-127 127].
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that contains data to write
+ *
+ */
+int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_write_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
+}
+
+/**
+ * @brief usr_offset_x: [get] Accelerometer X-axis user offset
+ * correction expressed in two’s complement,
+ * weight depends on bit USR_OFF_W.
+ * The value must be in the range [-127 127].
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that stores data read
+ *
+ */
+int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_X_OFS_USR, buff, 1);
+}
+/**
+ * @brief usr_offset_y: [set] Accelerometer Y-axis user offset
+ * correction expressed in two’s complement,
+ * weight depends on bit USR_OFF_W.
+ * The value must be in the range [-127 127].
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that contains data to write
+ *
+ */
+int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_write_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
+}
+
+/**
+ * @brief usr_offset_y: [get] Accelerometer Y-axis user offset
+ * correction expressed in two’s complement,
+ * weight depends on bit USR_OFF_W.
+ * The value must be in the range [-127 127].
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that stores data read
+ *
+ */
+int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_Y_OFS_USR, buff, 1);
+}
+/**
+ * @brief usr_offset_z: [set] Accelerometer Z-axis user offset
+ * correction expressed in two’s complement,
+ * weight depends on bit USR_OFF_W.
+ * The value must be in the range [-127 127].
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that contains data to write
+ *
+ */
+int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_write_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
+}
+
+/**
+ * @brief usr_offset_z: [get] Accelerometer Z-axis user offset
+ * correction expressed in two’s complement,
+ * weight depends on bit USR_OFF_W.
+ * The value must be in the range [-127 127].
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that stores data read
+ *
+ */
+int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_Z_OFS_USR, buff, 1);
+}
+/**
+ * @brief offset_weight: [set] Weight of XL user offset bits of
+ * registers X_OFS_USR, Y_OFS_USR, Z_OFS_USR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_usr_off_w_t: change the values of usr_off_w in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_w_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.usr_off_w = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief offset_weight: [get] Weight of XL user offset bits of
+ * registers X_OFS_USR, Y_OFS_USR, Z_OFS_USR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_usr_off_w_t: Get the values of usr_off_w in reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_w_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ *val = (lis2dw12_usr_off_w_t) reg.ctrl_reg7.usr_off_w;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup Dataoutput
+ * @brief This section groups all the data output functions.
+ * @{
+ */
+
+/**
+ * @brief temperature_raw: [get] Temperature data output register (r).
+ * L and H registers together express a
+ * 16-bit word in two’s complement.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that stores data read
+ *
+ */
+int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_OUT_T_L, buff, 2);
+}
+
+/**
+ * @brief acceleration_raw: [get] Linear acceleration output register.
+ * The value is expressed as a 16-bit word
+ * in two’s complement.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that stores data read
+ *
+ */
+int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_OUT_X_L, buff, 6);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup common
+ * @brief This section groups common usefull functions.
+ * @{
+ */
+
+/**
+ * @brief device_id: [get] DeviceWhoamI.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t * : buffer that stores data read
+ *
+ */
+int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_WHO_AM_I, buff, 1);
+}
+
+/**
+ * @brief auto_increment: [set] Register address automatically incremented
+ * during multiple byte access with a
+ * serial interface.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of if_add_inc in reg CTRL2
+ *
+ */
+int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.if_add_inc = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief auto_increment: [get] Register address automatically
+ * incremented during multiple byte access
+ * with a serial interface.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of if_add_inc in reg CTRL2
+ *
+ */
+int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = reg.ctrl2.if_add_inc;
+
+ return mm_error;
+}
+
+/**
+ * @brief reset: [set] Software reset. Restore the default values in
+ * user registers.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of soft_reset in reg CTRL2
+ *
+ */
+int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.soft_reset = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief reset: [get] Software reset. Restore the default values in
+ * user registers.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of soft_reset in reg CTRL2
+ *
+ */
+int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = reg.ctrl2.soft_reset;
+
+ return mm_error;
+}
+
+/**
+ * @brief boot: [set] Reboot memory content. Reload the calibration
+ * parameters.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of boot in reg CTRL2
+ *
+ */
+int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.boot = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief boot: [get] Reboot memory content. Reload the calibration
+ * parameters.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of boot in reg CTRL2
+ *
+ */
+int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = reg.ctrl2.boot;
+
+ return mm_error;
+}
+
+/**
+ * @brief self_test: [set] Sensor self-test enable.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_st_t: change the values of st in reg CTRL3
+ *
+ */
+int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ reg.ctrl3.st = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief self_test: [get] Sensor self-test enable.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_st_t: Get the values of st in reg CTRL3
+ *
+ */
+int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ *val = (lis2dw12_st_t) reg.ctrl3.st;
+
+ return mm_error;
+}
+
+/**
+ * @brief data_ready_mode: [set] Data-ready pulsed / letched mode.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_drdy_pulsed_t: change the values of drdy_pulsed in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_drdy_pulsed_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.drdy_pulsed = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief data_ready_mode: [get] Data-ready pulsed / letched mode.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_drdy_pulsed_t: Get the values of drdy_pulsed in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_drdy_pulsed_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ *val = (lis2dw12_drdy_pulsed_t) reg.ctrl_reg7.drdy_pulsed;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup filters
+ * @brief This section group all the functions concerning the filters
+ * configuration.
+ * @{
+ */
+
+/**
+ * @brief filter_path: [set] Accelerometer filtering path for outputs.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_fds_t: change the values of fds in reg CTRL6
+ *
+ */
+int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+ reg.ctrl6.fds = ( val & 0x10 ) >> 4;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.usr_off_on_out = val & 0x01;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief filter_path: [get] Accelerometer filtering path for outputs.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_fds_t: Get the values of fds in reg CTRL6
+ *
+ */
+int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®[0].byte, 1);
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®[1].byte, 1);
+
+ *val = (lis2dw12_fds_t) ((reg[0].ctrl6.fds << 4 ) + reg[1].ctrl_reg7.usr_off_on_out);
+
+ return mm_error;
+}
+
+/**
+ * @brief filter_bandwidth: [set] Accelerometer cutoff filter frequency.
+ * Valid for low and high pass filter.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_bw_filt_t: change the values of bw_filt in reg CTRL6
+ *
+ */
+int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_bw_filt_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+ reg.ctrl6.bw_filt = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief filter_bandwidth: [get] Accelerometer cutoff filter frequency.
+ * Valid for low and high pass filter.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_bw_filt_t: Get the values of bw_filt in reg CTRL6
+ *
+ */
+int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_bw_filt_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL6, ®.byte, 1);
+ *val = (lis2dw12_bw_filt_t) reg.ctrl6.bw_filt;
+
+ return mm_error;
+}
+
+/**
+ * @brief reference_mode: [set] Enable HP filter reference mode.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of hp_ref_mode in reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.hp_ref_mode = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief reference_mode: [get] Enable HP filter reference mode.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of hp_ref_mode in reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ *val = reg.ctrl_reg7.hp_ref_mode;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup main_serial_interface
+ * @brief This section groups all the functions concerning main serial
+ * interface management (not auxiliary)
+ * @{
+ */
+
+/**
+ * @brief spi_mode: [set] SPI Serial Interface Mode selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_sim_t: change the values of sim in reg CTRL2
+ *
+ */
+int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.sim = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief spi_mode: [get] SPI Serial Interface Mode selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_sim_t: Get the values of sim in reg CTRL2
+ *
+ */
+int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = (lis2dw12_sim_t) reg.ctrl2.sim;
+
+ return mm_error;
+}
+
+/**
+ * @brief i2c_interface: [set] Disable / Enable I2C interface.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_i2c_disable_t: change the values of i2c_disable in
+ * reg CTRL2
+ *
+ */
+int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_i2c_disable_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.i2c_disable = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief i2c_interface: [get] Disable / Enable I2C interface.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_i2c_disable_t: Get the values of i2c_disable in reg CTRL2
+ *
+ */
+int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_i2c_disable_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = (lis2dw12_i2c_disable_t) reg.ctrl2.i2c_disable;
+
+ return mm_error;
+}
+
+/**
+ * @brief cs_mode: [set] Disconnect CS pull-up.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_cs_pu_disc_t: change the values of cs_pu_disc in reg CTRL2
+ *
+ */
+int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ reg.ctrl2.cs_pu_disc = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief cs_mode: [get] Disconnect CS pull-up.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_cs_pu_disc_t: Get the values of cs_pu_disc in reg CTRL2
+ *
+ */
+int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL2, ®.byte, 1);
+ *val = (lis2dw12_cs_pu_disc_t) reg.ctrl2.cs_pu_disc;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup interrupt_pins
+ * @brief This section groups all the functions that manage interrup pins
+ * @{
+ */
+
+/**
+ * @brief pin_polarity: [set] Interrupt active-high/low.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_h_lactive_t: change the values of h_lactive in reg CTRL3
+ *
+ */
+int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_h_lactive_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ reg.ctrl3.h_lactive = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief pin_polarity: [get] Interrupt active-high/low.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_h_lactive_t: Get the values of h_lactive in reg CTRL3
+ *
+ */
+int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_h_lactive_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ *val = (lis2dw12_h_lactive_t) reg.ctrl3.h_lactive;
+
+ return mm_error;
+}
+
+/**
+ * @brief int_notification: [set] Latched/pulsed interrupt.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_lir_t: change the values of lir in reg CTRL3
+ *
+ */
+int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_lir_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ reg.ctrl3.lir = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief int_notification: [get] Latched/pulsed interrupt.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_lir_t: Get the values of lir in reg CTRL3
+ *
+ */
+int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_lir_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ *val = (lis2dw12_lir_t) reg.ctrl3.lir;
+
+ return mm_error;
+}
+
+/**
+ * @brief pin_mode: [set] Push-pull/open drain selection on interrupt pads.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_pp_od_t: change the values of pp_od in reg CTRL3
+ *
+ */
+int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ reg.ctrl3.pp_od = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief pin_mode: [get] Push-pull/open drain selection on interrupt pads.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_pp_od_t: Get the values of pp_od in reg CTRL3
+ *
+ */
+int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL3, ®.byte, 1);
+ *val = (lis2dw12_pp_od_t) reg.ctrl3.pp_od;
+
+ return mm_error;
+}
+
+/**
+ * @brief pin_int1_route: [set] Select the signal that need to
+ * route on int1 pad.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_: register CTRL4_INT1_PAD_CTRL.
+ *
+ */
+int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl4_int1_pad_ctrl_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ if (val->int1_tap || val->int1_ff || val->int1_wu || val->int1_single_tap ||
+ val->int1_6d){
+ reg.ctrl_reg7.interrupts_enable = PROPERTY_ENABLE;
+ }
+ else{
+ reg.ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+ }
+
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
+ (uint8_t*) val, 1);
+
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief pin_int1_route: [get] Select the signal that need to route on
+ * int1 pad.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_: register CTRL4_INT1_PAD_CTRL.
+ *
+ */
+int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl4_int1_pad_ctrl_t *val)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_CTRL4_INT1_PAD_CTRL,
+ (uint8_t*) val, 1);
+}
+/**
+ * @brief pin_int2_route: [set] Select the signal that need to route on
+ * int2 pad.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_: register CTRL5_INT2_PAD_CTRL.
+ *
+ */
+int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl5_int2_pad_ctrl_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ if ( val->int2_sleep_state || val->int2_sleep_chg ){
+ reg.ctrl_reg7.interrupts_enable = PROPERTY_ENABLE;
+ }
+ else{
+ reg.ctrl_reg7.interrupts_enable = PROPERTY_DISABLE;
+ }
+
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
+ (uint8_t*) val, 1);
+
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief pin_int2_route: [get] Select the signal that need to route on
+ * int2 pad.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_: register CTRL5_INT2_PAD_CTRL
+ *
+ */
+int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl5_int2_pad_ctrl_t *val)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_CTRL5_INT2_PAD_CTRL,
+ (uint8_t*) val, 1);
+}
+/**
+ * @brief all_on_int1: [set] All interrupt signals become available
+ * on INT1 pin.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of int2_on_int1 in reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.int2_on_int1 = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief all_on_int1: [get] All interrupt signals become available
+ * on INT1 pin.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of int2_on_int1 in reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ *val = reg.ctrl_reg7.int2_on_int1;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup Wake_Up_event
+ * @brief This section groups all the functions that manage the Wake
+ * Up event generation.
+ * @{
+ */
+
+/**
+ * @brief wkup_threshold: [set] Threshold for wakeup.1 LSB = FS_XL / 64.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of wk_ths in reg WAKE_UP_THS
+ *
+ */
+int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, ®.byte, 1);
+ reg.wake_up_ths.wk_ths = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief wkup_threshold: [get] Threshold for wakeup.1 LSB = FS_XL / 64.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of wk_ths in reg WAKE_UP_THS
+ *
+ */
+int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, ®.byte, 1);
+ *val = reg.wake_up_ths.wk_ths;
+
+ return mm_error;
+}
+
+/**
+ * @brief wkup_dur: [set] Wake up duration event.1LSb = 1 / ODR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of wake_dur in reg WAKE_UP_DUR
+ *
+ */
+int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®.byte, 1);
+ reg.wake_up_dur.wake_dur = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief wkup_dur: [get] Wake up duration event.1LSb = 1 / ODR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of wake_dur in reg WAKE_UP_DUR
+ *
+ */
+int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®.byte, 1);
+ *val = reg.wake_up_dur.wake_dur;
+
+ return mm_error;
+}
+
+/**
+ * @brief wkup_feed_data: [set] Data sent to wake-up interrupt function.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_usr_off_on_wu_t: change the values of usr_off_on_wu in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_on_wu_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.usr_off_on_wu = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief wkup_feed_data: [get] Data sent to wake-up interrupt function.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_usr_off_on_wu_t: Get the values of usr_off_on_wu in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_on_wu_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ *val = (lis2dw12_usr_off_on_wu_t) reg.ctrl_reg7.usr_off_on_wu;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup Activity/Inactivity_detection
+ * @brief This section groups all the functions concerning
+ * activity/inactivity detection.
+ * @{
+ */
+
+/**
+ * @brief act_mode: [set] Config activity / inactivity or
+ * stationary / motion detection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_sleep_on_t: change the values of sleep_on / stationary in
+ * reg WAKE_UP_THS / WAKE_UP_DUR
+ *
+ */
+int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, ®[0].byte, 2);
+ reg[0].wake_up_ths.sleep_on = val & 0x01;
+ reg[1].wake_up_dur.stationary = (val & 0x02) >> 1;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, ®[0].byte, 2);
+
+ return mm_error;
+}
+
+/**
+ * @brief act_mode: [get] Config activity / inactivity or
+ * stationary / motion detection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_sleep_on_t: Get the values of sleep_on in reg WAKE_UP_THS
+ *
+ */
+int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, ®[0].byte, 2);
+ *val = (lis2dw12_sleep_on_t) ((reg[1].wake_up_dur.stationary << 1)
+ + reg[0].wake_up_ths.sleep_on);
+
+ return mm_error;
+}
+
+/**
+ * @brief act_sleep_dur: [set] Duration to go in sleep mode.
+ * 1 LSb = 512 / ODR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of sleep_dur in reg WAKE_UP_DUR
+ *
+ */
+int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®.byte, 1);
+ reg.wake_up_dur.sleep_dur = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief act_sleep_dur: [get] Duration to go in sleep mode.
+ * 1 LSb = 512 / ODR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of sleep_dur in reg WAKE_UP_DUR
+ *
+ */
+int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®.byte, 1);
+ *val = reg.wake_up_dur.sleep_dur;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup tap_generator
+ * @brief This section groups all the functions that manage the tap
+ * and double tap event generation.
+ * @{
+ */
+
+/**
+ * @brief tap_threshold_x: [set] Threshold for tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of tap_thsx in reg TAP_THS_X
+ *
+ */
+int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+ reg.tap_ths_x.tap_thsx = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_threshold_x: [get] Threshold for tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of tap_thsx in reg TAP_THS_X
+ *
+ */
+int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+ *val = reg.tap_ths_x.tap_thsx;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_threshold_y: [set] Threshold for tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of tap_thsy in reg TAP_THS_Y
+ *
+ */
+int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, ®.byte, 1);
+ reg.tap_ths_y.tap_thsy = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_threshold_y: [get] Threshold for tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of tap_thsy in reg TAP_THS_Y
+ *
+ */
+int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, ®.byte, 1);
+ *val = reg.tap_ths_y.tap_thsy;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_axis_priority: [set] Selection of axis priority for
+ * TAP detection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_tap_prior_t: change the values of tap_prior in
+ * reg TAP_THS_Y
+ *
+ */
+int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_tap_prior_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, ®.byte, 1);
+ reg.tap_ths_y.tap_prior = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Y, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_axis_priority: [get] Selection of axis priority for
+ * TAP detection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_tap_prior_t: Get the values of tap_prior in reg TAP_THS_Y
+ *
+ */
+int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_tap_prior_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Y, ®.byte, 1);
+ *val = (lis2dw12_tap_prior_t) reg.tap_ths_y.tap_prior;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_threshold_z: [set] Threshold for tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of tap_thsz in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ reg.tap_ths_z.tap_thsz = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_threshold_z: [get] Threshold for tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of tap_thsz in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ *val = reg.tap_ths_z.tap_thsz;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_detection_on_z: [set] Enable Z direction in tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of tap_z_en in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ reg.tap_ths_z.tap_z_en = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_detection_on_z: [get] Enable Z direction in tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of tap_z_en in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ *val = reg.tap_ths_z.tap_z_en;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_detection_on_y: [set] Enable Y direction in tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of tap_y_en in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ reg.tap_ths_z.tap_y_en = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_detection_on_y: [get] Enable Y direction in tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of tap_y_en in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ *val = reg.tap_ths_z.tap_y_en;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_detection_on_x: [set] Enable X direction in tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of tap_x_en in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ reg.tap_ths_z.tap_x_en = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_detection_on_x: [get] Enable X direction in tap recognition.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of tap_x_en in reg TAP_THS_Z
+ *
+ */
+int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_Z, ®.byte, 1);
+ *val = reg.tap_ths_z.tap_x_en;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_shock: [set] Maximum duration is the maximum time of an
+ * overthreshold signal detection to be recognized
+ * as a tap event. The default value of these bits
+ * is 00b which corresponds to 4*ODR_XL time.
+ * If the SHOCK[1:0] bits are set to a different
+ * value, 1LSB corresponds to 8*ODR_XL time.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of shock in reg INT_DUR
+ *
+ */
+int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+ reg.int_dur.shock = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_shock: [get] Maximum duration is the maximum time of an
+ * overthreshold signal detection to be
+ * recognized as a tap event.
+ * The default value of these bits is 00b which
+ * corresponds to 4*ODR_XL time.
+ * If the SHOCK[1:0] bits are set to a different
+ * value, 1LSB corresponds to 8*ODR_XL time.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of shock in reg INT_DUR
+ *
+ */
+int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+ *val = reg.int_dur.shock;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_quiet: [set] Quiet time is the time after the first
+ * detected tap in which there must not be any
+ * overthreshold event.
+ * The default value of these bits is 00b which
+ * corresponds to 2*ODR_XL time.
+ * If the QUIET[1:0] bits are set to a different
+ * value, 1LSB corresponds to 4*ODR_XL time.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of quiet in reg INT_DUR
+ *
+ */
+int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+ reg.int_dur.quiet = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_quiet: [get] Quiet time is the time after the first
+ * detected tap in which there must not be
+ * any overthreshold event.
+ * The default value of these bits is 00b which
+ * corresponds to 2*ODR_XL time.
+ * If the QUIET[1:0] bits are set to a different
+ * value, 1LSB corresponds to 4*ODR_XL time.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of quiet in reg INT_DUR
+ *
+ */
+int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+ *val = reg.int_dur.quiet;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_dur: [set] When double tap recognition is enabled,
+ * this register expresses the maximum time
+ * between two consecutive detected taps to
+ * determine a double tap event.
+ * The default value of these bits is 0000b
+ * which corresponds to 16*ODR_XL time.
+ * If the DUR[3:0] bits are set to a different value,
+ * 1LSB corresponds to 32*ODR_XL time.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of latency in reg INT_DUR
+ *
+ */
+int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+ reg.int_dur.latency = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_dur: [get] When double tap recognition is enabled,
+ * this register expresses the maximum time
+ * between two consecutive detected taps to
+ * determine a double tap event.
+ * The default value of these bits is 0000b
+ * which corresponds to 16*ODR_XL time.
+ * If the DUR[3:0] bits are set to a different
+ * value, 1LSB corresponds to 32*ODR_XL time.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of latency in reg INT_DUR
+ *
+ */
+int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_INT_DUR, ®.byte, 1);
+ *val = reg.int_dur.latency;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_mode: [set] Single/double-tap event enable.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_single_double_tap_t: change the values of
+ * single_double_tap in reg WAKE_UP_THS
+ *
+ */
+int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_single_double_tap_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, ®.byte, 1);
+ reg.wake_up_ths.single_double_tap = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_THS, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_mode: [get] Single/double-tap event enable.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_single_double_tap_t: Get the values of single_double_tap
+ * in reg WAKE_UP_THS
+ *
+ */
+int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_single_double_tap_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_THS, ®.byte, 1);
+ *val = (lis2dw12_single_double_tap_t) reg.wake_up_ths.single_double_tap;
+
+ return mm_error;
+}
+
+/**
+ * @brief tap_src: [get] Read the tap / double tap source register.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_tap_src: union of registers from TAP_SRC to
+ *
+ */
+int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_TAP_SRC, (uint8_t*) val, 1);
+}
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup Six_position_detection(6D/4D)
+ * @brief This section groups all the functions concerning six
+ * position detection (6D).
+ * @{
+ */
+
+/**
+ * @brief 6d_threshold: [set] Threshold for 4D/6D function.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of 6d_ths in reg TAP_THS_X
+ *
+ */
+int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+ reg.tap_ths_x._6d_ths = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief 6d_threshold: [get] Threshold for 4D/6D function.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of 6d_ths in reg TAP_THS_X
+ *
+ */
+int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+ *val = reg.tap_ths_x._6d_ths;
+
+ return mm_error;
+}
+
+/**
+ * @brief 4d_mode: [set] 4D orientation detection enable.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of 4d_en in reg TAP_THS_X
+ *
+ */
+int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+ reg.tap_ths_x._4d_en = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief 4d_mode: [get] 4D orientation detection enable.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of 4d_en in reg TAP_THS_X
+ *
+ */
+int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_TAP_THS_X, ®.byte, 1);
+ *val = reg.tap_ths_x._4d_en;
+
+ return mm_error;
+}
+
+/**
+ * @brief 6d_src: [get] Read the 6D tap source register.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_6d_src: union of registers from SIXD_SRC to
+ *
+ */
+int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val)
+{
+ return lis2dw12_read_reg(ctx, LIS2DW12_SIXD_SRC, (uint8_t*) val, 1);
+}
+/**
+ * @brief 6d_feed_data: [set] Data sent to 6D interrupt function.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_lpass_on6d_t: change the values of lpass_on6d in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_lpass_on6d_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ reg.ctrl_reg7.lpass_on6d = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief 6d_feed_data: [get] Data sent to 6D interrupt function.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_lpass_on6d_t: Get the values of lpass_on6d in
+ * reg CTRL_REG7
+ *
+ */
+int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_lpass_on6d_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_CTRL_REG7, ®.byte, 1);
+ *val = (lis2dw12_lpass_on6d_t) reg.ctrl_reg7.lpass_on6d;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup free_fall
+ * @brief This section group all the functions concerning
+ * the free fall detection.
+ * @{
+ */
+
+/**
+ * @brief ff_dur: [set] Wake up duration event.1LSb = 1 / ODR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of ff_dur in
+ * reg WAKE_UP_DUR /F REE_FALL
+ *
+ */
+int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®[0].byte, 2);
+ reg[0].wake_up_dur.ff_dur = (val & 0x20) >> 5;
+ reg[1].free_fall.ff_dur = val & 0x1F;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®[0].byte, 2);
+
+ return mm_error;
+}
+
+/**
+ * @brief ff_dur: [get] Wake up duration event.1LSb = 1 / ODR.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of ff_dur in
+ * reg WAKE_UP_DUR /F REE_FALL
+ *
+ */
+int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg[2];
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_WAKE_UP_DUR, ®[0].byte, 2);
+ *val = (reg[0].wake_up_dur.ff_dur << 5) + reg[1].free_fall.ff_dur;
+
+ return mm_error;
+}
+
+/**
+ * @brief ff_threshold: [set] Free fall threshold setting.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_ff_ths_t: change the values of ff_ths in reg FREE_FALL
+ *
+ */
+int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx, lis2dw12_ff_ths_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, ®.byte, 1);
+ reg.free_fall.ff_ths = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_FREE_FALL, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief ff_threshold: [get] Free fall threshold setting.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_ff_ths_t: Get the values of ff_ths in reg FREE_FALL
+ *
+ */
+int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_ff_ths_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FREE_FALL, ®.byte, 1);
+ *val = (lis2dw12_ff_ths_t) reg.free_fall.ff_ths;
+
+ return mm_error;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @addtogroup fifo
+ * @brief This section group all the functions concerning the fifo usage
+ * @{
+ */
+
+/**
+ * @brief fifo_watermark: [set] FIFO watermark level selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t val: change the values of fth in reg FIFO_CTRL
+ *
+ */
+int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, ®.byte, 1);
+ reg.fifo_ctrl.fth = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief fifo_watermark: [get] FIFO watermark level selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of fth in reg FIFO_CTRL
+ *
+ */
+int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, ®.byte, 1);
+ *val = reg.fifo_ctrl.fth;
+
+ return mm_error;
+}
+
+/**
+ * @brief fifo_mode: [set] FIFO mode selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_fmode_t: change the values of fmode in reg FIFO_CTRL
+ *
+ */
+int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, ®.byte, 1);
+ reg.fifo_ctrl.fmode = val;
+ mm_error = lis2dw12_write_reg(ctx, LIS2DW12_FIFO_CTRL, ®.byte, 1);
+
+ return mm_error;
+}
+
+/**
+ * @brief fifo_mode: [get] FIFO mode selection.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param lis2dw12_fmode_t: Get the values of fmode in reg FIFO_CTRL
+ *
+ */
+int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_CTRL, ®.byte, 1);
+ *val = (lis2dw12_fmode_t) reg.fifo_ctrl.fmode;
+
+ return mm_error;
+}
+
+/**
+ * @brief fifo_data_level: [get] Number of unread samples stored in FIFO.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of diff in reg FIFO_SAMPLES
+ *
+ */
+int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, ®.byte, 1);
+ *val = reg.fifo_samples.diff;
+
+ return mm_error;
+}
+/**
+ * @brief fifo_ovr_flag: [get] FIFO overrun status.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of fifo_ovr in reg FIFO_SAMPLES
+ *
+ */
+int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, ®.byte, 1);
+ *val = reg.fifo_samples.fifo_ovr;
+
+ return mm_error;
+}
+/**
+ * @brief fifo_wtm_flag: [get] FIFO threshold status flag.
+ *
+ * @param lis2dw12_ctx_t *ctx: read / write interface definitions
+ * @param uint8_t: change the values of fifo_fth in reg FIFO_SAMPLES
+ *
+ */
+int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val)
+{
+ lis2dw12_reg_t reg;
+ int32_t mm_error;
+
+ mm_error = lis2dw12_read_reg(ctx, LIS2DW12_FIFO_SAMPLES, ®.byte, 1);
+ *val = reg.fifo_samples.fifo_fth;
+
+ return mm_error;
+}
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/lis2dw12_reg.h Mon Nov 19 13:20:07 2018 +0000
@@ -0,0 +1,757 @@
+/*
+ ******************************************************************************
+ * @file lis2dw12_reg.h
+ * @author MEMS Software Solution Team
+ * @date 25-January-2018
+ * @brief This file contains all the functions prototypes for the
+ * lis2dw12_reg.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LIS2DW12_DRIVER__H
+#define __LIS2DW12_DRIVER__H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdint.h>
+
+/** @addtogroup lis2dw12
+ * @{
+ */
+
+#ifndef MEMS_SHARED_TYPES
+#define MEMS_SHARED_TYPES
+
+/** @defgroup ST_MEMS_common_types
+ * @{
+ */
+
+/**
+ * Float typedef definition for compliance with:
+ * MISRA-C 2012 [Dir 4.6a] -> " Basic type used without typedef "
+ *
+ */
+typedef float float32_t;
+
+typedef union
+{
+ int16_t i16bit[3];
+ uint8_t u8bit[6];
+} axis3bit16_t;
+
+typedef union
+{
+ int16_t i16bit;
+ uint8_t u8bit[2];
+} axis1bit16_t;
+
+typedef union
+{
+ int32_t i32bit[3];
+ uint8_t u8bit[12];
+} axis3bit32_t;
+
+typedef union
+{
+ int32_t i32bit;
+ uint8_t u8bit[4];
+} axis1bit32_t;
+
+typedef struct
+{
+ uint8_t bit0 : 1;
+ uint8_t bit1 : 1;
+ uint8_t bit2 : 1;
+ uint8_t bit3 : 1;
+ uint8_t bit4 : 1;
+ uint8_t bit5 : 1;
+ uint8_t bit6 : 1;
+ uint8_t bit7 : 1;
+} bitwise_t;
+
+#define PROPERTY_DISABLE (0)
+#define PROPERTY_ENABLE (1)
+
+#endif /* MEMS_SHARED_TYPES*/
+
+/**
+ * @}
+ */
+
+/** @defgroup lis2dw12_interface
+ * @{
+ */
+
+typedef int32_t (*lis2dw12_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
+typedef int32_t (*lis2dw12_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
+
+typedef struct {
+ /** Component mandatory fields **/
+ lis2dw12_write_ptr write_reg;
+ lis2dw12_read_ptr read_reg;
+ /** Customizable optional pointer **/
+ void *handle;
+} lis2dw12_ctx_t;
+
+/**
+ * @}
+ */
+
+
+/** @defgroup lis2dw12_Infos
+ * @{
+ */
+ /** I2C Device Address 8 bit format if SA0=0 -> 31 if SA0=1 -> 33 **/
+#define LIS2DW12_I2C_ADD_L 0x31
+#define LIS2DW12_I2C_ADD_H 0x33
+
+/** Device Identification (Who am I) **/
+#define LIS2DW12_ID 0x44
+
+/**
+ * @}
+ */
+
+/**
+ * @defgroup lis2dw12_Sensitivity
+ * @{
+ */
+
+#define LIS2DW12_FROM_FS_2g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.244f
+#define LIS2DW12_FROM_FS_4g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.488f
+#define LIS2DW12_FROM_FS_8g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 0.976f
+#define LIS2DW12_FROM_FS_16g_TO_mg(lsb) (float)((int16_t)lsb >> 2) * 1.952f
+
+#define LIS2DW12_FROM_FS_2g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 0.9760f
+#define LIS2DW12_FROM_FS_4g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 1.9520f
+#define LIS2DW12_FROM_FS_8g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 3.904f
+#define LIS2DW12_FROM_FS_16g_LP1_TO_mg(lsb) (float)((int16_t)lsb>>4)* 7.808f
+
+#define LIS2DW12_FROM_LSB_TO_degC(lsb) (float)((int16_t)lsb) / 16.0f+25.0f
+
+/**
+ * @}
+ */
+
+#define LIS2DW12_OUT_T_L 0x0D
+#define LIS2DW12_OUT_T_H 0x0E
+#define LIS2DW12_WHO_AM_I 0x0F
+#define LIS2DW12_CTRL1 0x20
+typedef struct {
+ uint8_t lp_mode : 2;
+ uint8_t mode : 2;
+ uint8_t odr : 4;
+} lis2dw12_ctrl1_t;
+
+#define LIS2DW12_CTRL2 0x21
+typedef struct {
+ uint8_t sim : 1;
+ uint8_t i2c_disable : 1;
+ uint8_t if_add_inc : 1;
+ uint8_t bdu : 1;
+ uint8_t cs_pu_disc : 1;
+ uint8_t not_used_01 : 1;
+ uint8_t soft_reset : 1;
+ uint8_t boot : 1;
+} lis2dw12_ctrl2_t;
+
+#define LIS2DW12_CTRL3 0x22
+typedef struct {
+ uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */
+ uint8_t not_used_01 : 1;
+ uint8_t h_lactive : 1;
+ uint8_t lir : 1;
+ uint8_t pp_od : 1;
+ uint8_t st : 2;
+} lis2dw12_ctrl3_t;
+
+#define LIS2DW12_CTRL4_INT1_PAD_CTRL 0x23
+typedef struct {
+ uint8_t int1_drdy : 1;
+ uint8_t int1_fth : 1;
+ uint8_t int1_diff5 : 1;
+ uint8_t int1_tap : 1;
+ uint8_t int1_ff : 1;
+ uint8_t int1_wu : 1;
+ uint8_t int1_single_tap : 1;
+ uint8_t int1_6d : 1;
+} lis2dw12_ctrl4_int1_pad_ctrl_t;
+
+#define LIS2DW12_CTRL5_INT2_PAD_CTRL 0x24
+typedef struct {
+ uint8_t int2_drdy : 1;
+ uint8_t int2_fth : 1;
+ uint8_t int2_diff5 : 1;
+ uint8_t int2_ovr : 1;
+ uint8_t int2_drdy_t : 1;
+ uint8_t int2_boot : 1;
+ uint8_t int2_sleep_chg : 1;
+ uint8_t int2_sleep_state : 1;
+} lis2dw12_ctrl5_int2_pad_ctrl_t;
+
+#define LIS2DW12_CTRL6 0x25
+typedef struct {
+ uint8_t not_used_01 : 2;
+ uint8_t low_noise : 1;
+ uint8_t fds : 1;
+ uint8_t fs : 2;
+ uint8_t bw_filt : 2;
+} lis2dw12_ctrl6_t;
+
+#define LIS2DW12_OUT_T 0x26
+#define LIS2DW12_STATUS 0x27
+typedef struct {
+ uint8_t drdy : 1;
+ uint8_t ff_ia : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t sleep_state : 1;
+ uint8_t wu_ia : 1;
+ uint8_t fifo_ths : 1;
+} lis2dw12_status_t;
+
+#define LIS2DW12_OUT_X_L 0x28
+#define LIS2DW12_OUT_X_H 0x29
+#define LIS2DW12_OUT_Y_L 0x2A
+#define LIS2DW12_OUT_Y_H 0x2B
+#define LIS2DW12_OUT_Z_L 0x2C
+#define LIS2DW12_OUT_Z_H 0x2D
+#define LIS2DW12_FIFO_CTRL 0x2E
+typedef struct {
+ uint8_t fth : 5;
+ uint8_t fmode : 3;
+} lis2dw12_fifo_ctrl_t;
+
+#define LIS2DW12_FIFO_SAMPLES 0x2F
+typedef struct {
+ uint8_t diff : 6;
+ uint8_t fifo_ovr : 1;
+ uint8_t fifo_fth : 1;
+} lis2dw12_fifo_samples_t;
+
+#define LIS2DW12_TAP_THS_X 0x30
+typedef struct {
+ uint8_t tap_thsx : 5;
+ uint8_t _6d_ths : 2;
+ uint8_t _4d_en : 1;
+} lis2dw12_tap_ths_x_t;
+
+#define LIS2DW12_TAP_THS_Y 0x31
+typedef struct {
+ uint8_t tap_thsy : 5;
+ uint8_t tap_prior : 3;
+} lis2dw12_tap_ths_y_t;
+
+#define LIS2DW12_TAP_THS_Z 0x32
+typedef struct {
+ uint8_t tap_thsz : 5;
+ uint8_t tap_z_en : 1;
+ uint8_t tap_y_en : 1;
+ uint8_t tap_x_en : 1;
+} lis2dw12_tap_ths_z_t;
+
+#define LIS2DW12_INT_DUR 0x33
+typedef struct {
+ uint8_t shock : 2;
+ uint8_t quiet : 2;
+ uint8_t latency : 4;
+} lis2dw12_int_dur_t;
+
+#define LIS2DW12_WAKE_UP_THS 0x34
+typedef struct {
+ uint8_t wk_ths : 6;
+ uint8_t sleep_on : 1;
+ uint8_t single_double_tap : 1;
+} lis2dw12_wake_up_ths_t;
+
+#define LIS2DW12_WAKE_UP_DUR 0x35
+typedef struct {
+ uint8_t sleep_dur : 4;
+ uint8_t stationary : 1;
+ uint8_t wake_dur : 2;
+ uint8_t ff_dur : 1;
+} lis2dw12_wake_up_dur_t;
+
+#define LIS2DW12_FREE_FALL 0x36
+typedef struct {
+ uint8_t ff_ths : 3;
+ uint8_t ff_dur : 5;
+} lis2dw12_free_fall_t;
+
+#define LIS2DW12_STATUS_DUP 0x37
+typedef struct {
+ uint8_t drdy : 1;
+ uint8_t ff_ia : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t sleep_state_ia : 1;
+ uint8_t drdy_t : 1;
+ uint8_t ovr : 1;
+} lis2dw12_status_dup_t;
+
+#define LIS2DW12_WAKE_UP_SRC 0x38
+typedef struct {
+ uint8_t z_wu : 1;
+ uint8_t y_wu : 1;
+ uint8_t x_wu : 1;
+ uint8_t wu_ia : 1;
+ uint8_t sleep_state_ia : 1;
+ uint8_t ff_ia : 1;
+ uint8_t not_used_01 : 2;
+} lis2dw12_wake_up_src_t;
+
+#define LIS2DW12_TAP_SRC 0x39
+typedef struct {
+ uint8_t z_tap : 1;
+ uint8_t y_tap : 1;
+ uint8_t x_tap : 1;
+ uint8_t tap_sign : 1;
+ uint8_t double_tap : 1;
+ uint8_t single_tap : 1;
+ uint8_t tap_ia : 1;
+ uint8_t not_used_01 : 1;
+} lis2dw12_tap_src_t;
+
+#define LIS2DW12_SIXD_SRC 0x3A
+typedef struct {
+ uint8_t xl : 1;
+ uint8_t xh : 1;
+ uint8_t yl : 1;
+ uint8_t yh : 1;
+ uint8_t zl : 1;
+ uint8_t zh : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t not_used_01 : 1;
+} lis2dw12_sixd_src_t;
+
+#define LIS2DW12_ALL_INT_SRC 0x3B
+typedef struct {
+ uint8_t ff_ia : 1;
+ uint8_t wu_ia : 1;
+ uint8_t single_tap : 1;
+ uint8_t double_tap : 1;
+ uint8_t _6d_ia : 1;
+ uint8_t sleep_change_ia : 1;
+ uint8_t not_used_01 : 2;
+} lis2dw12_all_int_src_t;
+
+#define LIS2DW12_X_OFS_USR 0x3C
+#define LIS2DW12_Y_OFS_USR 0x3D
+#define LIS2DW12_Z_OFS_USR 0x3E
+#define LIS2DW12_CTRL_REG7 0x3F
+typedef struct {
+ uint8_t lpass_on6d : 1;
+ uint8_t hp_ref_mode : 1;
+ uint8_t usr_off_w : 1;
+ uint8_t usr_off_on_wu : 1;
+ uint8_t usr_off_on_out : 1;
+ uint8_t interrupts_enable : 1;
+ uint8_t int2_on_int1 : 1;
+ uint8_t drdy_pulsed : 1;
+} lis2dw12_ctrl_reg7_t;
+
+typedef union{
+ lis2dw12_ctrl1_t ctrl1;
+ lis2dw12_ctrl2_t ctrl2;
+ lis2dw12_ctrl3_t ctrl3;
+ lis2dw12_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl;
+ lis2dw12_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl;
+ lis2dw12_ctrl6_t ctrl6;
+ lis2dw12_status_t status;
+ lis2dw12_fifo_ctrl_t fifo_ctrl;
+ lis2dw12_fifo_samples_t fifo_samples;
+ lis2dw12_tap_ths_x_t tap_ths_x;
+ lis2dw12_tap_ths_y_t tap_ths_y;
+ lis2dw12_tap_ths_z_t tap_ths_z;
+ lis2dw12_int_dur_t int_dur;
+ lis2dw12_wake_up_ths_t wake_up_ths;
+ lis2dw12_wake_up_dur_t wake_up_dur;
+ lis2dw12_free_fall_t free_fall;
+ lis2dw12_status_dup_t status_dup;
+ lis2dw12_wake_up_src_t wake_up_src;
+ lis2dw12_tap_src_t tap_src;
+ lis2dw12_sixd_src_t sixd_src;
+ lis2dw12_all_int_src_t all_int_src;
+ lis2dw12_ctrl_reg7_t ctrl_reg7;
+ bitwise_t bitwise;
+ uint8_t byte;
+} lis2dw12_reg_t;
+
+int32_t lis2dw12_read_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data,
+ uint16_t len);
+int32_t lis2dw12_write_reg(lis2dw12_ctx_t *ctx, uint8_t reg, uint8_t* data,
+ uint16_t len);
+
+typedef enum {
+ LIS2DW12_HIGH_PERFORMANCE = 0x04,
+ LIS2DW12_CONT_LOW_PWR_4 = 0x03,
+ LIS2DW12_CONT_LOW_PWR_3 = 0x02,
+ LIS2DW12_CONT_LOW_PWR_2 = 0x01,
+ LIS2DW12_CONT_LOW_PWR_12bit = 0x00,
+ LIS2DW12_SINGLE_LOW_PWR_4 = 0x0B,
+ LIS2DW12_SINGLE_LOW_PWR_3 = 0x0A,
+ LIS2DW12_SINGLE_LOW_PWR_2 = 0x09,
+ LIS2DW12_SINGLE_LOW_PWR_12bit = 0x08,
+ LIS2DW12_HIGH_PERFORMANCE_LOW_NOISE = 0x14,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_4 = 0x13,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_3 = 0x12,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_2 = 0x11,
+ LIS2DW12_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10,
+ LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B,
+ LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A,
+ LIS2DW12_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19,
+ LIS2DW12_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18,
+} lis2dw12_mode_t;
+int32_t lis2dw12_power_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_mode_t val);
+int32_t lis2dw12_power_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_mode_t *val);
+
+typedef enum {
+ LIS2DW12_XL_ODR_OFF = 0x00,
+ LIS2DW12_XL_ODR_1Hz6_LP_ONLY = 0x01,
+ LIS2DW12_XL_ODR_12Hz5 = 0x02,
+ LIS2DW12_XL_ODR_25Hz = 0x03,
+ LIS2DW12_XL_ODR_50Hz = 0x04,
+ LIS2DW12_XL_ODR_100Hz = 0x05,
+ LIS2DW12_XL_ODR_200Hz = 0x06,
+ LIS2DW12_XL_ODR_400Hz = 0x07,
+ LIS2DW12_XL_ODR_800Hz = 0x08,
+ LIS2DW12_XL_ODR_1k6Hz = 0x09,
+ LIS2DW12_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */
+ LIS2DW12_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */
+} lis2dw12_odr_t;
+int32_t lis2dw12_data_rate_set(lis2dw12_ctx_t *ctx, lis2dw12_odr_t val);
+int32_t lis2dw12_data_rate_get(lis2dw12_ctx_t *ctx, lis2dw12_odr_t *val);
+
+int32_t lis2dw12_block_data_update_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_block_data_update_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_2g = 0,
+ LIS2DW12_4g = 1,
+ LIS2DW12_8g = 2,
+ LIS2DW12_16g = 3,
+} lis2dw12_fs_t;
+int32_t lis2dw12_full_scale_set(lis2dw12_ctx_t *ctx, lis2dw12_fs_t val);
+int32_t lis2dw12_full_scale_get(lis2dw12_ctx_t *ctx, lis2dw12_fs_t *val);
+
+int32_t lis2dw12_status_reg_get(lis2dw12_ctx_t *ctx, lis2dw12_status_t *val);
+
+int32_t lis2dw12_flag_data_ready_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef struct{
+ lis2dw12_status_dup_t status_dup;
+ lis2dw12_wake_up_src_t wake_up_src;
+ lis2dw12_tap_src_t tap_src;
+ lis2dw12_sixd_src_t sixd_src;
+ lis2dw12_all_int_src_t all_int_src;
+} lis2dw12_all_sources_t;
+int32_t lis2dw12_all_sources_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_all_sources_t *val);
+
+int32_t lis2dw12_usr_offset_x_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
+int32_t lis2dw12_usr_offset_x_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
+
+int32_t lis2dw12_usr_offset_y_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
+int32_t lis2dw12_usr_offset_y_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
+
+int32_t lis2dw12_usr_offset_z_set(lis2dw12_ctx_t *ctx, uint8_t *buff);
+int32_t lis2dw12_usr_offset_z_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
+
+typedef enum {
+ LIS2DW12_LSb_977ug = 0,
+ LIS2DW12_LSb_15mg6 = 1,
+} lis2dw12_usr_off_w_t;
+int32_t lis2dw12_offset_weight_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_w_t val);
+int32_t lis2dw12_offset_weight_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_w_t *val);
+
+int32_t lis2dw12_temperature_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
+
+int32_t lis2dw12_acceleration_raw_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
+
+int32_t lis2dw12_device_id_get(lis2dw12_ctx_t *ctx, uint8_t *buff);
+
+int32_t lis2dw12_auto_increment_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_auto_increment_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_reset_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_reset_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_boot_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_boot_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_XL_ST_DISABLE = 0,
+ LIS2DW12_XL_ST_POSITIVE = 1,
+ LIS2DW12_XL_ST_NEGATIVE = 2,
+} lis2dw12_st_t;
+int32_t lis2dw12_self_test_set(lis2dw12_ctx_t *ctx, lis2dw12_st_t val);
+int32_t lis2dw12_self_test_get(lis2dw12_ctx_t *ctx, lis2dw12_st_t *val);
+
+typedef enum {
+ LIS2DW12_DRDY_LATCHED = 0,
+ LIS2DW12_DRDY_PULSED = 1,
+} lis2dw12_drdy_pulsed_t;
+int32_t lis2dw12_data_ready_mode_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_drdy_pulsed_t val);
+int32_t lis2dw12_data_ready_mode_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_drdy_pulsed_t *val);
+
+typedef enum {
+ LIS2DW12_LPF_ON_OUT = 0x00,
+ LIS2DW12_USER_OFFSET_ON_OUT = 0x01,
+ LIS2DW12_HIGH_PASS_ON_OUT = 0x10,
+} lis2dw12_fds_t;
+int32_t lis2dw12_filter_path_set(lis2dw12_ctx_t *ctx, lis2dw12_fds_t val);
+int32_t lis2dw12_filter_path_get(lis2dw12_ctx_t *ctx, lis2dw12_fds_t *val);
+
+typedef enum {
+ LIS2DW12_ODR_DIV_2 = 0,
+ LIS2DW12_ODR_DIV_4 = 1,
+ LIS2DW12_ODR_DIV_10 = 2,
+ LIS2DW12_ODR_DIV_20 = 3,
+} lis2dw12_bw_filt_t;
+int32_t lis2dw12_filter_bandwidth_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_bw_filt_t val);
+int32_t lis2dw12_filter_bandwidth_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_bw_filt_t *val);
+
+int32_t lis2dw12_reference_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_reference_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_SPI_4_WIRE = 0,
+ LIS2DW12_SPI_3_WIRE = 1,
+} lis2dw12_sim_t;
+int32_t lis2dw12_spi_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sim_t val);
+int32_t lis2dw12_spi_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sim_t *val);
+
+typedef enum {
+ LIS2DW12_I2C_ENABLE = 0,
+ LIS2DW12_I2C_DISABLE = 1,
+} lis2dw12_i2c_disable_t;
+int32_t lis2dw12_i2c_interface_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_i2c_disable_t val);
+int32_t lis2dw12_i2c_interface_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_i2c_disable_t *val);
+
+typedef enum {
+ LIS2DW12_PULL_UP_CONNECT = 0,
+ LIS2DW12_PULL_UP_DISCONNECT = 1,
+} lis2dw12_cs_pu_disc_t;
+int32_t lis2dw12_cs_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t val);
+int32_t lis2dw12_cs_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_cs_pu_disc_t *val);
+
+typedef enum {
+ LIS2DW12_ACTIVE_HIGH = 0,
+ LIS2DW12_ACTIVE_LOW = 1,
+} lis2dw12_h_lactive_t;
+int32_t lis2dw12_pin_polarity_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_h_lactive_t val);
+int32_t lis2dw12_pin_polarity_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_h_lactive_t *val);
+
+typedef enum {
+ LIS2DW12_INT_PULSED = 0,
+ LIS2DW12_INT_LATCHED = 1,
+} lis2dw12_lir_t;
+int32_t lis2dw12_int_notification_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_lir_t val);
+int32_t lis2dw12_int_notification_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_lir_t *val);
+
+typedef enum {
+ LIS2DW12_PUSH_PULL = 0,
+ LIS2DW12_OPEN_DRAIN = 1,
+} lis2dw12_pp_od_t;
+int32_t lis2dw12_pin_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t val);
+int32_t lis2dw12_pin_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_pp_od_t *val);
+
+int32_t lis2dw12_pin_int1_route_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl4_int1_pad_ctrl_t *val);
+int32_t lis2dw12_pin_int1_route_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl4_int1_pad_ctrl_t *val);
+
+int32_t lis2dw12_pin_int2_route_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl5_int2_pad_ctrl_t *val);
+int32_t lis2dw12_pin_int2_route_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_ctrl5_int2_pad_ctrl_t *val);
+
+int32_t lis2dw12_all_on_int1_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_all_on_int1_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_wkup_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_wkup_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_wkup_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_wkup_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_HP_FEED = 0,
+ LIS2DW12_USER_OFFSET_FEED = 1,
+} lis2dw12_usr_off_on_wu_t;
+int32_t lis2dw12_wkup_feed_data_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_on_wu_t val);
+int32_t lis2dw12_wkup_feed_data_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_usr_off_on_wu_t *val);
+
+typedef enum {
+ LIS2DW12_NO_DETECTION = 0,
+ LIS2DW12_DETECT_ACT_INACT = 1,
+ LIS2DW12_DETECT_STAT_MOTION = 3,
+} lis2dw12_sleep_on_t;
+int32_t lis2dw12_act_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t val);
+int32_t lis2dw12_act_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_sleep_on_t *val);
+
+int32_t lis2dw12_act_sleep_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_act_sleep_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_threshold_x_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_threshold_x_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_threshold_y_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_threshold_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_XYZ = 0,
+ LIS2DW12_YXZ = 1,
+ LIS2DW12_XZY = 2,
+ LIS2DW12_ZYX = 3,
+ LIS2DW12_YZX = 5,
+ LIS2DW12_ZXY = 6,
+} lis2dw12_tap_prior_t;
+int32_t lis2dw12_tap_axis_priority_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_tap_prior_t val);
+int32_t lis2dw12_tap_axis_priority_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_tap_prior_t *val);
+
+int32_t lis2dw12_tap_threshold_z_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_threshold_z_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_detection_on_z_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_detection_on_z_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_detection_on_y_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_detection_on_y_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_detection_on_x_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_detection_on_x_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_shock_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_shock_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_quiet_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_quiet_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_tap_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_tap_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_ONLY_SINGLE = 0,
+ LIS2DW12_BOTH_SINGLE_DOUBLE = 1,
+} lis2dw12_single_double_tap_t;
+int32_t lis2dw12_tap_mode_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_single_double_tap_t val);
+int32_t lis2dw12_tap_mode_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_single_double_tap_t *val);
+
+int32_t lis2dw12_tap_src_get(lis2dw12_ctx_t *ctx, lis2dw12_tap_src_t *val);
+
+int32_t lis2dw12_6d_threshold_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_6d_threshold_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_4d_mode_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_4d_mode_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_6d_src_get(lis2dw12_ctx_t *ctx, lis2dw12_sixd_src_t *val);
+
+typedef enum {
+ LIS2DW12_ODR_DIV_2_FEED = 0,
+ LIS2DW12_LPF2_FEED = 1,
+} lis2dw12_lpass_on6d_t;
+int32_t lis2dw12_6d_feed_data_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_lpass_on6d_t val);
+int32_t lis2dw12_6d_feed_data_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_lpass_on6d_t *val);
+
+int32_t lis2dw12_ff_dur_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_ff_dur_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_FF_TSH_5LSb_FS2g = 0,
+ LIS2DW12_FF_TSH_7LSb_FS2g = 1,
+ LIS2DW12_FF_TSH_8LSb_FS2g = 2,
+ LIS2DW12_FF_TSH_10LSb_FS2g = 3,
+ LIS2DW12_FF_TSH_11LSb_FS2g = 4,
+ LIS2DW12_FF_TSH_13LSb_FS2g = 5,
+ LIS2DW12_FF_TSH_15LSb_FS2g = 6,
+ LIS2DW12_FF_TSH_16LSb_FS2g = 7,
+} lis2dw12_ff_ths_t;
+int32_t lis2dw12_ff_threshold_set(lis2dw12_ctx_t *ctx,
+ lis2dw12_ff_ths_t val);
+int32_t lis2dw12_ff_threshold_get(lis2dw12_ctx_t *ctx,
+ lis2dw12_ff_ths_t *val);
+
+int32_t lis2dw12_fifo_watermark_set(lis2dw12_ctx_t *ctx, uint8_t val);
+int32_t lis2dw12_fifo_watermark_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+typedef enum {
+ LIS2DW12_BYPASS_MODE = 0,
+ LIS2DW12_FIFO_MODE = 1,
+ LIS2DW12_STREAM_TO_FIFO_MODE = 3,
+ LIS2DW12_BYPASS_TO_STREAM_MODE = 4,
+ LIS2DW12_STREAM_MODE = 6,
+} lis2dw12_fmode_t;
+int32_t lis2dw12_fifo_mode_set(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t val);
+int32_t lis2dw12_fifo_mode_get(lis2dw12_ctx_t *ctx, lis2dw12_fmode_t *val);
+
+int32_t lis2dw12_fifo_data_level_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_fifo_ovr_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+int32_t lis2dw12_fifo_wtm_flag_get(lis2dw12_ctx_t *ctx, uint8_t *val);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__LIS2DW12_DRIVER__H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/