ST / IIS2DLPC

MEMS digital output motion sensor: high-performance ultra-low-power 3-axis accelerometer for industrial applications

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

iis2dlpc_reg.h@2:28ad92a16a36, 2018-11-21 (annotated)

Committer:
cparata
Date:
Wed Nov 21 15:51:50 2018 +0000
Revision:
2:28ad92a16a36
Parent:
1:7b1fcb1bb23d 
Update PID files

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cparata 1:7b1fcb1bb23d 1 /**
cparata 0:13631b50eae6 2 ******************************************************************************
cparata 0:13631b50eae6 3 * @file iis2dlpc_reg.h
cparata 0:13631b50eae6 4 * @author Sensors Software Solution Team
cparata 0:13631b50eae6 5 * @brief This file contains all the functions prototypes for the
cparata 0:13631b50eae6 6 * iis2dlpc_reg.c driver.
cparata 0:13631b50eae6 7 ******************************************************************************
cparata 0:13631b50eae6 8 * @attention
cparata 0:13631b50eae6 9 *
cparata 0:13631b50eae6 10 * <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata 0:13631b50eae6 11 *
cparata 0:13631b50eae6 12 * Redistribution and use in source and binary forms, with or without
cparata 0:13631b50eae6 13 * modification, are permitted provided that the following conditions
cparata 0:13631b50eae6 14 * are met:
cparata 0:13631b50eae6 15 * 1. Redistributions of source code must retain the above copyright notice,
cparata 0:13631b50eae6 16 * this list of conditions and the following disclaimer.
cparata 0:13631b50eae6 17 * 2. Redistributions in binary form must reproduce the above copyright
cparata 0:13631b50eae6 18 * notice, this list of conditions and the following disclaimer in the
cparata 0:13631b50eae6 19 * documentation and/or other materials provided with the distribution.
cparata 0:13631b50eae6 20 * 3. Neither the name of STMicroelectronics nor the names of its
cparata 0:13631b50eae6 21 * contributors may be used to endorse or promote products derived from
cparata 0:13631b50eae6 22 * this software without specific prior written permission.
cparata 0:13631b50eae6 23 *
cparata 0:13631b50eae6 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata 0:13631b50eae6 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata 0:13631b50eae6 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cparata 0:13631b50eae6 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
cparata 0:13631b50eae6 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cparata 0:13631b50eae6 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cparata 0:13631b50eae6 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cparata 0:13631b50eae6 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cparata 0:13631b50eae6 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cparata 0:13631b50eae6 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cparata 0:13631b50eae6 34 * POSSIBILITY OF SUCH DAMAGE.
cparata 0:13631b50eae6 35 *
cparata 2:28ad92a16a36 36 ******************************************************************************
cparata 0:13631b50eae6 37 */
cparata 0:13631b50eae6 38
cparata 0:13631b50eae6 39 /* Define to prevent recursive inclusion -------------------------------------*/
cparata 0:13631b50eae6 40 #ifndef IIS2DLPC_REGS_H
cparata 0:13631b50eae6 41 #define IIS2DLPC_REGS_H
cparata 0:13631b50eae6 42
cparata 0:13631b50eae6 43 #ifdef __cplusplus
cparata 0:13631b50eae6 44 extern "C" {
cparata 0:13631b50eae6 45 #endif
cparata 0:13631b50eae6 46
cparata 0:13631b50eae6 47 /* Includes ------------------------------------------------------------------*/
cparata 0:13631b50eae6 48 #include <stdint.h>
cparata 0:13631b50eae6 49 #include <math.h>
cparata 0:13631b50eae6 50
cparata 0:13631b50eae6 51 /** @addtogroup IIS2DLPC
cparata 0:13631b50eae6 52 * @{
cparata 0:13631b50eae6 53 *
cparata 0:13631b50eae6 54 */
cparata 0:13631b50eae6 55
cparata 0:13631b50eae6 56 /** @defgroup IIS2DLPC_sensors_common_types
cparata 0:13631b50eae6 57 * @{
cparata 0:13631b50eae6 58 *
cparata 0:13631b50eae6 59 */
cparata 0:13631b50eae6 60
cparata 0:13631b50eae6 61 #ifndef MEMS_SHARED_TYPES
cparata 0:13631b50eae6 62 #define MEMS_SHARED_TYPES
cparata 0:13631b50eae6 63
cparata 2:28ad92a16a36 64 /**
cparata 2:28ad92a16a36 65 * @defgroup axisXbitXX_t
cparata 2:28ad92a16a36 66 * @brief These unions are useful to represent different sensors data type.
cparata 2:28ad92a16a36 67 * These unions are not need by the driver.
cparata 2:28ad92a16a36 68 *
cparata 2:28ad92a16a36 69 * REMOVING the unions you are compliant with:
cparata 2:28ad92a16a36 70 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata 2:28ad92a16a36 71 *
cparata 0:13631b50eae6 72 * @{
cparata 2:28ad92a16a36 73 *
cparata 0:13631b50eae6 74 */
cparata 0:13631b50eae6 75
cparata 2:28ad92a16a36 76 typedef union{
cparata 0:13631b50eae6 77 int16_t i16bit[3];
cparata 0:13631b50eae6 78 uint8_t u8bit[6];
cparata 0:13631b50eae6 79 } axis3bit16_t;
cparata 0:13631b50eae6 80
cparata 2:28ad92a16a36 81 typedef union{
cparata 0:13631b50eae6 82 int16_t i16bit;
cparata 0:13631b50eae6 83 uint8_t u8bit[2];
cparata 0:13631b50eae6 84 } axis1bit16_t;
cparata 0:13631b50eae6 85
cparata 2:28ad92a16a36 86 typedef union{
cparata 0:13631b50eae6 87 int32_t i32bit[3];
cparata 0:13631b50eae6 88 uint8_t u8bit[12];
cparata 0:13631b50eae6 89 } axis3bit32_t;
cparata 0:13631b50eae6 90
cparata 2:28ad92a16a36 91 typedef union{
cparata 0:13631b50eae6 92 int32_t i32bit;
cparata 0:13631b50eae6 93 uint8_t u8bit[4];
cparata 0:13631b50eae6 94 } axis1bit32_t;
cparata 0:13631b50eae6 95
cparata 2:28ad92a16a36 96 /**
cparata 2:28ad92a16a36 97 * @}
cparata 2:28ad92a16a36 98 *
cparata 2:28ad92a16a36 99 */
cparata 2:28ad92a16a36 100
cparata 2:28ad92a16a36 101 typedef struct{
cparata 0:13631b50eae6 102 uint8_t bit0 : 1;
cparata 0:13631b50eae6 103 uint8_t bit1 : 1;
cparata 0:13631b50eae6 104 uint8_t bit2 : 1;
cparata 0:13631b50eae6 105 uint8_t bit3 : 1;
cparata 0:13631b50eae6 106 uint8_t bit4 : 1;
cparata 0:13631b50eae6 107 uint8_t bit5 : 1;
cparata 0:13631b50eae6 108 uint8_t bit6 : 1;
cparata 0:13631b50eae6 109 uint8_t bit7 : 1;
cparata 0:13631b50eae6 110 } bitwise_t;
cparata 0:13631b50eae6 111
cparata 2:28ad92a16a36 112 #define PROPERTY_DISABLE (0U)
cparata 2:28ad92a16a36 113 #define PROPERTY_ENABLE (1U)
cparata 0:13631b50eae6 114
cparata 2:28ad92a16a36 115 #endif /* MEMS_SHARED_TYPES */
cparata 0:13631b50eae6 116
cparata 0:13631b50eae6 117 /**
cparata 0:13631b50eae6 118 * @}
cparata 0:13631b50eae6 119 *
cparata 0:13631b50eae6 120 */
cparata 0:13631b50eae6 121
cparata 0:13631b50eae6 122 /** @addtogroup IIS2DLPC_Interfaces_Functions
cparata 0:13631b50eae6 123 * @brief This section provide a set of functions used to read and
cparata 0:13631b50eae6 124 * write a generic register of the device.
cparata 0:13631b50eae6 125 * MANDATORY: return 0 -> no Error.
cparata 0:13631b50eae6 126 * @{
cparata 0:13631b50eae6 127 *
cparata 0:13631b50eae6 128 */
cparata 0:13631b50eae6 129
cparata 0:13631b50eae6 130 typedef int32_t (*iis2dlpc_write_ptr)(void *, uint8_t, uint8_t*, uint16_t);
cparata 0:13631b50eae6 131 typedef int32_t (*iis2dlpc_read_ptr) (void *, uint8_t, uint8_t*, uint16_t);
cparata 0:13631b50eae6 132
cparata 0:13631b50eae6 133 typedef struct {
cparata 0:13631b50eae6 134 /** Component mandatory fields **/
cparata 0:13631b50eae6 135 iis2dlpc_write_ptr write_reg;
cparata 0:13631b50eae6 136 iis2dlpc_read_ptr read_reg;
cparata 0:13631b50eae6 137 /** Customizable optional pointer **/
cparata 0:13631b50eae6 138 void *handle;
cparata 0:13631b50eae6 139 } iis2dlpc_ctx_t;
cparata 0:13631b50eae6 140
cparata 0:13631b50eae6 141 /**
cparata 0:13631b50eae6 142 * @}
cparata 0:13631b50eae6 143 *
cparata 0:13631b50eae6 144 */
cparata 0:13631b50eae6 145
cparata 0:13631b50eae6 146 /** @defgroup IIS2DLPC_Infos
cparata 0:13631b50eae6 147 * @{
cparata 0:13631b50eae6 148 *
cparata 0:13631b50eae6 149 */
cparata 0:13631b50eae6 150
cparata 0:13631b50eae6 151 /** I2C Device Address 8 bit format if SA0=0 -> 31 if SA0=1 -> 33 **/
cparata 0:13631b50eae6 152 #define IIS2DLPC_I2C_ADD_L 0x31U
cparata 0:13631b50eae6 153 #define IIS2DLPC_I2C_ADD_H 0x33U
cparata 0:13631b50eae6 154
cparata 0:13631b50eae6 155 /** Device Identification (Who am I) **/
cparata 0:13631b50eae6 156 #define IIS2DLPC_ID 0x44U
cparata 0:13631b50eae6 157
cparata 0:13631b50eae6 158 /**
cparata 0:13631b50eae6 159 * @}
cparata 0:13631b50eae6 160 *
cparata 0:13631b50eae6 161 */
cparata 0:13631b50eae6 162
cparata 0:13631b50eae6 163 #define IIS2DLPC_OUT_T_L 0x0DU
cparata 0:13631b50eae6 164 #define IIS2DLPC_OUT_T_H 0x0EU
cparata 0:13631b50eae6 165 #define IIS2DLPC_WHO_AM_I 0x0FU
cparata 0:13631b50eae6 166 #define IIS2DLPC_CTRL1 0x20U
cparata 0:13631b50eae6 167 typedef struct {
cparata 0:13631b50eae6 168 uint8_t lp_mode : 2;
cparata 0:13631b50eae6 169 uint8_t mode : 2;
cparata 0:13631b50eae6 170 uint8_t odr : 4;
cparata 0:13631b50eae6 171 } iis2dlpc_ctrl1_t;
cparata 0:13631b50eae6 172
cparata 0:13631b50eae6 173 #define IIS2DLPC_CTRL2 0x21U
cparata 0:13631b50eae6 174 typedef struct {
cparata 0:13631b50eae6 175 uint8_t sim : 1;
cparata 0:13631b50eae6 176 uint8_t i2c_disable : 1;
cparata 0:13631b50eae6 177 uint8_t if_add_inc : 1;
cparata 0:13631b50eae6 178 uint8_t bdu : 1;
cparata 0:13631b50eae6 179 uint8_t cs_pu_disc : 1;
cparata 0:13631b50eae6 180 uint8_t not_used_01 : 1;
cparata 0:13631b50eae6 181 uint8_t soft_reset : 1;
cparata 0:13631b50eae6 182 uint8_t boot : 1;
cparata 0:13631b50eae6 183 } iis2dlpc_ctrl2_t;
cparata 0:13631b50eae6 184
cparata 0:13631b50eae6 185 #define IIS2DLPC_CTRL3 0x22U
cparata 0:13631b50eae6 186 typedef struct {
cparata 0:13631b50eae6 187 uint8_t slp_mode : 2; /* slp_mode_sel + slp_mode_1 */
cparata 0:13631b50eae6 188 uint8_t not_used_01 : 1;
cparata 0:13631b50eae6 189 uint8_t h_lactive : 1;
cparata 0:13631b50eae6 190 uint8_t lir : 1;
cparata 0:13631b50eae6 191 uint8_t pp_od : 1;
cparata 0:13631b50eae6 192 uint8_t st : 2;
cparata 0:13631b50eae6 193 } iis2dlpc_ctrl3_t;
cparata 0:13631b50eae6 194
cparata 0:13631b50eae6 195 #define IIS2DLPC_CTRL4_INT1_PAD_CTRL 0x23U
cparata 0:13631b50eae6 196 typedef struct {
cparata 0:13631b50eae6 197 uint8_t int1_drdy : 1;
cparata 0:13631b50eae6 198 uint8_t int1_fth : 1;
cparata 0:13631b50eae6 199 uint8_t int1_diff5 : 1;
cparata 0:13631b50eae6 200 uint8_t int1_tap : 1;
cparata 0:13631b50eae6 201 uint8_t int1_ff : 1;
cparata 0:13631b50eae6 202 uint8_t int1_wu : 1;
cparata 0:13631b50eae6 203 uint8_t int1_single_tap : 1;
cparata 0:13631b50eae6 204 uint8_t int1_6d : 1;
cparata 0:13631b50eae6 205 } iis2dlpc_ctrl4_int1_pad_ctrl_t;
cparata 0:13631b50eae6 206
cparata 0:13631b50eae6 207 #define IIS2DLPC_CTRL5_INT2_PAD_CTRL 0x24U
cparata 0:13631b50eae6 208 typedef struct {
cparata 0:13631b50eae6 209 uint8_t int2_drdy : 1;
cparata 0:13631b50eae6 210 uint8_t int2_fth : 1;
cparata 0:13631b50eae6 211 uint8_t int2_diff5 : 1;
cparata 0:13631b50eae6 212 uint8_t int2_ovr : 1;
cparata 0:13631b50eae6 213 uint8_t int2_drdy_t : 1;
cparata 0:13631b50eae6 214 uint8_t int2_boot : 1;
cparata 0:13631b50eae6 215 uint8_t int2_sleep_chg : 1;
cparata 0:13631b50eae6 216 uint8_t int2_sleep_state : 1;
cparata 0:13631b50eae6 217 } iis2dlpc_ctrl5_int2_pad_ctrl_t;
cparata 0:13631b50eae6 218
cparata 0:13631b50eae6 219 #define IIS2DLPC_CTRL6 0x25U
cparata 0:13631b50eae6 220 typedef struct {
cparata 0:13631b50eae6 221 uint8_t not_used_01 : 2;
cparata 0:13631b50eae6 222 uint8_t low_noise : 1;
cparata 0:13631b50eae6 223 uint8_t fds : 1;
cparata 0:13631b50eae6 224 uint8_t fs : 2;
cparata 0:13631b50eae6 225 uint8_t bw_filt : 2;
cparata 0:13631b50eae6 226 } iis2dlpc_ctrl6_t;
cparata 0:13631b50eae6 227
cparata 0:13631b50eae6 228 #define IIS2DLPC_OUT_T 0x26U
cparata 0:13631b50eae6 229 #define IIS2DLPC_STATUS 0x27U
cparata 0:13631b50eae6 230 typedef struct {
cparata 0:13631b50eae6 231 uint8_t drdy : 1;
cparata 0:13631b50eae6 232 uint8_t ff_ia : 1;
cparata 0:13631b50eae6 233 uint8_t _6d_ia : 1;
cparata 0:13631b50eae6 234 uint8_t single_tap : 1;
cparata 0:13631b50eae6 235 uint8_t double_tap : 1;
cparata 0:13631b50eae6 236 uint8_t sleep_state : 1;
cparata 0:13631b50eae6 237 uint8_t wu_ia : 1;
cparata 0:13631b50eae6 238 uint8_t fifo_ths : 1;
cparata 0:13631b50eae6 239 } iis2dlpc_status_t;
cparata 0:13631b50eae6 240
cparata 0:13631b50eae6 241 #define IIS2DLPC_OUT_X_L 0x28U
cparata 0:13631b50eae6 242 #define IIS2DLPC_OUT_X_H 0x29U
cparata 0:13631b50eae6 243 #define IIS2DLPC_OUT_Y_L 0x2AU
cparata 0:13631b50eae6 244 #define IIS2DLPC_OUT_Y_H 0x2BU
cparata 0:13631b50eae6 245 #define IIS2DLPC_OUT_Z_L 0x2CU
cparata 0:13631b50eae6 246 #define IIS2DLPC_OUT_Z_H 0x2DU
cparata 0:13631b50eae6 247 #define IIS2DLPC_FIFO_CTRL 0x2EU
cparata 0:13631b50eae6 248 typedef struct {
cparata 0:13631b50eae6 249 uint8_t fth : 5;
cparata 0:13631b50eae6 250 uint8_t fmode : 3;
cparata 0:13631b50eae6 251 } iis2dlpc_fifo_ctrl_t;
cparata 0:13631b50eae6 252
cparata 0:13631b50eae6 253 #define IIS2DLPC_FIFO_SAMPLES 0x2FU
cparata 0:13631b50eae6 254 typedef struct {
cparata 0:13631b50eae6 255 uint8_t diff : 6;
cparata 0:13631b50eae6 256 uint8_t fifo_ovr : 1;
cparata 0:13631b50eae6 257 uint8_t fifo_fth : 1;
cparata 0:13631b50eae6 258 } iis2dlpc_fifo_samples_t;
cparata 0:13631b50eae6 259
cparata 0:13631b50eae6 260 #define IIS2DLPC_TAP_THS_X 0x30U
cparata 0:13631b50eae6 261 typedef struct {
cparata 0:13631b50eae6 262 uint8_t tap_thsx : 5;
cparata 0:13631b50eae6 263 uint8_t _6d_ths : 2;
cparata 0:13631b50eae6 264 uint8_t _4d_en : 1;
cparata 0:13631b50eae6 265 } iis2dlpc_tap_ths_x_t;
cparata 0:13631b50eae6 266
cparata 0:13631b50eae6 267 #define IIS2DLPC_TAP_THS_Y 0x31U
cparata 0:13631b50eae6 268 typedef struct {
cparata 0:13631b50eae6 269 uint8_t tap_thsy : 5;
cparata 0:13631b50eae6 270 uint8_t tap_prior : 3;
cparata 0:13631b50eae6 271 } iis2dlpc_tap_ths_y_t;
cparata 0:13631b50eae6 272
cparata 0:13631b50eae6 273 #define IIS2DLPC_TAP_THS_Z 0x32U
cparata 0:13631b50eae6 274 typedef struct {
cparata 0:13631b50eae6 275 uint8_t tap_thsz : 5;
cparata 0:13631b50eae6 276 uint8_t tap_z_en : 1;
cparata 0:13631b50eae6 277 uint8_t tap_y_en : 1;
cparata 0:13631b50eae6 278 uint8_t tap_x_en : 1;
cparata 0:13631b50eae6 279 } iis2dlpc_tap_ths_z_t;
cparata 0:13631b50eae6 280
cparata 0:13631b50eae6 281 #define IIS2DLPC_INT_DUR 0x33U
cparata 0:13631b50eae6 282 typedef struct {
cparata 0:13631b50eae6 283 uint8_t shock : 2;
cparata 0:13631b50eae6 284 uint8_t quiet : 2;
cparata 0:13631b50eae6 285 uint8_t latency : 4;
cparata 0:13631b50eae6 286 } iis2dlpc_int_dur_t;
cparata 0:13631b50eae6 287
cparata 0:13631b50eae6 288 #define IIS2DLPC_WAKE_UP_THS 0x34U
cparata 0:13631b50eae6 289 typedef struct {
cparata 0:13631b50eae6 290 uint8_t wk_ths : 6;
cparata 0:13631b50eae6 291 uint8_t sleep_on : 1;
cparata 0:13631b50eae6 292 uint8_t single_double_tap : 1;
cparata 0:13631b50eae6 293 } iis2dlpc_wake_up_ths_t;
cparata 0:13631b50eae6 294
cparata 0:13631b50eae6 295 #define IIS2DLPC_WAKE_UP_DUR 0x35U
cparata 0:13631b50eae6 296 typedef struct {
cparata 0:13631b50eae6 297 uint8_t sleep_dur : 4;
cparata 0:13631b50eae6 298 uint8_t stationary : 1;
cparata 0:13631b50eae6 299 uint8_t wake_dur : 2;
cparata 0:13631b50eae6 300 uint8_t ff_dur : 1;
cparata 0:13631b50eae6 301 } iis2dlpc_wake_up_dur_t;
cparata 0:13631b50eae6 302
cparata 0:13631b50eae6 303 #define IIS2DLPC_FREE_FALL 0x36U
cparata 0:13631b50eae6 304 typedef struct {
cparata 0:13631b50eae6 305 uint8_t ff_ths : 3;
cparata 0:13631b50eae6 306 uint8_t ff_dur : 5;
cparata 0:13631b50eae6 307 } iis2dlpc_free_fall_t;
cparata 0:13631b50eae6 308
cparata 0:13631b50eae6 309 #define IIS2DLPC_STATUS_DUP 0x37U
cparata 0:13631b50eae6 310 typedef struct {
cparata 0:13631b50eae6 311 uint8_t drdy : 1;
cparata 0:13631b50eae6 312 uint8_t ff_ia : 1;
cparata 0:13631b50eae6 313 uint8_t _6d_ia : 1;
cparata 0:13631b50eae6 314 uint8_t single_tap : 1;
cparata 0:13631b50eae6 315 uint8_t double_tap : 1;
cparata 0:13631b50eae6 316 uint8_t sleep_state_ia : 1;
cparata 0:13631b50eae6 317 uint8_t drdy_t : 1;
cparata 0:13631b50eae6 318 uint8_t ovr : 1;
cparata 0:13631b50eae6 319 } iis2dlpc_status_dup_t;
cparata 0:13631b50eae6 320
cparata 0:13631b50eae6 321 #define IIS2DLPC_WAKE_UP_SRC 0x38U
cparata 0:13631b50eae6 322 typedef struct {
cparata 0:13631b50eae6 323 uint8_t z_wu : 1;
cparata 0:13631b50eae6 324 uint8_t y_wu : 1;
cparata 0:13631b50eae6 325 uint8_t x_wu : 1;
cparata 0:13631b50eae6 326 uint8_t wu_ia : 1;
cparata 0:13631b50eae6 327 uint8_t sleep_state_ia : 1;
cparata 0:13631b50eae6 328 uint8_t ff_ia : 1;
cparata 0:13631b50eae6 329 uint8_t not_used_01 : 2;
cparata 0:13631b50eae6 330 } iis2dlpc_wake_up_src_t;
cparata 0:13631b50eae6 331
cparata 0:13631b50eae6 332 #define IIS2DLPC_TAP_SRC 0x39U
cparata 0:13631b50eae6 333 typedef struct {
cparata 0:13631b50eae6 334 uint8_t z_tap : 1;
cparata 0:13631b50eae6 335 uint8_t y_tap : 1;
cparata 0:13631b50eae6 336 uint8_t x_tap : 1;
cparata 0:13631b50eae6 337 uint8_t tap_sign : 1;
cparata 0:13631b50eae6 338 uint8_t double_tap : 1;
cparata 0:13631b50eae6 339 uint8_t single_tap : 1;
cparata 0:13631b50eae6 340 uint8_t tap_ia : 1;
cparata 0:13631b50eae6 341 uint8_t not_used_01 : 1;
cparata 0:13631b50eae6 342 } iis2dlpc_tap_src_t;
cparata 0:13631b50eae6 343
cparata 0:13631b50eae6 344 #define IIS2DLPC_SIXD_SRC 0x3AU
cparata 0:13631b50eae6 345 typedef struct {
cparata 0:13631b50eae6 346 uint8_t xl : 1;
cparata 0:13631b50eae6 347 uint8_t xh : 1;
cparata 0:13631b50eae6 348 uint8_t yl : 1;
cparata 0:13631b50eae6 349 uint8_t yh : 1;
cparata 0:13631b50eae6 350 uint8_t zl : 1;
cparata 0:13631b50eae6 351 uint8_t zh : 1;
cparata 0:13631b50eae6 352 uint8_t _6d_ia : 1;
cparata 0:13631b50eae6 353 uint8_t not_used_01 : 1;
cparata 0:13631b50eae6 354 } iis2dlpc_sixd_src_t;
cparata 0:13631b50eae6 355
cparata 0:13631b50eae6 356 #define IIS2DLPC_ALL_INT_SRC 0x3BU
cparata 0:13631b50eae6 357 typedef struct {
cparata 0:13631b50eae6 358 uint8_t ff_ia : 1;
cparata 0:13631b50eae6 359 uint8_t wu_ia : 1;
cparata 0:13631b50eae6 360 uint8_t single_tap : 1;
cparata 0:13631b50eae6 361 uint8_t double_tap : 1;
cparata 0:13631b50eae6 362 uint8_t _6d_ia : 1;
cparata 0:13631b50eae6 363 uint8_t sleep_change_ia : 1;
cparata 0:13631b50eae6 364 uint8_t not_used_01 : 2;
cparata 0:13631b50eae6 365 } iis2dlpc_all_int_src_t;
cparata 0:13631b50eae6 366
cparata 0:13631b50eae6 367 #define IIS2DLPC_X_OFS_USR 0x3CU
cparata 0:13631b50eae6 368 #define IIS2DLPC_Y_OFS_USR 0x3DU
cparata 0:13631b50eae6 369 #define IIS2DLPC_Z_OFS_USR 0x3EU
cparata 0:13631b50eae6 370 #define IIS2DLPC_CTRL_REG7 0x3FU
cparata 0:13631b50eae6 371 typedef struct {
cparata 0:13631b50eae6 372 uint8_t lpass_on6d : 1;
cparata 0:13631b50eae6 373 uint8_t hp_ref_mode : 1;
cparata 0:13631b50eae6 374 uint8_t usr_off_w : 1;
cparata 0:13631b50eae6 375 uint8_t usr_off_on_wu : 1;
cparata 0:13631b50eae6 376 uint8_t usr_off_on_out : 1;
cparata 0:13631b50eae6 377 uint8_t interrupts_enable : 1;
cparata 0:13631b50eae6 378 uint8_t int2_on_int1 : 1;
cparata 0:13631b50eae6 379 uint8_t drdy_pulsed : 1;
cparata 0:13631b50eae6 380 } iis2dlpc_ctrl_reg7_t;
cparata 0:13631b50eae6 381
cparata 0:13631b50eae6 382 /**
cparata 0:13631b50eae6 383 * @defgroup IIS2DLPC_Register_Union
cparata 0:13631b50eae6 384 * @brief This union group all the registers that has a bitfield
cparata 0:13631b50eae6 385 * description.
cparata 0:13631b50eae6 386 * This union is usefull but not need by the driver.
cparata 0:13631b50eae6 387 *
cparata 0:13631b50eae6 388 * REMOVING this union you are complient with:
cparata 0:13631b50eae6 389 * MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata 0:13631b50eae6 390 *
cparata 0:13631b50eae6 391 * @{
cparata 0:13631b50eae6 392 *
cparata 0:13631b50eae6 393 */
cparata 0:13631b50eae6 394 typedef union{
cparata 0:13631b50eae6 395 iis2dlpc_ctrl1_t ctrl1;
cparata 0:13631b50eae6 396 iis2dlpc_ctrl2_t ctrl2;
cparata 0:13631b50eae6 397 iis2dlpc_ctrl3_t ctrl3;
cparata 0:13631b50eae6 398 iis2dlpc_ctrl4_int1_pad_ctrl_t ctrl4_int1_pad_ctrl;
cparata 0:13631b50eae6 399 iis2dlpc_ctrl5_int2_pad_ctrl_t ctrl5_int2_pad_ctrl;
cparata 0:13631b50eae6 400 iis2dlpc_ctrl6_t ctrl6;
cparata 0:13631b50eae6 401 iis2dlpc_status_t status;
cparata 0:13631b50eae6 402 iis2dlpc_fifo_ctrl_t fifo_ctrl;
cparata 0:13631b50eae6 403 iis2dlpc_fifo_samples_t fifo_samples;
cparata 0:13631b50eae6 404 iis2dlpc_tap_ths_x_t tap_ths_x;
cparata 0:13631b50eae6 405 iis2dlpc_tap_ths_y_t tap_ths_y;
cparata 0:13631b50eae6 406 iis2dlpc_tap_ths_z_t tap_ths_z;
cparata 0:13631b50eae6 407 iis2dlpc_int_dur_t int_dur;
cparata 0:13631b50eae6 408 iis2dlpc_wake_up_ths_t wake_up_ths;
cparata 0:13631b50eae6 409 iis2dlpc_wake_up_dur_t wake_up_dur;
cparata 0:13631b50eae6 410 iis2dlpc_free_fall_t free_fall;
cparata 0:13631b50eae6 411 iis2dlpc_status_dup_t status_dup;
cparata 0:13631b50eae6 412 iis2dlpc_wake_up_src_t wake_up_src;
cparata 0:13631b50eae6 413 iis2dlpc_tap_src_t tap_src;
cparata 0:13631b50eae6 414 iis2dlpc_sixd_src_t sixd_src;
cparata 0:13631b50eae6 415 iis2dlpc_all_int_src_t all_int_src;
cparata 0:13631b50eae6 416 iis2dlpc_ctrl_reg7_t ctrl_reg7;
cparata 0:13631b50eae6 417 bitwise_t bitwise;
cparata 0:13631b50eae6 418 uint8_t byte;
cparata 0:13631b50eae6 419 } iis2dlpc_reg_t;
cparata 0:13631b50eae6 420
cparata 0:13631b50eae6 421 /**
cparata 0:13631b50eae6 422 * @}
cparata 0:13631b50eae6 423 *
cparata 0:13631b50eae6 424 */
cparata 0:13631b50eae6 425
cparata 0:13631b50eae6 426 int32_t iis2dlpc_read_reg(iis2dlpc_ctx_t *ctx, uint8_t reg, uint8_t* data,
cparata 0:13631b50eae6 427 uint16_t len);
cparata 0:13631b50eae6 428 int32_t iis2dlpc_write_reg(iis2dlpc_ctx_t *ctx, uint8_t reg, uint8_t* data,
cparata 0:13631b50eae6 429 uint16_t len);
cparata 0:13631b50eae6 430
cparata 0:13631b50eae6 431 extern float iis2dlpc_from_fs2_to_mg(int16_t lsb);
cparata 0:13631b50eae6 432 extern float iis2dlpc_from_fs4_to_mg(int16_t lsb);
cparata 0:13631b50eae6 433 extern float iis2dlpc_from_fs8_to_mg(int16_t lsb);
cparata 0:13631b50eae6 434 extern float iis2dlpc_from_fs16_to_mg(int16_t lsb);
cparata 0:13631b50eae6 435 extern float iis2dlpc_from_fs2_lp1_to_mg(int16_t lsb);
cparata 0:13631b50eae6 436 extern float iis2dlpc_from_fs4_lp1_to_mg(int16_t lsb);
cparata 0:13631b50eae6 437 extern float iis2dlpc_from_fs8_lp1_to_mg(int16_t lsb);
cparata 0:13631b50eae6 438 extern float iis2dlpc_from_fs16_lp1_to_mg(int16_t lsb);
cparata 0:13631b50eae6 439 extern float iis2dlpc_from_lsb_to_celsius(int16_t lsb);
cparata 0:13631b50eae6 440
cparata 0:13631b50eae6 441 typedef enum {
cparata 0:13631b50eae6 442 IIS2DLPC_HIGH_PERFORMANCE = 0x04,
cparata 0:13631b50eae6 443 IIS2DLPC_CONT_LOW_PWR_4 = 0x03,
cparata 0:13631b50eae6 444 IIS2DLPC_CONT_LOW_PWR_3 = 0x02,
cparata 0:13631b50eae6 445 IIS2DLPC_CONT_LOW_PWR_2 = 0x01,
cparata 0:13631b50eae6 446 IIS2DLPC_CONT_LOW_PWR_12bit = 0x00,
cparata 0:13631b50eae6 447 IIS2DLPC_SINGLE_LOW_PWR_4 = 0x0B,
cparata 0:13631b50eae6 448 IIS2DLPC_SINGLE_LOW_PWR_3 = 0x0A,
cparata 0:13631b50eae6 449 IIS2DLPC_SINGLE_LOW_PWR_2 = 0x09,
cparata 0:13631b50eae6 450 IIS2DLPC_SINGLE_LOW_PWR_12bit = 0x08,
cparata 0:13631b50eae6 451 IIS2DLPC_HIGH_PERFORMANCE_LOW_NOISE = 0x14,
cparata 0:13631b50eae6 452 IIS2DLPC_CONT_LOW_PWR_LOW_NOISE_4 = 0x13,
cparata 0:13631b50eae6 453 IIS2DLPC_CONT_LOW_PWR_LOW_NOISE_3 = 0x12,
cparata 0:13631b50eae6 454 IIS2DLPC_CONT_LOW_PWR_LOW_NOISE_2 = 0x11,
cparata 0:13631b50eae6 455 IIS2DLPC_CONT_LOW_PWR_LOW_NOISE_12bit = 0x10,
cparata 0:13631b50eae6 456 IIS2DLPC_SINGLE_LOW_PWR_LOW_NOISE_4 = 0x1B,
cparata 0:13631b50eae6 457 IIS2DLPC_SINGLE_LOW_PWR_LOW_NOISE_3 = 0x1A,
cparata 0:13631b50eae6 458 IIS2DLPC_SINGLE_LOW_PWR_LOW_NOISE_2 = 0x19,
cparata 0:13631b50eae6 459 IIS2DLPC_SINGLE_LOW_LOW_NOISE_PWR_12bit = 0x18,
cparata 0:13631b50eae6 460 } iis2dlpc_mode_t;
cparata 0:13631b50eae6 461 int32_t iis2dlpc_power_mode_set(iis2dlpc_ctx_t *ctx, iis2dlpc_mode_t val);
cparata 0:13631b50eae6 462 int32_t iis2dlpc_power_mode_get(iis2dlpc_ctx_t *ctx, iis2dlpc_mode_t *val);
cparata 0:13631b50eae6 463
cparata 0:13631b50eae6 464 typedef enum {
cparata 0:13631b50eae6 465 IIS2DLPC_XL_ODR_OFF = 0x00,
cparata 0:13631b50eae6 466 IIS2DLPC_XL_ODR_1Hz6_LP_ONLY = 0x01,
cparata 0:13631b50eae6 467 IIS2DLPC_XL_ODR_12Hz5 = 0x02,
cparata 0:13631b50eae6 468 IIS2DLPC_XL_ODR_25Hz = 0x03,
cparata 0:13631b50eae6 469 IIS2DLPC_XL_ODR_50Hz = 0x04,
cparata 0:13631b50eae6 470 IIS2DLPC_XL_ODR_100Hz = 0x05,
cparata 0:13631b50eae6 471 IIS2DLPC_XL_ODR_200Hz = 0x06,
cparata 0:13631b50eae6 472 IIS2DLPC_XL_ODR_400Hz = 0x07,
cparata 0:13631b50eae6 473 IIS2DLPC_XL_ODR_800Hz = 0x08,
cparata 0:13631b50eae6 474 IIS2DLPC_XL_ODR_1k6Hz = 0x09,
cparata 0:13631b50eae6 475 IIS2DLPC_XL_SET_SW_TRIG = 0x10, /* Use this only in SINGLE mode */
cparata 0:13631b50eae6 476 IIS2DLPC_XL_SET_PIN_TRIG = 0x20, /* Use this only in SINGLE mode */
cparata 0:13631b50eae6 477 } iis2dlpc_odr_t;
cparata 0:13631b50eae6 478 int32_t iis2dlpc_data_rate_set(iis2dlpc_ctx_t *ctx, iis2dlpc_odr_t val);
cparata 0:13631b50eae6 479 int32_t iis2dlpc_data_rate_get(iis2dlpc_ctx_t *ctx, iis2dlpc_odr_t *val);
cparata 0:13631b50eae6 480
cparata 0:13631b50eae6 481 int32_t iis2dlpc_block_data_update_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 482 int32_t iis2dlpc_block_data_update_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 483
cparata 0:13631b50eae6 484 typedef enum {
cparata 0:13631b50eae6 485 IIS2DLPC_2g = 0,
cparata 0:13631b50eae6 486 IIS2DLPC_4g = 1,
cparata 0:13631b50eae6 487 IIS2DLPC_8g = 2,
cparata 0:13631b50eae6 488 IIS2DLPC_16g = 3,
cparata 0:13631b50eae6 489 } iis2dlpc_fs_t;
cparata 0:13631b50eae6 490 int32_t iis2dlpc_full_scale_set(iis2dlpc_ctx_t *ctx, iis2dlpc_fs_t val);
cparata 0:13631b50eae6 491 int32_t iis2dlpc_full_scale_get(iis2dlpc_ctx_t *ctx, iis2dlpc_fs_t *val);
cparata 0:13631b50eae6 492
cparata 0:13631b50eae6 493 int32_t iis2dlpc_status_reg_get(iis2dlpc_ctx_t *ctx, iis2dlpc_status_t *val);
cparata 0:13631b50eae6 494
cparata 0:13631b50eae6 495 int32_t iis2dlpc_flag_data_ready_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 496
cparata 0:13631b50eae6 497 typedef struct{
cparata 0:13631b50eae6 498 iis2dlpc_status_dup_t status_dup;
cparata 0:13631b50eae6 499 iis2dlpc_wake_up_src_t wake_up_src;
cparata 0:13631b50eae6 500 iis2dlpc_tap_src_t tap_src;
cparata 0:13631b50eae6 501 iis2dlpc_sixd_src_t sixd_src;
cparata 0:13631b50eae6 502 iis2dlpc_all_int_src_t all_int_src;
cparata 0:13631b50eae6 503 } iis2dlpc_all_sources_t;
cparata 0:13631b50eae6 504 int32_t iis2dlpc_all_sources_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 505 iis2dlpc_all_sources_t *val);
cparata 0:13631b50eae6 506
cparata 0:13631b50eae6 507 int32_t iis2dlpc_usr_offset_x_set(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 508 int32_t iis2dlpc_usr_offset_x_get(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 509
cparata 0:13631b50eae6 510 int32_t iis2dlpc_usr_offset_y_set(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 511 int32_t iis2dlpc_usr_offset_y_get(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 512
cparata 0:13631b50eae6 513 int32_t iis2dlpc_usr_offset_z_set(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 514 int32_t iis2dlpc_usr_offset_z_get(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 515
cparata 0:13631b50eae6 516 typedef enum {
cparata 0:13631b50eae6 517 IIS2DLPC_LSb_977ug = 0,
cparata 0:13631b50eae6 518 IIS2DLPC_LSb_15mg6 = 1,
cparata 0:13631b50eae6 519 } iis2dlpc_usr_off_w_t;
cparata 0:13631b50eae6 520 int32_t iis2dlpc_offset_weight_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 521 iis2dlpc_usr_off_w_t val);
cparata 0:13631b50eae6 522 int32_t iis2dlpc_offset_weight_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 523 iis2dlpc_usr_off_w_t *val);
cparata 0:13631b50eae6 524
cparata 0:13631b50eae6 525 int32_t iis2dlpc_temperature_raw_get(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 526
cparata 0:13631b50eae6 527 int32_t iis2dlpc_acceleration_raw_get(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 528
cparata 0:13631b50eae6 529 int32_t iis2dlpc_device_id_get(iis2dlpc_ctx_t *ctx, uint8_t *buff);
cparata 0:13631b50eae6 530
cparata 0:13631b50eae6 531 int32_t iis2dlpc_auto_increment_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 532 int32_t iis2dlpc_auto_increment_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 533
cparata 0:13631b50eae6 534 int32_t iis2dlpc_reset_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 535 int32_t iis2dlpc_reset_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 536
cparata 0:13631b50eae6 537 int32_t iis2dlpc_boot_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 538 int32_t iis2dlpc_boot_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 539
cparata 0:13631b50eae6 540 typedef enum {
cparata 0:13631b50eae6 541 IIS2DLPC_XL_ST_DISABLE = 0,
cparata 0:13631b50eae6 542 IIS2DLPC_XL_ST_POSITIVE = 1,
cparata 0:13631b50eae6 543 IIS2DLPC_XL_ST_NEGATIVE = 2,
cparata 0:13631b50eae6 544 } iis2dlpc_st_t;
cparata 0:13631b50eae6 545 int32_t iis2dlpc_self_test_set(iis2dlpc_ctx_t *ctx, iis2dlpc_st_t val);
cparata 0:13631b50eae6 546 int32_t iis2dlpc_self_test_get(iis2dlpc_ctx_t *ctx, iis2dlpc_st_t *val);
cparata 0:13631b50eae6 547
cparata 0:13631b50eae6 548 typedef enum {
cparata 0:13631b50eae6 549 IIS2DLPC_DRDY_LATCHED = 0,
cparata 0:13631b50eae6 550 IIS2DLPC_DRDY_PULSED = 1,
cparata 0:13631b50eae6 551 } iis2dlpc_drdy_pulsed_t;
cparata 0:13631b50eae6 552 int32_t iis2dlpc_data_ready_mode_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 553 iis2dlpc_drdy_pulsed_t val);
cparata 0:13631b50eae6 554 int32_t iis2dlpc_data_ready_mode_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 555 iis2dlpc_drdy_pulsed_t *val);
cparata 0:13631b50eae6 556
cparata 0:13631b50eae6 557 typedef enum {
cparata 0:13631b50eae6 558 IIS2DLPC_LPF_ON_OUT = 0x00,
cparata 0:13631b50eae6 559 IIS2DLPC_USER_OFFSET_ON_OUT = 0x01,
cparata 0:13631b50eae6 560 IIS2DLPC_HIGH_PASS_ON_OUT = 0x10,
cparata 0:13631b50eae6 561 } iis2dlpc_fds_t;
cparata 0:13631b50eae6 562 int32_t iis2dlpc_filter_path_set(iis2dlpc_ctx_t *ctx, iis2dlpc_fds_t val);
cparata 0:13631b50eae6 563 int32_t iis2dlpc_filter_path_get(iis2dlpc_ctx_t *ctx, iis2dlpc_fds_t *val);
cparata 0:13631b50eae6 564
cparata 0:13631b50eae6 565 typedef enum {
cparata 0:13631b50eae6 566 IIS2DLPC_ODR_DIV_2 = 0,
cparata 0:13631b50eae6 567 IIS2DLPC_ODR_DIV_4 = 1,
cparata 0:13631b50eae6 568 IIS2DLPC_ODR_DIV_10 = 2,
cparata 0:13631b50eae6 569 IIS2DLPC_ODR_DIV_20 = 3,
cparata 0:13631b50eae6 570 } iis2dlpc_bw_filt_t;
cparata 0:13631b50eae6 571 int32_t iis2dlpc_filter_bandwidth_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 572 iis2dlpc_bw_filt_t val);
cparata 0:13631b50eae6 573 int32_t iis2dlpc_filter_bandwidth_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 574 iis2dlpc_bw_filt_t *val);
cparata 0:13631b50eae6 575
cparata 0:13631b50eae6 576 int32_t iis2dlpc_reference_mode_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 577 int32_t iis2dlpc_reference_mode_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 578
cparata 0:13631b50eae6 579 typedef enum {
cparata 0:13631b50eae6 580 IIS2DLPC_SPI_4_WIRE = 0,
cparata 0:13631b50eae6 581 IIS2DLPC_SPI_3_WIRE = 1,
cparata 0:13631b50eae6 582 } iis2dlpc_sim_t;
cparata 0:13631b50eae6 583 int32_t iis2dlpc_spi_mode_set(iis2dlpc_ctx_t *ctx, iis2dlpc_sim_t val);
cparata 0:13631b50eae6 584 int32_t iis2dlpc_spi_mode_get(iis2dlpc_ctx_t *ctx, iis2dlpc_sim_t *val);
cparata 0:13631b50eae6 585
cparata 0:13631b50eae6 586 typedef enum {
cparata 0:13631b50eae6 587 IIS2DLPC_I2C_ENABLE = 0,
cparata 0:13631b50eae6 588 IIS2DLPC_I2C_DISABLE = 1,
cparata 0:13631b50eae6 589 } iis2dlpc_i2c_disable_t;
cparata 0:13631b50eae6 590 int32_t iis2dlpc_i2c_interface_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 591 iis2dlpc_i2c_disable_t val);
cparata 0:13631b50eae6 592 int32_t iis2dlpc_i2c_interface_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 593 iis2dlpc_i2c_disable_t *val);
cparata 0:13631b50eae6 594
cparata 0:13631b50eae6 595 typedef enum {
cparata 0:13631b50eae6 596 IIS2DLPC_PULL_UP_CONNECT = 0,
cparata 0:13631b50eae6 597 IIS2DLPC_PULL_UP_DISCONNECT = 1,
cparata 0:13631b50eae6 598 } iis2dlpc_cs_pu_disc_t;
cparata 0:13631b50eae6 599 int32_t iis2dlpc_cs_mode_set(iis2dlpc_ctx_t *ctx, iis2dlpc_cs_pu_disc_t val);
cparata 0:13631b50eae6 600 int32_t iis2dlpc_cs_mode_get(iis2dlpc_ctx_t *ctx, iis2dlpc_cs_pu_disc_t *val);
cparata 0:13631b50eae6 601
cparata 0:13631b50eae6 602 typedef enum {
cparata 0:13631b50eae6 603 IIS2DLPC_ACTIVE_HIGH = 0,
cparata 0:13631b50eae6 604 IIS2DLPC_ACTIVE_LOW = 1,
cparata 0:13631b50eae6 605 } iis2dlpc_h_lactive_t;
cparata 0:13631b50eae6 606 int32_t iis2dlpc_pin_polarity_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 607 iis2dlpc_h_lactive_t val);
cparata 0:13631b50eae6 608 int32_t iis2dlpc_pin_polarity_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 609 iis2dlpc_h_lactive_t *val);
cparata 0:13631b50eae6 610
cparata 0:13631b50eae6 611 typedef enum {
cparata 0:13631b50eae6 612 IIS2DLPC_INT_PULSED = 0,
cparata 0:13631b50eae6 613 IIS2DLPC_INT_LATCHED = 1,
cparata 0:13631b50eae6 614 } iis2dlpc_lir_t;
cparata 0:13631b50eae6 615 int32_t iis2dlpc_int_notification_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 616 iis2dlpc_lir_t val);
cparata 0:13631b50eae6 617 int32_t iis2dlpc_int_notification_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 618 iis2dlpc_lir_t *val);
cparata 0:13631b50eae6 619
cparata 0:13631b50eae6 620 typedef enum {
cparata 0:13631b50eae6 621 IIS2DLPC_PUSH_PULL = 0,
cparata 0:13631b50eae6 622 IIS2DLPC_OPEN_DRAIN = 1,
cparata 0:13631b50eae6 623 } iis2dlpc_pp_od_t;
cparata 0:13631b50eae6 624 int32_t iis2dlpc_pin_mode_set(iis2dlpc_ctx_t *ctx, iis2dlpc_pp_od_t val);
cparata 0:13631b50eae6 625 int32_t iis2dlpc_pin_mode_get(iis2dlpc_ctx_t *ctx, iis2dlpc_pp_od_t *val);
cparata 0:13631b50eae6 626
cparata 0:13631b50eae6 627 int32_t iis2dlpc_pin_int1_route_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 628 iis2dlpc_ctrl4_int1_pad_ctrl_t *val);
cparata 0:13631b50eae6 629 int32_t iis2dlpc_pin_int1_route_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 630 iis2dlpc_ctrl4_int1_pad_ctrl_t *val);
cparata 0:13631b50eae6 631
cparata 0:13631b50eae6 632 int32_t iis2dlpc_pin_int2_route_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 633 iis2dlpc_ctrl5_int2_pad_ctrl_t *val);
cparata 0:13631b50eae6 634 int32_t iis2dlpc_pin_int2_route_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 635 iis2dlpc_ctrl5_int2_pad_ctrl_t *val);
cparata 0:13631b50eae6 636
cparata 0:13631b50eae6 637 int32_t iis2dlpc_all_on_int1_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 638 int32_t iis2dlpc_all_on_int1_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 639
cparata 0:13631b50eae6 640 int32_t iis2dlpc_wkup_threshold_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 641 int32_t iis2dlpc_wkup_threshold_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 642
cparata 0:13631b50eae6 643 int32_t iis2dlpc_wkup_dur_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 644 int32_t iis2dlpc_wkup_dur_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 645
cparata 0:13631b50eae6 646 typedef enum {
cparata 0:13631b50eae6 647 IIS2DLPC_HP_FEED = 0,
cparata 0:13631b50eae6 648 IIS2DLPC_USER_OFFSET_FEED = 1,
cparata 0:13631b50eae6 649 } iis2dlpc_usr_off_on_wu_t;
cparata 0:13631b50eae6 650 int32_t iis2dlpc_wkup_feed_data_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 651 iis2dlpc_usr_off_on_wu_t val);
cparata 0:13631b50eae6 652 int32_t iis2dlpc_wkup_feed_data_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 653 iis2dlpc_usr_off_on_wu_t *val);
cparata 0:13631b50eae6 654
cparata 0:13631b50eae6 655 typedef enum {
cparata 0:13631b50eae6 656 IIS2DLPC_NO_DETECTION = 0,
cparata 0:13631b50eae6 657 IIS2DLPC_DETECT_ACT_INACT = 1,
cparata 0:13631b50eae6 658 IIS2DLPC_DETECT_STAT_MOTION = 3,
cparata 0:13631b50eae6 659 } iis2dlpc_sleep_on_t;
cparata 0:13631b50eae6 660 int32_t iis2dlpc_act_mode_set(iis2dlpc_ctx_t *ctx, iis2dlpc_sleep_on_t val);
cparata 0:13631b50eae6 661 int32_t iis2dlpc_act_mode_get(iis2dlpc_ctx_t *ctx, iis2dlpc_sleep_on_t *val);
cparata 0:13631b50eae6 662
cparata 0:13631b50eae6 663 int32_t iis2dlpc_act_sleep_dur_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 664 int32_t iis2dlpc_act_sleep_dur_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 665
cparata 0:13631b50eae6 666 int32_t iis2dlpc_tap_threshold_x_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 667 int32_t iis2dlpc_tap_threshold_x_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 668
cparata 0:13631b50eae6 669 int32_t iis2dlpc_tap_threshold_y_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 670 int32_t iis2dlpc_tap_threshold_y_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 671
cparata 0:13631b50eae6 672 typedef enum {
cparata 0:13631b50eae6 673 IIS2DLPC_XYZ = 0,
cparata 0:13631b50eae6 674 IIS2DLPC_YXZ = 1,
cparata 0:13631b50eae6 675 IIS2DLPC_XZY = 2,
cparata 0:13631b50eae6 676 IIS2DLPC_ZYX = 3,
cparata 0:13631b50eae6 677 IIS2DLPC_YZX = 5,
cparata 0:13631b50eae6 678 IIS2DLPC_ZXY = 6,
cparata 0:13631b50eae6 679 } iis2dlpc_tap_prior_t;
cparata 0:13631b50eae6 680 int32_t iis2dlpc_tap_axis_priority_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 681 iis2dlpc_tap_prior_t val);
cparata 0:13631b50eae6 682 int32_t iis2dlpc_tap_axis_priority_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 683 iis2dlpc_tap_prior_t *val);
cparata 0:13631b50eae6 684
cparata 0:13631b50eae6 685 int32_t iis2dlpc_tap_threshold_z_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 686 int32_t iis2dlpc_tap_threshold_z_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 687
cparata 0:13631b50eae6 688 int32_t iis2dlpc_tap_detection_on_z_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 689 int32_t iis2dlpc_tap_detection_on_z_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 690
cparata 0:13631b50eae6 691 int32_t iis2dlpc_tap_detection_on_y_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 692 int32_t iis2dlpc_tap_detection_on_y_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 693
cparata 0:13631b50eae6 694 int32_t iis2dlpc_tap_detection_on_x_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 695 int32_t iis2dlpc_tap_detection_on_x_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 696
cparata 0:13631b50eae6 697 int32_t iis2dlpc_tap_shock_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 698 int32_t iis2dlpc_tap_shock_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 699
cparata 0:13631b50eae6 700 int32_t iis2dlpc_tap_quiet_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 701 int32_t iis2dlpc_tap_quiet_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 702
cparata 0:13631b50eae6 703 int32_t iis2dlpc_tap_dur_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 704 int32_t iis2dlpc_tap_dur_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 705
cparata 0:13631b50eae6 706 typedef enum {
cparata 0:13631b50eae6 707 IIS2DLPC_ONLY_SINGLE = 0,
cparata 0:13631b50eae6 708 IIS2DLPC_BOTH_SINGLE_DOUBLE = 1,
cparata 0:13631b50eae6 709 } iis2dlpc_single_double_tap_t;
cparata 0:13631b50eae6 710 int32_t iis2dlpc_tap_mode_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 711 iis2dlpc_single_double_tap_t val);
cparata 0:13631b50eae6 712 int32_t iis2dlpc_tap_mode_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 713 iis2dlpc_single_double_tap_t *val);
cparata 0:13631b50eae6 714
cparata 0:13631b50eae6 715 int32_t iis2dlpc_tap_src_get(iis2dlpc_ctx_t *ctx, iis2dlpc_tap_src_t *val);
cparata 0:13631b50eae6 716
cparata 0:13631b50eae6 717 int32_t iis2dlpc_6d_threshold_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 718 int32_t iis2dlpc_6d_threshold_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 719
cparata 0:13631b50eae6 720 int32_t iis2dlpc_4d_mode_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 721 int32_t iis2dlpc_4d_mode_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 722
cparata 0:13631b50eae6 723 int32_t iis2dlpc_6d_src_get(iis2dlpc_ctx_t *ctx, iis2dlpc_sixd_src_t *val);
cparata 0:13631b50eae6 724
cparata 0:13631b50eae6 725 typedef enum {
cparata 0:13631b50eae6 726 IIS2DLPC_ODR_DIV_2_FEED = 0,
cparata 0:13631b50eae6 727 IIS2DLPC_LPF2_FEED = 1,
cparata 0:13631b50eae6 728 } iis2dlpc_lpass_on6d_t;
cparata 0:13631b50eae6 729 int32_t iis2dlpc_6d_feed_data_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 730 iis2dlpc_lpass_on6d_t val);
cparata 0:13631b50eae6 731 int32_t iis2dlpc_6d_feed_data_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 732 iis2dlpc_lpass_on6d_t *val);
cparata 0:13631b50eae6 733
cparata 0:13631b50eae6 734 int32_t iis2dlpc_ff_dur_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 735 int32_t iis2dlpc_ff_dur_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 736
cparata 0:13631b50eae6 737 typedef enum {
cparata 0:13631b50eae6 738 IIS2DLPC_FF_TSH_5LSb_FS2g = 0,
cparata 0:13631b50eae6 739 IIS2DLPC_FF_TSH_7LSb_FS2g = 1,
cparata 0:13631b50eae6 740 IIS2DLPC_FF_TSH_8LSb_FS2g = 2,
cparata 0:13631b50eae6 741 IIS2DLPC_FF_TSH_10LSb_FS2g = 3,
cparata 0:13631b50eae6 742 IIS2DLPC_FF_TSH_11LSb_FS2g = 4,
cparata 0:13631b50eae6 743 IIS2DLPC_FF_TSH_13LSb_FS2g = 5,
cparata 0:13631b50eae6 744 IIS2DLPC_FF_TSH_15LSb_FS2g = 6,
cparata 0:13631b50eae6 745 IIS2DLPC_FF_TSH_16LSb_FS2g = 7,
cparata 0:13631b50eae6 746 } iis2dlpc_ff_ths_t;
cparata 0:13631b50eae6 747 int32_t iis2dlpc_ff_threshold_set(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 748 iis2dlpc_ff_ths_t val);
cparata 0:13631b50eae6 749 int32_t iis2dlpc_ff_threshold_get(iis2dlpc_ctx_t *ctx,
cparata 0:13631b50eae6 750 iis2dlpc_ff_ths_t *val);
cparata 0:13631b50eae6 751
cparata 0:13631b50eae6 752 int32_t iis2dlpc_fifo_watermark_set(iis2dlpc_ctx_t *ctx, uint8_t val);
cparata 0:13631b50eae6 753 int32_t iis2dlpc_fifo_watermark_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 754
cparata 0:13631b50eae6 755 typedef enum {
cparata 0:13631b50eae6 756 IIS2DLPC_BYPASS_MODE = 0,
cparata 0:13631b50eae6 757 IIS2DLPC_FIFO_MODE = 1,
cparata 0:13631b50eae6 758 IIS2DLPC_STREAM_TO_FIFO_MODE = 3,
cparata 0:13631b50eae6 759 IIS2DLPC_BYPASS_TO_STREAM_MODE = 4,
cparata 0:13631b50eae6 760 IIS2DLPC_STREAM_MODE = 6,
cparata 0:13631b50eae6 761 } iis2dlpc_fmode_t;
cparata 0:13631b50eae6 762 int32_t iis2dlpc_fifo_mode_set(iis2dlpc_ctx_t *ctx, iis2dlpc_fmode_t val);
cparata 0:13631b50eae6 763 int32_t iis2dlpc_fifo_mode_get(iis2dlpc_ctx_t *ctx, iis2dlpc_fmode_t *val);
cparata 0:13631b50eae6 764
cparata 0:13631b50eae6 765 int32_t iis2dlpc_fifo_data_level_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 766
cparata 0:13631b50eae6 767 int32_t iis2dlpc_fifo_ovr_flag_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 768
cparata 0:13631b50eae6 769 int32_t iis2dlpc_fifo_wtm_flag_get(iis2dlpc_ctx_t *ctx, uint8_t *val);
cparata 0:13631b50eae6 770
cparata 0:13631b50eae6 771 /**
cparata 0:13631b50eae6 772 * @}
cparata 0:13631b50eae6 773 *
cparata 0:13631b50eae6 774 */
cparata 0:13631b50eae6 775
cparata 0:13631b50eae6 776 #ifdef __cplusplus
cparata 0:13631b50eae6 777 }
cparata 0:13631b50eae6 778 #endif
cparata 0:13631b50eae6 779
cparata 0:13631b50eae6 780 #endif /*IIS2DLPC_REGS_H */
cparata 0:13631b50eae6 781
cparata 0:13631b50eae6 782 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/