ST / BSP_DISCO_H747I

BSP files for STM32H747I-Discovery Copy from ST Cube delivery

Dependents:   DISCO_H747I_LCD_demo DISCO_H747I_AUDIO_demo

STM32H747I-Discovery/stm32h747i_discovery_sdram.c@3:bc403474b366, 2019-11-06 (annotated)

Committer:
Jerome Coutant
Date:
Wed Nov 06 11:32:01 2019 +0100
Revision:
3:bc403474b366
Parent:
0:146cf26a9bbb 
Add PDM lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 0:146cf26a9bbb 1 /**
Jerome Coutant 0:146cf26a9bbb 2 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 3 * @file stm32h747i_discovery_sdram.c
Jerome Coutant 0:146cf26a9bbb 4 * @author MCD Application Team
Jerome Coutant 0:146cf26a9bbb 5 * @brief This file includes the SDRAM driver for the MT48LC4M32B2B5-6A memory
Jerome Coutant 0:146cf26a9bbb 6 * device mounted on STM32H747I-DISCOVERY boards.
Jerome Coutant 0:146cf26a9bbb 7 @verbatim
Jerome Coutant 0:146cf26a9bbb 8 How To use this driver:
Jerome Coutant 0:146cf26a9bbb 9 -----------------------
Jerome Coutant 0:146cf26a9bbb 10 - This driver is used to drive the MT48LC4M32B2B5-6A SDRAM external memory mounted
Jerome Coutant 0:146cf26a9bbb 11 on STM32H747I-DISCOVERY board.
Jerome Coutant 0:146cf26a9bbb 12 - This driver does not need a specific component driver for the SDRAM device
Jerome Coutant 0:146cf26a9bbb 13 to be included with.
Jerome Coutant 0:146cf26a9bbb 14
Jerome Coutant 0:146cf26a9bbb 15 Driver description:
Jerome Coutant 0:146cf26a9bbb 16 ------------------
Jerome Coutant 0:146cf26a9bbb 17 + Initialization steps:
Jerome Coutant 0:146cf26a9bbb 18 o Initialize the SDRAM external memory using the BSP_SDRAM_Init() function. This
Jerome Coutant 0:146cf26a9bbb 19 function includes the MSP layer hardware resources initialization and the
Jerome Coutant 0:146cf26a9bbb 20 FMC controller configuration to interface with the external SDRAM memory.
Jerome Coutant 0:146cf26a9bbb 21 o It contains the SDRAM initialization sequence to program the SDRAM external
Jerome Coutant 0:146cf26a9bbb 22 device using the function BSP_SDRAM_Initialization_sequence(). Note that this
Jerome Coutant 0:146cf26a9bbb 23 sequence is standard for all SDRAM devices, but can include some differences
Jerome Coutant 0:146cf26a9bbb 24 from a device to another. If it is the case, the right sequence should be
Jerome Coutant 0:146cf26a9bbb 25 implemented separately.
Jerome Coutant 0:146cf26a9bbb 26
Jerome Coutant 0:146cf26a9bbb 27 + SDRAM read/write operations
Jerome Coutant 0:146cf26a9bbb 28 o SDRAM external memory can be accessed with read/write operations once it is
Jerome Coutant 0:146cf26a9bbb 29 initialized.
Jerome Coutant 0:146cf26a9bbb 30 Read/write operation can be performed with AHB access using the functions
Jerome Coutant 0:146cf26a9bbb 31 BSP_SDRAM_ReadData()/BSP_SDRAM_WriteData(), or by MDMA transfer using the functions
Jerome Coutant 0:146cf26a9bbb 32 BSP_SDRAM_ReadData_DMA()/BSP_SDRAM_WriteData_DMA().
Jerome Coutant 0:146cf26a9bbb 33 o The AHB access is performed with 32-bit width transaction, the MDMA transfer
Jerome Coutant 0:146cf26a9bbb 34 configuration is fixed at single (no burst) word transfer (see the
Jerome Coutant 0:146cf26a9bbb 35 SDRAM_MspInit() static function).
Jerome Coutant 0:146cf26a9bbb 36 o User can implement his own functions for read/write access with his desired
Jerome Coutant 0:146cf26a9bbb 37 configurations.
Jerome Coutant 0:146cf26a9bbb 38 o If interrupt mode is used for MDMA transfer, the function BSP_SDRAM_MDMA_IRQHandler()
Jerome Coutant 0:146cf26a9bbb 39 is called in IRQ handler file, to serve the generated interrupt once the MDMA
Jerome Coutant 0:146cf26a9bbb 40 transfer is complete.
Jerome Coutant 0:146cf26a9bbb 41 o You can send a command to the SDRAM device in runtime using the function
Jerome Coutant 0:146cf26a9bbb 42 BSP_SDRAM_Sendcmd(), and giving the desired command as parameter chosen between
Jerome Coutant 0:146cf26a9bbb 43 the predefined commands of the "FMC_SDRAM_CommandTypeDef" structure.
Jerome Coutant 0:146cf26a9bbb 44 @endverbatim
Jerome Coutant 0:146cf26a9bbb 45 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 46 * @attention
Jerome Coutant 0:146cf26a9bbb 47 *
Jerome Coutant 0:146cf26a9bbb 48 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
Jerome Coutant 0:146cf26a9bbb 49 * All rights reserved.</center></h2>
Jerome Coutant 0:146cf26a9bbb 50 *
Jerome Coutant 0:146cf26a9bbb 51 * This software component is licensed by ST under BSD 3-Clause license,
Jerome Coutant 0:146cf26a9bbb 52 * the "License"; You may not use this file except in compliance with the
Jerome Coutant 0:146cf26a9bbb 53 * License. You may obtain a copy of the License at:
Jerome Coutant 0:146cf26a9bbb 54 * opensource.org/licenses/BSD-3-Clause
Jerome Coutant 0:146cf26a9bbb 55 *
Jerome Coutant 0:146cf26a9bbb 56 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 57 */
Jerome Coutant 0:146cf26a9bbb 58
Jerome Coutant 0:146cf26a9bbb 59 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 60 #include "stm32h747i_discovery_sdram.h"
Jerome Coutant 0:146cf26a9bbb 61
Jerome Coutant 0:146cf26a9bbb 62 /** @addtogroup BSP
Jerome Coutant 0:146cf26a9bbb 63 * @{
Jerome Coutant 0:146cf26a9bbb 64 */
Jerome Coutant 0:146cf26a9bbb 65
Jerome Coutant 0:146cf26a9bbb 66 /** @addtogroup STM32H747I_DISCOVERY
Jerome Coutant 0:146cf26a9bbb 67 * @{
Jerome Coutant 0:146cf26a9bbb 68 */
Jerome Coutant 0:146cf26a9bbb 69
Jerome Coutant 0:146cf26a9bbb 70 /** @defgroup STM32H747I_DISCOVERY_SDRAM STM32H747I_DISCOVERY_SDRAM
Jerome Coutant 0:146cf26a9bbb 71 * @{
Jerome Coutant 0:146cf26a9bbb 72 */
Jerome Coutant 0:146cf26a9bbb 73
Jerome Coutant 0:146cf26a9bbb 74 /** @defgroup STM32H747I_DISCOVERY_SDRAM_Exported_Variables Exported Variables
Jerome Coutant 0:146cf26a9bbb 75 * @{
Jerome Coutant 0:146cf26a9bbb 76 */
Jerome Coutant 0:146cf26a9bbb 77 SDRAM_HandleTypeDef sdramHandle;
Jerome Coutant 0:146cf26a9bbb 78 /**
Jerome Coutant 0:146cf26a9bbb 79 * @}
Jerome Coutant 0:146cf26a9bbb 80 */
Jerome Coutant 0:146cf26a9bbb 81
Jerome Coutant 0:146cf26a9bbb 82 /** @defgroup STM32H747I_DISCOVERY_SDRAM_Private_Variables Private Variables
Jerome Coutant 0:146cf26a9bbb 83 * @{
Jerome Coutant 0:146cf26a9bbb 84 */
Jerome Coutant 0:146cf26a9bbb 85 static FMC_SDRAM_TimingTypeDef Timing;
Jerome Coutant 0:146cf26a9bbb 86 static FMC_SDRAM_CommandTypeDef Command;
Jerome Coutant 0:146cf26a9bbb 87 /**
Jerome Coutant 0:146cf26a9bbb 88 * @}
Jerome Coutant 0:146cf26a9bbb 89 */
Jerome Coutant 0:146cf26a9bbb 90
Jerome Coutant 0:146cf26a9bbb 91 /** @defgroup STM32H747I_DISCOVERY_SDRAM_Exported_Functions Exported_Functions
Jerome Coutant 0:146cf26a9bbb 92 * @{
Jerome Coutant 0:146cf26a9bbb 93 */
Jerome Coutant 0:146cf26a9bbb 94
Jerome Coutant 0:146cf26a9bbb 95 /**
Jerome Coutant 0:146cf26a9bbb 96 * @brief Initializes the SDRAM device.
Jerome Coutant 0:146cf26a9bbb 97 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 98 */
Jerome Coutant 0:146cf26a9bbb 99 uint8_t BSP_SDRAM_Init(void)
Jerome Coutant 0:146cf26a9bbb 100 {
Jerome Coutant 0:146cf26a9bbb 101 static uint8_t sdramstatus = SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 102 /* SDRAM device configuration */
Jerome Coutant 0:146cf26a9bbb 103 sdramHandle.Instance = FMC_SDRAM_DEVICE;
Jerome Coutant 0:146cf26a9bbb 104
Jerome Coutant 0:146cf26a9bbb 105 /* Timing configuration for 100Mhz as SDRAM clock frequency (System clock is up to 200Mhz) */
Jerome Coutant 0:146cf26a9bbb 106 Timing.LoadToActiveDelay = 2;
Jerome Coutant 0:146cf26a9bbb 107 Timing.ExitSelfRefreshDelay = 7;
Jerome Coutant 0:146cf26a9bbb 108 Timing.SelfRefreshTime = 4;
Jerome Coutant 0:146cf26a9bbb 109 Timing.RowCycleDelay = 7;
Jerome Coutant 0:146cf26a9bbb 110 Timing.WriteRecoveryTime = 2;
Jerome Coutant 0:146cf26a9bbb 111 Timing.RPDelay = 2;
Jerome Coutant 0:146cf26a9bbb 112 Timing.RCDDelay = 2;
Jerome Coutant 0:146cf26a9bbb 113
Jerome Coutant 0:146cf26a9bbb 114 sdramHandle.Init.SDBank = FMC_SDRAM_BANK2;
Jerome Coutant 0:146cf26a9bbb 115 sdramHandle.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9;
Jerome Coutant 0:146cf26a9bbb 116 sdramHandle.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
Jerome Coutant 0:146cf26a9bbb 117 sdramHandle.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH;
Jerome Coutant 0:146cf26a9bbb 118 sdramHandle.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
Jerome Coutant 0:146cf26a9bbb 119 sdramHandle.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
Jerome Coutant 0:146cf26a9bbb 120 sdramHandle.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
Jerome Coutant 0:146cf26a9bbb 121 sdramHandle.Init.SDClockPeriod = SDCLOCK_PERIOD;
Jerome Coutant 0:146cf26a9bbb 122 sdramHandle.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
Jerome Coutant 0:146cf26a9bbb 123 sdramHandle.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
Jerome Coutant 0:146cf26a9bbb 124
Jerome Coutant 0:146cf26a9bbb 125 /* SDRAM controller initialization */
Jerome Coutant 0:146cf26a9bbb 126
Jerome Coutant 0:146cf26a9bbb 127 BSP_SDRAM_MspInit(&sdramHandle, NULL); /* __weak function can be rewritten by the application */
Jerome Coutant 0:146cf26a9bbb 128
Jerome Coutant 0:146cf26a9bbb 129 if(HAL_SDRAM_Init(&sdramHandle, &Timing) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 130 {
Jerome Coutant 0:146cf26a9bbb 131 sdramstatus = SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 132 }
Jerome Coutant 0:146cf26a9bbb 133 else
Jerome Coutant 0:146cf26a9bbb 134 {
Jerome Coutant 0:146cf26a9bbb 135 /* SDRAM initialization sequence */
Jerome Coutant 0:146cf26a9bbb 136 BSP_SDRAM_Initialization_sequence(REFRESH_COUNT);
Jerome Coutant 0:146cf26a9bbb 137 }
Jerome Coutant 0:146cf26a9bbb 138
Jerome Coutant 0:146cf26a9bbb 139 return sdramstatus;
Jerome Coutant 0:146cf26a9bbb 140 }
Jerome Coutant 0:146cf26a9bbb 141
Jerome Coutant 0:146cf26a9bbb 142 /**
Jerome Coutant 0:146cf26a9bbb 143 * @brief DeInitializes the SDRAM device.
Jerome Coutant 0:146cf26a9bbb 144 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 145 */
Jerome Coutant 0:146cf26a9bbb 146 uint8_t BSP_SDRAM_DeInit(void)
Jerome Coutant 0:146cf26a9bbb 147 {
Jerome Coutant 0:146cf26a9bbb 148 static uint8_t sdramstatus = SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 149 /* SDRAM device de-initialization */
Jerome Coutant 0:146cf26a9bbb 150 sdramHandle.Instance = FMC_SDRAM_DEVICE;
Jerome Coutant 0:146cf26a9bbb 151
Jerome Coutant 0:146cf26a9bbb 152 if(HAL_SDRAM_DeInit(&sdramHandle) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 153 {
Jerome Coutant 0:146cf26a9bbb 154 sdramstatus = SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 155 }
Jerome Coutant 0:146cf26a9bbb 156 else
Jerome Coutant 0:146cf26a9bbb 157 {
Jerome Coutant 0:146cf26a9bbb 158 /* SDRAM controller de-initialization */
Jerome Coutant 0:146cf26a9bbb 159 BSP_SDRAM_MspDeInit(&sdramHandle, NULL);
Jerome Coutant 0:146cf26a9bbb 160 }
Jerome Coutant 0:146cf26a9bbb 161
Jerome Coutant 0:146cf26a9bbb 162 return sdramstatus;
Jerome Coutant 0:146cf26a9bbb 163 }
Jerome Coutant 0:146cf26a9bbb 164
Jerome Coutant 0:146cf26a9bbb 165 /**
Jerome Coutant 0:146cf26a9bbb 166 * @brief Programs the SDRAM device.
Jerome Coutant 0:146cf26a9bbb 167 * @param RefreshCount: SDRAM refresh counter value
Jerome Coutant 0:146cf26a9bbb 168 * @retval None
Jerome Coutant 0:146cf26a9bbb 169 */
Jerome Coutant 0:146cf26a9bbb 170 void BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount)
Jerome Coutant 0:146cf26a9bbb 171 {
Jerome Coutant 0:146cf26a9bbb 172 __IO uint32_t tmpmrd = 0;
Jerome Coutant 0:146cf26a9bbb 173
Jerome Coutant 0:146cf26a9bbb 174 /* Step 1: Configure a clock configuration enable command */
Jerome Coutant 0:146cf26a9bbb 175 Command.CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
Jerome Coutant 0:146cf26a9bbb 176 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
Jerome Coutant 0:146cf26a9bbb 177 Command.AutoRefreshNumber = 1;
Jerome Coutant 0:146cf26a9bbb 178 Command.ModeRegisterDefinition = 0;
Jerome Coutant 0:146cf26a9bbb 179
Jerome Coutant 0:146cf26a9bbb 180 /* Send the command */
Jerome Coutant 0:146cf26a9bbb 181 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 0:146cf26a9bbb 182
Jerome Coutant 0:146cf26a9bbb 183 /* Step 2: Insert 100 us minimum delay */
Jerome Coutant 0:146cf26a9bbb 184 /* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
Jerome Coutant 0:146cf26a9bbb 185 HAL_Delay(1);
Jerome Coutant 0:146cf26a9bbb 186
Jerome Coutant 0:146cf26a9bbb 187 /* Step 3: Configure a PALL (precharge all) command */
Jerome Coutant 0:146cf26a9bbb 188 Command.CommandMode = FMC_SDRAM_CMD_PALL;
Jerome Coutant 0:146cf26a9bbb 189 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
Jerome Coutant 0:146cf26a9bbb 190 Command.AutoRefreshNumber = 1;
Jerome Coutant 0:146cf26a9bbb 191 Command.ModeRegisterDefinition = 0;
Jerome Coutant 0:146cf26a9bbb 192
Jerome Coutant 0:146cf26a9bbb 193 /* Send the command */
Jerome Coutant 0:146cf26a9bbb 194 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 0:146cf26a9bbb 195
Jerome Coutant 0:146cf26a9bbb 196 /* Step 4: Configure an Auto Refresh command */
Jerome Coutant 0:146cf26a9bbb 197 Command.CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
Jerome Coutant 0:146cf26a9bbb 198 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
Jerome Coutant 0:146cf26a9bbb 199 Command.AutoRefreshNumber = 8;
Jerome Coutant 0:146cf26a9bbb 200 Command.ModeRegisterDefinition = 0;
Jerome Coutant 0:146cf26a9bbb 201
Jerome Coutant 0:146cf26a9bbb 202 /* Send the command */
Jerome Coutant 0:146cf26a9bbb 203 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 0:146cf26a9bbb 204
Jerome Coutant 0:146cf26a9bbb 205 /* Step 5: Program the external memory mode register */
Jerome Coutant 0:146cf26a9bbb 206 tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |\
Jerome Coutant 0:146cf26a9bbb 207 SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |\
Jerome Coutant 0:146cf26a9bbb 208 SDRAM_MODEREG_CAS_LATENCY_3 |\
Jerome Coutant 0:146cf26a9bbb 209 SDRAM_MODEREG_OPERATING_MODE_STANDARD |\
Jerome Coutant 0:146cf26a9bbb 210 SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
Jerome Coutant 0:146cf26a9bbb 211
Jerome Coutant 0:146cf26a9bbb 212 Command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
Jerome Coutant 0:146cf26a9bbb 213 Command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
Jerome Coutant 0:146cf26a9bbb 214 Command.AutoRefreshNumber = 1;
Jerome Coutant 0:146cf26a9bbb 215 Command.ModeRegisterDefinition = tmpmrd;
Jerome Coutant 0:146cf26a9bbb 216
Jerome Coutant 0:146cf26a9bbb 217 /* Send the command */
Jerome Coutant 0:146cf26a9bbb 218 HAL_SDRAM_SendCommand(&sdramHandle, &Command, SDRAM_TIMEOUT);
Jerome Coutant 0:146cf26a9bbb 219
Jerome Coutant 0:146cf26a9bbb 220 /* Step 6: Set the refresh rate counter */
Jerome Coutant 0:146cf26a9bbb 221 /* Set the device refresh rate */
Jerome Coutant 0:146cf26a9bbb 222 HAL_SDRAM_ProgramRefreshRate(&sdramHandle, RefreshCount);
Jerome Coutant 0:146cf26a9bbb 223 }
Jerome Coutant 0:146cf26a9bbb 224
Jerome Coutant 0:146cf26a9bbb 225 /**
Jerome Coutant 0:146cf26a9bbb 226 * @brief Reads an amount of data from the SDRAM memory in polling mode.
Jerome Coutant 0:146cf26a9bbb 227 * @param uwStartAddress: Read start address
Jerome Coutant 0:146cf26a9bbb 228 * @param pData: Pointer to data to be read
Jerome Coutant 0:146cf26a9bbb 229 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 0:146cf26a9bbb 230 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 231 */
Jerome Coutant 0:146cf26a9bbb 232 uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:146cf26a9bbb 233 {
Jerome Coutant 0:146cf26a9bbb 234 if(HAL_SDRAM_Read_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 235 {
Jerome Coutant 0:146cf26a9bbb 236 return SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 237 }
Jerome Coutant 0:146cf26a9bbb 238 else
Jerome Coutant 0:146cf26a9bbb 239 {
Jerome Coutant 0:146cf26a9bbb 240 return SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 241 }
Jerome Coutant 0:146cf26a9bbb 242 }
Jerome Coutant 0:146cf26a9bbb 243
Jerome Coutant 0:146cf26a9bbb 244 /**
Jerome Coutant 0:146cf26a9bbb 245 * @brief Reads an amount of data from the SDRAM memory in DMA mode.
Jerome Coutant 0:146cf26a9bbb 246 * @param uwStartAddress: Read start address
Jerome Coutant 0:146cf26a9bbb 247 * @param pData: Pointer to data to be read
Jerome Coutant 0:146cf26a9bbb 248 * @param uwDataSize: Size of read data from the memory
Jerome Coutant 0:146cf26a9bbb 249 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 250 */
Jerome Coutant 0:146cf26a9bbb 251 uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:146cf26a9bbb 252 {
Jerome Coutant 0:146cf26a9bbb 253 if(HAL_SDRAM_Read_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 254 {
Jerome Coutant 0:146cf26a9bbb 255 return SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 256 }
Jerome Coutant 0:146cf26a9bbb 257 else
Jerome Coutant 0:146cf26a9bbb 258 {
Jerome Coutant 0:146cf26a9bbb 259 return SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 260 }
Jerome Coutant 0:146cf26a9bbb 261 }
Jerome Coutant 0:146cf26a9bbb 262
Jerome Coutant 0:146cf26a9bbb 263 /**
Jerome Coutant 0:146cf26a9bbb 264 * @brief Writes an amount of data to the SDRAM memory in polling mode.
Jerome Coutant 0:146cf26a9bbb 265 * @param uwStartAddress: Write start address
Jerome Coutant 0:146cf26a9bbb 266 * @param pData: Pointer to data to be written
Jerome Coutant 0:146cf26a9bbb 267 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 0:146cf26a9bbb 268 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 269 */
Jerome Coutant 0:146cf26a9bbb 270 uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:146cf26a9bbb 271 {
Jerome Coutant 0:146cf26a9bbb 272 if(HAL_SDRAM_Write_32b(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 273 {
Jerome Coutant 0:146cf26a9bbb 274 return SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 275 }
Jerome Coutant 0:146cf26a9bbb 276 else
Jerome Coutant 0:146cf26a9bbb 277 {
Jerome Coutant 0:146cf26a9bbb 278 return SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 279 }
Jerome Coutant 0:146cf26a9bbb 280 }
Jerome Coutant 0:146cf26a9bbb 281
Jerome Coutant 0:146cf26a9bbb 282 /**
Jerome Coutant 0:146cf26a9bbb 283 * @brief Writes an amount of data to the SDRAM memory in DMA mode.
Jerome Coutant 0:146cf26a9bbb 284 * @param uwStartAddress: Write start address
Jerome Coutant 0:146cf26a9bbb 285 * @param pData: Pointer to data to be written
Jerome Coutant 0:146cf26a9bbb 286 * @param uwDataSize: Size of written data from the memory
Jerome Coutant 0:146cf26a9bbb 287 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 288 */
Jerome Coutant 0:146cf26a9bbb 289 uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize)
Jerome Coutant 0:146cf26a9bbb 290 {
Jerome Coutant 0:146cf26a9bbb 291 if(HAL_SDRAM_Write_DMA(&sdramHandle, (uint32_t *)uwStartAddress, pData, uwDataSize) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 292 {
Jerome Coutant 0:146cf26a9bbb 293 return SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 294 }
Jerome Coutant 0:146cf26a9bbb 295 else
Jerome Coutant 0:146cf26a9bbb 296 {
Jerome Coutant 0:146cf26a9bbb 297 return SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 298 }
Jerome Coutant 0:146cf26a9bbb 299 }
Jerome Coutant 0:146cf26a9bbb 300
Jerome Coutant 0:146cf26a9bbb 301 /**
Jerome Coutant 0:146cf26a9bbb 302 * @brief Sends command to the SDRAM bank.
Jerome Coutant 0:146cf26a9bbb 303 * @param SdramCmd: Pointer to SDRAM command structure
Jerome Coutant 0:146cf26a9bbb 304 * @retval SDRAM status
Jerome Coutant 0:146cf26a9bbb 305 */
Jerome Coutant 0:146cf26a9bbb 306 uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd)
Jerome Coutant 0:146cf26a9bbb 307 {
Jerome Coutant 0:146cf26a9bbb 308 if(HAL_SDRAM_SendCommand(&sdramHandle, SdramCmd, SDRAM_TIMEOUT) != HAL_OK)
Jerome Coutant 0:146cf26a9bbb 309 {
Jerome Coutant 0:146cf26a9bbb 310 return SDRAM_ERROR;
Jerome Coutant 0:146cf26a9bbb 311 }
Jerome Coutant 0:146cf26a9bbb 312 else
Jerome Coutant 0:146cf26a9bbb 313 {
Jerome Coutant 0:146cf26a9bbb 314 return SDRAM_OK;
Jerome Coutant 0:146cf26a9bbb 315 }
Jerome Coutant 0:146cf26a9bbb 316 }
Jerome Coutant 0:146cf26a9bbb 317
Jerome Coutant 0:146cf26a9bbb 318 /**
Jerome Coutant 0:146cf26a9bbb 319 * @brief Initializes SDRAM MSP.
Jerome Coutant 0:146cf26a9bbb 320 * @param hsdram SDRAM handle
Jerome Coutant 0:146cf26a9bbb 321 * @param Params User parameters
Jerome Coutant 0:146cf26a9bbb 322 * @retval None
Jerome Coutant 0:146cf26a9bbb 323 */
Jerome Coutant 0:146cf26a9bbb 324 __weak void BSP_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram, void *Params)
Jerome Coutant 0:146cf26a9bbb 325 {
Jerome Coutant 0:146cf26a9bbb 326 static MDMA_HandleTypeDef mdma_handle;
Jerome Coutant 0:146cf26a9bbb 327 GPIO_InitTypeDef gpio_init_structure;
Jerome Coutant 0:146cf26a9bbb 328
Jerome Coutant 0:146cf26a9bbb 329 /* Enable FMC clock */
Jerome Coutant 0:146cf26a9bbb 330 __HAL_RCC_FMC_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 331
Jerome Coutant 0:146cf26a9bbb 332 /* Enable chosen MDMAx clock */
Jerome Coutant 0:146cf26a9bbb 333 __MDMAx_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 334
Jerome Coutant 0:146cf26a9bbb 335 /* Enable GPIOs clock */
Jerome Coutant 0:146cf26a9bbb 336 __HAL_RCC_GPIOD_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 337 __HAL_RCC_GPIOE_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 338 __HAL_RCC_GPIOF_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 339 __HAL_RCC_GPIOG_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 340 __HAL_RCC_GPIOH_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 341 __HAL_RCC_GPIOI_CLK_ENABLE();
Jerome Coutant 0:146cf26a9bbb 342
Jerome Coutant 0:146cf26a9bbb 343 /* Common GPIO configuration */
Jerome Coutant 0:146cf26a9bbb 344 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
Jerome Coutant 0:146cf26a9bbb 345 gpio_init_structure.Pull = GPIO_PULLUP;
Jerome Coutant 0:146cf26a9bbb 346 gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
Jerome Coutant 0:146cf26a9bbb 347 gpio_init_structure.Alternate = GPIO_AF12_FMC;
Jerome Coutant 0:146cf26a9bbb 348
Jerome Coutant 0:146cf26a9bbb 349 /* GPIOD configuration */
Jerome Coutant 0:146cf26a9bbb 350 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_8| GPIO_PIN_9 | GPIO_PIN_10 |\
Jerome Coutant 0:146cf26a9bbb 351 GPIO_PIN_14 | GPIO_PIN_15;
Jerome Coutant 0:146cf26a9bbb 352
Jerome Coutant 0:146cf26a9bbb 353
Jerome Coutant 0:146cf26a9bbb 354 HAL_GPIO_Init(GPIOD, &gpio_init_structure);
Jerome Coutant 0:146cf26a9bbb 355
Jerome Coutant 0:146cf26a9bbb 356 /* GPIOE configuration */
Jerome Coutant 0:146cf26a9bbb 357 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_7| GPIO_PIN_8 | GPIO_PIN_9 |\
Jerome Coutant 0:146cf26a9bbb 358 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 0:146cf26a9bbb 359 GPIO_PIN_15;
Jerome Coutant 0:146cf26a9bbb 360
Jerome Coutant 0:146cf26a9bbb 361 HAL_GPIO_Init(GPIOE, &gpio_init_structure);
Jerome Coutant 0:146cf26a9bbb 362
Jerome Coutant 0:146cf26a9bbb 363 /* GPIOF configuration */
Jerome Coutant 0:146cf26a9bbb 364 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2| GPIO_PIN_3 | GPIO_PIN_4 |\
Jerome Coutant 0:146cf26a9bbb 365 GPIO_PIN_5 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 0:146cf26a9bbb 366 GPIO_PIN_15;
Jerome Coutant 0:146cf26a9bbb 367
Jerome Coutant 0:146cf26a9bbb 368 HAL_GPIO_Init(GPIOF, &gpio_init_structure);
Jerome Coutant 0:146cf26a9bbb 369
Jerome Coutant 0:146cf26a9bbb 370 /* GPIOG configuration */
Jerome Coutant 0:146cf26a9bbb 371 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 /*| GPIO_PIN_3 */|\
Jerome Coutant 0:146cf26a9bbb 372 GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_8 | GPIO_PIN_15;
Jerome Coutant 0:146cf26a9bbb 373 HAL_GPIO_Init(GPIOG, &gpio_init_structure);
Jerome Coutant 0:146cf26a9bbb 374
Jerome Coutant 0:146cf26a9bbb 375 /* GPIOH configuration */
Jerome Coutant 0:146cf26a9bbb 376 gpio_init_structure.Pin = GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9 |\
Jerome Coutant 0:146cf26a9bbb 377 GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 |\
Jerome Coutant 0:146cf26a9bbb 378 GPIO_PIN_15;
Jerome Coutant 0:146cf26a9bbb 379 HAL_GPIO_Init(GPIOH, &gpio_init_structure);
Jerome Coutant 0:146cf26a9bbb 380
Jerome Coutant 0:146cf26a9bbb 381 /* GPIOI configuration */
Jerome Coutant 0:146cf26a9bbb 382 gpio_init_structure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 |\
Jerome Coutant 0:146cf26a9bbb 383 GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_9 | GPIO_PIN_10;
Jerome Coutant 0:146cf26a9bbb 384 HAL_GPIO_Init(GPIOI, &gpio_init_structure);
Jerome Coutant 0:146cf26a9bbb 385
Jerome Coutant 0:146cf26a9bbb 386 /* Configure common MDMA parameters */
Jerome Coutant 0:146cf26a9bbb 387 mdma_handle.Init.Request = MDMA_REQUEST_SW;
Jerome Coutant 0:146cf26a9bbb 388 mdma_handle.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
Jerome Coutant 0:146cf26a9bbb 389 mdma_handle.Init.Priority = MDMA_PRIORITY_HIGH;
Jerome Coutant 0:146cf26a9bbb 390 mdma_handle.Init.Endianness = MDMA_LITTLE_ENDIANNESS_PRESERVE;
Jerome Coutant 0:146cf26a9bbb 391 mdma_handle.Init.SourceInc = MDMA_SRC_INC_WORD;
Jerome Coutant 0:146cf26a9bbb 392 mdma_handle.Init.DestinationInc = MDMA_DEST_INC_WORD;
Jerome Coutant 0:146cf26a9bbb 393 mdma_handle.Init.SourceDataSize = MDMA_SRC_DATASIZE_WORD;
Jerome Coutant 0:146cf26a9bbb 394 mdma_handle.Init.DestDataSize = MDMA_DEST_DATASIZE_WORD;
Jerome Coutant 0:146cf26a9bbb 395 mdma_handle.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
Jerome Coutant 0:146cf26a9bbb 396 mdma_handle.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
Jerome Coutant 0:146cf26a9bbb 397 mdma_handle.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
Jerome Coutant 0:146cf26a9bbb 398 mdma_handle.Init.BufferTransferLength = 128;
Jerome Coutant 0:146cf26a9bbb 399 mdma_handle.Init.SourceBlockAddressOffset = 0;
Jerome Coutant 0:146cf26a9bbb 400 mdma_handle.Init.DestBlockAddressOffset = 0;
Jerome Coutant 0:146cf26a9bbb 401
Jerome Coutant 0:146cf26a9bbb 402
Jerome Coutant 0:146cf26a9bbb 403 mdma_handle.Instance = SDRAM_MDMAx_CHANNEL;
Jerome Coutant 0:146cf26a9bbb 404
Jerome Coutant 0:146cf26a9bbb 405 /* Associate the DMA handle */
Jerome Coutant 0:146cf26a9bbb 406 __HAL_LINKDMA(hsdram, hmdma, mdma_handle);
Jerome Coutant 0:146cf26a9bbb 407
Jerome Coutant 0:146cf26a9bbb 408 /* Deinitialize the stream for new transfer */
Jerome Coutant 0:146cf26a9bbb 409 HAL_MDMA_DeInit(&mdma_handle);
Jerome Coutant 0:146cf26a9bbb 410
Jerome Coutant 0:146cf26a9bbb 411 /* Configure the DMA stream */
Jerome Coutant 0:146cf26a9bbb 412 HAL_MDMA_Init(&mdma_handle);
Jerome Coutant 0:146cf26a9bbb 413
Jerome Coutant 0:146cf26a9bbb 414 /* NVIC configuration for DMA transfer complete interrupt */
Jerome Coutant 0:146cf26a9bbb 415 HAL_NVIC_SetPriority(SDRAM_MDMAx_IRQn, 0x0F, 0);
Jerome Coutant 0:146cf26a9bbb 416 HAL_NVIC_EnableIRQ(SDRAM_MDMAx_IRQn);
Jerome Coutant 0:146cf26a9bbb 417 }
Jerome Coutant 0:146cf26a9bbb 418
Jerome Coutant 0:146cf26a9bbb 419 /**
Jerome Coutant 0:146cf26a9bbb 420 * @brief DeInitializes SDRAM MSP.
Jerome Coutant 0:146cf26a9bbb 421 * @param hsdram SDRAM handle
Jerome Coutant 0:146cf26a9bbb 422 * @param Params User parameters
Jerome Coutant 0:146cf26a9bbb 423 * @retval None
Jerome Coutant 0:146cf26a9bbb 424 */
Jerome Coutant 0:146cf26a9bbb 425 __weak void BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram, void *Params)
Jerome Coutant 0:146cf26a9bbb 426 {
Jerome Coutant 0:146cf26a9bbb 427 static MDMA_HandleTypeDef mdma_handle;
Jerome Coutant 0:146cf26a9bbb 428
Jerome Coutant 0:146cf26a9bbb 429 /* Disable NVIC configuration for DMA interrupt */
Jerome Coutant 0:146cf26a9bbb 430 HAL_NVIC_DisableIRQ(SDRAM_MDMAx_IRQn);
Jerome Coutant 0:146cf26a9bbb 431
Jerome Coutant 0:146cf26a9bbb 432 /* Deinitialize the stream for new transfer */
Jerome Coutant 0:146cf26a9bbb 433 mdma_handle.Instance = SDRAM_MDMAx_CHANNEL;
Jerome Coutant 0:146cf26a9bbb 434 HAL_MDMA_DeInit(&mdma_handle);
Jerome Coutant 0:146cf26a9bbb 435
Jerome Coutant 0:146cf26a9bbb 436 /* GPIO pins clock, FMC clock and MDMA clock can be shut down in the applications
Jerome Coutant 0:146cf26a9bbb 437 by surcharging this __weak function */
Jerome Coutant 0:146cf26a9bbb 438 }
Jerome Coutant 0:146cf26a9bbb 439
Jerome Coutant 0:146cf26a9bbb 440 /**
Jerome Coutant 0:146cf26a9bbb 441 * @}
Jerome Coutant 0:146cf26a9bbb 442 */
Jerome Coutant 0:146cf26a9bbb 443
Jerome Coutant 0:146cf26a9bbb 444 /**
Jerome Coutant 0:146cf26a9bbb 445 * @}
Jerome Coutant 0:146cf26a9bbb 446 */
Jerome Coutant 0:146cf26a9bbb 447
Jerome Coutant 0:146cf26a9bbb 448 /**
Jerome Coutant 0:146cf26a9bbb 449 * @}
Jerome Coutant 0:146cf26a9bbb 450 */
Jerome Coutant 0:146cf26a9bbb 451
Jerome Coutant 0:146cf26a9bbb 452 /**
Jerome Coutant 0:146cf26a9bbb 453 * @}
Jerome Coutant 0:146cf26a9bbb 454 */
Jerome Coutant 0:146cf26a9bbb 455
Jerome Coutant 0:146cf26a9bbb 456 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/