ST / BSP_DISCO_H747I

BSP files for STM32H747I-Discovery Copy from ST Cube delivery

Dependents:   DISCO_H747I_LCD_demo DISCO_H747I_AUDIO_demo

STM32H747I-Discovery/stm32h747i_discovery_qspi.h@3:bc403474b366, 2019-11-06 (annotated)

Committer:
Jerome Coutant
Date:
Wed Nov 06 11:32:01 2019 +0100
Revision:
3:bc403474b366
Parent:
0:146cf26a9bbb 
Add PDM lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jerome Coutant 0:146cf26a9bbb 1 /**
Jerome Coutant 0:146cf26a9bbb 2 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 3 * @file stm32h747i_discovery_qspi.h
Jerome Coutant 0:146cf26a9bbb 4 * @author MCD Application Team
Jerome Coutant 0:146cf26a9bbb 5 * @brief This file contains the common defines and functions prototypes for
Jerome Coutant 0:146cf26a9bbb 6 * the stm32h747i_discovery_qspi.c driver.
Jerome Coutant 0:146cf26a9bbb 7 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 8 * @attention
Jerome Coutant 0:146cf26a9bbb 9 *
Jerome Coutant 0:146cf26a9bbb 10 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
Jerome Coutant 0:146cf26a9bbb 11 * All rights reserved.</center></h2>
Jerome Coutant 0:146cf26a9bbb 12 *
Jerome Coutant 0:146cf26a9bbb 13 * This software component is licensed by ST under BSD 3-Clause license,
Jerome Coutant 0:146cf26a9bbb 14 * the "License"; You may not use this file except in compliance with the
Jerome Coutant 0:146cf26a9bbb 15 * License. You may obtain a copy of the License at:
Jerome Coutant 0:146cf26a9bbb 16 * opensource.org/licenses/BSD-3-Clause
Jerome Coutant 0:146cf26a9bbb 17 *
Jerome Coutant 0:146cf26a9bbb 18 ******************************************************************************
Jerome Coutant 0:146cf26a9bbb 19 */
Jerome Coutant 0:146cf26a9bbb 20
Jerome Coutant 0:146cf26a9bbb 21 /** @addtogroup BSP
Jerome Coutant 0:146cf26a9bbb 22 * @{
Jerome Coutant 0:146cf26a9bbb 23 */
Jerome Coutant 0:146cf26a9bbb 24
Jerome Coutant 0:146cf26a9bbb 25 /** @addtogroup STM32H747I_DISCOVERY
Jerome Coutant 0:146cf26a9bbb 26 * @{
Jerome Coutant 0:146cf26a9bbb 27 */
Jerome Coutant 0:146cf26a9bbb 28
Jerome Coutant 0:146cf26a9bbb 29 /* Define to prevent recursive inclusion -------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 30 #ifndef __STM32H747I_DISCOVERY_QSPI_H
Jerome Coutant 0:146cf26a9bbb 31 #define __STM32H747I_DISCOVERY_QSPI_H
Jerome Coutant 0:146cf26a9bbb 32
Jerome Coutant 0:146cf26a9bbb 33 #ifdef __cplusplus
Jerome Coutant 0:146cf26a9bbb 34 extern "C" {
Jerome Coutant 0:146cf26a9bbb 35 #endif
Jerome Coutant 0:146cf26a9bbb 36
Jerome Coutant 0:146cf26a9bbb 37 /* Includes ------------------------------------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 38 #include "stm32h7xx_hal.h"
Jerome Coutant 0:146cf26a9bbb 39 #include "../Components/mt25tl01g/mt25tl01g.h"
Jerome Coutant 0:146cf26a9bbb 40
Jerome Coutant 0:146cf26a9bbb 41 /** @addtogroup STM32H747I_DISCOVERY_QSPI
Jerome Coutant 0:146cf26a9bbb 42 * @{
Jerome Coutant 0:146cf26a9bbb 43 */
Jerome Coutant 0:146cf26a9bbb 44
Jerome Coutant 0:146cf26a9bbb 45 /* Exported constants --------------------------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 46 /** @defgroup STM32H747I_DISCOVERY_QSPI_Exported_Constants Exported Constants
Jerome Coutant 0:146cf26a9bbb 47 * @{
Jerome Coutant 0:146cf26a9bbb 48 */
Jerome Coutant 0:146cf26a9bbb 49 /* QSPI Error codes */
Jerome Coutant 0:146cf26a9bbb 50 #define QSPI_OK ((uint8_t)0x00)
Jerome Coutant 0:146cf26a9bbb 51 #define QSPI_ERROR ((uint8_t)0x01)
Jerome Coutant 0:146cf26a9bbb 52 #define QSPI_BUSY ((uint8_t)0x02)
Jerome Coutant 0:146cf26a9bbb 53 #define QSPI_NOT_SUPPORTED ((uint8_t)0x04)
Jerome Coutant 0:146cf26a9bbb 54 #define QSPI_SUSPENDED ((uint8_t)0x08)
Jerome Coutant 0:146cf26a9bbb 55 #define QSPI_PROTECTED ((uint8_t)0x10)
Jerome Coutant 0:146cf26a9bbb 56
Jerome Coutant 0:146cf26a9bbb 57 /* Definition for QSPI clock resources */
Jerome Coutant 0:146cf26a9bbb 58 #define QSPI_CLK_ENABLE() __HAL_RCC_QSPI_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 59 #define QSPI_CLK_DISABLE() __HAL_RCC_QSPI_CLK_DISABLE()
Jerome Coutant 0:146cf26a9bbb 60 #define QSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 61 #define QSPI_BK1_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 62 #define QSPI_BK1_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 63 #define QSPI_BK1_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 64 #define QSPI_BK1_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 65 #define QSPI_BK1_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 66 #define QSPI_BK2_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 67 #define QSPI_BK2_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 68 #define QSPI_BK2_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 69 #define QSPI_BK2_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 70 #define QSPI_BK2_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
Jerome Coutant 0:146cf26a9bbb 71
Jerome Coutant 0:146cf26a9bbb 72
Jerome Coutant 0:146cf26a9bbb 73 #define QSPI_FORCE_RESET() __HAL_RCC_QSPI_FORCE_RESET()
Jerome Coutant 0:146cf26a9bbb 74 #define QSPI_RELEASE_RESET() __HAL_RCC_QSPI_RELEASE_RESET()
Jerome Coutant 0:146cf26a9bbb 75
Jerome Coutant 0:146cf26a9bbb 76 /* Definition for QSPI Pins */
Jerome Coutant 0:146cf26a9bbb 77 #define QSPI_CLK_PIN GPIO_PIN_2
Jerome Coutant 0:146cf26a9bbb 78 #define QSPI_CLK_GPIO_PORT GPIOB
Jerome Coutant 0:146cf26a9bbb 79 /* Bank 1 */
Jerome Coutant 0:146cf26a9bbb 80 #define QSPI_BK1_CS_PIN GPIO_PIN_6
Jerome Coutant 0:146cf26a9bbb 81 #define QSPI_BK1_CS_GPIO_PORT GPIOG
Jerome Coutant 0:146cf26a9bbb 82 #define QSPI_BK1_D0_PIN GPIO_PIN_11
Jerome Coutant 0:146cf26a9bbb 83 #define QSPI_BK1_D0_GPIO_PORT GPIOD
Jerome Coutant 0:146cf26a9bbb 84 #define QSPI_BK1_D1_PIN GPIO_PIN_9
Jerome Coutant 0:146cf26a9bbb 85 #define QSPI_BK1_D1_GPIO_PORT GPIOF
Jerome Coutant 0:146cf26a9bbb 86 #define QSPI_BK1_D2_PIN GPIO_PIN_7
Jerome Coutant 0:146cf26a9bbb 87 #define QSPI_BK1_D2_GPIO_PORT GPIOF
Jerome Coutant 0:146cf26a9bbb 88 #define QSPI_BK1_D3_PIN GPIO_PIN_6
Jerome Coutant 0:146cf26a9bbb 89 #define QSPI_BK1_D3_GPIO_PORT GPIOF
Jerome Coutant 0:146cf26a9bbb 90
Jerome Coutant 0:146cf26a9bbb 91 /* Bank 2 */
Jerome Coutant 0:146cf26a9bbb 92 #define QSPI_BK2_CS_PIN GPIO_PIN_6
Jerome Coutant 0:146cf26a9bbb 93 #define QSPI_BK2_CS_GPIO_PORT GPIOG
Jerome Coutant 0:146cf26a9bbb 94 #define QSPI_BK2_D0_PIN GPIO_PIN_2
Jerome Coutant 0:146cf26a9bbb 95 #define QSPI_BK2_D0_GPIO_PORT GPIOH
Jerome Coutant 0:146cf26a9bbb 96 #define QSPI_BK2_D1_PIN GPIO_PIN_3
Jerome Coutant 0:146cf26a9bbb 97 #define QSPI_BK2_D1_GPIO_PORT GPIOH
Jerome Coutant 0:146cf26a9bbb 98 #define QSPI_BK2_D2_PIN GPIO_PIN_9
Jerome Coutant 0:146cf26a9bbb 99 #define QSPI_BK2_D2_GPIO_PORT GPIOG
Jerome Coutant 0:146cf26a9bbb 100 #define QSPI_BK2_D3_PIN GPIO_PIN_14
Jerome Coutant 0:146cf26a9bbb 101 #define QSPI_BK2_D3_GPIO_PORT GPIOG
Jerome Coutant 0:146cf26a9bbb 102
Jerome Coutant 0:146cf26a9bbb 103
Jerome Coutant 0:146cf26a9bbb 104 /* MT25TL01G Micron memory */
Jerome Coutant 0:146cf26a9bbb 105 /* Size of the flash */
Jerome Coutant 0:146cf26a9bbb 106 #define QSPI_FLASH_SIZE 26 /* Address bus width to access whole memory space */
Jerome Coutant 0:146cf26a9bbb 107 #define QSPI_PAGE_SIZE 256
Jerome Coutant 0:146cf26a9bbb 108
Jerome Coutant 0:146cf26a9bbb 109 /* QSPI Base Address */
Jerome Coutant 0:146cf26a9bbb 110 #define QSPI_BASE_ADDRESS 0x90000000
Jerome Coutant 0:146cf26a9bbb 111
Jerome Coutant 0:146cf26a9bbb 112 /**
Jerome Coutant 0:146cf26a9bbb 113 * @}
Jerome Coutant 0:146cf26a9bbb 114 */
Jerome Coutant 0:146cf26a9bbb 115
Jerome Coutant 0:146cf26a9bbb 116 /* Exported types ------------------------------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 117 /** @defgroup STM32H747I_DISCOVERY_QSPI_Exported_Types Exported Types
Jerome Coutant 0:146cf26a9bbb 118 * @{
Jerome Coutant 0:146cf26a9bbb 119 */
Jerome Coutant 0:146cf26a9bbb 120 /* QSPI Info */
Jerome Coutant 0:146cf26a9bbb 121 typedef struct {
Jerome Coutant 0:146cf26a9bbb 122 uint32_t FlashSize; /*!< Size of the flash */
Jerome Coutant 0:146cf26a9bbb 123 uint32_t EraseSectorSize; /*!< Size of sectors for the erase operation */
Jerome Coutant 0:146cf26a9bbb 124 uint32_t EraseSectorsNumber; /*!< Number of sectors for the erase operation */
Jerome Coutant 0:146cf26a9bbb 125 uint32_t ProgPageSize; /*!< Size of pages for the program operation */
Jerome Coutant 0:146cf26a9bbb 126 uint32_t ProgPagesNumber; /*!< Number of pages for the program operation */
Jerome Coutant 0:146cf26a9bbb 127 } QSPI_Info;
Jerome Coutant 0:146cf26a9bbb 128
Jerome Coutant 0:146cf26a9bbb 129 /**
Jerome Coutant 0:146cf26a9bbb 130 * @}
Jerome Coutant 0:146cf26a9bbb 131 */
Jerome Coutant 0:146cf26a9bbb 132
Jerome Coutant 0:146cf26a9bbb 133
Jerome Coutant 0:146cf26a9bbb 134 /* Exported functions --------------------------------------------------------*/
Jerome Coutant 0:146cf26a9bbb 135 /** @addtogroup STM32H747I_DISCOVERY_QSPI_Exported_Functions
Jerome Coutant 0:146cf26a9bbb 136 * @{
Jerome Coutant 0:146cf26a9bbb 137 */
Jerome Coutant 0:146cf26a9bbb 138 uint8_t BSP_QSPI_Init (void);
Jerome Coutant 0:146cf26a9bbb 139 uint8_t BSP_QSPI_DeInit (void);
Jerome Coutant 0:146cf26a9bbb 140 uint8_t BSP_QSPI_Read (uint8_t* pData, uint32_t ReadAddr, uint32_t Size);
Jerome Coutant 0:146cf26a9bbb 141 uint8_t BSP_QSPI_Write (uint8_t* pData, uint32_t WriteAddr, uint32_t Size);
Jerome Coutant 0:146cf26a9bbb 142 uint8_t BSP_QSPI_Erase_Block(uint32_t BlockAddress);
Jerome Coutant 0:146cf26a9bbb 143 uint8_t BSP_QSPI_Erase_Chip (void);
Jerome Coutant 0:146cf26a9bbb 144 uint8_t BSP_QSPI_GetStatus (void);
Jerome Coutant 0:146cf26a9bbb 145 uint8_t BSP_QSPI_GetInfo (QSPI_Info* pInfo);
Jerome Coutant 0:146cf26a9bbb 146 uint8_t BSP_QSPI_EnableMemoryMappedMode(void);
Jerome Coutant 0:146cf26a9bbb 147
Jerome Coutant 0:146cf26a9bbb 148 /* These functions can be modified in case the current settings
Jerome Coutant 0:146cf26a9bbb 149 need to be changed for specific application needs */
Jerome Coutant 0:146cf26a9bbb 150 void BSP_QSPI_MspInit(QSPI_HandleTypeDef *hqspi, void *Params);
Jerome Coutant 0:146cf26a9bbb 151 void BSP_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi, void *Params);
Jerome Coutant 0:146cf26a9bbb 152
Jerome Coutant 0:146cf26a9bbb 153 /**
Jerome Coutant 0:146cf26a9bbb 154 * @}
Jerome Coutant 0:146cf26a9bbb 155 */
Jerome Coutant 0:146cf26a9bbb 156
Jerome Coutant 0:146cf26a9bbb 157 /**
Jerome Coutant 0:146cf26a9bbb 158 * @}
Jerome Coutant 0:146cf26a9bbb 159 */
Jerome Coutant 0:146cf26a9bbb 160
Jerome Coutant 0:146cf26a9bbb 161 #ifdef __cplusplus
Jerome Coutant 0:146cf26a9bbb 162 }
Jerome Coutant 0:146cf26a9bbb 163 #endif
Jerome Coutant 0:146cf26a9bbb 164
Jerome Coutant 0:146cf26a9bbb 165 #endif /* __STM32H747I_DISCOVERY_QSPI_H */
Jerome Coutant 0:146cf26a9bbb 166 /**
Jerome Coutant 0:146cf26a9bbb 167 * @}
Jerome Coutant 0:146cf26a9bbb 168 */
Jerome Coutant 0:146cf26a9bbb 169
Jerome Coutant 0:146cf26a9bbb 170 /**
Jerome Coutant 0:146cf26a9bbb 171 * @}
Jerome Coutant 0:146cf26a9bbb 172 */
Jerome Coutant 0:146cf26a9bbb 173
Jerome Coutant 0:146cf26a9bbb 174 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/