STM32F429ZI Discovery board drivers
Dependents: 2a 2b 2c 2d1 ... more
Drivers/BSP/Components/ili9341/ili9341.h@2:53d9067a4feb, 2018-02-28 (annotated)
- Committer:
- Jerome Coutant
- Date:
- Wed Feb 28 13:17:14 2018 +0100
- Revision:
- 2:53d9067a4feb
- Parent:
- 1:2371382139dd
STM32Cube_FW_F4_V1.19.0 BSP_DISCO_F429ZI
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Jerome Coutant
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/**
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******************************************************************************
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* @file ili9341.h
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* @author MCD Application Team
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* @version V1.0.2
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* @date 02-December-2014
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* @brief This file contains all the functions prototypes for the ili9341.c
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* driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __ILI9341_H
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#define __ILI9341_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "../Common/lcd.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @addtogroup ILI9341
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* @{
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*/
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/** @defgroup ILI9341_Exported_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup ILI9341_Exported_Constants
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* @{
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*/
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/**
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* @brief ILI9341 chip IDs
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*/
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#define ILI9341_ID 0x9341
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/**
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* @brief ILI9341 Size
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*/
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#define ILI9341_LCD_PIXEL_WIDTH ((uint16_t)240)
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#define ILI9341_LCD_PIXEL_HEIGHT ((uint16_t)320)
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/**
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* @brief ILI9341 Timing
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*/
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/* Timing configuration (Typical configuration from ILI9341 datasheet)
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HSYNC=10 (9+1)
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HBP=20 (29-10+1)
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ActiveW=240 (269-20-10+1)
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HFP=10 (279-240-20-10+1)
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VSYNC=2 (1+1)
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VBP=2 (3-2+1)
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ActiveH=320 (323-2-2+1)
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VFP=4 (327-320-2-2+1)
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*/
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#define ILI9341_HSYNC ((uint32_t)9) /* Horizontal synchronization */
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#define ILI9341_HBP ((uint32_t)29) /* Horizontal back porch */
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#define ILI9341_HFP ((uint32_t)2) /* Horizontal front porch */
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#define ILI9341_VSYNC ((uint32_t)1) /* Vertical synchronization */
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#define ILI9341_VBP ((uint32_t)3) /* Vertical back porch */
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#define ILI9341_VFP ((uint32_t)2) /* Vertical front porch */
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/**
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* @brief ILI9341 Registers
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*/
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/* Level 1 Commands */
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#define LCD_SWRESET 0x01 /* Software Reset */
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#define LCD_READ_DISPLAY_ID 0x04 /* Read display identification information */
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#define LCD_RDDST 0x09 /* Read Display Status */
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#define LCD_RDDPM 0x0A /* Read Display Power Mode */
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#define LCD_RDDMADCTL 0x0B /* Read Display MADCTL */
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#define LCD_RDDCOLMOD 0x0C /* Read Display Pixel Format */
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#define LCD_RDDIM 0x0D /* Read Display Image Format */
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#define LCD_RDDSM 0x0E /* Read Display Signal Mode */
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#define LCD_RDDSDR 0x0F /* Read Display Self-Diagnostic Result */
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#define LCD_SPLIN 0x10 /* Enter Sleep Mode */
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#define LCD_SLEEP_OUT 0x11 /* Sleep out register */
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#define LCD_PTLON 0x12 /* Partial Mode ON */
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#define LCD_NORMAL_MODE_ON 0x13 /* Normal Display Mode ON */
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#define LCD_DINVOFF 0x20 /* Display Inversion OFF */
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#define LCD_DINVON 0x21 /* Display Inversion ON */
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#define LCD_GAMMA 0x26 /* Gamma register */
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#define LCD_DISPLAY_OFF 0x28 /* Display off register */
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#define LCD_DISPLAY_ON 0x29 /* Display on register */
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#define LCD_COLUMN_ADDR 0x2A /* Colomn address register */
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#define LCD_PAGE_ADDR 0x2B /* Page address register */
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#define LCD_GRAM 0x2C /* GRAM register */
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#define LCD_RGBSET 0x2D /* Color SET */
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#define LCD_RAMRD 0x2E /* Memory Read */
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#define LCD_PLTAR 0x30 /* Partial Area */
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#define LCD_VSCRDEF 0x33 /* Vertical Scrolling Definition */
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#define LCD_TEOFF 0x34 /* Tearing Effect Line OFF */
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#define LCD_TEON 0x35 /* Tearing Effect Line ON */
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#define LCD_MAC 0x36 /* Memory Access Control register*/
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#define LCD_VSCRSADD 0x37 /* Vertical Scrolling Start Address */
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#define LCD_IDMOFF 0x38 /* Idle Mode OFF */
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#define LCD_IDMON 0x39 /* Idle Mode ON */
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#define LCD_PIXEL_FORMAT 0x3A /* Pixel Format register */
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#define LCD_WRITE_MEM_CONTINUE 0x3C /* Write Memory Continue */
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#define LCD_READ_MEM_CONTINUE 0x3E /* Read Memory Continue */
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#define LCD_SET_TEAR_SCANLINE 0x44 /* Set Tear Scanline */
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#define LCD_GET_SCANLINE 0x45 /* Get Scanline */
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#define LCD_WDB 0x51 /* Write Brightness Display register */
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#define LCD_RDDISBV 0x52 /* Read Display Brightness */
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#define LCD_WCD 0x53 /* Write Control Display register*/
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#define LCD_RDCTRLD 0x54 /* Read CTRL Display */
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#define LCD_WRCABC 0x55 /* Write Content Adaptive Brightness Control */
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#define LCD_RDCABC 0x56 /* Read Content Adaptive Brightness Control */
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#define LCD_WRITE_CABC 0x5E /* Write CABC Minimum Brightness */
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#define LCD_READ_CABC 0x5F /* Read CABC Minimum Brightness */
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#define LCD_READ_ID1 0xDA /* Read ID1 */
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#define LCD_READ_ID2 0xDB /* Read ID2 */
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#define LCD_READ_ID3 0xDC /* Read ID3 */
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/* Level 2 Commands */
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#define LCD_RGB_INTERFACE 0xB0 /* RGB Interface Signal Control */
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#define LCD_FRMCTR1 0xB1 /* Frame Rate Control (In Normal Mode) */
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#define LCD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle Mode) */
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#define LCD_FRMCTR3 0xB3 /* Frame Rate Control (In Partial Mode) */
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#define LCD_INVTR 0xB4 /* Display Inversion Control */
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#define LCD_BPC 0xB5 /* Blanking Porch Control register */
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#define LCD_DFC 0xB6 /* Display Function Control register */
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#define LCD_ETMOD 0xB7 /* Entry Mode Set */
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#define LCD_BACKLIGHT1 0xB8 /* Backlight Control 1 */
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#define LCD_BACKLIGHT2 0xB9 /* Backlight Control 2 */
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#define LCD_BACKLIGHT3 0xBA /* Backlight Control 3 */
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#define LCD_BACKLIGHT4 0xBB /* Backlight Control 4 */
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#define LCD_BACKLIGHT5 0xBC /* Backlight Control 5 */
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#define LCD_BACKLIGHT7 0xBE /* Backlight Control 7 */
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#define LCD_BACKLIGHT8 0xBF /* Backlight Control 8 */
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#define LCD_POWER1 0xC0 /* Power Control 1 register */
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#define LCD_POWER2 0xC1 /* Power Control 2 register */
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#define LCD_VCOM1 0xC5 /* VCOM Control 1 register */
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#define LCD_VCOM2 0xC7 /* VCOM Control 2 register */
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#define LCD_NVMWR 0xD0 /* NV Memory Write */
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#define LCD_NVMPKEY 0xD1 /* NV Memory Protection Key */
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#define LCD_RDNVM 0xD2 /* NV Memory Status Read */
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#define LCD_READ_ID4 0xD3 /* Read ID4 */
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#define LCD_PGAMMA 0xE0 /* Positive Gamma Correction register */
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#define LCD_NGAMMA 0xE1 /* Negative Gamma Correction register */
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#define LCD_DGAMCTRL1 0xE2 /* Digital Gamma Control 1 */
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#define LCD_DGAMCTRL2 0xE3 /* Digital Gamma Control 2 */
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#define LCD_INTERFACE 0xF6 /* Interface control register */
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/* Extend register commands */
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#define LCD_POWERA 0xCB /* Power control A register */
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#define LCD_POWERB 0xCF /* Power control B register */
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#define LCD_DTCA 0xE8 /* Driver timing control A */
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#define LCD_DTCB 0xEA /* Driver timing control B */
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#define LCD_POWER_SEQ 0xED /* Power on sequence register */
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#define LCD_3GAMMA_EN 0xF2 /* 3 Gamma enable register */
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#define LCD_PRC 0xF7 /* Pump ratio control register */
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/* Size of read registers */
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#define LCD_READ_ID4_SIZE 3 /* Size of Read ID4 */
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/**
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* @}
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*/
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/** @defgroup ILI9341_Exported_Functions
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* @{
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*/
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void ili9341_Init(void);
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uint16_t ili9341_ReadID(void);
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void ili9341_WriteReg(uint8_t LCD_Reg);
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void ili9341_WriteData(uint16_t RegValue);
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uint32_t ili9341_ReadData(uint16_t RegValue, uint8_t ReadSize);
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void ili9341_DisplayOn(void);
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void ili9341_DisplayOff(void);
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uint16_t ili9341_GetLcdPixelWidth(void);
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uint16_t ili9341_GetLcdPixelHeight(void);
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/* LCD driver structure */
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extern LCD_DrvTypeDef ili9341_drv;
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/* LCD IO functions */
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void LCD_IO_Init(void);
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void LCD_IO_WriteData(uint16_t RegValue);
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void LCD_IO_WriteReg(uint8_t Reg);
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uint32_t LCD_IO_ReadData(uint16_t RegValue, uint8_t ReadSize);
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void LCD_Delay (uint32_t delay);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ILI9341_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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