6DOrientation_IKS01A2 - Example of 6D orientation recognition for LSM6DSL…

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ST / Mbed 2 deprecated 6DOrientation_IKS01A2

Example of 6D orientation recognition for LSM6DSL in X-NUCLEO-IKS01A2

Fork of 6DOrientation_IKS01A2 by ST Expansion SW Team

6D Orientation Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

Main function is to show how to use sensor expansion board to find out the 6D orientation and send data using UART to a connected PC or Desktop and display it on terminal applications like TeraTerm.
After connection has been established:
- the user can rotate the board to change the 6D orientation and then view the data using an hyper terminal.
- the user button can be used to display the current 6D orientation.

X_NUCLEO_IKS01A2/Components/LSM6DSLSensor/LSM6DSL_ACC_GYRO_driver.h@2:ae74845fa96a, 2016-08-19 (annotated)

Committer:: cparata
Date:: Fri Aug 19 12:23:23 2016 +0000
Revision:: 2:ae74845fa96a
Parent:: 0:485458fca2bd

Add interfaces to all components

Who changed what in which revision?

User	Revision	Line number	New contents of line
cparata	0:485458fca2bd	1	/**
cparata	0:485458fca2bd	2	******************************************************************************
cparata	0:485458fca2bd	3	* @file LSM6DSL_ACC_GYRO_driver.h
cparata	0:485458fca2bd	4	* @author MEMS Application Team
cparata	0:485458fca2bd	5	* @version V1.5
cparata	0:485458fca2bd	6	* @date 17-May-2016
cparata	0:485458fca2bd	7	* @brief LSM6DSL header driver file
cparata	0:485458fca2bd	8	******************************************************************************
cparata	0:485458fca2bd	9	* @attention
cparata	0:485458fca2bd	10	*
cparata	0:485458fca2bd	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
cparata	0:485458fca2bd	12	*
cparata	0:485458fca2bd	13	* Redistribution and use in source and binary forms, with or without modification,
cparata	0:485458fca2bd	14	* are permitted provided that the following conditions are met:
cparata	0:485458fca2bd	15	* 1. Redistributions of source code must retain the above copyright notice,
cparata	0:485458fca2bd	16	* this list of conditions and the following disclaimer.
cparata	0:485458fca2bd	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
cparata	0:485458fca2bd	18	* this list of conditions and the following disclaimer in the documentation
cparata	0:485458fca2bd	19	* and/or other materials provided with the distribution.
cparata	0:485458fca2bd	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata	0:485458fca2bd	21	* may be used to endorse or promote products derived from this software
cparata	0:485458fca2bd	22	* without specific prior written permission.
cparata	0:485458fca2bd	23	*
cparata	0:485458fca2bd	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata	0:485458fca2bd	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata	0:485458fca2bd	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata	0:485458fca2bd	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata	0:485458fca2bd	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata	0:485458fca2bd	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata	0:485458fca2bd	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata	0:485458fca2bd	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata	0:485458fca2bd	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata	0:485458fca2bd	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata	0:485458fca2bd	34	*
cparata	0:485458fca2bd	35	******************************************************************************
cparata	0:485458fca2bd	36	*/
cparata	0:485458fca2bd	37
cparata	0:485458fca2bd	38	/* Define to prevent recursive inclusion -------------------------------------*/
cparata	0:485458fca2bd	39	#ifndef __LSM6DSL_ACC_GYRO_DRIVER__H
cparata	0:485458fca2bd	40	#define __LSM6DSL_ACC_GYRO_DRIVER__H
cparata	0:485458fca2bd	41
cparata	0:485458fca2bd	42	/* Includes ------------------------------------------------------------------*/
cparata	0:485458fca2bd	43	#include <stdint.h>
cparata	0:485458fca2bd	44	/* Exported types ------------------------------------------------------------*/
cparata	0:485458fca2bd	45
cparata	0:485458fca2bd	46	#ifdef __cplusplus
cparata	0:485458fca2bd	47	extern "C" {
cparata	0:485458fca2bd	48	#endif
cparata	0:485458fca2bd	49
cparata	0:485458fca2bd	50	//these could change accordingly with the architecture
cparata	0:485458fca2bd	51
cparata	0:485458fca2bd	52	#ifndef __ARCHDEP__TYPES
cparata	0:485458fca2bd	53	#define __ARCHDEP__TYPES
cparata	0:485458fca2bd	54
cparata	0:485458fca2bd	55	typedef unsigned char u8_t;
cparata	0:485458fca2bd	56	typedef unsigned short int u16_t;
cparata	0:485458fca2bd	57	typedef unsigned int u32_t;
cparata	0:485458fca2bd	58	typedef int i32_t;
cparata	0:485458fca2bd	59	typedef short int i16_t;
cparata	0:485458fca2bd	60	typedef signed char i8_t;
cparata	0:485458fca2bd	61
cparata	0:485458fca2bd	62	#endif /__ARCHDEP__TYPES/
cparata	0:485458fca2bd	63
cparata	0:485458fca2bd	64	/* Exported common structure --------------------------------------------------------*/
cparata	0:485458fca2bd	65
cparata	0:485458fca2bd	66	#ifndef __SHARED__TYPES
cparata	0:485458fca2bd	67	#define __SHARED__TYPES
cparata	0:485458fca2bd	68
cparata	0:485458fca2bd	69	typedef union{
cparata	0:485458fca2bd	70	i16_t i16bit[3];
cparata	0:485458fca2bd	71	u8_t u8bit[6];
cparata	0:485458fca2bd	72	} Type3Axis16bit_U;
cparata	0:485458fca2bd	73
cparata	0:485458fca2bd	74	typedef union{
cparata	0:485458fca2bd	75	i16_t i16bit;
cparata	0:485458fca2bd	76	u8_t u8bit[2];
cparata	0:485458fca2bd	77	} Type1Axis16bit_U;
cparata	0:485458fca2bd	78
cparata	0:485458fca2bd	79	typedef union{
cparata	0:485458fca2bd	80	i32_t i32bit;
cparata	0:485458fca2bd	81	u8_t u8bit[4];
cparata	0:485458fca2bd	82	} Type1Axis32bit_U;
cparata	0:485458fca2bd	83
cparata	0:485458fca2bd	84	typedef enum {
cparata	0:485458fca2bd	85	MEMS_SUCCESS = 0x01,
cparata	0:485458fca2bd	86	MEMS_ERROR = 0x00
cparata	0:485458fca2bd	87	} status_t;
cparata	0:485458fca2bd	88
cparata	0:485458fca2bd	89	#endif /__SHARED__TYPES/
cparata	0:485458fca2bd	90
cparata	0:485458fca2bd	91	/* Exported macro ------------------------------------------------------------*/
cparata	0:485458fca2bd	92
cparata	0:485458fca2bd	93	/* Exported constants --------------------------------------------------------*/
cparata	0:485458fca2bd	94
cparata	0:485458fca2bd	95	/************ I2C Address ***************/
cparata	0:485458fca2bd	96
cparata	0:485458fca2bd	97	#define LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW 0xD4 // SAD[0] = 0
cparata	0:485458fca2bd	98	#define LSM6DSL_ACC_GYRO_I2C_ADDRESS_HIGH 0xD6 // SAD[0] = 1
cparata	0:485458fca2bd	99
cparata	0:485458fca2bd	100	/************ Who am I *****************/
cparata	0:485458fca2bd	101
cparata	0:485458fca2bd	102	#define LSM6DSL_ACC_GYRO_WHO_AM_I 0x6A
cparata	0:485458fca2bd	103
cparata	0:485458fca2bd	104	/************ Device Register *****************/
cparata	0:485458fca2bd	105
cparata	0:485458fca2bd	106	#define LSM6DSL_ACC_GYRO_FUNC_CFG_ACCESS 0X01
cparata	0:485458fca2bd	107
cparata	0:485458fca2bd	108	#define LSM6DSL_ACC_GYRO_SENSOR_SYNC_TIME 0X04
cparata	0:485458fca2bd	109	#define LSM6DSL_ACC_GYRO_SENSOR_RES_RATIO 0X05
cparata	0:485458fca2bd	110
cparata	0:485458fca2bd	111	#define LSM6DSL_ACC_GYRO_FIFO_CTRL1 0X06
cparata	0:485458fca2bd	112	#define LSM6DSL_ACC_GYRO_FIFO_CTRL2 0X07
cparata	0:485458fca2bd	113	#define LSM6DSL_ACC_GYRO_FIFO_CTRL3 0X08
cparata	0:485458fca2bd	114	#define LSM6DSL_ACC_GYRO_FIFO_CTRL4 0X09
cparata	0:485458fca2bd	115	#define LSM6DSL_ACC_GYRO_FIFO_CTRL5 0X0A
cparata	0:485458fca2bd	116
cparata	0:485458fca2bd	117	#define LSM6DSL_ACC_GYRO_DRDY_PULSE_CFG_G 0X0B
cparata	0:485458fca2bd	118	#define LSM6DSL_ACC_GYRO_INT1_CTRL 0X0D
cparata	0:485458fca2bd	119	#define LSM6DSL_ACC_GYRO_INT2_CTRL 0X0E
cparata	0:485458fca2bd	120	#define LSM6DSL_ACC_GYRO_WHO_AM_I_REG 0X0F
cparata	0:485458fca2bd	121	#define LSM6DSL_ACC_GYRO_CTRL1_XL 0X10
cparata	0:485458fca2bd	122	#define LSM6DSL_ACC_GYRO_CTRL2_G 0X11
cparata	0:485458fca2bd	123	#define LSM6DSL_ACC_GYRO_CTRL3_C 0X12
cparata	0:485458fca2bd	124	#define LSM6DSL_ACC_GYRO_CTRL4_C 0X13
cparata	0:485458fca2bd	125	#define LSM6DSL_ACC_GYRO_CTRL5_C 0X14
cparata	0:485458fca2bd	126	#define LSM6DSL_ACC_GYRO_CTRL6_G 0X15
cparata	0:485458fca2bd	127	#define LSM6DSL_ACC_GYRO_CTRL7_G 0X16
cparata	0:485458fca2bd	128	#define LSM6DSL_ACC_GYRO_CTRL8_XL 0X17
cparata	0:485458fca2bd	129	#define LSM6DSL_ACC_GYRO_CTRL9_XL 0X18
cparata	0:485458fca2bd	130	#define LSM6DSL_ACC_GYRO_CTRL10_C 0X19
cparata	0:485458fca2bd	131
cparata	0:485458fca2bd	132	#define LSM6DSL_ACC_GYRO_MASTER_CONFIG 0X1A
cparata	0:485458fca2bd	133	#define LSM6DSL_ACC_GYRO_WAKE_UP_SRC 0X1B
cparata	0:485458fca2bd	134	#define LSM6DSL_ACC_GYRO_TAP_SRC 0X1C
cparata	0:485458fca2bd	135	#define LSM6DSL_ACC_GYRO_D6D_SRC 0X1D
cparata	0:485458fca2bd	136	#define LSM6DSL_ACC_GYRO_STATUS_REG 0X1E
cparata	0:485458fca2bd	137
cparata	0:485458fca2bd	138	#define LSM6DSL_ACC_GYRO_OUT_TEMP_L 0X20
cparata	0:485458fca2bd	139	#define LSM6DSL_ACC_GYRO_OUT_TEMP_H 0X21
cparata	0:485458fca2bd	140	#define LSM6DSL_ACC_GYRO_OUTX_L_G 0X22
cparata	0:485458fca2bd	141	#define LSM6DSL_ACC_GYRO_OUTX_H_G 0X23
cparata	0:485458fca2bd	142	#define LSM6DSL_ACC_GYRO_OUTY_L_G 0X24
cparata	0:485458fca2bd	143	#define LSM6DSL_ACC_GYRO_OUTY_H_G 0X25
cparata	0:485458fca2bd	144	#define LSM6DSL_ACC_GYRO_OUTZ_L_G 0X26
cparata	0:485458fca2bd	145	#define LSM6DSL_ACC_GYRO_OUTZ_H_G 0X27
cparata	0:485458fca2bd	146	#define LSM6DSL_ACC_GYRO_OUTX_L_XL 0X28
cparata	0:485458fca2bd	147	#define LSM6DSL_ACC_GYRO_OUTX_H_XL 0X29
cparata	0:485458fca2bd	148	#define LSM6DSL_ACC_GYRO_OUTY_L_XL 0X2A
cparata	0:485458fca2bd	149	#define LSM6DSL_ACC_GYRO_OUTY_H_XL 0X2B
cparata	0:485458fca2bd	150	#define LSM6DSL_ACC_GYRO_OUTZ_L_XL 0X2C
cparata	0:485458fca2bd	151	#define LSM6DSL_ACC_GYRO_OUTZ_H_XL 0X2D
cparata	0:485458fca2bd	152	#define LSM6DSL_ACC_GYRO_SENSORHUB1_REG 0X2E
cparata	0:485458fca2bd	153	#define LSM6DSL_ACC_GYRO_SENSORHUB2_REG 0X2F
cparata	0:485458fca2bd	154	#define LSM6DSL_ACC_GYRO_SENSORHUB3_REG 0X30
cparata	0:485458fca2bd	155	#define LSM6DSL_ACC_GYRO_SENSORHUB4_REG 0X31
cparata	0:485458fca2bd	156	#define LSM6DSL_ACC_GYRO_SENSORHUB5_REG 0X32
cparata	0:485458fca2bd	157	#define LSM6DSL_ACC_GYRO_SENSORHUB6_REG 0X33
cparata	0:485458fca2bd	158	#define LSM6DSL_ACC_GYRO_SENSORHUB7_REG 0X34
cparata	0:485458fca2bd	159	#define LSM6DSL_ACC_GYRO_SENSORHUB8_REG 0X35
cparata	0:485458fca2bd	160	#define LSM6DSL_ACC_GYRO_SENSORHUB9_REG 0X36
cparata	0:485458fca2bd	161	#define LSM6DSL_ACC_GYRO_SENSORHUB10_REG 0X37
cparata	0:485458fca2bd	162	#define LSM6DSL_ACC_GYRO_SENSORHUB11_REG 0X38
cparata	0:485458fca2bd	163	#define LSM6DSL_ACC_GYRO_SENSORHUB12_REG 0X39
cparata	0:485458fca2bd	164	#define LSM6DSL_ACC_GYRO_FIFO_STATUS1 0X3A
cparata	0:485458fca2bd	165	#define LSM6DSL_ACC_GYRO_FIFO_STATUS2 0X3B
cparata	0:485458fca2bd	166	#define LSM6DSL_ACC_GYRO_FIFO_STATUS3 0X3C
cparata	0:485458fca2bd	167	#define LSM6DSL_ACC_GYRO_FIFO_STATUS4 0X3D
cparata	0:485458fca2bd	168	#define LSM6DSL_ACC_GYRO_FIFO_DATA_OUT_L 0X3E
cparata	0:485458fca2bd	169	#define LSM6DSL_ACC_GYRO_FIFO_DATA_OUT_H 0X3F
cparata	0:485458fca2bd	170	#define LSM6DSL_ACC_GYRO_TIMESTAMP0_REG 0X40
cparata	0:485458fca2bd	171	#define LSM6DSL_ACC_GYRO_TIMESTAMP1_REG 0X41
cparata	0:485458fca2bd	172	#define LSM6DSL_ACC_GYRO_TIMESTAMP2_REG 0X42
cparata	0:485458fca2bd	173
cparata	0:485458fca2bd	174	#define LSM6DSL_ACC_GYRO_TIMESTAMP_L 0X49
cparata	0:485458fca2bd	175	#define LSM6DSL_ACC_GYRO_TIMESTAMP_H 0X4A
cparata	0:485458fca2bd	176
cparata	0:485458fca2bd	177	#define LSM6DSL_ACC_GYRO_STEP_COUNTER_L 0X4B
cparata	0:485458fca2bd	178	#define LSM6DSL_ACC_GYRO_STEP_COUNTER_H 0X4C
cparata	0:485458fca2bd	179
cparata	0:485458fca2bd	180	#define LSM6DSL_ACC_GYRO_SENSORHUB13_REG 0X4D
cparata	0:485458fca2bd	181	#define LSM6DSL_ACC_GYRO_SENSORHUB14_REG 0X4E
cparata	0:485458fca2bd	182	#define LSM6DSL_ACC_GYRO_SENSORHUB15_REG 0X4F
cparata	0:485458fca2bd	183	#define LSM6DSL_ACC_GYRO_SENSORHUB16_REG 0X50
cparata	0:485458fca2bd	184	#define LSM6DSL_ACC_GYRO_SENSORHUB17_REG 0X51
cparata	0:485458fca2bd	185	#define LSM6DSL_ACC_GYRO_SENSORHUB18_REG 0X52
cparata	0:485458fca2bd	186
cparata	0:485458fca2bd	187	#define LSM6DSL_ACC_GYRO_FUNC_SRC 0X53
cparata	0:485458fca2bd	188	#define LSM6DSL_ACC_GYRO_TAP_CFG1 0X58
cparata	0:485458fca2bd	189	#define LSM6DSL_ACC_GYRO_TAP_THS_6D 0X59
cparata	0:485458fca2bd	190	#define LSM6DSL_ACC_GYRO_INT_DUR2 0X5A
cparata	0:485458fca2bd	191	#define LSM6DSL_ACC_GYRO_WAKE_UP_THS 0X5B
cparata	0:485458fca2bd	192	#define LSM6DSL_ACC_GYRO_WAKE_UP_DUR 0X5C
cparata	0:485458fca2bd	193	#define LSM6DSL_ACC_GYRO_FREE_FALL 0X5D
cparata	0:485458fca2bd	194	#define LSM6DSL_ACC_GYRO_MD1_CFG 0X5E
cparata	0:485458fca2bd	195	#define LSM6DSL_ACC_GYRO_MD2_CFG 0X5F
cparata	0:485458fca2bd	196
cparata	0:485458fca2bd	197	#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_X_L 0X66
cparata	0:485458fca2bd	198	#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_X_H 0X67
cparata	0:485458fca2bd	199	#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Y_L 0X68
cparata	0:485458fca2bd	200	#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Y_H 0X69
cparata	0:485458fca2bd	201	#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Z_L 0X6A
cparata	0:485458fca2bd	202	#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Z_H 0X6B
cparata	0:485458fca2bd	203
cparata	0:485458fca2bd	204	#define LSM6DSL_ACC_GYRO_X_OFS_USR 0X73
cparata	0:485458fca2bd	205	#define LSM6DSL_ACC_GYRO_Y_OFS_USR 0X74
cparata	0:485458fca2bd	206	#define LSM6DSL_ACC_GYRO_Z_OFS_USR 0X75
cparata	0:485458fca2bd	207
cparata	0:485458fca2bd	208	/************ Embedded functions register mapping *****************/
cparata	0:485458fca2bd	209	#define LSM6DSL_ACC_GYRO_SLV0_ADD 0x02
cparata	0:485458fca2bd	210	#define LSM6DSL_ACC_GYRO_SLV0_SUBADD 0x03
cparata	0:485458fca2bd	211	#define LSM6DSL_ACC_GYRO_SLAVE0_CONFIG 0x04
cparata	0:485458fca2bd	212	#define LSM6DSL_ACC_GYRO_SLV1_ADD 0x05
cparata	0:485458fca2bd	213	#define LSM6DSL_ACC_GYRO_SLV1_SUBADD 0x06
cparata	0:485458fca2bd	214	#define LSM6DSL_ACC_GYRO_SLAVE1_CONFIG 0x07
cparata	0:485458fca2bd	215	#define LSM6DSL_ACC_GYRO_SLV2_ADD 0x08
cparata	0:485458fca2bd	216	#define LSM6DSL_ACC_GYRO_SLV2_SUBADD 0x09
cparata	0:485458fca2bd	217	#define LSM6DSL_ACC_GYRO_SLAVE2_CONFIG 0x0A
cparata	0:485458fca2bd	218	#define LSM6DSL_ACC_GYRO_SLV3_ADD 0x0B
cparata	0:485458fca2bd	219	#define LSM6DSL_ACC_GYRO_SLV3_SUBADD 0x0C
cparata	0:485458fca2bd	220	#define LSM6DSL_ACC_GYRO_SLAVE3_CONFIG 0x0D
cparata	0:485458fca2bd	221	#define LSM6DSL_ACC_GYRO_DATAWRITE_SRC_MODE_SUB_SLV0 0x0E
cparata	0:485458fca2bd	222	#define LSM6DSL_ACC_GYRO_CONFIG_PEDO_THS_MIN 0x0F
cparata	0:485458fca2bd	223
cparata	0:485458fca2bd	224	#define LSM6DSL_ACC_GYRO_SM_STEP_THS 0x13
cparata	0:485458fca2bd	225	#define LSM6DSL_ACC_GYRO_PEDO_DEB_REG 0x14
cparata	0:485458fca2bd	226	#define LSM6DSL_ACC_GYRO_STEP_COUNT_DELTA 0x15
cparata	0:485458fca2bd	227
cparata	0:485458fca2bd	228	#define LSM6DSL_ACC_GYRO_MAG_SI_XX 0x24
cparata	0:485458fca2bd	229	#define LSM6DSL_ACC_GYRO_MAG_SI_XY 0x25
cparata	0:485458fca2bd	230	#define LSM6DSL_ACC_GYRO_MAG_SI_XZ 0x26
cparata	0:485458fca2bd	231	#define LSM6DSL_ACC_GYRO_MAG_SI_YX 0x27
cparata	0:485458fca2bd	232	#define LSM6DSL_ACC_GYRO_MAG_SI_YY 0x28
cparata	0:485458fca2bd	233	#define LSM6DSL_ACC_GYRO_MAG_SI_YZ 0x29
cparata	0:485458fca2bd	234	#define LSM6DSL_ACC_GYRO_MAG_SI_ZX 0x2A
cparata	0:485458fca2bd	235	#define LSM6DSL_ACC_GYRO_MAG_SI_ZY 0x2B
cparata	0:485458fca2bd	236	#define LSM6DSL_ACC_GYRO_MAG_SI_ZZ 0x2C
cparata	0:485458fca2bd	237	#define LSM6DSL_ACC_GYRO_MAG_OFFX_L 0x2D
cparata	0:485458fca2bd	238	#define LSM6DSL_ACC_GYRO_MAG_OFFX_H 0x2E
cparata	0:485458fca2bd	239	#define LSM6DSL_ACC_GYRO_MAG_OFFY_L 0x2F
cparata	0:485458fca2bd	240	#define LSM6DSL_ACC_GYRO_MAG_OFFY_H 0x30
cparata	0:485458fca2bd	241	#define LSM6DSL_ACC_GYRO_MAG_OFFZ_L 0x31
cparata	0:485458fca2bd	242	#define LSM6DSL_ACC_GYRO_MAG_OFFZ_H 0x32
cparata	0:485458fca2bd	243
cparata	0:485458fca2bd	244	/************ Generic Function *****************/
cparata	0:485458fca2bd	245
cparata	0:485458fca2bd	246	/*******************************************************************************
cparata	0:485458fca2bd	247	* Register : Generic - All
cparata	0:485458fca2bd	248	* Address : Generic - All
cparata	0:485458fca2bd	249	* Bit Group Name: None
cparata	0:485458fca2bd	250	* Permission : W
cparata	0:485458fca2bd	251	*******************************************************************************/
cparata	0:485458fca2bd	252	status_t LSM6DSL_ACC_GYRO_WriteReg( void handle, u8_t Reg, u8_t Bufp, u16_t len );
cparata	0:485458fca2bd	253
cparata	0:485458fca2bd	254	/*******************************************************************************
cparata	0:485458fca2bd	255	* Register : Generic - All
cparata	0:485458fca2bd	256	* Address : Generic - All
cparata	0:485458fca2bd	257	* Bit Group Name: None
cparata	0:485458fca2bd	258	* Permission : R
cparata	0:485458fca2bd	259	*******************************************************************************/
cparata	0:485458fca2bd	260	status_t LSM6DSL_ACC_GYRO_ReadReg( void handle, u8_t Reg, u8_t Bufp, u16_t len );
cparata	0:485458fca2bd	261
cparata	0:485458fca2bd	262	/************** Base Function *****************/
cparata	0:485458fca2bd	263
cparata	0:485458fca2bd	264	/*******************************************************************************
cparata	0:485458fca2bd	265	* Register : WHO_AM_I
cparata	0:485458fca2bd	266	* Address : 0X0F
cparata	0:485458fca2bd	267	* Bit Group Name: WHO_AM_I_BIT
cparata	0:485458fca2bd	268	* Permission : RO
cparata	0:485458fca2bd	269	*******************************************************************************/
cparata	0:485458fca2bd	270	#define LSM6DSL_ACC_GYRO_WHO_AM_I_BIT_MASK 0xFF
cparata	0:485458fca2bd	271	#define LSM6DSL_ACC_GYRO_WHO_AM_I_BIT_POSITION 0
cparata	0:485458fca2bd	272	status_t LSM6DSL_ACC_GYRO_R_WHO_AM_I(void handle, u8_t value);
cparata	0:485458fca2bd	273
cparata	0:485458fca2bd	274	/*******************************************************************************
cparata	0:485458fca2bd	275	* Register : CTRL3_C
cparata	0:485458fca2bd	276	* Address : 0X12
cparata	0:485458fca2bd	277	* Bit Group Name: BDU
cparata	0:485458fca2bd	278	* Permission : RW
cparata	0:485458fca2bd	279	*******************************************************************************/
cparata	0:485458fca2bd	280	typedef enum {
cparata	0:485458fca2bd	281	LSM6DSL_ACC_GYRO_BDU_CONTINUOS =0x00,
cparata	0:485458fca2bd	282	LSM6DSL_ACC_GYRO_BDU_BLOCK_UPDATE =0x40,
cparata	0:485458fca2bd	283	} LSM6DSL_ACC_GYRO_BDU_t;
cparata	0:485458fca2bd	284
cparata	0:485458fca2bd	285	#define LSM6DSL_ACC_GYRO_BDU_MASK 0x40
cparata	0:485458fca2bd	286	status_t LSM6DSL_ACC_GYRO_W_BDU(void *handle, LSM6DSL_ACC_GYRO_BDU_t newValue);
cparata	0:485458fca2bd	287	status_t LSM6DSL_ACC_GYRO_R_BDU(void handle, LSM6DSL_ACC_GYRO_BDU_t value);
cparata	0:485458fca2bd	288
cparata	0:485458fca2bd	289	/*******************************************************************************
cparata	0:485458fca2bd	290	* Register : CTRL1_XL
cparata	0:485458fca2bd	291	* Address : 0X10
cparata	0:485458fca2bd	292	* Bit Group Name: FS_XL
cparata	0:485458fca2bd	293	* Permission : RW
cparata	0:485458fca2bd	294	*******************************************************************************/
cparata	0:485458fca2bd	295	typedef enum {
cparata	0:485458fca2bd	296	LSM6DSL_ACC_GYRO_FS_XL_2g =0x00,
cparata	0:485458fca2bd	297	LSM6DSL_ACC_GYRO_FS_XL_16g =0x04,
cparata	0:485458fca2bd	298	LSM6DSL_ACC_GYRO_FS_XL_4g =0x08,
cparata	0:485458fca2bd	299	LSM6DSL_ACC_GYRO_FS_XL_8g =0x0C,
cparata	0:485458fca2bd	300	} LSM6DSL_ACC_GYRO_FS_XL_t;
cparata	0:485458fca2bd	301
cparata	0:485458fca2bd	302	#define LSM6DSL_ACC_GYRO_FS_XL_MASK 0x0C
cparata	0:485458fca2bd	303	status_t LSM6DSL_ACC_GYRO_W_FS_XL(void *handle, LSM6DSL_ACC_GYRO_FS_XL_t newValue);
cparata	0:485458fca2bd	304	status_t LSM6DSL_ACC_GYRO_R_FS_XL(void handle, LSM6DSL_ACC_GYRO_FS_XL_t value);
cparata	0:485458fca2bd	305
cparata	0:485458fca2bd	306	/*******************************************************************************
cparata	0:485458fca2bd	307	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	308	* Output Type : GetAccData
cparata	0:485458fca2bd	309	* Permission : RO
cparata	0:485458fca2bd	310	*******************************************************************************/
cparata	0:485458fca2bd	311	status_t LSM6DSL_ACC_GYRO_GetRawAccData(void handle, u8_t buff);
cparata	0:485458fca2bd	312	status_t LSM6DSL_ACC_Get_Acceleration(void handle, int buff, u8_t from_fifo);
cparata	0:485458fca2bd	313
cparata	0:485458fca2bd	314	/*******************************************************************************
cparata	0:485458fca2bd	315	* Register : CTRL1_XL
cparata	0:485458fca2bd	316	* Address : 0X10
cparata	0:485458fca2bd	317	* Bit Group Name: ODR_XL
cparata	0:485458fca2bd	318	* Permission : RW
cparata	0:485458fca2bd	319	*******************************************************************************/
cparata	0:485458fca2bd	320	typedef enum {
cparata	0:485458fca2bd	321	LSM6DSL_ACC_GYRO_ODR_XL_POWER_DOWN =0x00,
cparata	0:485458fca2bd	322	LSM6DSL_ACC_GYRO_ODR_XL_13Hz =0x10,
cparata	0:485458fca2bd	323	LSM6DSL_ACC_GYRO_ODR_XL_26Hz =0x20,
cparata	0:485458fca2bd	324	LSM6DSL_ACC_GYRO_ODR_XL_52Hz =0x30,
cparata	0:485458fca2bd	325	LSM6DSL_ACC_GYRO_ODR_XL_104Hz =0x40,
cparata	0:485458fca2bd	326	LSM6DSL_ACC_GYRO_ODR_XL_208Hz =0x50,
cparata	0:485458fca2bd	327	LSM6DSL_ACC_GYRO_ODR_XL_416Hz =0x60,
cparata	0:485458fca2bd	328	LSM6DSL_ACC_GYRO_ODR_XL_833Hz =0x70,
cparata	0:485458fca2bd	329	LSM6DSL_ACC_GYRO_ODR_XL_1660Hz =0x80,
cparata	0:485458fca2bd	330	LSM6DSL_ACC_GYRO_ODR_XL_3330Hz =0x90,
cparata	0:485458fca2bd	331	LSM6DSL_ACC_GYRO_ODR_XL_6660Hz =0xA0,
cparata	0:485458fca2bd	332	} LSM6DSL_ACC_GYRO_ODR_XL_t;
cparata	0:485458fca2bd	333
cparata	0:485458fca2bd	334	#define LSM6DSL_ACC_GYRO_ODR_XL_MASK 0xF0
cparata	0:485458fca2bd	335	status_t LSM6DSL_ACC_GYRO_W_ODR_XL(void *handle, LSM6DSL_ACC_GYRO_ODR_XL_t newValue);
cparata	0:485458fca2bd	336	status_t LSM6DSL_ACC_GYRO_R_ODR_XL(void handle, LSM6DSL_ACC_GYRO_ODR_XL_t value);
cparata	0:485458fca2bd	337	status_t LSM6DSL_ACC_GYRO_translate_ODR_XL(LSM6DSL_ACC_GYRO_ODR_XL_t value, u16_t *odr_hz_val);
cparata	0:485458fca2bd	338
cparata	0:485458fca2bd	339	/*******************************************************************************
cparata	0:485458fca2bd	340	* Register : CTRL2_G
cparata	0:485458fca2bd	341	* Address : 0X11
cparata	0:485458fca2bd	342	* Bit Group Name: FS_G
cparata	0:485458fca2bd	343	* Permission : RW
cparata	0:485458fca2bd	344	*******************************************************************************/
cparata	0:485458fca2bd	345	typedef enum {
cparata	0:485458fca2bd	346	LSM6DSL_ACC_GYRO_FS_G_245dps =0x00,
cparata	0:485458fca2bd	347	LSM6DSL_ACC_GYRO_FS_G_500dps =0x04,
cparata	0:485458fca2bd	348	LSM6DSL_ACC_GYRO_FS_G_1000dps =0x08,
cparata	0:485458fca2bd	349	LSM6DSL_ACC_GYRO_FS_G_2000dps =0x0C,
cparata	0:485458fca2bd	350	} LSM6DSL_ACC_GYRO_FS_G_t;
cparata	0:485458fca2bd	351
cparata	0:485458fca2bd	352	#define LSM6DSL_ACC_GYRO_FS_G_MASK 0x0C
cparata	0:485458fca2bd	353	status_t LSM6DSL_ACC_GYRO_W_FS_G(void *handle, LSM6DSL_ACC_GYRO_FS_G_t newValue);
cparata	0:485458fca2bd	354	status_t LSM6DSL_ACC_GYRO_R_FS_G(void handle, LSM6DSL_ACC_GYRO_FS_G_t value);
cparata	0:485458fca2bd	355
cparata	0:485458fca2bd	356	/*******************************************************************************
cparata	0:485458fca2bd	357	* Register : CTRL2_G
cparata	0:485458fca2bd	358	* Address : 0X11
cparata	0:485458fca2bd	359	* Bit Group Name: ODR_G
cparata	0:485458fca2bd	360	* Permission : RW
cparata	0:485458fca2bd	361	*******************************************************************************/
cparata	0:485458fca2bd	362	typedef enum {
cparata	0:485458fca2bd	363	LSM6DSL_ACC_GYRO_ODR_G_POWER_DOWN =0x00,
cparata	0:485458fca2bd	364	LSM6DSL_ACC_GYRO_ODR_G_13Hz =0x10,
cparata	0:485458fca2bd	365	LSM6DSL_ACC_GYRO_ODR_G_26Hz =0x20,
cparata	0:485458fca2bd	366	LSM6DSL_ACC_GYRO_ODR_G_52Hz =0x30,
cparata	0:485458fca2bd	367	LSM6DSL_ACC_GYRO_ODR_G_104Hz =0x40,
cparata	0:485458fca2bd	368	LSM6DSL_ACC_GYRO_ODR_G_208Hz =0x50,
cparata	0:485458fca2bd	369	LSM6DSL_ACC_GYRO_ODR_G_416Hz =0x60,
cparata	0:485458fca2bd	370	LSM6DSL_ACC_GYRO_ODR_G_833Hz =0x70,
cparata	0:485458fca2bd	371	LSM6DSL_ACC_GYRO_ODR_G_1660Hz =0x80,
cparata	0:485458fca2bd	372	LSM6DSL_ACC_GYRO_ODR_G_3330Hz =0x90,
cparata	0:485458fca2bd	373	LSM6DSL_ACC_GYRO_ODR_G_6660Hz =0xA0,
cparata	0:485458fca2bd	374	} LSM6DSL_ACC_GYRO_ODR_G_t;
cparata	0:485458fca2bd	375
cparata	0:485458fca2bd	376	#define LSM6DSL_ACC_GYRO_ODR_G_MASK 0xF0
cparata	0:485458fca2bd	377	status_t LSM6DSL_ACC_GYRO_W_ODR_G(void *handle, LSM6DSL_ACC_GYRO_ODR_G_t newValue);
cparata	0:485458fca2bd	378	status_t LSM6DSL_ACC_GYRO_R_ODR_G(void handle, LSM6DSL_ACC_GYRO_ODR_G_t value);
cparata	0:485458fca2bd	379	status_t LSM6DSL_ACC_GYRO_translate_ODR_G(LSM6DSL_ACC_GYRO_ODR_G_t value, u16_t *odr_hz_val);
cparata	0:485458fca2bd	380
cparata	0:485458fca2bd	381	/*******************************************************************************
cparata	0:485458fca2bd	382	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	383	* Output Type : GetGyroData
cparata	0:485458fca2bd	384	* Permission : RO
cparata	0:485458fca2bd	385	*******************************************************************************/
cparata	0:485458fca2bd	386	status_t LSM6DSL_ACC_GYRO_GetRawGyroData(void handle, u8_t buff);
cparata	0:485458fca2bd	387	status_t LSM6DSL_ACC_Get_AngularRate(void handle, int buff, u8_t from_fifo);
cparata	0:485458fca2bd	388
cparata	0:485458fca2bd	389	/*******************************************************************************
cparata	0:485458fca2bd	390	* Register : CTRL1_XL
cparata	0:485458fca2bd	391	* Address : 0X10
cparata	0:485458fca2bd	392	* Bit Group Name: BW_SEL
cparata	0:485458fca2bd	393	* Permission : RW
cparata	0:485458fca2bd	394	*******************************************************************************/
cparata	0:485458fca2bd	395	typedef enum {
cparata	0:485458fca2bd	396	LSM6DSL_ACC_GYRO_BW_SEL_ODR2 =0x00,
cparata	0:485458fca2bd	397	LSM6DSL_ACC_GYRO_BW_SEL_ODR4 =0x02,
cparata	0:485458fca2bd	398	} LSM6DSL_ACC_GYRO_BW_SEL_t;
cparata	0:485458fca2bd	399
cparata	0:485458fca2bd	400	#define LSM6DSL_ACC_GYRO_BW_SEL_MASK 0x02
cparata	0:485458fca2bd	401	status_t LSM6DSL_ACC_GYRO_W_BW_SEL(void *handle, LSM6DSL_ACC_GYRO_BW_SEL_t newValue);
cparata	0:485458fca2bd	402	status_t LSM6DSL_ACC_GYRO_R_BW_SEL(void handle, LSM6DSL_ACC_GYRO_BW_SEL_t value);
cparata	0:485458fca2bd	403
cparata	0:485458fca2bd	404	/*******************************************************************************
cparata	0:485458fca2bd	405	* Register : CTRL2_G
cparata	0:485458fca2bd	406	* Address : 0X11
cparata	0:485458fca2bd	407	* Bit Group Name: FS_125
cparata	0:485458fca2bd	408	* Permission : RW
cparata	0:485458fca2bd	409	*******************************************************************************/
cparata	0:485458fca2bd	410	typedef enum {
cparata	0:485458fca2bd	411	LSM6DSL_ACC_GYRO_FS_125_DISABLED =0x00,
cparata	0:485458fca2bd	412	LSM6DSL_ACC_GYRO_FS_125_ENABLED =0x02,
cparata	0:485458fca2bd	413	} LSM6DSL_ACC_GYRO_FS_125_t;
cparata	0:485458fca2bd	414
cparata	0:485458fca2bd	415	#define LSM6DSL_ACC_GYRO_FS_125_MASK 0x02
cparata	0:485458fca2bd	416	status_t LSM6DSL_ACC_GYRO_W_FS_125(void *handle, LSM6DSL_ACC_GYRO_FS_125_t newValue);
cparata	0:485458fca2bd	417	status_t LSM6DSL_ACC_GYRO_R_FS_125(void handle, LSM6DSL_ACC_GYRO_FS_125_t value);
cparata	0:485458fca2bd	418
cparata	0:485458fca2bd	419	/************** Advanced Function *****************/
cparata	0:485458fca2bd	420
cparata	0:485458fca2bd	421	/*******************************************************************************
cparata	0:485458fca2bd	422	* Register : CTRL3_C
cparata	0:485458fca2bd	423	* Address : 0X12
cparata	0:485458fca2bd	424	* Bit Group Name: BLE
cparata	0:485458fca2bd	425	* Permission : RW
cparata	0:485458fca2bd	426	*******************************************************************************/
cparata	0:485458fca2bd	427	typedef enum {
cparata	0:485458fca2bd	428	LSM6DSL_ACC_GYRO_BLE_LSB =0x00,
cparata	0:485458fca2bd	429	LSM6DSL_ACC_GYRO_BLE_MSB =0x02,
cparata	0:485458fca2bd	430	} LSM6DSL_ACC_GYRO_BLE_t;
cparata	0:485458fca2bd	431
cparata	0:485458fca2bd	432	#define LSM6DSL_ACC_GYRO_BLE_MASK 0x02
cparata	0:485458fca2bd	433	status_t LSM6DSL_ACC_GYRO_W_BLE(void *handle, LSM6DSL_ACC_GYRO_BLE_t newValue);
cparata	0:485458fca2bd	434	status_t LSM6DSL_ACC_GYRO_R_BLE(void handle, LSM6DSL_ACC_GYRO_BLE_t value);
cparata	0:485458fca2bd	435
cparata	0:485458fca2bd	436	/*******************************************************************************
cparata	0:485458fca2bd	437	* Register : FUNC_CFG_ACCESS
cparata	0:485458fca2bd	438	* Address : 0X01
cparata	0:485458fca2bd	439	* Bit Group Name: EMB_ACC
cparata	0:485458fca2bd	440	* Permission : RW
cparata	0:485458fca2bd	441	*******************************************************************************/
cparata	0:485458fca2bd	442	typedef enum {
cparata	0:485458fca2bd	443	LSM6DSL_ACC_GYRO_EMBEDDED_ACCESS_DISABLED =0x00,
cparata	0:485458fca2bd	444	LSM6DSL_ACC_GYRO_EMBEDDED_ACCESS_ENABLED =0x80,
cparata	0:485458fca2bd	445	} LSM6DSL_ACC_GYRO_EMB_ACC_t;
cparata	0:485458fca2bd	446
cparata	0:485458fca2bd	447	#define LSM6DSL_ACC_GYRO_EMB_ACC_MASK 0x80
cparata	0:485458fca2bd	448	status_t LSM6DSL_ACC_GYRO_W_EmbeddedAccess(void *handle, LSM6DSL_ACC_GYRO_EMB_ACC_t newValue);
cparata	0:485458fca2bd	449	status_t LSM6DSL_ACC_GYRO_R_EmbeddedAccess(void handle, LSM6DSL_ACC_GYRO_EMB_ACC_t value);
cparata	0:485458fca2bd	450
cparata	0:485458fca2bd	451	/*******************************************************************************
cparata	0:485458fca2bd	452	* Register : SENSOR_SYNC_TIME
cparata	0:485458fca2bd	453	* Address : 0X04
cparata	0:485458fca2bd	454	* Bit Group Name: TPH
cparata	0:485458fca2bd	455	* Permission : RW
cparata	0:485458fca2bd	456	*******************************************************************************/
cparata	0:485458fca2bd	457	#define LSM6DSL_ACC_GYRO_TPH_MASK 0xFF
cparata	0:485458fca2bd	458	#define LSM6DSL_ACC_GYRO_TPH_POSITION 0
cparata	0:485458fca2bd	459	status_t LSM6DSL_ACC_GYRO_W_Stamping_Time_Frame(void *handle, u8_t newValue);
cparata	0:485458fca2bd	460	status_t LSM6DSL_ACC_GYRO_R_Stamping_Time_Frame(void handle, u8_t value);
cparata	0:485458fca2bd	461
cparata	0:485458fca2bd	462	/*******************************************************************************
cparata	0:485458fca2bd	463	* Register : SENSOR_SYNC_RES_RATIO
cparata	0:485458fca2bd	464	* Address : 0X05
cparata	0:485458fca2bd	465	* Bit Group Name: RR
cparata	0:485458fca2bd	466	* Permission : RW
cparata	0:485458fca2bd	467	*******************************************************************************/
cparata	0:485458fca2bd	468	typedef enum {
cparata	0:485458fca2bd	469	LSM6DSL_ACC_GYRO_TIM_RATIO_2_11 =0x00,
cparata	0:485458fca2bd	470	LSM6DSL_ACC_GYRO_TIM_RATIO_2_12 =0x01,
cparata	0:485458fca2bd	471	LSM6DSL_ACC_GYRO_TIM_RATIO_2_13 =0x02,
cparata	0:485458fca2bd	472	LSM6DSL_ACC_GYRO_TIM_RATIO_2_14 =0x03,
cparata	0:485458fca2bd	473	} LSM6DSL_ACC_GYRO_SYNC_RES_RATIO_t;
cparata	0:485458fca2bd	474
cparata	0:485458fca2bd	475	#define LSM6DSL_ACC_GYRO_SYNC_RES_RATIO_MASK 0x03
cparata	0:485458fca2bd	476	status_t LSM6DSL_ACC_GYRO_W_SYNC_RES_RATIO(void *handle, LSM6DSL_ACC_GYRO_SYNC_RES_RATIO_t newValue);
cparata	0:485458fca2bd	477	status_t LSM6DSL_ACC_GYRO_R_SYNC_RES_RATIO(void handle, LSM6DSL_ACC_GYRO_SYNC_RES_RATIO_t value);
cparata	0:485458fca2bd	478
cparata	0:485458fca2bd	479
cparata	0:485458fca2bd	480	/*******************************************************************************
cparata	0:485458fca2bd	481	* Register : FIFO_CTRL1
cparata	0:485458fca2bd	482	* Address : 0X06
cparata	0:485458fca2bd	483	* Bit Group Name: WTM_FIFO
cparata	0:485458fca2bd	484	* Permission : RW
cparata	0:485458fca2bd	485	*******************************************************************************/
cparata	0:485458fca2bd	486	#define LSM6DSL_ACC_GYRO_WTM_FIFO_CTRL1_MASK 0xFF
cparata	0:485458fca2bd	487	#define LSM6DSL_ACC_GYRO_WTM_FIFO_CTRL1_POSITION 0
cparata	0:485458fca2bd	488	#define LSM6DSL_ACC_GYRO_WTM_FIFO_CTRL2_MASK 0x07
cparata	0:485458fca2bd	489	#define LSM6DSL_ACC_GYRO_WTM_FIFO_CTRL2_POSITION 0
cparata	0:485458fca2bd	490	status_t LSM6DSL_ACC_GYRO_W_FIFO_Watermark(void *handle, u16_t newValue);
cparata	0:485458fca2bd	491	status_t LSM6DSL_ACC_GYRO_R_FIFO_Watermark(void handle, u16_t value);
cparata	0:485458fca2bd	492
cparata	0:485458fca2bd	493	/*******************************************************************************
cparata	0:485458fca2bd	494	* Register : FIFO_CTRL2
cparata	0:485458fca2bd	495	* Address : 0X07
cparata	0:485458fca2bd	496	* Bit Group Name: FIFO_TEMP_EN
cparata	0:485458fca2bd	497	* Permission : RW
cparata	0:485458fca2bd	498	*******************************************************************************/
cparata	0:485458fca2bd	499	typedef enum {
cparata	0:485458fca2bd	500	LSM6DSL_ACC_GYRO_FIFO_TEMP_DISABLE =0x00,
cparata	0:485458fca2bd	501	LSM6DSL_ACC_GYRO_FIFO_TEMP_ENABLE =0x08,
cparata	0:485458fca2bd	502	} LSM6DSL_ACC_GYRO_FIFO_TEMP_t;
cparata	0:485458fca2bd	503
cparata	0:485458fca2bd	504	#define LSM6DSL_ACC_GYRO_FIFO_TEMP_MASK 0x08
cparata	0:485458fca2bd	505	status_t LSM6DSL_ACC_GYRO_W_FIFO_TEMP(void *handle, LSM6DSL_ACC_GYRO_FIFO_TEMP_t newValue);
cparata	0:485458fca2bd	506	status_t LSM6DSL_ACC_GYRO_R_FIFO_TEMP(void handle, LSM6DSL_ACC_GYRO_FIFO_TEMP_t value);
cparata	0:485458fca2bd	507
cparata	0:485458fca2bd	508
cparata	0:485458fca2bd	509	/*******************************************************************************
cparata	0:485458fca2bd	510	* Register : FIFO_CTRL2
cparata	0:485458fca2bd	511	* Address : 0X07
cparata	0:485458fca2bd	512	* Bit Group Name: TIM_PEDO_FIFO_DRDY
cparata	0:485458fca2bd	513	* Permission : RW
cparata	0:485458fca2bd	514	*******************************************************************************/
cparata	0:485458fca2bd	515	typedef enum {
cparata	0:485458fca2bd	516	LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_DRDY_DISABLED =0x00,
cparata	0:485458fca2bd	517	LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_DRDY_ENABLED =0x40,
cparata	0:485458fca2bd	518	} LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_DRDY_t;
cparata	0:485458fca2bd	519
cparata	0:485458fca2bd	520	#define LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_DRDY_MASK 0x40
cparata	0:485458fca2bd	521	status_t LSM6DSL_ACC_GYRO_W_TIM_PEDO_FIFO_Write_En(void *handle, LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_DRDY_t newValue);
cparata	0:485458fca2bd	522	status_t LSM6DSL_ACC_GYRO_R_TIM_PEDO_FIFO_Write_En(void handle, LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_DRDY_t value);
cparata	0:485458fca2bd	523
cparata	0:485458fca2bd	524	/*******************************************************************************
cparata	0:485458fca2bd	525	* Register : FIFO_CTRL2
cparata	0:485458fca2bd	526	* Address : 0X07
cparata	0:485458fca2bd	527	* Bit Group Name: TIM_PEDO_FIFO_EN
cparata	0:485458fca2bd	528	* Permission : RW
cparata	0:485458fca2bd	529	*******************************************************************************/
cparata	0:485458fca2bd	530	typedef enum {
cparata	0:485458fca2bd	531	LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_EN_DISABLED =0x00,
cparata	0:485458fca2bd	532	LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_EN_ENABLED =0x80,
cparata	0:485458fca2bd	533	} LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_EN_t;
cparata	0:485458fca2bd	534
cparata	0:485458fca2bd	535	#define LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_EN_MASK 0x80
cparata	0:485458fca2bd	536	status_t LSM6DSL_ACC_GYRO_W_TIM_PEDO_FIFO_En(void *handle, LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_EN_t newValue);
cparata	0:485458fca2bd	537	status_t LSM6DSL_ACC_GYRO_R_TIM_PEDO_FIFO_En(void handle, LSM6DSL_ACC_GYRO_TIM_PEDO_FIFO_EN_t value);
cparata	0:485458fca2bd	538
cparata	0:485458fca2bd	539	/*******************************************************************************
cparata	0:485458fca2bd	540	* Register : FIFO_CTRL3
cparata	0:485458fca2bd	541	* Address : 0X08
cparata	0:485458fca2bd	542	* Bit Group Name: DEC_FIFO_XL
cparata	0:485458fca2bd	543	* Permission : RW
cparata	0:485458fca2bd	544	*******************************************************************************/
cparata	0:485458fca2bd	545	typedef enum {
cparata	0:485458fca2bd	546	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DATA_NOT_IN_FIFO =0x00,
cparata	0:485458fca2bd	547	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_NO_DECIMATION =0x01,
cparata	0:485458fca2bd	548	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DECIMATION_BY_2 =0x02,
cparata	0:485458fca2bd	549	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DECIMATION_BY_3 =0x03,
cparata	0:485458fca2bd	550	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DECIMATION_BY_4 =0x04,
cparata	0:485458fca2bd	551	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DECIMATION_BY_8 =0x05,
cparata	0:485458fca2bd	552	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DECIMATION_BY_16 =0x06,
cparata	0:485458fca2bd	553	LSM6DSL_ACC_GYRO_DEC_FIFO_XL_DECIMATION_BY_32 =0x07,
cparata	0:485458fca2bd	554	} LSM6DSL_ACC_GYRO_DEC_FIFO_XL_t;
cparata	0:485458fca2bd	555
cparata	0:485458fca2bd	556	#define LSM6DSL_ACC_GYRO_DEC_FIFO_XL_MASK 0x07
cparata	0:485458fca2bd	557	status_t LSM6DSL_ACC_GYRO_W_DEC_FIFO_XL(void *handle, LSM6DSL_ACC_GYRO_DEC_FIFO_XL_t newValue);
cparata	0:485458fca2bd	558	status_t LSM6DSL_ACC_GYRO_W_DEC_FIFO_XL_val(void *handle, u16_t newValue);
cparata	0:485458fca2bd	559	status_t LSM6DSL_ACC_GYRO_R_DEC_FIFO_XL(void handle, LSM6DSL_ACC_GYRO_DEC_FIFO_XL_t value);
cparata	0:485458fca2bd	560
cparata	0:485458fca2bd	561	/*******************************************************************************
cparata	0:485458fca2bd	562	* Register : FIFO_CTRL3
cparata	0:485458fca2bd	563	* Address : 0X08
cparata	0:485458fca2bd	564	* Bit Group Name: DEC_FIFO_G
cparata	0:485458fca2bd	565	* Permission : RW
cparata	0:485458fca2bd	566	*******************************************************************************/
cparata	0:485458fca2bd	567	typedef enum {
cparata	0:485458fca2bd	568	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DATA_NOT_IN_FIFO =0x00,
cparata	0:485458fca2bd	569	LSM6DSL_ACC_GYRO_DEC_FIFO_G_NO_DECIMATION =0x08,
cparata	0:485458fca2bd	570	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DECIMATION_BY_2 =0x10,
cparata	0:485458fca2bd	571	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DECIMATION_BY_3 =0x18,
cparata	0:485458fca2bd	572	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DECIMATION_BY_4 =0x20,
cparata	0:485458fca2bd	573	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DECIMATION_BY_8 =0x28,
cparata	0:485458fca2bd	574	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DECIMATION_BY_16 =0x30,
cparata	0:485458fca2bd	575	LSM6DSL_ACC_GYRO_DEC_FIFO_G_DECIMATION_BY_32 =0x38,
cparata	0:485458fca2bd	576	} LSM6DSL_ACC_GYRO_DEC_FIFO_G_t;
cparata	0:485458fca2bd	577
cparata	0:485458fca2bd	578	#define LSM6DSL_ACC_GYRO_DEC_FIFO_G_MASK 0x38
cparata	0:485458fca2bd	579	status_t LSM6DSL_ACC_GYRO_W_DEC_FIFO_G(void *handle, LSM6DSL_ACC_GYRO_DEC_FIFO_G_t newValue);
cparata	0:485458fca2bd	580	status_t LSM6DSL_ACC_GYRO_W_DEC_FIFO_G_val(void *handle, u16_t newValue);
cparata	0:485458fca2bd	581	status_t LSM6DSL_ACC_GYRO_R_DEC_FIFO_G(void handle, LSM6DSL_ACC_GYRO_DEC_FIFO_G_t value);
cparata	0:485458fca2bd	582
cparata	0:485458fca2bd	583	/*******************************************************************************
cparata	0:485458fca2bd	584	* Register : FIFO_CTRL4
cparata	0:485458fca2bd	585	* Address : 0X09
cparata	0:485458fca2bd	586	* Bit Group Name: DEC_DS3_FIFO
cparata	0:485458fca2bd	587	* Permission : RW
cparata	0:485458fca2bd	588	*******************************************************************************/
cparata	0:485458fca2bd	589	typedef enum {
cparata	0:485458fca2bd	590	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DATA_NOT_IN_FIFO =0x00,
cparata	0:485458fca2bd	591	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_NO_DECIMATION =0x01,
cparata	0:485458fca2bd	592	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DECIMATION_BY_2 =0x02,
cparata	0:485458fca2bd	593	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DECIMATION_BY_3 =0x03,
cparata	0:485458fca2bd	594	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DECIMATION_BY_4 =0x04,
cparata	0:485458fca2bd	595	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DECIMATION_BY_8 =0x05,
cparata	0:485458fca2bd	596	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DECIMATION_BY_16 =0x06,
cparata	0:485458fca2bd	597	LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_DECIMATION_BY_32 =0x07,
cparata	0:485458fca2bd	598	} LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_t;
cparata	0:485458fca2bd	599
cparata	0:485458fca2bd	600	#define LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_MASK 0x07
cparata	0:485458fca2bd	601	status_t LSM6DSL_ACC_GYRO_W_DEC_FIFO_DS3(void *handle, LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_t newValue);
cparata	0:485458fca2bd	602	status_t LSM6DSL_ACC_GYRO_R_DEC_FIFO_DS3(void handle, LSM6DSL_ACC_GYRO_DEC_FIFO_DS3_t value);
cparata	0:485458fca2bd	603
cparata	0:485458fca2bd	604	/*******************************************************************************
cparata	0:485458fca2bd	605	* Register : FIFO_CTRL4
cparata	0:485458fca2bd	606	* Address : 0X09
cparata	0:485458fca2bd	607	* Bit Group Name: DEC_DS4_FIFO
cparata	0:485458fca2bd	608	* Permission : RW
cparata	0:485458fca2bd	609	*******************************************************************************/
cparata	0:485458fca2bd	610	typedef enum {
cparata	0:485458fca2bd	611	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DATA_NOT_IN_FIFO =0x00,
cparata	0:485458fca2bd	612	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_NO_DECIMATION =0x08,
cparata	0:485458fca2bd	613	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DECIMATION_BY_2 =0x10,
cparata	0:485458fca2bd	614	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DECIMATION_BY_3 =0x18,
cparata	0:485458fca2bd	615	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DECIMATION_BY_4 =0x20,
cparata	0:485458fca2bd	616	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DECIMATION_BY_8 =0x28,
cparata	0:485458fca2bd	617	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DECIMATION_BY_16 =0x30,
cparata	0:485458fca2bd	618	LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_DECIMATION_BY_32 =0x38,
cparata	0:485458fca2bd	619	} LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_t;
cparata	0:485458fca2bd	620
cparata	0:485458fca2bd	621	#define LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_MASK 0x38
cparata	0:485458fca2bd	622	status_t LSM6DSL_ACC_GYRO_W_DEC_FIFO_DS4(void *handle, LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_t newValue);
cparata	0:485458fca2bd	623	status_t LSM6DSL_ACC_GYRO_R_DEC_FIFO_DS4(void handle, LSM6DSL_ACC_GYRO_DEC_FIFO_DS4_t value);
cparata	0:485458fca2bd	624
cparata	0:485458fca2bd	625	/*******************************************************************************
cparata	0:485458fca2bd	626	* Register : FIFO_CTRL4
cparata	0:485458fca2bd	627	* Address : 0X09
cparata	0:485458fca2bd	628	* Bit Group Name: HI_DATA_ONLY
cparata	0:485458fca2bd	629	* Permission : RW
cparata	0:485458fca2bd	630	*******************************************************************************/
cparata	0:485458fca2bd	631	typedef enum {
cparata	0:485458fca2bd	632	LSM6DSL_ACC_GYRO_HI_DATA_ONLY_DISABLED =0x00,
cparata	0:485458fca2bd	633	LSM6DSL_ACC_GYRO_HI_DATA_ONLY_ENABLED =0x40,
cparata	0:485458fca2bd	634	} LSM6DSL_ACC_GYRO_HI_DATA_ONLY_t;
cparata	0:485458fca2bd	635
cparata	0:485458fca2bd	636	#define LSM6DSL_ACC_GYRO_HI_DATA_ONLY_MASK 0x40
cparata	0:485458fca2bd	637	status_t LSM6DSL_ACC_GYRO_W_HI_DATA_ONLY(void *handle, LSM6DSL_ACC_GYRO_HI_DATA_ONLY_t newValue);
cparata	0:485458fca2bd	638	status_t LSM6DSL_ACC_GYRO_R_HI_DATA_ONLY(void handle, LSM6DSL_ACC_GYRO_HI_DATA_ONLY_t value);
cparata	0:485458fca2bd	639
cparata	0:485458fca2bd	640	/*******************************************************************************
cparata	0:485458fca2bd	641	* Register : FIFO_CTRL4
cparata	0:485458fca2bd	642	* Address : 0X09
cparata	0:485458fca2bd	643	* Bit Group Name: STOP_ON_FTH
cparata	0:485458fca2bd	644	* Permission : RW
cparata	0:485458fca2bd	645	*******************************************************************************/
cparata	0:485458fca2bd	646	typedef enum {
cparata	0:485458fca2bd	647	LSM6DSL_ACC_GYRO_STOP_ON_FTH_DISABLED =0x00,
cparata	0:485458fca2bd	648	LSM6DSL_ACC_GYRO_STOP_ON_FTH_ENABLED =0x80,
cparata	0:485458fca2bd	649	} LSM6DSL_ACC_GYRO_STOP_ON_FTH_t;
cparata	0:485458fca2bd	650
cparata	0:485458fca2bd	651	#define LSM6DSL_ACC_GYRO_STOP_ON_FTH_MASK 0x80
cparata	0:485458fca2bd	652	status_t LSM6DSL_ACC_GYRO_W_STOP_ON_FTH(void *handle, LSM6DSL_ACC_GYRO_STOP_ON_FTH_t newValue);
cparata	0:485458fca2bd	653	status_t LSM6DSL_ACC_GYRO_R_STOP_ON_FTH(void handle, LSM6DSL_ACC_GYRO_STOP_ON_FTH_t value);
cparata	0:485458fca2bd	654
cparata	0:485458fca2bd	655	/*******************************************************************************
cparata	0:485458fca2bd	656	* Register : FIFO_CTRL5
cparata	0:485458fca2bd	657	* Address : 0X0A
cparata	0:485458fca2bd	658	* Bit Group Name: FIFO_MODE
cparata	0:485458fca2bd	659	* Permission : RW
cparata	0:485458fca2bd	660	*******************************************************************************/
cparata	0:485458fca2bd	661	typedef enum {
cparata	0:485458fca2bd	662	LSM6DSL_ACC_GYRO_FIFO_MODE_BYPASS =0x00,
cparata	0:485458fca2bd	663	LSM6DSL_ACC_GYRO_FIFO_MODE_FIFO =0x01,
cparata	0:485458fca2bd	664	LSM6DSL_ACC_GYRO_FIFO_MODE_STREAM =0x02,
cparata	0:485458fca2bd	665	LSM6DSL_ACC_GYRO_FIFO_MODE_STF =0x03,
cparata	0:485458fca2bd	666	LSM6DSL_ACC_GYRO_FIFO_MODE_BTS =0x04,
cparata	0:485458fca2bd	667	LSM6DSL_ACC_GYRO_FIFO_MODE_DYN_STREAM =0x05,
cparata	0:485458fca2bd	668	LSM6DSL_ACC_GYRO_FIFO_MODE_DYN_STREAM_2 =0x06,
cparata	0:485458fca2bd	669	LSM6DSL_ACC_GYRO_FIFO_MODE_BTF =0x07,
cparata	0:485458fca2bd	670	} LSM6DSL_ACC_GYRO_FIFO_MODE_t;
cparata	0:485458fca2bd	671
cparata	0:485458fca2bd	672	#define LSM6DSL_ACC_GYRO_FIFO_MODE_MASK 0x07
cparata	0:485458fca2bd	673	status_t LSM6DSL_ACC_GYRO_W_FIFO_MODE(void *handle, LSM6DSL_ACC_GYRO_FIFO_MODE_t newValue);
cparata	0:485458fca2bd	674	status_t LSM6DSL_ACC_GYRO_R_FIFO_MODE(void handle, LSM6DSL_ACC_GYRO_FIFO_MODE_t value);
cparata	0:485458fca2bd	675
cparata	0:485458fca2bd	676	/*******************************************************************************
cparata	0:485458fca2bd	677	* Register : FIFO_CTRL5
cparata	0:485458fca2bd	678	* Address : 0X0A
cparata	0:485458fca2bd	679	* Bit Group Name: ODR_FIFO
cparata	0:485458fca2bd	680	* Permission : RW
cparata	0:485458fca2bd	681	*******************************************************************************/
cparata	0:485458fca2bd	682	typedef enum {
cparata	0:485458fca2bd	683	LSM6DSL_ACC_GYRO_ODR_FIFO_10Hz =0x08,
cparata	0:485458fca2bd	684	LSM6DSL_ACC_GYRO_ODR_FIFO_25Hz =0x10,
cparata	0:485458fca2bd	685	LSM6DSL_ACC_GYRO_ODR_FIFO_50Hz =0x18,
cparata	0:485458fca2bd	686	LSM6DSL_ACC_GYRO_ODR_FIFO_100Hz =0x20,
cparata	0:485458fca2bd	687	LSM6DSL_ACC_GYRO_ODR_FIFO_200Hz =0x28,
cparata	0:485458fca2bd	688	LSM6DSL_ACC_GYRO_ODR_FIFO_400Hz =0x30,
cparata	0:485458fca2bd	689	LSM6DSL_ACC_GYRO_ODR_FIFO_800Hz =0x38,
cparata	0:485458fca2bd	690	LSM6DSL_ACC_GYRO_ODR_FIFO_1600Hz =0x40,
cparata	0:485458fca2bd	691	LSM6DSL_ACC_GYRO_ODR_FIFO_3300Hz =0x48,
cparata	0:485458fca2bd	692	LSM6DSL_ACC_GYRO_ODR_FIFO_6600Hz =0x50,
cparata	0:485458fca2bd	693	LSM6DSL_ACC_GYRO_ODR_FIFO_13300Hz =0x58,
cparata	0:485458fca2bd	694	} LSM6DSL_ACC_GYRO_ODR_FIFO_t;
cparata	0:485458fca2bd	695
cparata	0:485458fca2bd	696	#define LSM6DSL_ACC_GYRO_ODR_FIFO_MASK 0x78
cparata	0:485458fca2bd	697	status_t LSM6DSL_ACC_GYRO_W_ODR_FIFO(void *handle, LSM6DSL_ACC_GYRO_ODR_FIFO_t newValue);
cparata	0:485458fca2bd	698	status_t LSM6DSL_ACC_GYRO_R_ODR_FIFO(void handle, LSM6DSL_ACC_GYRO_ODR_FIFO_t value);
cparata	0:485458fca2bd	699
cparata	0:485458fca2bd	700	/*******************************************************************************
cparata	0:485458fca2bd	701	* Register : DRDY_PULSE_CFG_G
cparata	0:485458fca2bd	702	* Address : 0X0B
cparata	0:485458fca2bd	703	* Bit Group Name: DRDY_PULSE
cparata	0:485458fca2bd	704	* Permission : RW
cparata	0:485458fca2bd	705	*******************************************************************************/
cparata	0:485458fca2bd	706	typedef enum {
cparata	0:485458fca2bd	707	LSM6DSL_ACC_GYRO_DRDY_LATCH =0x00,
cparata	0:485458fca2bd	708	LSM6DSL_ACC_GYRO_DRDY_PULSE =0x80,
cparata	0:485458fca2bd	709	} LSM6DSL_ACC_GYRO_DRDY_PULSE_t;
cparata	0:485458fca2bd	710
cparata	0:485458fca2bd	711	#define LSM6DSL_ACC_GYRO_DRDY_PULSE_MASK 0x80
cparata	0:485458fca2bd	712	status_t LSM6DSL_ACC_GYRO_W_DRDY_PULSE(void *handle, LSM6DSL_ACC_GYRO_DRDY_PULSE_t newValue);
cparata	0:485458fca2bd	713	status_t LSM6DSL_ACC_GYRO_R_DRDY_PULSE(void handle, LSM6DSL_ACC_GYRO_DRDY_PULSE_t value);
cparata	0:485458fca2bd	714
cparata	0:485458fca2bd	715	/*******************************************************************************
cparata	0:485458fca2bd	716	* Register : INT1_CTRL
cparata	0:485458fca2bd	717	* Address : 0X0D
cparata	0:485458fca2bd	718	* Bit Group Name: INT1_DRDY_XL
cparata	0:485458fca2bd	719	* Permission : RW
cparata	0:485458fca2bd	720	*******************************************************************************/
cparata	0:485458fca2bd	721	typedef enum {
cparata	0:485458fca2bd	722	LSM6DSL_ACC_GYRO_INT1_DRDY_XL_DISABLED =0x00,
cparata	0:485458fca2bd	723	LSM6DSL_ACC_GYRO_INT1_DRDY_XL_ENABLED =0x01,
cparata	0:485458fca2bd	724	} LSM6DSL_ACC_GYRO_INT1_DRDY_XL_t;
cparata	0:485458fca2bd	725
cparata	0:485458fca2bd	726	#define LSM6DSL_ACC_GYRO_INT1_DRDY_XL_MASK 0x01
cparata	0:485458fca2bd	727	status_t LSM6DSL_ACC_GYRO_W_DRDY_XL_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_DRDY_XL_t newValue);
cparata	0:485458fca2bd	728	status_t LSM6DSL_ACC_GYRO_R_DRDY_XL_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_DRDY_XL_t value);
cparata	0:485458fca2bd	729
cparata	0:485458fca2bd	730	/*******************************************************************************
cparata	0:485458fca2bd	731	* Register : INT1_CTRL
cparata	0:485458fca2bd	732	* Address : 0X0D
cparata	0:485458fca2bd	733	* Bit Group Name: INT1_DRDY_G
cparata	0:485458fca2bd	734	* Permission : RW
cparata	0:485458fca2bd	735	*******************************************************************************/
cparata	0:485458fca2bd	736	typedef enum {
cparata	0:485458fca2bd	737	LSM6DSL_ACC_GYRO_INT1_DRDY_G_DISABLED =0x00,
cparata	0:485458fca2bd	738	LSM6DSL_ACC_GYRO_INT1_DRDY_G_ENABLED =0x02,
cparata	0:485458fca2bd	739	} LSM6DSL_ACC_GYRO_INT1_DRDY_G_t;
cparata	0:485458fca2bd	740
cparata	0:485458fca2bd	741	#define LSM6DSL_ACC_GYRO_INT1_DRDY_G_MASK 0x02
cparata	0:485458fca2bd	742	status_t LSM6DSL_ACC_GYRO_W_DRDY_G_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_DRDY_G_t newValue);
cparata	0:485458fca2bd	743	status_t LSM6DSL_ACC_GYRO_R_DRDY_G_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_DRDY_G_t value);
cparata	0:485458fca2bd	744
cparata	0:485458fca2bd	745	/*******************************************************************************
cparata	0:485458fca2bd	746	* Register : INT1_CTRL
cparata	0:485458fca2bd	747	* Address : 0X0D
cparata	0:485458fca2bd	748	* Bit Group Name: INT1_BOOT
cparata	0:485458fca2bd	749	* Permission : RW
cparata	0:485458fca2bd	750	*******************************************************************************/
cparata	0:485458fca2bd	751	typedef enum {
cparata	0:485458fca2bd	752	LSM6DSL_ACC_GYRO_INT1_BOOT_DISABLED =0x00,
cparata	0:485458fca2bd	753	LSM6DSL_ACC_GYRO_INT1_BOOT_ENABLED =0x04,
cparata	0:485458fca2bd	754	} LSM6DSL_ACC_GYRO_INT1_BOOT_t;
cparata	0:485458fca2bd	755
cparata	0:485458fca2bd	756	#define LSM6DSL_ACC_GYRO_INT1_BOOT_MASK 0x04
cparata	0:485458fca2bd	757	status_t LSM6DSL_ACC_GYRO_W_BOOT_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_BOOT_t newValue);
cparata	0:485458fca2bd	758	status_t LSM6DSL_ACC_GYRO_R_BOOT_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_BOOT_t value);
cparata	0:485458fca2bd	759
cparata	0:485458fca2bd	760	/*******************************************************************************
cparata	0:485458fca2bd	761	* Register : INT1_CTRL
cparata	0:485458fca2bd	762	* Address : 0X0D
cparata	0:485458fca2bd	763	* Bit Group Name: INT1_FTH
cparata	0:485458fca2bd	764	* Permission : RW
cparata	0:485458fca2bd	765	*******************************************************************************/
cparata	0:485458fca2bd	766	typedef enum {
cparata	0:485458fca2bd	767	LSM6DSL_ACC_GYRO_INT1_FTH_DISABLED =0x00,
cparata	0:485458fca2bd	768	LSM6DSL_ACC_GYRO_INT1_FTH_ENABLED =0x08,
cparata	0:485458fca2bd	769	} LSM6DSL_ACC_GYRO_INT1_FTH_t;
cparata	0:485458fca2bd	770
cparata	0:485458fca2bd	771	#define LSM6DSL_ACC_GYRO_INT1_FTH_MASK 0x08
cparata	0:485458fca2bd	772	status_t LSM6DSL_ACC_GYRO_W_FIFO_TSHLD_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_FTH_t newValue);
cparata	0:485458fca2bd	773	status_t LSM6DSL_ACC_GYRO_R_FIFO_TSHLD_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_FTH_t value);
cparata	0:485458fca2bd	774
cparata	0:485458fca2bd	775	/*******************************************************************************
cparata	0:485458fca2bd	776	* Register : INT1_CTRL
cparata	0:485458fca2bd	777	* Address : 0X0D
cparata	0:485458fca2bd	778	* Bit Group Name: INT1_OVR
cparata	0:485458fca2bd	779	* Permission : RW
cparata	0:485458fca2bd	780	*******************************************************************************/
cparata	0:485458fca2bd	781	typedef enum {
cparata	0:485458fca2bd	782	LSM6DSL_ACC_GYRO_INT1_OVR_DISABLED =0x00,
cparata	0:485458fca2bd	783	LSM6DSL_ACC_GYRO_INT1_OVR_ENABLED =0x10,
cparata	0:485458fca2bd	784	} LSM6DSL_ACC_GYRO_INT1_OVR_t;
cparata	0:485458fca2bd	785
cparata	0:485458fca2bd	786	#define LSM6DSL_ACC_GYRO_INT1_OVR_MASK 0x10
cparata	0:485458fca2bd	787	status_t LSM6DSL_ACC_GYRO_W_OVERRUN_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_OVR_t newValue);
cparata	0:485458fca2bd	788	status_t LSM6DSL_ACC_GYRO_R_OVERRUN_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_OVR_t value);
cparata	0:485458fca2bd	789
cparata	0:485458fca2bd	790	/*******************************************************************************
cparata	0:485458fca2bd	791	* Register : INT1_CTRL
cparata	0:485458fca2bd	792	* Address : 0X0D
cparata	0:485458fca2bd	793	* Bit Group Name: INT1_FULL_FLAG
cparata	0:485458fca2bd	794	* Permission : RW
cparata	0:485458fca2bd	795	*******************************************************************************/
cparata	0:485458fca2bd	796	typedef enum {
cparata	0:485458fca2bd	797	LSM6DSL_ACC_GYRO_INT1_FULL_FLAG_DISABLED =0x00,
cparata	0:485458fca2bd	798	LSM6DSL_ACC_GYRO_INT1_FULL_FLAG_ENABLED =0x20,
cparata	0:485458fca2bd	799	} LSM6DSL_ACC_GYRO_INT1_FULL_FLAG_t;
cparata	0:485458fca2bd	800
cparata	0:485458fca2bd	801	#define LSM6DSL_ACC_GYRO_INT1_FULL_FLAG_MASK 0x20
cparata	0:485458fca2bd	802	status_t LSM6DSL_ACC_GYRO_W_FULL_FLAG_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_FULL_FLAG_t newValue);
cparata	0:485458fca2bd	803	status_t LSM6DSL_ACC_GYRO_R_FULL_FLAG_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_FULL_FLAG_t value);
cparata	0:485458fca2bd	804
cparata	0:485458fca2bd	805	/*******************************************************************************
cparata	0:485458fca2bd	806	* Register : INT1_CTRL
cparata	0:485458fca2bd	807	* Address : 0X0D
cparata	0:485458fca2bd	808	* Bit Group Name: INT1_SIGN_MOT
cparata	0:485458fca2bd	809	* Permission : RW
cparata	0:485458fca2bd	810	*******************************************************************************/
cparata	0:485458fca2bd	811	typedef enum {
cparata	0:485458fca2bd	812	LSM6DSL_ACC_GYRO_INT1_SIGN_MOT_DISABLED =0x00,
cparata	0:485458fca2bd	813	LSM6DSL_ACC_GYRO_INT1_SIGN_MOT_ENABLED =0x40,
cparata	0:485458fca2bd	814	} LSM6DSL_ACC_GYRO_INT1_SIGN_MOT_t;
cparata	0:485458fca2bd	815
cparata	0:485458fca2bd	816	#define LSM6DSL_ACC_GYRO_INT1_SIGN_MOT_MASK 0x40
cparata	0:485458fca2bd	817	status_t LSM6DSL_ACC_GYRO_W_SIGN_MOT_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_SIGN_MOT_t newValue);
cparata	0:485458fca2bd	818	status_t LSM6DSL_ACC_GYRO_R_SIGN_MOT_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_SIGN_MOT_t value);
cparata	0:485458fca2bd	819
cparata	0:485458fca2bd	820	/*******************************************************************************
cparata	0:485458fca2bd	821	* Register : INT1_CTRL
cparata	0:485458fca2bd	822	* Address : 0X0D
cparata	0:485458fca2bd	823	* Bit Group Name: INT1_STEP_DETECTOR
cparata	0:485458fca2bd	824	* Permission : RW
cparata	0:485458fca2bd	825	*******************************************************************************/
cparata	0:485458fca2bd	826	typedef enum {
cparata	0:485458fca2bd	827	LSM6DSL_ACC_GYRO_INT1_PEDO_DISABLED =0x00,
cparata	0:485458fca2bd	828	LSM6DSL_ACC_GYRO_INT1_PEDO_ENABLED =0x80,
cparata	0:485458fca2bd	829	} LSM6DSL_ACC_GYRO_INT1_PEDO_t;
cparata	0:485458fca2bd	830
cparata	0:485458fca2bd	831	#define LSM6DSL_ACC_GYRO_INT1_PEDO_MASK 0x80
cparata	0:485458fca2bd	832	status_t LSM6DSL_ACC_GYRO_W_STEP_DET_on_INT1(void *handle, LSM6DSL_ACC_GYRO_INT1_PEDO_t newValue);
cparata	0:485458fca2bd	833	status_t LSM6DSL_ACC_GYRO_R_STEP_DET_on_INT1(void handle, LSM6DSL_ACC_GYRO_INT1_PEDO_t value);
cparata	0:485458fca2bd	834
cparata	0:485458fca2bd	835	/*******************************************************************************
cparata	0:485458fca2bd	836	* Register : INT2_CTRL
cparata	0:485458fca2bd	837	* Address : 0X0E
cparata	0:485458fca2bd	838	* Bit Group Name: INT2_DRDY_XL
cparata	0:485458fca2bd	839	* Permission : RW
cparata	0:485458fca2bd	840	*******************************************************************************/
cparata	0:485458fca2bd	841	typedef enum {
cparata	0:485458fca2bd	842	LSM6DSL_ACC_GYRO_INT2_DRDY_XL_DISABLED =0x00,
cparata	0:485458fca2bd	843	LSM6DSL_ACC_GYRO_INT2_DRDY_XL_ENABLED =0x01,
cparata	0:485458fca2bd	844	} LSM6DSL_ACC_GYRO_INT2_DRDY_XL_t;
cparata	0:485458fca2bd	845
cparata	0:485458fca2bd	846	#define LSM6DSL_ACC_GYRO_INT2_DRDY_XL_MASK 0x01
cparata	0:485458fca2bd	847	status_t LSM6DSL_ACC_GYRO_W_DRDY_XL_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_DRDY_XL_t newValue);
cparata	0:485458fca2bd	848	status_t LSM6DSL_ACC_GYRO_R_DRDY_XL_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_DRDY_XL_t value);
cparata	0:485458fca2bd	849
cparata	0:485458fca2bd	850	/*******************************************************************************
cparata	0:485458fca2bd	851	* Register : INT2_CTRL
cparata	0:485458fca2bd	852	* Address : 0X0E
cparata	0:485458fca2bd	853	* Bit Group Name: INT2_DRDY_G
cparata	0:485458fca2bd	854	* Permission : RW
cparata	0:485458fca2bd	855	*******************************************************************************/
cparata	0:485458fca2bd	856	typedef enum {
cparata	0:485458fca2bd	857	LSM6DSL_ACC_GYRO_INT2_DRDY_G_DISABLED =0x00,
cparata	0:485458fca2bd	858	LSM6DSL_ACC_GYRO_INT2_DRDY_G_ENABLED =0x02,
cparata	0:485458fca2bd	859	} LSM6DSL_ACC_GYRO_INT2_DRDY_G_t;
cparata	0:485458fca2bd	860
cparata	0:485458fca2bd	861	#define LSM6DSL_ACC_GYRO_INT2_DRDY_G_MASK 0x02
cparata	0:485458fca2bd	862	status_t LSM6DSL_ACC_GYRO_W_DRDY_G_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_DRDY_G_t newValue);
cparata	0:485458fca2bd	863	status_t LSM6DSL_ACC_GYRO_R_DRDY_G_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_DRDY_G_t value);
cparata	0:485458fca2bd	864
cparata	0:485458fca2bd	865	/*******************************************************************************
cparata	0:485458fca2bd	866	* Register : INT2_CTRL
cparata	0:485458fca2bd	867	* Address : 0X0E
cparata	0:485458fca2bd	868	* Bit Group Name: INT2_DRDY_TEMP
cparata	0:485458fca2bd	869	* Permission : RW
cparata	0:485458fca2bd	870	*******************************************************************************/
cparata	0:485458fca2bd	871	typedef enum {
cparata	0:485458fca2bd	872	LSM6DSL_ACC_GYRO_INT2_DRDY_TEMP_DISABLED =0x00,
cparata	0:485458fca2bd	873	LSM6DSL_ACC_GYRO_INT2_DRDY_TEMP_ENABLED =0x04,
cparata	0:485458fca2bd	874	} LSM6DSL_ACC_GYRO_INT2_DRDY_TEMP_t;
cparata	0:485458fca2bd	875
cparata	0:485458fca2bd	876	#define LSM6DSL_ACC_GYRO_INT2_DRDY_TEMP_MASK 0x04
cparata	0:485458fca2bd	877	status_t LSM6DSL_ACC_GYRO_W_DRDY_TEMP_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_DRDY_TEMP_t newValue);
cparata	0:485458fca2bd	878	status_t LSM6DSL_ACC_GYRO_R_DRDY_TEMP_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_DRDY_TEMP_t value);
cparata	0:485458fca2bd	879
cparata	0:485458fca2bd	880
cparata	0:485458fca2bd	881	/*******************************************************************************
cparata	0:485458fca2bd	882	* Register : INT2_CTRL
cparata	0:485458fca2bd	883	* Address : 0X0E
cparata	0:485458fca2bd	884	* Bit Group Name: INT2_FTH
cparata	0:485458fca2bd	885	* Permission : RW
cparata	0:485458fca2bd	886	*******************************************************************************/
cparata	0:485458fca2bd	887	typedef enum {
cparata	0:485458fca2bd	888	LSM6DSL_ACC_GYRO_INT2_FTH_DISABLED =0x00,
cparata	0:485458fca2bd	889	LSM6DSL_ACC_GYRO_INT2_FTH_ENABLED =0x08,
cparata	0:485458fca2bd	890	} LSM6DSL_ACC_GYRO_INT2_FTH_t;
cparata	0:485458fca2bd	891
cparata	0:485458fca2bd	892	#define LSM6DSL_ACC_GYRO_INT2_FTH_MASK 0x08
cparata	0:485458fca2bd	893	status_t LSM6DSL_ACC_GYRO_W_FIFO_TSHLD_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_FTH_t newValue);
cparata	0:485458fca2bd	894	status_t LSM6DSL_ACC_GYRO_R_FIFO_TSHLD_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_FTH_t value);
cparata	0:485458fca2bd	895
cparata	0:485458fca2bd	896	/*******************************************************************************
cparata	0:485458fca2bd	897	* Register : INT2_CTRL
cparata	0:485458fca2bd	898	* Address : 0X0E
cparata	0:485458fca2bd	899	* Bit Group Name: INT2_OVR
cparata	0:485458fca2bd	900	* Permission : RW
cparata	0:485458fca2bd	901	*******************************************************************************/
cparata	0:485458fca2bd	902	typedef enum {
cparata	0:485458fca2bd	903	LSM6DSL_ACC_GYRO_INT2_OVR_DISABLED =0x00,
cparata	0:485458fca2bd	904	LSM6DSL_ACC_GYRO_INT2_OVR_ENABLED =0x10,
cparata	0:485458fca2bd	905	} LSM6DSL_ACC_GYRO_INT2_OVR_t;
cparata	0:485458fca2bd	906
cparata	0:485458fca2bd	907	#define LSM6DSL_ACC_GYRO_INT2_OVR_MASK 0x10
cparata	0:485458fca2bd	908	status_t LSM6DSL_ACC_GYRO_W_OVERRUN_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_OVR_t newValue);
cparata	0:485458fca2bd	909	status_t LSM6DSL_ACC_GYRO_R_OVERRUN_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_OVR_t value);
cparata	0:485458fca2bd	910
cparata	0:485458fca2bd	911	/*******************************************************************************
cparata	0:485458fca2bd	912	* Register : INT2_CTRL
cparata	0:485458fca2bd	913	* Address : 0X0E
cparata	0:485458fca2bd	914	* Bit Group Name: INT2_FULL_FLAG
cparata	0:485458fca2bd	915	* Permission : RW
cparata	0:485458fca2bd	916	*******************************************************************************/
cparata	0:485458fca2bd	917	typedef enum {
cparata	0:485458fca2bd	918	LSM6DSL_ACC_GYRO_INT2_FULL_FLAG_DISABLED =0x00,
cparata	0:485458fca2bd	919	LSM6DSL_ACC_GYRO_INT2_FULL_FLAG_ENABLED =0x20,
cparata	0:485458fca2bd	920	} LSM6DSL_ACC_GYRO_INT2_FULL_FLAG_t;
cparata	0:485458fca2bd	921
cparata	0:485458fca2bd	922	#define LSM6DSL_ACC_GYRO_INT2_FULL_FLAG_MASK 0x20
cparata	0:485458fca2bd	923	status_t LSM6DSL_ACC_GYRO_W_FULL_FLAG_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_FULL_FLAG_t newValue);
cparata	0:485458fca2bd	924	status_t LSM6DSL_ACC_GYRO_R_FULL_FLAG_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_FULL_FLAG_t value);
cparata	0:485458fca2bd	925
cparata	0:485458fca2bd	926	/*******************************************************************************
cparata	0:485458fca2bd	927	* Register : INT2_CTRL
cparata	0:485458fca2bd	928	* Address : 0X0E
cparata	0:485458fca2bd	929	* Bit Group Name: INT2_STEP_COUNT_OV
cparata	0:485458fca2bd	930	* Permission : RW
cparata	0:485458fca2bd	931	*******************************************************************************/
cparata	0:485458fca2bd	932	typedef enum {
cparata	0:485458fca2bd	933	LSM6DSL_ACC_GYRO_INT2_STEP_COUNT_OV_DISABLED =0x00,
cparata	0:485458fca2bd	934	LSM6DSL_ACC_GYRO_INT2_STEP_COUNT_OV_ENABLED =0x40,
cparata	0:485458fca2bd	935	} LSM6DSL_ACC_GYRO_INT2_STEP_COUNT_OV_t;
cparata	0:485458fca2bd	936
cparata	0:485458fca2bd	937	#define LSM6DSL_ACC_GYRO_INT2_STEP_COUNT_OV_MASK 0x40
cparata	0:485458fca2bd	938	status_t LSM6DSL_ACC_GYRO_W_STEP_COUNT_OV_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_STEP_COUNT_OV_t newValue);
cparata	0:485458fca2bd	939	status_t LSM6DSL_ACC_GYRO_R_STEP_COUNT_OV_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_STEP_COUNT_OV_t value);
cparata	0:485458fca2bd	940
cparata	0:485458fca2bd	941	/*******************************************************************************
cparata	0:485458fca2bd	942	* Register : INT2_CTRL
cparata	0:485458fca2bd	943	* Address : 0X0E
cparata	0:485458fca2bd	944	* Bit Group Name: INT2_STEP_DELTA
cparata	0:485458fca2bd	945	* Permission : RW
cparata	0:485458fca2bd	946	*******************************************************************************/
cparata	0:485458fca2bd	947	typedef enum {
cparata	0:485458fca2bd	948	LSM6DSL_ACC_GYRO_INT2_STEP_DELTA_DISABLED =0x00,
cparata	0:485458fca2bd	949	LSM6DSL_ACC_GYRO_INT2_STEP_DELTA_ENABLED =0x80,
cparata	0:485458fca2bd	950	} LSM6DSL_ACC_GYRO_INT2_STEP_DELTA_t;
cparata	0:485458fca2bd	951
cparata	0:485458fca2bd	952	#define LSM6DSL_ACC_GYRO_INT2_STEP_DELTA_MASK 0x80
cparata	0:485458fca2bd	953	status_t LSM6DSL_ACC_GYRO_W_STEP_DELTA_on_INT2(void *handle, LSM6DSL_ACC_GYRO_INT2_STEP_DELTA_t newValue);
cparata	0:485458fca2bd	954	status_t LSM6DSL_ACC_GYRO_R_STEP_DELTA_on_INT2(void handle, LSM6DSL_ACC_GYRO_INT2_STEP_DELTA_t value);
cparata	0:485458fca2bd	955
cparata	0:485458fca2bd	956	/*******************************************************************************
cparata	0:485458fca2bd	957	* Register : CTRL3_C
cparata	0:485458fca2bd	958	* Address : 0X12
cparata	0:485458fca2bd	959	* Bit Group Name: SW_RESET
cparata	0:485458fca2bd	960	* Permission : RW
cparata	0:485458fca2bd	961	*******************************************************************************/
cparata	0:485458fca2bd	962	typedef enum {
cparata	0:485458fca2bd	963	LSM6DSL_ACC_GYRO_SW_RESET_NORMAL_MODE =0x00,
cparata	0:485458fca2bd	964	LSM6DSL_ACC_GYRO_SW_RESET_RESET_DEVICE =0x01,
cparata	0:485458fca2bd	965	} LSM6DSL_ACC_GYRO_SW_RESET_t;
cparata	0:485458fca2bd	966
cparata	0:485458fca2bd	967	#define LSM6DSL_ACC_GYRO_SW_RESET_MASK 0x01
cparata	0:485458fca2bd	968	status_t LSM6DSL_ACC_GYRO_W_SW_RESET(void *handle, LSM6DSL_ACC_GYRO_SW_RESET_t newValue);
cparata	0:485458fca2bd	969	status_t LSM6DSL_ACC_GYRO_R_SW_RESET(void handle, LSM6DSL_ACC_GYRO_SW_RESET_t value);
cparata	0:485458fca2bd	970
cparata	0:485458fca2bd	971
cparata	0:485458fca2bd	972	/*******************************************************************************
cparata	0:485458fca2bd	973	* Register : CTRL3_C
cparata	0:485458fca2bd	974	* Address : 0X12
cparata	0:485458fca2bd	975	* Bit Group Name: IF_INC
cparata	0:485458fca2bd	976	* Permission : RW
cparata	0:485458fca2bd	977	*******************************************************************************/
cparata	0:485458fca2bd	978	typedef enum {
cparata	0:485458fca2bd	979	LSM6DSL_ACC_GYRO_IF_INC_DISABLED =0x00,
cparata	0:485458fca2bd	980	LSM6DSL_ACC_GYRO_IF_INC_ENABLED =0x04,
cparata	0:485458fca2bd	981	} LSM6DSL_ACC_GYRO_IF_INC_t;
cparata	0:485458fca2bd	982
cparata	0:485458fca2bd	983	#define LSM6DSL_ACC_GYRO_IF_INC_MASK 0x04
cparata	0:485458fca2bd	984	status_t LSM6DSL_ACC_GYRO_W_IF_Addr_Incr(void *handle, LSM6DSL_ACC_GYRO_IF_INC_t newValue);
cparata	0:485458fca2bd	985	status_t LSM6DSL_ACC_GYRO_R_IF_Addr_Incr(void handle, LSM6DSL_ACC_GYRO_IF_INC_t value);
cparata	0:485458fca2bd	986
cparata	0:485458fca2bd	987	/*******************************************************************************
cparata	0:485458fca2bd	988	* Register : CTRL3_C
cparata	0:485458fca2bd	989	* Address : 0X12
cparata	0:485458fca2bd	990	* Bit Group Name: SIM
cparata	0:485458fca2bd	991	* Permission : RW
cparata	0:485458fca2bd	992	*******************************************************************************/
cparata	0:485458fca2bd	993	typedef enum {
cparata	0:485458fca2bd	994	LSM6DSL_ACC_GYRO_SIM_4_WIRE =0x00,
cparata	0:485458fca2bd	995	LSM6DSL_ACC_GYRO_SIM_3_WIRE =0x08,
cparata	0:485458fca2bd	996	} LSM6DSL_ACC_GYRO_SIM_t;
cparata	0:485458fca2bd	997
cparata	0:485458fca2bd	998	#define LSM6DSL_ACC_GYRO_SIM_MASK 0x08
cparata	0:485458fca2bd	999	status_t LSM6DSL_ACC_GYRO_W_SPI_Mode(void *handle, LSM6DSL_ACC_GYRO_SIM_t newValue);
cparata	0:485458fca2bd	1000	status_t LSM6DSL_ACC_GYRO_R_SPI_Mode(void handle, LSM6DSL_ACC_GYRO_SIM_t value);
cparata	0:485458fca2bd	1001
cparata	0:485458fca2bd	1002	/*******************************************************************************
cparata	0:485458fca2bd	1003	* Register : CTRL3_C
cparata	0:485458fca2bd	1004	* Address : 0X12
cparata	0:485458fca2bd	1005	* Bit Group Name: PP_OD
cparata	0:485458fca2bd	1006	* Permission : RW
cparata	0:485458fca2bd	1007	*******************************************************************************/
cparata	0:485458fca2bd	1008	typedef enum {
cparata	0:485458fca2bd	1009	LSM6DSL_ACC_GYRO_PP_OD_PUSH_PULL =0x00,
cparata	0:485458fca2bd	1010	LSM6DSL_ACC_GYRO_PP_OD_OPEN_DRAIN =0x10,
cparata	0:485458fca2bd	1011	} LSM6DSL_ACC_GYRO_PP_OD_t;
cparata	0:485458fca2bd	1012
cparata	0:485458fca2bd	1013	#define LSM6DSL_ACC_GYRO_PP_OD_MASK 0x10
cparata	0:485458fca2bd	1014	status_t LSM6DSL_ACC_GYRO_W_PadSel(void *handle, LSM6DSL_ACC_GYRO_PP_OD_t newValue);
cparata	0:485458fca2bd	1015	status_t LSM6DSL_ACC_GYRO_R_PadSel(void handle, LSM6DSL_ACC_GYRO_PP_OD_t value);
cparata	0:485458fca2bd	1016
cparata	0:485458fca2bd	1017	/*******************************************************************************
cparata	0:485458fca2bd	1018	* Register : CTRL3_C
cparata	0:485458fca2bd	1019	* Address : 0X12
cparata	0:485458fca2bd	1020	* Bit Group Name: H_LACTIVE
cparata	0:485458fca2bd	1021	* Permission : RW
cparata	0:485458fca2bd	1022	*******************************************************************************/
cparata	0:485458fca2bd	1023	typedef enum {
cparata	0:485458fca2bd	1024	LSM6DSL_ACC_GYRO_INT_ACT_LEVEL_ACTIVE_HI =0x00,
cparata	0:485458fca2bd	1025	LSM6DSL_ACC_GYRO_INT_ACT_LEVEL_ACTIVE_LO =0x20,
cparata	0:485458fca2bd	1026	} LSM6DSL_ACC_GYRO_INT_ACT_LEVEL_t;
cparata	0:485458fca2bd	1027
cparata	0:485458fca2bd	1028	#define LSM6DSL_ACC_GYRO_INT_ACT_LEVEL_MASK 0x20
cparata	0:485458fca2bd	1029	status_t LSM6DSL_ACC_GYRO_W_INT_ACT_LEVEL(void *handle, LSM6DSL_ACC_GYRO_INT_ACT_LEVEL_t newValue);
cparata	0:485458fca2bd	1030	status_t LSM6DSL_ACC_GYRO_R_INT_ACT_LEVEL(void handle, LSM6DSL_ACC_GYRO_INT_ACT_LEVEL_t value);
cparata	0:485458fca2bd	1031
cparata	0:485458fca2bd	1032
cparata	0:485458fca2bd	1033	/*******************************************************************************
cparata	0:485458fca2bd	1034	* Register : CTRL3_C
cparata	0:485458fca2bd	1035	* Address : 0X12
cparata	0:485458fca2bd	1036	* Bit Group Name: BOOT
cparata	0:485458fca2bd	1037	* Permission : RW
cparata	0:485458fca2bd	1038	*******************************************************************************/
cparata	0:485458fca2bd	1039	typedef enum {
cparata	0:485458fca2bd	1040	LSM6DSL_ACC_GYRO_BOOT_NORMAL_MODE =0x00,
cparata	0:485458fca2bd	1041	LSM6DSL_ACC_GYRO_BOOT_REBOOT_MODE =0x80,
cparata	0:485458fca2bd	1042	} LSM6DSL_ACC_GYRO_BOOT_t;
cparata	0:485458fca2bd	1043
cparata	0:485458fca2bd	1044	#define LSM6DSL_ACC_GYRO_BOOT_MASK 0x80
cparata	0:485458fca2bd	1045	status_t LSM6DSL_ACC_GYRO_W_BOOT(void *handle, LSM6DSL_ACC_GYRO_BOOT_t newValue);
cparata	0:485458fca2bd	1046	status_t LSM6DSL_ACC_GYRO_R_BOOT(void handle, LSM6DSL_ACC_GYRO_BOOT_t value);
cparata	0:485458fca2bd	1047
cparata	0:485458fca2bd	1048	/*******************************************************************************
cparata	0:485458fca2bd	1049	* Register : CTRL4_C
cparata	0:485458fca2bd	1050	* Address : 0X13
cparata	0:485458fca2bd	1051	* Bit Group Name: LPF1_SEL_G
cparata	0:485458fca2bd	1052	* Permission : RW
cparata	0:485458fca2bd	1053	*******************************************************************************/
cparata	0:485458fca2bd	1054	typedef enum {
cparata	0:485458fca2bd	1055	LSM6DSL_ACC_GYRO_MODE3_LPF1_G_DISABLED =0x00,
cparata	0:485458fca2bd	1056	LSM6DSL_ACC_GYRO_MODE3_LPF1_G_ENABLED =0x02,
cparata	0:485458fca2bd	1057	} LSM6DSL_ACC_GYRO_LPF1_SEL_G_t;
cparata	0:485458fca2bd	1058
cparata	0:485458fca2bd	1059	#define LSM6DSL_ACC_GYRO_LPF1_SEL_G_MASK 0x02
cparata	0:485458fca2bd	1060	status_t LSM6DSL_ACC_GYRO_W_LPF1_SEL_G(void *handle, LSM6DSL_ACC_GYRO_LPF1_SEL_G_t newValue);
cparata	0:485458fca2bd	1061	status_t LSM6DSL_ACC_GYRO_R_LPF1_SEL_G(void handle, LSM6DSL_ACC_GYRO_LPF1_SEL_G_t value);
cparata	0:485458fca2bd	1062
cparata	0:485458fca2bd	1063	/*******************************************************************************
cparata	0:485458fca2bd	1064	* Register : CTRL4_C
cparata	0:485458fca2bd	1065	* Address : 0X13
cparata	0:485458fca2bd	1066	* Bit Group Name: I2C_DISABLE
cparata	0:485458fca2bd	1067	* Permission : RW
cparata	0:485458fca2bd	1068	*******************************************************************************/
cparata	0:485458fca2bd	1069	typedef enum {
cparata	0:485458fca2bd	1070	LSM6DSL_ACC_GYRO_I2C_DISABLE_I2C_AND_SPI =0x00,
cparata	0:485458fca2bd	1071	LSM6DSL_ACC_GYRO_I2C_DISABLE_SPI_ONLY =0x04,
cparata	0:485458fca2bd	1072	} LSM6DSL_ACC_GYRO_I2C_DISABLE_t;
cparata	0:485458fca2bd	1073
cparata	0:485458fca2bd	1074	#define LSM6DSL_ACC_GYRO_I2C_DISABLE_MASK 0x04
cparata	0:485458fca2bd	1075	status_t LSM6DSL_ACC_GYRO_W_I2C_DISABLE(void *handle, LSM6DSL_ACC_GYRO_I2C_DISABLE_t newValue);
cparata	0:485458fca2bd	1076	status_t LSM6DSL_ACC_GYRO_R_I2C_DISABLE(void handle, LSM6DSL_ACC_GYRO_I2C_DISABLE_t value);
cparata	0:485458fca2bd	1077
cparata	0:485458fca2bd	1078	/*******************************************************************************
cparata	0:485458fca2bd	1079	* Register : CTRL4_C
cparata	0:485458fca2bd	1080	* Address : 0X13
cparata	0:485458fca2bd	1081	* Bit Group Name: DRDY_MSK
cparata	0:485458fca2bd	1082	* Permission : RW
cparata	0:485458fca2bd	1083	*******************************************************************************/
cparata	0:485458fca2bd	1084	typedef enum {
cparata	0:485458fca2bd	1085	LSM6DSL_ACC_GYRO_DRDY_MSK_DISABLED =0x00,
cparata	0:485458fca2bd	1086	LSM6DSL_ACC_GYRO_DRDY_MSK_ENABLED =0x08,
cparata	0:485458fca2bd	1087	} LSM6DSL_ACC_GYRO_DRDY_MSK_t;
cparata	0:485458fca2bd	1088
cparata	0:485458fca2bd	1089	#define LSM6DSL_ACC_GYRO_DRDY_MSK_MASK 0x08
cparata	0:485458fca2bd	1090	status_t LSM6DSL_ACC_GYRO_W_DRDY_MSK(void *handle, LSM6DSL_ACC_GYRO_DRDY_MSK_t newValue);
cparata	0:485458fca2bd	1091	status_t LSM6DSL_ACC_GYRO_R_DRDY_MSK(void handle, LSM6DSL_ACC_GYRO_DRDY_MSK_t value);
cparata	0:485458fca2bd	1092
cparata	0:485458fca2bd	1093	/*******************************************************************************
cparata	0:485458fca2bd	1094	* Register : CTRL4_C
cparata	0:485458fca2bd	1095	* Address : 0X13
cparata	0:485458fca2bd	1096	* Bit Group Name: INT2_ON_INT1
cparata	0:485458fca2bd	1097	* Permission : RW
cparata	0:485458fca2bd	1098	*******************************************************************************/
cparata	0:485458fca2bd	1099	typedef enum {
cparata	0:485458fca2bd	1100	LSM6DSL_ACC_GYRO_INT2_ON_INT1_DISABLED =0x00,
cparata	0:485458fca2bd	1101	LSM6DSL_ACC_GYRO_INT2_ON_INT1_ENABLED =0x20,
cparata	0:485458fca2bd	1102	} LSM6DSL_ACC_GYRO_INT2_ON_INT1_t;
cparata	0:485458fca2bd	1103
cparata	0:485458fca2bd	1104	#define LSM6DSL_ACC_GYRO_INT2_ON_INT1_MASK 0x20
cparata	0:485458fca2bd	1105	status_t LSM6DSL_ACC_GYRO_W_INT2_ON_INT1(void *handle, LSM6DSL_ACC_GYRO_INT2_ON_INT1_t newValue);
cparata	0:485458fca2bd	1106	status_t LSM6DSL_ACC_GYRO_R_INT2_ON_INT1(void handle, LSM6DSL_ACC_GYRO_INT2_ON_INT1_t value);
cparata	0:485458fca2bd	1107
cparata	0:485458fca2bd	1108	/*******************************************************************************
cparata	0:485458fca2bd	1109	* Register : CTRL4_C
cparata	0:485458fca2bd	1110	* Address : 0X13
cparata	0:485458fca2bd	1111	* Bit Group Name: SLEEP_G
cparata	0:485458fca2bd	1112	* Permission : RW
cparata	0:485458fca2bd	1113	*******************************************************************************/
cparata	0:485458fca2bd	1114	typedef enum {
cparata	0:485458fca2bd	1115	LSM6DSL_ACC_GYRO_SLEEP_G_DISABLED =0x00,
cparata	0:485458fca2bd	1116	LSM6DSL_ACC_GYRO_SLEEP_G_ENABLED =0x40,
cparata	0:485458fca2bd	1117	} LSM6DSL_ACC_GYRO_SLEEP_G_t;
cparata	0:485458fca2bd	1118
cparata	0:485458fca2bd	1119	#define LSM6DSL_ACC_GYRO_SLEEP_G_MASK 0x40
cparata	0:485458fca2bd	1120	status_t LSM6DSL_ACC_GYRO_W_SleepMode_G(void *handle, LSM6DSL_ACC_GYRO_SLEEP_G_t newValue);
cparata	0:485458fca2bd	1121	status_t LSM6DSL_ACC_GYRO_R_SleepMode_G(void handle, LSM6DSL_ACC_GYRO_SLEEP_G_t value);
cparata	0:485458fca2bd	1122
cparata	0:485458fca2bd	1123	/*******************************************************************************
cparata	0:485458fca2bd	1124	* Register : CTRL5_C
cparata	0:485458fca2bd	1125	* Address : 0X14
cparata	0:485458fca2bd	1126	* Bit Group Name: ST_XL
cparata	0:485458fca2bd	1127	* Permission : RW
cparata	0:485458fca2bd	1128	*******************************************************************************/
cparata	0:485458fca2bd	1129	typedef enum {
cparata	0:485458fca2bd	1130	LSM6DSL_ACC_GYRO_ST_XL_NORMAL_MODE =0x00,
cparata	0:485458fca2bd	1131	LSM6DSL_ACC_GYRO_ST_XL_POS_SIGN_TEST =0x01,
cparata	0:485458fca2bd	1132	LSM6DSL_ACC_GYRO_ST_XL_NEG_SIGN_TEST =0x02,
cparata	0:485458fca2bd	1133	LSM6DSL_ACC_GYRO_ST_XL_NA =0x03,
cparata	0:485458fca2bd	1134	} LSM6DSL_ACC_GYRO_ST_XL_t;
cparata	0:485458fca2bd	1135
cparata	0:485458fca2bd	1136	#define LSM6DSL_ACC_GYRO_ST_XL_MASK 0x03
cparata	0:485458fca2bd	1137	status_t LSM6DSL_ACC_GYRO_W_SelfTest_XL(void *handle, LSM6DSL_ACC_GYRO_ST_XL_t newValue);
cparata	0:485458fca2bd	1138	status_t LSM6DSL_ACC_GYRO_R_SelfTest_XL(void handle, LSM6DSL_ACC_GYRO_ST_XL_t value);
cparata	0:485458fca2bd	1139
cparata	0:485458fca2bd	1140	/*******************************************************************************
cparata	0:485458fca2bd	1141	* Register : CTRL5_C
cparata	0:485458fca2bd	1142	* Address : 0X14
cparata	0:485458fca2bd	1143	* Bit Group Name: ST_G
cparata	0:485458fca2bd	1144	* Permission : RW
cparata	0:485458fca2bd	1145	*******************************************************************************/
cparata	0:485458fca2bd	1146	typedef enum {
cparata	0:485458fca2bd	1147	LSM6DSL_ACC_GYRO_ST_G_NORMAL_MODE =0x00,
cparata	0:485458fca2bd	1148	LSM6DSL_ACC_GYRO_ST_G_POS_SIGN_TEST =0x04,
cparata	0:485458fca2bd	1149	LSM6DSL_ACC_GYRO_ST_G_NA =0x08,
cparata	0:485458fca2bd	1150	LSM6DSL_ACC_GYRO_ST_G_NEG_SIGN_TEST =0x0C,
cparata	0:485458fca2bd	1151	} LSM6DSL_ACC_GYRO_ST_G_t;
cparata	0:485458fca2bd	1152
cparata	0:485458fca2bd	1153	#define LSM6DSL_ACC_GYRO_ST_G_MASK 0x0C
cparata	0:485458fca2bd	1154	status_t LSM6DSL_ACC_GYRO_W_SelfTest_G(void *handle, LSM6DSL_ACC_GYRO_ST_G_t newValue);
cparata	0:485458fca2bd	1155	status_t LSM6DSL_ACC_GYRO_R_SelfTest_G(void handle, LSM6DSL_ACC_GYRO_ST_G_t value);
cparata	0:485458fca2bd	1156
cparata	0:485458fca2bd	1157	/*******************************************************************************
cparata	0:485458fca2bd	1158	* Register : CTRL5_C
cparata	0:485458fca2bd	1159	* Address : 0X14
cparata	0:485458fca2bd	1160	* Bit Group Name: DEN_LH
cparata	0:485458fca2bd	1161	* Permission : RW
cparata	0:485458fca2bd	1162	*******************************************************************************/
cparata	0:485458fca2bd	1163	typedef enum {
cparata	0:485458fca2bd	1164	LSM6DSL_ACC_GYRO_DEN_LOW =0x00,
cparata	0:485458fca2bd	1165	LSM6DSL_ACC_GYRO_DEN_HIGH =0x10,
cparata	0:485458fca2bd	1166	} LSM6DSL_ACC_GYRO_DEN_LH_t;
cparata	0:485458fca2bd	1167
cparata	0:485458fca2bd	1168	#define LSM6DSL_ACC_GYRO_DEN_LH_MASK 0x10
cparata	0:485458fca2bd	1169	status_t LSM6DSL_ACC_GYRO_W_DEN_Polarity(void *handle, LSM6DSL_ACC_GYRO_DEN_LH_t newValue);
cparata	0:485458fca2bd	1170	status_t LSM6DSL_ACC_GYRO_R_DEN_Polarity(void handle, LSM6DSL_ACC_GYRO_DEN_LH_t value);
cparata	0:485458fca2bd	1171
cparata	0:485458fca2bd	1172	/*******************************************************************************
cparata	0:485458fca2bd	1173	* Register : CTRL5_C
cparata	0:485458fca2bd	1174	* Address : 0X14
cparata	0:485458fca2bd	1175	* Bit Group Name: ST_ROUNDING
cparata	0:485458fca2bd	1176	* Permission : RW
cparata	0:485458fca2bd	1177	*******************************************************************************/
cparata	0:485458fca2bd	1178	typedef enum {
cparata	0:485458fca2bd	1179	LSM6DSL_ACC_GYRO_NO_ROUNDING =0x00,
cparata	0:485458fca2bd	1180	LSM6DSL_ACC_GYRO_ACC_ONLY =0x20,
cparata	0:485458fca2bd	1181	LSM6DSL_ACC_GYRO_GYRO_ONLY =0x40,
cparata	0:485458fca2bd	1182	LSM6DSL_ACC_GYRO_ACC_GYRO =0x60,
cparata	0:485458fca2bd	1183	LSM6DSL_ACC_GYRO_SH1_SH6 =0x80,
cparata	0:485458fca2bd	1184	LSM6DSL_ACC_GYRO_ACC_SH1_SH6 =0xA0,
cparata	0:485458fca2bd	1185	LSM6DSL_ACC_GYRO_ACC_GYRO_SH1_SH6_SH7_SH12 =0xC0,
cparata	0:485458fca2bd	1186	LSM6DSL_ACC_GYRO_ACC_GYRO_SH1_SH6 =0xE0,
cparata	0:485458fca2bd	1187	} LSM6DSL_ACC_GYRO_ROUNDING_t;
cparata	0:485458fca2bd	1188
cparata	0:485458fca2bd	1189	#define LSM6DSL_ACC_GYRO_LSM6DSL_ACC_GYRO_ROUNDING_t_MASK 0xE0
cparata	0:485458fca2bd	1190	status_t LSM6DSL_ACC_GYRO_W_CircularBurstMode(void *handle, LSM6DSL_ACC_GYRO_ROUNDING_t newValue);
cparata	0:485458fca2bd	1191	status_t LSM6DSL_ACC_GYRO_R_CircularBurstMode(void handle, LSM6DSL_ACC_GYRO_ROUNDING_t value);
cparata	0:485458fca2bd	1192
cparata	0:485458fca2bd	1193	/*******************************************************************************
cparata	0:485458fca2bd	1194	* Register : CTRL6_G
cparata	0:485458fca2bd	1195	* Address : 0X15
cparata	0:485458fca2bd	1196	* Bit Group Name: FTYPE
cparata	0:485458fca2bd	1197	* Permission : RW
cparata	0:485458fca2bd	1198	*******************************************************************************/
cparata	0:485458fca2bd	1199	typedef enum {
cparata	0:485458fca2bd	1200	LSM6DSL_ACC_GYRO_LP_G_NORMAL =0x00,
cparata	0:485458fca2bd	1201	LSM6DSL_ACC_GYRO_LP_G_NARROW =0x01,
cparata	0:485458fca2bd	1202	LSM6DSL_ACC_GYRO_LP_G_VERY_NARROW =0x02,
cparata	0:485458fca2bd	1203	LSM6DSL_ACC_GYRO_LP_G_WIDE =0x03,
cparata	0:485458fca2bd	1204	} LSM6DSL_ACC_GYRO_FTYPE_t;
cparata	0:485458fca2bd	1205
cparata	0:485458fca2bd	1206	#define LSM6DSL_ACC_GYRO_FTYPE_MASK 0x03
cparata	0:485458fca2bd	1207	status_t LSM6DSL_ACC_GYRO_W_LP_BW_G(void *handle, LSM6DSL_ACC_GYRO_FTYPE_t newValue);
cparata	0:485458fca2bd	1208	status_t LSM6DSL_ACC_GYRO_R_LP_BW_G(void handle, LSM6DSL_ACC_GYRO_FTYPE_t value);
cparata	0:485458fca2bd	1209
cparata	0:485458fca2bd	1210	/*******************************************************************************
cparata	0:485458fca2bd	1211	* Register : CTRL6_G
cparata	0:485458fca2bd	1212	* Address : 0X15
cparata	0:485458fca2bd	1213	* Bit Group Name: USR_OFF_W
cparata	0:485458fca2bd	1214	* Permission : RW
cparata	0:485458fca2bd	1215	*******************************************************************************/
cparata	0:485458fca2bd	1216	typedef enum {
cparata	0:485458fca2bd	1217	LSM6DSL_ACC_GYRO_2Emin10 =0x00,
cparata	0:485458fca2bd	1218	LSM6DSL_ACC_GYRO_2Emin6 =0x08,
cparata	0:485458fca2bd	1219	} LSM6DSL_ACC_GYRO_USR_OFF_W_t;
cparata	0:485458fca2bd	1220
cparata	0:485458fca2bd	1221	#define LSM6DSL_ACC_GYRO_USR_OFF_W_MASK 0x08
cparata	0:485458fca2bd	1222	status_t LSM6DSL_ACC_GYRO_W_UserOffsetWeight(void *handle, LSM6DSL_ACC_GYRO_USR_OFF_W_t newValue);
cparata	0:485458fca2bd	1223	status_t LSM6DSL_ACC_GYRO_R_UserOffsetWeight(void handle, LSM6DSL_ACC_GYRO_USR_OFF_W_t value);
cparata	0:485458fca2bd	1224
cparata	0:485458fca2bd	1225
cparata	0:485458fca2bd	1226	/*******************************************************************************
cparata	0:485458fca2bd	1227	* Register : CTRL6_G
cparata	0:485458fca2bd	1228	* Address : 0X15
cparata	0:485458fca2bd	1229	* Bit Group Name: LP_XL
cparata	0:485458fca2bd	1230	* Permission : RW
cparata	0:485458fca2bd	1231	*******************************************************************************/
cparata	0:485458fca2bd	1232	typedef enum {
cparata	0:485458fca2bd	1233	LSM6DSL_ACC_GYRO_LP_XL_DISABLED =0x00,
cparata	0:485458fca2bd	1234	LSM6DSL_ACC_GYRO_LP_XL_ENABLED =0x10,
cparata	0:485458fca2bd	1235	} LSM6DSL_ACC_GYRO_LP_XL_t;
cparata	0:485458fca2bd	1236
cparata	0:485458fca2bd	1237	#define LSM6DSL_ACC_GYRO_LP_XL_MASK 0x10
cparata	0:485458fca2bd	1238	status_t LSM6DSL_ACC_GYRO_W_LowPower_XL(void *handle, LSM6DSL_ACC_GYRO_LP_XL_t newValue);
cparata	0:485458fca2bd	1239	status_t LSM6DSL_ACC_GYRO_R_LowPower_XL(void handle, LSM6DSL_ACC_GYRO_LP_XL_t value);
cparata	0:485458fca2bd	1240
cparata	0:485458fca2bd	1241	/*******************************************************************************
cparata	0:485458fca2bd	1242	* Register : CTRL6_G
cparata	0:485458fca2bd	1243	* Address : 0X15
cparata	0:485458fca2bd	1244	* Bit Group Name: DEN_LVL2_EN
cparata	0:485458fca2bd	1245	* Permission : RW
cparata	0:485458fca2bd	1246	*******************************************************************************/
cparata	0:485458fca2bd	1247	typedef enum {
cparata	0:485458fca2bd	1248	LSM6DSL_ACC_GYRO_DEN_LVL2_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1249	LSM6DSL_ACC_GYRO_DEN_LVL2_EN_ENABLED =0x20,
cparata	0:485458fca2bd	1250	} LSM6DSL_ACC_GYRO_DEN_LVL2_EN_t;
cparata	0:485458fca2bd	1251
cparata	0:485458fca2bd	1252	#define LSM6DSL_ACC_GYRO_DEN_LVL2_EN_MASK 0x20
cparata	0:485458fca2bd	1253	status_t LSM6DSL_ACC_GYRO_W_DEN_LVL2_EN(void *handle, LSM6DSL_ACC_GYRO_DEN_LVL2_EN_t newValue);
cparata	0:485458fca2bd	1254	status_t LSM6DSL_ACC_GYRO_R_DEN_LVL2_EN(void handle, LSM6DSL_ACC_GYRO_DEN_LVL2_EN_t value);
cparata	0:485458fca2bd	1255
cparata	0:485458fca2bd	1256	/*******************************************************************************
cparata	0:485458fca2bd	1257	* Register : CTRL6_G
cparata	0:485458fca2bd	1258	* Address : 0X15
cparata	0:485458fca2bd	1259	* Bit Group Name: DEN_LVL_EN
cparata	0:485458fca2bd	1260	* Permission : RW
cparata	0:485458fca2bd	1261	*******************************************************************************/
cparata	0:485458fca2bd	1262	typedef enum {
cparata	0:485458fca2bd	1263	LSM6DSL_ACC_GYRO_DEN_LVL_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1264	LSM6DSL_ACC_GYRO_DEN_LVL_EN_ENABLED =0x40,
cparata	0:485458fca2bd	1265	} LSM6DSL_ACC_GYRO_DEN_LVL_EN_t;
cparata	0:485458fca2bd	1266
cparata	0:485458fca2bd	1267	#define LSM6DSL_ACC_GYRO_DEN_LVL_EN_MASK 0x40
cparata	0:485458fca2bd	1268	status_t LSM6DSL_ACC_GYRO_W_DEN_LVL_EN(void *handle, LSM6DSL_ACC_GYRO_DEN_LVL_EN_t newValue);
cparata	0:485458fca2bd	1269	status_t LSM6DSL_ACC_GYRO_R_DEN_LVL_EN(void handle, LSM6DSL_ACC_GYRO_DEN_LVL_EN_t value);
cparata	0:485458fca2bd	1270
cparata	0:485458fca2bd	1271	/*******************************************************************************
cparata	0:485458fca2bd	1272	* Register : CTRL6_G
cparata	0:485458fca2bd	1273	* Address : 0X15
cparata	0:485458fca2bd	1274	* Bit Group Name: TRIG_EN
cparata	0:485458fca2bd	1275	* Permission : RW
cparata	0:485458fca2bd	1276	*******************************************************************************/
cparata	0:485458fca2bd	1277	typedef enum {
cparata	0:485458fca2bd	1278	LSM6DSL_ACC_GYRO_DEN_EDGE_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1279	LSM6DSL_ACC_GYRO_DEN_EDGE_EN_ENABLED =0x80,
cparata	0:485458fca2bd	1280	} LSM6DSL_ACC_GYRO_DEN_EDGE_EN_t;
cparata	0:485458fca2bd	1281
cparata	0:485458fca2bd	1282	#define LSM6DSL_ACC_GYRO_DEN_EDGE_EN_MASK 0x80
cparata	0:485458fca2bd	1283	status_t LSM6DSL_ACC_GYRO_W_ExternalTrigger(void *handle, LSM6DSL_ACC_GYRO_DEN_EDGE_EN_t newValue);
cparata	0:485458fca2bd	1284	status_t LSM6DSL_ACC_GYRO_R_ExternalTrigger(void handle, LSM6DSL_ACC_GYRO_DEN_EDGE_EN_t value);
cparata	0:485458fca2bd	1285
cparata	0:485458fca2bd	1286	/*******************************************************************************
cparata	0:485458fca2bd	1287	* Register : CTRL7_G
cparata	0:485458fca2bd	1288	* Address : 0X16
cparata	0:485458fca2bd	1289	* Bit Group Name: ROUNDING_STATUS
cparata	0:485458fca2bd	1290	* Permission : RW
cparata	0:485458fca2bd	1291	*******************************************************************************/
cparata	0:485458fca2bd	1292	typedef enum {
cparata	0:485458fca2bd	1293	LSM6DSL_ACC_GYRO_RND_DISABLE =0x00,
cparata	0:485458fca2bd	1294	LSM6DSL_ACC_GYRO_RND_ENABLE =0x04,
cparata	0:485458fca2bd	1295	} LSM6DSL_ACC_GYRO_RND_STATUS_t;
cparata	0:485458fca2bd	1296
cparata	0:485458fca2bd	1297	#define LSM6DSL_ACC_GYRO_RND_STATUS_MASK 0x04
cparata	0:485458fca2bd	1298	status_t LSM6DSL_ACC_GYRO_W_RoundingOnStatusRegisters(void *handle, LSM6DSL_ACC_GYRO_RND_STATUS_t newValue);
cparata	0:485458fca2bd	1299	status_t LSM6DSL_ACC_GYRO_R_RoundingOnStatusRegisters(void handle, LSM6DSL_ACC_GYRO_RND_STATUS_t value);
cparata	0:485458fca2bd	1300
cparata	0:485458fca2bd	1301
cparata	0:485458fca2bd	1302	/*******************************************************************************
cparata	0:485458fca2bd	1303	* Register : CTRL7_G
cparata	0:485458fca2bd	1304	* Address : 0X16
cparata	0:485458fca2bd	1305	* Bit Group Name: HPM_G
cparata	0:485458fca2bd	1306	* Permission : RW
cparata	0:485458fca2bd	1307	*******************************************************************************/
cparata	0:485458fca2bd	1308	typedef enum {
cparata	0:485458fca2bd	1309	LSM6DSL_ACC_GYRO_HPM_G_0Hz016 =0x00,
cparata	0:485458fca2bd	1310	LSM6DSL_ACC_GYRO_HPM_G_0Hz065 =0x10,
cparata	0:485458fca2bd	1311	LSM6DSL_ACC_GYRO_HPM_G_2Hz260 =0x20,
cparata	0:485458fca2bd	1312	LSM6DSL_ACC_GYRO_HPM_G_1Hz04 =0x30,
cparata	0:485458fca2bd	1313	} LSM6DSL_ACC_GYRO_HPM_G_t;
cparata	0:485458fca2bd	1314
cparata	0:485458fca2bd	1315	#define LSM6DSL_ACC_GYRO_HPM_G_MASK 0x30
cparata	0:485458fca2bd	1316	status_t LSM6DSL_ACC_GYRO_W_HPM_G(void *handle, LSM6DSL_ACC_GYRO_HPM_G_t newValue);
cparata	0:485458fca2bd	1317	status_t LSM6DSL_ACC_GYRO_R_HPM_G(void handle, LSM6DSL_ACC_GYRO_HPM_G_t value);
cparata	0:485458fca2bd	1318
cparata	0:485458fca2bd	1319	/*******************************************************************************
cparata	0:485458fca2bd	1320	* Register : CTRL7_G
cparata	0:485458fca2bd	1321	* Address : 0X16
cparata	0:485458fca2bd	1322	* Bit Group Name: HP_EN_G
cparata	0:485458fca2bd	1323	* Permission : RW
cparata	0:485458fca2bd	1324	*******************************************************************************/
cparata	0:485458fca2bd	1325	typedef enum {
cparata	0:485458fca2bd	1326	LSM6DSL_ACC_GYRO_HP_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1327	LSM6DSL_ACC_GYRO_HP_EN_ENABLED =0x40,
cparata	0:485458fca2bd	1328	} LSM6DSL_ACC_GYRO_HP_EN_t;
cparata	0:485458fca2bd	1329
cparata	0:485458fca2bd	1330	#define LSM6DSL_ACC_GYRO_HP_EN_MASK 0x40
cparata	0:485458fca2bd	1331	status_t LSM6DSL_ACC_GYRO_W_HPFilter_En(void *handle, LSM6DSL_ACC_GYRO_HP_EN_t newValue);
cparata	0:485458fca2bd	1332	status_t LSM6DSL_ACC_GYRO_R_HPFilter_En(void handle, LSM6DSL_ACC_GYRO_HP_EN_t value);
cparata	0:485458fca2bd	1333
cparata	0:485458fca2bd	1334	/*******************************************************************************
cparata	0:485458fca2bd	1335	* Register : CTRL7_G
cparata	0:485458fca2bd	1336	* Address : 0X16
cparata	0:485458fca2bd	1337	* Bit Group Name: LP_EN
cparata	0:485458fca2bd	1338	* Permission : RW
cparata	0:485458fca2bd	1339	*******************************************************************************/
cparata	0:485458fca2bd	1340	typedef enum {
cparata	0:485458fca2bd	1341	LSM6DSL_ACC_GYRO_LP_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1342	LSM6DSL_ACC_GYRO_LP_EN_ENABLED =0x80,
cparata	0:485458fca2bd	1343	} LSM6DSL_ACC_GYRO_LP_EN_t;
cparata	0:485458fca2bd	1344
cparata	0:485458fca2bd	1345	#define LSM6DSL_ACC_GYRO_LP_EN_MASK 0x80
cparata	0:485458fca2bd	1346	status_t LSM6DSL_ACC_GYRO_W_LP_Mode(void *handle, LSM6DSL_ACC_GYRO_LP_EN_t newValue);
cparata	0:485458fca2bd	1347	status_t LSM6DSL_ACC_GYRO_R_LP_Mode(void handle, LSM6DSL_ACC_GYRO_LP_EN_t value);
cparata	0:485458fca2bd	1348
cparata	0:485458fca2bd	1349	/*******************************************************************************
cparata	0:485458fca2bd	1350	* Register : CTRL7_G
cparata	0:485458fca2bd	1351	* Address : 0X16
cparata	0:485458fca2bd	1352	* Bit Group Name: ROUNDING_STATUS
cparata	0:485458fca2bd	1353	* Permission : RW
cparata	0:485458fca2bd	1354	*******************************************************************************/
cparata	0:485458fca2bd	1355	typedef enum {
cparata	0:485458fca2bd	1356	LSM6DSL_ACC_GYRO_ROUNDING_STATUS_DISABLED =0x00,
cparata	0:485458fca2bd	1357	LSM6DSL_ACC_GYRO_ROUNDING_STATUS_ENABLED =0x04,
cparata	0:485458fca2bd	1358	} LSM6DSL_ACC_GYRO_ROUNDING_STATUS_t;
cparata	0:485458fca2bd	1359
cparata	0:485458fca2bd	1360	#define LSM6DSL_ACC_GYRO_ROUNDING_STATUS_MASK 0x04
cparata	0:485458fca2bd	1361	status_t LSM6DSL_ACC_GYRO_W_ROUNDING_STATUS(void *handle, LSM6DSL_ACC_GYRO_ROUNDING_STATUS_t newValue);
cparata	0:485458fca2bd	1362	status_t LSM6DSL_ACC_GYRO_R_ROUNDING_STATUS(void handle, LSM6DSL_ACC_GYRO_ROUNDING_STATUS_t value);
cparata	0:485458fca2bd	1363
cparata	0:485458fca2bd	1364	/*******************************************************************************
cparata	0:485458fca2bd	1365	* Register : CTRL7_G
cparata	0:485458fca2bd	1366	* Address : 0X16
cparata	0:485458fca2bd	1367	* Bit Group Name: HP_G_RST
cparata	0:485458fca2bd	1368	* Permission : RW
cparata	0:485458fca2bd	1369	*******************************************************************************/
cparata	0:485458fca2bd	1370	typedef enum {
cparata	0:485458fca2bd	1371	LSM6DSL_ACC_GYRO_HP_G_RST_OFF =0x00,
cparata	0:485458fca2bd	1372	LSM6DSL_ACC_GYRO_HP_G_RST_ON =0x08,
cparata	0:485458fca2bd	1373	} LSM6DSL_ACC_GYRO_HP_G_RST_t;
cparata	0:485458fca2bd	1374
cparata	0:485458fca2bd	1375	#define LSM6DSL_ACC_GYRO_HP_G_RST_MASK 0x08
cparata	0:485458fca2bd	1376	status_t LSM6DSL_ACC_GYRO_W_HP_G_RST(void *handle, LSM6DSL_ACC_GYRO_HP_G_RST_t newValue);
cparata	0:485458fca2bd	1377	status_t LSM6DSL_ACC_GYRO_R_HP_G_RST(void handle, LSM6DSL_ACC_GYRO_HP_G_RST_t value);
cparata	0:485458fca2bd	1378
cparata	0:485458fca2bd	1379	/*******************************************************************************
cparata	0:485458fca2bd	1380	* Register : CTRL8_XL
cparata	0:485458fca2bd	1381	* Address : 0X17
cparata	0:485458fca2bd	1382	* Bit Group Name: LOW_PASS_ON_6D
cparata	0:485458fca2bd	1383	* Permission : RW
cparata	0:485458fca2bd	1384	*******************************************************************************/
cparata	0:485458fca2bd	1385	typedef enum {
cparata	0:485458fca2bd	1386	LSM6DSL_ACC_GYRO_LOW_PASS_ON_6D_OFF =0x00,
cparata	0:485458fca2bd	1387	LSM6DSL_ACC_GYRO_LOW_PASS_ON_6D_ON =0x01,
cparata	0:485458fca2bd	1388	} LSM6DSL_ACC_GYRO_LOW_PASS_ON_6D_t;
cparata	0:485458fca2bd	1389
cparata	0:485458fca2bd	1390	#define LSM6DSL_ACC_GYRO_LOW_PASS_ON_6D_MASK 0x01
cparata	0:485458fca2bd	1391	status_t LSM6DSL_ACC_GYRO_W_LOW_PASS_ON_6D(void *handle, LSM6DSL_ACC_GYRO_LOW_PASS_ON_6D_t newValue);
cparata	0:485458fca2bd	1392	status_t LSM6DSL_ACC_GYRO_R_LOW_PASS_ON_6D(void handle, LSM6DSL_ACC_GYRO_LOW_PASS_ON_6D_t value);
cparata	0:485458fca2bd	1393
cparata	0:485458fca2bd	1394	/*******************************************************************************
cparata	0:485458fca2bd	1395	* Register : CTRL8_XL
cparata	0:485458fca2bd	1396	* Address : 0X17
cparata	0:485458fca2bd	1397	* Bit Group Name: HP_SLOPE_XL_EN
cparata	0:485458fca2bd	1398	* Permission : RW
cparata	0:485458fca2bd	1399	*******************************************************************************/
cparata	0:485458fca2bd	1400	typedef enum {
cparata	0:485458fca2bd	1401	LSM6DSL_ACC_GYRO_HP_SLOPE_XL_EN =0x00,
cparata	0:485458fca2bd	1402	LSM6DSL_ACC_GYRO_HP_SLOPE_XL_DIS =0x04,
cparata	0:485458fca2bd	1403	} LSM6DSL_ACC_GYRO_HP_SLOPE_XL_t;
cparata	0:485458fca2bd	1404
cparata	0:485458fca2bd	1405	#define LSM6DSL_ACC_GYRO_HP_SLOPE_XL_MASK 0x04
cparata	0:485458fca2bd	1406	status_t LSM6DSL_ACC_GYRO_W_HP_SLOPE_XL(void *handle, LSM6DSL_ACC_GYRO_HP_SLOPE_XL_t newValue);
cparata	0:485458fca2bd	1407	status_t LSM6DSL_ACC_GYRO_R_HP_SLOPE_XL(void handle, LSM6DSL_ACC_GYRO_HP_SLOPE_XL_t value);
cparata	0:485458fca2bd	1408
cparata	0:485458fca2bd	1409	/*******************************************************************************
cparata	0:485458fca2bd	1410	* Register : CTRL8_XL
cparata	0:485458fca2bd	1411	* Address : 0X17
cparata	0:485458fca2bd	1412	* Bit Group Name: INPUT_COMPOSITE
cparata	0:485458fca2bd	1413	* Permission : RW
cparata	0:485458fca2bd	1414	*******************************************************************************/
cparata	0:485458fca2bd	1415	typedef enum {
cparata	0:485458fca2bd	1416	LSM6DSL_ACC_GYRO_IN_ODR_DIV_2 =0x00,
cparata	0:485458fca2bd	1417	LSM6DSL_ACC_GYRO_IN_ODR_DIV_4 =0x80,
cparata	0:485458fca2bd	1418	} LSM6DSL_ACC_GYRO_IN_COMP_t;
cparata	0:485458fca2bd	1419
cparata	0:485458fca2bd	1420	#define LSM6DSL_ACC_GYRO_IN_COMP_MASK 0x80
cparata	0:485458fca2bd	1421	status_t LSM6DSL_ACC_GYRO_W_InComposit(void *handle, LSM6DSL_ACC_GYRO_IN_COMP_t newValue);
cparata	0:485458fca2bd	1422	status_t LSM6DSL_ACC_GYRO_R_InComposit(void handle, LSM6DSL_ACC_GYRO_IN_COMP_t value);
cparata	0:485458fca2bd	1423
cparata	0:485458fca2bd	1424	/*******************************************************************************
cparata	0:485458fca2bd	1425	* Register : CTRL8_XL
cparata	0:485458fca2bd	1426	* Address : 0X17
cparata	0:485458fca2bd	1427	* Bit Group Name: HP_REF_MODE
cparata	0:485458fca2bd	1428	* Permission : RW
cparata	0:485458fca2bd	1429	*******************************************************************************/
cparata	0:485458fca2bd	1430	typedef enum {
cparata	0:485458fca2bd	1431	LSM6DSL_ACC_GYRO_HP_REF_DISABLE =0x00,
cparata	0:485458fca2bd	1432	LSM6DSL_ACC_GYRO_HP_REF_ENABLE =0x10,
cparata	0:485458fca2bd	1433	} LSM6DSL_ACC_GYRO_HP_REF_MODE_t;
cparata	0:485458fca2bd	1434
cparata	0:485458fca2bd	1435	#define LSM6DSL_ACC_GYRO_HP_REF_MODE_MASK 0x10
cparata	0:485458fca2bd	1436	status_t LSM6DSL_ACC_GYRO_W_HPfilterReference(void *handle, LSM6DSL_ACC_GYRO_HP_REF_MODE_t newValue);
cparata	0:485458fca2bd	1437	status_t LSM6DSL_ACC_GYRO_R_HPfilterReference(void handle, LSM6DSL_ACC_GYRO_HP_REF_MODE_t value);
cparata	0:485458fca2bd	1438
cparata	0:485458fca2bd	1439	/*******************************************************************************
cparata	0:485458fca2bd	1440	* Register : CTRL8_XL
cparata	0:485458fca2bd	1441	* Address : 0X17
cparata	0:485458fca2bd	1442	* Bit Group Name: HPCF_XL
cparata	0:485458fca2bd	1443	* Permission : RW
cparata	0:485458fca2bd	1444	*******************************************************************************/
cparata	0:485458fca2bd	1445	typedef enum {
cparata	0:485458fca2bd	1446	LSM6DSL_ACC_GYRO_HPCF_XL_DIV4 =0x00,
cparata	0:485458fca2bd	1447	LSM6DSL_ACC_GYRO_HPCF_XL_DIV100 =0x20,
cparata	0:485458fca2bd	1448	LSM6DSL_ACC_GYRO_HPCF_XL_DIV9 =0x40,
cparata	0:485458fca2bd	1449	LSM6DSL_ACC_GYRO_HPCF_XL_DIV400 =0x60,
cparata	0:485458fca2bd	1450	} LSM6DSL_ACC_GYRO_HPCF_XL_t;
cparata	0:485458fca2bd	1451
cparata	0:485458fca2bd	1452	#define LSM6DSL_ACC_GYRO_HPCF_XL_MASK 0x60
cparata	0:485458fca2bd	1453	status_t LSM6DSL_ACC_GYRO_W_HPCF_XL(void *handle, LSM6DSL_ACC_GYRO_HPCF_XL_t newValue);
cparata	0:485458fca2bd	1454	status_t LSM6DSL_ACC_GYRO_R_HPCF_XL(void handle, LSM6DSL_ACC_GYRO_HPCF_XL_t value);
cparata	0:485458fca2bd	1455
cparata	0:485458fca2bd	1456	/*******************************************************************************
cparata	0:485458fca2bd	1457	* Register : CTRL8_XL
cparata	0:485458fca2bd	1458	* Address : 0X17
cparata	0:485458fca2bd	1459	* Bit Group Name: LPF2_XL_EN
cparata	0:485458fca2bd	1460	* Permission : RW
cparata	0:485458fca2bd	1461	*******************************************************************************/
cparata	0:485458fca2bd	1462	typedef enum {
cparata	0:485458fca2bd	1463	LSM6DSL_ACC_GYRO_LPF2_XL_DISABLE =0x00,
cparata	0:485458fca2bd	1464	LSM6DSL_ACC_GYRO_LPF2_XL_ENABLE =0x80,
cparata	0:485458fca2bd	1465	} LSM6DSL_ACC_GYRO_LPF2_XL_t;
cparata	0:485458fca2bd	1466
cparata	0:485458fca2bd	1467	#define LSM6DSL_ACC_GYRO_LPF2_XL_MASK 0x80
cparata	0:485458fca2bd	1468	status_t LSM6DSL_ACC_GYRO_W_LowPassFiltSel_XL(void *handle, LSM6DSL_ACC_GYRO_LPF2_XL_t newValue);
cparata	0:485458fca2bd	1469	status_t LSM6DSL_ACC_GYRO_R_LowPassFiltSel_XL(void handle, LSM6DSL_ACC_GYRO_LPF2_XL_t value);
cparata	0:485458fca2bd	1470
cparata	0:485458fca2bd	1471
cparata	0:485458fca2bd	1472	/*******************************************************************************
cparata	0:485458fca2bd	1473	* Register : CTRL9_XL
cparata	0:485458fca2bd	1474	* Address : 0X18
cparata	0:485458fca2bd	1475	* Bit Group Name: SOFT_EN
cparata	0:485458fca2bd	1476	* Permission : RW
cparata	0:485458fca2bd	1477	*******************************************************************************/
cparata	0:485458fca2bd	1478	typedef enum {
cparata	0:485458fca2bd	1479	LSM6DSL_ACC_GYRO_SOFT_DISABLED =0x00,
cparata	0:485458fca2bd	1480	LSM6DSL_ACC_GYRO_SOFT_ENABLE =0x04,
cparata	0:485458fca2bd	1481	} LSM6DSL_ACC_GYRO_SOFT_t;
cparata	0:485458fca2bd	1482
cparata	0:485458fca2bd	1483	#define LSM6DSL_ACC_GYRO_SOFT_MASK 0x04
cparata	0:485458fca2bd	1484	status_t LSM6DSL_ACC_GYRO_W_SOFT(void *handle, LSM6DSL_ACC_GYRO_SOFT_t newValue);
cparata	0:485458fca2bd	1485	status_t LSM6DSL_ACC_GYRO_R_SOFT(void handle, LSM6DSL_ACC_GYRO_SOFT_t value);
cparata	0:485458fca2bd	1486
cparata	0:485458fca2bd	1487	/*******************************************************************************
cparata	0:485458fca2bd	1488	* Register : CTRL10_C
cparata	0:485458fca2bd	1489	* Address : 0X19
cparata	0:485458fca2bd	1490	* Bit Group Name: SIGN_MOTION_EN
cparata	0:485458fca2bd	1491	* Permission : RW
cparata	0:485458fca2bd	1492	*******************************************************************************/
cparata	0:485458fca2bd	1493	typedef enum {
cparata	0:485458fca2bd	1494	LSM6DSL_ACC_GYRO_SIGN_MOTION_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1495	LSM6DSL_ACC_GYRO_SIGN_MOTION_EN_ENABLED =0x01,
cparata	0:485458fca2bd	1496	} LSM6DSL_ACC_GYRO_SIGN_MOTION_EN_t;
cparata	0:485458fca2bd	1497
cparata	0:485458fca2bd	1498	#define LSM6DSL_ACC_GYRO_SIGN_MOTION_EN_MASK 0x01
cparata	0:485458fca2bd	1499	status_t LSM6DSL_ACC_GYRO_W_SignifcantMotion(void *handle, LSM6DSL_ACC_GYRO_SIGN_MOTION_EN_t newValue);
cparata	0:485458fca2bd	1500	status_t LSM6DSL_ACC_GYRO_R_SignifcantMotion(void handle, LSM6DSL_ACC_GYRO_SIGN_MOTION_EN_t value);
cparata	0:485458fca2bd	1501
cparata	0:485458fca2bd	1502	/*******************************************************************************
cparata	0:485458fca2bd	1503	* Register : CTRL10_C
cparata	0:485458fca2bd	1504	* Address : 0X19
cparata	0:485458fca2bd	1505	* Bit Group Name: PEDO_RST_STEP
cparata	0:485458fca2bd	1506	* Permission : RW
cparata	0:485458fca2bd	1507	*******************************************************************************/
cparata	0:485458fca2bd	1508	typedef enum {
cparata	0:485458fca2bd	1509	LSM6DSL_ACC_GYRO_PEDO_RST_STEP_DISABLED =0x00,
cparata	0:485458fca2bd	1510	LSM6DSL_ACC_GYRO_PEDO_RST_STEP_ENABLED =0x02,
cparata	0:485458fca2bd	1511	} LSM6DSL_ACC_GYRO_PEDO_RST_STEP_t;
cparata	0:485458fca2bd	1512
cparata	0:485458fca2bd	1513	#define LSM6DSL_ACC_GYRO_PEDO_RST_STEP_MASK 0x02
cparata	0:485458fca2bd	1514	status_t LSM6DSL_ACC_GYRO_W_PedoStepReset(void *handle, LSM6DSL_ACC_GYRO_PEDO_RST_STEP_t newValue);
cparata	0:485458fca2bd	1515	status_t LSM6DSL_ACC_GYRO_R_PedoStepReset(void handle, LSM6DSL_ACC_GYRO_PEDO_RST_STEP_t value);
cparata	0:485458fca2bd	1516
cparata	0:485458fca2bd	1517	/*******************************************************************************
cparata	0:485458fca2bd	1518	* Register : CTRL10_C
cparata	0:485458fca2bd	1519	* Address : 0X19
cparata	0:485458fca2bd	1520	* Bit Group Name: FUNC_EN
cparata	0:485458fca2bd	1521	* Permission : RW
cparata	0:485458fca2bd	1522	*******************************************************************************/
cparata	0:485458fca2bd	1523	typedef enum {
cparata	0:485458fca2bd	1524	LSM6DSL_ACC_GYRO_FUNC_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1525	LSM6DSL_ACC_GYRO_FUNC_EN_ENABLED =0x04,
cparata	0:485458fca2bd	1526	} LSM6DSL_ACC_GYRO_FUNC_EN_t;
cparata	0:485458fca2bd	1527
cparata	0:485458fca2bd	1528	#define LSM6DSL_ACC_GYRO_FUNC_EN_MASK 0x04
cparata	0:485458fca2bd	1529	status_t LSM6DSL_ACC_GYRO_W_FUNC_EN(void *handle, LSM6DSL_ACC_GYRO_FUNC_EN_t newValue);
cparata	0:485458fca2bd	1530	status_t LSM6DSL_ACC_GYRO_R_FUNC_EN(void handle, LSM6DSL_ACC_GYRO_FUNC_EN_t value);
cparata	0:485458fca2bd	1531
cparata	0:485458fca2bd	1532	/*******************************************************************************
cparata	0:485458fca2bd	1533	* Register : CTRL10_C
cparata	0:485458fca2bd	1534	* Address : 0X19
cparata	0:485458fca2bd	1535	* Bit Group Name: TILT_EN
cparata	0:485458fca2bd	1536	* Permission : RW
cparata	0:485458fca2bd	1537	*******************************************************************************/
cparata	0:485458fca2bd	1538	typedef enum {
cparata	0:485458fca2bd	1539	LSM6DSL_ACC_GYRO_TILT_DISABLED =0x00,
cparata	0:485458fca2bd	1540	LSM6DSL_ACC_GYRO_TILT_ENABLED =0x08,
cparata	0:485458fca2bd	1541	} LSM6DSL_ACC_GYRO_TILT_G_t;
cparata	0:485458fca2bd	1542
cparata	0:485458fca2bd	1543	#define LSM6DSL_ACC_GYRO_TILT_MASK 0x08
cparata	0:485458fca2bd	1544	status_t LSM6DSL_ACC_GYRO_W_TILT(void *handle, LSM6DSL_ACC_GYRO_TILT_G_t newValue);
cparata	0:485458fca2bd	1545	status_t LSM6DSL_ACC_GYRO_R_TILT(void handle, LSM6DSL_ACC_GYRO_TILT_G_t value);
cparata	0:485458fca2bd	1546
cparata	0:485458fca2bd	1547	/*******************************************************************************
cparata	0:485458fca2bd	1548	* Register : CTRL10_C
cparata	0:485458fca2bd	1549	* Address : 0X19
cparata	0:485458fca2bd	1550	* Bit Group Name: PEDO_EN
cparata	0:485458fca2bd	1551	* Permission : RW
cparata	0:485458fca2bd	1552	*******************************************************************************/
cparata	0:485458fca2bd	1553	typedef enum {
cparata	0:485458fca2bd	1554	LSM6DSL_ACC_GYRO_PEDO_DISABLED =0x00,
cparata	0:485458fca2bd	1555	LSM6DSL_ACC_GYRO_PEDO_ENABLED =0x10,
cparata	0:485458fca2bd	1556	} LSM6DSL_ACC_GYRO_PEDO_t;
cparata	0:485458fca2bd	1557
cparata	0:485458fca2bd	1558	#define LSM6DSL_ACC_GYRO_PEDO_MASK 0x10
cparata	0:485458fca2bd	1559	status_t LSM6DSL_ACC_GYRO_W_PEDO(void *handle, LSM6DSL_ACC_GYRO_PEDO_t newValue);
cparata	0:485458fca2bd	1560	status_t LSM6DSL_ACC_GYRO_R_PEDO(void handle, LSM6DSL_ACC_GYRO_PEDO_t value);
cparata	0:485458fca2bd	1561
cparata	0:485458fca2bd	1562	/*******************************************************************************
cparata	0:485458fca2bd	1563	* Register : CTRL10_C
cparata	0:485458fca2bd	1564	* Address : 0X19
cparata	0:485458fca2bd	1565	* Bit Group Name: TIMER_EN
cparata	0:485458fca2bd	1566	* Permission : RW
cparata	0:485458fca2bd	1567	*******************************************************************************/
cparata	0:485458fca2bd	1568	typedef enum {
cparata	0:485458fca2bd	1569	LSM6DSL_ACC_GYRO_TIMER_DISABLED =0x00,
cparata	0:485458fca2bd	1570	LSM6DSL_ACC_GYRO_TIMER_ENABLED =0x20,
cparata	0:485458fca2bd	1571	} LSM6DSL_ACC_GYRO_TIMER_t;
cparata	0:485458fca2bd	1572
cparata	0:485458fca2bd	1573	#define LSM6DSL_ACC_GYRO_TIMER_MASK 0x20
cparata	0:485458fca2bd	1574	status_t LSM6DSL_ACC_GYRO_W_TIMER(void *handle, LSM6DSL_ACC_GYRO_TIMER_t newValue);
cparata	0:485458fca2bd	1575	status_t LSM6DSL_ACC_GYRO_R_TIMER(void handle, LSM6DSL_ACC_GYRO_TIMER_t value);
cparata	0:485458fca2bd	1576
cparata	0:485458fca2bd	1577
cparata	0:485458fca2bd	1578	/*******************************************************************************
cparata	0:485458fca2bd	1579	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1580	* Address : 0X1A
cparata	0:485458fca2bd	1581	* Bit Group Name: MASTER_ON
cparata	0:485458fca2bd	1582	* Permission : RW
cparata	0:485458fca2bd	1583	*******************************************************************************/
cparata	0:485458fca2bd	1584	typedef enum {
cparata	0:485458fca2bd	1585	LSM6DSL_ACC_GYRO_MASTER_ON_DISABLED =0x00,
cparata	0:485458fca2bd	1586	LSM6DSL_ACC_GYRO_MASTER_ON_ENABLED =0x01,
cparata	0:485458fca2bd	1587	} LSM6DSL_ACC_GYRO_MASTER_ON_t;
cparata	0:485458fca2bd	1588
cparata	0:485458fca2bd	1589	#define LSM6DSL_ACC_GYRO_MASTER_ON_MASK 0x01
cparata	0:485458fca2bd	1590	status_t LSM6DSL_ACC_GYRO_W_I2C_MASTER_Enable(void *handle, LSM6DSL_ACC_GYRO_MASTER_ON_t newValue);
cparata	0:485458fca2bd	1591	status_t LSM6DSL_ACC_GYRO_R_I2C_MASTER_Enable(void handle, LSM6DSL_ACC_GYRO_MASTER_ON_t value);
cparata	0:485458fca2bd	1592
cparata	0:485458fca2bd	1593	/*******************************************************************************
cparata	0:485458fca2bd	1594	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1595	* Address : 0X1A
cparata	0:485458fca2bd	1596	* Bit Group Name: IRON_EN
cparata	0:485458fca2bd	1597	* Permission : RW
cparata	0:485458fca2bd	1598	*******************************************************************************/
cparata	0:485458fca2bd	1599	typedef enum {
cparata	0:485458fca2bd	1600	LSM6DSL_ACC_GYRO_IRON_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1601	LSM6DSL_ACC_GYRO_IRON_EN_ENABLED =0x02,
cparata	0:485458fca2bd	1602	} LSM6DSL_ACC_GYRO_IRON_EN_t;
cparata	0:485458fca2bd	1603
cparata	0:485458fca2bd	1604	#define LSM6DSL_ACC_GYRO_IRON_EN_MASK 0x02
cparata	0:485458fca2bd	1605	status_t LSM6DSL_ACC_GYRO_W_IronCorrection_EN(void *handle, LSM6DSL_ACC_GYRO_IRON_EN_t newValue);
cparata	0:485458fca2bd	1606	status_t LSM6DSL_ACC_GYRO_R_IronCorrection_EN(void handle, LSM6DSL_ACC_GYRO_IRON_EN_t value);
cparata	0:485458fca2bd	1607
cparata	0:485458fca2bd	1608	/*******************************************************************************
cparata	0:485458fca2bd	1609	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1610	* Address : 0X1A
cparata	0:485458fca2bd	1611	* Bit Group Name: PASS_THRU_MODE
cparata	0:485458fca2bd	1612	* Permission : RW
cparata	0:485458fca2bd	1613	*******************************************************************************/
cparata	0:485458fca2bd	1614	typedef enum {
cparata	0:485458fca2bd	1615	LSM6DSL_ACC_GYRO_PASS_THRU_MODE_DISABLED =0x00,
cparata	0:485458fca2bd	1616	LSM6DSL_ACC_GYRO_PASS_THRU_MODE_ENABLED =0x04,
cparata	0:485458fca2bd	1617	} LSM6DSL_ACC_GYRO_PASS_THRU_MODE_t;
cparata	0:485458fca2bd	1618
cparata	0:485458fca2bd	1619	#define LSM6DSL_ACC_GYRO_PASS_THRU_MODE_MASK 0x04
cparata	0:485458fca2bd	1620	status_t LSM6DSL_ACC_GYRO_W_PASS_THRU_MODE(void *handle, LSM6DSL_ACC_GYRO_PASS_THRU_MODE_t newValue);
cparata	0:485458fca2bd	1621	status_t LSM6DSL_ACC_GYRO_R_PASS_THRU_MODE(void handle, LSM6DSL_ACC_GYRO_PASS_THRU_MODE_t value);
cparata	0:485458fca2bd	1622
cparata	0:485458fca2bd	1623	/*******************************************************************************
cparata	0:485458fca2bd	1624	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1625	* Address : 0X1A
cparata	0:485458fca2bd	1626	* Bit Group Name: PULL_UP_EN
cparata	0:485458fca2bd	1627	* Permission : RW
cparata	0:485458fca2bd	1628	*******************************************************************************/
cparata	0:485458fca2bd	1629	typedef enum {
cparata	0:485458fca2bd	1630	LSM6DSL_ACC_GYRO_PULL_UP_EN_DISABLED =0x00,
cparata	0:485458fca2bd	1631	LSM6DSL_ACC_GYRO_PULL_UP_EN_ENABLED =0x08,
cparata	0:485458fca2bd	1632	} LSM6DSL_ACC_GYRO_PULL_UP_EN_t;
cparata	0:485458fca2bd	1633
cparata	0:485458fca2bd	1634	#define LSM6DSL_ACC_GYRO_PULL_UP_EN_MASK 0x08
cparata	0:485458fca2bd	1635	status_t LSM6DSL_ACC_GYRO_W_PULL_UP_EN(void *handle, LSM6DSL_ACC_GYRO_PULL_UP_EN_t newValue);
cparata	0:485458fca2bd	1636	status_t LSM6DSL_ACC_GYRO_R_PULL_UP_EN(void handle, LSM6DSL_ACC_GYRO_PULL_UP_EN_t value);
cparata	0:485458fca2bd	1637
cparata	0:485458fca2bd	1638	/*******************************************************************************
cparata	0:485458fca2bd	1639	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1640	* Address : 0X1A
cparata	0:485458fca2bd	1641	* Bit Group Name: START_CONFIG
cparata	0:485458fca2bd	1642	* Permission : RW
cparata	0:485458fca2bd	1643	*******************************************************************************/
cparata	0:485458fca2bd	1644	typedef enum {
cparata	0:485458fca2bd	1645	LSM6DSL_ACC_GYRO_START_CONFIG_XL_G_DRDY =0x00,
cparata	0:485458fca2bd	1646	LSM6DSL_ACC_GYRO_START_CONFIG_EXT_INT2 =0x10,
cparata	0:485458fca2bd	1647	} LSM6DSL_ACC_GYRO_START_CONFIG_t;
cparata	0:485458fca2bd	1648
cparata	0:485458fca2bd	1649	#define LSM6DSL_ACC_GYRO_START_CONFIG_MASK 0x10
cparata	0:485458fca2bd	1650	status_t LSM6DSL_ACC_GYRO_W_SensorHUB_Trigger_Sel(void *handle, LSM6DSL_ACC_GYRO_START_CONFIG_t newValue);
cparata	0:485458fca2bd	1651	status_t LSM6DSL_ACC_GYRO_R_SensorHUB_Trigger_Sel(void handle, LSM6DSL_ACC_GYRO_START_CONFIG_t value);
cparata	0:485458fca2bd	1652
cparata	0:485458fca2bd	1653	/*******************************************************************************
cparata	0:485458fca2bd	1654	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1655	* Address : 0X1A
cparata	0:485458fca2bd	1656	* Bit Group Name: DATA_VAL_SEL_FIFO
cparata	0:485458fca2bd	1657	* Permission : RW
cparata	0:485458fca2bd	1658	*******************************************************************************/
cparata	0:485458fca2bd	1659	typedef enum {
cparata	0:485458fca2bd	1660	LSM6DSL_ACC_GYRO_DATA_VAL_SEL_FIFO_XL_G_DRDY =0x00,
cparata	0:485458fca2bd	1661	LSM6DSL_ACC_GYRO_DATA_VAL_SEL_FIFO_SHUB_DRDY =0x40,
cparata	0:485458fca2bd	1662	} LSM6DSL_ACC_GYRO_DATA_VAL_SEL_FIFO_t;
cparata	0:485458fca2bd	1663
cparata	0:485458fca2bd	1664	#define LSM6DSL_ACC_GYRO_DATA_VAL_SEL_FIFO_MASK 0x40
cparata	0:485458fca2bd	1665	status_t LSM6DSL_ACC_GYRO_W_DATA_VAL_SEL_FIFO(void *handle, LSM6DSL_ACC_GYRO_DATA_VAL_SEL_FIFO_t newValue);
cparata	0:485458fca2bd	1666	status_t LSM6DSL_ACC_GYRO_R_DATA_VAL_SEL_FIFO(void handle, LSM6DSL_ACC_GYRO_DATA_VAL_SEL_FIFO_t value);
cparata	0:485458fca2bd	1667
cparata	0:485458fca2bd	1668	/*******************************************************************************
cparata	0:485458fca2bd	1669	* Register : MASTER_CONFIG
cparata	0:485458fca2bd	1670	* Address : 0X1A
cparata	0:485458fca2bd	1671	* Bit Group Name: DRDY_ON_INT1
cparata	0:485458fca2bd	1672	* Permission : RW
cparata	0:485458fca2bd	1673	*******************************************************************************/
cparata	0:485458fca2bd	1674	typedef enum {
cparata	0:485458fca2bd	1675	LSM6DSL_ACC_GYRO_DRDY_ON_INT1_DISABLED =0x00,
cparata	0:485458fca2bd	1676	LSM6DSL_ACC_GYRO_DRDY_ON_INT1_ENABLED =0x80,
cparata	0:485458fca2bd	1677	} LSM6DSL_ACC_GYRO_DRDY_ON_INT1_t;
cparata	0:485458fca2bd	1678
cparata	0:485458fca2bd	1679	#define LSM6DSL_ACC_GYRO_DRDY_ON_INT1_MASK 0x80
cparata	0:485458fca2bd	1680	status_t LSM6DSL_ACC_GYRO_W_DRDY_ON_INT1(void *handle, LSM6DSL_ACC_GYRO_DRDY_ON_INT1_t newValue);
cparata	0:485458fca2bd	1681	status_t LSM6DSL_ACC_GYRO_R_DRDY_ON_INT1(void handle, LSM6DSL_ACC_GYRO_DRDY_ON_INT1_t value);
cparata	0:485458fca2bd	1682
cparata	0:485458fca2bd	1683	/*******************************************************************************
cparata	0:485458fca2bd	1684	* Register : WAKE_UP_SRC
cparata	0:485458fca2bd	1685	* Address : 0X1B
cparata	0:485458fca2bd	1686	* Bit Group Name: Z_WU
cparata	0:485458fca2bd	1687	* Permission : RO
cparata	0:485458fca2bd	1688	*******************************************************************************/
cparata	0:485458fca2bd	1689	typedef enum {
cparata	0:485458fca2bd	1690	LSM6DSL_ACC_GYRO_Z_WU_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1691	LSM6DSL_ACC_GYRO_Z_WU_DETECTED =0x01,
cparata	0:485458fca2bd	1692	} LSM6DSL_ACC_GYRO_Z_WU_t;
cparata	0:485458fca2bd	1693
cparata	0:485458fca2bd	1694	#define LSM6DSL_ACC_GYRO_Z_WU_MASK 0x01
cparata	0:485458fca2bd	1695	status_t LSM6DSL_ACC_GYRO_R_Z_WU(void handle, LSM6DSL_ACC_GYRO_Z_WU_t value);
cparata	0:485458fca2bd	1696
cparata	0:485458fca2bd	1697	/*******************************************************************************
cparata	0:485458fca2bd	1698	* Register : WAKE_UP_SRC
cparata	0:485458fca2bd	1699	* Address : 0X1B
cparata	0:485458fca2bd	1700	* Bit Group Name: Y_WU
cparata	0:485458fca2bd	1701	* Permission : RO
cparata	0:485458fca2bd	1702	*******************************************************************************/
cparata	0:485458fca2bd	1703	typedef enum {
cparata	0:485458fca2bd	1704	LSM6DSL_ACC_GYRO_Y_WU_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1705	LSM6DSL_ACC_GYRO_Y_WU_DETECTED =0x02,
cparata	0:485458fca2bd	1706	} LSM6DSL_ACC_GYRO_Y_WU_t;
cparata	0:485458fca2bd	1707
cparata	0:485458fca2bd	1708	#define LSM6DSL_ACC_GYRO_Y_WU_MASK 0x02
cparata	0:485458fca2bd	1709	status_t LSM6DSL_ACC_GYRO_R_Y_WU(void handle, LSM6DSL_ACC_GYRO_Y_WU_t value);
cparata	0:485458fca2bd	1710
cparata	0:485458fca2bd	1711	/*******************************************************************************
cparata	0:485458fca2bd	1712	* Register : WAKE_UP_SRC
cparata	0:485458fca2bd	1713	* Address : 0X1B
cparata	0:485458fca2bd	1714	* Bit Group Name: X_WU
cparata	0:485458fca2bd	1715	* Permission : RO
cparata	0:485458fca2bd	1716	*******************************************************************************/
cparata	0:485458fca2bd	1717	typedef enum {
cparata	0:485458fca2bd	1718	LSM6DSL_ACC_GYRO_X_WU_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1719	LSM6DSL_ACC_GYRO_X_WU_DETECTED =0x04,
cparata	0:485458fca2bd	1720	} LSM6DSL_ACC_GYRO_X_WU_t;
cparata	0:485458fca2bd	1721
cparata	0:485458fca2bd	1722	#define LSM6DSL_ACC_GYRO_X_WU_MASK 0x04
cparata	0:485458fca2bd	1723	status_t LSM6DSL_ACC_GYRO_R_X_WU(void handle, LSM6DSL_ACC_GYRO_X_WU_t value);
cparata	0:485458fca2bd	1724
cparata	0:485458fca2bd	1725	/*******************************************************************************
cparata	0:485458fca2bd	1726	* Register : WAKE_UP_SRC
cparata	0:485458fca2bd	1727	* Address : 0X1B
cparata	0:485458fca2bd	1728	* Bit Group Name: WU_EV_STATUS
cparata	0:485458fca2bd	1729	* Permission : RO
cparata	0:485458fca2bd	1730	*******************************************************************************/
cparata	0:485458fca2bd	1731	typedef enum {
cparata	0:485458fca2bd	1732	LSM6DSL_ACC_GYRO_WU_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1733	LSM6DSL_ACC_GYRO_WU_EV_STATUS_DETECTED =0x08,
cparata	0:485458fca2bd	1734	} LSM6DSL_ACC_GYRO_WU_EV_STATUS_t;
cparata	0:485458fca2bd	1735
cparata	0:485458fca2bd	1736	#define LSM6DSL_ACC_GYRO_WU_EV_STATUS_MASK 0x08
cparata	0:485458fca2bd	1737	status_t LSM6DSL_ACC_GYRO_R_WU_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_WU_EV_STATUS_t value);
cparata	0:485458fca2bd	1738
cparata	0:485458fca2bd	1739	/*******************************************************************************
cparata	0:485458fca2bd	1740	* Register : WAKE_UP_SRC
cparata	0:485458fca2bd	1741	* Address : 0X1B
cparata	0:485458fca2bd	1742	* Bit Group Name: SLEEP_EV_STATUS
cparata	0:485458fca2bd	1743	* Permission : RO
cparata	0:485458fca2bd	1744	*******************************************************************************/
cparata	0:485458fca2bd	1745	typedef enum {
cparata	0:485458fca2bd	1746	LSM6DSL_ACC_GYRO_SLEEP_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1747	LSM6DSL_ACC_GYRO_SLEEP_EV_STATUS_DETECTED =0x10,
cparata	0:485458fca2bd	1748	} LSM6DSL_ACC_GYRO_SLEEP_EV_STATUS_t;
cparata	0:485458fca2bd	1749
cparata	0:485458fca2bd	1750	#define LSM6DSL_ACC_GYRO_SLEEP_EV_STATUS_MASK 0x10
cparata	0:485458fca2bd	1751	status_t LSM6DSL_ACC_GYRO_R_SLEEP_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_SLEEP_EV_STATUS_t value);
cparata	0:485458fca2bd	1752
cparata	0:485458fca2bd	1753	/*******************************************************************************
cparata	0:485458fca2bd	1754	* Register : WAKE_UP_SRC
cparata	0:485458fca2bd	1755	* Address : 0X1B
cparata	0:485458fca2bd	1756	* Bit Group Name: FF_EV_STATUS
cparata	0:485458fca2bd	1757	* Permission : RO
cparata	0:485458fca2bd	1758	*******************************************************************************/
cparata	0:485458fca2bd	1759	typedef enum {
cparata	0:485458fca2bd	1760	LSM6DSL_ACC_GYRO_FF_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1761	LSM6DSL_ACC_GYRO_FF_EV_STATUS_DETECTED =0x20,
cparata	0:485458fca2bd	1762	} LSM6DSL_ACC_GYRO_FF_EV_STATUS_t;
cparata	0:485458fca2bd	1763
cparata	0:485458fca2bd	1764	#define LSM6DSL_ACC_GYRO_FF_EV_STATUS_MASK 0x20
cparata	0:485458fca2bd	1765	status_t LSM6DSL_ACC_GYRO_R_FF_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_FF_EV_STATUS_t value);
cparata	0:485458fca2bd	1766
cparata	0:485458fca2bd	1767	/*******************************************************************************
cparata	0:485458fca2bd	1768	* Register : TAP_SRC
cparata	0:485458fca2bd	1769	* Address : 0X1C
cparata	0:485458fca2bd	1770	* Bit Group Name: Z_TAP
cparata	0:485458fca2bd	1771	* Permission : RO
cparata	0:485458fca2bd	1772	*******************************************************************************/
cparata	0:485458fca2bd	1773	typedef enum {
cparata	0:485458fca2bd	1774	LSM6DSL_ACC_GYRO_Z_TAP_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1775	LSM6DSL_ACC_GYRO_Z_TAP_DETECTED =0x01,
cparata	0:485458fca2bd	1776	} LSM6DSL_ACC_GYRO_Z_TAP_t;
cparata	0:485458fca2bd	1777
cparata	0:485458fca2bd	1778	#define LSM6DSL_ACC_GYRO_Z_TAP_MASK 0x01
cparata	0:485458fca2bd	1779	status_t LSM6DSL_ACC_GYRO_R_Z_TAP(void handle, LSM6DSL_ACC_GYRO_Z_TAP_t value);
cparata	0:485458fca2bd	1780
cparata	0:485458fca2bd	1781	/*******************************************************************************
cparata	0:485458fca2bd	1782	* Register : TAP_SRC
cparata	0:485458fca2bd	1783	* Address : 0X1C
cparata	0:485458fca2bd	1784	* Bit Group Name: Y_TAP
cparata	0:485458fca2bd	1785	* Permission : RO
cparata	0:485458fca2bd	1786	*******************************************************************************/
cparata	0:485458fca2bd	1787	typedef enum {
cparata	0:485458fca2bd	1788	LSM6DSL_ACC_GYRO_Y_TAP_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1789	LSM6DSL_ACC_GYRO_Y_TAP_DETECTED =0x02,
cparata	0:485458fca2bd	1790	} LSM6DSL_ACC_GYRO_Y_TAP_t;
cparata	0:485458fca2bd	1791
cparata	0:485458fca2bd	1792	#define LSM6DSL_ACC_GYRO_Y_TAP_MASK 0x02
cparata	0:485458fca2bd	1793	status_t LSM6DSL_ACC_GYRO_R_Y_TAP(void handle, LSM6DSL_ACC_GYRO_Y_TAP_t value);
cparata	0:485458fca2bd	1794
cparata	0:485458fca2bd	1795	/*******************************************************************************
cparata	0:485458fca2bd	1796	* Register : TAP_SRC
cparata	0:485458fca2bd	1797	* Address : 0X1C
cparata	0:485458fca2bd	1798	* Bit Group Name: X_TAP
cparata	0:485458fca2bd	1799	* Permission : RO
cparata	0:485458fca2bd	1800	*******************************************************************************/
cparata	0:485458fca2bd	1801	typedef enum {
cparata	0:485458fca2bd	1802	LSM6DSL_ACC_GYRO_X_TAP_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1803	LSM6DSL_ACC_GYRO_X_TAP_DETECTED =0x04,
cparata	0:485458fca2bd	1804	} LSM6DSL_ACC_GYRO_X_TAP_t;
cparata	0:485458fca2bd	1805
cparata	0:485458fca2bd	1806	#define LSM6DSL_ACC_GYRO_X_TAP_MASK 0x04
cparata	0:485458fca2bd	1807	status_t LSM6DSL_ACC_GYRO_R_X_TAP(void handle, LSM6DSL_ACC_GYRO_X_TAP_t value);
cparata	0:485458fca2bd	1808
cparata	0:485458fca2bd	1809	/*******************************************************************************
cparata	0:485458fca2bd	1810	* Register : TAP_SRC
cparata	0:485458fca2bd	1811	* Address : 0X1C
cparata	0:485458fca2bd	1812	* Bit Group Name: TAP_SIGN
cparata	0:485458fca2bd	1813	* Permission : RO
cparata	0:485458fca2bd	1814	*******************************************************************************/
cparata	0:485458fca2bd	1815	typedef enum {
cparata	0:485458fca2bd	1816	LSM6DSL_ACC_GYRO_TAP_SIGN_POS_SIGN =0x00,
cparata	0:485458fca2bd	1817	LSM6DSL_ACC_GYRO_TAP_SIGN_NEG_SIGN =0x08,
cparata	0:485458fca2bd	1818	} LSM6DSL_ACC_GYRO_TAP_SIGN_t;
cparata	0:485458fca2bd	1819
cparata	0:485458fca2bd	1820	#define LSM6DSL_ACC_GYRO_TAP_SIGN_MASK 0x08
cparata	0:485458fca2bd	1821	status_t LSM6DSL_ACC_GYRO_R_TAP_SIGN(void handle, LSM6DSL_ACC_GYRO_TAP_SIGN_t value);
cparata	0:485458fca2bd	1822
cparata	0:485458fca2bd	1823	/*******************************************************************************
cparata	0:485458fca2bd	1824	* Register : TAP_SRC
cparata	0:485458fca2bd	1825	* Address : 0X1C
cparata	0:485458fca2bd	1826	* Bit Group Name: DOUBLE_TAP_EV_STATUS
cparata	0:485458fca2bd	1827	* Permission : RO
cparata	0:485458fca2bd	1828	*******************************************************************************/
cparata	0:485458fca2bd	1829	typedef enum {
cparata	0:485458fca2bd	1830	LSM6DSL_ACC_GYRO_DOUBLE_TAP_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1831	LSM6DSL_ACC_GYRO_DOUBLE_TAP_EV_STATUS_DETECTED =0x10,
cparata	0:485458fca2bd	1832	} LSM6DSL_ACC_GYRO_DOUBLE_TAP_EV_STATUS_t;
cparata	0:485458fca2bd	1833
cparata	0:485458fca2bd	1834	#define LSM6DSL_ACC_GYRO_DOUBLE_TAP_EV_STATUS_MASK 0x10
cparata	0:485458fca2bd	1835	status_t LSM6DSL_ACC_GYRO_R_DOUBLE_TAP_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_DOUBLE_TAP_EV_STATUS_t value);
cparata	0:485458fca2bd	1836
cparata	0:485458fca2bd	1837	/*******************************************************************************
cparata	0:485458fca2bd	1838	* Register : TAP_SRC
cparata	0:485458fca2bd	1839	* Address : 0X1C
cparata	0:485458fca2bd	1840	* Bit Group Name: SINGLE_TAP_EV_STATUS
cparata	0:485458fca2bd	1841	* Permission : RO
cparata	0:485458fca2bd	1842	*******************************************************************************/
cparata	0:485458fca2bd	1843	typedef enum {
cparata	0:485458fca2bd	1844	LSM6DSL_ACC_GYRO_SINGLE_TAP_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1845	LSM6DSL_ACC_GYRO_SINGLE_TAP_EV_STATUS_DETECTED =0x20,
cparata	0:485458fca2bd	1846	} LSM6DSL_ACC_GYRO_SINGLE_TAP_EV_STATUS_t;
cparata	0:485458fca2bd	1847
cparata	0:485458fca2bd	1848	#define LSM6DSL_ACC_GYRO_SINGLE_TAP_EV_STATUS_MASK 0x20
cparata	0:485458fca2bd	1849	status_t LSM6DSL_ACC_GYRO_R_SINGLE_TAP_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_SINGLE_TAP_EV_STATUS_t value);
cparata	0:485458fca2bd	1850
cparata	0:485458fca2bd	1851	/*******************************************************************************
cparata	0:485458fca2bd	1852	* Register : TAP_SRC
cparata	0:485458fca2bd	1853	* Address : 0X1C
cparata	0:485458fca2bd	1854	* Bit Group Name: TAP_EV_STATUS
cparata	0:485458fca2bd	1855	* Permission : RO
cparata	0:485458fca2bd	1856	*******************************************************************************/
cparata	0:485458fca2bd	1857	typedef enum {
cparata	0:485458fca2bd	1858	LSM6DSL_ACC_GYRO_TAP_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1859	LSM6DSL_ACC_GYRO_TAP_EV_STATUS_DETECTED =0x40,
cparata	0:485458fca2bd	1860	} LSM6DSL_ACC_GYRO_TAP_EV_STATUS_t;
cparata	0:485458fca2bd	1861
cparata	0:485458fca2bd	1862	#define LSM6DSL_ACC_GYRO_TAP_EV_STATUS_MASK 0x40
cparata	0:485458fca2bd	1863	status_t LSM6DSL_ACC_GYRO_R_TAP_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_TAP_EV_STATUS_t value);
cparata	0:485458fca2bd	1864
cparata	0:485458fca2bd	1865	/*******************************************************************************
cparata	0:485458fca2bd	1866	* Register : D6D_SRC
cparata	0:485458fca2bd	1867	* Address : 0X1D
cparata	0:485458fca2bd	1868	* Bit Group Name: DSD_XL
cparata	0:485458fca2bd	1869	* Permission : RO
cparata	0:485458fca2bd	1870	*******************************************************************************/
cparata	0:485458fca2bd	1871	typedef enum {
cparata	0:485458fca2bd	1872	LSM6DSL_ACC_GYRO_DSD_XL_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1873	LSM6DSL_ACC_GYRO_DSD_XL_DETECTED =0x01,
cparata	0:485458fca2bd	1874	} LSM6DSL_ACC_GYRO_DSD_XL_t;
cparata	0:485458fca2bd	1875
cparata	0:485458fca2bd	1876	#define LSM6DSL_ACC_GYRO_DSD_XL_MASK 0x01
cparata	0:485458fca2bd	1877	status_t LSM6DSL_ACC_GYRO_R_DSD_XL(void handle, LSM6DSL_ACC_GYRO_DSD_XL_t value);
cparata	0:485458fca2bd	1878
cparata	0:485458fca2bd	1879	/*******************************************************************************
cparata	0:485458fca2bd	1880	* Register : D6D_SRC
cparata	0:485458fca2bd	1881	* Address : 0X1D
cparata	0:485458fca2bd	1882	* Bit Group Name: DSD_XH
cparata	0:485458fca2bd	1883	* Permission : RO
cparata	0:485458fca2bd	1884	*******************************************************************************/
cparata	0:485458fca2bd	1885	typedef enum {
cparata	0:485458fca2bd	1886	LSM6DSL_ACC_GYRO_DSD_XH_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1887	LSM6DSL_ACC_GYRO_DSD_XH_DETECTED =0x02,
cparata	0:485458fca2bd	1888	} LSM6DSL_ACC_GYRO_DSD_XH_t;
cparata	0:485458fca2bd	1889
cparata	0:485458fca2bd	1890	#define LSM6DSL_ACC_GYRO_DSD_XH_MASK 0x02
cparata	0:485458fca2bd	1891	status_t LSM6DSL_ACC_GYRO_R_DSD_XH(void handle, LSM6DSL_ACC_GYRO_DSD_XH_t value);
cparata	0:485458fca2bd	1892
cparata	0:485458fca2bd	1893	/*******************************************************************************
cparata	0:485458fca2bd	1894	* Register : D6D_SRC
cparata	0:485458fca2bd	1895	* Address : 0X1D
cparata	0:485458fca2bd	1896	* Bit Group Name: DSD_YL
cparata	0:485458fca2bd	1897	* Permission : RO
cparata	0:485458fca2bd	1898	*******************************************************************************/
cparata	0:485458fca2bd	1899	typedef enum {
cparata	0:485458fca2bd	1900	LSM6DSL_ACC_GYRO_DSD_YL_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1901	LSM6DSL_ACC_GYRO_DSD_YL_DETECTED =0x04,
cparata	0:485458fca2bd	1902	} LSM6DSL_ACC_GYRO_DSD_YL_t;
cparata	0:485458fca2bd	1903
cparata	0:485458fca2bd	1904	#define LSM6DSL_ACC_GYRO_DSD_YL_MASK 0x04
cparata	0:485458fca2bd	1905	status_t LSM6DSL_ACC_GYRO_R_DSD_YL(void handle, LSM6DSL_ACC_GYRO_DSD_YL_t value);
cparata	0:485458fca2bd	1906
cparata	0:485458fca2bd	1907	/*******************************************************************************
cparata	0:485458fca2bd	1908	* Register : D6D_SRC
cparata	0:485458fca2bd	1909	* Address : 0X1D
cparata	0:485458fca2bd	1910	* Bit Group Name: DSD_YH
cparata	0:485458fca2bd	1911	* Permission : RO
cparata	0:485458fca2bd	1912	*******************************************************************************/
cparata	0:485458fca2bd	1913	typedef enum {
cparata	0:485458fca2bd	1914	LSM6DSL_ACC_GYRO_DSD_YH_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1915	LSM6DSL_ACC_GYRO_DSD_YH_DETECTED =0x08,
cparata	0:485458fca2bd	1916	} LSM6DSL_ACC_GYRO_DSD_YH_t;
cparata	0:485458fca2bd	1917
cparata	0:485458fca2bd	1918	#define LSM6DSL_ACC_GYRO_DSD_YH_MASK 0x08
cparata	0:485458fca2bd	1919	status_t LSM6DSL_ACC_GYRO_R_DSD_YH(void handle, LSM6DSL_ACC_GYRO_DSD_YH_t value);
cparata	0:485458fca2bd	1920
cparata	0:485458fca2bd	1921	/*******************************************************************************
cparata	0:485458fca2bd	1922	* Register : D6D_SRC
cparata	0:485458fca2bd	1923	* Address : 0X1D
cparata	0:485458fca2bd	1924	* Bit Group Name: DSD_ZL
cparata	0:485458fca2bd	1925	* Permission : RO
cparata	0:485458fca2bd	1926	*******************************************************************************/
cparata	0:485458fca2bd	1927	typedef enum {
cparata	0:485458fca2bd	1928	LSM6DSL_ACC_GYRO_DSD_ZL_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1929	LSM6DSL_ACC_GYRO_DSD_ZL_DETECTED =0x10,
cparata	0:485458fca2bd	1930	} LSM6DSL_ACC_GYRO_DSD_ZL_t;
cparata	0:485458fca2bd	1931
cparata	0:485458fca2bd	1932	#define LSM6DSL_ACC_GYRO_DSD_ZL_MASK 0x10
cparata	0:485458fca2bd	1933	status_t LSM6DSL_ACC_GYRO_R_DSD_ZL(void handle, LSM6DSL_ACC_GYRO_DSD_ZL_t value);
cparata	0:485458fca2bd	1934
cparata	0:485458fca2bd	1935	/*******************************************************************************
cparata	0:485458fca2bd	1936	* Register : D6D_SRC
cparata	0:485458fca2bd	1937	* Address : 0X1D
cparata	0:485458fca2bd	1938	* Bit Group Name: DSD_ZH
cparata	0:485458fca2bd	1939	* Permission : RO
cparata	0:485458fca2bd	1940	*******************************************************************************/
cparata	0:485458fca2bd	1941	typedef enum {
cparata	0:485458fca2bd	1942	LSM6DSL_ACC_GYRO_DSD_ZH_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1943	LSM6DSL_ACC_GYRO_DSD_ZH_DETECTED =0x20,
cparata	0:485458fca2bd	1944	} LSM6DSL_ACC_GYRO_DSD_ZH_t;
cparata	0:485458fca2bd	1945
cparata	0:485458fca2bd	1946	#define LSM6DSL_ACC_GYRO_DSD_ZH_MASK 0x20
cparata	0:485458fca2bd	1947	status_t LSM6DSL_ACC_GYRO_R_DSD_ZH(void handle, LSM6DSL_ACC_GYRO_DSD_ZH_t value);
cparata	0:485458fca2bd	1948
cparata	0:485458fca2bd	1949	/*******************************************************************************
cparata	0:485458fca2bd	1950	* Register : D6D_SRC
cparata	0:485458fca2bd	1951	* Address : 0X1D
cparata	0:485458fca2bd	1952	* Bit Group Name: D6D_EV_STATUS
cparata	0:485458fca2bd	1953	* Permission : RO
cparata	0:485458fca2bd	1954	*******************************************************************************/
cparata	0:485458fca2bd	1955	typedef enum {
cparata	0:485458fca2bd	1956	LSM6DSL_ACC_GYRO_D6D_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	1957	LSM6DSL_ACC_GYRO_D6D_EV_STATUS_DETECTED =0x40,
cparata	0:485458fca2bd	1958	} LSM6DSL_ACC_GYRO_D6D_EV_STATUS_t;
cparata	0:485458fca2bd	1959
cparata	0:485458fca2bd	1960	#define LSM6DSL_ACC_GYRO_D6D_EV_STATUS_MASK 0x40
cparata	0:485458fca2bd	1961	status_t LSM6DSL_ACC_GYRO_R_D6D_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_D6D_EV_STATUS_t value);
cparata	0:485458fca2bd	1962
cparata	0:485458fca2bd	1963	/*******************************************************************************
cparata	0:485458fca2bd	1964	* Register : STATUS_REG
cparata	0:485458fca2bd	1965	* Address : 0X1E
cparata	0:485458fca2bd	1966	* Bit Group Name: XLDA
cparata	0:485458fca2bd	1967	* Permission : RO
cparata	0:485458fca2bd	1968	*******************************************************************************/
cparata	0:485458fca2bd	1969	typedef enum {
cparata	0:485458fca2bd	1970	LSM6DSL_ACC_GYRO_XLDA_NO_DATA_AVAIL =0x00,
cparata	0:485458fca2bd	1971	LSM6DSL_ACC_GYRO_XLDA_DATA_AVAIL =0x01,
cparata	0:485458fca2bd	1972	} LSM6DSL_ACC_GYRO_XLDA_t;
cparata	0:485458fca2bd	1973
cparata	0:485458fca2bd	1974	#define LSM6DSL_ACC_GYRO_XLDA_MASK 0x01
cparata	0:485458fca2bd	1975	status_t LSM6DSL_ACC_GYRO_R_XLDA(void handle, LSM6DSL_ACC_GYRO_XLDA_t value);
cparata	0:485458fca2bd	1976
cparata	0:485458fca2bd	1977	/*******************************************************************************
cparata	0:485458fca2bd	1978	* Register : STATUS_REG
cparata	0:485458fca2bd	1979	* Address : 0X1E
cparata	0:485458fca2bd	1980	* Bit Group Name: GDA
cparata	0:485458fca2bd	1981	* Permission : RO
cparata	0:485458fca2bd	1982	*******************************************************************************/
cparata	0:485458fca2bd	1983	typedef enum {
cparata	0:485458fca2bd	1984	LSM6DSL_ACC_GYRO_GDA_NO_DATA_AVAIL =0x00,
cparata	0:485458fca2bd	1985	LSM6DSL_ACC_GYRO_GDA_DATA_AVAIL =0x02,
cparata	0:485458fca2bd	1986	} LSM6DSL_ACC_GYRO_GDA_t;
cparata	0:485458fca2bd	1987
cparata	0:485458fca2bd	1988	#define LSM6DSL_ACC_GYRO_GDA_MASK 0x02
cparata	0:485458fca2bd	1989	status_t LSM6DSL_ACC_GYRO_R_GDA(void handle, LSM6DSL_ACC_GYRO_GDA_t value);
cparata	0:485458fca2bd	1990
cparata	0:485458fca2bd	1991	/*******************************************************************************
cparata	0:485458fca2bd	1992	* Register : STATUS_REG
cparata	0:485458fca2bd	1993	* Address : 0X1E
cparata	0:485458fca2bd	1994	* Bit Group Name: TDA
cparata	0:485458fca2bd	1995	* Permission : RO
cparata	0:485458fca2bd	1996	*******************************************************************************/
cparata	0:485458fca2bd	1997	typedef enum {
cparata	0:485458fca2bd	1998	LSM6DSL_ACC_GYRO_TDA_NO_DATA_AVAIL =0x00,
cparata	0:485458fca2bd	1999	LSM6DSL_ACC_GYRO_TDA_DATA_AVAIL =0x04,
cparata	0:485458fca2bd	2000	} LSM6DSL_ACC_GYRO_TDA_t;
cparata	0:485458fca2bd	2001
cparata	0:485458fca2bd	2002	#define LSM6DSL_ACC_GYRO_TDA_MASK 0x04
cparata	0:485458fca2bd	2003	status_t LSM6DSL_ACC_GYRO_R_TDA(void handle, LSM6DSL_ACC_GYRO_TDA_t value);
cparata	0:485458fca2bd	2004
cparata	0:485458fca2bd	2005	/*******************************************************************************
cparata	0:485458fca2bd	2006	* Register : FIFO_STATUS1
cparata	0:485458fca2bd	2007	* Address : 0X3A
cparata	0:485458fca2bd	2008	* Bit Group Name: DIFF_FIFO
cparata	0:485458fca2bd	2009	* Permission : RO
cparata	0:485458fca2bd	2010	*******************************************************************************/
cparata	0:485458fca2bd	2011	#define LSM6DSL_ACC_GYRO_DIFF_FIFO_STATUS1_MASK 0xFF
cparata	0:485458fca2bd	2012	#define LSM6DSL_ACC_GYRO_DIFF_FIFO_STATUS1_POSITION 0
cparata	0:485458fca2bd	2013	#define LSM6DSL_ACC_GYRO_DIFF_FIFO_STATUS2_MASK 0xF
cparata	0:485458fca2bd	2014	#define LSM6DSL_ACC_GYRO_DIFF_FIFO_STATUS2_POSITION 0
cparata	0:485458fca2bd	2015	status_t LSM6DSL_ACC_GYRO_R_FIFONumOfEntries(void handle, u16_t value);
cparata	0:485458fca2bd	2016
cparata	0:485458fca2bd	2017	/*******************************************************************************
cparata	0:485458fca2bd	2018	* Register : FIFO_STATUS2
cparata	0:485458fca2bd	2019	* Address : 0X3B
cparata	0:485458fca2bd	2020	* Bit Group Name: FIFO_EMPTY
cparata	0:485458fca2bd	2021	* Permission : RO
cparata	0:485458fca2bd	2022	*******************************************************************************/
cparata	0:485458fca2bd	2023	typedef enum {
cparata	0:485458fca2bd	2024	LSM6DSL_ACC_GYRO_FIFO_EMPTY_FIFO_NOT_EMPTY =0x00,
cparata	0:485458fca2bd	2025	LSM6DSL_ACC_GYRO_FIFO_EMPTY_FIFO_EMPTY =0x10,
cparata	0:485458fca2bd	2026	} LSM6DSL_ACC_GYRO_FIFO_EMPTY_t;
cparata	0:485458fca2bd	2027
cparata	0:485458fca2bd	2028	#define LSM6DSL_ACC_GYRO_FIFO_EMPTY_MASK 0x10
cparata	0:485458fca2bd	2029	status_t LSM6DSL_ACC_GYRO_R_FIFOEmpty(void handle, LSM6DSL_ACC_GYRO_FIFO_EMPTY_t value);
cparata	0:485458fca2bd	2030
cparata	0:485458fca2bd	2031	/*******************************************************************************
cparata	0:485458fca2bd	2032	* Register : FIFO_STATUS2
cparata	0:485458fca2bd	2033	* Address : 0X3B
cparata	0:485458fca2bd	2034	* Bit Group Name: FIFO_FULL
cparata	0:485458fca2bd	2035	* Permission : RO
cparata	0:485458fca2bd	2036	*******************************************************************************/
cparata	0:485458fca2bd	2037	typedef enum {
cparata	0:485458fca2bd	2038	LSM6DSL_ACC_GYRO_FIFO_FULL_FIFO_NOT_FULL =0x00,
cparata	0:485458fca2bd	2039	LSM6DSL_ACC_GYRO_FIFO_FULL_FIFO_FULL =0x20,
cparata	0:485458fca2bd	2040	} LSM6DSL_ACC_GYRO_FIFO_FULL_t;
cparata	0:485458fca2bd	2041
cparata	0:485458fca2bd	2042	#define LSM6DSL_ACC_GYRO_FIFO_FULL_MASK 0x20
cparata	0:485458fca2bd	2043	status_t LSM6DSL_ACC_GYRO_R_FIFOFull(void handle, LSM6DSL_ACC_GYRO_FIFO_FULL_t value);
cparata	0:485458fca2bd	2044
cparata	0:485458fca2bd	2045	/*******************************************************************************
cparata	0:485458fca2bd	2046	* Register : FIFO_STATUS2
cparata	0:485458fca2bd	2047	* Address : 0X3B
cparata	0:485458fca2bd	2048	* Bit Group Name: OVERRUN
cparata	0:485458fca2bd	2049	* Permission : RO
cparata	0:485458fca2bd	2050	*******************************************************************************/
cparata	0:485458fca2bd	2051	typedef enum {
cparata	0:485458fca2bd	2052	LSM6DSL_ACC_GYRO_OVERRUN_NO_OVERRUN =0x00,
cparata	0:485458fca2bd	2053	LSM6DSL_ACC_GYRO_OVERRUN_OVERRUN =0x40,
cparata	0:485458fca2bd	2054	} LSM6DSL_ACC_GYRO_OVERRUN_t;
cparata	0:485458fca2bd	2055
cparata	0:485458fca2bd	2056	#define LSM6DSL_ACC_GYRO_OVERRUN_MASK 0x40
cparata	0:485458fca2bd	2057	status_t LSM6DSL_ACC_GYRO_R_OVERRUN(void handle, LSM6DSL_ACC_GYRO_OVERRUN_t value);
cparata	0:485458fca2bd	2058
cparata	0:485458fca2bd	2059	/*******************************************************************************
cparata	0:485458fca2bd	2060	* Register : FIFO_STATUS2
cparata	0:485458fca2bd	2061	* Address : 0X3B
cparata	0:485458fca2bd	2062	* Bit Group Name: WTM
cparata	0:485458fca2bd	2063	* Permission : RO
cparata	0:485458fca2bd	2064	*******************************************************************************/
cparata	0:485458fca2bd	2065	typedef enum {
cparata	0:485458fca2bd	2066	LSM6DSL_ACC_GYRO_WTM_BELOW_WTM =0x00,
cparata	0:485458fca2bd	2067	LSM6DSL_ACC_GYRO_WTM_ABOVE_OR_EQUAL_WTM =0x80,
cparata	0:485458fca2bd	2068	} LSM6DSL_ACC_GYRO_WTM_t;
cparata	0:485458fca2bd	2069
cparata	0:485458fca2bd	2070	#define LSM6DSL_ACC_GYRO_WTM_MASK 0x80
cparata	0:485458fca2bd	2071	status_t LSM6DSL_ACC_GYRO_R_WaterMark(void handle, LSM6DSL_ACC_GYRO_WTM_t value);
cparata	0:485458fca2bd	2072
cparata	0:485458fca2bd	2073	/*******************************************************************************
cparata	0:485458fca2bd	2074	* Register : FIFO_STATUS3
cparata	0:485458fca2bd	2075	* Address : 0X3C
cparata	0:485458fca2bd	2076	* Bit Group Name: FIFO_PATTERN
cparata	0:485458fca2bd	2077	* Permission : RO
cparata	0:485458fca2bd	2078	*******************************************************************************/
cparata	0:485458fca2bd	2079	#define LSM6DSL_ACC_GYRO_FIFO_STATUS3_PATTERN_MASK 0xFF
cparata	0:485458fca2bd	2080	#define LSM6DSL_ACC_GYRO_FIFO_STATUS3_PATTERN_POSITION 0
cparata	0:485458fca2bd	2081	#define LSM6DSL_ACC_GYRO_FIFO_STATUS4_PATTERN_MASK 0x03
cparata	0:485458fca2bd	2082	#define LSM6DSL_ACC_GYRO_FIFO_STATUS4_PATTERN_POSITION 0
cparata	0:485458fca2bd	2083	status_t LSM6DSL_ACC_GYRO_R_FIFOPattern(void handle, u16_t value);
cparata	0:485458fca2bd	2084
cparata	0:485458fca2bd	2085	/*******************************************************************************
cparata	0:485458fca2bd	2086	* Register : FUNC_SRC
cparata	0:485458fca2bd	2087	* Address : 0X53
cparata	0:485458fca2bd	2088	* Bit Group Name: SENS_HUB_END
cparata	0:485458fca2bd	2089	* Permission : RO
cparata	0:485458fca2bd	2090	*******************************************************************************/
cparata	0:485458fca2bd	2091	typedef enum {
cparata	0:485458fca2bd	2092	LSM6DSL_ACC_GYRO_SENS_HUB_END_STILL_ONGOING =0x00,
cparata	0:485458fca2bd	2093	LSM6DSL_ACC_GYRO_SENS_HUB_END_OP_COMPLETED =0x01,
cparata	0:485458fca2bd	2094	} LSM6DSL_ACC_GYRO_SENS_HUB_END_t;
cparata	0:485458fca2bd	2095
cparata	0:485458fca2bd	2096	#define LSM6DSL_ACC_GYRO_SENS_HUB_END_MASK 0x01
cparata	0:485458fca2bd	2097	status_t LSM6DSL_ACC_GYRO_R_SENS_HUB_END(void handle, LSM6DSL_ACC_GYRO_SENS_HUB_END_t value);
cparata	0:485458fca2bd	2098
cparata	0:485458fca2bd	2099	/*******************************************************************************
cparata	0:485458fca2bd	2100	* Register : FUNC_SRC
cparata	0:485458fca2bd	2101	* Address : 0X53
cparata	0:485458fca2bd	2102	* Bit Group Name: SOFT_IRON_END
cparata	0:485458fca2bd	2103	* Permission : RO
cparata	0:485458fca2bd	2104	*******************************************************************************/
cparata	0:485458fca2bd	2105	typedef enum {
cparata	0:485458fca2bd	2106	LSM6DSL_ACC_GYRO_SOFT_IRON_END_NOT_COMPLETED =0x00,
cparata	0:485458fca2bd	2107	LSM6DSL_ACC_GYRO_SOFT_IRON_END_COMPLETED =0x02,
cparata	0:485458fca2bd	2108	} LSM6DSL_ACC_GYRO_SOFT_IRON_END_t;
cparata	0:485458fca2bd	2109
cparata	0:485458fca2bd	2110	#define LSM6DSL_ACC_GYRO_SOFT_IRON_END_MASK 0x02
cparata	0:485458fca2bd	2111	status_t LSM6DSL_ACC_GYRO_R_SOFT_IRON_END(void handle, LSM6DSL_ACC_GYRO_SOFT_IRON_END_t value);
cparata	0:485458fca2bd	2112
cparata	0:485458fca2bd	2113	/*******************************************************************************
cparata	0:485458fca2bd	2114	* Register : FUNC_SRC
cparata	0:485458fca2bd	2115	* Address : 0X53
cparata	0:485458fca2bd	2116	* Bit Group Name: HI_FAIL
cparata	0:485458fca2bd	2117	* Permission : RO
cparata	0:485458fca2bd	2118	*******************************************************************************/
cparata	0:485458fca2bd	2119	typedef enum {
cparata	0:485458fca2bd	2120	LSM6DSL_ACC_GYRO_HARD_IRON_NORMAL =0x00,
cparata	0:485458fca2bd	2121	LSM6DSL_ACC_GYRO_HARD_IRON_FAIL =0x04,
cparata	0:485458fca2bd	2122	} LSM6DSL_ACC_GYRO_SOFT_HARD_IRON_STAT_t;
cparata	0:485458fca2bd	2123
cparata	0:485458fca2bd	2124	#define LSM6DSL_ACC_GYRO_HARD_IRON_STAT_MASK 0x04
cparata	0:485458fca2bd	2125	status_t LSM6DSL_ACC_GYRO_R_HardIron(void handle, LSM6DSL_ACC_GYRO_SOFT_HARD_IRON_STAT_t value);
cparata	0:485458fca2bd	2126
cparata	0:485458fca2bd	2127	/*******************************************************************************
cparata	0:485458fca2bd	2128	* Register : FUNC_SRC
cparata	0:485458fca2bd	2129	* Address : 0X53
cparata	0:485458fca2bd	2130	* Bit Group Name: STEP_OVERFLOW
cparata	0:485458fca2bd	2131	* Permission : RO
cparata	0:485458fca2bd	2132	*******************************************************************************/
cparata	0:485458fca2bd	2133	typedef enum {
cparata	0:485458fca2bd	2134	LSM6DSL_ACC_GYRO_PEDO_STEP_IN_RANGE =0x00,
cparata	0:485458fca2bd	2135	LSM6DSL_ACC_GYRO_PEDO_ESTEP_OVERFLOW =0x08,
cparata	0:485458fca2bd	2136	} LSM6DSL_ACC_GYRO_STEP_OVERFLOW_t;
cparata	0:485458fca2bd	2137
cparata	0:485458fca2bd	2138	#define LSM6DSL_ACC_GYRO_STEP_OVERFLOW_MASK 0x08
cparata	0:485458fca2bd	2139	status_t LSM6DSL_ACC_GYRO_R_STEP_OVERFLOW(void handle, LSM6DSL_ACC_GYRO_STEP_OVERFLOW_t value);
cparata	0:485458fca2bd	2140
cparata	0:485458fca2bd	2141	/*******************************************************************************
cparata	0:485458fca2bd	2142	* Register : FUNC_SRC
cparata	0:485458fca2bd	2143	* Address : 0X53
cparata	0:485458fca2bd	2144	* Bit Group Name: PEDO_EV_STATUS
cparata	0:485458fca2bd	2145	* Permission : RO
cparata	0:485458fca2bd	2146	*******************************************************************************/
cparata	0:485458fca2bd	2147	typedef enum {
cparata	0:485458fca2bd	2148	LSM6DSL_ACC_GYRO_PEDO_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	2149	LSM6DSL_ACC_GYRO_PEDO_EV_STATUS_DETECTED =0x10,
cparata	0:485458fca2bd	2150	} LSM6DSL_ACC_GYRO_PEDO_EV_STATUS_t;
cparata	0:485458fca2bd	2151
cparata	0:485458fca2bd	2152	#define LSM6DSL_ACC_GYRO_PEDO_EV_STATUS_MASK 0x10
cparata	0:485458fca2bd	2153	status_t LSM6DSL_ACC_GYRO_R_PEDO_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_PEDO_EV_STATUS_t value);
cparata	0:485458fca2bd	2154
cparata	0:485458fca2bd	2155	/*******************************************************************************
cparata	0:485458fca2bd	2156	* Register : FUNC_SRC
cparata	0:485458fca2bd	2157	* Address : 0X53
cparata	0:485458fca2bd	2158	* Bit Group Name: TILT_EV_STATUS
cparata	0:485458fca2bd	2159	* Permission : RO
cparata	0:485458fca2bd	2160	*******************************************************************************/
cparata	0:485458fca2bd	2161	typedef enum {
cparata	0:485458fca2bd	2162	LSM6DSL_ACC_GYRO_TILT_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	2163	LSM6DSL_ACC_GYRO_TILT_EV_STATUS_DETECTED =0x20,
cparata	0:485458fca2bd	2164	} LSM6DSL_ACC_GYRO_TILT_EV_STATUS_t;
cparata	0:485458fca2bd	2165
cparata	0:485458fca2bd	2166	#define LSM6DSL_ACC_GYRO_TILT_EV_STATUS_MASK 0x20
cparata	0:485458fca2bd	2167	status_t LSM6DSL_ACC_GYRO_R_TILT_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_TILT_EV_STATUS_t value);
cparata	0:485458fca2bd	2168
cparata	0:485458fca2bd	2169	/*******************************************************************************
cparata	0:485458fca2bd	2170	* Register : FUNC_SRC
cparata	0:485458fca2bd	2171	* Address : 0X53
cparata	0:485458fca2bd	2172	* Bit Group Name: SIGN_MOT_EV_STATUS
cparata	0:485458fca2bd	2173	* Permission : RO
cparata	0:485458fca2bd	2174	*******************************************************************************/
cparata	0:485458fca2bd	2175	typedef enum {
cparata	0:485458fca2bd	2176	LSM6DSL_ACC_GYRO_SIGN_MOT_EV_STATUS_NOT_DETECTED =0x00,
cparata	0:485458fca2bd	2177	LSM6DSL_ACC_GYRO_SIGN_MOT_EV_STATUS_DETECTED =0x40,
cparata	0:485458fca2bd	2178	} LSM6DSL_ACC_GYRO_SIGN_MOT_EV_STATUS_t;
cparata	0:485458fca2bd	2179
cparata	0:485458fca2bd	2180	#define LSM6DSL_ACC_GYRO_SIGN_MOT_EV_STATUS_MASK 0x40
cparata	0:485458fca2bd	2181	status_t LSM6DSL_ACC_GYRO_R_SIGN_MOT_EV_STATUS(void handle, LSM6DSL_ACC_GYRO_SIGN_MOT_EV_STATUS_t value);
cparata	0:485458fca2bd	2182
cparata	0:485458fca2bd	2183	/*******************************************************************************
cparata	0:485458fca2bd	2184	* Register : FUNC_SRC
cparata	0:485458fca2bd	2185	* Address : 0X53
cparata	0:485458fca2bd	2186	* Bit Group Name: STEP_COUNT_DELTA_IA
cparata	0:485458fca2bd	2187	* Permission : RO
cparata	0:485458fca2bd	2188	*******************************************************************************/
cparata	0:485458fca2bd	2189	typedef enum {
cparata	0:485458fca2bd	2190	LSM6DSL_ACC_GYRO_NO_STEP_COUNT_IN_DELTA =0x00,
cparata	0:485458fca2bd	2191	LSM6DSL_ACC_GYRO_STEP_COUNT_IN_DELTA =0x80,
cparata	0:485458fca2bd	2192	} LSM6DSL_ACC_GYRO_STEP_COUNT_DELTA_t;
cparata	0:485458fca2bd	2193
cparata	0:485458fca2bd	2194	#define LSM6DSL_ACC_GYRO_STEP_COUNT_DELTA_MASK 0x80
cparata	0:485458fca2bd	2195	status_t LSM6DSL_ACC_GYRO_R_STEP_COUNT_DELTA(void handle, LSM6DSL_ACC_GYRO_STEP_COUNT_DELTA_t value);
cparata	0:485458fca2bd	2196
cparata	0:485458fca2bd	2197	/*******************************************************************************
cparata	0:485458fca2bd	2198	* Register : TAP_CFG1
cparata	0:485458fca2bd	2199	* Address : 0X58
cparata	0:485458fca2bd	2200	* Bit Group Name: LIR
cparata	0:485458fca2bd	2201	* Permission : RW
cparata	0:485458fca2bd	2202	*******************************************************************************/
cparata	0:485458fca2bd	2203	typedef enum {
cparata	0:485458fca2bd	2204	LSM6DSL_ACC_GYRO_LIR_DISABLED =0x00,
cparata	0:485458fca2bd	2205	LSM6DSL_ACC_GYRO_LIR_ENABLED =0x01,
cparata	0:485458fca2bd	2206	} LSM6DSL_ACC_GYRO_LIR_t;
cparata	0:485458fca2bd	2207
cparata	0:485458fca2bd	2208	#define LSM6DSL_ACC_GYRO_LIR_MASK 0x01
cparata	0:485458fca2bd	2209	status_t LSM6DSL_ACC_GYRO_W_LIR(void *handle, LSM6DSL_ACC_GYRO_LIR_t newValue);
cparata	0:485458fca2bd	2210	status_t LSM6DSL_ACC_GYRO_R_LIR(void handle, LSM6DSL_ACC_GYRO_LIR_t value);
cparata	0:485458fca2bd	2211
cparata	0:485458fca2bd	2212	/*******************************************************************************
cparata	0:485458fca2bd	2213	* Register : TAP_CFG1
cparata	0:485458fca2bd	2214	* Address : 0X58
cparata	0:485458fca2bd	2215	* Bit Group Name: TAP_Z_EN
cparata	0:485458fca2bd	2216	* Permission : RW
cparata	0:485458fca2bd	2217	*******************************************************************************/
cparata	0:485458fca2bd	2218	typedef enum {
cparata	0:485458fca2bd	2219	LSM6DSL_ACC_GYRO_TAP_Z_EN_DISABLED =0x00,
cparata	0:485458fca2bd	2220	LSM6DSL_ACC_GYRO_TAP_Z_EN_ENABLED =0x02,
cparata	0:485458fca2bd	2221	} LSM6DSL_ACC_GYRO_TAP_Z_EN_t;
cparata	0:485458fca2bd	2222
cparata	0:485458fca2bd	2223	#define LSM6DSL_ACC_GYRO_TAP_Z_EN_MASK 0x02
cparata	0:485458fca2bd	2224	status_t LSM6DSL_ACC_GYRO_W_TAP_Z_EN(void *handle, LSM6DSL_ACC_GYRO_TAP_Z_EN_t newValue);
cparata	0:485458fca2bd	2225	status_t LSM6DSL_ACC_GYRO_R_TAP_Z_EN(void handle, LSM6DSL_ACC_GYRO_TAP_Z_EN_t value);
cparata	0:485458fca2bd	2226
cparata	0:485458fca2bd	2227	/*******************************************************************************
cparata	0:485458fca2bd	2228	* Register : TAP_CFG1
cparata	0:485458fca2bd	2229	* Address : 0X58
cparata	0:485458fca2bd	2230	* Bit Group Name: TAP_Y_EN
cparata	0:485458fca2bd	2231	* Permission : RW
cparata	0:485458fca2bd	2232	*******************************************************************************/
cparata	0:485458fca2bd	2233	typedef enum {
cparata	0:485458fca2bd	2234	LSM6DSL_ACC_GYRO_TAP_Y_EN_DISABLED =0x00,
cparata	0:485458fca2bd	2235	LSM6DSL_ACC_GYRO_TAP_Y_EN_ENABLED =0x04,
cparata	0:485458fca2bd	2236	} LSM6DSL_ACC_GYRO_TAP_Y_EN_t;
cparata	0:485458fca2bd	2237
cparata	0:485458fca2bd	2238	#define LSM6DSL_ACC_GYRO_TAP_Y_EN_MASK 0x04
cparata	0:485458fca2bd	2239	status_t LSM6DSL_ACC_GYRO_W_TAP_Y_EN(void *handle, LSM6DSL_ACC_GYRO_TAP_Y_EN_t newValue);
cparata	0:485458fca2bd	2240	status_t LSM6DSL_ACC_GYRO_R_TAP_Y_EN(void handle, LSM6DSL_ACC_GYRO_TAP_Y_EN_t value);
cparata	0:485458fca2bd	2241
cparata	0:485458fca2bd	2242	/*******************************************************************************
cparata	0:485458fca2bd	2243	* Register : TAP_CFG1
cparata	0:485458fca2bd	2244	* Address : 0X58
cparata	0:485458fca2bd	2245	* Bit Group Name: TAP_X_EN
cparata	0:485458fca2bd	2246	* Permission : RW
cparata	0:485458fca2bd	2247	*******************************************************************************/
cparata	0:485458fca2bd	2248	typedef enum {
cparata	0:485458fca2bd	2249	LSM6DSL_ACC_GYRO_TAP_X_EN_DISABLED =0x00,
cparata	0:485458fca2bd	2250	LSM6DSL_ACC_GYRO_TAP_X_EN_ENABLED =0x08,
cparata	0:485458fca2bd	2251	} LSM6DSL_ACC_GYRO_TAP_X_EN_t;
cparata	0:485458fca2bd	2252
cparata	0:485458fca2bd	2253	#define LSM6DSL_ACC_GYRO_TAP_X_EN_MASK 0x08
cparata	0:485458fca2bd	2254	status_t LSM6DSL_ACC_GYRO_W_TAP_X_EN(void *handle, LSM6DSL_ACC_GYRO_TAP_X_EN_t newValue);
cparata	0:485458fca2bd	2255	status_t LSM6DSL_ACC_GYRO_R_TAP_X_EN(void handle, LSM6DSL_ACC_GYRO_TAP_X_EN_t value);
cparata	0:485458fca2bd	2256	/*******************************************************************************
cparata	0:485458fca2bd	2257	* Register : TAP_CFG1
cparata	0:485458fca2bd	2258	* Address : 0X58
cparata	0:485458fca2bd	2259	* Bit Group Name: SLOPE_FDS
cparata	0:485458fca2bd	2260	* Permission : RW
cparata	0:485458fca2bd	2261	*******************************************************************************/
cparata	0:485458fca2bd	2262	typedef enum {
cparata	0:485458fca2bd	2263	LSM6DSL_ACC_GYRO_SLOPE_FDS_DISABLED =0x00,
cparata	0:485458fca2bd	2264	LSM6DSL_ACC_GYRO_SLOPE_FDS_ENABLED =0x10,
cparata	0:485458fca2bd	2265	} LSM6DSL_ACC_GYRO_SLOPE_FDS_t;
cparata	0:485458fca2bd	2266
cparata	0:485458fca2bd	2267	#define LSM6DSL_ACC_GYRO_SLOPE_FDS_MASK 0x10
cparata	0:485458fca2bd	2268	status_t LSM6DSL_ACC_GYRO_W_SLOPE_FDS(void *handle, LSM6DSL_ACC_GYRO_SLOPE_FDS_t newValue);
cparata	0:485458fca2bd	2269	status_t LSM6DSL_ACC_GYRO_R_SLOPE_FDS(void handle, LSM6DSL_ACC_GYRO_SLOPE_FDS_t value);
cparata	0:485458fca2bd	2270
cparata	0:485458fca2bd	2271	/*******************************************************************************
cparata	0:485458fca2bd	2272	* Register : TAP_CFG1
cparata	0:485458fca2bd	2273	* Address : 0X58
cparata	0:485458fca2bd	2274	* Bit Group Name: INTERRUPTS_ENABLE
cparata	0:485458fca2bd	2275	* Permission : RW
cparata	0:485458fca2bd	2276	*******************************************************************************/
cparata	0:485458fca2bd	2277	typedef enum {
cparata	0:485458fca2bd	2278	LSM6DSL_ACC_GYRO_BASIC_INT_DISABLED =0x00,
cparata	0:485458fca2bd	2279	LSM6DSL_ACC_GYRO_BASIC_INT_ENABLED =0x80,
cparata	0:485458fca2bd	2280	} LSM6DSL_ACC_GYRO_INT_EN_t;
cparata	0:485458fca2bd	2281
cparata	0:485458fca2bd	2282	#define LSM6DSL_ACC_GYRO_INT_EN_MASK 0x80
cparata	0:485458fca2bd	2283	status_t LSM6DSL_ACC_GYRO_W_BASIC_INT(void *handle, LSM6DSL_ACC_GYRO_INT_EN_t newValue);
cparata	0:485458fca2bd	2284	status_t LSM6DSL_ACC_GYRO_R_BASIC_INT(void handle, LSM6DSL_ACC_GYRO_INT_EN_t value);
cparata	0:485458fca2bd	2285
cparata	0:485458fca2bd	2286	/*******************************************************************************
cparata	0:485458fca2bd	2287	* Register : TAP_THS_6D
cparata	0:485458fca2bd	2288	* Address : 0X59
cparata	0:485458fca2bd	2289	* Bit Group Name: TAP_THS
cparata	0:485458fca2bd	2290	* Permission : RW
cparata	0:485458fca2bd	2291	*******************************************************************************/
cparata	0:485458fca2bd	2292	#define LSM6DSL_ACC_GYRO_TAP_THS_MASK 0x1F
cparata	0:485458fca2bd	2293	#define LSM6DSL_ACC_GYRO_TAP_THS_POSITION 0
cparata	0:485458fca2bd	2294	status_t LSM6DSL_ACC_GYRO_W_TAP_THS(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2295	status_t LSM6DSL_ACC_GYRO_R_TAP_THS(void handle, u8_t value);
cparata	0:485458fca2bd	2296
cparata	0:485458fca2bd	2297	/*******************************************************************************
cparata	0:485458fca2bd	2298	* Register : TAP_THS_6D
cparata	0:485458fca2bd	2299	* Address : 0X59
cparata	0:485458fca2bd	2300	* Bit Group Name: SIXD_THS
cparata	0:485458fca2bd	2301	* Permission : RW
cparata	0:485458fca2bd	2302	*******************************************************************************/
cparata	0:485458fca2bd	2303	typedef enum {
cparata	0:485458fca2bd	2304	LSM6DSL_ACC_GYRO_SIXD_THS_80_degree =0x00,
cparata	0:485458fca2bd	2305	LSM6DSL_ACC_GYRO_SIXD_THS_70_degree =0x20,
cparata	0:485458fca2bd	2306	LSM6DSL_ACC_GYRO_SIXD_THS_60_degree =0x40,
cparata	0:485458fca2bd	2307	LSM6DSL_ACC_GYRO_SIXD_THS_50_degree =0x60,
cparata	0:485458fca2bd	2308	} LSM6DSL_ACC_GYRO_SIXD_THS_t;
cparata	0:485458fca2bd	2309
cparata	0:485458fca2bd	2310	#define LSM6DSL_ACC_GYRO_SIXD_THS_MASK 0x60
cparata	0:485458fca2bd	2311	status_t LSM6DSL_ACC_GYRO_W_SIXD_THS(void *handle, LSM6DSL_ACC_GYRO_SIXD_THS_t newValue);
cparata	0:485458fca2bd	2312	status_t LSM6DSL_ACC_GYRO_R_SIXD_THS(void handle, LSM6DSL_ACC_GYRO_SIXD_THS_t value);
cparata	0:485458fca2bd	2313
cparata	0:485458fca2bd	2314	/*******************************************************************************
cparata	0:485458fca2bd	2315	* Register : TAP_THS_6D
cparata	0:485458fca2bd	2316	* Address : 0X59
cparata	0:485458fca2bd	2317	* Bit Group Name: D4D_EN
cparata	0:485458fca2bd	2318	* Permission : RW
cparata	0:485458fca2bd	2319	*******************************************************************************/
cparata	0:485458fca2bd	2320	typedef enum {
cparata	0:485458fca2bd	2321	LSM6DSL_ACC_GYRO_D4D_DIS =0x00,
cparata	0:485458fca2bd	2322	LSM6DSL_ACC_GYRO_D4D_EN =0x80,
cparata	0:485458fca2bd	2323	} LSM6DSL_ACC_GYRO_D4D_t;
cparata	0:485458fca2bd	2324
cparata	0:485458fca2bd	2325	#define LSM6DSL_ACC_GYRO_D4D_MASK 0x80
cparata	0:485458fca2bd	2326	status_t LSM6DSL_ACC_GYRO_W_D4D(void *handle, LSM6DSL_ACC_GYRO_D4D_t newValue);
cparata	0:485458fca2bd	2327	status_t LSM6DSL_ACC_GYRO_R_D4D(void handle, LSM6DSL_ACC_GYRO_D4D_t value);
cparata	0:485458fca2bd	2328
cparata	0:485458fca2bd	2329	/*******************************************************************************
cparata	0:485458fca2bd	2330	* Register : INT_DUR2
cparata	0:485458fca2bd	2331	* Address : 0X5A
cparata	0:485458fca2bd	2332	* Bit Group Name: SHOCK
cparata	0:485458fca2bd	2333	* Permission : RW
cparata	0:485458fca2bd	2334	*******************************************************************************/
cparata	0:485458fca2bd	2335	#define LSM6DSL_ACC_GYRO_SHOCK_MASK 0x03
cparata	0:485458fca2bd	2336	#define LSM6DSL_ACC_GYRO_SHOCK_POSITION 0
cparata	0:485458fca2bd	2337	status_t LSM6DSL_ACC_GYRO_W_SHOCK_Duration(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2338	status_t LSM6DSL_ACC_GYRO_R_SHOCK_Duration(void handle, u8_t value);
cparata	0:485458fca2bd	2339
cparata	0:485458fca2bd	2340	/*******************************************************************************
cparata	0:485458fca2bd	2341	* Register : INT_DUR2
cparata	0:485458fca2bd	2342	* Address : 0X5A
cparata	0:485458fca2bd	2343	* Bit Group Name: QUIET
cparata	0:485458fca2bd	2344	* Permission : RW
cparata	0:485458fca2bd	2345	*******************************************************************************/
cparata	0:485458fca2bd	2346	#define LSM6DSL_ACC_GYRO_QUIET_MASK 0x0C
cparata	0:485458fca2bd	2347	#define LSM6DSL_ACC_GYRO_QUIET_POSITION 2
cparata	0:485458fca2bd	2348	status_t LSM6DSL_ACC_GYRO_W_QUIET_Duration(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2349	status_t LSM6DSL_ACC_GYRO_R_QUIET_Duration(void handle, u8_t value);
cparata	0:485458fca2bd	2350
cparata	0:485458fca2bd	2351	/*******************************************************************************
cparata	0:485458fca2bd	2352	* Register : INT_DUR2
cparata	0:485458fca2bd	2353	* Address : 0X5A
cparata	0:485458fca2bd	2354	* Bit Group Name: DUR
cparata	0:485458fca2bd	2355	* Permission : RW
cparata	0:485458fca2bd	2356	*******************************************************************************/
cparata	0:485458fca2bd	2357	#define LSM6DSL_ACC_GYRO_DUR_MASK 0xF0
cparata	0:485458fca2bd	2358	#define LSM6DSL_ACC_GYRO_DUR_POSITION 4
cparata	0:485458fca2bd	2359	status_t LSM6DSL_ACC_GYRO_W_DUR(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2360	status_t LSM6DSL_ACC_GYRO_R_DUR(void handle, u8_t value);
cparata	0:485458fca2bd	2361
cparata	0:485458fca2bd	2362	/*******************************************************************************
cparata	0:485458fca2bd	2363	* Register : WAKE_UP_THS
cparata	0:485458fca2bd	2364	* Address : 0X5B
cparata	0:485458fca2bd	2365	* Bit Group Name: WK_THS
cparata	0:485458fca2bd	2366	* Permission : RW
cparata	0:485458fca2bd	2367	*******************************************************************************/
cparata	0:485458fca2bd	2368	#define LSM6DSL_ACC_GYRO_WK_THS_MASK 0x3F
cparata	0:485458fca2bd	2369	#define LSM6DSL_ACC_GYRO_WK_THS_POSITION 0
cparata	0:485458fca2bd	2370	status_t LSM6DSL_ACC_GYRO_W_WK_THS(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2371	status_t LSM6DSL_ACC_GYRO_R_WK_THS(void handle, u8_t value);
cparata	0:485458fca2bd	2372
cparata	0:485458fca2bd	2373	/*******************************************************************************
cparata	0:485458fca2bd	2374	* Register : WAKE_UP_THS
cparata	0:485458fca2bd	2375	* Address : 0X5B
cparata	0:485458fca2bd	2376	* Bit Group Name: SINGLE_DOUBLE_TAP
cparata	0:485458fca2bd	2377	* Permission : RW
cparata	0:485458fca2bd	2378	*******************************************************************************/
cparata	0:485458fca2bd	2379	typedef enum {
cparata	0:485458fca2bd	2380	LSM6DSL_ACC_GYRO_SINGLE_DOUBLE_TAP_SINGLE_TAP =0x00,
cparata	0:485458fca2bd	2381	LSM6DSL_ACC_GYRO_SINGLE_DOUBLE_TAP_DOUBLE_TAP =0x80,
cparata	0:485458fca2bd	2382	} LSM6DSL_ACC_GYRO_SINGLE_DOUBLE_TAP_t;
cparata	0:485458fca2bd	2383
cparata	0:485458fca2bd	2384	#define LSM6DSL_ACC_GYRO_SINGLE_DOUBLE_TAP_MASK 0x80
cparata	0:485458fca2bd	2385	status_t LSM6DSL_ACC_GYRO_W_SINGLE_DOUBLE_TAP_EV(void *handle, LSM6DSL_ACC_GYRO_SINGLE_DOUBLE_TAP_t newValue);
cparata	0:485458fca2bd	2386	status_t LSM6DSL_ACC_GYRO_R_SINGLE_DOUBLE_TAP_EV(void handle, LSM6DSL_ACC_GYRO_SINGLE_DOUBLE_TAP_t value);
cparata	0:485458fca2bd	2387
cparata	0:485458fca2bd	2388	/*******************************************************************************
cparata	0:485458fca2bd	2389	* Register : WAKE_UP_DUR
cparata	0:485458fca2bd	2390	* Address : 0X5C
cparata	0:485458fca2bd	2391	* Bit Group Name: SLEEP_DUR
cparata	0:485458fca2bd	2392	* Permission : RW
cparata	0:485458fca2bd	2393	*******************************************************************************/
cparata	0:485458fca2bd	2394	#define LSM6DSL_ACC_GYRO_SLEEP_DUR_MASK 0x0F
cparata	0:485458fca2bd	2395	#define LSM6DSL_ACC_GYRO_SLEEP_DUR_POSITION 0
cparata	0:485458fca2bd	2396	status_t LSM6DSL_ACC_GYRO_W_SLEEP_DUR(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2397	status_t LSM6DSL_ACC_GYRO_R_SLEEP_DUR(void handle, u8_t value);
cparata	0:485458fca2bd	2398
cparata	0:485458fca2bd	2399	/*******************************************************************************
cparata	0:485458fca2bd	2400	* Register : WAKE_UP_DUR
cparata	0:485458fca2bd	2401	* Address : 0X5C
cparata	0:485458fca2bd	2402	* Bit Group Name: TIMER_HR
cparata	0:485458fca2bd	2403	* Permission : RW
cparata	0:485458fca2bd	2404	*******************************************************************************/
cparata	0:485458fca2bd	2405	typedef enum {
cparata	0:485458fca2bd	2406	LSM6DSL_ACC_GYRO_TIMER_HR_6_4ms =0x00,
cparata	0:485458fca2bd	2407	LSM6DSL_ACC_GYRO_TIMER_HR_25us =0x10,
cparata	0:485458fca2bd	2408	} LSM6DSL_ACC_GYRO_TIMER_HR_t;
cparata	0:485458fca2bd	2409
cparata	0:485458fca2bd	2410	#define LSM6DSL_ACC_GYRO_TIMER_HR_MASK 0x10
cparata	0:485458fca2bd	2411	status_t LSM6DSL_ACC_GYRO_W_TIMER_HR(void *handle, LSM6DSL_ACC_GYRO_TIMER_HR_t newValue);
cparata	0:485458fca2bd	2412	status_t LSM6DSL_ACC_GYRO_R_TIMER_HR(void handle, LSM6DSL_ACC_GYRO_TIMER_HR_t value);
cparata	0:485458fca2bd	2413
cparata	0:485458fca2bd	2414	/*******************************************************************************
cparata	0:485458fca2bd	2415	* Register : WAKE_UP_DUR
cparata	0:485458fca2bd	2416	* Address : 0X5C
cparata	0:485458fca2bd	2417	* Bit Group Name: WAKE_DUR
cparata	0:485458fca2bd	2418	* Permission : RW
cparata	0:485458fca2bd	2419	*******************************************************************************/
cparata	0:485458fca2bd	2420	#define LSM6DSL_ACC_GYRO_WAKE_DUR_MASK 0x60
cparata	0:485458fca2bd	2421	#define LSM6DSL_ACC_GYRO_WAKE_DUR_POSITION 5
cparata	0:485458fca2bd	2422	status_t LSM6DSL_ACC_GYRO_W_WAKE_DUR(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2423	status_t LSM6DSL_ACC_GYRO_R_WAKE_DUR(void handle, u8_t value);
cparata	0:485458fca2bd	2424
cparata	0:485458fca2bd	2425	/*******************************************************************************
cparata	0:485458fca2bd	2426	* Register : FREE_FALL
cparata	0:485458fca2bd	2427	* Address : 0X5D
cparata	0:485458fca2bd	2428	* Bit Group Name: FF_DUR
cparata	0:485458fca2bd	2429	* Permission : RW
cparata	0:485458fca2bd	2430	*******************************************************************************/
cparata	0:485458fca2bd	2431	#define LSM6DSL_ACC_GYRO_FF_FREE_FALL_DUR_MASK 0xF8
cparata	0:485458fca2bd	2432	#define LSM6DSL_ACC_GYRO_FF_FREE_FALL_DUR_POSITION 3
cparata	0:485458fca2bd	2433	#define LSM6DSL_ACC_GYRO_FF_WAKE_UP_DUR_MASK 0x80
cparata	0:485458fca2bd	2434	#define LSM6DSL_ACC_GYRO_FF_WAKE_UP_DUR_POSITION 7
cparata	0:485458fca2bd	2435	status_t LSM6DSL_ACC_GYRO_W_FF_Duration(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2436	status_t LSM6DSL_ACC_GYRO_R_FF_Duration(void handle, u8_t value);
cparata	0:485458fca2bd	2437
cparata	0:485458fca2bd	2438
cparata	0:485458fca2bd	2439	/*******************************************************************************
cparata	0:485458fca2bd	2440	* Register : FREE_FALL
cparata	0:485458fca2bd	2441	* Address : 0X5D
cparata	0:485458fca2bd	2442	* Bit Group Name: FF_THS
cparata	0:485458fca2bd	2443	* Permission : RW
cparata	0:485458fca2bd	2444	*******************************************************************************/
cparata	0:485458fca2bd	2445	typedef enum {
cparata	0:485458fca2bd	2446	LSM6DSL_ACC_GYRO_FF_THS_156mg =0x00,
cparata	0:485458fca2bd	2447	LSM6DSL_ACC_GYRO_FF_THS_219mg =0x01,
cparata	0:485458fca2bd	2448	LSM6DSL_ACC_GYRO_FF_THS_250mg =0x02,
cparata	0:485458fca2bd	2449	LSM6DSL_ACC_GYRO_FF_THS_312mg =0x03,
cparata	0:485458fca2bd	2450	LSM6DSL_ACC_GYRO_FF_THS_344mg =0x04,
cparata	0:485458fca2bd	2451	LSM6DSL_ACC_GYRO_FF_THS_406mg =0x05,
cparata	0:485458fca2bd	2452	LSM6DSL_ACC_GYRO_FF_THS_469mg =0x06,
cparata	0:485458fca2bd	2453	LSM6DSL_ACC_GYRO_FF_THS_500mg =0x07,
cparata	0:485458fca2bd	2454	} LSM6DSL_ACC_GYRO_FF_THS_t;
cparata	0:485458fca2bd	2455
cparata	0:485458fca2bd	2456	#define LSM6DSL_ACC_GYRO_FF_THS_MASK 0x07
cparata	0:485458fca2bd	2457	status_t LSM6DSL_ACC_GYRO_W_FF_THS(void *handle, LSM6DSL_ACC_GYRO_FF_THS_t newValue);
cparata	0:485458fca2bd	2458	status_t LSM6DSL_ACC_GYRO_R_FF_THS(void handle, LSM6DSL_ACC_GYRO_FF_THS_t value);
cparata	0:485458fca2bd	2459
cparata	0:485458fca2bd	2460	/*******************************************************************************
cparata	0:485458fca2bd	2461	* Register : MD1_CFG
cparata	0:485458fca2bd	2462	* Address : 0X5E
cparata	0:485458fca2bd	2463	* Bit Group Name: INT1_TIMER
cparata	0:485458fca2bd	2464	* Permission : RW
cparata	0:485458fca2bd	2465	*******************************************************************************/
cparata	0:485458fca2bd	2466	typedef enum {
cparata	0:485458fca2bd	2467	LSM6DSL_ACC_GYRO_INT1_TIMER_DISABLED =0x00,
cparata	0:485458fca2bd	2468	LSM6DSL_ACC_GYRO_INT1_TIMER_ENABLED =0x01,
cparata	0:485458fca2bd	2469	} LSM6DSL_ACC_GYRO_INT1_TIMER_t;
cparata	0:485458fca2bd	2470
cparata	0:485458fca2bd	2471	#define LSM6DSL_ACC_GYRO_INT1_TIMER_MASK 0x01
cparata	0:485458fca2bd	2472	status_t LSM6DSL_ACC_GYRO_W_TimerEvRouteInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_TIMER_t newValue);
cparata	0:485458fca2bd	2473	status_t LSM6DSL_ACC_GYRO_R_TimerEvRouteInt1(void handle, LSM6DSL_ACC_GYRO_INT1_TIMER_t value);
cparata	0:485458fca2bd	2474
cparata	0:485458fca2bd	2475	/*******************************************************************************
cparata	0:485458fca2bd	2476	* Register : MD1_CFG
cparata	0:485458fca2bd	2477	* Address : 0X5E
cparata	0:485458fca2bd	2478	* Bit Group Name: INT1_TILT
cparata	0:485458fca2bd	2479	* Permission : RW
cparata	0:485458fca2bd	2480	*******************************************************************************/
cparata	0:485458fca2bd	2481	typedef enum {
cparata	0:485458fca2bd	2482	LSM6DSL_ACC_GYRO_INT1_TILT_DISABLED =0x00,
cparata	0:485458fca2bd	2483	LSM6DSL_ACC_GYRO_INT1_TILT_ENABLED =0x02,
cparata	0:485458fca2bd	2484	} LSM6DSL_ACC_GYRO_INT1_TILT_t;
cparata	0:485458fca2bd	2485
cparata	0:485458fca2bd	2486	#define LSM6DSL_ACC_GYRO_INT1_TILT_MASK 0x02
cparata	0:485458fca2bd	2487	status_t LSM6DSL_ACC_GYRO_W_TiltEvOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_TILT_t newValue);
cparata	0:485458fca2bd	2488	status_t LSM6DSL_ACC_GYRO_R_TiltEvOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_TILT_t value);
cparata	0:485458fca2bd	2489
cparata	0:485458fca2bd	2490	/*******************************************************************************
cparata	0:485458fca2bd	2491	* Register : MD1_CFG
cparata	0:485458fca2bd	2492	* Address : 0X5E
cparata	0:485458fca2bd	2493	* Bit Group Name: INT1_6D
cparata	0:485458fca2bd	2494	* Permission : RW
cparata	0:485458fca2bd	2495	*******************************************************************************/
cparata	0:485458fca2bd	2496	typedef enum {
cparata	0:485458fca2bd	2497	LSM6DSL_ACC_GYRO_INT1_6D_DISABLED =0x00,
cparata	0:485458fca2bd	2498	LSM6DSL_ACC_GYRO_INT1_6D_ENABLED =0x04,
cparata	0:485458fca2bd	2499	} LSM6DSL_ACC_GYRO_INT1_6D_t;
cparata	0:485458fca2bd	2500
cparata	0:485458fca2bd	2501	#define LSM6DSL_ACC_GYRO_INT1_6D_MASK 0x04
cparata	0:485458fca2bd	2502	status_t LSM6DSL_ACC_GYRO_W_6DEvOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_6D_t newValue);
cparata	0:485458fca2bd	2503	status_t LSM6DSL_ACC_GYRO_R_6DEvOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_6D_t value);
cparata	0:485458fca2bd	2504
cparata	0:485458fca2bd	2505	/*******************************************************************************
cparata	0:485458fca2bd	2506	* Register : MD1_CFG
cparata	0:485458fca2bd	2507	* Address : 0X5E
cparata	0:485458fca2bd	2508	* Bit Group Name: INT1_TAP
cparata	0:485458fca2bd	2509	* Permission : RW
cparata	0:485458fca2bd	2510	*******************************************************************************/
cparata	0:485458fca2bd	2511	typedef enum {
cparata	0:485458fca2bd	2512	LSM6DSL_ACC_GYRO_INT1_TAP_DISABLED =0x00,
cparata	0:485458fca2bd	2513	LSM6DSL_ACC_GYRO_INT1_TAP_ENABLED =0x08,
cparata	0:485458fca2bd	2514	} LSM6DSL_ACC_GYRO_INT1_TAP_t;
cparata	0:485458fca2bd	2515
cparata	0:485458fca2bd	2516	#define LSM6DSL_ACC_GYRO_INT1_TAP_MASK 0x08
cparata	0:485458fca2bd	2517	status_t LSM6DSL_ACC_GYRO_W_TapEvOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_TAP_t newValue);
cparata	0:485458fca2bd	2518	status_t LSM6DSL_ACC_GYRO_R_TapEvOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_TAP_t value);
cparata	0:485458fca2bd	2519
cparata	0:485458fca2bd	2520	/*******************************************************************************
cparata	0:485458fca2bd	2521	* Register : MD1_CFG
cparata	0:485458fca2bd	2522	* Address : 0X5E
cparata	0:485458fca2bd	2523	* Bit Group Name: INT1_FF
cparata	0:485458fca2bd	2524	* Permission : RW
cparata	0:485458fca2bd	2525	*******************************************************************************/
cparata	0:485458fca2bd	2526	typedef enum {
cparata	0:485458fca2bd	2527	LSM6DSL_ACC_GYRO_INT1_FF_DISABLED =0x00,
cparata	0:485458fca2bd	2528	LSM6DSL_ACC_GYRO_INT1_FF_ENABLED =0x10,
cparata	0:485458fca2bd	2529	} LSM6DSL_ACC_GYRO_INT1_FF_t;
cparata	0:485458fca2bd	2530
cparata	0:485458fca2bd	2531	#define LSM6DSL_ACC_GYRO_INT1_FF_MASK 0x10
cparata	0:485458fca2bd	2532	status_t LSM6DSL_ACC_GYRO_W_FFEvOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_FF_t newValue);
cparata	0:485458fca2bd	2533	status_t LSM6DSL_ACC_GYRO_R_FFEvOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_FF_t value);
cparata	0:485458fca2bd	2534
cparata	0:485458fca2bd	2535	/*******************************************************************************
cparata	0:485458fca2bd	2536	* Register : MD1_CFG
cparata	0:485458fca2bd	2537	* Address : 0X5E
cparata	0:485458fca2bd	2538	* Bit Group Name: INT1_WU
cparata	0:485458fca2bd	2539	* Permission : RW
cparata	0:485458fca2bd	2540	*******************************************************************************/
cparata	0:485458fca2bd	2541	typedef enum {
cparata	0:485458fca2bd	2542	LSM6DSL_ACC_GYRO_INT1_WU_DISABLED =0x00,
cparata	0:485458fca2bd	2543	LSM6DSL_ACC_GYRO_INT1_WU_ENABLED =0x20,
cparata	0:485458fca2bd	2544	} LSM6DSL_ACC_GYRO_INT1_WU_t;
cparata	0:485458fca2bd	2545
cparata	0:485458fca2bd	2546	#define LSM6DSL_ACC_GYRO_INT1_WU_MASK 0x20
cparata	0:485458fca2bd	2547	status_t LSM6DSL_ACC_GYRO_W_WUEvOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_WU_t newValue);
cparata	0:485458fca2bd	2548	status_t LSM6DSL_ACC_GYRO_R_WUEvOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_WU_t value);
cparata	0:485458fca2bd	2549
cparata	0:485458fca2bd	2550	/*******************************************************************************
cparata	0:485458fca2bd	2551	* Register : MD1_CFG
cparata	0:485458fca2bd	2552	* Address : 0X5E
cparata	0:485458fca2bd	2553	* Bit Group Name: INT1_SINGLE_TAP
cparata	0:485458fca2bd	2554	* Permission : RW
cparata	0:485458fca2bd	2555	*******************************************************************************/
cparata	0:485458fca2bd	2556	typedef enum {
cparata	0:485458fca2bd	2557	LSM6DSL_ACC_GYRO_INT1_SINGLE_TAP_DISABLED =0x00,
cparata	0:485458fca2bd	2558	LSM6DSL_ACC_GYRO_INT1_SINGLE_TAP_ENABLED =0x40,
cparata	0:485458fca2bd	2559	} LSM6DSL_ACC_GYRO_INT1_SINGLE_TAP_t;
cparata	0:485458fca2bd	2560
cparata	0:485458fca2bd	2561	#define LSM6DSL_ACC_GYRO_INT1_SINGLE_TAP_MASK 0x40
cparata	0:485458fca2bd	2562	status_t LSM6DSL_ACC_GYRO_W_SingleTapOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_SINGLE_TAP_t newValue);
cparata	0:485458fca2bd	2563	status_t LSM6DSL_ACC_GYRO_R_SingleTapOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_SINGLE_TAP_t value);
cparata	0:485458fca2bd	2564
cparata	0:485458fca2bd	2565	/*******************************************************************************
cparata	0:485458fca2bd	2566	* Register : MD1_CFG
cparata	0:485458fca2bd	2567	* Address : 0X5E
cparata	0:485458fca2bd	2568	* Bit Group Name: INT1_INACT_STATE
cparata	0:485458fca2bd	2569	* Permission : RW
cparata	0:485458fca2bd	2570	*******************************************************************************/
cparata	0:485458fca2bd	2571	typedef enum {
cparata	0:485458fca2bd	2572	LSM6DSL_ACC_GYRO_INT1_SLEEP_DISABLED =0x00,
cparata	0:485458fca2bd	2573	LSM6DSL_ACC_GYRO_INT1_SLEEP_ENABLED =0x80,
cparata	0:485458fca2bd	2574	} LSM6DSL_ACC_GYRO_INT1_SLEEP_t;
cparata	0:485458fca2bd	2575
cparata	0:485458fca2bd	2576	#define LSM6DSL_ACC_GYRO_INT1_SLEEP_MASK 0x80
cparata	0:485458fca2bd	2577	status_t LSM6DSL_ACC_GYRO_W_SleepEvOnInt1(void *handle, LSM6DSL_ACC_GYRO_INT1_SLEEP_t newValue);
cparata	0:485458fca2bd	2578	status_t LSM6DSL_ACC_GYRO_R_SleepEvOnInt1(void handle, LSM6DSL_ACC_GYRO_INT1_SLEEP_t value);
cparata	0:485458fca2bd	2579
cparata	0:485458fca2bd	2580	/*******************************************************************************
cparata	0:485458fca2bd	2581	* Register : MD2_CFG
cparata	0:485458fca2bd	2582	* Address : 0X5F
cparata	0:485458fca2bd	2583	* Bit Group Name: INT2_IRON
cparata	0:485458fca2bd	2584	* Permission : RW
cparata	0:485458fca2bd	2585	*******************************************************************************/
cparata	0:485458fca2bd	2586	typedef enum {
cparata	0:485458fca2bd	2587	LSM6DSL_ACC_GYRO_INT2_IRON_DISABLED =0x00,
cparata	0:485458fca2bd	2588	LSM6DSL_ACC_GYRO_INT2_IRON_ENABLED =0x01,
cparata	0:485458fca2bd	2589	} LSM6DSL_ACC_GYRO_INT2_IRON_t;
cparata	0:485458fca2bd	2590
cparata	0:485458fca2bd	2591	#define LSM6DSL_ACC_GYRO_INT2_IRON_MASK 0x01
cparata	0:485458fca2bd	2592	status_t LSM6DSL_ACC_GYRO_W_MagCorrection_Int2(void *handle, LSM6DSL_ACC_GYRO_INT2_IRON_t newValue);
cparata	0:485458fca2bd	2593	status_t LSM6DSL_ACC_GYRO_R_MagCorrection_Int2(void handle, LSM6DSL_ACC_GYRO_INT2_IRON_t value);
cparata	0:485458fca2bd	2594
cparata	0:485458fca2bd	2595	/*******************************************************************************
cparata	0:485458fca2bd	2596	* Register : MD2_CFG
cparata	0:485458fca2bd	2597	* Address : 0X5F
cparata	0:485458fca2bd	2598	* Bit Group Name: INT2_TILT
cparata	0:485458fca2bd	2599	* Permission : RW
cparata	0:485458fca2bd	2600	*******************************************************************************/
cparata	0:485458fca2bd	2601	typedef enum {
cparata	0:485458fca2bd	2602	LSM6DSL_ACC_GYRO_INT2_TILT_DISABLED =0x00,
cparata	0:485458fca2bd	2603	LSM6DSL_ACC_GYRO_INT2_TILT_ENABLED =0x02,
cparata	0:485458fca2bd	2604	} LSM6DSL_ACC_GYRO_INT2_TILT_t;
cparata	0:485458fca2bd	2605
cparata	0:485458fca2bd	2606	#define LSM6DSL_ACC_GYRO_INT2_TILT_MASK 0x02
cparata	0:485458fca2bd	2607	status_t LSM6DSL_ACC_GYRO_W_TiltEvOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_TILT_t newValue);
cparata	0:485458fca2bd	2608	status_t LSM6DSL_ACC_GYRO_R_TiltEvOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_TILT_t value);
cparata	0:485458fca2bd	2609
cparata	0:485458fca2bd	2610	/*******************************************************************************
cparata	0:485458fca2bd	2611	* Register : MD2_CFG
cparata	0:485458fca2bd	2612	* Address : 0X5F
cparata	0:485458fca2bd	2613	* Bit Group Name: INT2_6D
cparata	0:485458fca2bd	2614	* Permission : RW
cparata	0:485458fca2bd	2615	*******************************************************************************/
cparata	0:485458fca2bd	2616	typedef enum {
cparata	0:485458fca2bd	2617	LSM6DSL_ACC_GYRO_INT2_6D_DISABLED =0x00,
cparata	0:485458fca2bd	2618	LSM6DSL_ACC_GYRO_INT2_6D_ENABLED =0x04,
cparata	0:485458fca2bd	2619	} LSM6DSL_ACC_GYRO_INT2_6D_t;
cparata	0:485458fca2bd	2620
cparata	0:485458fca2bd	2621	#define LSM6DSL_ACC_GYRO_INT2_6D_MASK 0x04
cparata	0:485458fca2bd	2622	status_t LSM6DSL_ACC_GYRO_W_6DEvOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_6D_t newValue);
cparata	0:485458fca2bd	2623	status_t LSM6DSL_ACC_GYRO_R_6DEvOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_6D_t value);
cparata	0:485458fca2bd	2624
cparata	0:485458fca2bd	2625	/*******************************************************************************
cparata	0:485458fca2bd	2626	* Register : MD2_CFG
cparata	0:485458fca2bd	2627	* Address : 0X5F
cparata	0:485458fca2bd	2628	* Bit Group Name: INT2_TAP
cparata	0:485458fca2bd	2629	* Permission : RW
cparata	0:485458fca2bd	2630	*******************************************************************************/
cparata	0:485458fca2bd	2631	typedef enum {
cparata	0:485458fca2bd	2632	LSM6DSL_ACC_GYRO_INT2_TAP_DISABLED =0x00,
cparata	0:485458fca2bd	2633	LSM6DSL_ACC_GYRO_INT2_TAP_ENABLED =0x08,
cparata	0:485458fca2bd	2634	} LSM6DSL_ACC_GYRO_INT2_TAP_t;
cparata	0:485458fca2bd	2635
cparata	0:485458fca2bd	2636	#define LSM6DSL_ACC_GYRO_INT2_TAP_MASK 0x08
cparata	0:485458fca2bd	2637	status_t LSM6DSL_ACC_GYRO_W_TapEvOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_TAP_t newValue);
cparata	0:485458fca2bd	2638	status_t LSM6DSL_ACC_GYRO_R_TapEvOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_TAP_t value);
cparata	0:485458fca2bd	2639
cparata	0:485458fca2bd	2640	/*******************************************************************************
cparata	0:485458fca2bd	2641	* Register : MD2_CFG
cparata	0:485458fca2bd	2642	* Address : 0X5F
cparata	0:485458fca2bd	2643	* Bit Group Name: INT2_FF
cparata	0:485458fca2bd	2644	* Permission : RW
cparata	0:485458fca2bd	2645	*******************************************************************************/
cparata	0:485458fca2bd	2646	typedef enum {
cparata	0:485458fca2bd	2647	LSM6DSL_ACC_GYRO_INT2_FF_DISABLED =0x00,
cparata	0:485458fca2bd	2648	LSM6DSL_ACC_GYRO_INT2_FF_ENABLED =0x10,
cparata	0:485458fca2bd	2649	} LSM6DSL_ACC_GYRO_INT2_FF_t;
cparata	0:485458fca2bd	2650
cparata	0:485458fca2bd	2651	#define LSM6DSL_ACC_GYRO_INT2_FF_MASK 0x10
cparata	0:485458fca2bd	2652	status_t LSM6DSL_ACC_GYRO_W_FFEvOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_FF_t newValue);
cparata	0:485458fca2bd	2653	status_t LSM6DSL_ACC_GYRO_R_FFEvOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_FF_t value);
cparata	0:485458fca2bd	2654
cparata	0:485458fca2bd	2655	/*******************************************************************************
cparata	0:485458fca2bd	2656	* Register : MD2_CFG
cparata	0:485458fca2bd	2657	* Address : 0X5F
cparata	0:485458fca2bd	2658	* Bit Group Name: INT2_WU
cparata	0:485458fca2bd	2659	* Permission : RW
cparata	0:485458fca2bd	2660	*******************************************************************************/
cparata	0:485458fca2bd	2661	typedef enum {
cparata	0:485458fca2bd	2662	LSM6DSL_ACC_GYRO_INT2_WU_DISABLED =0x00,
cparata	0:485458fca2bd	2663	LSM6DSL_ACC_GYRO_INT2_WU_ENABLED =0x20,
cparata	0:485458fca2bd	2664	} LSM6DSL_ACC_GYRO_INT2_WU_t;
cparata	0:485458fca2bd	2665
cparata	0:485458fca2bd	2666	#define LSM6DSL_ACC_GYRO_INT2_WU_MASK 0x20
cparata	0:485458fca2bd	2667	status_t LSM6DSL_ACC_GYRO_W_WUEvOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_WU_t newValue);
cparata	0:485458fca2bd	2668	status_t LSM6DSL_ACC_GYRO_R_WUEvOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_WU_t value);
cparata	0:485458fca2bd	2669
cparata	0:485458fca2bd	2670	/*******************************************************************************
cparata	0:485458fca2bd	2671	* Register : MD2_CFG
cparata	0:485458fca2bd	2672	* Address : 0X5F
cparata	0:485458fca2bd	2673	* Bit Group Name: INT2_SINGLE_TAP
cparata	0:485458fca2bd	2674	* Permission : RW
cparata	0:485458fca2bd	2675	*******************************************************************************/
cparata	0:485458fca2bd	2676	typedef enum {
cparata	0:485458fca2bd	2677	LSM6DSL_ACC_GYRO_INT2_SINGLE_TAP_DISABLED =0x00,
cparata	0:485458fca2bd	2678	LSM6DSL_ACC_GYRO_INT2_SINGLE_TAP_ENABLED =0x40,
cparata	0:485458fca2bd	2679	} LSM6DSL_ACC_GYRO_INT2_SINGLE_TAP_t;
cparata	0:485458fca2bd	2680
cparata	0:485458fca2bd	2681	#define LSM6DSL_ACC_GYRO_INT2_SINGLE_TAP_MASK 0x40
cparata	0:485458fca2bd	2682	status_t LSM6DSL_ACC_GYRO_W_SingleTapOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_SINGLE_TAP_t newValue);
cparata	0:485458fca2bd	2683	status_t LSM6DSL_ACC_GYRO_R_SingleTapOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_SINGLE_TAP_t value);
cparata	0:485458fca2bd	2684
cparata	0:485458fca2bd	2685	/*******************************************************************************
cparata	0:485458fca2bd	2686	* Register : MD2_CFG
cparata	0:485458fca2bd	2687	* Address : 0X5F
cparata	0:485458fca2bd	2688	* Bit Group Name: INT2_INACT_STATE
cparata	0:485458fca2bd	2689	* Permission : RW
cparata	0:485458fca2bd	2690	*******************************************************************************/
cparata	0:485458fca2bd	2691	typedef enum {
cparata	0:485458fca2bd	2692	LSM6DSL_ACC_GYRO_INT2_SLEEP_DISABLED =0x00,
cparata	0:485458fca2bd	2693	LSM6DSL_ACC_GYRO_INT2_SLEEP_ENABLED =0x80,
cparata	0:485458fca2bd	2694	} LSM6DSL_ACC_GYRO_INT2_SLEEP_t;
cparata	0:485458fca2bd	2695
cparata	0:485458fca2bd	2696	#define LSM6DSL_ACC_GYRO_INT2_SLEEP_MASK 0x80
cparata	0:485458fca2bd	2697	status_t LSM6DSL_ACC_GYRO_W_SleepEvOnInt2(void *handle, LSM6DSL_ACC_GYRO_INT2_SLEEP_t newValue);
cparata	0:485458fca2bd	2698	status_t LSM6DSL_ACC_GYRO_R_SleepEvOnInt2(void handle, LSM6DSL_ACC_GYRO_INT2_SLEEP_t value);
cparata	0:485458fca2bd	2699
cparata	0:485458fca2bd	2700	/*******************************************************************************
cparata	0:485458fca2bd	2701	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	2702	* Output Type : GetAccData
cparata	0:485458fca2bd	2703	* Permission : RO
cparata	0:485458fca2bd	2704	*******************************************************************************/
cparata	0:485458fca2bd	2705	status_t LSM6DSL_ACC_GYRO_GetRawAccData(void handle, u8_t buff);
cparata	0:485458fca2bd	2706	status_t LSM6DSL_ACC_Get_Acceleration(void handle, int buff, u8_t from_fifo);
cparata	0:485458fca2bd	2707
cparata	0:485458fca2bd	2708	/*******************************************************************************
cparata	0:485458fca2bd	2709	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	2710	* Output Type : GetFIFOData
cparata	0:485458fca2bd	2711	* Permission : RO
cparata	0:485458fca2bd	2712	*******************************************************************************/
cparata	0:485458fca2bd	2713	status_t LSM6DSL_ACC_GYRO_Get_GetFIFOData(void handle, u8_t buff);
cparata	0:485458fca2bd	2714	/*******************************************************************************
cparata	0:485458fca2bd	2715	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	2716	* Output Type : GetTimestamp
cparata	0:485458fca2bd	2717	* Permission : RO
cparata	0:485458fca2bd	2718	*******************************************************************************/
cparata	0:485458fca2bd	2719	status_t LSM6DSL_ACC_GYRO_Get_GetTimestamp(void handle, u8_t buff);
cparata	0:485458fca2bd	2720	/*******************************************************************************
cparata	0:485458fca2bd	2721	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	2722	* Output Type : GetStepCounter
cparata	0:485458fca2bd	2723	* Permission : RO
cparata	0:485458fca2bd	2724	*******************************************************************************/
cparata	0:485458fca2bd	2725	status_t LSM6DSL_ACC_GYRO_Get_GetStepCounter(void handle, u8_t buff);
cparata	0:485458fca2bd	2726
cparata	0:485458fca2bd	2727	/*******************************************************************************
cparata	0:485458fca2bd	2728	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	2729	* Output Type : Pedometer Threshold
cparata	0:485458fca2bd	2730	* Permission : RO
cparata	0:485458fca2bd	2731	*******************************************************************************/
cparata	0:485458fca2bd	2732	status_t LSM6DSL_ACC_GYRO_W_PedoThreshold(void *handle, u8_t newValue);
cparata	0:485458fca2bd	2733
cparata	0:485458fca2bd	2734	/************ Use Sensor Hub *****************/
cparata	0:485458fca2bd	2735
cparata	0:485458fca2bd	2736	/* program to .... */
cparata	0:485458fca2bd	2737	status_t LSM6DSL_ACC_GYRO_SH0_Program(void *handle, u8_t SlvAddr, u8_t Reg, u8_t len);
cparata	0:485458fca2bd	2738
cparata	0:485458fca2bd	2739	/* Program the six Soft Iron Matrix coefficients. */
cparata	0:485458fca2bd	2740	status_t LSM6DSL_ACC_GYRO_SH_init_SI_Matrix(void handle, u8_t SI_matrix);
cparata	0:485458fca2bd	2741
cparata	0:485458fca2bd	2742	/* Read a remote device through I2C Sensor Hub Slave 0 */
cparata	0:485458fca2bd	2743	status_t LSM6DSL_ACC_GYRO_SH0_ReadMem(void handle, u8_t SlvAddr, u8_t Reg, u8_t Bufp, u8_t len, u8_t stop);
cparata	0:485458fca2bd	2744
cparata	0:485458fca2bd	2745	/* Write a remote device through I2C Sensor Hub Slave 0 */
cparata	0:485458fca2bd	2746	status_t LSM6DSL_ACC_GYRO_SH0_WriteByte(void *handle, u8_t SlvAddr, u8_t Reg, u8_t Bufp);
cparata	0:485458fca2bd	2747
cparata	0:485458fca2bd	2748	#ifdef __cplusplus
cparata	0:485458fca2bd	2749	}
cparata	0:485458fca2bd	2750	#endif
cparata	0:485458fca2bd	2751
cparata	0:485458fca2bd	2752	#endif

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	16 Dec 2016
Imports:	440
Forks:	1
Commits:	17
Dependents:	0
Dependencies:	2
Followers:	406

The code in this repository is Apache licensed.

6D Orientation Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

X_NUCLEO_IKS01A2/Components/LSM6DSLSensor/LSM6DSL_ACC_GYRO_driver.h@2:ae74845fa96a, 2016-08-19 (annotated)

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