6DOrientation_IKS01A2 - Example of 6D orientation recognition for LSM6DSL…

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ST / Mbed 2 deprecated 6DOrientation_IKS01A2

Example of 6D orientation recognition for LSM6DSL in X-NUCLEO-IKS01A2

Fork of 6DOrientation_IKS01A2 by ST Expansion SW Team

6D Orientation Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

Main function is to show how to use sensor expansion board to find out the 6D orientation and send data using UART to a connected PC or Desktop and display it on terminal applications like TeraTerm.
After connection has been established:
- the user can rotate the board to change the 6D orientation and then view the data using an hyper terminal.
- the user button can be used to display the current 6D orientation.

X_NUCLEO_IKS01A2/Components/LSM303AGRSensor/LSM303AGR_ACC_driver.h@2:ae74845fa96a, 2016-08-19 (annotated)

Committer:: cparata
Date:: Fri Aug 19 12:23:23 2016 +0000
Revision:: 2:ae74845fa96a
Parent:: 0:485458fca2bd

Add interfaces to all components

Who changed what in which revision?

User	Revision	Line number	New contents of line
cparata	0:485458fca2bd	1	/**
cparata	0:485458fca2bd	2	******************************************************************************
cparata	0:485458fca2bd	3	* @file LSM303AGR_ACC_driver.h
cparata	0:485458fca2bd	4	* @author MEMS Application Team
cparata	0:485458fca2bd	5	* @version V1.1
cparata	0:485458fca2bd	6	* @date 24-February-2016
cparata	0:485458fca2bd	7	* @brief LSM303AGR Accelerometer header driver file
cparata	0:485458fca2bd	8	******************************************************************************
cparata	0:485458fca2bd	9	* @attention
cparata	0:485458fca2bd	10	*
cparata	0:485458fca2bd	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
cparata	0:485458fca2bd	12	*
cparata	0:485458fca2bd	13	* Redistribution and use in source and binary forms, with or without modification,
cparata	0:485458fca2bd	14	* are permitted provided that the following conditions are met:
cparata	0:485458fca2bd	15	* 1. Redistributions of source code must retain the above copyright notice,
cparata	0:485458fca2bd	16	* this list of conditions and the following disclaimer.
cparata	0:485458fca2bd	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
cparata	0:485458fca2bd	18	* this list of conditions and the following disclaimer in the documentation
cparata	0:485458fca2bd	19	* and/or other materials provided with the distribution.
cparata	0:485458fca2bd	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
cparata	0:485458fca2bd	21	* may be used to endorse or promote products derived from this software
cparata	0:485458fca2bd	22	* without specific prior written permission.
cparata	0:485458fca2bd	23	*
cparata	0:485458fca2bd	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata	0:485458fca2bd	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata	0:485458fca2bd	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
cparata	0:485458fca2bd	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
cparata	0:485458fca2bd	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
cparata	0:485458fca2bd	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
cparata	0:485458fca2bd	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
cparata	0:485458fca2bd	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
cparata	0:485458fca2bd	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
cparata	0:485458fca2bd	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
cparata	0:485458fca2bd	34	*
cparata	0:485458fca2bd	35	******************************************************************************
cparata	0:485458fca2bd	36	*/
cparata	0:485458fca2bd	37
cparata	0:485458fca2bd	38	/* Define to prevent recursive inclusion -------------------------------------*/
cparata	0:485458fca2bd	39	#ifndef __LSM303AGR_ACC_DRIVER__H
cparata	0:485458fca2bd	40	#define __LSM303AGR_ACC_DRIVER__H
cparata	0:485458fca2bd	41
cparata	0:485458fca2bd	42	/* Includes ------------------------------------------------------------------*/
cparata	0:485458fca2bd	43	#include <stdint.h>
cparata	0:485458fca2bd	44
cparata	0:485458fca2bd	45	/* Exported types ------------------------------------------------------------*/
cparata	0:485458fca2bd	46
cparata	0:485458fca2bd	47	#ifdef __cplusplus
cparata	0:485458fca2bd	48	extern "C" {
cparata	0:485458fca2bd	49	#endif
cparata	0:485458fca2bd	50
cparata	0:485458fca2bd	51	//these could change accordingly with the architecture
cparata	0:485458fca2bd	52
cparata	0:485458fca2bd	53	#ifndef __ARCHDEP__TYPES
cparata	0:485458fca2bd	54	#define __ARCHDEP__TYPES
cparata	0:485458fca2bd	55
cparata	0:485458fca2bd	56	typedef unsigned char u8_t;
cparata	0:485458fca2bd	57	typedef unsigned short int u16_t;
cparata	0:485458fca2bd	58	typedef unsigned int u32_t;
cparata	0:485458fca2bd	59	typedef int i32_t;
cparata	0:485458fca2bd	60	typedef short int i16_t;
cparata	0:485458fca2bd	61	typedef signed char i8_t;
cparata	0:485458fca2bd	62
cparata	0:485458fca2bd	63	#endif /__ARCHDEP__TYPES/
cparata	0:485458fca2bd	64
cparata	0:485458fca2bd	65	/* Exported common structure --------------------------------------------------------*/
cparata	0:485458fca2bd	66
cparata	0:485458fca2bd	67	#ifndef __SHARED__TYPES
cparata	0:485458fca2bd	68	#define __SHARED__TYPES
cparata	0:485458fca2bd	69
cparata	0:485458fca2bd	70	typedef union{
cparata	0:485458fca2bd	71	i16_t i16bit[3];
cparata	0:485458fca2bd	72	u8_t u8bit[6];
cparata	0:485458fca2bd	73	} Type3Axis16bit_U;
cparata	0:485458fca2bd	74
cparata	0:485458fca2bd	75	typedef union{
cparata	0:485458fca2bd	76	i16_t i16bit;
cparata	0:485458fca2bd	77	u8_t u8bit[2];
cparata	0:485458fca2bd	78	} Type1Axis16bit_U;
cparata	0:485458fca2bd	79
cparata	0:485458fca2bd	80	typedef union{
cparata	0:485458fca2bd	81	i32_t i32bit;
cparata	0:485458fca2bd	82	u8_t u8bit[4];
cparata	0:485458fca2bd	83	} Type1Axis32bit_U;
cparata	0:485458fca2bd	84
cparata	0:485458fca2bd	85	typedef enum {
cparata	0:485458fca2bd	86	MEMS_SUCCESS = 0x01,
cparata	0:485458fca2bd	87	MEMS_ERROR = 0x00
cparata	0:485458fca2bd	88	} status_t;
cparata	0:485458fca2bd	89
cparata	0:485458fca2bd	90	#endif /__SHARED__TYPES/
cparata	0:485458fca2bd	91
cparata	0:485458fca2bd	92	/* Exported macro ------------------------------------------------------------*/
cparata	0:485458fca2bd	93
cparata	0:485458fca2bd	94	/* Exported constants --------------------------------------------------------*/
cparata	0:485458fca2bd	95
cparata	0:485458fca2bd	96	/************ I2C Address ***************/
cparata	0:485458fca2bd	97
cparata	0:485458fca2bd	98	#define LSM303AGR_ACC_I2C_ADDRESS 0x32
cparata	0:485458fca2bd	99
cparata	0:485458fca2bd	100	/************ Who am I *****************/
cparata	0:485458fca2bd	101
cparata	0:485458fca2bd	102	#define LSM303AGR_ACC_WHO_AM_I 0x33
cparata	0:485458fca2bd	103
cparata	0:485458fca2bd	104	/* Private Function Prototype -------------------------------------------------------*/
cparata	0:485458fca2bd	105
cparata	0:485458fca2bd	106	void LSM303AGR_ACC_SwapHighLowByte(u8_t *bufferToSwap, u8_t numberOfByte, u8_t dimension);
cparata	0:485458fca2bd	107
cparata	0:485458fca2bd	108	/* Public Function Prototypes ------------------------------------------------*/
cparata	0:485458fca2bd	109
cparata	0:485458fca2bd	110	status_t LSM303AGR_ACC_ReadReg( void handle, u8_t Reg, u8_t Data );
cparata	0:485458fca2bd	111	status_t LSM303AGR_ACC_WriteReg( void *handle, u8_t Reg, u8_t Data );
cparata	0:485458fca2bd	112
cparata	0:485458fca2bd	113
cparata	0:485458fca2bd	114	/************ Device Register *****************/
cparata	0:485458fca2bd	115	#define LSM303AGR_ACC_STATUS_REG_AUX 0X07
cparata	0:485458fca2bd	116	#define LSM303AGR_ACC_OUT_ADC1_L 0X08
cparata	0:485458fca2bd	117	#define LSM303AGR_ACC_OUT_ADC1_H 0X09
cparata	0:485458fca2bd	118	#define LSM303AGR_ACC_OUT_ADC2_L 0X0A
cparata	0:485458fca2bd	119	#define LSM303AGR_ACC_OUT_ADC2_H 0X0B
cparata	0:485458fca2bd	120	#define LSM303AGR_ACC_OUT_ADC3_L 0X0C
cparata	0:485458fca2bd	121	#define LSM303AGR_ACC_OUT_ADC3_H 0X0D
cparata	0:485458fca2bd	122	#define LSM303AGR_ACC_INT_COUNTER_REG 0X0E
cparata	0:485458fca2bd	123	#define LSM303AGR_ACC_WHO_AM_I_REG 0X0F
cparata	0:485458fca2bd	124	#define LSM303AGR_ACC_TEMP_CFG_REG 0X1F
cparata	0:485458fca2bd	125	#define LSM303AGR_ACC_CTRL_REG1 0X20
cparata	0:485458fca2bd	126	#define LSM303AGR_ACC_CTRL_REG2 0X21
cparata	0:485458fca2bd	127	#define LSM303AGR_ACC_CTRL_REG3 0X22
cparata	0:485458fca2bd	128	#define LSM303AGR_ACC_CTRL_REG4 0X23
cparata	0:485458fca2bd	129	#define LSM303AGR_ACC_CTRL_REG5 0X24
cparata	0:485458fca2bd	130	#define LSM303AGR_ACC_CTRL_REG6 0X25
cparata	0:485458fca2bd	131	#define LSM303AGR_ACC_REFERENCE 0X26
cparata	0:485458fca2bd	132	#define LSM303AGR_ACC_STATUS_REG2 0X27
cparata	0:485458fca2bd	133	#define LSM303AGR_ACC_OUT_X_L 0X28
cparata	0:485458fca2bd	134	#define LSM303AGR_ACC_OUT_X_H 0X29
cparata	0:485458fca2bd	135	#define LSM303AGR_ACC_OUT_Y_L 0X2A
cparata	0:485458fca2bd	136	#define LSM303AGR_ACC_OUT_Y_H 0X2B
cparata	0:485458fca2bd	137	#define LSM303AGR_ACC_OUT_Z_L 0X2C
cparata	0:485458fca2bd	138	#define LSM303AGR_ACC_OUT_Z_H 0X2D
cparata	0:485458fca2bd	139	#define LSM303AGR_ACC_FIFO_CTRL_REG 0X2E
cparata	0:485458fca2bd	140	#define LSM303AGR_ACC_FIFO_SRC_REG 0X2F
cparata	0:485458fca2bd	141	#define LSM303AGR_ACC_INT1_CFG 0X30
cparata	0:485458fca2bd	142	#define LSM303AGR_ACC_INT1_SOURCE 0X31
cparata	0:485458fca2bd	143	#define LSM303AGR_ACC_INT1_THS 0X32
cparata	0:485458fca2bd	144	#define LSM303AGR_ACC_INT1_DURATION 0X33
cparata	0:485458fca2bd	145	#define LSM303AGR_ACC_INT2_CFG 0X34
cparata	0:485458fca2bd	146	#define LSM303AGR_ACC_INT2_SOURCE 0X35
cparata	0:485458fca2bd	147	#define LSM303AGR_ACC_INT2_THS 0X36
cparata	0:485458fca2bd	148	#define LSM303AGR_ACC_INT2_DURATION 0X37
cparata	0:485458fca2bd	149	#define LSM303AGR_ACC_CLICK_CFG 0X38
cparata	0:485458fca2bd	150	#define LSM303AGR_ACC_CLICK_SRC 0X39
cparata	0:485458fca2bd	151	#define LSM303AGR_ACC_CLICK_THS 0X3A
cparata	0:485458fca2bd	152	#define LSM303AGR_ACC_TIME_LIMIT 0X3B
cparata	0:485458fca2bd	153	#define LSM303AGR_ACC_TIME_LATENCY 0X3C
cparata	0:485458fca2bd	154	#define LSM303AGR_ACC_TIME_WINDOW 0X3D
cparata	0:485458fca2bd	155
cparata	0:485458fca2bd	156	/*******************************************************************************
cparata	0:485458fca2bd	157	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	158	* Address : 0X07
cparata	0:485458fca2bd	159	* Bit Group Name: 1DA
cparata	0:485458fca2bd	160	* Permission : RO
cparata	0:485458fca2bd	161	*******************************************************************************/
cparata	0:485458fca2bd	162	typedef enum {
cparata	0:485458fca2bd	163	LSM303AGR_ACC_1DA_NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	164	LSM303AGR_ACC_1DA_AVAILABLE =0x01,
cparata	0:485458fca2bd	165	} LSM303AGR_ACC_1DA_t;
cparata	0:485458fca2bd	166
cparata	0:485458fca2bd	167	#define LSM303AGR_ACC_1DA_MASK 0x01
cparata	0:485458fca2bd	168	status_t LSM303AGR_ACC_R_x_data_avail(void handle, LSM303AGR_ACC_1DA_t value);
cparata	0:485458fca2bd	169
cparata	0:485458fca2bd	170	/*******************************************************************************
cparata	0:485458fca2bd	171	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	172	* Address : 0X07
cparata	0:485458fca2bd	173	* Bit Group Name: 2DA_
cparata	0:485458fca2bd	174	* Permission : RO
cparata	0:485458fca2bd	175	*******************************************************************************/
cparata	0:485458fca2bd	176	typedef enum {
cparata	0:485458fca2bd	177	LSM303AGR_ACC_2DA__NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	178	LSM303AGR_ACC_2DA__AVAILABLE =0x02,
cparata	0:485458fca2bd	179	} LSM303AGR_ACC_2DA__t;
cparata	0:485458fca2bd	180
cparata	0:485458fca2bd	181	#define LSM303AGR_ACC_2DA__MASK 0x02
cparata	0:485458fca2bd	182	status_t LSM303AGR_ACC_R_y_data_avail(void handle, LSM303AGR_ACC_2DA__t value);
cparata	0:485458fca2bd	183
cparata	0:485458fca2bd	184	/*******************************************************************************
cparata	0:485458fca2bd	185	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	186	* Address : 0X07
cparata	0:485458fca2bd	187	* Bit Group Name: 3DA_
cparata	0:485458fca2bd	188	* Permission : RO
cparata	0:485458fca2bd	189	*******************************************************************************/
cparata	0:485458fca2bd	190	typedef enum {
cparata	0:485458fca2bd	191	LSM303AGR_ACC_3DA__NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	192	LSM303AGR_ACC_3DA__AVAILABLE =0x04,
cparata	0:485458fca2bd	193	} LSM303AGR_ACC_3DA__t;
cparata	0:485458fca2bd	194
cparata	0:485458fca2bd	195	#define LSM303AGR_ACC_3DA__MASK 0x04
cparata	0:485458fca2bd	196	status_t LSM303AGR_ACC_R_z_data_avail(void handle, LSM303AGR_ACC_3DA__t value);
cparata	0:485458fca2bd	197
cparata	0:485458fca2bd	198	/*******************************************************************************
cparata	0:485458fca2bd	199	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	200	* Address : 0X07
cparata	0:485458fca2bd	201	* Bit Group Name: 321DA_
cparata	0:485458fca2bd	202	* Permission : RO
cparata	0:485458fca2bd	203	*******************************************************************************/
cparata	0:485458fca2bd	204	typedef enum {
cparata	0:485458fca2bd	205	LSM303AGR_ACC_321DA__NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	206	LSM303AGR_ACC_321DA__AVAILABLE =0x08,
cparata	0:485458fca2bd	207	} LSM303AGR_ACC_321DA__t;
cparata	0:485458fca2bd	208
cparata	0:485458fca2bd	209	#define LSM303AGR_ACC_321DA__MASK 0x08
cparata	0:485458fca2bd	210	status_t LSM303AGR_ACC_R_xyz_data_avail(void handle, LSM303AGR_ACC_321DA__t value);
cparata	0:485458fca2bd	211
cparata	0:485458fca2bd	212	/*******************************************************************************
cparata	0:485458fca2bd	213	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	214	* Address : 0X07
cparata	0:485458fca2bd	215	* Bit Group Name: 1OR_
cparata	0:485458fca2bd	216	* Permission : RO
cparata	0:485458fca2bd	217	*******************************************************************************/
cparata	0:485458fca2bd	218	typedef enum {
cparata	0:485458fca2bd	219	LSM303AGR_ACC_1OR__NO_OVERRUN =0x00,
cparata	0:485458fca2bd	220	LSM303AGR_ACC_1OR__OVERRUN =0x10,
cparata	0:485458fca2bd	221	} LSM303AGR_ACC_1OR__t;
cparata	0:485458fca2bd	222
cparata	0:485458fca2bd	223	#define LSM303AGR_ACC_1OR__MASK 0x10
cparata	0:485458fca2bd	224	status_t LSM303AGR_ACC_R_DataXOverrun(void handle, LSM303AGR_ACC_1OR__t value);
cparata	0:485458fca2bd	225
cparata	0:485458fca2bd	226	/*******************************************************************************
cparata	0:485458fca2bd	227	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	228	* Address : 0X07
cparata	0:485458fca2bd	229	* Bit Group Name: 2OR_
cparata	0:485458fca2bd	230	* Permission : RO
cparata	0:485458fca2bd	231	*******************************************************************************/
cparata	0:485458fca2bd	232	typedef enum {
cparata	0:485458fca2bd	233	LSM303AGR_ACC_2OR__NO_OVERRUN =0x00,
cparata	0:485458fca2bd	234	LSM303AGR_ACC_2OR__OVERRUN =0x20,
cparata	0:485458fca2bd	235	} LSM303AGR_ACC_2OR__t;
cparata	0:485458fca2bd	236
cparata	0:485458fca2bd	237	#define LSM303AGR_ACC_2OR__MASK 0x20
cparata	0:485458fca2bd	238	status_t LSM303AGR_ACC_R_DataYOverrun(void handle, LSM303AGR_ACC_2OR__t value);
cparata	0:485458fca2bd	239
cparata	0:485458fca2bd	240	/*******************************************************************************
cparata	0:485458fca2bd	241	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	242	* Address : 0X07
cparata	0:485458fca2bd	243	* Bit Group Name: 3OR_
cparata	0:485458fca2bd	244	* Permission : RO
cparata	0:485458fca2bd	245	*******************************************************************************/
cparata	0:485458fca2bd	246	typedef enum {
cparata	0:485458fca2bd	247	LSM303AGR_ACC_3OR__NO_OVERRUN =0x00,
cparata	0:485458fca2bd	248	LSM303AGR_ACC_3OR__OVERRUN =0x40,
cparata	0:485458fca2bd	249	} LSM303AGR_ACC_3OR__t;
cparata	0:485458fca2bd	250
cparata	0:485458fca2bd	251	#define LSM303AGR_ACC_3OR__MASK 0x40
cparata	0:485458fca2bd	252	status_t LSM303AGR_ACC_R_DataZOverrun(void handle, LSM303AGR_ACC_3OR__t value);
cparata	0:485458fca2bd	253
cparata	0:485458fca2bd	254	/*******************************************************************************
cparata	0:485458fca2bd	255	* Register : STATUS_REG_AUX
cparata	0:485458fca2bd	256	* Address : 0X07
cparata	0:485458fca2bd	257	* Bit Group Name: 321OR_
cparata	0:485458fca2bd	258	* Permission : RO
cparata	0:485458fca2bd	259	*******************************************************************************/
cparata	0:485458fca2bd	260	typedef enum {
cparata	0:485458fca2bd	261	LSM303AGR_ACC_321OR__NO_OVERRUN =0x00,
cparata	0:485458fca2bd	262	LSM303AGR_ACC_321OR__OVERRUN =0x80,
cparata	0:485458fca2bd	263	} LSM303AGR_ACC_321OR__t;
cparata	0:485458fca2bd	264
cparata	0:485458fca2bd	265	#define LSM303AGR_ACC_321OR__MASK 0x80
cparata	0:485458fca2bd	266	status_t LSM303AGR_ACC_R_DataXYZOverrun(void handle, LSM303AGR_ACC_321OR__t value);
cparata	0:485458fca2bd	267
cparata	0:485458fca2bd	268	/*******************************************************************************
cparata	0:485458fca2bd	269	* Register : INT_COUNTER_REG
cparata	0:485458fca2bd	270	* Address : 0X0E
cparata	0:485458fca2bd	271	* Bit Group Name: IC
cparata	0:485458fca2bd	272	* Permission : RO
cparata	0:485458fca2bd	273	*******************************************************************************/
cparata	0:485458fca2bd	274	#define LSM303AGR_ACC_IC_MASK 0xFF
cparata	0:485458fca2bd	275	#define LSM303AGR_ACC_IC_POSITION 0
cparata	0:485458fca2bd	276	status_t LSM303AGR_ACC_R_int_counter(void handle, u8_t value);
cparata	0:485458fca2bd	277
cparata	0:485458fca2bd	278	/*******************************************************************************
cparata	0:485458fca2bd	279	* Register : WHO_AM_I
cparata	0:485458fca2bd	280	* Address : 0X0F
cparata	0:485458fca2bd	281	* Bit Group Name: WHO_AM_I
cparata	0:485458fca2bd	282	* Permission : RO
cparata	0:485458fca2bd	283	*******************************************************************************/
cparata	0:485458fca2bd	284	#define LSM303AGR_ACC_WHO_AM_I_MASK 0xFF
cparata	0:485458fca2bd	285	#define LSM303AGR_ACC_WHO_AM_I_POSITION 0
cparata	0:485458fca2bd	286	status_t LSM303AGR_ACC_R_WHO_AM_I(void handle, u8_t value);
cparata	0:485458fca2bd	287
cparata	0:485458fca2bd	288	/*******************************************************************************
cparata	0:485458fca2bd	289	* Register : TEMP_CFG_REG
cparata	0:485458fca2bd	290	* Address : 0X1F
cparata	0:485458fca2bd	291	* Bit Group Name: TEMP_EN
cparata	0:485458fca2bd	292	* Permission : RW
cparata	0:485458fca2bd	293	*******************************************************************************/
cparata	0:485458fca2bd	294	typedef enum {
cparata	0:485458fca2bd	295	LSM303AGR_ACC_TEMP_EN_DISABLED =0x00,
cparata	0:485458fca2bd	296	LSM303AGR_ACC_TEMP_EN_ENABLED =0x40,
cparata	0:485458fca2bd	297	} LSM303AGR_ACC_TEMP_EN_t;
cparata	0:485458fca2bd	298
cparata	0:485458fca2bd	299	#define LSM303AGR_ACC_TEMP_EN_MASK 0x40
cparata	0:485458fca2bd	300	status_t LSM303AGR_ACC_W_TEMP_EN_bits(void *handle, LSM303AGR_ACC_TEMP_EN_t newValue);
cparata	0:485458fca2bd	301	status_t LSM303AGR_ACC_R_TEMP_EN_bits(void handle, LSM303AGR_ACC_TEMP_EN_t value);
cparata	0:485458fca2bd	302
cparata	0:485458fca2bd	303	/*******************************************************************************
cparata	0:485458fca2bd	304	* Register : TEMP_CFG_REG
cparata	0:485458fca2bd	305	* Address : 0X1F
cparata	0:485458fca2bd	306	* Bit Group Name: ADC_PD
cparata	0:485458fca2bd	307	* Permission : RW
cparata	0:485458fca2bd	308	*******************************************************************************/
cparata	0:485458fca2bd	309	typedef enum {
cparata	0:485458fca2bd	310	LSM303AGR_ACC_ADC_PD_DISABLED =0x00,
cparata	0:485458fca2bd	311	LSM303AGR_ACC_ADC_PD_ENABLED =0x80,
cparata	0:485458fca2bd	312	} LSM303AGR_ACC_ADC_PD_t;
cparata	0:485458fca2bd	313
cparata	0:485458fca2bd	314	#define LSM303AGR_ACC_ADC_PD_MASK 0x80
cparata	0:485458fca2bd	315	status_t LSM303AGR_ACC_W_ADC_PD(void *handle, LSM303AGR_ACC_ADC_PD_t newValue);
cparata	0:485458fca2bd	316	status_t LSM303AGR_ACC_R_ADC_PD(void handle, LSM303AGR_ACC_ADC_PD_t value);
cparata	0:485458fca2bd	317
cparata	0:485458fca2bd	318	/*******************************************************************************
cparata	0:485458fca2bd	319	* Register : CTRL_REG1
cparata	0:485458fca2bd	320	* Address : 0X20
cparata	0:485458fca2bd	321	* Bit Group Name: XEN
cparata	0:485458fca2bd	322	* Permission : RW
cparata	0:485458fca2bd	323	*******************************************************************************/
cparata	0:485458fca2bd	324	typedef enum {
cparata	0:485458fca2bd	325	LSM303AGR_ACC_XEN_DISABLED =0x00,
cparata	0:485458fca2bd	326	LSM303AGR_ACC_XEN_ENABLED =0x01,
cparata	0:485458fca2bd	327	} LSM303AGR_ACC_XEN_t;
cparata	0:485458fca2bd	328
cparata	0:485458fca2bd	329	#define LSM303AGR_ACC_XEN_MASK 0x01
cparata	0:485458fca2bd	330	status_t LSM303AGR_ACC_W_XEN(void *handle, LSM303AGR_ACC_XEN_t newValue);
cparata	0:485458fca2bd	331	status_t LSM303AGR_ACC_R_XEN(void handle, LSM303AGR_ACC_XEN_t value);
cparata	0:485458fca2bd	332
cparata	0:485458fca2bd	333	/*******************************************************************************
cparata	0:485458fca2bd	334	* Register : CTRL_REG1
cparata	0:485458fca2bd	335	* Address : 0X20
cparata	0:485458fca2bd	336	* Bit Group Name: YEN
cparata	0:485458fca2bd	337	* Permission : RW
cparata	0:485458fca2bd	338	*******************************************************************************/
cparata	0:485458fca2bd	339	typedef enum {
cparata	0:485458fca2bd	340	LSM303AGR_ACC_YEN_DISABLED =0x00,
cparata	0:485458fca2bd	341	LSM303AGR_ACC_YEN_ENABLED =0x02,
cparata	0:485458fca2bd	342	} LSM303AGR_ACC_YEN_t;
cparata	0:485458fca2bd	343
cparata	0:485458fca2bd	344	#define LSM303AGR_ACC_YEN_MASK 0x02
cparata	0:485458fca2bd	345	status_t LSM303AGR_ACC_W_YEN(void *handle, LSM303AGR_ACC_YEN_t newValue);
cparata	0:485458fca2bd	346	status_t LSM303AGR_ACC_R_YEN(void handle, LSM303AGR_ACC_YEN_t value);
cparata	0:485458fca2bd	347
cparata	0:485458fca2bd	348	/*******************************************************************************
cparata	0:485458fca2bd	349	* Register : CTRL_REG1
cparata	0:485458fca2bd	350	* Address : 0X20
cparata	0:485458fca2bd	351	* Bit Group Name: ZEN
cparata	0:485458fca2bd	352	* Permission : RW
cparata	0:485458fca2bd	353	*******************************************************************************/
cparata	0:485458fca2bd	354	typedef enum {
cparata	0:485458fca2bd	355	LSM303AGR_ACC_ZEN_DISABLED =0x00,
cparata	0:485458fca2bd	356	LSM303AGR_ACC_ZEN_ENABLED =0x04,
cparata	0:485458fca2bd	357	} LSM303AGR_ACC_ZEN_t;
cparata	0:485458fca2bd	358
cparata	0:485458fca2bd	359	#define LSM303AGR_ACC_ZEN_MASK 0x04
cparata	0:485458fca2bd	360	status_t LSM303AGR_ACC_W_ZEN(void *handle, LSM303AGR_ACC_ZEN_t newValue);
cparata	0:485458fca2bd	361	status_t LSM303AGR_ACC_R_ZEN(void handle, LSM303AGR_ACC_ZEN_t value);
cparata	0:485458fca2bd	362
cparata	0:485458fca2bd	363	/*******************************************************************************
cparata	0:485458fca2bd	364	* Register : CTRL_REG1
cparata	0:485458fca2bd	365	* Address : 0X20
cparata	0:485458fca2bd	366	* Bit Group Name: LPEN
cparata	0:485458fca2bd	367	* Permission : RW
cparata	0:485458fca2bd	368	*******************************************************************************/
cparata	0:485458fca2bd	369	typedef enum {
cparata	0:485458fca2bd	370	LSM303AGR_ACC_LPEN_DISABLED =0x00,
cparata	0:485458fca2bd	371	LSM303AGR_ACC_LPEN_ENABLED =0x08,
cparata	0:485458fca2bd	372	} LSM303AGR_ACC_LPEN_t;
cparata	0:485458fca2bd	373
cparata	0:485458fca2bd	374	#define LSM303AGR_ACC_LPEN_MASK 0x08
cparata	0:485458fca2bd	375	status_t LSM303AGR_ACC_W_LOWPWR_EN(void *handle, LSM303AGR_ACC_LPEN_t newValue);
cparata	0:485458fca2bd	376	status_t LSM303AGR_ACC_R_LOWPWR_EN(void handle, LSM303AGR_ACC_LPEN_t value);
cparata	0:485458fca2bd	377
cparata	0:485458fca2bd	378	/*******************************************************************************
cparata	0:485458fca2bd	379	* Register : CTRL_REG1
cparata	0:485458fca2bd	380	* Address : 0X20
cparata	0:485458fca2bd	381	* Bit Group Name: ODR
cparata	0:485458fca2bd	382	* Permission : RW
cparata	0:485458fca2bd	383	*******************************************************************************/
cparata	0:485458fca2bd	384	typedef enum {
cparata	0:485458fca2bd	385	LSM303AGR_ACC_ODR_DO_PWR_DOWN =0x00,
cparata	0:485458fca2bd	386	LSM303AGR_ACC_ODR_DO_1Hz =0x10,
cparata	0:485458fca2bd	387	LSM303AGR_ACC_ODR_DO_10Hz =0x20,
cparata	0:485458fca2bd	388	LSM303AGR_ACC_ODR_DO_25Hz =0x30,
cparata	0:485458fca2bd	389	LSM303AGR_ACC_ODR_DO_50Hz =0x40,
cparata	0:485458fca2bd	390	LSM303AGR_ACC_ODR_DO_100Hz =0x50,
cparata	0:485458fca2bd	391	LSM303AGR_ACC_ODR_DO_200Hz =0x60,
cparata	0:485458fca2bd	392	LSM303AGR_ACC_ODR_DO_400Hz =0x70,
cparata	0:485458fca2bd	393	LSM303AGR_ACC_ODR_DO_1_6KHz =0x80,
cparata	0:485458fca2bd	394	LSM303AGR_ACC_ODR_DO_1_25KHz =0x90,
cparata	0:485458fca2bd	395	} LSM303AGR_ACC_ODR_t;
cparata	0:485458fca2bd	396
cparata	0:485458fca2bd	397	#define LSM303AGR_ACC_ODR_MASK 0xF0
cparata	0:485458fca2bd	398	status_t LSM303AGR_ACC_W_ODR(void *handle, LSM303AGR_ACC_ODR_t newValue);
cparata	0:485458fca2bd	399	status_t LSM303AGR_ACC_R_ODR(void handle, LSM303AGR_ACC_ODR_t value);
cparata	0:485458fca2bd	400
cparata	0:485458fca2bd	401	/*******************************************************************************
cparata	0:485458fca2bd	402	* Register : CTRL_REG2
cparata	0:485458fca2bd	403	* Address : 0X21
cparata	0:485458fca2bd	404	* Bit Group Name: HPIS1
cparata	0:485458fca2bd	405	* Permission : RW
cparata	0:485458fca2bd	406	*******************************************************************************/
cparata	0:485458fca2bd	407	typedef enum {
cparata	0:485458fca2bd	408	LSM303AGR_ACC_HPIS1_DISABLED =0x00,
cparata	0:485458fca2bd	409	LSM303AGR_ACC_HPIS1_ENABLED =0x01,
cparata	0:485458fca2bd	410	} LSM303AGR_ACC_HPIS1_t;
cparata	0:485458fca2bd	411
cparata	0:485458fca2bd	412	#define LSM303AGR_ACC_HPIS1_MASK 0x01
cparata	0:485458fca2bd	413	status_t LSM303AGR_ACC_W_hpf_aoi_en_int1(void *handle, LSM303AGR_ACC_HPIS1_t newValue);
cparata	0:485458fca2bd	414	status_t LSM303AGR_ACC_R_hpf_aoi_en_int1(void handle, LSM303AGR_ACC_HPIS1_t value);
cparata	0:485458fca2bd	415
cparata	0:485458fca2bd	416	/*******************************************************************************
cparata	0:485458fca2bd	417	* Register : CTRL_REG2
cparata	0:485458fca2bd	418	* Address : 0X21
cparata	0:485458fca2bd	419	* Bit Group Name: HPIS2
cparata	0:485458fca2bd	420	* Permission : RW
cparata	0:485458fca2bd	421	*******************************************************************************/
cparata	0:485458fca2bd	422	typedef enum {
cparata	0:485458fca2bd	423	LSM303AGR_ACC_HPIS2_DISABLED =0x00,
cparata	0:485458fca2bd	424	LSM303AGR_ACC_HPIS2_ENABLED =0x02,
cparata	0:485458fca2bd	425	} LSM303AGR_ACC_HPIS2_t;
cparata	0:485458fca2bd	426
cparata	0:485458fca2bd	427	#define LSM303AGR_ACC_HPIS2_MASK 0x02
cparata	0:485458fca2bd	428	status_t LSM303AGR_ACC_W_hpf_aoi_en_int2(void *handle, LSM303AGR_ACC_HPIS2_t newValue);
cparata	0:485458fca2bd	429	status_t LSM303AGR_ACC_R_hpf_aoi_en_int2(void handle, LSM303AGR_ACC_HPIS2_t value);
cparata	0:485458fca2bd	430
cparata	0:485458fca2bd	431	/*******************************************************************************
cparata	0:485458fca2bd	432	* Register : CTRL_REG2
cparata	0:485458fca2bd	433	* Address : 0X21
cparata	0:485458fca2bd	434	* Bit Group Name: HPCLICK
cparata	0:485458fca2bd	435	* Permission : RW
cparata	0:485458fca2bd	436	*******************************************************************************/
cparata	0:485458fca2bd	437	typedef enum {
cparata	0:485458fca2bd	438	LSM303AGR_ACC_HPCLICK_DISABLED =0x00,
cparata	0:485458fca2bd	439	LSM303AGR_ACC_HPCLICK_ENABLED =0x04,
cparata	0:485458fca2bd	440	} LSM303AGR_ACC_HPCLICK_t;
cparata	0:485458fca2bd	441
cparata	0:485458fca2bd	442	#define LSM303AGR_ACC_HPCLICK_MASK 0x04
cparata	0:485458fca2bd	443	status_t LSM303AGR_ACC_W_hpf_click_en(void *handle, LSM303AGR_ACC_HPCLICK_t newValue);
cparata	0:485458fca2bd	444	status_t LSM303AGR_ACC_R_hpf_click_en(void handle, LSM303AGR_ACC_HPCLICK_t value);
cparata	0:485458fca2bd	445
cparata	0:485458fca2bd	446	/*******************************************************************************
cparata	0:485458fca2bd	447	* Register : CTRL_REG2
cparata	0:485458fca2bd	448	* Address : 0X21
cparata	0:485458fca2bd	449	* Bit Group Name: FDS
cparata	0:485458fca2bd	450	* Permission : RW
cparata	0:485458fca2bd	451	*******************************************************************************/
cparata	0:485458fca2bd	452	typedef enum {
cparata	0:485458fca2bd	453	LSM303AGR_ACC_FDS_BYPASSED =0x00,
cparata	0:485458fca2bd	454	LSM303AGR_ACC_FDS_ENABLED =0x08,
cparata	0:485458fca2bd	455	} LSM303AGR_ACC_FDS_t;
cparata	0:485458fca2bd	456
cparata	0:485458fca2bd	457	#define LSM303AGR_ACC_FDS_MASK 0x08
cparata	0:485458fca2bd	458	status_t LSM303AGR_ACC_W_Data_Filter(void *handle, LSM303AGR_ACC_FDS_t newValue);
cparata	0:485458fca2bd	459	status_t LSM303AGR_ACC_R_Data_Filter(void handle, LSM303AGR_ACC_FDS_t value);
cparata	0:485458fca2bd	460
cparata	0:485458fca2bd	461	/*******************************************************************************
cparata	0:485458fca2bd	462	* Register : CTRL_REG2
cparata	0:485458fca2bd	463	* Address : 0X21
cparata	0:485458fca2bd	464	* Bit Group Name: HPCF
cparata	0:485458fca2bd	465	* Permission : RW
cparata	0:485458fca2bd	466	*******************************************************************************/
cparata	0:485458fca2bd	467	typedef enum {
cparata	0:485458fca2bd	468	LSM303AGR_ACC_HPCF_00 =0x00,
cparata	0:485458fca2bd	469	LSM303AGR_ACC_HPCF_01 =0x10,
cparata	0:485458fca2bd	470	LSM303AGR_ACC_HPCF_10 =0x20,
cparata	0:485458fca2bd	471	LSM303AGR_ACC_HPCF_11 =0x30,
cparata	0:485458fca2bd	472	} LSM303AGR_ACC_HPCF_t;
cparata	0:485458fca2bd	473
cparata	0:485458fca2bd	474	#define LSM303AGR_ACC_HPCF_MASK 0x30
cparata	0:485458fca2bd	475	status_t LSM303AGR_ACC_W_hpf_cutoff_freq(void *handle, LSM303AGR_ACC_HPCF_t newValue);
cparata	0:485458fca2bd	476	status_t LSM303AGR_ACC_R_hpf_cutoff_freq(void handle, LSM303AGR_ACC_HPCF_t value);
cparata	0:485458fca2bd	477
cparata	0:485458fca2bd	478	/*******************************************************************************
cparata	0:485458fca2bd	479	* Register : CTRL_REG2
cparata	0:485458fca2bd	480	* Address : 0X21
cparata	0:485458fca2bd	481	* Bit Group Name: HPM
cparata	0:485458fca2bd	482	* Permission : RW
cparata	0:485458fca2bd	483	*******************************************************************************/
cparata	0:485458fca2bd	484	typedef enum {
cparata	0:485458fca2bd	485	LSM303AGR_ACC_HPM_NORMAL =0x00,
cparata	0:485458fca2bd	486	LSM303AGR_ACC_HPM_REFERENCE_SIGNAL =0x40,
cparata	0:485458fca2bd	487	LSM303AGR_ACC_HPM_NORMAL_2 =0x80,
cparata	0:485458fca2bd	488	LSM303AGR_ACC_HPM_AUTORST_ON_INT =0xC0,
cparata	0:485458fca2bd	489	} LSM303AGR_ACC_HPM_t;
cparata	0:485458fca2bd	490
cparata	0:485458fca2bd	491	#define LSM303AGR_ACC_HPM_MASK 0xC0
cparata	0:485458fca2bd	492	status_t LSM303AGR_ACC_W_hpf_mode(void *handle, LSM303AGR_ACC_HPM_t newValue);
cparata	0:485458fca2bd	493	status_t LSM303AGR_ACC_R_hpf_mode(void handle, LSM303AGR_ACC_HPM_t value);
cparata	0:485458fca2bd	494
cparata	0:485458fca2bd	495	/*******************************************************************************
cparata	0:485458fca2bd	496	* Register : CTRL_REG3
cparata	0:485458fca2bd	497	* Address : 0X22
cparata	0:485458fca2bd	498	* Bit Group Name: I1_OVERRUN
cparata	0:485458fca2bd	499	* Permission : RW
cparata	0:485458fca2bd	500	*******************************************************************************/
cparata	0:485458fca2bd	501	typedef enum {
cparata	0:485458fca2bd	502	LSM303AGR_ACC_I1_OVERRUN_DISABLED =0x00,
cparata	0:485458fca2bd	503	LSM303AGR_ACC_I1_OVERRUN_ENABLED =0x02,
cparata	0:485458fca2bd	504	} LSM303AGR_ACC_I1_OVERRUN_t;
cparata	0:485458fca2bd	505
cparata	0:485458fca2bd	506	#define LSM303AGR_ACC_I1_OVERRUN_MASK 0x02
cparata	0:485458fca2bd	507	status_t LSM303AGR_ACC_W_FIFO_Overrun_on_INT1(void *handle, LSM303AGR_ACC_I1_OVERRUN_t newValue);
cparata	0:485458fca2bd	508	status_t LSM303AGR_ACC_R_FIFO_Overrun_on_INT1(void handle, LSM303AGR_ACC_I1_OVERRUN_t value);
cparata	0:485458fca2bd	509
cparata	0:485458fca2bd	510	/*******************************************************************************
cparata	0:485458fca2bd	511	* Register : CTRL_REG3
cparata	0:485458fca2bd	512	* Address : 0X22
cparata	0:485458fca2bd	513	* Bit Group Name: I1_WTM
cparata	0:485458fca2bd	514	* Permission : RW
cparata	0:485458fca2bd	515	*******************************************************************************/
cparata	0:485458fca2bd	516	typedef enum {
cparata	0:485458fca2bd	517	LSM303AGR_ACC_I1_WTM_DISABLED =0x00,
cparata	0:485458fca2bd	518	LSM303AGR_ACC_I1_WTM_ENABLED =0x04,
cparata	0:485458fca2bd	519	} LSM303AGR_ACC_I1_WTM_t;
cparata	0:485458fca2bd	520
cparata	0:485458fca2bd	521	#define LSM303AGR_ACC_I1_WTM_MASK 0x04
cparata	0:485458fca2bd	522	status_t LSM303AGR_ACC_W_FIFO_Watermark_on_INT1(void *handle, LSM303AGR_ACC_I1_WTM_t newValue);
cparata	0:485458fca2bd	523	status_t LSM303AGR_ACC_R_FIFO_Watermark_on_INT1(void handle, LSM303AGR_ACC_I1_WTM_t value);
cparata	0:485458fca2bd	524
cparata	0:485458fca2bd	525	/*******************************************************************************
cparata	0:485458fca2bd	526	* Register : CTRL_REG3
cparata	0:485458fca2bd	527	* Address : 0X22
cparata	0:485458fca2bd	528	* Bit Group Name: I1_DRDY2
cparata	0:485458fca2bd	529	* Permission : RW
cparata	0:485458fca2bd	530	*******************************************************************************/
cparata	0:485458fca2bd	531	typedef enum {
cparata	0:485458fca2bd	532	LSM303AGR_ACC_I1_DRDY2_DISABLED =0x00,
cparata	0:485458fca2bd	533	LSM303AGR_ACC_I1_DRDY2_ENABLED =0x08,
cparata	0:485458fca2bd	534	} LSM303AGR_ACC_I1_DRDY2_t;
cparata	0:485458fca2bd	535
cparata	0:485458fca2bd	536	#define LSM303AGR_ACC_I1_DRDY2_MASK 0x08
cparata	0:485458fca2bd	537	status_t LSM303AGR_ACC_W_FIFO_DRDY2_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY2_t newValue);
cparata	0:485458fca2bd	538	status_t LSM303AGR_ACC_R_FIFO_DRDY2_on_INT1(void handle, LSM303AGR_ACC_I1_DRDY2_t value);
cparata	0:485458fca2bd	539
cparata	0:485458fca2bd	540	/*******************************************************************************
cparata	0:485458fca2bd	541	* Register : CTRL_REG3
cparata	0:485458fca2bd	542	* Address : 0X22
cparata	0:485458fca2bd	543	* Bit Group Name: I1_DRDY1
cparata	0:485458fca2bd	544	* Permission : RW
cparata	0:485458fca2bd	545	*******************************************************************************/
cparata	0:485458fca2bd	546	typedef enum {
cparata	0:485458fca2bd	547	LSM303AGR_ACC_I1_DRDY1_DISABLED =0x00,
cparata	0:485458fca2bd	548	LSM303AGR_ACC_I1_DRDY1_ENABLED =0x10,
cparata	0:485458fca2bd	549	} LSM303AGR_ACC_I1_DRDY1_t;
cparata	0:485458fca2bd	550
cparata	0:485458fca2bd	551	#define LSM303AGR_ACC_I1_DRDY1_MASK 0x10
cparata	0:485458fca2bd	552	status_t LSM303AGR_ACC_W_FIFO_DRDY1_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY1_t newValue);
cparata	0:485458fca2bd	553	status_t LSM303AGR_ACC_R_FIFO_DRDY1_on_INT1(void handle, LSM303AGR_ACC_I1_DRDY1_t value);
cparata	0:485458fca2bd	554
cparata	0:485458fca2bd	555	/*******************************************************************************
cparata	0:485458fca2bd	556	* Register : CTRL_REG3
cparata	0:485458fca2bd	557	* Address : 0X22
cparata	0:485458fca2bd	558	* Bit Group Name: I1_AOI2
cparata	0:485458fca2bd	559	* Permission : RW
cparata	0:485458fca2bd	560	*******************************************************************************/
cparata	0:485458fca2bd	561	typedef enum {
cparata	0:485458fca2bd	562	LSM303AGR_ACC_I1_AOI2_DISABLED =0x00,
cparata	0:485458fca2bd	563	LSM303AGR_ACC_I1_AOI2_ENABLED =0x20,
cparata	0:485458fca2bd	564	} LSM303AGR_ACC_I1_AOI2_t;
cparata	0:485458fca2bd	565
cparata	0:485458fca2bd	566	#define LSM303AGR_ACC_I1_AOI2_MASK 0x20
cparata	0:485458fca2bd	567	status_t LSM303AGR_ACC_W_FIFO_AOL2_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI2_t newValue);
cparata	0:485458fca2bd	568	status_t LSM303AGR_ACC_R_FIFO_AOL2_on_INT1(void handle, LSM303AGR_ACC_I1_AOI2_t value);
cparata	0:485458fca2bd	569
cparata	0:485458fca2bd	570	/*******************************************************************************
cparata	0:485458fca2bd	571	* Register : CTRL_REG3
cparata	0:485458fca2bd	572	* Address : 0X22
cparata	0:485458fca2bd	573	* Bit Group Name: I1_AOI1
cparata	0:485458fca2bd	574	* Permission : RW
cparata	0:485458fca2bd	575	*******************************************************************************/
cparata	0:485458fca2bd	576	typedef enum {
cparata	0:485458fca2bd	577	LSM303AGR_ACC_I1_AOI1_DISABLED =0x00,
cparata	0:485458fca2bd	578	LSM303AGR_ACC_I1_AOI1_ENABLED =0x40,
cparata	0:485458fca2bd	579	} LSM303AGR_ACC_I1_AOI1_t;
cparata	0:485458fca2bd	580
cparata	0:485458fca2bd	581	#define LSM303AGR_ACC_I1_AOI1_MASK 0x40
cparata	0:485458fca2bd	582	status_t LSM303AGR_ACC_W_FIFO_AOL1_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI1_t newValue);
cparata	0:485458fca2bd	583	status_t LSM303AGR_ACC_R_FIFO_AOL1_on_INT1(void handle, LSM303AGR_ACC_I1_AOI1_t value);
cparata	0:485458fca2bd	584
cparata	0:485458fca2bd	585	/*******************************************************************************
cparata	0:485458fca2bd	586	* Register : CTRL_REG3
cparata	0:485458fca2bd	587	* Address : 0X22
cparata	0:485458fca2bd	588	* Bit Group Name: I1_CLICK
cparata	0:485458fca2bd	589	* Permission : RW
cparata	0:485458fca2bd	590	*******************************************************************************/
cparata	0:485458fca2bd	591	typedef enum {
cparata	0:485458fca2bd	592	LSM303AGR_ACC_I1_CLICK_DISABLED =0x00,
cparata	0:485458fca2bd	593	LSM303AGR_ACC_I1_CLICK_ENABLED =0x80,
cparata	0:485458fca2bd	594	} LSM303AGR_ACC_I1_CLICK_t;
cparata	0:485458fca2bd	595
cparata	0:485458fca2bd	596	#define LSM303AGR_ACC_I1_CLICK_MASK 0x80
cparata	0:485458fca2bd	597	status_t LSM303AGR_ACC_W_FIFO_Click_on_INT1(void *handle, LSM303AGR_ACC_I1_CLICK_t newValue);
cparata	0:485458fca2bd	598	status_t LSM303AGR_ACC_R_FIFO_Click_on_INT1(void handle, LSM303AGR_ACC_I1_CLICK_t value);
cparata	0:485458fca2bd	599
cparata	0:485458fca2bd	600	/*******************************************************************************
cparata	0:485458fca2bd	601	* Register : CTRL_REG4
cparata	0:485458fca2bd	602	* Address : 0X23
cparata	0:485458fca2bd	603	* Bit Group Name: SIM
cparata	0:485458fca2bd	604	* Permission : RW
cparata	0:485458fca2bd	605	*******************************************************************************/
cparata	0:485458fca2bd	606	typedef enum {
cparata	0:485458fca2bd	607	LSM303AGR_ACC_SIM_4_WIRES =0x00,
cparata	0:485458fca2bd	608	LSM303AGR_ACC_SIM_3_WIRES =0x01,
cparata	0:485458fca2bd	609	} LSM303AGR_ACC_SIM_t;
cparata	0:485458fca2bd	610
cparata	0:485458fca2bd	611	#define LSM303AGR_ACC_SIM_MASK 0x01
cparata	0:485458fca2bd	612	status_t LSM303AGR_ACC_W_SPI_mode(void *handle, LSM303AGR_ACC_SIM_t newValue);
cparata	0:485458fca2bd	613	status_t LSM303AGR_ACC_R_SPI_mode(void handle, LSM303AGR_ACC_SIM_t value);
cparata	0:485458fca2bd	614
cparata	0:485458fca2bd	615	/*******************************************************************************
cparata	0:485458fca2bd	616	* Register : CTRL_REG4
cparata	0:485458fca2bd	617	* Address : 0X23
cparata	0:485458fca2bd	618	* Bit Group Name: ST
cparata	0:485458fca2bd	619	* Permission : RW
cparata	0:485458fca2bd	620	*******************************************************************************/
cparata	0:485458fca2bd	621	typedef enum {
cparata	0:485458fca2bd	622	LSM303AGR_ACC_ST_DISABLED =0x00,
cparata	0:485458fca2bd	623	LSM303AGR_ACC_ST_SELF_TEST_0 =0x02,
cparata	0:485458fca2bd	624	LSM303AGR_ACC_ST_SELF_TEST_1 =0x04,
cparata	0:485458fca2bd	625	LSM303AGR_ACC_ST_NOT_APPLICABLE =0x06,
cparata	0:485458fca2bd	626	} LSM303AGR_ACC_ST_t;
cparata	0:485458fca2bd	627
cparata	0:485458fca2bd	628	#define LSM303AGR_ACC_ST_MASK 0x06
cparata	0:485458fca2bd	629	status_t LSM303AGR_ACC_W_SelfTest(void *handle, LSM303AGR_ACC_ST_t newValue);
cparata	0:485458fca2bd	630	status_t LSM303AGR_ACC_R_SelfTest(void handle, LSM303AGR_ACC_ST_t value);
cparata	0:485458fca2bd	631
cparata	0:485458fca2bd	632	/*******************************************************************************
cparata	0:485458fca2bd	633	* Register : CTRL_REG4
cparata	0:485458fca2bd	634	* Address : 0X23
cparata	0:485458fca2bd	635	* Bit Group Name: HR
cparata	0:485458fca2bd	636	* Permission : RW
cparata	0:485458fca2bd	637	*******************************************************************************/
cparata	0:485458fca2bd	638	typedef enum {
cparata	0:485458fca2bd	639	LSM303AGR_ACC_HR_DISABLED =0x00,
cparata	0:485458fca2bd	640	LSM303AGR_ACC_HR_ENABLED =0x08,
cparata	0:485458fca2bd	641	} LSM303AGR_ACC_HR_t;
cparata	0:485458fca2bd	642
cparata	0:485458fca2bd	643	#define LSM303AGR_ACC_HR_MASK 0x08
cparata	0:485458fca2bd	644	status_t LSM303AGR_ACC_W_HiRes(void *handle, LSM303AGR_ACC_HR_t newValue);
cparata	0:485458fca2bd	645	status_t LSM303AGR_ACC_R_HiRes(void handle, LSM303AGR_ACC_HR_t value);
cparata	0:485458fca2bd	646
cparata	0:485458fca2bd	647	/*******************************************************************************
cparata	0:485458fca2bd	648	* Register : CTRL_REG4
cparata	0:485458fca2bd	649	* Address : 0X23
cparata	0:485458fca2bd	650	* Bit Group Name: FS
cparata	0:485458fca2bd	651	* Permission : RW
cparata	0:485458fca2bd	652	*******************************************************************************/
cparata	0:485458fca2bd	653	typedef enum {
cparata	0:485458fca2bd	654	LSM303AGR_ACC_FS_2G =0x00,
cparata	0:485458fca2bd	655	LSM303AGR_ACC_FS_4G =0x10,
cparata	0:485458fca2bd	656	LSM303AGR_ACC_FS_8G =0x20,
cparata	0:485458fca2bd	657	LSM303AGR_ACC_FS_16G =0x30,
cparata	0:485458fca2bd	658	} LSM303AGR_ACC_FS_t;
cparata	0:485458fca2bd	659
cparata	0:485458fca2bd	660	#define LSM303AGR_ACC_FS_MASK 0x30
cparata	0:485458fca2bd	661	status_t LSM303AGR_ACC_W_FullScale(void *handle, LSM303AGR_ACC_FS_t newValue);
cparata	0:485458fca2bd	662	status_t LSM303AGR_ACC_R_FullScale(void handle, LSM303AGR_ACC_FS_t value);
cparata	0:485458fca2bd	663
cparata	0:485458fca2bd	664	/*******************************************************************************
cparata	0:485458fca2bd	665	* Register : CTRL_REG4
cparata	0:485458fca2bd	666	* Address : 0X23
cparata	0:485458fca2bd	667	* Bit Group Name: BLE
cparata	0:485458fca2bd	668	* Permission : RW
cparata	0:485458fca2bd	669	*******************************************************************************/
cparata	0:485458fca2bd	670	typedef enum {
cparata	0:485458fca2bd	671	LSM303AGR_ACC_BLE_LITTLE_ENDIAN =0x00,
cparata	0:485458fca2bd	672	LSM303AGR_ACC_BLE_BIG_ENDIAN =0x40,
cparata	0:485458fca2bd	673	} LSM303AGR_ACC_BLE_t;
cparata	0:485458fca2bd	674
cparata	0:485458fca2bd	675	#define LSM303AGR_ACC_BLE_MASK 0x40
cparata	0:485458fca2bd	676	status_t LSM303AGR_ACC_W_LittleBigEndian(void *handle, LSM303AGR_ACC_BLE_t newValue);
cparata	0:485458fca2bd	677	status_t LSM303AGR_ACC_R_LittleBigEndian(void handle, LSM303AGR_ACC_BLE_t value);
cparata	0:485458fca2bd	678
cparata	0:485458fca2bd	679	/*******************************************************************************
cparata	0:485458fca2bd	680	* Register : CTRL_REG4
cparata	0:485458fca2bd	681	* Address : 0X23
cparata	0:485458fca2bd	682	* Bit Group Name: BDU
cparata	0:485458fca2bd	683	* Permission : RW
cparata	0:485458fca2bd	684	*******************************************************************************/
cparata	0:485458fca2bd	685	typedef enum {
cparata	0:485458fca2bd	686	LSM303AGR_ACC_BDU_DISABLED =0x00,
cparata	0:485458fca2bd	687	LSM303AGR_ACC_BDU_ENABLED =0x80,
cparata	0:485458fca2bd	688	} LSM303AGR_ACC_BDU_t;
cparata	0:485458fca2bd	689
cparata	0:485458fca2bd	690	#define LSM303AGR_ACC_BDU_MASK 0x80
cparata	0:485458fca2bd	691	status_t LSM303AGR_ACC_W_BlockDataUpdate(void *handle, LSM303AGR_ACC_BDU_t newValue);
cparata	0:485458fca2bd	692	status_t LSM303AGR_ACC_R_BlockDataUpdate(void handle, LSM303AGR_ACC_BDU_t value);
cparata	0:485458fca2bd	693
cparata	0:485458fca2bd	694	/*******************************************************************************
cparata	0:485458fca2bd	695	* Register : CTRL_REG5
cparata	0:485458fca2bd	696	* Address : 0X24
cparata	0:485458fca2bd	697	* Bit Group Name: D4D_INT2
cparata	0:485458fca2bd	698	* Permission : RW
cparata	0:485458fca2bd	699	*******************************************************************************/
cparata	0:485458fca2bd	700	typedef enum {
cparata	0:485458fca2bd	701	LSM303AGR_ACC_D4D_INT2_DISABLED =0x00,
cparata	0:485458fca2bd	702	LSM303AGR_ACC_D4D_INT2_ENABLED =0x01,
cparata	0:485458fca2bd	703	} LSM303AGR_ACC_D4D_INT2_t;
cparata	0:485458fca2bd	704
cparata	0:485458fca2bd	705	#define LSM303AGR_ACC_D4D_INT2_MASK 0x01
cparata	0:485458fca2bd	706	status_t LSM303AGR_ACC_W_4D_on_INT2(void *handle, LSM303AGR_ACC_D4D_INT2_t newValue);
cparata	0:485458fca2bd	707	status_t LSM303AGR_ACC_R_4D_on_INT2(void handle, LSM303AGR_ACC_D4D_INT2_t value);
cparata	0:485458fca2bd	708
cparata	0:485458fca2bd	709	/*******************************************************************************
cparata	0:485458fca2bd	710	* Register : CTRL_REG5
cparata	0:485458fca2bd	711	* Address : 0X24
cparata	0:485458fca2bd	712	* Bit Group Name: LIR_INT2
cparata	0:485458fca2bd	713	* Permission : RW
cparata	0:485458fca2bd	714	*******************************************************************************/
cparata	0:485458fca2bd	715	typedef enum {
cparata	0:485458fca2bd	716	LSM303AGR_ACC_LIR_INT2_DISABLED =0x00,
cparata	0:485458fca2bd	717	LSM303AGR_ACC_LIR_INT2_ENABLED =0x02,
cparata	0:485458fca2bd	718	} LSM303AGR_ACC_LIR_INT2_t;
cparata	0:485458fca2bd	719
cparata	0:485458fca2bd	720	#define LSM303AGR_ACC_LIR_INT2_MASK 0x02
cparata	0:485458fca2bd	721	status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT2(void *handle, LSM303AGR_ACC_LIR_INT2_t newValue);
cparata	0:485458fca2bd	722	status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT2(void handle, LSM303AGR_ACC_LIR_INT2_t value);
cparata	0:485458fca2bd	723
cparata	0:485458fca2bd	724	/*******************************************************************************
cparata	0:485458fca2bd	725	* Register : CTRL_REG5
cparata	0:485458fca2bd	726	* Address : 0X24
cparata	0:485458fca2bd	727	* Bit Group Name: D4D_INT1
cparata	0:485458fca2bd	728	* Permission : RW
cparata	0:485458fca2bd	729	*******************************************************************************/
cparata	0:485458fca2bd	730	typedef enum {
cparata	0:485458fca2bd	731	LSM303AGR_ACC_D4D_INT1_DISABLED =0x00,
cparata	0:485458fca2bd	732	LSM303AGR_ACC_D4D_INT1_ENABLED =0x04,
cparata	0:485458fca2bd	733	} LSM303AGR_ACC_D4D_INT1_t;
cparata	0:485458fca2bd	734
cparata	0:485458fca2bd	735	#define LSM303AGR_ACC_D4D_INT1_MASK 0x04
cparata	0:485458fca2bd	736	status_t LSM303AGR_ACC_W_4D_on_INT1(void *handle, LSM303AGR_ACC_D4D_INT1_t newValue);
cparata	0:485458fca2bd	737	status_t LSM303AGR_ACC_R_4D_on_INT1(void handle, LSM303AGR_ACC_D4D_INT1_t value);
cparata	0:485458fca2bd	738
cparata	0:485458fca2bd	739	/*******************************************************************************
cparata	0:485458fca2bd	740	* Register : CTRL_REG5
cparata	0:485458fca2bd	741	* Address : 0X24
cparata	0:485458fca2bd	742	* Bit Group Name: LIR_INT1
cparata	0:485458fca2bd	743	* Permission : RW
cparata	0:485458fca2bd	744	*******************************************************************************/
cparata	0:485458fca2bd	745	typedef enum {
cparata	0:485458fca2bd	746	LSM303AGR_ACC_LIR_INT1_DISABLED =0x00,
cparata	0:485458fca2bd	747	LSM303AGR_ACC_LIR_INT1_ENABLED =0x08,
cparata	0:485458fca2bd	748	} LSM303AGR_ACC_LIR_INT1_t;
cparata	0:485458fca2bd	749
cparata	0:485458fca2bd	750	#define LSM303AGR_ACC_LIR_INT1_MASK 0x08
cparata	0:485458fca2bd	751	status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT1(void *handle, LSM303AGR_ACC_LIR_INT1_t newValue);
cparata	0:485458fca2bd	752	status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT1(void handle, LSM303AGR_ACC_LIR_INT1_t value);
cparata	0:485458fca2bd	753
cparata	0:485458fca2bd	754	/*******************************************************************************
cparata	0:485458fca2bd	755	* Register : CTRL_REG5
cparata	0:485458fca2bd	756	* Address : 0X24
cparata	0:485458fca2bd	757	* Bit Group Name: FIFO_EN
cparata	0:485458fca2bd	758	* Permission : RW
cparata	0:485458fca2bd	759	*******************************************************************************/
cparata	0:485458fca2bd	760	typedef enum {
cparata	0:485458fca2bd	761	LSM303AGR_ACC_FIFO_EN_DISABLED =0x00,
cparata	0:485458fca2bd	762	LSM303AGR_ACC_FIFO_EN_ENABLED =0x40,
cparata	0:485458fca2bd	763	} LSM303AGR_ACC_FIFO_EN_t;
cparata	0:485458fca2bd	764
cparata	0:485458fca2bd	765	#define LSM303AGR_ACC_FIFO_EN_MASK 0x40
cparata	0:485458fca2bd	766	status_t LSM303AGR_ACC_W_FIFO_EN(void *handle, LSM303AGR_ACC_FIFO_EN_t newValue);
cparata	0:485458fca2bd	767	status_t LSM303AGR_ACC_R_FIFO_EN(void handle, LSM303AGR_ACC_FIFO_EN_t value);
cparata	0:485458fca2bd	768
cparata	0:485458fca2bd	769	/*******************************************************************************
cparata	0:485458fca2bd	770	* Register : CTRL_REG5
cparata	0:485458fca2bd	771	* Address : 0X24
cparata	0:485458fca2bd	772	* Bit Group Name: BOOT
cparata	0:485458fca2bd	773	* Permission : RW
cparata	0:485458fca2bd	774	*******************************************************************************/
cparata	0:485458fca2bd	775	typedef enum {
cparata	0:485458fca2bd	776	LSM303AGR_ACC_BOOT_NORMAL_MODE =0x00,
cparata	0:485458fca2bd	777	LSM303AGR_ACC_BOOT_REBOOT =0x80,
cparata	0:485458fca2bd	778	} LSM303AGR_ACC_BOOT_t;
cparata	0:485458fca2bd	779
cparata	0:485458fca2bd	780	#define LSM303AGR_ACC_BOOT_MASK 0x80
cparata	0:485458fca2bd	781	status_t LSM303AGR_ACC_W_RebootMemory(void *handle, LSM303AGR_ACC_BOOT_t newValue);
cparata	0:485458fca2bd	782	status_t LSM303AGR_ACC_R_RebootMemory(void handle, LSM303AGR_ACC_BOOT_t value);
cparata	0:485458fca2bd	783
cparata	0:485458fca2bd	784	/*******************************************************************************
cparata	0:485458fca2bd	785	* Register : CTRL_REG6
cparata	0:485458fca2bd	786	* Address : 0X25
cparata	0:485458fca2bd	787	* Bit Group Name: H_LACTIVE
cparata	0:485458fca2bd	788	* Permission : RW
cparata	0:485458fca2bd	789	*******************************************************************************/
cparata	0:485458fca2bd	790	typedef enum {
cparata	0:485458fca2bd	791	LSM303AGR_ACC_H_LACTIVE_ACTIVE_HI =0x00,
cparata	0:485458fca2bd	792	LSM303AGR_ACC_H_LACTIVE_ACTIVE_LO =0x02,
cparata	0:485458fca2bd	793	} LSM303AGR_ACC_H_LACTIVE_t;
cparata	0:485458fca2bd	794
cparata	0:485458fca2bd	795	#define LSM303AGR_ACC_H_LACTIVE_MASK 0x02
cparata	0:485458fca2bd	796	status_t LSM303AGR_ACC_W_IntActive(void *handle, LSM303AGR_ACC_H_LACTIVE_t newValue);
cparata	0:485458fca2bd	797	status_t LSM303AGR_ACC_R_IntActive(void handle, LSM303AGR_ACC_H_LACTIVE_t value);
cparata	0:485458fca2bd	798
cparata	0:485458fca2bd	799	/*******************************************************************************
cparata	0:485458fca2bd	800	* Register : CTRL_REG6
cparata	0:485458fca2bd	801	* Address : 0X25
cparata	0:485458fca2bd	802	* Bit Group Name: P2_ACT
cparata	0:485458fca2bd	803	* Permission : RW
cparata	0:485458fca2bd	804	*******************************************************************************/
cparata	0:485458fca2bd	805	typedef enum {
cparata	0:485458fca2bd	806	LSM303AGR_ACC_P2_ACT_DISABLED =0x00,
cparata	0:485458fca2bd	807	LSM303AGR_ACC_P2_ACT_ENABLED =0x08,
cparata	0:485458fca2bd	808	} LSM303AGR_ACC_P2_ACT_t;
cparata	0:485458fca2bd	809
cparata	0:485458fca2bd	810	#define LSM303AGR_ACC_P2_ACT_MASK 0x08
cparata	0:485458fca2bd	811	status_t LSM303AGR_ACC_W_P2_ACT(void *handle, LSM303AGR_ACC_P2_ACT_t newValue);
cparata	0:485458fca2bd	812	status_t LSM303AGR_ACC_R_P2_ACT(void handle, LSM303AGR_ACC_P2_ACT_t value);
cparata	0:485458fca2bd	813
cparata	0:485458fca2bd	814	/*******************************************************************************
cparata	0:485458fca2bd	815	* Register : CTRL_REG6
cparata	0:485458fca2bd	816	* Address : 0X25
cparata	0:485458fca2bd	817	* Bit Group Name: BOOT_I1
cparata	0:485458fca2bd	818	* Permission : RW
cparata	0:485458fca2bd	819	*******************************************************************************/
cparata	0:485458fca2bd	820	typedef enum {
cparata	0:485458fca2bd	821	LSM303AGR_ACC_BOOT_I1_DISABLED =0x00,
cparata	0:485458fca2bd	822	LSM303AGR_ACC_BOOT_I1_ENABLED =0x10,
cparata	0:485458fca2bd	823	} LSM303AGR_ACC_BOOT_I1_t;
cparata	0:485458fca2bd	824
cparata	0:485458fca2bd	825	#define LSM303AGR_ACC_BOOT_I1_MASK 0x10
cparata	0:485458fca2bd	826	status_t LSM303AGR_ACC_W_Boot_on_INT2(void *handle, LSM303AGR_ACC_BOOT_I1_t newValue);
cparata	0:485458fca2bd	827	status_t LSM303AGR_ACC_R_Boot_on_INT2(void handle, LSM303AGR_ACC_BOOT_I1_t value);
cparata	0:485458fca2bd	828
cparata	0:485458fca2bd	829	/*******************************************************************************
cparata	0:485458fca2bd	830	* Register : CTRL_REG6
cparata	0:485458fca2bd	831	* Address : 0X25
cparata	0:485458fca2bd	832	* Bit Group Name: I2_INT2
cparata	0:485458fca2bd	833	* Permission : RW
cparata	0:485458fca2bd	834	*******************************************************************************/
cparata	0:485458fca2bd	835	typedef enum {
cparata	0:485458fca2bd	836	LSM303AGR_ACC_I2_INT2_DISABLED =0x00,
cparata	0:485458fca2bd	837	LSM303AGR_ACC_I2_INT2_ENABLED =0x20,
cparata	0:485458fca2bd	838	} LSM303AGR_ACC_I2_INT2_t;
cparata	0:485458fca2bd	839
cparata	0:485458fca2bd	840	#define LSM303AGR_ACC_I2_INT2_MASK 0x20
cparata	0:485458fca2bd	841	status_t LSM303AGR_ACC_W_I2_on_INT2(void *handle, LSM303AGR_ACC_I2_INT2_t newValue);
cparata	0:485458fca2bd	842	status_t LSM303AGR_ACC_R_I2_on_INT2(void handle, LSM303AGR_ACC_I2_INT2_t value);
cparata	0:485458fca2bd	843
cparata	0:485458fca2bd	844	/*******************************************************************************
cparata	0:485458fca2bd	845	* Register : CTRL_REG6
cparata	0:485458fca2bd	846	* Address : 0X25
cparata	0:485458fca2bd	847	* Bit Group Name: I2_INT1
cparata	0:485458fca2bd	848	* Permission : RW
cparata	0:485458fca2bd	849	*******************************************************************************/
cparata	0:485458fca2bd	850	typedef enum {
cparata	0:485458fca2bd	851	LSM303AGR_ACC_I2_INT1_DISABLED =0x00,
cparata	0:485458fca2bd	852	LSM303AGR_ACC_I2_INT1_ENABLED =0x40,
cparata	0:485458fca2bd	853	} LSM303AGR_ACC_I2_INT1_t;
cparata	0:485458fca2bd	854
cparata	0:485458fca2bd	855	#define LSM303AGR_ACC_I2_INT1_MASK 0x40
cparata	0:485458fca2bd	856	status_t LSM303AGR_ACC_W_I2_on_INT1(void *handle, LSM303AGR_ACC_I2_INT1_t newValue);
cparata	0:485458fca2bd	857	status_t LSM303AGR_ACC_R_I2_on_INT1(void handle, LSM303AGR_ACC_I2_INT1_t value);
cparata	0:485458fca2bd	858
cparata	0:485458fca2bd	859	/*******************************************************************************
cparata	0:485458fca2bd	860	* Register : CTRL_REG6
cparata	0:485458fca2bd	861	* Address : 0X25
cparata	0:485458fca2bd	862	* Bit Group Name: I2_CLICKEN
cparata	0:485458fca2bd	863	* Permission : RW
cparata	0:485458fca2bd	864	*******************************************************************************/
cparata	0:485458fca2bd	865	typedef enum {
cparata	0:485458fca2bd	866	LSM303AGR_ACC_I2_CLICKEN_DISABLED =0x00,
cparata	0:485458fca2bd	867	LSM303AGR_ACC_I2_CLICKEN_ENABLED =0x80,
cparata	0:485458fca2bd	868	} LSM303AGR_ACC_I2_CLICKEN_t;
cparata	0:485458fca2bd	869
cparata	0:485458fca2bd	870	#define LSM303AGR_ACC_I2_CLICKEN_MASK 0x80
cparata	0:485458fca2bd	871	status_t LSM303AGR_ACC_W_Click_on_INT2(void *handle, LSM303AGR_ACC_I2_CLICKEN_t newValue);
cparata	0:485458fca2bd	872	status_t LSM303AGR_ACC_R_Click_on_INT2(void handle, LSM303AGR_ACC_I2_CLICKEN_t value);
cparata	0:485458fca2bd	873
cparata	0:485458fca2bd	874	/*******************************************************************************
cparata	0:485458fca2bd	875	* Register : REFERENCE
cparata	0:485458fca2bd	876	* Address : 0X26
cparata	0:485458fca2bd	877	* Bit Group Name: REF
cparata	0:485458fca2bd	878	* Permission : RW
cparata	0:485458fca2bd	879	*******************************************************************************/
cparata	0:485458fca2bd	880	#define LSM303AGR_ACC_REF_MASK 0xFF
cparata	0:485458fca2bd	881	#define LSM303AGR_ACC_REF_POSITION 0
cparata	0:485458fca2bd	882	status_t LSM303AGR_ACC_W_ReferenceVal(void *handle, u8_t newValue);
cparata	0:485458fca2bd	883	status_t LSM303AGR_ACC_R_ReferenceVal(void handle, u8_t value);
cparata	0:485458fca2bd	884
cparata	0:485458fca2bd	885	/*******************************************************************************
cparata	0:485458fca2bd	886	* Register : STATUS_REG2
cparata	0:485458fca2bd	887	* Address : 0X27
cparata	0:485458fca2bd	888	* Bit Group Name: XDA
cparata	0:485458fca2bd	889	* Permission : RO
cparata	0:485458fca2bd	890	*******************************************************************************/
cparata	0:485458fca2bd	891	typedef enum {
cparata	0:485458fca2bd	892	LSM303AGR_ACC_XDA_NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	893	LSM303AGR_ACC_XDA_AVAILABLE =0x01,
cparata	0:485458fca2bd	894	} LSM303AGR_ACC_XDA_t;
cparata	0:485458fca2bd	895
cparata	0:485458fca2bd	896	#define LSM303AGR_ACC_XDA_MASK 0x01
cparata	0:485458fca2bd	897	status_t LSM303AGR_ACC_R_XDataAvail(void handle, LSM303AGR_ACC_XDA_t value);
cparata	0:485458fca2bd	898
cparata	0:485458fca2bd	899	/*******************************************************************************
cparata	0:485458fca2bd	900	* Register : STATUS_REG2
cparata	0:485458fca2bd	901	* Address : 0X27
cparata	0:485458fca2bd	902	* Bit Group Name: YDA
cparata	0:485458fca2bd	903	* Permission : RO
cparata	0:485458fca2bd	904	*******************************************************************************/
cparata	0:485458fca2bd	905	typedef enum {
cparata	0:485458fca2bd	906	LSM303AGR_ACC_YDA_NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	907	LSM303AGR_ACC_YDA_AVAILABLE =0x02,
cparata	0:485458fca2bd	908	} LSM303AGR_ACC_YDA_t;
cparata	0:485458fca2bd	909
cparata	0:485458fca2bd	910	#define LSM303AGR_ACC_YDA_MASK 0x02
cparata	0:485458fca2bd	911	status_t LSM303AGR_ACC_R_YDataAvail(void handle, LSM303AGR_ACC_YDA_t value);
cparata	0:485458fca2bd	912
cparata	0:485458fca2bd	913	/*******************************************************************************
cparata	0:485458fca2bd	914	* Register : STATUS_REG2
cparata	0:485458fca2bd	915	* Address : 0X27
cparata	0:485458fca2bd	916	* Bit Group Name: ZDA
cparata	0:485458fca2bd	917	* Permission : RO
cparata	0:485458fca2bd	918	*******************************************************************************/
cparata	0:485458fca2bd	919	typedef enum {
cparata	0:485458fca2bd	920	LSM303AGR_ACC_ZDA_NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	921	LSM303AGR_ACC_ZDA_AVAILABLE =0x04,
cparata	0:485458fca2bd	922	} LSM303AGR_ACC_ZDA_t;
cparata	0:485458fca2bd	923
cparata	0:485458fca2bd	924	#define LSM303AGR_ACC_ZDA_MASK 0x04
cparata	0:485458fca2bd	925	status_t LSM303AGR_ACC_R_ZDataAvail(void handle, LSM303AGR_ACC_ZDA_t value);
cparata	0:485458fca2bd	926
cparata	0:485458fca2bd	927	/*******************************************************************************
cparata	0:485458fca2bd	928	* Register : STATUS_REG2
cparata	0:485458fca2bd	929	* Address : 0X27
cparata	0:485458fca2bd	930	* Bit Group Name: ZYXDA
cparata	0:485458fca2bd	931	* Permission : RO
cparata	0:485458fca2bd	932	*******************************************************************************/
cparata	0:485458fca2bd	933	typedef enum {
cparata	0:485458fca2bd	934	LSM303AGR_ACC_ZYXDA_NOT_AVAILABLE =0x00,
cparata	0:485458fca2bd	935	LSM303AGR_ACC_ZYXDA_AVAILABLE =0x08,
cparata	0:485458fca2bd	936	} LSM303AGR_ACC_ZYXDA_t;
cparata	0:485458fca2bd	937
cparata	0:485458fca2bd	938	#define LSM303AGR_ACC_ZYXDA_MASK 0x08
cparata	0:485458fca2bd	939	status_t LSM303AGR_ACC_R_XYZDataAvail(void handle, LSM303AGR_ACC_ZYXDA_t value);
cparata	0:485458fca2bd	940
cparata	0:485458fca2bd	941	/*******************************************************************************
cparata	0:485458fca2bd	942	* Register : STATUS_REG2
cparata	0:485458fca2bd	943	* Address : 0X27
cparata	0:485458fca2bd	944	* Bit Group Name: XOR
cparata	0:485458fca2bd	945	* Permission : RO
cparata	0:485458fca2bd	946	*******************************************************************************/
cparata	0:485458fca2bd	947	typedef enum {
cparata	0:485458fca2bd	948	LSM303AGR_ACC_XOR_NO_OVERRUN =0x00,
cparata	0:485458fca2bd	949	LSM303AGR_ACC_XOR_OVERRUN =0x10,
cparata	0:485458fca2bd	950	} LSM303AGR_ACC_XOR_t;
cparata	0:485458fca2bd	951
cparata	0:485458fca2bd	952	#define LSM303AGR_ACC_XOR_MASK 0x10
cparata	0:485458fca2bd	953	status_t LSM303AGR_ACC_R_XDataOverrun(void handle, LSM303AGR_ACC_XOR_t value);
cparata	0:485458fca2bd	954
cparata	0:485458fca2bd	955	/*******************************************************************************
cparata	0:485458fca2bd	956	* Register : STATUS_REG2
cparata	0:485458fca2bd	957	* Address : 0X27
cparata	0:485458fca2bd	958	* Bit Group Name: YOR
cparata	0:485458fca2bd	959	* Permission : RO
cparata	0:485458fca2bd	960	*******************************************************************************/
cparata	0:485458fca2bd	961	typedef enum {
cparata	0:485458fca2bd	962	LSM303AGR_ACC_YOR_NO_OVERRUN =0x00,
cparata	0:485458fca2bd	963	LSM303AGR_ACC_YOR_OVERRUN =0x20,
cparata	0:485458fca2bd	964	} LSM303AGR_ACC_YOR_t;
cparata	0:485458fca2bd	965
cparata	0:485458fca2bd	966	#define LSM303AGR_ACC_YOR_MASK 0x20
cparata	0:485458fca2bd	967	status_t LSM303AGR_ACC_R_YDataOverrun(void handle, LSM303AGR_ACC_YOR_t value);
cparata	0:485458fca2bd	968
cparata	0:485458fca2bd	969	/*******************************************************************************
cparata	0:485458fca2bd	970	* Register : STATUS_REG2
cparata	0:485458fca2bd	971	* Address : 0X27
cparata	0:485458fca2bd	972	* Bit Group Name: ZOR
cparata	0:485458fca2bd	973	* Permission : RO
cparata	0:485458fca2bd	974	*******************************************************************************/
cparata	0:485458fca2bd	975	typedef enum {
cparata	0:485458fca2bd	976	LSM303AGR_ACC_ZOR_NO_OVERRUN =0x00,
cparata	0:485458fca2bd	977	LSM303AGR_ACC_ZOR_OVERRUN =0x40,
cparata	0:485458fca2bd	978	} LSM303AGR_ACC_ZOR_t;
cparata	0:485458fca2bd	979
cparata	0:485458fca2bd	980	#define LSM303AGR_ACC_ZOR_MASK 0x40
cparata	0:485458fca2bd	981	status_t LSM303AGR_ACC_R_ZDataOverrun(void handle, LSM303AGR_ACC_ZOR_t value);
cparata	0:485458fca2bd	982
cparata	0:485458fca2bd	983	/*******************************************************************************
cparata	0:485458fca2bd	984	* Register : STATUS_REG2
cparata	0:485458fca2bd	985	* Address : 0X27
cparata	0:485458fca2bd	986	* Bit Group Name: ZYXOR
cparata	0:485458fca2bd	987	* Permission : RO
cparata	0:485458fca2bd	988	*******************************************************************************/
cparata	0:485458fca2bd	989	typedef enum {
cparata	0:485458fca2bd	990	LSM303AGR_ACC_ZYXOR_NO_OVERRUN =0x00,
cparata	0:485458fca2bd	991	LSM303AGR_ACC_ZYXOR_OVERRUN =0x80,
cparata	0:485458fca2bd	992	} LSM303AGR_ACC_ZYXOR_t;
cparata	0:485458fca2bd	993
cparata	0:485458fca2bd	994	#define LSM303AGR_ACC_ZYXOR_MASK 0x80
cparata	0:485458fca2bd	995	status_t LSM303AGR_ACC_R_XYZDataOverrun(void handle, LSM303AGR_ACC_ZYXOR_t value);
cparata	0:485458fca2bd	996
cparata	0:485458fca2bd	997	/*******************************************************************************
cparata	0:485458fca2bd	998	* Register : FIFO_CTRL_REG
cparata	0:485458fca2bd	999	* Address : 0X2E
cparata	0:485458fca2bd	1000	* Bit Group Name: FTH
cparata	0:485458fca2bd	1001	* Permission : RW
cparata	0:485458fca2bd	1002	*******************************************************************************/
cparata	0:485458fca2bd	1003	#define LSM303AGR_ACC_FTH_MASK 0x1F
cparata	0:485458fca2bd	1004	#define LSM303AGR_ACC_FTH_POSITION 0
cparata	0:485458fca2bd	1005	status_t LSM303AGR_ACC_W_FifoThreshold(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1006	status_t LSM303AGR_ACC_R_FifoThreshold(void handle, u8_t value);
cparata	0:485458fca2bd	1007
cparata	0:485458fca2bd	1008	/*******************************************************************************
cparata	0:485458fca2bd	1009	* Register : FIFO_CTRL_REG
cparata	0:485458fca2bd	1010	* Address : 0X2E
cparata	0:485458fca2bd	1011	* Bit Group Name: TR
cparata	0:485458fca2bd	1012	* Permission : RW
cparata	0:485458fca2bd	1013	*******************************************************************************/
cparata	0:485458fca2bd	1014	typedef enum {
cparata	0:485458fca2bd	1015	LSM303AGR_ACC_TR_TRIGGER_ON_INT1 =0x00,
cparata	0:485458fca2bd	1016	LSM303AGR_ACC_TR_TRIGGER_ON_INT2 =0x20,
cparata	0:485458fca2bd	1017	} LSM303AGR_ACC_TR_t;
cparata	0:485458fca2bd	1018
cparata	0:485458fca2bd	1019	#define LSM303AGR_ACC_TR_MASK 0x20
cparata	0:485458fca2bd	1020	status_t LSM303AGR_ACC_W_TriggerSel(void *handle, LSM303AGR_ACC_TR_t newValue);
cparata	0:485458fca2bd	1021	status_t LSM303AGR_ACC_R_TriggerSel(void handle, LSM303AGR_ACC_TR_t value);
cparata	0:485458fca2bd	1022
cparata	0:485458fca2bd	1023	/*******************************************************************************
cparata	0:485458fca2bd	1024	* Register : FIFO_CTRL_REG
cparata	0:485458fca2bd	1025	* Address : 0X2E
cparata	0:485458fca2bd	1026	* Bit Group Name: FM
cparata	0:485458fca2bd	1027	* Permission : RW
cparata	0:485458fca2bd	1028	*******************************************************************************/
cparata	0:485458fca2bd	1029	typedef enum {
cparata	0:485458fca2bd	1030	LSM303AGR_ACC_FM_BYPASS =0x00,
cparata	0:485458fca2bd	1031	LSM303AGR_ACC_FM_FIFO =0x40,
cparata	0:485458fca2bd	1032	LSM303AGR_ACC_FM_STREAM =0x80,
cparata	0:485458fca2bd	1033	LSM303AGR_ACC_FM_TRIGGER =0xC0,
cparata	0:485458fca2bd	1034	} LSM303AGR_ACC_FM_t;
cparata	0:485458fca2bd	1035
cparata	0:485458fca2bd	1036	#define LSM303AGR_ACC_FM_MASK 0xC0
cparata	0:485458fca2bd	1037	status_t LSM303AGR_ACC_W_FifoMode(void *handle, LSM303AGR_ACC_FM_t newValue);
cparata	0:485458fca2bd	1038	status_t LSM303AGR_ACC_R_FifoMode(void handle, LSM303AGR_ACC_FM_t value);
cparata	0:485458fca2bd	1039
cparata	0:485458fca2bd	1040	/*******************************************************************************
cparata	0:485458fca2bd	1041	* Register : FIFO_SRC_REG
cparata	0:485458fca2bd	1042	* Address : 0X2F
cparata	0:485458fca2bd	1043	* Bit Group Name: FSS
cparata	0:485458fca2bd	1044	* Permission : RO
cparata	0:485458fca2bd	1045	*******************************************************************************/
cparata	0:485458fca2bd	1046	#define LSM303AGR_ACC_FSS_MASK 0x1F
cparata	0:485458fca2bd	1047	#define LSM303AGR_ACC_FSS_POSITION 0
cparata	0:485458fca2bd	1048	status_t LSM303AGR_ACC_R_FifoSamplesAvail(void handle, u8_t value);
cparata	0:485458fca2bd	1049
cparata	0:485458fca2bd	1050	/*******************************************************************************
cparata	0:485458fca2bd	1051	* Register : FIFO_SRC_REG
cparata	0:485458fca2bd	1052	* Address : 0X2F
cparata	0:485458fca2bd	1053	* Bit Group Name: EMPTY
cparata	0:485458fca2bd	1054	* Permission : RO
cparata	0:485458fca2bd	1055	*******************************************************************************/
cparata	0:485458fca2bd	1056	typedef enum {
cparata	0:485458fca2bd	1057	LSM303AGR_ACC_EMPTY_NOT_EMPTY =0x00,
cparata	0:485458fca2bd	1058	LSM303AGR_ACC_EMPTY_EMPTY =0x20,
cparata	0:485458fca2bd	1059	} LSM303AGR_ACC_EMPTY_t;
cparata	0:485458fca2bd	1060
cparata	0:485458fca2bd	1061	#define LSM303AGR_ACC_EMPTY_MASK 0x20
cparata	0:485458fca2bd	1062	status_t LSM303AGR_ACC_R_FifoEmpty(void handle, LSM303AGR_ACC_EMPTY_t value);
cparata	0:485458fca2bd	1063
cparata	0:485458fca2bd	1064	/*******************************************************************************
cparata	0:485458fca2bd	1065	* Register : FIFO_SRC_REG
cparata	0:485458fca2bd	1066	* Address : 0X2F
cparata	0:485458fca2bd	1067	* Bit Group Name: OVRN_FIFO
cparata	0:485458fca2bd	1068	* Permission : RO
cparata	0:485458fca2bd	1069	*******************************************************************************/
cparata	0:485458fca2bd	1070	typedef enum {
cparata	0:485458fca2bd	1071	LSM303AGR_ACC_OVRN_FIFO_NO_OVERRUN =0x00,
cparata	0:485458fca2bd	1072	LSM303AGR_ACC_OVRN_FIFO_OVERRUN =0x40,
cparata	0:485458fca2bd	1073	} LSM303AGR_ACC_OVRN_FIFO_t;
cparata	0:485458fca2bd	1074
cparata	0:485458fca2bd	1075	#define LSM303AGR_ACC_OVRN_FIFO_MASK 0x40
cparata	0:485458fca2bd	1076	status_t LSM303AGR_ACC_R_FifoOverrun(void handle, LSM303AGR_ACC_OVRN_FIFO_t value);
cparata	0:485458fca2bd	1077
cparata	0:485458fca2bd	1078	/*******************************************************************************
cparata	0:485458fca2bd	1079	* Register : FIFO_SRC_REG
cparata	0:485458fca2bd	1080	* Address : 0X2F
cparata	0:485458fca2bd	1081	* Bit Group Name: WTM
cparata	0:485458fca2bd	1082	* Permission : RO
cparata	0:485458fca2bd	1083	*******************************************************************************/
cparata	0:485458fca2bd	1084	typedef enum {
cparata	0:485458fca2bd	1085	LSM303AGR_ACC_WTM_NORMAL =0x00,
cparata	0:485458fca2bd	1086	LSM303AGR_ACC_WTM_OVERFLOW =0x80,
cparata	0:485458fca2bd	1087	} LSM303AGR_ACC_WTM_t;
cparata	0:485458fca2bd	1088
cparata	0:485458fca2bd	1089	#define LSM303AGR_ACC_WTM_MASK 0x80
cparata	0:485458fca2bd	1090	status_t LSM303AGR_ACC_R_WatermarkLevel(void handle, LSM303AGR_ACC_WTM_t value);
cparata	0:485458fca2bd	1091
cparata	0:485458fca2bd	1092	/*******************************************************************************
cparata	0:485458fca2bd	1093	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1094	* Address : 0X30/0x34
cparata	0:485458fca2bd	1095	* Bit Group Name: XLIE
cparata	0:485458fca2bd	1096	* Permission : RW
cparata	0:485458fca2bd	1097	*******************************************************************************/
cparata	0:485458fca2bd	1098	typedef enum {
cparata	0:485458fca2bd	1099	LSM303AGR_ACC_XLIE_DISABLED =0x00,
cparata	0:485458fca2bd	1100	LSM303AGR_ACC_XLIE_ENABLED =0x01,
cparata	0:485458fca2bd	1101	} LSM303AGR_ACC_XLIE_t;
cparata	0:485458fca2bd	1102
cparata	0:485458fca2bd	1103	#define LSM303AGR_ACC_XLIE_MASK 0x01
cparata	0:485458fca2bd	1104	status_t LSM303AGR_ACC_W_Int1EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue);
cparata	0:485458fca2bd	1105	status_t LSM303AGR_ACC_R_Int1EnXLo(void handle, LSM303AGR_ACC_XLIE_t value);
cparata	0:485458fca2bd	1106	status_t LSM303AGR_ACC_W_Int2EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue);
cparata	0:485458fca2bd	1107	status_t LSM303AGR_ACC_R_Int2EnXLo(void handle, LSM303AGR_ACC_XLIE_t value);
cparata	0:485458fca2bd	1108
cparata	0:485458fca2bd	1109	/*******************************************************************************
cparata	0:485458fca2bd	1110	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1111	* Address : 0X30/0x34
cparata	0:485458fca2bd	1112	* Bit Group Name: XHIE
cparata	0:485458fca2bd	1113	* Permission : RW
cparata	0:485458fca2bd	1114	*******************************************************************************/
cparata	0:485458fca2bd	1115	typedef enum {
cparata	0:485458fca2bd	1116	LSM303AGR_ACC_XHIE_DISABLED =0x00,
cparata	0:485458fca2bd	1117	LSM303AGR_ACC_XHIE_ENABLED =0x02,
cparata	0:485458fca2bd	1118	} LSM303AGR_ACC_XHIE_t;
cparata	0:485458fca2bd	1119
cparata	0:485458fca2bd	1120	#define LSM303AGR_ACC_XHIE_MASK 0x02
cparata	0:485458fca2bd	1121	status_t LSM303AGR_ACC_W_Int1EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue);
cparata	0:485458fca2bd	1122	status_t LSM303AGR_ACC_R_Int1EnXHi(void handle, LSM303AGR_ACC_XHIE_t value);
cparata	0:485458fca2bd	1123	status_t LSM303AGR_ACC_W_Int2EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue);
cparata	0:485458fca2bd	1124	status_t LSM303AGR_ACC_R_Int2EnXHi(void handle, LSM303AGR_ACC_XHIE_t value);
cparata	0:485458fca2bd	1125
cparata	0:485458fca2bd	1126	/*******************************************************************************
cparata	0:485458fca2bd	1127	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1128	* Address : 0X30/0x34
cparata	0:485458fca2bd	1129	* Bit Group Name: YLIE
cparata	0:485458fca2bd	1130	* Permission : RW
cparata	0:485458fca2bd	1131	*******************************************************************************/
cparata	0:485458fca2bd	1132	typedef enum {
cparata	0:485458fca2bd	1133	LSM303AGR_ACC_YLIE_DISABLED =0x00,
cparata	0:485458fca2bd	1134	LSM303AGR_ACC_YLIE_ENABLED =0x04,
cparata	0:485458fca2bd	1135	} LSM303AGR_ACC_YLIE_t;
cparata	0:485458fca2bd	1136
cparata	0:485458fca2bd	1137	#define LSM303AGR_ACC_YLIE_MASK 0x04
cparata	0:485458fca2bd	1138	status_t LSM303AGR_ACC_W_Int1EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue);
cparata	0:485458fca2bd	1139	status_t LSM303AGR_ACC_R_Int1EnYLo(void handle, LSM303AGR_ACC_YLIE_t value);
cparata	0:485458fca2bd	1140	status_t LSM303AGR_ACC_W_Int2EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue);
cparata	0:485458fca2bd	1141	status_t LSM303AGR_ACC_R_Int2EnYLo(void handle, LSM303AGR_ACC_YLIE_t value);
cparata	0:485458fca2bd	1142
cparata	0:485458fca2bd	1143	/*******************************************************************************
cparata	0:485458fca2bd	1144	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1145	* Address : 0X30/0x34
cparata	0:485458fca2bd	1146	* Bit Group Name: YHIE
cparata	0:485458fca2bd	1147	* Permission : RW
cparata	0:485458fca2bd	1148	*******************************************************************************/
cparata	0:485458fca2bd	1149	typedef enum {
cparata	0:485458fca2bd	1150	LSM303AGR_ACC_YHIE_DISABLED =0x00,
cparata	0:485458fca2bd	1151	LSM303AGR_ACC_YHIE_ENABLED =0x08,
cparata	0:485458fca2bd	1152	} LSM303AGR_ACC_YHIE_t;
cparata	0:485458fca2bd	1153
cparata	0:485458fca2bd	1154	#define LSM303AGR_ACC_YHIE_MASK 0x08
cparata	0:485458fca2bd	1155	status_t LSM303AGR_ACC_W_Int1EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue);
cparata	0:485458fca2bd	1156	status_t LSM303AGR_ACC_R_Int1EnYHi(void handle, LSM303AGR_ACC_YHIE_t value);
cparata	0:485458fca2bd	1157	status_t LSM303AGR_ACC_W_Int2EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue);
cparata	0:485458fca2bd	1158	status_t LSM303AGR_ACC_R_Int2EnYHi(void handle, LSM303AGR_ACC_YHIE_t value);
cparata	0:485458fca2bd	1159
cparata	0:485458fca2bd	1160	/*******************************************************************************
cparata	0:485458fca2bd	1161	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1162	* Address : 0X30/0x34
cparata	0:485458fca2bd	1163	* Bit Group Name: ZLIE
cparata	0:485458fca2bd	1164	* Permission : RW
cparata	0:485458fca2bd	1165	*******************************************************************************/
cparata	0:485458fca2bd	1166	typedef enum {
cparata	0:485458fca2bd	1167	LSM303AGR_ACC_ZLIE_DISABLED =0x00,
cparata	0:485458fca2bd	1168	LSM303AGR_ACC_ZLIE_ENABLED =0x10,
cparata	0:485458fca2bd	1169	} LSM303AGR_ACC_ZLIE_t;
cparata	0:485458fca2bd	1170
cparata	0:485458fca2bd	1171	#define LSM303AGR_ACC_ZLIE_MASK 0x10
cparata	0:485458fca2bd	1172	status_t LSM303AGR_ACC_W_Int1EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue);
cparata	0:485458fca2bd	1173	status_t LSM303AGR_ACC_R_Int1EnZLo(void handle, LSM303AGR_ACC_ZLIE_t value);
cparata	0:485458fca2bd	1174	status_t LSM303AGR_ACC_W_Int2EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue);
cparata	0:485458fca2bd	1175	status_t LSM303AGR_ACC_R_Int2EnZLo(void handle, LSM303AGR_ACC_ZLIE_t value);
cparata	0:485458fca2bd	1176
cparata	0:485458fca2bd	1177	/*******************************************************************************
cparata	0:485458fca2bd	1178	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1179	* Address : 0X30/0x34
cparata	0:485458fca2bd	1180	* Bit Group Name: ZHIE
cparata	0:485458fca2bd	1181	* Permission : RW
cparata	0:485458fca2bd	1182	*******************************************************************************/
cparata	0:485458fca2bd	1183	typedef enum {
cparata	0:485458fca2bd	1184	LSM303AGR_ACC_ZHIE_DISABLED =0x00,
cparata	0:485458fca2bd	1185	LSM303AGR_ACC_ZHIE_ENABLED =0x20,
cparata	0:485458fca2bd	1186	} LSM303AGR_ACC_ZHIE_t;
cparata	0:485458fca2bd	1187
cparata	0:485458fca2bd	1188	#define LSM303AGR_ACC_ZHIE_MASK 0x20
cparata	0:485458fca2bd	1189	status_t LSM303AGR_ACC_W_Int1EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue);
cparata	0:485458fca2bd	1190	status_t LSM303AGR_ACC_R_Int1EnZHi(void handle, LSM303AGR_ACC_ZHIE_t value);
cparata	0:485458fca2bd	1191	status_t LSM303AGR_ACC_W_Int2EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue);
cparata	0:485458fca2bd	1192	status_t LSM303AGR_ACC_R_Int2EnZHi(void handle, LSM303AGR_ACC_ZHIE_t value);
cparata	0:485458fca2bd	1193
cparata	0:485458fca2bd	1194	/*******************************************************************************
cparata	0:485458fca2bd	1195	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1196	* Address : 0X30/0x34
cparata	0:485458fca2bd	1197	* Bit Group Name: 6D
cparata	0:485458fca2bd	1198	* Permission : RW
cparata	0:485458fca2bd	1199	*******************************************************************************/
cparata	0:485458fca2bd	1200	typedef enum {
cparata	0:485458fca2bd	1201	LSM303AGR_ACC_6D_DISABLED =0x00,
cparata	0:485458fca2bd	1202	LSM303AGR_ACC_6D_ENABLED =0x40,
cparata	0:485458fca2bd	1203	} LSM303AGR_ACC_6D_t;
cparata	0:485458fca2bd	1204
cparata	0:485458fca2bd	1205	#define LSM303AGR_ACC_6D_MASK 0x40
cparata	0:485458fca2bd	1206	status_t LSM303AGR_ACC_W_Int1_6D(void *handle, LSM303AGR_ACC_6D_t newValue);
cparata	0:485458fca2bd	1207	status_t LSM303AGR_ACC_R_Int1_6D(void handle, LSM303AGR_ACC_6D_t value);
cparata	0:485458fca2bd	1208	status_t LSM303AGR_ACC_W_Int2_6D(void *handle, LSM303AGR_ACC_6D_t newValue);
cparata	0:485458fca2bd	1209	status_t LSM303AGR_ACC_R_Int2_6D(void handle, LSM303AGR_ACC_6D_t value);
cparata	0:485458fca2bd	1210
cparata	0:485458fca2bd	1211	/*******************************************************************************
cparata	0:485458fca2bd	1212	* Register : INT1_CFG/INT2_CFG
cparata	0:485458fca2bd	1213	* Address : 0X30/0x34
cparata	0:485458fca2bd	1214	* Bit Group Name: AOI
cparata	0:485458fca2bd	1215	* Permission : RW
cparata	0:485458fca2bd	1216	*******************************************************************************/
cparata	0:485458fca2bd	1217	typedef enum {
cparata	0:485458fca2bd	1218	LSM303AGR_ACC_AOI_OR =0x00,
cparata	0:485458fca2bd	1219	LSM303AGR_ACC_AOI_AND =0x80,
cparata	0:485458fca2bd	1220	} LSM303AGR_ACC_AOI_t;
cparata	0:485458fca2bd	1221
cparata	0:485458fca2bd	1222	#define LSM303AGR_ACC_AOI_MASK 0x80
cparata	0:485458fca2bd	1223	status_t LSM303AGR_ACC_W_Int1_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue);
cparata	0:485458fca2bd	1224	status_t LSM303AGR_ACC_R_Int1_AOI(void handle, LSM303AGR_ACC_AOI_t value);
cparata	0:485458fca2bd	1225	status_t LSM303AGR_ACC_W_Int2_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue);
cparata	0:485458fca2bd	1226	status_t LSM303AGR_ACC_R_Int2_AOI(void handle, LSM303AGR_ACC_AOI_t value);
cparata	0:485458fca2bd	1227
cparata	0:485458fca2bd	1228	/*******************************************************************************
cparata	0:485458fca2bd	1229	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1230	* Address : 0X31/0x35
cparata	0:485458fca2bd	1231	* Bit Group Name: XL
cparata	0:485458fca2bd	1232	* Permission : RO
cparata	0:485458fca2bd	1233	*******************************************************************************/
cparata	0:485458fca2bd	1234	typedef enum {
cparata	0:485458fca2bd	1235	LSM303AGR_ACC_XL_DOWN =0x00,
cparata	0:485458fca2bd	1236	LSM303AGR_ACC_XL_UP =0x01,
cparata	0:485458fca2bd	1237	} LSM303AGR_ACC_XL_t;
cparata	0:485458fca2bd	1238
cparata	0:485458fca2bd	1239	#define LSM303AGR_ACC_XL_MASK 0x01
cparata	0:485458fca2bd	1240	status_t LSM303AGR_ACC_R_Int1_Xlo(void handle, LSM303AGR_ACC_XL_t value);
cparata	0:485458fca2bd	1241	status_t LSM303AGR_ACC_R_Int2_Xlo(void handle, LSM303AGR_ACC_XL_t value);
cparata	0:485458fca2bd	1242
cparata	0:485458fca2bd	1243	/*******************************************************************************
cparata	0:485458fca2bd	1244	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1245	* Address : 0X31/0x35
cparata	0:485458fca2bd	1246	* Bit Group Name: XH
cparata	0:485458fca2bd	1247	* Permission : RO
cparata	0:485458fca2bd	1248	*******************************************************************************/
cparata	0:485458fca2bd	1249	typedef enum {
cparata	0:485458fca2bd	1250	LSM303AGR_ACC_XH_DOWN =0x00,
cparata	0:485458fca2bd	1251	LSM303AGR_ACC_XH_UP =0x02,
cparata	0:485458fca2bd	1252	} LSM303AGR_ACC_XH_t;
cparata	0:485458fca2bd	1253
cparata	0:485458fca2bd	1254	#define LSM303AGR_ACC_XH_MASK 0x02
cparata	0:485458fca2bd	1255	status_t LSM303AGR_ACC_R_Int1_XHi(void handle, LSM303AGR_ACC_XH_t value);
cparata	0:485458fca2bd	1256	status_t LSM303AGR_ACC_R_Int2_XHi(void handle, LSM303AGR_ACC_XH_t value);
cparata	0:485458fca2bd	1257
cparata	0:485458fca2bd	1258	/*******************************************************************************
cparata	0:485458fca2bd	1259	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1260	* Address : 0X31/0x35
cparata	0:485458fca2bd	1261	* Bit Group Name: YL
cparata	0:485458fca2bd	1262	* Permission : RO
cparata	0:485458fca2bd	1263	*******************************************************************************/
cparata	0:485458fca2bd	1264	typedef enum {
cparata	0:485458fca2bd	1265	LSM303AGR_ACC_YL_DOWN =0x00,
cparata	0:485458fca2bd	1266	LSM303AGR_ACC_YL_UP =0x04,
cparata	0:485458fca2bd	1267	} LSM303AGR_ACC_YL_t;
cparata	0:485458fca2bd	1268
cparata	0:485458fca2bd	1269	#define LSM303AGR_ACC_YL_MASK 0x04
cparata	0:485458fca2bd	1270	status_t LSM303AGR_ACC_R_Int1_YLo(void handle, LSM303AGR_ACC_YL_t value);
cparata	0:485458fca2bd	1271	status_t LSM303AGR_ACC_R_Int2_YLo(void handle, LSM303AGR_ACC_YL_t value);
cparata	0:485458fca2bd	1272
cparata	0:485458fca2bd	1273	/*******************************************************************************
cparata	0:485458fca2bd	1274	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1275	* Address : 0X31/0x35
cparata	0:485458fca2bd	1276	* Bit Group Name: YH
cparata	0:485458fca2bd	1277	* Permission : RO
cparata	0:485458fca2bd	1278	*******************************************************************************/
cparata	0:485458fca2bd	1279	typedef enum {
cparata	0:485458fca2bd	1280	LSM303AGR_ACC_YH_DOWN =0x00,
cparata	0:485458fca2bd	1281	LSM303AGR_ACC_YH_UP =0x08,
cparata	0:485458fca2bd	1282	} LSM303AGR_ACC_YH_t;
cparata	0:485458fca2bd	1283
cparata	0:485458fca2bd	1284	#define LSM303AGR_ACC_YH_MASK 0x08
cparata	0:485458fca2bd	1285	status_t LSM303AGR_ACC_R_Int1_YHi(void handle, LSM303AGR_ACC_YH_t value);
cparata	0:485458fca2bd	1286	status_t LSM303AGR_ACC_R_Int2_YHi(void handle, LSM303AGR_ACC_YH_t value);
cparata	0:485458fca2bd	1287
cparata	0:485458fca2bd	1288	/*******************************************************************************
cparata	0:485458fca2bd	1289	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1290	* Address : 0X31/0x35
cparata	0:485458fca2bd	1291	* Bit Group Name: ZL
cparata	0:485458fca2bd	1292	* Permission : RO
cparata	0:485458fca2bd	1293	*******************************************************************************/
cparata	0:485458fca2bd	1294	typedef enum {
cparata	0:485458fca2bd	1295	LSM303AGR_ACC_ZL_DOWN =0x00,
cparata	0:485458fca2bd	1296	LSM303AGR_ACC_ZL_UP =0x10,
cparata	0:485458fca2bd	1297	} LSM303AGR_ACC_ZL_t;
cparata	0:485458fca2bd	1298
cparata	0:485458fca2bd	1299	#define LSM303AGR_ACC_ZL_MASK 0x10
cparata	0:485458fca2bd	1300	status_t LSM303AGR_ACC_R_Int1_Zlo(void handle, LSM303AGR_ACC_ZL_t value);
cparata	0:485458fca2bd	1301	status_t LSM303AGR_ACC_R_Int2_Zlo(void handle, LSM303AGR_ACC_ZL_t value);
cparata	0:485458fca2bd	1302
cparata	0:485458fca2bd	1303	/*******************************************************************************
cparata	0:485458fca2bd	1304	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1305	* Address : 0X31/0x35
cparata	0:485458fca2bd	1306	* Bit Group Name: ZH
cparata	0:485458fca2bd	1307	* Permission : RO
cparata	0:485458fca2bd	1308	*******************************************************************************/
cparata	0:485458fca2bd	1309	typedef enum {
cparata	0:485458fca2bd	1310	LSM303AGR_ACC_ZH_DOWN =0x00,
cparata	0:485458fca2bd	1311	LSM303AGR_ACC_ZH_UP =0x20,
cparata	0:485458fca2bd	1312	} LSM303AGR_ACC_ZH_t;
cparata	0:485458fca2bd	1313
cparata	0:485458fca2bd	1314	#define LSM303AGR_ACC_ZH_MASK 0x20
cparata	0:485458fca2bd	1315	status_t LSM303AGR_ACC_R_Int1_ZHi(void handle, LSM303AGR_ACC_ZH_t value);
cparata	0:485458fca2bd	1316	status_t LSM303AGR_ACC_R_Int2_ZHi(void handle, LSM303AGR_ACC_ZH_t value);
cparata	0:485458fca2bd	1317
cparata	0:485458fca2bd	1318	/*******************************************************************************
cparata	0:485458fca2bd	1319	* Register : INT1_SOURCE/INT2_SOURCE
cparata	0:485458fca2bd	1320	* Address : 0X31/0x35
cparata	0:485458fca2bd	1321	* Bit Group Name: IA
cparata	0:485458fca2bd	1322	* Permission : RO
cparata	0:485458fca2bd	1323	*******************************************************************************/
cparata	0:485458fca2bd	1324	typedef enum {
cparata	0:485458fca2bd	1325	LSM303AGR_ACC_IA_DOWN =0x00,
cparata	0:485458fca2bd	1326	LSM303AGR_ACC_IA_UP =0x40,
cparata	0:485458fca2bd	1327	} LSM303AGR_ACC_IA_t;
cparata	0:485458fca2bd	1328
cparata	0:485458fca2bd	1329	#define LSM303AGR_ACC_IA_MASK 0x40
cparata	0:485458fca2bd	1330	status_t LSM303AGR_ACC_R_Int1_IA(void handle, LSM303AGR_ACC_IA_t value);
cparata	0:485458fca2bd	1331	status_t LSM303AGR_ACC_R_Int2_IA(void handle, LSM303AGR_ACC_IA_t value);
cparata	0:485458fca2bd	1332
cparata	0:485458fca2bd	1333	/*******************************************************************************
cparata	0:485458fca2bd	1334	* Register : INT1_THS/INT2_THS
cparata	0:485458fca2bd	1335	* Address : 0X32/0x36
cparata	0:485458fca2bd	1336	* Bit Group Name: THS
cparata	0:485458fca2bd	1337	* Permission : RW
cparata	0:485458fca2bd	1338	*******************************************************************************/
cparata	0:485458fca2bd	1339	#define LSM303AGR_ACC_THS_MASK 0x7F
cparata	0:485458fca2bd	1340	#define LSM303AGR_ACC_THS_POSITION 0
cparata	0:485458fca2bd	1341	status_t LSM303AGR_ACC_W_Int1_Threshold(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1342	status_t LSM303AGR_ACC_R_Int1_Threshold(void handle, u8_t value);
cparata	0:485458fca2bd	1343	status_t LSM303AGR_ACC_W_Int2_Threshold(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1344	status_t LSM303AGR_ACC_R_Int2_Threshold(void handle, u8_t value);
cparata	0:485458fca2bd	1345
cparata	0:485458fca2bd	1346	/*******************************************************************************
cparata	0:485458fca2bd	1347	* Register : INT1_DURATION/INT2_DURATION
cparata	0:485458fca2bd	1348	* Address : 0X33/0x37
cparata	0:485458fca2bd	1349	* Bit Group Name: D
cparata	0:485458fca2bd	1350	* Permission : RW
cparata	0:485458fca2bd	1351	*******************************************************************************/
cparata	0:485458fca2bd	1352	#define LSM303AGR_ACC_D_MASK 0x7F
cparata	0:485458fca2bd	1353	#define LSM303AGR_ACC_D_POSITION 0
cparata	0:485458fca2bd	1354	status_t LSM303AGR_ACC_W_Int1_Duration(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1355	status_t LSM303AGR_ACC_R_Int1_Duration(void handle, u8_t value);
cparata	0:485458fca2bd	1356	status_t LSM303AGR_ACC_W_Int2_Duration(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1357	status_t LSM303AGR_ACC_R_Int2_Duration(void handle, u8_t value);
cparata	0:485458fca2bd	1358
cparata	0:485458fca2bd	1359	/*******************************************************************************
cparata	0:485458fca2bd	1360	* Register : CLICK_CFG
cparata	0:485458fca2bd	1361	* Address : 0X38
cparata	0:485458fca2bd	1362	* Bit Group Name: XS
cparata	0:485458fca2bd	1363	* Permission : RW
cparata	0:485458fca2bd	1364	*******************************************************************************/
cparata	0:485458fca2bd	1365	typedef enum {
cparata	0:485458fca2bd	1366	LSM303AGR_ACC_XS_DISABLED =0x00,
cparata	0:485458fca2bd	1367	LSM303AGR_ACC_XS_ENABLED =0x01,
cparata	0:485458fca2bd	1368	} LSM303AGR_ACC_XS_t;
cparata	0:485458fca2bd	1369
cparata	0:485458fca2bd	1370	#define LSM303AGR_ACC_XS_MASK 0x01
cparata	0:485458fca2bd	1371	status_t LSM303AGR_ACC_W_XSingle(void *handle, LSM303AGR_ACC_XS_t newValue);
cparata	0:485458fca2bd	1372	status_t LSM303AGR_ACC_R_XSingle(void handle, LSM303AGR_ACC_XS_t value);
cparata	0:485458fca2bd	1373
cparata	0:485458fca2bd	1374	/*******************************************************************************
cparata	0:485458fca2bd	1375	* Register : CLICK_CFG
cparata	0:485458fca2bd	1376	* Address : 0X38
cparata	0:485458fca2bd	1377	* Bit Group Name: XD
cparata	0:485458fca2bd	1378	* Permission : RW
cparata	0:485458fca2bd	1379	*******************************************************************************/
cparata	0:485458fca2bd	1380	typedef enum {
cparata	0:485458fca2bd	1381	LSM303AGR_ACC_XD_DISABLED =0x00,
cparata	0:485458fca2bd	1382	LSM303AGR_ACC_XD_ENABLED =0x02,
cparata	0:485458fca2bd	1383	} LSM303AGR_ACC_XD_t;
cparata	0:485458fca2bd	1384
cparata	0:485458fca2bd	1385	#define LSM303AGR_ACC_XD_MASK 0x02
cparata	0:485458fca2bd	1386	status_t LSM303AGR_ACC_W_XDouble(void *handle, LSM303AGR_ACC_XD_t newValue);
cparata	0:485458fca2bd	1387	status_t LSM303AGR_ACC_R_XDouble(void handle, LSM303AGR_ACC_XD_t value);
cparata	0:485458fca2bd	1388
cparata	0:485458fca2bd	1389	/*******************************************************************************
cparata	0:485458fca2bd	1390	* Register : CLICK_CFG
cparata	0:485458fca2bd	1391	* Address : 0X38
cparata	0:485458fca2bd	1392	* Bit Group Name: YS
cparata	0:485458fca2bd	1393	* Permission : RW
cparata	0:485458fca2bd	1394	*******************************************************************************/
cparata	0:485458fca2bd	1395	typedef enum {
cparata	0:485458fca2bd	1396	LSM303AGR_ACC_YS_DISABLED =0x00,
cparata	0:485458fca2bd	1397	LSM303AGR_ACC_YS_ENABLED =0x04,
cparata	0:485458fca2bd	1398	} LSM303AGR_ACC_YS_t;
cparata	0:485458fca2bd	1399
cparata	0:485458fca2bd	1400	#define LSM303AGR_ACC_YS_MASK 0x04
cparata	0:485458fca2bd	1401	status_t LSM303AGR_ACC_W_YSingle(void *handle, LSM303AGR_ACC_YS_t newValue);
cparata	0:485458fca2bd	1402	status_t LSM303AGR_ACC_R_YSingle(void handle, LSM303AGR_ACC_YS_t value);
cparata	0:485458fca2bd	1403
cparata	0:485458fca2bd	1404	/*******************************************************************************
cparata	0:485458fca2bd	1405	* Register : CLICK_CFG
cparata	0:485458fca2bd	1406	* Address : 0X38
cparata	0:485458fca2bd	1407	* Bit Group Name: YD
cparata	0:485458fca2bd	1408	* Permission : RW
cparata	0:485458fca2bd	1409	*******************************************************************************/
cparata	0:485458fca2bd	1410	typedef enum {
cparata	0:485458fca2bd	1411	LSM303AGR_ACC_YD_DISABLED =0x00,
cparata	0:485458fca2bd	1412	LSM303AGR_ACC_YD_ENABLED =0x08,
cparata	0:485458fca2bd	1413	} LSM303AGR_ACC_YD_t;
cparata	0:485458fca2bd	1414
cparata	0:485458fca2bd	1415	#define LSM303AGR_ACC_YD_MASK 0x08
cparata	0:485458fca2bd	1416	status_t LSM303AGR_ACC_W_YDouble(void *handle, LSM303AGR_ACC_YD_t newValue);
cparata	0:485458fca2bd	1417	status_t LSM303AGR_ACC_R_YDouble(void handle, LSM303AGR_ACC_YD_t value);
cparata	0:485458fca2bd	1418
cparata	0:485458fca2bd	1419	/*******************************************************************************
cparata	0:485458fca2bd	1420	* Register : CLICK_CFG
cparata	0:485458fca2bd	1421	* Address : 0X38
cparata	0:485458fca2bd	1422	* Bit Group Name: ZS
cparata	0:485458fca2bd	1423	* Permission : RW
cparata	0:485458fca2bd	1424	*******************************************************************************/
cparata	0:485458fca2bd	1425	typedef enum {
cparata	0:485458fca2bd	1426	LSM303AGR_ACC_ZS_DISABLED =0x00,
cparata	0:485458fca2bd	1427	LSM303AGR_ACC_ZS_ENABLED =0x10,
cparata	0:485458fca2bd	1428	} LSM303AGR_ACC_ZS_t;
cparata	0:485458fca2bd	1429
cparata	0:485458fca2bd	1430	#define LSM303AGR_ACC_ZS_MASK 0x10
cparata	0:485458fca2bd	1431	status_t LSM303AGR_ACC_W_ZSingle(void *handle, LSM303AGR_ACC_ZS_t newValue);
cparata	0:485458fca2bd	1432	status_t LSM303AGR_ACC_R_ZSingle(void handle, LSM303AGR_ACC_ZS_t value);
cparata	0:485458fca2bd	1433
cparata	0:485458fca2bd	1434	/*******************************************************************************
cparata	0:485458fca2bd	1435	* Register : CLICK_CFG
cparata	0:485458fca2bd	1436	* Address : 0X38
cparata	0:485458fca2bd	1437	* Bit Group Name: ZD
cparata	0:485458fca2bd	1438	* Permission : RW
cparata	0:485458fca2bd	1439	*******************************************************************************/
cparata	0:485458fca2bd	1440	typedef enum {
cparata	0:485458fca2bd	1441	LSM303AGR_ACC_ZD_DISABLED =0x00,
cparata	0:485458fca2bd	1442	LSM303AGR_ACC_ZD_ENABLED =0x20,
cparata	0:485458fca2bd	1443	} LSM303AGR_ACC_ZD_t;
cparata	0:485458fca2bd	1444
cparata	0:485458fca2bd	1445	#define LSM303AGR_ACC_ZD_MASK 0x20
cparata	0:485458fca2bd	1446	status_t LSM303AGR_ACC_W_ZDouble(void *handle, LSM303AGR_ACC_ZD_t newValue);
cparata	0:485458fca2bd	1447	status_t LSM303AGR_ACC_R_ZDouble(void handle, LSM303AGR_ACC_ZD_t value);
cparata	0:485458fca2bd	1448
cparata	0:485458fca2bd	1449	/*******************************************************************************
cparata	0:485458fca2bd	1450	* Register : CLICK_SRC
cparata	0:485458fca2bd	1451	* Address : 0X39
cparata	0:485458fca2bd	1452	* Bit Group Name: X
cparata	0:485458fca2bd	1453	* Permission : RO
cparata	0:485458fca2bd	1454	*******************************************************************************/
cparata	0:485458fca2bd	1455	typedef enum {
cparata	0:485458fca2bd	1456	LSM303AGR_ACC_X_DOWN =0x00,
cparata	0:485458fca2bd	1457	LSM303AGR_ACC_X_UP =0x01,
cparata	0:485458fca2bd	1458	} LSM303AGR_ACC_X_t;
cparata	0:485458fca2bd	1459
cparata	0:485458fca2bd	1460	#define LSM303AGR_ACC_X_MASK 0x01
cparata	0:485458fca2bd	1461	status_t LSM303AGR_ACC_R_ClickX(void handle, LSM303AGR_ACC_X_t value);
cparata	0:485458fca2bd	1462
cparata	0:485458fca2bd	1463	/*******************************************************************************
cparata	0:485458fca2bd	1464	* Register : CLICK_SRC
cparata	0:485458fca2bd	1465	* Address : 0X39
cparata	0:485458fca2bd	1466	* Bit Group Name: Y
cparata	0:485458fca2bd	1467	* Permission : RO
cparata	0:485458fca2bd	1468	*******************************************************************************/
cparata	0:485458fca2bd	1469	typedef enum {
cparata	0:485458fca2bd	1470	LSM303AGR_ACC_Y_DOWN =0x00,
cparata	0:485458fca2bd	1471	LSM303AGR_ACC_Y_UP =0x02,
cparata	0:485458fca2bd	1472	} LSM303AGR_ACC_Y_t;
cparata	0:485458fca2bd	1473
cparata	0:485458fca2bd	1474	#define LSM303AGR_ACC_Y_MASK 0x02
cparata	0:485458fca2bd	1475	status_t LSM303AGR_ACC_R_ClickY(void handle, LSM303AGR_ACC_Y_t value);
cparata	0:485458fca2bd	1476
cparata	0:485458fca2bd	1477	/*******************************************************************************
cparata	0:485458fca2bd	1478	* Register : CLICK_SRC
cparata	0:485458fca2bd	1479	* Address : 0X39
cparata	0:485458fca2bd	1480	* Bit Group Name: Z
cparata	0:485458fca2bd	1481	* Permission : RO
cparata	0:485458fca2bd	1482	*******************************************************************************/
cparata	0:485458fca2bd	1483	typedef enum {
cparata	0:485458fca2bd	1484	LSM303AGR_ACC_Z_DOWN =0x00,
cparata	0:485458fca2bd	1485	LSM303AGR_ACC_Z_UP =0x04,
cparata	0:485458fca2bd	1486	} LSM303AGR_ACC_Z_t;
cparata	0:485458fca2bd	1487
cparata	0:485458fca2bd	1488	#define LSM303AGR_ACC_Z_MASK 0x04
cparata	0:485458fca2bd	1489	status_t LSM303AGR_ACC_R_ClickZ(void handle, LSM303AGR_ACC_Z_t value);
cparata	0:485458fca2bd	1490
cparata	0:485458fca2bd	1491	/*******************************************************************************
cparata	0:485458fca2bd	1492	* Register : CLICK_SRC
cparata	0:485458fca2bd	1493	* Address : 0X39
cparata	0:485458fca2bd	1494	* Bit Group Name: SIGN
cparata	0:485458fca2bd	1495	* Permission : RO
cparata	0:485458fca2bd	1496	*******************************************************************************/
cparata	0:485458fca2bd	1497	typedef enum {
cparata	0:485458fca2bd	1498	LSM303AGR_ACC_SIGN_POSITIVE =0x00,
cparata	0:485458fca2bd	1499	LSM303AGR_ACC_SIGN_NEGATIVE =0x08,
cparata	0:485458fca2bd	1500	} LSM303AGR_ACC_SIGN_t;
cparata	0:485458fca2bd	1501
cparata	0:485458fca2bd	1502	#define LSM303AGR_ACC_SIGN_MASK 0x08
cparata	0:485458fca2bd	1503	status_t LSM303AGR_ACC_R_ClickSign(void handle, LSM303AGR_ACC_SIGN_t value);
cparata	0:485458fca2bd	1504
cparata	0:485458fca2bd	1505	/*******************************************************************************
cparata	0:485458fca2bd	1506	* Register : CLICK_SRC
cparata	0:485458fca2bd	1507	* Address : 0X39
cparata	0:485458fca2bd	1508	* Bit Group Name: SCLICK
cparata	0:485458fca2bd	1509	* Permission : RO
cparata	0:485458fca2bd	1510	*******************************************************************************/
cparata	0:485458fca2bd	1511	typedef enum {
cparata	0:485458fca2bd	1512	LSM303AGR_ACC_SCLICK_DISABLED =0x00,
cparata	0:485458fca2bd	1513	LSM303AGR_ACC_SCLICK_ENABLED =0x10,
cparata	0:485458fca2bd	1514	} LSM303AGR_ACC_SCLICK_t;
cparata	0:485458fca2bd	1515
cparata	0:485458fca2bd	1516	#define LSM303AGR_ACC_SCLICK_MASK 0x10
cparata	0:485458fca2bd	1517	status_t LSM303AGR_ACC_R_SingleCLICK(void handle, LSM303AGR_ACC_SCLICK_t value);
cparata	0:485458fca2bd	1518
cparata	0:485458fca2bd	1519	/*******************************************************************************
cparata	0:485458fca2bd	1520	* Register : CLICK_SRC
cparata	0:485458fca2bd	1521	* Address : 0X39
cparata	0:485458fca2bd	1522	* Bit Group Name: DCLICK
cparata	0:485458fca2bd	1523	* Permission : RO
cparata	0:485458fca2bd	1524	*******************************************************************************/
cparata	0:485458fca2bd	1525	typedef enum {
cparata	0:485458fca2bd	1526	LSM303AGR_ACC_DCLICK_DISABLED =0x00,
cparata	0:485458fca2bd	1527	LSM303AGR_ACC_DCLICK_ENABLED =0x20,
cparata	0:485458fca2bd	1528	} LSM303AGR_ACC_DCLICK_t;
cparata	0:485458fca2bd	1529
cparata	0:485458fca2bd	1530	#define LSM303AGR_ACC_DCLICK_MASK 0x20
cparata	0:485458fca2bd	1531	status_t LSM303AGR_ACC_R_DoubleCLICK(void handle, LSM303AGR_ACC_DCLICK_t value);
cparata	0:485458fca2bd	1532
cparata	0:485458fca2bd	1533	/*******************************************************************************
cparata	0:485458fca2bd	1534	* Register : CLICK_SRC
cparata	0:485458fca2bd	1535	* Address : 0X39
cparata	0:485458fca2bd	1536	* Bit Group Name: IA
cparata	0:485458fca2bd	1537	* Permission : RO
cparata	0:485458fca2bd	1538	*******************************************************************************/
cparata	0:485458fca2bd	1539	typedef enum {
cparata	0:485458fca2bd	1540	LSM303AGR_ACC_CLICK_IA_DOWN =0x00,
cparata	0:485458fca2bd	1541	LSM303AGR_ACC_CLICK_IA_UP =0x40,
cparata	0:485458fca2bd	1542	} LSM303AGR_ACC_CLICK_IA_t;
cparata	0:485458fca2bd	1543
cparata	0:485458fca2bd	1544	#define LSM303AGR_ACC_IA_MASK 0x40
cparata	0:485458fca2bd	1545	status_t LSM303AGR_ACC_R_CLICK_IA(void handle, LSM303AGR_ACC_CLICK_IA_t value);
cparata	0:485458fca2bd	1546
cparata	0:485458fca2bd	1547	/*******************************************************************************
cparata	0:485458fca2bd	1548	* Register : CLICK_THS
cparata	0:485458fca2bd	1549	* Address : 0X3A
cparata	0:485458fca2bd	1550	* Bit Group Name: THS
cparata	0:485458fca2bd	1551	* Permission : RW
cparata	0:485458fca2bd	1552	*******************************************************************************/
cparata	0:485458fca2bd	1553	#define LSM303AGR_ACC_THS_MASK 0x7F
cparata	0:485458fca2bd	1554	#define LSM303AGR_ACC_THS_POSITION 0
cparata	0:485458fca2bd	1555	status_t LSM303AGR_ACC_W_ClickThreshold(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1556	status_t LSM303AGR_ACC_R_ClickThreshold(void handle, u8_t value);
cparata	0:485458fca2bd	1557
cparata	0:485458fca2bd	1558	/*******************************************************************************
cparata	0:485458fca2bd	1559	* Register : TIME_LIMIT
cparata	0:485458fca2bd	1560	* Address : 0X3B
cparata	0:485458fca2bd	1561	* Bit Group Name: TLI
cparata	0:485458fca2bd	1562	* Permission : RW
cparata	0:485458fca2bd	1563	*******************************************************************************/
cparata	0:485458fca2bd	1564	#define LSM303AGR_ACC_TLI_MASK 0x7F
cparata	0:485458fca2bd	1565	#define LSM303AGR_ACC_TLI_POSITION 0
cparata	0:485458fca2bd	1566	status_t LSM303AGR_ACC_W_ClickTimeLimit(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1567	status_t LSM303AGR_ACC_R_ClickTimeLimit(void handle, u8_t value);
cparata	0:485458fca2bd	1568
cparata	0:485458fca2bd	1569	/*******************************************************************************
cparata	0:485458fca2bd	1570	* Register : TIME_LATENCY
cparata	0:485458fca2bd	1571	* Address : 0X3C
cparata	0:485458fca2bd	1572	* Bit Group Name: TLA
cparata	0:485458fca2bd	1573	* Permission : RW
cparata	0:485458fca2bd	1574	*******************************************************************************/
cparata	0:485458fca2bd	1575	#define LSM303AGR_ACC_TLA_MASK 0xFF
cparata	0:485458fca2bd	1576	#define LSM303AGR_ACC_TLA_POSITION 0
cparata	0:485458fca2bd	1577	status_t LSM303AGR_ACC_W_ClickTimeLatency(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1578	status_t LSM303AGR_ACC_R_ClickTimeLatency(void handle, u8_t value);
cparata	0:485458fca2bd	1579
cparata	0:485458fca2bd	1580	/*******************************************************************************
cparata	0:485458fca2bd	1581	* Register : TIME_WINDOW
cparata	0:485458fca2bd	1582	* Address : 0X3D
cparata	0:485458fca2bd	1583	* Bit Group Name: TW
cparata	0:485458fca2bd	1584	* Permission : RW
cparata	0:485458fca2bd	1585	*******************************************************************************/
cparata	0:485458fca2bd	1586	#define LSM303AGR_ACC_TW_MASK 0xFF
cparata	0:485458fca2bd	1587	#define LSM303AGR_ACC_TW_POSITION 0
cparata	0:485458fca2bd	1588	status_t LSM303AGR_ACC_W_ClickTimeWindow(void *handle, u8_t newValue);
cparata	0:485458fca2bd	1589	status_t LSM303AGR_ACC_R_ClickTimeWindow(void handle, u8_t value);
cparata	0:485458fca2bd	1590	/*******************************************************************************
cparata	0:485458fca2bd	1591	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	1592	* Output Type : Voltage_ADC
cparata	0:485458fca2bd	1593	* Permission : RO
cparata	0:485458fca2bd	1594	*******************************************************************************/
cparata	0:485458fca2bd	1595	status_t LSM303AGR_ACC_Get_Voltage_ADC(void handle, u8_t buff);
cparata	0:485458fca2bd	1596	/*******************************************************************************
cparata	0:485458fca2bd	1597	* Register : <REGISTER_L> - <REGISTER_H>
cparata	0:485458fca2bd	1598	* Output Type : Acceleration
cparata	0:485458fca2bd	1599	* Permission : RO
cparata	0:485458fca2bd	1600	*******************************************************************************/
cparata	0:485458fca2bd	1601	status_t LSM303AGR_ACC_Get_Raw_Acceleration(void handle, u8_t buff);
cparata	0:485458fca2bd	1602	status_t LSM303AGR_ACC_Get_Acceleration(void handle, int buff);
cparata	0:485458fca2bd	1603
cparata	0:485458fca2bd	1604	#ifdef __cplusplus
cparata	0:485458fca2bd	1605	}
cparata	0:485458fca2bd	1606	#endif
cparata	0:485458fca2bd	1607
cparata	0:485458fca2bd	1608	#endif

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	16 Dec 2016
Imports:	440
Forks:	1
Commits:	17
Dependents:	0
Dependencies:	2
Followers:	406

The code in this repository is Apache licensed.

6D Orientation Demo Application based on sensor expansion board X-NUCLEO-IKS01A2

X_NUCLEO_IKS01A2/Components/LSM303AGRSensor/LSM303AGR_ACC_driver.h@2:ae74845fa96a, 2016-08-19 (annotated)

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