Example of 6D orientation recognition for LSM6DSL in X-NUCLEO-IKS01A2
Dependencies: X_NUCLEO_IKS01A2 mbed
Fork of 6DOrientation_IKS01A2 by
6D Orientation Demo Application based on sensor expansion board X-NUCLEO-IKS01A2
Main function is to show how to use sensor expansion board to find out the 6D orientation and send data using UART to a connected PC or Desktop and display it on terminal applications like TeraTerm.
After connection has been established:
- the user can rotate the board to change the 6D orientation and then view the data using an hyper terminal.
- the user button can be used to display the current 6D orientation.
X_NUCLEO_IKS01A2/Components/HTS221Sensor/HTS221_Driver.h@2:ae74845fa96a, 2016-08-19 (annotated)
- Committer:
- cparata
- Date:
- Fri Aug 19 12:23:23 2016 +0000
- Revision:
- 2:ae74845fa96a
- Parent:
- 0:485458fca2bd
Add interfaces to all components
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| cparata | 0:485458fca2bd | 1 | /** |
| cparata | 0:485458fca2bd | 2 | ****************************************************************************** |
| cparata | 0:485458fca2bd | 3 | * @file HTS221_Driver.h |
| cparata | 0:485458fca2bd | 4 | * @author HESA Application Team |
| cparata | 0:485458fca2bd | 5 | * @version V1.1 |
| cparata | 0:485458fca2bd | 6 | * @date 10-August-2016 |
| cparata | 0:485458fca2bd | 7 | * @brief HTS221 driver header file |
| cparata | 0:485458fca2bd | 8 | ****************************************************************************** |
| cparata | 0:485458fca2bd | 9 | * @attention |
| cparata | 0:485458fca2bd | 10 | * |
| cparata | 0:485458fca2bd | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| cparata | 0:485458fca2bd | 12 | * |
| cparata | 0:485458fca2bd | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| cparata | 0:485458fca2bd | 14 | * are permitted provided that the following conditions are met: |
| cparata | 0:485458fca2bd | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| cparata | 0:485458fca2bd | 16 | * this list of conditions and the following disclaimer. |
| cparata | 0:485458fca2bd | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| cparata | 0:485458fca2bd | 18 | * this list of conditions and the following disclaimer in the documentation |
| cparata | 0:485458fca2bd | 19 | * and/or other materials provided with the distribution. |
| cparata | 0:485458fca2bd | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| cparata | 0:485458fca2bd | 21 | * may be used to endorse or promote products derived from this software |
| cparata | 0:485458fca2bd | 22 | * without specific prior written permission. |
| cparata | 0:485458fca2bd | 23 | * |
| cparata | 0:485458fca2bd | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| cparata | 0:485458fca2bd | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| cparata | 0:485458fca2bd | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| cparata | 0:485458fca2bd | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| cparata | 0:485458fca2bd | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| cparata | 0:485458fca2bd | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| cparata | 0:485458fca2bd | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| cparata | 0:485458fca2bd | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| cparata | 0:485458fca2bd | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| cparata | 0:485458fca2bd | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| cparata | 0:485458fca2bd | 34 | * |
| cparata | 0:485458fca2bd | 35 | ****************************************************************************** |
| cparata | 0:485458fca2bd | 36 | */ |
| cparata | 0:485458fca2bd | 37 | |
| cparata | 0:485458fca2bd | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| cparata | 0:485458fca2bd | 39 | #ifndef __HTS221_DRIVER__H |
| cparata | 0:485458fca2bd | 40 | #define __HTS221_DRIVER__H |
| cparata | 0:485458fca2bd | 41 | |
| cparata | 0:485458fca2bd | 42 | #include <stdint.h> |
| cparata | 0:485458fca2bd | 43 | |
| cparata | 0:485458fca2bd | 44 | #ifdef __cplusplus |
| cparata | 0:485458fca2bd | 45 | extern "C" { |
| cparata | 0:485458fca2bd | 46 | #endif |
| cparata | 0:485458fca2bd | 47 | |
| cparata | 0:485458fca2bd | 48 | /* Uncomment the line below to expanse the "assert_param" macro in the drivers code */ |
| cparata | 0:485458fca2bd | 49 | #define USE_FULL_ASSERT_HTS221 |
| cparata | 0:485458fca2bd | 50 | |
| cparata | 0:485458fca2bd | 51 | /* Exported macro ------------------------------------------------------------*/ |
| cparata | 0:485458fca2bd | 52 | #ifdef USE_FULL_ASSERT_HTS221 |
| cparata | 0:485458fca2bd | 53 | |
| cparata | 0:485458fca2bd | 54 | /** |
| cparata | 0:485458fca2bd | 55 | * @brief The assert_param macro is used for function's parameters check. |
| cparata | 0:485458fca2bd | 56 | * @param expr: If expr is false, it calls assert_failed function which reports |
| cparata | 0:485458fca2bd | 57 | * the name of the source file and the source line number of the call |
| cparata | 0:485458fca2bd | 58 | * that failed. If expr is true, it returns no value. |
| cparata | 0:485458fca2bd | 59 | * @retval None |
| cparata | 0:485458fca2bd | 60 | */ |
| cparata | 0:485458fca2bd | 61 | #define HTS221_assert_param(expr) ((expr) ? (void)0 : HTS221_assert_failed((uint8_t *)__FILE__, __LINE__)) |
| cparata | 0:485458fca2bd | 62 | /* Exported functions ------------------------------------------------------- */ |
| cparata | 0:485458fca2bd | 63 | void HTS221_assert_failed(uint8_t* file, uint32_t line); |
| cparata | 0:485458fca2bd | 64 | #else |
| cparata | 0:485458fca2bd | 65 | #define HTS221_assert_param(expr) ((void)0) |
| cparata | 0:485458fca2bd | 66 | #endif /* USE_FULL_ASSERT_HTS221 */ |
| cparata | 0:485458fca2bd | 67 | |
| cparata | 0:485458fca2bd | 68 | /** @addtogroup Environmental_Sensor |
| cparata | 0:485458fca2bd | 69 | * @{ |
| cparata | 0:485458fca2bd | 70 | */ |
| cparata | 0:485458fca2bd | 71 | |
| cparata | 0:485458fca2bd | 72 | /** @addtogroup HTS221_DRIVER |
| cparata | 0:485458fca2bd | 73 | * @{ |
| cparata | 0:485458fca2bd | 74 | */ |
| cparata | 0:485458fca2bd | 75 | |
| cparata | 0:485458fca2bd | 76 | /* Exported Types -------------------------------------------------------------*/ |
| cparata | 0:485458fca2bd | 77 | /** @defgroup HTS221_Exported_Types |
| cparata | 0:485458fca2bd | 78 | * @{ |
| cparata | 0:485458fca2bd | 79 | */ |
| cparata | 0:485458fca2bd | 80 | |
| cparata | 0:485458fca2bd | 81 | |
| cparata | 0:485458fca2bd | 82 | /** |
| cparata | 0:485458fca2bd | 83 | * @brief Error code type. |
| cparata | 0:485458fca2bd | 84 | */ |
| cparata | 0:485458fca2bd | 85 | typedef enum {HTS221_OK = (uint8_t)0, HTS221_ERROR = !HTS221_OK} HTS221_Error_et; |
| cparata | 0:485458fca2bd | 86 | |
| cparata | 0:485458fca2bd | 87 | /** |
| cparata | 0:485458fca2bd | 88 | * @brief State type. |
| cparata | 0:485458fca2bd | 89 | */ |
| cparata | 0:485458fca2bd | 90 | typedef enum {HTS221_DISABLE = (uint8_t)0, HTS221_ENABLE = !HTS221_DISABLE} HTS221_State_et; |
| cparata | 0:485458fca2bd | 91 | #define IS_HTS221_State(MODE) ((MODE == HTS221_ENABLE) || (MODE == HTS221_DISABLE)) |
| cparata | 0:485458fca2bd | 92 | |
| cparata | 0:485458fca2bd | 93 | /** |
| cparata | 0:485458fca2bd | 94 | * @brief Bit status type. |
| cparata | 0:485458fca2bd | 95 | */ |
| cparata | 0:485458fca2bd | 96 | typedef enum {HTS221_RESET = (uint8_t)0, HTS221_SET = !HTS221_RESET} HTS221_BitStatus_et; |
| cparata | 0:485458fca2bd | 97 | #define IS_HTS221_BitStatus(MODE) ((MODE == HTS221_RESET) || (MODE == HTS221_SET)) |
| cparata | 0:485458fca2bd | 98 | |
| cparata | 0:485458fca2bd | 99 | /** |
| cparata | 0:485458fca2bd | 100 | * @brief Humidity average. |
| cparata | 0:485458fca2bd | 101 | */ |
| cparata | 0:485458fca2bd | 102 | typedef enum |
| cparata | 0:485458fca2bd | 103 | { |
| cparata | 0:485458fca2bd | 104 | HTS221_AVGH_4 = (uint8_t)0x00, /*!< Internal average on 4 samples */ |
| cparata | 0:485458fca2bd | 105 | HTS221_AVGH_8 = (uint8_t)0x01, /*!< Internal average on 8 samples */ |
| cparata | 0:485458fca2bd | 106 | HTS221_AVGH_16 = (uint8_t)0x02, /*!< Internal average on 16 samples */ |
| cparata | 0:485458fca2bd | 107 | HTS221_AVGH_32 = (uint8_t)0x03, /*!< Internal average on 32 samples */ |
| cparata | 0:485458fca2bd | 108 | HTS221_AVGH_64 = (uint8_t)0x04, /*!< Internal average on 64 samples */ |
| cparata | 0:485458fca2bd | 109 | HTS221_AVGH_128 = (uint8_t)0x05, /*!< Internal average on 128 samples */ |
| cparata | 0:485458fca2bd | 110 | HTS221_AVGH_256 = (uint8_t)0x06, /*!< Internal average on 256 samples */ |
| cparata | 0:485458fca2bd | 111 | HTS221_AVGH_512 = (uint8_t)0x07 /*!< Internal average on 512 samples */ |
| cparata | 0:485458fca2bd | 112 | } HTS221_Avgh_et; |
| cparata | 0:485458fca2bd | 113 | #define IS_HTS221_AVGH(AVGH) ((AVGH == HTS221_AVGH_4) || (AVGH == HTS221_AVGH_8) || \ |
| cparata | 0:485458fca2bd | 114 | (AVGH == HTS221_AVGH_16) || (AVGH == HTS221_AVGH_32) || \ |
| cparata | 0:485458fca2bd | 115 | (AVGH == HTS221_AVGH_64) || (AVGH == HTS221_AVGH_128) || \ |
| cparata | 0:485458fca2bd | 116 | (AVGH == HTS221_AVGH_256) || (AVGH == HTS221_AVGH_512)) |
| cparata | 0:485458fca2bd | 117 | |
| cparata | 0:485458fca2bd | 118 | /** |
| cparata | 0:485458fca2bd | 119 | * @brief Temperature average. |
| cparata | 0:485458fca2bd | 120 | */ |
| cparata | 0:485458fca2bd | 121 | typedef enum |
| cparata | 0:485458fca2bd | 122 | { |
| cparata | 0:485458fca2bd | 123 | HTS221_AVGT_2 = (uint8_t)0x00, /*!< Internal average on 2 samples */ |
| cparata | 0:485458fca2bd | 124 | HTS221_AVGT_4 = (uint8_t)0x08, /*!< Internal average on 4 samples */ |
| cparata | 0:485458fca2bd | 125 | HTS221_AVGT_8 = (uint8_t)0x10, /*!< Internal average on 8 samples */ |
| cparata | 0:485458fca2bd | 126 | HTS221_AVGT_16 = (uint8_t)0x18, /*!< Internal average on 16 samples */ |
| cparata | 0:485458fca2bd | 127 | HTS221_AVGT_32 = (uint8_t)0x20, /*!< Internal average on 32 samples */ |
| cparata | 0:485458fca2bd | 128 | HTS221_AVGT_64 = (uint8_t)0x28, /*!< Internal average on 64 samples */ |
| cparata | 0:485458fca2bd | 129 | HTS221_AVGT_128 = (uint8_t)0x30, /*!< Internal average on 128 samples */ |
| cparata | 0:485458fca2bd | 130 | HTS221_AVGT_256 = (uint8_t)0x38 /*!< Internal average on 256 samples */ |
| cparata | 0:485458fca2bd | 131 | } HTS221_Avgt_et; |
| cparata | 0:485458fca2bd | 132 | #define IS_HTS221_AVGT(AVGT) ((AVGT == HTS221_AVGT_2) || (AVGT == HTS221_AVGT_4) || \ |
| cparata | 0:485458fca2bd | 133 | (AVGT == HTS221_AVGT_8) || (AVGT == HTS221_AVGT_16) || \ |
| cparata | 0:485458fca2bd | 134 | (AVGT == HTS221_AVGT_32) || (AVGT == HTS221_AVGT_64) || \ |
| cparata | 0:485458fca2bd | 135 | (AVGT == HTS221_AVGT_128) || (AVGT == HTS221_AVGT_256)) |
| cparata | 0:485458fca2bd | 136 | |
| cparata | 0:485458fca2bd | 137 | /** |
| cparata | 0:485458fca2bd | 138 | * @brief Output data rate configuration. |
| cparata | 0:485458fca2bd | 139 | */ |
| cparata | 0:485458fca2bd | 140 | typedef enum |
| cparata | 0:485458fca2bd | 141 | { |
| cparata | 0:485458fca2bd | 142 | HTS221_ODR_ONE_SHOT = (uint8_t)0x00, /*!< Output Data Rate: one shot */ |
| cparata | 0:485458fca2bd | 143 | HTS221_ODR_1HZ = (uint8_t)0x01, /*!< Output Data Rate: 1Hz */ |
| cparata | 0:485458fca2bd | 144 | HTS221_ODR_7HZ = (uint8_t)0x02, /*!< Output Data Rate: 7Hz */ |
| cparata | 0:485458fca2bd | 145 | HTS221_ODR_12_5HZ = (uint8_t)0x03, /*!< Output Data Rate: 12.5Hz */ |
| cparata | 0:485458fca2bd | 146 | } HTS221_Odr_et; |
| cparata | 0:485458fca2bd | 147 | #define IS_HTS221_ODR(ODR) ((ODR == HTS221_ODR_ONE_SHOT) || (ODR == HTS221_ODR_1HZ) || \ |
| cparata | 0:485458fca2bd | 148 | (ODR == HTS221_ODR_7HZ) || (ODR == HTS221_ODR_12_5HZ)) |
| cparata | 0:485458fca2bd | 149 | |
| cparata | 0:485458fca2bd | 150 | |
| cparata | 0:485458fca2bd | 151 | /** |
| cparata | 0:485458fca2bd | 152 | * @brief Push-pull/Open Drain selection on DRDY pin. |
| cparata | 0:485458fca2bd | 153 | */ |
| cparata | 0:485458fca2bd | 154 | typedef enum |
| cparata | 0:485458fca2bd | 155 | { |
| cparata | 0:485458fca2bd | 156 | HTS221_PUSHPULL = (uint8_t)0x00, /*!< DRDY pin in push pull */ |
| cparata | 0:485458fca2bd | 157 | HTS221_OPENDRAIN = (uint8_t)0x40 /*!< DRDY pin in open drain */ |
| cparata | 0:485458fca2bd | 158 | } HTS221_OutputType_et; |
| cparata | 0:485458fca2bd | 159 | #define IS_HTS221_OutputType(MODE) ((MODE == HTS221_PUSHPULL) || (MODE == HTS221_OPENDRAIN)) |
| cparata | 0:485458fca2bd | 160 | |
| cparata | 0:485458fca2bd | 161 | /** |
| cparata | 0:485458fca2bd | 162 | * @brief Active level of DRDY pin. |
| cparata | 0:485458fca2bd | 163 | */ |
| cparata | 0:485458fca2bd | 164 | typedef enum |
| cparata | 0:485458fca2bd | 165 | { |
| cparata | 0:485458fca2bd | 166 | HTS221_HIGH_LVL = (uint8_t)0x00, /*!< HIGH state level for DRDY pin */ |
| cparata | 0:485458fca2bd | 167 | HTS221_LOW_LVL = (uint8_t)0x80 /*!< LOW state level for DRDY pin */ |
| cparata | 0:485458fca2bd | 168 | } HTS221_DrdyLevel_et; |
| cparata | 0:485458fca2bd | 169 | #define IS_HTS221_DrdyLevelType(MODE) ((MODE == HTS221_HIGH_LVL) || (MODE == HTS221_LOW_LVL)) |
| cparata | 0:485458fca2bd | 170 | |
| cparata | 0:485458fca2bd | 171 | /** |
| cparata | 0:485458fca2bd | 172 | * @brief Driver Version Info structure definition. |
| cparata | 0:485458fca2bd | 173 | */ |
| cparata | 0:485458fca2bd | 174 | typedef struct |
| cparata | 0:485458fca2bd | 175 | { |
| cparata | 0:485458fca2bd | 176 | uint8_t Major; |
| cparata | 0:485458fca2bd | 177 | uint8_t Minor; |
| cparata | 0:485458fca2bd | 178 | uint8_t Point; |
| cparata | 0:485458fca2bd | 179 | } HTS221_DriverVersion_st; |
| cparata | 0:485458fca2bd | 180 | |
| cparata | 0:485458fca2bd | 181 | |
| cparata | 0:485458fca2bd | 182 | /** |
| cparata | 0:485458fca2bd | 183 | * @brief HTS221 Init structure definition. |
| cparata | 0:485458fca2bd | 184 | */ |
| cparata | 0:485458fca2bd | 185 | typedef struct |
| cparata | 0:485458fca2bd | 186 | { |
| cparata | 0:485458fca2bd | 187 | HTS221_Avgh_et avg_h; /*!< Humidity average */ |
| cparata | 0:485458fca2bd | 188 | HTS221_Avgt_et avg_t; /*!< Temperature average */ |
| cparata | 0:485458fca2bd | 189 | HTS221_Odr_et odr; /*!< Output data rate */ |
| cparata | 0:485458fca2bd | 190 | HTS221_State_et bdu_status; /*!< HTS221_ENABLE/HTS221_DISABLE the block data update */ |
| cparata | 0:485458fca2bd | 191 | HTS221_State_et heater_status; /*!< HTS221_ENABLE/HTS221_DISABLE the internal heater */ |
| cparata | 0:485458fca2bd | 192 | |
| cparata | 0:485458fca2bd | 193 | HTS221_DrdyLevel_et irq_level; /*!< HTS221_HIGH_LVL/HTS221_LOW_LVL the level for DRDY pin */ |
| cparata | 0:485458fca2bd | 194 | HTS221_OutputType_et irq_output_type; /*!< Output configuration for DRDY pin */ |
| cparata | 0:485458fca2bd | 195 | HTS221_State_et irq_enable; /*!< HTS221_ENABLE/HTS221_DISABLE interrupt on DRDY pin */ |
| cparata | 0:485458fca2bd | 196 | } HTS221_Init_st; |
| cparata | 0:485458fca2bd | 197 | |
| cparata | 0:485458fca2bd | 198 | /** |
| cparata | 0:485458fca2bd | 199 | * @} |
| cparata | 0:485458fca2bd | 200 | */ |
| cparata | 0:485458fca2bd | 201 | |
| cparata | 0:485458fca2bd | 202 | |
| cparata | 0:485458fca2bd | 203 | /* Exported Constants ---------------------------------------------------------*/ |
| cparata | 0:485458fca2bd | 204 | /** @defgroup HTS221_Exported_Constants |
| cparata | 0:485458fca2bd | 205 | * @{ |
| cparata | 0:485458fca2bd | 206 | */ |
| cparata | 0:485458fca2bd | 207 | |
| cparata | 0:485458fca2bd | 208 | /** |
| cparata | 0:485458fca2bd | 209 | * @brief Bitfield positioning. |
| cparata | 0:485458fca2bd | 210 | */ |
| cparata | 0:485458fca2bd | 211 | #define HTS221_BIT(x) ((uint8_t)x) |
| cparata | 0:485458fca2bd | 212 | |
| cparata | 0:485458fca2bd | 213 | /** |
| cparata | 0:485458fca2bd | 214 | * @brief I2C address. |
| cparata | 0:485458fca2bd | 215 | */ |
| cparata | 0:485458fca2bd | 216 | #define HTS221_I2C_ADDRESS (uint8_t)0xBE |
| cparata | 0:485458fca2bd | 217 | |
| cparata | 0:485458fca2bd | 218 | /** |
| cparata | 0:485458fca2bd | 219 | * @brief Driver version. |
| cparata | 0:485458fca2bd | 220 | */ |
| cparata | 0:485458fca2bd | 221 | #define HTS221_DRIVER_VERSION_MAJOR (uint8_t)1 |
| cparata | 0:485458fca2bd | 222 | #define HTS221_DRIVER_VERSION_MINOR (uint8_t)1 |
| cparata | 0:485458fca2bd | 223 | #define HTS221_DRIVER_VERSION_POINT (uint8_t)0 |
| cparata | 0:485458fca2bd | 224 | |
| cparata | 0:485458fca2bd | 225 | /** |
| cparata | 0:485458fca2bd | 226 | * @addtogroup HTS221_Registers |
| cparata | 0:485458fca2bd | 227 | * @{ |
| cparata | 0:485458fca2bd | 228 | */ |
| cparata | 0:485458fca2bd | 229 | |
| cparata | 0:485458fca2bd | 230 | |
| cparata | 0:485458fca2bd | 231 | /** |
| cparata | 0:485458fca2bd | 232 | * @brief Device Identification register. |
| cparata | 0:485458fca2bd | 233 | * \code |
| cparata | 0:485458fca2bd | 234 | * Read |
| cparata | 0:485458fca2bd | 235 | * Default value: 0xBC |
| cparata | 0:485458fca2bd | 236 | * 7:0 This read-only register contains the device identifier for HTS221. |
| cparata | 0:485458fca2bd | 237 | * \endcode |
| cparata | 0:485458fca2bd | 238 | */ |
| cparata | 0:485458fca2bd | 239 | #define HTS221_WHO_AM_I_REG (uint8_t)0x0F |
| cparata | 0:485458fca2bd | 240 | |
| cparata | 0:485458fca2bd | 241 | /** |
| cparata | 0:485458fca2bd | 242 | * @brief Device Identification value. |
| cparata | 0:485458fca2bd | 243 | */ |
| cparata | 0:485458fca2bd | 244 | #define HTS221_WHO_AM_I_VAL (uint8_t)0xBC |
| cparata | 0:485458fca2bd | 245 | |
| cparata | 0:485458fca2bd | 246 | |
| cparata | 0:485458fca2bd | 247 | /** |
| cparata | 0:485458fca2bd | 248 | * @brief Humidity and temperature average mode register. |
| cparata | 0:485458fca2bd | 249 | * \code |
| cparata | 0:485458fca2bd | 250 | * Read/write |
| cparata | 0:485458fca2bd | 251 | * Default value: 0x1B |
| cparata | 0:485458fca2bd | 252 | * 7:6 Reserved. |
| cparata | 0:485458fca2bd | 253 | * 5:3 AVGT2-AVGT1-AVGT0: Select the temperature internal average. |
| cparata | 0:485458fca2bd | 254 | * |
| cparata | 0:485458fca2bd | 255 | * AVGT2 | AVGT1 | AVGT0 | Nr. Internal Average |
| cparata | 0:485458fca2bd | 256 | * ---------------------------------------------------- |
| cparata | 0:485458fca2bd | 257 | * 0 | 0 | 0 | 2 |
| cparata | 0:485458fca2bd | 258 | * 0 | 0 | 1 | 4 |
| cparata | 0:485458fca2bd | 259 | * 0 | 1 | 0 | 8 |
| cparata | 0:485458fca2bd | 260 | * 0 | 1 | 1 | 16 |
| cparata | 0:485458fca2bd | 261 | * 1 | 0 | 0 | 32 |
| cparata | 0:485458fca2bd | 262 | * 1 | 0 | 1 | 64 |
| cparata | 0:485458fca2bd | 263 | * 1 | 1 | 0 | 128 |
| cparata | 0:485458fca2bd | 264 | * 1 | 1 | 1 | 256 |
| cparata | 0:485458fca2bd | 265 | * |
| cparata | 0:485458fca2bd | 266 | * 2:0 AVGH2-AVGH1-AVGH0: Select humidity internal average. |
| cparata | 0:485458fca2bd | 267 | * AVGH2 | AVGH1 | AVGH0 | Nr. Internal Average |
| cparata | 0:485458fca2bd | 268 | * ------------------------------------------------------ |
| cparata | 0:485458fca2bd | 269 | * 0 | 0 | 0 | 4 |
| cparata | 0:485458fca2bd | 270 | * 0 | 0 | 1 | 8 |
| cparata | 0:485458fca2bd | 271 | * 0 | 1 | 0 | 16 |
| cparata | 0:485458fca2bd | 272 | * 0 | 1 | 1 | 32 |
| cparata | 0:485458fca2bd | 273 | * 1 | 0 | 0 | 64 |
| cparata | 0:485458fca2bd | 274 | * 1 | 0 | 1 | 128 |
| cparata | 0:485458fca2bd | 275 | * 1 | 1 | 0 | 256 |
| cparata | 0:485458fca2bd | 276 | * 1 | 1 | 1 | 512 |
| cparata | 0:485458fca2bd | 277 | * |
| cparata | 0:485458fca2bd | 278 | * \endcode |
| cparata | 0:485458fca2bd | 279 | */ |
| cparata | 0:485458fca2bd | 280 | #define HTS221_AV_CONF_REG (uint8_t)0x10 |
| cparata | 0:485458fca2bd | 281 | |
| cparata | 0:485458fca2bd | 282 | #define HTS221_AVGT_BIT HTS221_BIT(3) |
| cparata | 0:485458fca2bd | 283 | #define HTS221_AVGH_BIT HTS221_BIT(0) |
| cparata | 0:485458fca2bd | 284 | |
| cparata | 0:485458fca2bd | 285 | #define HTS221_AVGH_MASK (uint8_t)0x07 |
| cparata | 0:485458fca2bd | 286 | #define HTS221_AVGT_MASK (uint8_t)0x38 |
| cparata | 0:485458fca2bd | 287 | |
| cparata | 0:485458fca2bd | 288 | /** |
| cparata | 0:485458fca2bd | 289 | * @brief Control register 1. |
| cparata | 0:485458fca2bd | 290 | * \code |
| cparata | 0:485458fca2bd | 291 | * Read/write |
| cparata | 0:485458fca2bd | 292 | * Default value: 0x00 |
| cparata | 0:485458fca2bd | 293 | * 7 PD: power down control. 0 - power down mode; 1 - active mode. |
| cparata | 0:485458fca2bd | 294 | * 6:3 Reserved. |
| cparata | 0:485458fca2bd | 295 | * 2 BDU: block data update. 0 - continuous update; 1 - output registers not updated until MSB and LSB reading. |
| cparata | 0:485458fca2bd | 296 | * 1:0 ODR1, ODR0: output data rate selection. |
| cparata | 0:485458fca2bd | 297 | * |
| cparata | 0:485458fca2bd | 298 | * ODR1 | ODR0 | Humidity output data-rate(Hz) | Pressure output data-rate(Hz) |
| cparata | 0:485458fca2bd | 299 | * ---------------------------------------------------------------------------------- |
| cparata | 0:485458fca2bd | 300 | * 0 | 0 | one shot | one shot |
| cparata | 0:485458fca2bd | 301 | * 0 | 1 | 1 | 1 |
| cparata | 0:485458fca2bd | 302 | * 1 | 0 | 7 | 7 |
| cparata | 0:485458fca2bd | 303 | * 1 | 1 | 12.5 | 12.5 |
| cparata | 0:485458fca2bd | 304 | * |
| cparata | 0:485458fca2bd | 305 | * \endcode |
| cparata | 0:485458fca2bd | 306 | */ |
| cparata | 0:485458fca2bd | 307 | #define HTS221_CTRL_REG1 (uint8_t)0x20 |
| cparata | 0:485458fca2bd | 308 | |
| cparata | 0:485458fca2bd | 309 | #define HTS221_PD_BIT HTS221_BIT(7) |
| cparata | 0:485458fca2bd | 310 | #define HTS221_BDU_BIT HTS221_BIT(2) |
| cparata | 0:485458fca2bd | 311 | #define HTS221_ODR_BIT HTS221_BIT(0) |
| cparata | 0:485458fca2bd | 312 | |
| cparata | 0:485458fca2bd | 313 | #define HTS221_PD_MASK (uint8_t)0x80 |
| cparata | 0:485458fca2bd | 314 | #define HTS221_BDU_MASK (uint8_t)0x04 |
| cparata | 0:485458fca2bd | 315 | #define HTS221_ODR_MASK (uint8_t)0x03 |
| cparata | 0:485458fca2bd | 316 | |
| cparata | 0:485458fca2bd | 317 | /** |
| cparata | 0:485458fca2bd | 318 | * @brief Control register 2. |
| cparata | 0:485458fca2bd | 319 | * \code |
| cparata | 0:485458fca2bd | 320 | * Read/write |
| cparata | 0:485458fca2bd | 321 | * Default value: 0x00 |
| cparata | 0:485458fca2bd | 322 | * 7 BOOT: Reboot memory content. 0: normal mode; 1: reboot memory content. Self-cleared upon completation. |
| cparata | 0:485458fca2bd | 323 | * 6:2 Reserved. |
| cparata | 0:485458fca2bd | 324 | * 1 HEATHER: 0: heater enable; 1: heater disable. |
| cparata | 0:485458fca2bd | 325 | * 0 ONE_SHOT: 0: waiting for start of conversion; 1: start for a new dataset. Self-cleared upon completation. |
| cparata | 0:485458fca2bd | 326 | * \endcode |
| cparata | 0:485458fca2bd | 327 | */ |
| cparata | 0:485458fca2bd | 328 | #define HTS221_CTRL_REG2 (uint8_t)0x21 |
| cparata | 0:485458fca2bd | 329 | |
| cparata | 0:485458fca2bd | 330 | #define HTS221_BOOT_BIT HTS221_BIT(7) |
| cparata | 0:485458fca2bd | 331 | #define HTS221_HEATHER_BIT HTS221_BIT(1) |
| cparata | 0:485458fca2bd | 332 | #define HTS221_ONESHOT_BIT HTS221_BIT(0) |
| cparata | 0:485458fca2bd | 333 | |
| cparata | 0:485458fca2bd | 334 | #define HTS221_BOOT_MASK (uint8_t)0x80 |
| cparata | 0:485458fca2bd | 335 | #define HTS221_HEATHER_MASK (uint8_t)0x02 |
| cparata | 0:485458fca2bd | 336 | #define HTS221_ONE_SHOT_MASK (uint8_t)0x01 |
| cparata | 0:485458fca2bd | 337 | |
| cparata | 0:485458fca2bd | 338 | /** |
| cparata | 0:485458fca2bd | 339 | * @brief Control register 3. |
| cparata | 0:485458fca2bd | 340 | * \code |
| cparata | 0:485458fca2bd | 341 | * Read/write |
| cparata | 0:485458fca2bd | 342 | * Default value: 0x00 |
| cparata | 0:485458fca2bd | 343 | * 7 DRDY_H_L: Interrupt edge. 0: active high, 1: active low. |
| cparata | 0:485458fca2bd | 344 | * 6 PP_OD: Push-Pull/OpenDrain selection on interrupt pads. 0: push-pull; 1: open drain. |
| cparata | 0:485458fca2bd | 345 | * 5:3 Reserved. |
| cparata | 0:485458fca2bd | 346 | * 2 DRDY: interrupt config. 0: disable, 1: enable. |
| cparata | 0:485458fca2bd | 347 | * \endcode |
| cparata | 0:485458fca2bd | 348 | */ |
| cparata | 0:485458fca2bd | 349 | #define HTS221_CTRL_REG3 (uint8_t)0x22 |
| cparata | 0:485458fca2bd | 350 | |
| cparata | 0:485458fca2bd | 351 | #define HTS221_DRDY_H_L_BIT HTS221_BIT(7) |
| cparata | 0:485458fca2bd | 352 | #define HTS221_PP_OD_BIT HTS221_BIT(6) |
| cparata | 0:485458fca2bd | 353 | #define HTS221_DRDY_BIT HTS221_BIT(2) |
| cparata | 0:485458fca2bd | 354 | |
| cparata | 0:485458fca2bd | 355 | #define HTS221_DRDY_H_L_MASK (uint8_t)0x80 |
| cparata | 0:485458fca2bd | 356 | #define HTS221_PP_OD_MASK (uint8_t)0x40 |
| cparata | 0:485458fca2bd | 357 | #define HTS221_DRDY_MASK (uint8_t)0x04 |
| cparata | 0:485458fca2bd | 358 | |
| cparata | 0:485458fca2bd | 359 | /** |
| cparata | 0:485458fca2bd | 360 | * @brief Status register. |
| cparata | 0:485458fca2bd | 361 | * \code |
| cparata | 0:485458fca2bd | 362 | * Read |
| cparata | 0:485458fca2bd | 363 | * Default value: 0x00 |
| cparata | 0:485458fca2bd | 364 | * 7:2 Reserved. |
| cparata | 0:485458fca2bd | 365 | * 1 H_DA: Humidity data available. 0: new data for humidity is not yet available; 1: new data for humidity is available. |
| cparata | 0:485458fca2bd | 366 | * 0 T_DA: Temperature data available. 0: new data for temperature is not yet available; 1: new data for temperature is available. |
| cparata | 0:485458fca2bd | 367 | * \endcode |
| cparata | 0:485458fca2bd | 368 | */ |
| cparata | 0:485458fca2bd | 369 | #define HTS221_STATUS_REG (uint8_t)0x27 |
| cparata | 0:485458fca2bd | 370 | |
| cparata | 0:485458fca2bd | 371 | #define HTS221_H_DA_BIT HTS221_BIT(1) |
| cparata | 0:485458fca2bd | 372 | #define HTS221_T_DA_BIT HTS221_BIT(0) |
| cparata | 0:485458fca2bd | 373 | |
| cparata | 0:485458fca2bd | 374 | #define HTS221_HDA_MASK (uint8_t)0x02 |
| cparata | 0:485458fca2bd | 375 | #define HTS221_TDA_MASK (uint8_t)0x01 |
| cparata | 0:485458fca2bd | 376 | |
| cparata | 0:485458fca2bd | 377 | /** |
| cparata | 0:485458fca2bd | 378 | * @brief Humidity data (LSB). |
| cparata | 0:485458fca2bd | 379 | * \code |
| cparata | 0:485458fca2bd | 380 | * Read |
| cparata | 0:485458fca2bd | 381 | * Default value: 0x00. |
| cparata | 0:485458fca2bd | 382 | * HOUT7 - HOUT0: Humidity data LSB (2's complement). |
| cparata | 0:485458fca2bd | 383 | * \endcode |
| cparata | 0:485458fca2bd | 384 | */ |
| cparata | 0:485458fca2bd | 385 | #define HTS221_HR_OUT_L_REG (uint8_t)0x28 |
| cparata | 0:485458fca2bd | 386 | |
| cparata | 0:485458fca2bd | 387 | /** |
| cparata | 0:485458fca2bd | 388 | * @brief Humidity data (MSB). |
| cparata | 0:485458fca2bd | 389 | * \code |
| cparata | 0:485458fca2bd | 390 | * Read |
| cparata | 0:485458fca2bd | 391 | * Default value: 0x00. |
| cparata | 0:485458fca2bd | 392 | * HOUT15 - HOUT8: Humidity data MSB (2's complement). |
| cparata | 0:485458fca2bd | 393 | * \endcode |
| cparata | 0:485458fca2bd | 394 | */ |
| cparata | 0:485458fca2bd | 395 | #define HTS221_HR_OUT_H_REG (uint8_t)0x29 |
| cparata | 0:485458fca2bd | 396 | |
| cparata | 0:485458fca2bd | 397 | |
| cparata | 0:485458fca2bd | 398 | /** |
| cparata | 0:485458fca2bd | 399 | * @brief Temperature data (LSB). |
| cparata | 0:485458fca2bd | 400 | * \code |
| cparata | 0:485458fca2bd | 401 | * Read |
| cparata | 0:485458fca2bd | 402 | * Default value: 0x00. |
| cparata | 0:485458fca2bd | 403 | * TOUT7 - TOUT0: temperature data LSB. |
| cparata | 0:485458fca2bd | 404 | * \endcode |
| cparata | 0:485458fca2bd | 405 | */ |
| cparata | 0:485458fca2bd | 406 | #define HTS221_TEMP_OUT_L_REG (uint8_t)0x2A |
| cparata | 0:485458fca2bd | 407 | |
| cparata | 0:485458fca2bd | 408 | /** |
| cparata | 0:485458fca2bd | 409 | * @brief Temperature data (MSB). |
| cparata | 0:485458fca2bd | 410 | * \code |
| cparata | 0:485458fca2bd | 411 | * Read |
| cparata | 0:485458fca2bd | 412 | * Default value: 0x00. |
| cparata | 0:485458fca2bd | 413 | * TOUT15 - TOUT8: temperature data MSB. |
| cparata | 0:485458fca2bd | 414 | * \endcode |
| cparata | 0:485458fca2bd | 415 | */ |
| cparata | 0:485458fca2bd | 416 | #define HTS221_TEMP_OUT_H_REG (uint8_t)0x2B |
| cparata | 0:485458fca2bd | 417 | |
| cparata | 0:485458fca2bd | 418 | /** |
| cparata | 0:485458fca2bd | 419 | * @brief Calibration registers. |
| cparata | 0:485458fca2bd | 420 | * \code |
| cparata | 0:485458fca2bd | 421 | * Read |
| cparata | 0:485458fca2bd | 422 | * \endcode |
| cparata | 0:485458fca2bd | 423 | */ |
| cparata | 0:485458fca2bd | 424 | #define HTS221_H0_RH_X2 (uint8_t)0x30 |
| cparata | 0:485458fca2bd | 425 | #define HTS221_H1_RH_X2 (uint8_t)0x31 |
| cparata | 0:485458fca2bd | 426 | #define HTS221_T0_DEGC_X8 (uint8_t)0x32 |
| cparata | 0:485458fca2bd | 427 | #define HTS221_T1_DEGC_X8 (uint8_t)0x33 |
| cparata | 0:485458fca2bd | 428 | #define HTS221_T0_T1_DEGC_H2 (uint8_t)0x35 |
| cparata | 0:485458fca2bd | 429 | #define HTS221_H0_T0_OUT_L (uint8_t)0x36 |
| cparata | 0:485458fca2bd | 430 | #define HTS221_H0_T0_OUT_H (uint8_t)0x37 |
| cparata | 0:485458fca2bd | 431 | #define HTS221_H1_T0_OUT_L (uint8_t)0x3A |
| cparata | 0:485458fca2bd | 432 | #define HTS221_H1_T0_OUT_H (uint8_t)0x3B |
| cparata | 0:485458fca2bd | 433 | #define HTS221_T0_OUT_L (uint8_t)0x3C |
| cparata | 0:485458fca2bd | 434 | #define HTS221_T0_OUT_H (uint8_t)0x3D |
| cparata | 0:485458fca2bd | 435 | #define HTS221_T1_OUT_L (uint8_t)0x3E |
| cparata | 0:485458fca2bd | 436 | #define HTS221_T1_OUT_H (uint8_t)0x3F |
| cparata | 0:485458fca2bd | 437 | |
| cparata | 0:485458fca2bd | 438 | |
| cparata | 0:485458fca2bd | 439 | /** |
| cparata | 0:485458fca2bd | 440 | * @} |
| cparata | 0:485458fca2bd | 441 | */ |
| cparata | 0:485458fca2bd | 442 | |
| cparata | 0:485458fca2bd | 443 | |
| cparata | 0:485458fca2bd | 444 | /** |
| cparata | 0:485458fca2bd | 445 | * @} |
| cparata | 0:485458fca2bd | 446 | */ |
| cparata | 0:485458fca2bd | 447 | |
| cparata | 0:485458fca2bd | 448 | |
| cparata | 0:485458fca2bd | 449 | /* Exported Functions -------------------------------------------------------------*/ |
| cparata | 0:485458fca2bd | 450 | /** @defgroup HTS221_Exported_Functions |
| cparata | 0:485458fca2bd | 451 | * @{ |
| cparata | 0:485458fca2bd | 452 | */ |
| cparata | 0:485458fca2bd | 453 | |
| cparata | 0:485458fca2bd | 454 | HTS221_Error_et HTS221_ReadReg( void *handle, uint8_t RegAddr, uint16_t NumByteToRead, uint8_t *Data ); |
| cparata | 0:485458fca2bd | 455 | HTS221_Error_et HTS221_WriteReg( void *handle, uint8_t RegAddr, uint16_t NumByteToWrite, uint8_t *Data ); |
| cparata | 0:485458fca2bd | 456 | |
| cparata | 0:485458fca2bd | 457 | HTS221_Error_et HTS221_Get_DriverVersion(HTS221_DriverVersion_st* version); |
| cparata | 0:485458fca2bd | 458 | HTS221_Error_et HTS221_Get_DeviceID(void *handle, uint8_t* deviceid); |
| cparata | 0:485458fca2bd | 459 | |
| cparata | 0:485458fca2bd | 460 | HTS221_Error_et HTS221_Set_InitConfig(void *handle, HTS221_Init_st* pxInit); |
| cparata | 0:485458fca2bd | 461 | HTS221_Error_et HTS221_Get_InitConfig(void *handle, HTS221_Init_st* pxInit); |
| cparata | 0:485458fca2bd | 462 | HTS221_Error_et HTS221_DeInit(void *handle); |
| cparata | 0:485458fca2bd | 463 | HTS221_Error_et HTS221_IsMeasurementCompleted(void *handle, HTS221_BitStatus_et* Is_Measurement_Completed); |
| cparata | 0:485458fca2bd | 464 | |
| cparata | 0:485458fca2bd | 465 | HTS221_Error_et HTS221_Get_Measurement(void *handle, uint16_t* humidity, int16_t* temperature); |
| cparata | 0:485458fca2bd | 466 | HTS221_Error_et HTS221_Get_RawMeasurement(void *handle, int16_t* humidity, int16_t* temperature); |
| cparata | 0:485458fca2bd | 467 | HTS221_Error_et HTS221_Get_Humidity(void *handle, uint16_t* value); |
| cparata | 0:485458fca2bd | 468 | HTS221_Error_et HTS221_Get_HumidityRaw(void *handle, int16_t* value); |
| cparata | 0:485458fca2bd | 469 | HTS221_Error_et HTS221_Get_TemperatureRaw(void *handle, int16_t* value); |
| cparata | 0:485458fca2bd | 470 | HTS221_Error_et HTS221_Get_Temperature(void *handle, int16_t* value); |
| cparata | 0:485458fca2bd | 471 | HTS221_Error_et HTS221_Get_DataStatus(void *handle, HTS221_BitStatus_et* humidity, HTS221_BitStatus_et* temperature); |
| cparata | 0:485458fca2bd | 472 | HTS221_Error_et HTS221_Activate(void *handle); |
| cparata | 0:485458fca2bd | 473 | HTS221_Error_et HTS221_DeActivate(void *handle); |
| cparata | 0:485458fca2bd | 474 | |
| cparata | 0:485458fca2bd | 475 | HTS221_Error_et HTS221_Set_AvgHT(void *handle, HTS221_Avgh_et avgh, HTS221_Avgt_et avgt); |
| cparata | 0:485458fca2bd | 476 | HTS221_Error_et HTS221_Set_AvgH(void *handle, HTS221_Avgh_et avgh); |
| cparata | 0:485458fca2bd | 477 | HTS221_Error_et HTS221_Set_AvgT(void *handle, HTS221_Avgt_et avgt); |
| cparata | 0:485458fca2bd | 478 | HTS221_Error_et HTS221_Get_AvgHT(void *handle, HTS221_Avgh_et* avgh, HTS221_Avgt_et* avgt); |
| cparata | 0:485458fca2bd | 479 | HTS221_Error_et HTS221_Set_BduMode(void *handle, HTS221_State_et status); |
| cparata | 0:485458fca2bd | 480 | HTS221_Error_et HTS221_Get_BduMode(void *handle, HTS221_State_et* status); |
| cparata | 0:485458fca2bd | 481 | HTS221_Error_et HTS221_Set_PowerDownMode(void *handle, HTS221_BitStatus_et status); |
| cparata | 0:485458fca2bd | 482 | HTS221_Error_et HTS221_Get_PowerDownMode(void *handle, HTS221_BitStatus_et* status); |
| cparata | 0:485458fca2bd | 483 | HTS221_Error_et HTS221_Set_Odr(void *handle, HTS221_Odr_et odr); |
| cparata | 0:485458fca2bd | 484 | HTS221_Error_et HTS221_Get_Odr(void *handle, HTS221_Odr_et* odr); |
| cparata | 0:485458fca2bd | 485 | HTS221_Error_et HTS221_MemoryBoot(void *handle); |
| cparata | 0:485458fca2bd | 486 | HTS221_Error_et HTS221_Set_HeaterState(void *handle, HTS221_State_et status); |
| cparata | 0:485458fca2bd | 487 | HTS221_Error_et HTS221_Get_HeaterState(void *handle, HTS221_State_et* status); |
| cparata | 0:485458fca2bd | 488 | HTS221_Error_et HTS221_StartOneShotMeasurement(void *handle); |
| cparata | 0:485458fca2bd | 489 | HTS221_Error_et HTS221_Set_IrqActiveLevel(void *handle, HTS221_DrdyLevel_et status); |
| cparata | 0:485458fca2bd | 490 | HTS221_Error_et HTS221_Get_IrqActiveLevel(void *handle, HTS221_DrdyLevel_et* status); |
| cparata | 0:485458fca2bd | 491 | HTS221_Error_et HTS221_Set_IrqOutputType(void *handle, HTS221_OutputType_et value); |
| cparata | 0:485458fca2bd | 492 | HTS221_Error_et HTS221_Get_IrqOutputType(void *handle, HTS221_OutputType_et* value); |
| cparata | 0:485458fca2bd | 493 | HTS221_Error_et HTS221_Set_IrqEnable(void *handle, HTS221_State_et status); |
| cparata | 0:485458fca2bd | 494 | HTS221_Error_et HTS221_Get_IrqEnable(void *handle, HTS221_State_et* status); |
| cparata | 0:485458fca2bd | 495 | |
| cparata | 0:485458fca2bd | 496 | /** |
| cparata | 0:485458fca2bd | 497 | * @} |
| cparata | 0:485458fca2bd | 498 | */ |
| cparata | 0:485458fca2bd | 499 | |
| cparata | 0:485458fca2bd | 500 | /** |
| cparata | 0:485458fca2bd | 501 | * @} |
| cparata | 0:485458fca2bd | 502 | */ |
| cparata | 0:485458fca2bd | 503 | |
| cparata | 0:485458fca2bd | 504 | /** |
| cparata | 0:485458fca2bd | 505 | * @} |
| cparata | 0:485458fca2bd | 506 | */ |
| cparata | 0:485458fca2bd | 507 | |
| cparata | 0:485458fca2bd | 508 | #ifdef __cplusplus |
| cparata | 0:485458fca2bd | 509 | } |
| cparata | 0:485458fca2bd | 510 | #endif |
| cparata | 0:485458fca2bd | 511 | |
| cparata | 0:485458fca2bd | 512 | #endif /* __HTS221_DRIVER__H */ |
| cparata | 0:485458fca2bd | 513 | |
| cparata | 0:485458fca2bd | 514 | /******************* (C) COPYRIGHT 2013 STMicroelectronics *****END OF FILE****/ |
