vl53l1_api_preset_modes.c

00001 
00002 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
00003 /******************************************************************************
00004  * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
00005 
00006  This file is part of VL53L1 and is dual licensed,
00007  either GPL-2.0+
00008  or 'BSD 3-clause "New" or "Revised" License' , at your option.
00009  ******************************************************************************
00010  */
00011 
00012 
00013 
00014 
00015 #include "vl53l1_ll_def.h"
00016 #include "vl53l1_platform_log.h"
00017 #include "vl53l1_register_structs.h"
00018 #include "vl53l1_register_settings.h"
00019 #include "vl53l1_hist_structs.h"
00020 #include "vl53l1_zone_presets.h"
00021 #include "vl53l1_core.h"
00022 #include "vl53l1_api_preset_modes.h"
00023 #include "vl53l1_tuning_parm_defaults.h"
00024 
00025 
00026 #define LOG_FUNCTION_START(fmt, ...) \
00027     _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_API, fmt, ##__VA_ARGS__)
00028 #define LOG_FUNCTION_END(status, ...) \
00029     _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_API, status, ##__VA_ARGS__)
00030 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \
00031     _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_API,\
00032     status, fmt, ##__VA_ARGS__)
00033 
00034 
00035 VL53L1_Error VL53L1_init_refspadchar_config_struct(
00036     VL53L1_refspadchar_config_t   *pdata)
00037 {
00038 
00039 
00040     VL53L1_Error  status = VL53L1_ERROR_NONE;
00041 
00042     LOG_FUNCTION_START("");
00043 
00044 
00045 
00046     pdata->device_test_mode =
00047         VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE_DEFAULT;
00048     pdata->VL53L1_p_009              =
00049         VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD_DEFAULT;
00050     pdata->timeout_us                =
00051         VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US_DEFAULT;
00052     pdata->target_count_rate_mcps    =
00053         VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS_DEFAULT;
00054     pdata->min_count_rate_limit_mcps =
00055         VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS_DEFAULT;
00056     pdata->max_count_rate_limit_mcps =
00057         VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS_DEFAULT;
00058 
00059     LOG_FUNCTION_END(status);
00060 
00061     return status;
00062 }
00063 
00064 
00065 VL53L1_Error VL53L1_init_ssc_config_struct(
00066     VL53L1_ssc_config_t   *pdata)
00067 {
00068 
00069 
00070     VL53L1_Error  status = VL53L1_ERROR_NONE;
00071 
00072     LOG_FUNCTION_START("");
00073 
00074 
00075 
00076 
00077     pdata->array_select = VL53L1_DEVICESSCARRAY_RTN;
00078 
00079 
00080     pdata->VL53L1_p_009 =
00081             VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD_DEFAULT;
00082 
00083 
00084     pdata->vcsel_start  =
00085             VL53L1_TUNINGPARM_SPADMAP_VCSEL_START_DEFAULT;
00086 
00087 
00088     pdata->vcsel_width = 0x02;
00089 
00090 
00091     pdata->timeout_us   = 36000;
00092 
00093 
00094     pdata->rate_limit_mcps =
00095             VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS_DEFAULT;
00096 
00097     LOG_FUNCTION_END(status);
00098 
00099     return status;
00100 }
00101 
00102 
00103 VL53L1_Error VL53L1_init_xtalk_config_struct(
00104     VL53L1_customer_nvm_managed_t *pnvm,
00105     VL53L1_xtalk_config_t   *pdata)
00106 {
00107 
00108 
00109     VL53L1_Error  status = VL53L1_ERROR_NONE;
00110 
00111     LOG_FUNCTION_START("");
00112 
00113 
00114 
00115 
00116 
00117     pdata->algo__crosstalk_compensation_plane_offset_kcps      =
00118         pnvm->algo__crosstalk_compensation_plane_offset_kcps;
00119     pdata->algo__crosstalk_compensation_x_plane_gradient_kcps  =
00120         pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
00121     pdata->algo__crosstalk_compensation_y_plane_gradient_kcps  =
00122         pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
00123 
00124 
00125 
00126     pdata->nvm_default__crosstalk_compensation_plane_offset_kcps      =
00127         (uint32_t)pnvm->algo__crosstalk_compensation_plane_offset_kcps;
00128     pdata->nvm_default__crosstalk_compensation_x_plane_gradient_kcps  =
00129         pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
00130     pdata->nvm_default__crosstalk_compensation_y_plane_gradient_kcps  =
00131         pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
00132 
00133     pdata->histogram_mode_crosstalk_margin_kcps                =
00134             VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS_DEFAULT;
00135     pdata->lite_mode_crosstalk_margin_kcps                     =
00136             VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS_DEFAULT;
00137 
00138 
00139 
00140     pdata->crosstalk_range_ignore_threshold_mult =
00141             VL53L1_TUNINGPARM_LITE_RIT_MULT_DEFAULT;
00142 
00143     if ((pdata->algo__crosstalk_compensation_plane_offset_kcps == 0x00)
00144         && (pdata->algo__crosstalk_compensation_x_plane_gradient_kcps
00145                 == 0x00)
00146         && (pdata->algo__crosstalk_compensation_y_plane_gradient_kcps
00147                 == 0x00))
00148         pdata->global_crosstalk_compensation_enable = 0x00;
00149     else
00150         pdata->global_crosstalk_compensation_enable = 0x01;
00151 
00152 
00153     if ((status == VL53L1_ERROR_NONE) &&
00154         (pdata->global_crosstalk_compensation_enable == 0x01)) {
00155         pdata->crosstalk_range_ignore_threshold_rate_mcps =
00156         VL53L1_calc_range_ignore_threshold(
00157         pdata->algo__crosstalk_compensation_plane_offset_kcps,
00158         pdata->algo__crosstalk_compensation_x_plane_gradient_kcps,
00159         pdata->algo__crosstalk_compensation_y_plane_gradient_kcps,
00160         pdata->crosstalk_range_ignore_threshold_mult);
00161     } else {
00162         pdata->crosstalk_range_ignore_threshold_rate_mcps = 0;
00163     }
00164 
00165 
00166 
00167 
00168     pdata->algo__crosstalk_detect_min_valid_range_mm  =
00169         VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
00170     pdata->algo__crosstalk_detect_max_valid_range_mm  =
00171         VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
00172     pdata->algo__crosstalk_detect_max_valid_rate_kcps =
00173         VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
00174     pdata->algo__crosstalk_detect_max_sigma_mm        =
00175             VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
00176 
00177     LOG_FUNCTION_END(status);
00178 
00179     return status;
00180 }
00181 
00182 VL53L1_Error VL53L1_init_xtalk_extract_config_struct(
00183     VL53L1_xtalkextract_config_t   *pdata)
00184 {
00185 
00186 
00187     VL53L1_Error  status = VL53L1_ERROR_NONE;
00188 
00189     LOG_FUNCTION_START("");
00190 
00191 
00192 
00193     pdata->dss_config__target_total_rate_mcps          =
00194             VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS_DEFAULT;
00195 
00196     pdata->mm_config_timeout_us                        =
00197             VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US_DEFAULT;
00198 
00199     pdata->num_of_samples                              =
00200             VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES_DEFAULT;
00201 
00202     pdata->phasecal_config_timeout_us                  =
00203         VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US_DEFAULT;
00204 
00205     pdata->range_config_timeout_us                     =
00206             VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US_DEFAULT;
00207 
00208 
00209 
00210 
00211     pdata->algo__crosstalk_extract_min_valid_range_mm  =
00212         VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM_DEFAULT;
00213     pdata->algo__crosstalk_extract_max_valid_range_mm  =
00214         VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM_DEFAULT;
00215     pdata->algo__crosstalk_extract_max_valid_rate_kcps =
00216         VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS_DEFAULT;
00217     pdata->algo__crosstalk_extract_max_sigma_mm        =
00218         VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM_DEFAULT;
00219 
00220 
00221     LOG_FUNCTION_END(status);
00222 
00223     return status;
00224 }
00225 
00226 
00227 VL53L1_Error VL53L1_init_offset_cal_config_struct(
00228     VL53L1_offsetcal_config_t   *pdata)
00229 {
00230 
00231 
00232     VL53L1_Error  status = VL53L1_ERROR_NONE;
00233 
00234     LOG_FUNCTION_START("");
00235 
00236 
00237 
00238     pdata->dss_config__target_total_rate_mcps          =
00239             VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS_DEFAULT;
00240 
00241     pdata->phasecal_config_timeout_us                  =
00242         VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
00243 
00244     pdata->range_config_timeout_us                     =
00245             VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US_DEFAULT;
00246 
00247     pdata->mm_config_timeout_us                        =
00248             VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US_DEFAULT;
00249 
00250 
00251 
00252 
00253     pdata->pre_num_of_samples                          =
00254             VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES_DEFAULT;
00255     pdata->mm1_num_of_samples                          =
00256             VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES_DEFAULT;
00257     pdata->mm2_num_of_samples                          =
00258             VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES_DEFAULT;
00259 
00260     LOG_FUNCTION_END(status);
00261 
00262     return status;
00263 }
00264 
00265 VL53L1_Error VL53L1_init_zone_cal_config_struct(
00266     VL53L1_zonecal_config_t   *pdata)
00267 {
00268 
00269 
00270     VL53L1_Error  status = VL53L1_ERROR_NONE;
00271 
00272     LOG_FUNCTION_START("");
00273 
00274 
00275 
00276     pdata->dss_config__target_total_rate_mcps          =
00277             VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS_DEFAULT;
00278 
00279     pdata->phasecal_config_timeout_us                  =
00280             VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
00281 
00282     pdata->range_config_timeout_us                     =
00283             VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US_DEFAULT;
00284 
00285     pdata->mm_config_timeout_us                        =
00286             VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US_DEFAULT;
00287 
00288 
00289 
00290 
00291     pdata->phasecal_num_of_samples                     =
00292             VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES_DEFAULT;
00293     pdata->zone_num_of_samples                         =
00294             VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES_DEFAULT;
00295 
00296     LOG_FUNCTION_END(status);
00297 
00298     return status;
00299 }
00300 
00301 
00302 VL53L1_Error VL53L1_init_hist_post_process_config_struct(
00303     uint8_t                             xtalk_compensation_enable,
00304     VL53L1_hist_post_process_config_t   *pdata)
00305 {
00306 
00307 
00308     VL53L1_Error  status = VL53L1_ERROR_NONE;
00309 
00310     LOG_FUNCTION_START("");
00311 
00312 
00313 
00314     pdata->hist_algo_select =
00315             VL53L1_TUNINGPARM_HIST_ALGO_SELECT_DEFAULT;
00316 
00317 
00318 
00319     pdata->hist_target_order =
00320             VL53L1_TUNINGPARM_HIST_TARGET_ORDER_DEFAULT;
00321 
00322 
00323 
00324     pdata->filter_woi0                   =
00325             VL53L1_TUNINGPARM_HIST_FILTER_WOI_0_DEFAULT;
00326     pdata->filter_woi1                   =
00327             VL53L1_TUNINGPARM_HIST_FILTER_WOI_1_DEFAULT;
00328 
00329 
00330     pdata->hist_amb_est_method =
00331             VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD_DEFAULT;
00332 
00333     pdata->ambient_thresh_sigma0         =
00334             VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0_DEFAULT;
00335     pdata->ambient_thresh_sigma1         =
00336             VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1_DEFAULT;
00337 
00338 
00339     pdata->ambient_thresh_events_scaler     =
00340             VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER_DEFAULT;
00341 
00342 
00343     pdata->min_ambient_thresh_events     =
00344             VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS_DEFAULT;
00345 
00346     pdata->noise_threshold               =
00347             VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD_DEFAULT;
00348 
00349     pdata->signal_total_events_limit     =
00350         VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT_DEFAULT;
00351     pdata->sigma_estimator__sigma_ref_mm =
00352         VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM_DEFAULT;
00353 
00354 
00355     pdata->sigma_thresh                  =
00356             VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM_DEFAULT;
00357 
00358     pdata->range_offset_mm            =      0;
00359 
00360     pdata->gain_factor                =
00361             VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
00362 
00363 
00364 
00365     pdata->valid_phase_low = 0x08;
00366     pdata->valid_phase_high = 0x88;
00367 
00368 
00369 
00370     pdata->algo__consistency_check__phase_tolerance =
00371         VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE_DEFAULT;
00372 
00373 
00374 
00375     pdata->algo__consistency_check__event_sigma =
00376         VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_DEFAULT;
00377 
00378 
00379     pdata->algo__consistency_check__event_min_spad_count =
00380     VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT_DEFAULT;
00381 
00382 
00383 
00384     pdata->algo__consistency_check__min_max_tolerance =
00385         VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM_DEFAULT;
00386 
00387 
00388     pdata->algo__crosstalk_compensation_enable = xtalk_compensation_enable;
00389 
00390 
00391     pdata->algo__crosstalk_detect_min_valid_range_mm  =
00392         VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
00393     pdata->algo__crosstalk_detect_max_valid_range_mm  =
00394         VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
00395     pdata->algo__crosstalk_detect_max_valid_rate_kcps =
00396         VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
00397     pdata->algo__crosstalk_detect_max_sigma_mm        =
00398         VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
00399 
00400 
00401 
00402 
00403 
00404     pdata->algo__crosstalk_detect_event_sigma       =
00405         VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA_DEFAULT;
00406 
00407 
00408 
00409     pdata->algo__crosstalk_detect_min_max_tolerance   =
00410         VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE_DEFAULT;
00411 
00412 
00413 
00414     LOG_FUNCTION_END(status);
00415 
00416     return status;
00417 }
00418 
00419 
00420 VL53L1_Error VL53L1_init_dmax_calibration_data_struct(
00421     VL53L1_dmax_calibration_data_t   *pdata)
00422 {
00423 
00424 
00425     VL53L1_Error  status = VL53L1_ERROR_NONE;
00426 
00427     LOG_FUNCTION_START("");
00428 
00429 
00430 
00431 
00432     pdata->ref__actual_effective_spads = 0x5F2D;
00433 
00434     pdata->ref__peak_signal_count_rate_mcps = 0x0844;
00435 
00436     pdata->ref__distance_mm = 0x08A5;
00437 
00438 
00439     pdata->ref_reflectance_pc = 0x0014;
00440 
00441 
00442     pdata->coverglass_transmission = 0x0100;
00443 
00444     LOG_FUNCTION_END(status);
00445 
00446     return status;
00447 }
00448 
00449 
00450 VL53L1_Error VL53L1_init_tuning_parm_storage_struct(
00451     VL53L1_tuning_parm_storage_t   *pdata)
00452 {
00453 
00454 
00455     VL53L1_Error  status = VL53L1_ERROR_NONE;
00456 
00457     LOG_FUNCTION_START("");
00458 
00459 
00460 
00461     pdata->tp_tuning_parm_version              =
00462             VL53L1_TUNINGPARM_VERSION_DEFAULT;
00463     pdata->tp_tuning_parm_key_table_version    =
00464             VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT;
00465     pdata->tp_tuning_parm_lld_version          =
00466             VL53L1_TUNINGPARM_LLD_VERSION_DEFAULT;
00467     pdata->tp_init_phase_rtn_lite_long         =
00468         VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE_DEFAULT;
00469     pdata->tp_init_phase_rtn_lite_med          =
00470         VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE_DEFAULT;
00471     pdata->tp_init_phase_rtn_lite_short        =
00472         VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE_DEFAULT;
00473     pdata->tp_init_phase_ref_lite_long         =
00474         VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE_DEFAULT;
00475     pdata->tp_init_phase_ref_lite_med          =
00476         VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE_DEFAULT;
00477     pdata->tp_init_phase_ref_lite_short        =
00478         VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE_DEFAULT;
00479     pdata->tp_init_phase_rtn_hist_long         =
00480         VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE_DEFAULT;
00481     pdata->tp_init_phase_rtn_hist_med          =
00482         VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE_DEFAULT;
00483     pdata->tp_init_phase_rtn_hist_short        =
00484         VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE_DEFAULT;
00485     pdata->tp_init_phase_ref_hist_long         =
00486         VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE_DEFAULT;
00487     pdata->tp_init_phase_ref_hist_med          =
00488         VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE_DEFAULT;
00489     pdata->tp_init_phase_ref_hist_short        =
00490         VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE_DEFAULT;
00491     pdata->tp_consistency_lite_phase_tolerance =
00492         VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE_DEFAULT;
00493     pdata->tp_phasecal_target                  =
00494             VL53L1_TUNINGPARM_PHASECAL_TARGET_DEFAULT;
00495     pdata->tp_cal_repeat_rate                  =
00496             VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE_DEFAULT;
00497     pdata->tp_lite_min_clip                    =
00498             VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM_DEFAULT;
00499     pdata->tp_lite_long_sigma_thresh_mm        =
00500             VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM_DEFAULT;
00501     pdata->tp_lite_med_sigma_thresh_mm         =
00502             VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM_DEFAULT;
00503     pdata->tp_lite_short_sigma_thresh_mm       =
00504             VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM_DEFAULT;
00505     pdata->tp_lite_long_min_count_rate_rtn_mcps  =
00506         VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
00507     pdata->tp_lite_med_min_count_rate_rtn_mcps   =
00508         VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
00509     pdata->tp_lite_short_min_count_rate_rtn_mcps =
00510         VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
00511     pdata->tp_lite_sigma_est_pulse_width_ns      =
00512             VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH_DEFAULT;
00513     pdata->tp_lite_sigma_est_amb_width_ns        =
00514             VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS_DEFAULT;
00515     pdata->tp_lite_sigma_ref_mm                  =
00516             VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM_DEFAULT;
00517     pdata->tp_lite_seed_cfg                      =
00518             VL53L1_TUNINGPARM_LITE_SEED_CONFIG_DEFAULT;
00519     pdata->tp_timed_seed_cfg                     =
00520             VL53L1_TUNINGPARM_TIMED_SEED_CONFIG_DEFAULT;
00521     pdata->tp_lite_quantifier                    =
00522             VL53L1_TUNINGPARM_LITE_QUANTIFIER_DEFAULT;
00523     pdata->tp_lite_first_order_select            =
00524             VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT_DEFAULT;
00525 
00526 
00527 
00528 
00529     pdata->tp_dss_target_lite_mcps               =
00530     VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
00531     pdata->tp_dss_target_histo_mcps              =
00532     VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
00533     pdata->tp_dss_target_histo_mz_mcps           =
00534     VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
00535     pdata->tp_dss_target_timed_mcps              =
00536     VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
00537     pdata->tp_phasecal_timeout_lite_us           =
00538         VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00539     pdata->tp_phasecal_timeout_hist_long_us      =
00540     VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00541     pdata->tp_phasecal_timeout_hist_med_us       =
00542     VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00543     pdata->tp_phasecal_timeout_hist_short_us     =
00544     VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00545     pdata->tp_phasecal_timeout_mz_long_us        =
00546     VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00547     pdata->tp_phasecal_timeout_mz_med_us         =
00548         VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00549     pdata->tp_phasecal_timeout_mz_short_us       =
00550         VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00551     pdata->tp_phasecal_timeout_timed_us          =
00552         VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
00553     pdata->tp_mm_timeout_lite_us                 =
00554             VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US_DEFAULT;
00555     pdata->tp_mm_timeout_histo_us                =
00556             VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US_DEFAULT;
00557     pdata->tp_mm_timeout_mz_us                   =
00558             VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US_DEFAULT;
00559     pdata->tp_mm_timeout_timed_us                =
00560             VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US_DEFAULT;
00561     pdata->tp_range_timeout_lite_us              =
00562             VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
00563     pdata->tp_range_timeout_histo_us             =
00564         VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
00565     pdata->tp_range_timeout_mz_us                =
00566             VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
00567     pdata->tp_range_timeout_timed_us             =
00568         VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
00569 
00570 
00571 
00572     pdata->tp_mm_timeout_lpa_us =
00573         VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US_DEFAULT;
00574     pdata->tp_range_timeout_lpa_us =
00575         VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
00576 
00577     pdata->tp_dss_target_very_short_mcps =
00578         VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS_DEFAULT;
00579 
00580     pdata->tp_phasecal_patch_power =
00581         VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER_DEFAULT;
00582 
00583     pdata->tp_hist_merge =
00584         VL53L1_TUNINGPARM_HIST_MERGE_DEFAULT;
00585 
00586     pdata->tp_reset_merge_threshold =
00587         VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD_DEFAULT;
00588 
00589     pdata->tp_hist_merge_max_size =
00590         VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE_DEFAULT;
00591 
00592     pdata->tp_uwr_enable =
00593         VL53L1_TUNINGPARM_UWR_ENABLE_DEFAULT;
00594     pdata->tp_uwr_med_z_1_min =
00595         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN_DEFAULT;
00596     pdata->tp_uwr_med_z_1_max =
00597         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX_DEFAULT;
00598     pdata->tp_uwr_med_z_2_min =
00599         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN_DEFAULT;
00600     pdata->tp_uwr_med_z_2_max =
00601         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX_DEFAULT;
00602     pdata->tp_uwr_med_z_3_min =
00603         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN_DEFAULT;
00604     pdata->tp_uwr_med_z_3_max =
00605         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX_DEFAULT;
00606     pdata->tp_uwr_med_z_4_min =
00607         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN_DEFAULT;
00608     pdata->tp_uwr_med_z_4_max =
00609         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX_DEFAULT;
00610     pdata->tp_uwr_med_z_5_min =
00611         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN_DEFAULT;
00612     pdata->tp_uwr_med_z_5_max =
00613         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX_DEFAULT;
00614     pdata->tp_uwr_med_z_6_min =
00615         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN_DEFAULT;
00616     pdata->tp_uwr_med_z_6_max =
00617         VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX_DEFAULT;
00618     pdata->tp_uwr_med_corr_z_1_rangea =
00619         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA_DEFAULT;
00620     pdata->tp_uwr_med_corr_z_1_rangeb =
00621         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB_DEFAULT;
00622     pdata->tp_uwr_med_corr_z_2_rangea =
00623         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA_DEFAULT;
00624     pdata->tp_uwr_med_corr_z_2_rangeb =
00625         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB_DEFAULT;
00626     pdata->tp_uwr_med_corr_z_3_rangea =
00627         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA_DEFAULT;
00628     pdata->tp_uwr_med_corr_z_3_rangeb =
00629         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB_DEFAULT;
00630     pdata->tp_uwr_med_corr_z_4_rangea =
00631         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA_DEFAULT;
00632     pdata->tp_uwr_med_corr_z_4_rangeb =
00633         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB_DEFAULT;
00634     pdata->tp_uwr_med_corr_z_5_rangea =
00635         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA_DEFAULT;
00636     pdata->tp_uwr_med_corr_z_5_rangeb =
00637         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB_DEFAULT;
00638     pdata->tp_uwr_med_corr_z_6_rangea =
00639         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA_DEFAULT;
00640     pdata->tp_uwr_med_corr_z_6_rangeb =
00641         VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB_DEFAULT;
00642     pdata->tp_uwr_lng_z_1_min =
00643         VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN_DEFAULT;
00644     pdata->tp_uwr_lng_z_1_max =
00645         VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX_DEFAULT;
00646     pdata->tp_uwr_lng_z_2_min =
00647         VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN_DEFAULT;
00648     pdata->tp_uwr_lng_z_2_max =
00649         VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX_DEFAULT;
00650     pdata->tp_uwr_lng_z_3_min =
00651         VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN_DEFAULT;
00652     pdata->tp_uwr_lng_z_3_max =
00653         VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX_DEFAULT;
00654     pdata->tp_uwr_lng_z_4_min =
00655         VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN_DEFAULT;
00656     pdata->tp_uwr_lng_z_4_max =
00657         VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX_DEFAULT;
00658     pdata->tp_uwr_lng_z_5_min =
00659         VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN_DEFAULT;
00660     pdata->tp_uwr_lng_z_5_max =
00661         VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX_DEFAULT;
00662     pdata->tp_uwr_lng_corr_z_1_rangea =
00663         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA_DEFAULT;
00664     pdata->tp_uwr_lng_corr_z_1_rangeb =
00665         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB_DEFAULT;
00666     pdata->tp_uwr_lng_corr_z_2_rangea =
00667         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA_DEFAULT;
00668     pdata->tp_uwr_lng_corr_z_2_rangeb =
00669         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB_DEFAULT;
00670     pdata->tp_uwr_lng_corr_z_3_rangea =
00671         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA_DEFAULT;
00672     pdata->tp_uwr_lng_corr_z_3_rangeb =
00673         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB_DEFAULT;
00674     pdata->tp_uwr_lng_corr_z_4_rangea =
00675         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA_DEFAULT;
00676     pdata->tp_uwr_lng_corr_z_4_rangeb =
00677         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB_DEFAULT;
00678     pdata->tp_uwr_lng_corr_z_5_rangea =
00679         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA_DEFAULT;
00680     pdata->tp_uwr_lng_corr_z_5_rangeb =
00681         VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB_DEFAULT;
00682     pdata->tp_min_signal_secondary_targets =
00683         VL53L1_TUNINGPARM_MIN_SIGNAL_SECONDARY_TARGETS_DEFAULT;
00684     LOG_FUNCTION_END(status);
00685 
00686     return status;
00687 }
00688 
00689 
00690 VL53L1_Error VL53L1_init_hist_gen3_dmax_config_struct(
00691     VL53L1_hist_gen3_dmax_config_t   *pdata)
00692 {
00693 
00694 
00695     VL53L1_Error  status = VL53L1_ERROR_NONE;
00696 
00697     LOG_FUNCTION_START("");
00698 
00699 
00700     pdata->dss_config__target_total_rate_mcps = 0x1400;
00701     pdata->dss_config__aperture_attenuation = 0x38;
00702 
00703     pdata->signal_thresh_sigma                 =
00704             VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA_DEFAULT;
00705     pdata->ambient_thresh_sigma = 0x70;
00706     pdata->min_ambient_thresh_events           = 16;
00707     pdata->signal_total_events_limit           = 100;
00708     pdata->max_effective_spads = 0xFFFF;
00709 
00710 
00711 
00712     pdata->target_reflectance_for_dmax_calc[0] =
00713             VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0_DEFAULT;
00714     pdata->target_reflectance_for_dmax_calc[1] =
00715             VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1_DEFAULT;
00716     pdata->target_reflectance_for_dmax_calc[2] =
00717             VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2_DEFAULT;
00718     pdata->target_reflectance_for_dmax_calc[3] =
00719             VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3_DEFAULT;
00720     pdata->target_reflectance_for_dmax_calc[4] =
00721             VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4_DEFAULT;
00722 
00723     LOG_FUNCTION_END(status);
00724 
00725     return status;
00726 }
00727 
00728 
00729 VL53L1_Error VL53L1_preset_mode_standard_ranging(
00730     VL53L1_static_config_t    *pstatic,
00731     VL53L1_histogram_config_t *phistogram,
00732     VL53L1_general_config_t   *pgeneral,
00733     VL53L1_timing_config_t    *ptiming,
00734     VL53L1_dynamic_config_t   *pdynamic,
00735     VL53L1_system_control_t   *psystem,
00736     VL53L1_tuning_parm_storage_t *ptuning_parms,
00737     VL53L1_zone_config_t      *pzone_cfg)
00738 {
00739 
00740 
00741     VL53L1_Error  status = VL53L1_ERROR_NONE;
00742 
00743     LOG_FUNCTION_START("");
00744 
00745 
00746 
00747 
00748     pstatic->dss_config__target_total_rate_mcps = 0x0A00;
00749     pstatic->debug__ctrl = 0x00;
00750     pstatic->test_mode__ctrl = 0x00;
00751     pstatic->clk_gating__ctrl = 0x00;
00752     pstatic->nvm_bist__ctrl = 0x00;
00753     pstatic->nvm_bist__num_nvm_words = 0x00;
00754     pstatic->nvm_bist__start_address = 0x00;
00755     pstatic->host_if__status = 0x00;
00756     pstatic->pad_i2c_hv__config = 0x00;
00757     pstatic->pad_i2c_hv__extsup_config = 0x00;
00758 
00759 
00760     pstatic->gpio_hv_pad__ctrl = 0x00;
00761 
00762 
00763     pstatic->gpio_hv_mux__ctrl  =
00764             VL53L1_DEVICEINTERRUPTPOLARITY_ACTIVE_LOW |
00765             VL53L1_DEVICEGPIOMODE_OUTPUT_RANGE_AND_ERROR_INTERRUPTS;
00766 
00767     pstatic->gpio__tio_hv_status = 0x02;
00768     pstatic->gpio__fio_hv_status = 0x00;
00769     pstatic->ana_config__spad_sel_pswidth = 0x02;
00770     pstatic->ana_config__vcsel_pulse_width_offset = 0x08;
00771     pstatic->ana_config__fast_osc__config_ctrl = 0x00;
00772 
00773     pstatic->sigma_estimator__effective_pulse_width_ns        =
00774             ptuning_parms->tp_lite_sigma_est_pulse_width_ns;
00775     pstatic->sigma_estimator__effective_ambient_width_ns      =
00776             ptuning_parms->tp_lite_sigma_est_amb_width_ns;
00777     pstatic->sigma_estimator__sigma_ref_mm                    =
00778             ptuning_parms->tp_lite_sigma_ref_mm;
00779 
00780     pstatic->algo__crosstalk_compensation_valid_height_mm = 0x01;
00781     pstatic->spare_host_config__static_config_spare_0 = 0x00;
00782     pstatic->spare_host_config__static_config_spare_1 = 0x00;
00783 
00784     pstatic->algo__range_ignore_threshold_mcps = 0x0000;
00785 
00786 
00787     pstatic->algo__range_ignore_valid_height_mm = 0xff;
00788     pstatic->algo__range_min_clip                             =
00789             ptuning_parms->tp_lite_min_clip;
00790 
00791     pstatic->algo__consistency_check__tolerance               =
00792             ptuning_parms->tp_consistency_lite_phase_tolerance;
00793     pstatic->spare_host_config__static_config_spare_2 = 0x00;
00794     pstatic->sd_config__reset_stages_msb = 0x00;
00795     pstatic->sd_config__reset_stages_lsb = 0x00;
00796 
00797     pgeneral->gph_config__stream_count_update_value = 0x00;
00798     pgeneral->global_config__stream_divider = 0x00;
00799     pgeneral->system__interrupt_config_gpio =
00800             VL53L1_INTERRUPT_CONFIG_NEW_SAMPLE_READY;
00801     pgeneral->cal_config__vcsel_start = 0x0B;
00802 
00803 
00804     pgeneral->cal_config__repeat_rate                         =
00805             ptuning_parms->tp_cal_repeat_rate;
00806     pgeneral->global_config__vcsel_width = 0x02;
00807 
00808     pgeneral->phasecal_config__timeout_macrop = 0x0D;
00809 
00810     pgeneral->phasecal_config__target                         =
00811             ptuning_parms->tp_phasecal_target;
00812     pgeneral->phasecal_config__override = 0x00;
00813     pgeneral->dss_config__roi_mode_control =
00814             VL53L1_DEVICEDSSMODE__TARGET_RATE;
00815 
00816     pgeneral->system__thresh_rate_high = 0x0000;
00817     pgeneral->system__thresh_rate_low = 0x0000;
00818 
00819     pgeneral->dss_config__manual_effective_spads_select = 0x8C00;
00820     pgeneral->dss_config__manual_block_select = 0x00;
00821 
00822 
00823     pgeneral->dss_config__aperture_attenuation = 0x38;
00824     pgeneral->dss_config__max_spads_limit = 0xFF;
00825     pgeneral->dss_config__min_spads_limit = 0x01;
00826 
00827 
00828 
00829 
00830     ptiming->mm_config__timeout_macrop_a_hi = 0x00;
00831     ptiming->mm_config__timeout_macrop_a_lo = 0x1a;
00832     ptiming->mm_config__timeout_macrop_b_hi = 0x00;
00833     ptiming->mm_config__timeout_macrop_b_lo = 0x20;
00834 
00835     ptiming->range_config__timeout_macrop_a_hi = 0x01;
00836     ptiming->range_config__timeout_macrop_a_lo = 0xCC;
00837 
00838     ptiming->range_config__vcsel_period_a = 0x0B;
00839 
00840     ptiming->range_config__timeout_macrop_b_hi = 0x01;
00841     ptiming->range_config__timeout_macrop_b_lo = 0xF5;
00842 
00843     ptiming->range_config__vcsel_period_b = 0x09;
00844 
00845     ptiming->range_config__sigma_thresh                       =
00846             ptuning_parms->tp_lite_med_sigma_thresh_mm;
00847 
00848     ptiming->range_config__min_count_rate_rtn_limit_mcps      =
00849             ptuning_parms->tp_lite_med_min_count_rate_rtn_mcps;
00850 
00851 
00852     ptiming->range_config__valid_phase_low = 0x08;
00853     ptiming->range_config__valid_phase_high = 0x78;
00854     ptiming->system__intermeasurement_period = 0x00000000;
00855     ptiming->system__fractional_enable = 0x00;
00856 
00857 
00858 
00859     phistogram->histogram_config__low_amb_even_bin_0_1 = 0x07;
00860     phistogram->histogram_config__low_amb_even_bin_2_3 = 0x21;
00861     phistogram->histogram_config__low_amb_even_bin_4_5 = 0x43;
00862 
00863     phistogram->histogram_config__low_amb_odd_bin_0_1 = 0x10;
00864     phistogram->histogram_config__low_amb_odd_bin_2_3 = 0x32;
00865     phistogram->histogram_config__low_amb_odd_bin_4_5 = 0x54;
00866 
00867     phistogram->histogram_config__mid_amb_even_bin_0_1 = 0x07;
00868     phistogram->histogram_config__mid_amb_even_bin_2_3 = 0x21;
00869     phistogram->histogram_config__mid_amb_even_bin_4_5 = 0x43;
00870 
00871     phistogram->histogram_config__mid_amb_odd_bin_0_1 = 0x10;
00872     phistogram->histogram_config__mid_amb_odd_bin_2 = 0x02;
00873     phistogram->histogram_config__mid_amb_odd_bin_3_4 = 0x43;
00874     phistogram->histogram_config__mid_amb_odd_bin_5 = 0x05;
00875 
00876     phistogram->histogram_config__user_bin_offset = 0x00;
00877 
00878     phistogram->histogram_config__high_amb_even_bin_0_1 = 0x07;
00879     phistogram->histogram_config__high_amb_even_bin_2_3 = 0x21;
00880     phistogram->histogram_config__high_amb_even_bin_4_5 = 0x43;
00881 
00882     phistogram->histogram_config__high_amb_odd_bin_0_1 = 0x10;
00883     phistogram->histogram_config__high_amb_odd_bin_2_3 = 0x32;
00884     phistogram->histogram_config__high_amb_odd_bin_4_5 = 0x54;
00885 
00886     phistogram->histogram_config__amb_thresh_low = 0xFFFF;
00887     phistogram->histogram_config__amb_thresh_high = 0xFFFF;
00888 
00889     phistogram->histogram_config__spad_array_selection = 0x00;
00890 
00891 
00892     pzone_cfg->max_zones                     = VL53L1_MAX_USER_ZONES;
00893     pzone_cfg->active_zones = 0x00;
00894     pzone_cfg->user_zones[0].height = 0x0f;
00895     pzone_cfg->user_zones[0].width = 0x0f;
00896     pzone_cfg->user_zones[0].x_centre = 0x08;
00897     pzone_cfg->user_zones[0].y_centre = 0x08;
00898 
00899 
00900 
00901     pdynamic->system__grouped_parameter_hold_0 = 0x01;
00902 
00903     pdynamic->system__thresh_high = 0x0000;
00904     pdynamic->system__thresh_low = 0x0000;
00905     pdynamic->system__enable_xtalk_per_quadrant = 0x00;
00906     pdynamic->system__seed_config =
00907             ptuning_parms->tp_lite_seed_cfg;
00908 
00909 
00910     pdynamic->sd_config__woi_sd0 = 0x0B;
00911 
00912     pdynamic->sd_config__woi_sd1 = 0x09;
00913 
00914     pdynamic->sd_config__initial_phase_sd0                     =
00915             ptuning_parms->tp_init_phase_rtn_lite_med;
00916     pdynamic->sd_config__initial_phase_sd1                     =
00917             ptuning_parms->tp_init_phase_ref_lite_med;
00918 
00919     pdynamic->system__grouped_parameter_hold_1 = 0x01;
00920 
00921 
00922 
00923     pdynamic->sd_config__first_order_select =
00924             ptuning_parms->tp_lite_first_order_select;
00925     pdynamic->sd_config__quantifier         =
00926             ptuning_parms->tp_lite_quantifier;
00927 
00928 
00929     pdynamic->roi_config__user_roi_centre_spad = 0xC7;
00930 
00931     pdynamic->roi_config__user_roi_requested_global_xy_size = 0xFF;
00932 
00933 
00934     pdynamic->system__sequence_config                          =
00935             VL53L1_SEQUENCE_VHV_EN |
00936             VL53L1_SEQUENCE_PHASECAL_EN |
00937             VL53L1_SEQUENCE_DSS1_EN |
00938             VL53L1_SEQUENCE_DSS2_EN |
00939             VL53L1_SEQUENCE_MM2_EN |
00940             VL53L1_SEQUENCE_RANGE_EN;
00941 
00942     pdynamic->system__grouped_parameter_hold = 0x02;
00943 
00944 
00945 
00946 
00947     psystem->system__stream_count_ctrl = 0x00;
00948     psystem->firmware__enable = 0x01;
00949     psystem->system__interrupt_clear                           =
00950             VL53L1_CLEAR_RANGE_INT;
00951 
00952     psystem->system__mode_start                                =
00953             VL53L1_DEVICESCHEDULERMODE_STREAMING |
00954             VL53L1_DEVICEREADOUTMODE_SINGLE_SD |
00955             VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
00956 
00957     LOG_FUNCTION_END(status);
00958 
00959     return status;
00960 }
00961 
00962 
00963 VL53L1_Error VL53L1_preset_mode_standard_ranging_short_range(
00964     VL53L1_static_config_t    *pstatic,
00965     VL53L1_histogram_config_t *phistogram,
00966     VL53L1_general_config_t   *pgeneral,
00967     VL53L1_timing_config_t    *ptiming,
00968     VL53L1_dynamic_config_t   *pdynamic,
00969     VL53L1_system_control_t   *psystem,
00970     VL53L1_tuning_parm_storage_t *ptuning_parms,
00971     VL53L1_zone_config_t      *pzone_cfg)
00972 {
00973 
00974 
00975     VL53L1_Error  status = VL53L1_ERROR_NONE;
00976 
00977     LOG_FUNCTION_START("");
00978 
00979 
00980 
00981     status = VL53L1_preset_mode_standard_ranging(
00982         pstatic,
00983         phistogram,
00984         pgeneral,
00985         ptiming,
00986         pdynamic,
00987         psystem,
00988         ptuning_parms,
00989         pzone_cfg);
00990 
00991 
00992 
00993     if (status == VL53L1_ERROR_NONE) {
00994 
00995 
00996 
00997         ptiming->range_config__vcsel_period_a = 0x07;
00998         ptiming->range_config__vcsel_period_b = 0x05;
00999         ptiming->range_config__sigma_thresh                  =
01000                 ptuning_parms->tp_lite_short_sigma_thresh_mm;
01001         ptiming->range_config__min_count_rate_rtn_limit_mcps =
01002             ptuning_parms->tp_lite_short_min_count_rate_rtn_mcps;
01003         ptiming->range_config__valid_phase_low = 0x08;
01004         ptiming->range_config__valid_phase_high = 0x38;
01005 
01006 
01007 
01008         pdynamic->sd_config__woi_sd0 = 0x07;
01009         pdynamic->sd_config__woi_sd1 = 0x05;
01010         pdynamic->sd_config__initial_phase_sd0               =
01011                 ptuning_parms->tp_init_phase_rtn_lite_short;
01012         pdynamic->sd_config__initial_phase_sd1               =
01013                 ptuning_parms->tp_init_phase_ref_lite_short;
01014     }
01015 
01016     LOG_FUNCTION_END(status);
01017 
01018     return status;
01019 }
01020 
01021 
01022 VL53L1_Error VL53L1_preset_mode_standard_ranging_long_range(
01023     VL53L1_static_config_t    *pstatic,
01024     VL53L1_histogram_config_t *phistogram,
01025     VL53L1_general_config_t   *pgeneral,
01026     VL53L1_timing_config_t    *ptiming,
01027     VL53L1_dynamic_config_t   *pdynamic,
01028     VL53L1_system_control_t   *psystem,
01029     VL53L1_tuning_parm_storage_t *ptuning_parms,
01030     VL53L1_zone_config_t      *pzone_cfg)
01031 {
01032 
01033 
01034     VL53L1_Error  status = VL53L1_ERROR_NONE;
01035 
01036     LOG_FUNCTION_START("");
01037 
01038 
01039 
01040     status = VL53L1_preset_mode_standard_ranging(
01041         pstatic,
01042         phistogram,
01043         pgeneral,
01044         ptiming,
01045         pdynamic,
01046         psystem,
01047         ptuning_parms,
01048         pzone_cfg);
01049 
01050 
01051 
01052     if (status == VL53L1_ERROR_NONE) {
01053 
01054 
01055 
01056         ptiming->range_config__vcsel_period_a = 0x0F;
01057         ptiming->range_config__vcsel_period_b = 0x0D;
01058         ptiming->range_config__sigma_thresh                  =
01059                 ptuning_parms->tp_lite_long_sigma_thresh_mm;
01060         ptiming->range_config__min_count_rate_rtn_limit_mcps =
01061             ptuning_parms->tp_lite_long_min_count_rate_rtn_mcps;
01062         ptiming->range_config__valid_phase_low = 0x08;
01063         ptiming->range_config__valid_phase_high = 0xB8;
01064 
01065 
01066 
01067         pdynamic->sd_config__woi_sd0 = 0x0F;
01068         pdynamic->sd_config__woi_sd1 = 0x0D;
01069         pdynamic->sd_config__initial_phase_sd0               =
01070                 ptuning_parms->tp_init_phase_rtn_lite_long;
01071         pdynamic->sd_config__initial_phase_sd1               =
01072                 ptuning_parms->tp_init_phase_ref_lite_long;
01073     }
01074 
01075     LOG_FUNCTION_END(status);
01076 
01077     return status;
01078 }
01079 
01080 
01081 VL53L1_Error VL53L1_preset_mode_standard_ranging_mm1_cal(
01082     VL53L1_static_config_t    *pstatic,
01083     VL53L1_histogram_config_t *phistogram,
01084     VL53L1_general_config_t   *pgeneral,
01085     VL53L1_timing_config_t    *ptiming,
01086     VL53L1_dynamic_config_t   *pdynamic,
01087     VL53L1_system_control_t   *psystem,
01088     VL53L1_tuning_parm_storage_t *ptuning_parms,
01089     VL53L1_zone_config_t      *pzone_cfg)
01090 {
01091 
01092 
01093     VL53L1_Error  status = VL53L1_ERROR_NONE;
01094 
01095     LOG_FUNCTION_START("");
01096 
01097 
01098 
01099     status = VL53L1_preset_mode_standard_ranging(
01100         pstatic,
01101         phistogram,
01102         pgeneral,
01103         ptiming,
01104         pdynamic,
01105         psystem,
01106         ptuning_parms,
01107         pzone_cfg);
01108 
01109 
01110 
01111     if (status == VL53L1_ERROR_NONE) {
01112 
01113         pgeneral->dss_config__roi_mode_control =
01114             VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
01115 
01116         pdynamic->system__sequence_config  =
01117                 VL53L1_SEQUENCE_VHV_EN |
01118                 VL53L1_SEQUENCE_PHASECAL_EN |
01119                 VL53L1_SEQUENCE_DSS1_EN |
01120                 VL53L1_SEQUENCE_DSS2_EN |
01121                 VL53L1_SEQUENCE_MM1_EN;
01122     }
01123 
01124     LOG_FUNCTION_END(status);
01125 
01126     return status;
01127 }
01128 
01129 
01130 VL53L1_Error VL53L1_preset_mode_standard_ranging_mm2_cal(
01131     VL53L1_static_config_t    *pstatic,
01132     VL53L1_histogram_config_t *phistogram,
01133     VL53L1_general_config_t   *pgeneral,
01134     VL53L1_timing_config_t    *ptiming,
01135     VL53L1_dynamic_config_t   *pdynamic,
01136     VL53L1_system_control_t   *psystem,
01137     VL53L1_tuning_parm_storage_t *ptuning_parms,
01138     VL53L1_zone_config_t      *pzone_cfg)
01139 {
01140 
01141 
01142     VL53L1_Error  status = VL53L1_ERROR_NONE;
01143 
01144     LOG_FUNCTION_START("");
01145 
01146 
01147 
01148     status = VL53L1_preset_mode_standard_ranging(
01149         pstatic,
01150         phistogram,
01151         pgeneral,
01152         ptiming,
01153         pdynamic,
01154         psystem,
01155         ptuning_parms,
01156         pzone_cfg);
01157 
01158 
01159 
01160     if (status == VL53L1_ERROR_NONE) {
01161 
01162         pgeneral->dss_config__roi_mode_control =
01163             VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
01164 
01165         pdynamic->system__sequence_config  =
01166                 VL53L1_SEQUENCE_VHV_EN |
01167                 VL53L1_SEQUENCE_PHASECAL_EN |
01168                 VL53L1_SEQUENCE_DSS1_EN |
01169                 VL53L1_SEQUENCE_DSS2_EN |
01170                 VL53L1_SEQUENCE_MM2_EN;
01171     }
01172 
01173     LOG_FUNCTION_END(status);
01174 
01175     return status;
01176 }
01177 
01178 
01179 VL53L1_Error VL53L1_preset_mode_timed_ranging(
01180 
01181     VL53L1_static_config_t    *pstatic,
01182     VL53L1_histogram_config_t *phistogram,
01183     VL53L1_general_config_t   *pgeneral,
01184     VL53L1_timing_config_t    *ptiming,
01185     VL53L1_dynamic_config_t   *pdynamic,
01186     VL53L1_system_control_t   *psystem,
01187     VL53L1_tuning_parm_storage_t *ptuning_parms,
01188     VL53L1_zone_config_t      *pzone_cfg)
01189 {
01190 
01191 
01192     VL53L1_Error  status = VL53L1_ERROR_NONE;
01193 
01194     LOG_FUNCTION_START("");
01195 
01196 
01197 
01198     status = VL53L1_preset_mode_standard_ranging(
01199                     pstatic,
01200                     phistogram,
01201                     pgeneral,
01202                     ptiming,
01203                     pdynamic,
01204                     psystem,
01205                     ptuning_parms,
01206                     pzone_cfg);
01207 
01208 
01209 
01210     if (status == VL53L1_ERROR_NONE) {
01211 
01212 
01213 
01214 
01215         pdynamic->system__grouped_parameter_hold = 0x00;
01216 
01217 
01218         ptiming->range_config__timeout_macrop_a_hi = 0x00;
01219         ptiming->range_config__timeout_macrop_a_lo = 0xB1;
01220 
01221         ptiming->range_config__timeout_macrop_b_hi = 0x00;
01222         ptiming->range_config__timeout_macrop_b_lo = 0xD4;
01223 
01224 
01225 
01226         ptiming->system__intermeasurement_period = 0x00000600;
01227         pdynamic->system__seed_config =
01228                 ptuning_parms->tp_timed_seed_cfg;
01229 
01230 
01231 
01232 
01233         psystem->system__mode_start =
01234                 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
01235                 VL53L1_DEVICEREADOUTMODE_SINGLE_SD     |
01236                 VL53L1_DEVICEMEASUREMENTMODE_TIMED;
01237     }
01238 
01239     LOG_FUNCTION_END(status);
01240 
01241     return status;
01242 }
01243 
01244 VL53L1_Error VL53L1_preset_mode_timed_ranging_short_range(
01245 
01246     VL53L1_static_config_t    *pstatic,
01247     VL53L1_histogram_config_t *phistogram,
01248     VL53L1_general_config_t   *pgeneral,
01249     VL53L1_timing_config_t    *ptiming,
01250     VL53L1_dynamic_config_t   *pdynamic,
01251     VL53L1_system_control_t   *psystem,
01252     VL53L1_tuning_parm_storage_t *ptuning_parms,
01253     VL53L1_zone_config_t      *pzone_cfg)
01254 {
01255 
01256 
01257     VL53L1_Error  status = VL53L1_ERROR_NONE;
01258 
01259     LOG_FUNCTION_START("");
01260 
01261 
01262 
01263     status = VL53L1_preset_mode_standard_ranging_short_range(
01264                     pstatic,
01265                     phistogram,
01266                     pgeneral,
01267                     ptiming,
01268                     pdynamic,
01269                     psystem,
01270                     ptuning_parms,
01271                     pzone_cfg);
01272 
01273 
01274 
01275     if (status == VL53L1_ERROR_NONE) {
01276 
01277 
01278 
01279 
01280         pdynamic->system__grouped_parameter_hold = 0x00;
01281 
01282 
01283 
01284 
01285 
01286         ptiming->range_config__timeout_macrop_a_hi = 0x01;
01287         ptiming->range_config__timeout_macrop_a_lo = 0x84;
01288 
01289         ptiming->range_config__timeout_macrop_b_hi = 0x01;
01290         ptiming->range_config__timeout_macrop_b_lo = 0xB1;
01291 
01292         ptiming->system__intermeasurement_period = 0x00000600;
01293         pdynamic->system__seed_config =
01294                 ptuning_parms->tp_timed_seed_cfg;
01295 
01296 
01297 
01298 
01299         psystem->system__mode_start =
01300                 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
01301                 VL53L1_DEVICEREADOUTMODE_SINGLE_SD     |
01302                 VL53L1_DEVICEMEASUREMENTMODE_TIMED;
01303     }
01304 
01305     LOG_FUNCTION_END(status);
01306 
01307     return status;
01308 }
01309 
01310 VL53L1_Error VL53L1_preset_mode_timed_ranging_long_range(
01311 
01312     VL53L1_static_config_t    *pstatic,
01313     VL53L1_histogram_config_t *phistogram,
01314     VL53L1_general_config_t   *pgeneral,
01315     VL53L1_timing_config_t    *ptiming,
01316     VL53L1_dynamic_config_t   *pdynamic,
01317     VL53L1_system_control_t   *psystem,
01318     VL53L1_tuning_parm_storage_t *ptuning_parms,
01319     VL53L1_zone_config_t      *pzone_cfg)
01320 {
01321 
01322 
01323     VL53L1_Error  status = VL53L1_ERROR_NONE;
01324 
01325     LOG_FUNCTION_START("");
01326 
01327 
01328 
01329     status = VL53L1_preset_mode_standard_ranging_long_range(
01330                     pstatic,
01331                     phistogram,
01332                     pgeneral,
01333                     ptiming,
01334                     pdynamic,
01335                     psystem,
01336                     ptuning_parms,
01337                     pzone_cfg);
01338 
01339 
01340 
01341     if (status == VL53L1_ERROR_NONE) {
01342 
01343 
01344 
01345 
01346         pdynamic->system__grouped_parameter_hold = 0x00;
01347 
01348 
01349 
01350 
01351 
01352         ptiming->range_config__timeout_macrop_a_hi = 0x00;
01353         ptiming->range_config__timeout_macrop_a_lo = 0x97;
01354 
01355         ptiming->range_config__timeout_macrop_b_hi = 0x00;
01356         ptiming->range_config__timeout_macrop_b_lo = 0xB1;
01357 
01358         ptiming->system__intermeasurement_period = 0x00000600;
01359         pdynamic->system__seed_config =
01360                 ptuning_parms->tp_timed_seed_cfg;
01361 
01362 
01363 
01364 
01365         psystem->system__mode_start =
01366                 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
01367                 VL53L1_DEVICEREADOUTMODE_SINGLE_SD     |
01368                 VL53L1_DEVICEMEASUREMENTMODE_TIMED;
01369     }
01370 
01371     LOG_FUNCTION_END(status);
01372 
01373     return status;
01374 }
01375 
01376 
01377 VL53L1_Error VL53L1_preset_mode_low_power_auto_ranging(
01378 
01379     VL53L1_static_config_t    *pstatic,
01380     VL53L1_histogram_config_t *phistogram,
01381     VL53L1_general_config_t   *pgeneral,
01382     VL53L1_timing_config_t    *ptiming,
01383     VL53L1_dynamic_config_t   *pdynamic,
01384     VL53L1_system_control_t   *psystem,
01385     VL53L1_tuning_parm_storage_t *ptuning_parms,
01386     VL53L1_zone_config_t      *pzone_cfg,
01387     VL53L1_low_power_auto_data_t *plpadata)
01388 {
01389 
01390 
01391     VL53L1_Error  status = VL53L1_ERROR_NONE;
01392 
01393     LOG_FUNCTION_START("");
01394 
01395 
01396 
01397     status = VL53L1_preset_mode_timed_ranging(
01398                     pstatic,
01399                     phistogram,
01400                     pgeneral,
01401                     ptiming,
01402                     pdynamic,
01403                     psystem,
01404                     ptuning_parms,
01405                     pzone_cfg);
01406 
01407 
01408 
01409     if (status == VL53L1_ERROR_NONE) {
01410         status = VL53L1_config_low_power_auto_mode(
01411                 pgeneral,
01412                 pdynamic,
01413                 plpadata
01414                 );
01415     }
01416 
01417     LOG_FUNCTION_END(status);
01418 
01419     return status;
01420 }
01421 
01422 VL53L1_Error VL53L1_preset_mode_low_power_auto_short_ranging(
01423 
01424     VL53L1_static_config_t    *pstatic,
01425     VL53L1_histogram_config_t *phistogram,
01426     VL53L1_general_config_t   *pgeneral,
01427     VL53L1_timing_config_t    *ptiming,
01428     VL53L1_dynamic_config_t   *pdynamic,
01429     VL53L1_system_control_t   *psystem,
01430     VL53L1_tuning_parm_storage_t *ptuning_parms,
01431     VL53L1_zone_config_t      *pzone_cfg,
01432     VL53L1_low_power_auto_data_t *plpadata)
01433 {
01434 
01435 
01436     VL53L1_Error  status = VL53L1_ERROR_NONE;
01437 
01438     LOG_FUNCTION_START("");
01439 
01440 
01441 
01442     status = VL53L1_preset_mode_timed_ranging_short_range(
01443                     pstatic,
01444                     phistogram,
01445                     pgeneral,
01446                     ptiming,
01447                     pdynamic,
01448                     psystem,
01449                     ptuning_parms,
01450                     pzone_cfg);
01451 
01452 
01453 
01454     if (status == VL53L1_ERROR_NONE) {
01455         status = VL53L1_config_low_power_auto_mode(
01456                 pgeneral,
01457                 pdynamic,
01458                 plpadata
01459                 );
01460     }
01461 
01462     LOG_FUNCTION_END(status);
01463 
01464     return status;
01465 }
01466 
01467 VL53L1_Error VL53L1_preset_mode_low_power_auto_long_ranging(
01468 
01469     VL53L1_static_config_t    *pstatic,
01470     VL53L1_histogram_config_t *phistogram,
01471     VL53L1_general_config_t   *pgeneral,
01472     VL53L1_timing_config_t    *ptiming,
01473     VL53L1_dynamic_config_t   *pdynamic,
01474     VL53L1_system_control_t   *psystem,
01475     VL53L1_tuning_parm_storage_t *ptuning_parms,
01476     VL53L1_zone_config_t      *pzone_cfg,
01477     VL53L1_low_power_auto_data_t *plpadata)
01478 {
01479 
01480 
01481     VL53L1_Error  status = VL53L1_ERROR_NONE;
01482 
01483     LOG_FUNCTION_START("");
01484 
01485 
01486 
01487     status = VL53L1_preset_mode_timed_ranging_long_range(
01488                     pstatic,
01489                     phistogram,
01490                     pgeneral,
01491                     ptiming,
01492                     pdynamic,
01493                     psystem,
01494                     ptuning_parms,
01495                     pzone_cfg);
01496 
01497 
01498 
01499     if (status == VL53L1_ERROR_NONE) {
01500         status = VL53L1_config_low_power_auto_mode(
01501                 pgeneral,
01502                 pdynamic,
01503                 plpadata
01504                 );
01505     }
01506 
01507     LOG_FUNCTION_END(status);
01508 
01509     return status;
01510 }
01511 
01512 
01513 
01514 VL53L1_Error VL53L1_preset_mode_singleshot_ranging(
01515 
01516     VL53L1_static_config_t    *pstatic,
01517     VL53L1_histogram_config_t *phistogram,
01518     VL53L1_general_config_t   *pgeneral,
01519     VL53L1_timing_config_t    *ptiming,
01520     VL53L1_dynamic_config_t   *pdynamic,
01521     VL53L1_system_control_t   *psystem,
01522     VL53L1_tuning_parm_storage_t *ptuning_parms,
01523     VL53L1_zone_config_t      *pzone_cfg)
01524 {
01525 
01526 
01527     VL53L1_Error  status = VL53L1_ERROR_NONE;
01528 
01529     LOG_FUNCTION_START("");
01530 
01531 
01532 
01533     status = VL53L1_preset_mode_standard_ranging(
01534         pstatic,
01535         phistogram,
01536         pgeneral,
01537         ptiming,
01538         pdynamic,
01539         psystem,
01540         ptuning_parms,
01541         pzone_cfg);
01542 
01543 
01544 
01545     if (status == VL53L1_ERROR_NONE) {
01546 
01547 
01548 
01549 
01550         pdynamic->system__grouped_parameter_hold = 0x00;
01551 
01552 
01553 
01554 
01555         ptiming->range_config__timeout_macrop_a_hi = 0x00;
01556         ptiming->range_config__timeout_macrop_a_lo = 0xB1;
01557 
01558         ptiming->range_config__timeout_macrop_b_hi = 0x00;
01559         ptiming->range_config__timeout_macrop_b_lo = 0xD4;
01560 
01561         pdynamic->system__seed_config =
01562                 ptuning_parms->tp_timed_seed_cfg;
01563 
01564 
01565 
01566 
01567         psystem->system__mode_start =
01568                 VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO |
01569                 VL53L1_DEVICEREADOUTMODE_SINGLE_SD     |
01570                 VL53L1_DEVICEMEASUREMENTMODE_SINGLESHOT;
01571     }
01572 
01573     LOG_FUNCTION_END(status);
01574 
01575     return status;
01576 }
01577 
01578 
01579 VL53L1_Error VL53L1_preset_mode_histogram_ranging(
01580     VL53L1_hist_post_process_config_t  *phistpostprocess,
01581     VL53L1_static_config_t             *pstatic,
01582     VL53L1_histogram_config_t          *phistogram,
01583     VL53L1_general_config_t            *pgeneral,
01584     VL53L1_timing_config_t             *ptiming,
01585     VL53L1_dynamic_config_t            *pdynamic,
01586     VL53L1_system_control_t            *psystem,
01587     VL53L1_tuning_parm_storage_t       *ptuning_parms,
01588     VL53L1_zone_config_t               *pzone_cfg)
01589 {
01590 
01591 
01592     VL53L1_Error  status = VL53L1_ERROR_NONE;
01593 
01594     LOG_FUNCTION_START("");
01595 
01596 
01597 
01598     status =
01599         VL53L1_preset_mode_standard_ranging(
01600             pstatic,
01601             phistogram,
01602             pgeneral,
01603             ptiming,
01604             pdynamic,
01605             psystem,
01606             ptuning_parms,
01607             pzone_cfg);
01608 
01609 
01610 
01611     if (status == VL53L1_ERROR_NONE) {
01612 
01613 
01614 
01615         pstatic->dss_config__target_total_rate_mcps = 0x1400;
01616 
01617 
01618 
01619         VL53L1_init_histogram_config_structure(
01620                 7, 0, 1, 2, 3, 4,
01621                 0, 1, 2, 3, 4, 5,
01622                 phistogram);
01623 
01624 
01625         VL53L1_init_histogram_multizone_config_structure(
01626                 7, 0, 1, 2, 3, 4,
01627                 0, 1, 2, 3, 4, 5,
01628                 &(pzone_cfg->multizone_hist_cfg));
01629 
01630 
01631 
01632 
01633         ptiming->range_config__vcsel_period_a = 0x09;
01634         ptiming->range_config__vcsel_period_b = 0x0B;
01635         pdynamic->sd_config__woi_sd0 = 0x09;
01636         pdynamic->sd_config__woi_sd1 = 0x0B;
01637 
01638 
01639 
01640 
01641         ptiming->mm_config__timeout_macrop_a_hi = 0x00;
01642         ptiming->mm_config__timeout_macrop_a_lo = 0x20;
01643         ptiming->mm_config__timeout_macrop_b_hi = 0x00;
01644         ptiming->mm_config__timeout_macrop_b_lo = 0x1A;
01645 
01646 
01647         ptiming->range_config__timeout_macrop_a_hi = 0x00;
01648         ptiming->range_config__timeout_macrop_a_lo = 0x28;
01649 
01650 
01651         ptiming->range_config__timeout_macrop_b_hi = 0x00;
01652         ptiming->range_config__timeout_macrop_b_lo = 0x21;
01653 
01654 
01655         pgeneral->phasecal_config__timeout_macrop = 0xF5;
01656 
01657 
01658 
01659         phistpostprocess->valid_phase_low = 0x08;
01660         phistpostprocess->valid_phase_high = 0x88;
01661 
01662 
01663 
01664         VL53L1_copy_hist_cfg_to_static_cfg(
01665                 phistogram,
01666                 pstatic,
01667                 pgeneral,
01668                 ptiming,
01669                 pdynamic);
01670 
01671 
01672 
01673 
01674         pdynamic->system__sequence_config =
01675                 VL53L1_SEQUENCE_VHV_EN |
01676                 VL53L1_SEQUENCE_PHASECAL_EN |
01677                 VL53L1_SEQUENCE_DSS1_EN |
01678                 VL53L1_SEQUENCE_DSS2_EN |
01679 
01680 
01681                 VL53L1_SEQUENCE_RANGE_EN;
01682 
01683 
01684 
01685 
01686         psystem->system__mode_start =
01687                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
01688                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
01689                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
01690     }
01691 
01692     LOG_FUNCTION_END(status);
01693 
01694     return status;
01695 }
01696 
01697 
01698 VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm1(
01699     VL53L1_hist_post_process_config_t  *phistpostprocess,
01700     VL53L1_static_config_t             *pstatic,
01701     VL53L1_histogram_config_t          *phistogram,
01702     VL53L1_general_config_t            *pgeneral,
01703     VL53L1_timing_config_t             *ptiming,
01704     VL53L1_dynamic_config_t            *pdynamic,
01705     VL53L1_system_control_t            *psystem,
01706     VL53L1_tuning_parm_storage_t       *ptuning_parms,
01707     VL53L1_zone_config_t               *pzone_cfg)
01708 {
01709 
01710 
01711     VL53L1_Error  status = VL53L1_ERROR_NONE;
01712 
01713     LOG_FUNCTION_START("");
01714 
01715 
01716 
01717     status =
01718         VL53L1_preset_mode_histogram_ranging(
01719             phistpostprocess,
01720             pstatic,
01721             phistogram,
01722             pgeneral,
01723             ptiming,
01724             pdynamic,
01725             psystem,
01726             ptuning_parms,
01727             pzone_cfg);
01728 
01729 
01730 
01731     if (status == VL53L1_ERROR_NONE) {
01732 
01733 
01734 
01735         VL53L1_init_histogram_config_structure(
01736                   7,   0,   1, 2, 3, 4,
01737                 8+0, 8+1, 8+2, 3, 4, 5,
01738                 phistogram);
01739 
01740 
01741         VL53L1_init_histogram_multizone_config_structure(
01742                   7,  0,    1, 2, 3, 4,
01743                 8+0, 8+1, 8+2, 3, 4, 5,
01744                 &(pzone_cfg->multizone_hist_cfg));
01745 
01746 
01747 
01748         VL53L1_copy_hist_cfg_to_static_cfg(
01749                 phistogram,
01750                 pstatic,
01751                 pgeneral,
01752                 ptiming,
01753                 pdynamic);
01754 
01755 
01756 
01757         pdynamic->system__sequence_config =
01758                 VL53L1_SEQUENCE_VHV_EN |
01759                 VL53L1_SEQUENCE_PHASECAL_EN |
01760                 VL53L1_SEQUENCE_DSS1_EN |
01761                 VL53L1_SEQUENCE_DSS2_EN |
01762                 VL53L1_SEQUENCE_MM1_EN |
01763                 VL53L1_SEQUENCE_RANGE_EN;
01764 
01765 
01766 
01767         psystem->system__mode_start =
01768                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
01769                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
01770                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
01771     }
01772 
01773     LOG_FUNCTION_END(status);
01774 
01775     return status;
01776 }
01777 
01778 
01779 VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm2(
01780     VL53L1_hist_post_process_config_t  *phistpostprocess,
01781     VL53L1_static_config_t             *pstatic,
01782     VL53L1_histogram_config_t          *phistogram,
01783     VL53L1_general_config_t            *pgeneral,
01784     VL53L1_timing_config_t             *ptiming,
01785     VL53L1_dynamic_config_t            *pdynamic,
01786     VL53L1_system_control_t            *psystem,
01787     VL53L1_tuning_parm_storage_t       *ptuning_parms,
01788     VL53L1_zone_config_t               *pzone_cfg)
01789 {
01790 
01791 
01792     VL53L1_Error  status = VL53L1_ERROR_NONE;
01793 
01794     LOG_FUNCTION_START("");
01795 
01796 
01797 
01798     status =
01799         VL53L1_preset_mode_histogram_ranging_with_mm1(
01800             phistpostprocess,
01801             pstatic,
01802             phistogram,
01803             pgeneral,
01804             ptiming,
01805             pdynamic,
01806             psystem,
01807             ptuning_parms,
01808             pzone_cfg);
01809 
01810 
01811 
01812     if (status == VL53L1_ERROR_NONE) {
01813 
01814 
01815 
01816         pdynamic->system__sequence_config =
01817                 VL53L1_SEQUENCE_VHV_EN |
01818                 VL53L1_SEQUENCE_PHASECAL_EN |
01819                 VL53L1_SEQUENCE_DSS1_EN |
01820                 VL53L1_SEQUENCE_DSS2_EN |
01821                 VL53L1_SEQUENCE_MM2_EN |
01822                 VL53L1_SEQUENCE_RANGE_EN;
01823     }
01824 
01825     LOG_FUNCTION_END(status);
01826 
01827     return status;
01828 }
01829 
01830 
01831 VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm1_cal(
01832     VL53L1_hist_post_process_config_t  *phistpostprocess,
01833     VL53L1_static_config_t             *pstatic,
01834     VL53L1_histogram_config_t          *phistogram,
01835     VL53L1_general_config_t            *pgeneral,
01836     VL53L1_timing_config_t             *ptiming,
01837     VL53L1_dynamic_config_t            *pdynamic,
01838     VL53L1_system_control_t            *psystem,
01839     VL53L1_tuning_parm_storage_t       *ptuning_parms,
01840     VL53L1_zone_config_t               *pzone_cfg)
01841 {
01842 
01843 
01844     VL53L1_Error  status = VL53L1_ERROR_NONE;
01845 
01846     LOG_FUNCTION_START("");
01847 
01848 
01849 
01850     status =
01851         VL53L1_preset_mode_histogram_ranging(
01852             phistpostprocess,
01853             pstatic,
01854             phistogram,
01855             pgeneral,
01856             ptiming,
01857             pdynamic,
01858             psystem,
01859             ptuning_parms,
01860             pzone_cfg);
01861 
01862 
01863 
01864     if (status == VL53L1_ERROR_NONE) {
01865 
01866 
01867 
01868         VL53L1_init_histogram_config_structure(
01869                   7, 8+0, 8+1, 8+2, 8+3, 8+4,
01870                 8+0, 8+1, 8+2, 8+3, 8+4, 8+5,
01871                 phistogram);
01872 
01873 
01874         VL53L1_init_histogram_multizone_config_structure(
01875                   7, 8+0, 8+1, 8+2, 8+3, 8+4,
01876                 8+0, 8+1, 8+2, 8+3, 8+4, 8+5,
01877                 &(pzone_cfg->multizone_hist_cfg));
01878 
01879 
01880 
01881         VL53L1_copy_hist_cfg_to_static_cfg(
01882                 phistogram,
01883                 pstatic,
01884                 pgeneral,
01885                 ptiming,
01886                 pdynamic);
01887 
01888 
01889 
01890         pgeneral->dss_config__roi_mode_control =
01891             VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
01892 
01893 
01894 
01895         pdynamic->system__sequence_config =
01896                 VL53L1_SEQUENCE_VHV_EN |
01897                 VL53L1_SEQUENCE_PHASECAL_EN |
01898                 VL53L1_SEQUENCE_DSS1_EN |
01899                 VL53L1_SEQUENCE_DSS2_EN |
01900                 VL53L1_SEQUENCE_MM1_EN |
01901                 VL53L1_SEQUENCE_RANGE_EN;
01902 
01903     }
01904 
01905     LOG_FUNCTION_END(status);
01906 
01907     return status;
01908 }
01909 
01910 
01911 VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm2_cal(
01912     VL53L1_hist_post_process_config_t  *phistpostprocess,
01913     VL53L1_static_config_t             *pstatic,
01914     VL53L1_histogram_config_t          *phistogram,
01915     VL53L1_general_config_t            *pgeneral,
01916     VL53L1_timing_config_t             *ptiming,
01917     VL53L1_dynamic_config_t            *pdynamic,
01918     VL53L1_system_control_t            *psystem,
01919     VL53L1_tuning_parm_storage_t       *ptuning_parms,
01920     VL53L1_zone_config_t               *pzone_cfg)
01921 {
01922 
01923 
01924     VL53L1_Error  status = VL53L1_ERROR_NONE;
01925 
01926     LOG_FUNCTION_START("");
01927 
01928 
01929 
01930     status =
01931         VL53L1_preset_mode_histogram_ranging_mm1_cal(
01932                 phistpostprocess,
01933                 pstatic,
01934                 phistogram,
01935                 pgeneral,
01936                 ptiming,
01937                 pdynamic,
01938                 psystem,
01939                 ptuning_parms,
01940                 pzone_cfg);
01941 
01942     if (status == VL53L1_ERROR_NONE) {
01943 
01944 
01945 
01946         pdynamic->system__sequence_config =
01947                 VL53L1_SEQUENCE_VHV_EN |
01948                 VL53L1_SEQUENCE_PHASECAL_EN |
01949                 VL53L1_SEQUENCE_DSS1_EN |
01950                 VL53L1_SEQUENCE_DSS2_EN |
01951                 VL53L1_SEQUENCE_MM2_EN |
01952                 VL53L1_SEQUENCE_RANGE_EN;
01953 
01954     }
01955 
01956     LOG_FUNCTION_END(status);
01957 
01958     return status;
01959 }
01960 
01961 
01962 VL53L1_Error VL53L1_preset_mode_histogram_ranging_short_timing(
01963     VL53L1_hist_post_process_config_t  *phistpostprocess,
01964     VL53L1_static_config_t             *pstatic,
01965     VL53L1_histogram_config_t          *phistogram,
01966     VL53L1_general_config_t            *pgeneral,
01967     VL53L1_timing_config_t             *ptiming,
01968     VL53L1_dynamic_config_t            *pdynamic,
01969     VL53L1_system_control_t            *psystem,
01970     VL53L1_tuning_parm_storage_t       *ptuning_parms,
01971     VL53L1_zone_config_t               *pzone_cfg)
01972 {
01973 
01974 
01975     VL53L1_Error  status = VL53L1_ERROR_NONE;
01976 
01977     LOG_FUNCTION_START("");
01978 
01979 
01980 
01981     status =
01982         VL53L1_preset_mode_histogram_ranging(
01983             phistpostprocess,
01984             pstatic,
01985             phistogram,
01986             pgeneral,
01987             ptiming,
01988             pdynamic,
01989             psystem,
01990             ptuning_parms,
01991             pzone_cfg);
01992 
01993 
01994 
01995     if (status == VL53L1_ERROR_NONE) {
01996 
01997 
01998 
01999         pstatic->dss_config__target_total_rate_mcps = 0x1400;
02000 
02001 
02002 
02003         VL53L1_init_histogram_config_structure(
02004                 7, 0, 1, 2, 3, 4,
02005                 7, 0, 1, 2, 3, 4,
02006                 phistogram);
02007 
02008 
02009         VL53L1_init_histogram_multizone_config_structure(
02010                 7, 0, 1, 2, 3, 4,
02011                 7, 0, 1, 2, 3, 4,
02012                 &(pzone_cfg->multizone_hist_cfg));
02013 
02014 
02015 
02016         VL53L1_copy_hist_cfg_to_static_cfg(
02017                 phistogram,
02018                 pstatic,
02019                 pgeneral,
02020                 ptiming,
02021                 pdynamic);
02022 
02023 
02024 
02025         ptiming->range_config__vcsel_period_a = 0x04;
02026         ptiming->range_config__vcsel_period_b = 0x03;
02027         ptiming->mm_config__timeout_macrop_a_hi = 0x00;
02028         ptiming->mm_config__timeout_macrop_a_lo = 0x42;
02029         ptiming->mm_config__timeout_macrop_b_hi = 0x00;
02030         ptiming->mm_config__timeout_macrop_b_lo = 0x42;
02031         ptiming->range_config__timeout_macrop_a_hi = 0x00;
02032         ptiming->range_config__timeout_macrop_a_lo = 0x52;
02033         ptiming->range_config__timeout_macrop_b_hi = 0x00;
02034         ptiming->range_config__timeout_macrop_b_lo = 0x66;
02035 
02036         pgeneral->cal_config__vcsel_start = 0x04;
02037 
02038 
02039 
02040         pgeneral->phasecal_config__timeout_macrop = 0xa4;
02041 
02042 
02043 
02044         pdynamic->system__sequence_config =
02045                 VL53L1_SEQUENCE_VHV_EN |
02046                 VL53L1_SEQUENCE_PHASECAL_EN |
02047                 VL53L1_SEQUENCE_DSS1_EN |
02048                 VL53L1_SEQUENCE_DSS2_EN |
02049 
02050 
02051                 VL53L1_SEQUENCE_RANGE_EN;
02052 
02053 
02054 
02055 
02056         psystem->system__mode_start =
02057                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
02058                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
02059                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
02060     }
02061 
02062     LOG_FUNCTION_END(status);
02063 
02064     return status;
02065 }
02066 
02067 
02068 VL53L1_Error VL53L1_preset_mode_histogram_long_range(
02069     VL53L1_hist_post_process_config_t  *phistpostprocess,
02070     VL53L1_static_config_t             *pstatic,
02071     VL53L1_histogram_config_t          *phistogram,
02072     VL53L1_general_config_t            *pgeneral,
02073     VL53L1_timing_config_t             *ptiming,
02074     VL53L1_dynamic_config_t            *pdynamic,
02075     VL53L1_system_control_t            *psystem,
02076     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02077     VL53L1_zone_config_t               *pzone_cfg)
02078 {
02079 
02080 
02081     VL53L1_Error  status = VL53L1_ERROR_NONE;
02082 
02083     LOG_FUNCTION_START("");
02084 
02085 
02086 
02087     status =
02088         VL53L1_preset_mode_histogram_ranging(
02089             phistpostprocess,
02090             pstatic,
02091             phistogram,
02092             pgeneral,
02093             ptiming,
02094             pdynamic,
02095             psystem,
02096             ptuning_parms,
02097             pzone_cfg);
02098 
02099 
02100 
02101     if (status == VL53L1_ERROR_NONE) {
02102 
02103 
02104 
02105 
02106 
02107         VL53L1_init_histogram_config_structure(
02108             7, 0, 1, 2, 3, 4,
02109             0, 1, 2, 3, 4, 5,
02110             phistogram);
02111 
02112 
02113         VL53L1_init_histogram_multizone_config_structure(
02114             7, 0, 1, 2, 3, 4,
02115             0, 1, 2, 3, 4, 5,
02116             &(pzone_cfg->multizone_hist_cfg));
02117 
02118 
02119 
02120         VL53L1_copy_hist_cfg_to_static_cfg(
02121             phistogram,
02122             pstatic,
02123             pgeneral,
02124             ptiming,
02125             pdynamic);
02126 
02127 
02128 
02129         ptiming->range_config__vcsel_period_a = 0x09;
02130         ptiming->range_config__vcsel_period_b = 0x0b;
02131 
02132 
02133 
02134         ptiming->mm_config__timeout_macrop_a_hi = 0x00;
02135         ptiming->mm_config__timeout_macrop_a_lo = 0x21;
02136         ptiming->mm_config__timeout_macrop_b_hi = 0x00;
02137         ptiming->mm_config__timeout_macrop_b_lo = 0x1b;
02138 
02139 
02140 
02141         ptiming->range_config__timeout_macrop_a_hi = 0x00;
02142         ptiming->range_config__timeout_macrop_a_lo = 0x29;
02143         ptiming->range_config__timeout_macrop_b_hi = 0x00;
02144         ptiming->range_config__timeout_macrop_b_lo = 0x22;
02145 
02146 
02147 
02148         pgeneral->cal_config__vcsel_start = 0x09;
02149 
02150 
02151 
02152         pgeneral->phasecal_config__timeout_macrop = 0xF5;
02153 
02154 
02155 
02156         pdynamic->sd_config__woi_sd0 = 0x09;
02157         pdynamic->sd_config__woi_sd1 = 0x0B;
02158         pdynamic->sd_config__initial_phase_sd0            =
02159                 ptuning_parms->tp_init_phase_rtn_hist_long;
02160         pdynamic->sd_config__initial_phase_sd1            =
02161                 ptuning_parms->tp_init_phase_ref_hist_long;
02162 
02163 
02164 
02165         phistpostprocess->valid_phase_low = 0x08;
02166         phistpostprocess->valid_phase_high = 0x88;
02167 
02168         pdynamic->system__sequence_config =
02169                 VL53L1_SEQUENCE_VHV_EN |
02170                 VL53L1_SEQUENCE_PHASECAL_EN |
02171                 VL53L1_SEQUENCE_DSS1_EN |
02172                 VL53L1_SEQUENCE_DSS2_EN |
02173                 VL53L1_SEQUENCE_RANGE_EN;
02174 
02175 
02176 
02177 
02178         psystem->system__mode_start =
02179                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
02180                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
02181                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
02182     }
02183 
02184     LOG_FUNCTION_END(status);
02185 
02186     return status;
02187 }
02188 
02189 
02190 VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm1(
02191     VL53L1_hist_post_process_config_t  *phistpostprocess,
02192     VL53L1_static_config_t             *pstatic,
02193     VL53L1_histogram_config_t          *phistogram,
02194     VL53L1_general_config_t            *pgeneral,
02195     VL53L1_timing_config_t             *ptiming,
02196     VL53L1_dynamic_config_t            *pdynamic,
02197     VL53L1_system_control_t            *psystem,
02198     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02199     VL53L1_zone_config_t               *pzone_cfg)
02200 {
02201 
02202 
02203     VL53L1_Error  status = VL53L1_ERROR_NONE;
02204 
02205     LOG_FUNCTION_START("");
02206 
02207 
02208 
02209     status =
02210         VL53L1_preset_mode_histogram_long_range(
02211             phistpostprocess,
02212             pstatic,
02213             phistogram,
02214             pgeneral,
02215             ptiming,
02216             pdynamic,
02217             psystem,
02218             ptuning_parms,
02219             pzone_cfg);
02220 
02221 
02222 
02223     if (status == VL53L1_ERROR_NONE) {
02224 
02225 
02226 
02227 
02228 
02229         VL53L1_init_histogram_config_structure(
02230                   7,   0,   1, 2, 3, 4,
02231                 8+0, 8+1, 8+2, 3, 4, 5,
02232                 phistogram);
02233 
02234 
02235         VL53L1_init_histogram_multizone_config_structure(
02236                   7,   0,   1, 2, 3, 4,
02237                 8+0, 8+1, 8+2, 3, 4, 5,
02238                 &(pzone_cfg->multizone_hist_cfg));
02239 
02240 
02241 
02242         VL53L1_copy_hist_cfg_to_static_cfg(
02243                 phistogram,
02244                 pstatic,
02245                 pgeneral,
02246                 ptiming,
02247                 pdynamic);
02248 
02249 
02250 
02251         pdynamic->system__sequence_config =
02252                 VL53L1_SEQUENCE_VHV_EN |
02253                 VL53L1_SEQUENCE_PHASECAL_EN |
02254                 VL53L1_SEQUENCE_DSS1_EN |
02255                 VL53L1_SEQUENCE_DSS2_EN |
02256                 VL53L1_SEQUENCE_MM1_EN |
02257                 VL53L1_SEQUENCE_RANGE_EN;
02258     }
02259 
02260     LOG_FUNCTION_END(status);
02261 
02262     return status;
02263 }
02264 
02265 
02266 VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm2(
02267     VL53L1_hist_post_process_config_t  *phistpostprocess,
02268     VL53L1_static_config_t             *pstatic,
02269     VL53L1_histogram_config_t          *phistogram,
02270     VL53L1_general_config_t            *pgeneral,
02271     VL53L1_timing_config_t             *ptiming,
02272     VL53L1_dynamic_config_t            *pdynamic,
02273     VL53L1_system_control_t            *psystem,
02274     VL53L1_tuning_parm_storage_t      *ptuning_parms,
02275     VL53L1_zone_config_t               *pzone_cfg)
02276 {
02277 
02278 
02279     VL53L1_Error  status = VL53L1_ERROR_NONE;
02280 
02281     LOG_FUNCTION_START("");
02282 
02283 
02284 
02285     status =
02286         VL53L1_preset_mode_histogram_long_range_mm1(
02287             phistpostprocess,
02288             pstatic,
02289             phistogram,
02290             pgeneral,
02291             ptiming,
02292             pdynamic,
02293             psystem,
02294             ptuning_parms,
02295             pzone_cfg);
02296 
02297 
02298 
02299     if (status == VL53L1_ERROR_NONE) {
02300 
02301 
02302 
02303         pdynamic->system__sequence_config =
02304                 VL53L1_SEQUENCE_VHV_EN |
02305                 VL53L1_SEQUENCE_PHASECAL_EN |
02306                 VL53L1_SEQUENCE_DSS1_EN |
02307                 VL53L1_SEQUENCE_DSS2_EN |
02308                 VL53L1_SEQUENCE_MM2_EN |
02309                 VL53L1_SEQUENCE_RANGE_EN;
02310     }
02311 
02312     LOG_FUNCTION_END(status);
02313 
02314     return status;
02315 }
02316 
02317 
02318 
02319 VL53L1_Error VL53L1_preset_mode_histogram_medium_range(
02320     VL53L1_hist_post_process_config_t  *phistpostprocess,
02321     VL53L1_static_config_t             *pstatic,
02322     VL53L1_histogram_config_t          *phistogram,
02323     VL53L1_general_config_t            *pgeneral,
02324     VL53L1_timing_config_t             *ptiming,
02325     VL53L1_dynamic_config_t            *pdynamic,
02326     VL53L1_system_control_t            *psystem,
02327     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02328     VL53L1_zone_config_t               *pzone_cfg)
02329 {
02330 
02331 
02332     VL53L1_Error  status = VL53L1_ERROR_NONE;
02333 
02334     LOG_FUNCTION_START("");
02335 
02336 
02337 
02338     status =
02339         VL53L1_preset_mode_histogram_ranging(
02340             phistpostprocess,
02341             pstatic,
02342             phistogram,
02343             pgeneral,
02344             ptiming,
02345             pdynamic,
02346             psystem,
02347             ptuning_parms,
02348             pzone_cfg);
02349 
02350 
02351 
02352     if (status == VL53L1_ERROR_NONE) {
02353 
02354 
02355 
02356 
02357 
02358         VL53L1_init_histogram_config_structure(
02359                 7, 0, 1, 1, 2, 2,
02360                 0, 1, 2, 1, 2, 3,
02361                 phistogram);
02362 
02363 
02364         VL53L1_init_histogram_multizone_config_structure(
02365                 7, 0, 1, 1, 2, 2,
02366                 0, 1, 2, 1, 2, 3,
02367                 &(pzone_cfg->multizone_hist_cfg));
02368 
02369 
02370 
02371         VL53L1_copy_hist_cfg_to_static_cfg(
02372                 phistogram,
02373                 pstatic,
02374                 pgeneral,
02375                 ptiming,
02376                 pdynamic);
02377 
02378 
02379 
02380         ptiming->range_config__vcsel_period_a = 0x05;
02381         ptiming->range_config__vcsel_period_b = 0x07;
02382 
02383 
02384 
02385         ptiming->mm_config__timeout_macrop_a_hi = 0x00;
02386         ptiming->mm_config__timeout_macrop_a_lo = 0x36;
02387         ptiming->mm_config__timeout_macrop_b_hi = 0x00;
02388         ptiming->mm_config__timeout_macrop_b_lo = 0x28;
02389 
02390 
02391 
02392         ptiming->range_config__timeout_macrop_a_hi = 0x00;
02393         ptiming->range_config__timeout_macrop_a_lo = 0x44;
02394         ptiming->range_config__timeout_macrop_b_hi = 0x00;
02395         ptiming->range_config__timeout_macrop_b_lo = 0x33;
02396 
02397 
02398 
02399         pgeneral->cal_config__vcsel_start = 0x05;
02400 
02401 
02402 
02403         pgeneral->phasecal_config__timeout_macrop = 0xF5;
02404 
02405 
02406 
02407         pdynamic->sd_config__woi_sd0 = 0x05;
02408         pdynamic->sd_config__woi_sd1 = 0x07;
02409         pdynamic->sd_config__initial_phase_sd0            =
02410             ptuning_parms->tp_init_phase_rtn_hist_med;
02411         pdynamic->sd_config__initial_phase_sd1            =
02412             ptuning_parms->tp_init_phase_ref_hist_med;
02413 
02414 
02415 
02416         phistpostprocess->valid_phase_low = 0x08;
02417         phistpostprocess->valid_phase_high = 0x48;
02418 
02419         pdynamic->system__sequence_config =
02420                 VL53L1_SEQUENCE_VHV_EN |
02421                 VL53L1_SEQUENCE_PHASECAL_EN |
02422                 VL53L1_SEQUENCE_DSS1_EN |
02423                 VL53L1_SEQUENCE_DSS2_EN |
02424                 VL53L1_SEQUENCE_RANGE_EN;
02425 
02426 
02427 
02428 
02429         psystem->system__mode_start =
02430                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
02431                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
02432                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
02433     }
02434 
02435     LOG_FUNCTION_END(status);
02436 
02437     return status;
02438 }
02439 
02440 
02441 VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm1(
02442     VL53L1_hist_post_process_config_t  *phistpostprocess,
02443     VL53L1_static_config_t             *pstatic,
02444     VL53L1_histogram_config_t          *phistogram,
02445     VL53L1_general_config_t            *pgeneral,
02446     VL53L1_timing_config_t             *ptiming,
02447     VL53L1_dynamic_config_t            *pdynamic,
02448     VL53L1_system_control_t            *psystem,
02449     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02450     VL53L1_zone_config_t               *pzone_cfg)
02451 {
02452 
02453 
02454     VL53L1_Error  status = VL53L1_ERROR_NONE;
02455 
02456     LOG_FUNCTION_START("");
02457 
02458 
02459 
02460     status =
02461         VL53L1_preset_mode_histogram_medium_range(
02462             phistpostprocess,
02463             pstatic,
02464             phistogram,
02465             pgeneral,
02466             ptiming,
02467             pdynamic,
02468             psystem,
02469             ptuning_parms,
02470             pzone_cfg);
02471 
02472 
02473 
02474     if (status == VL53L1_ERROR_NONE) {
02475 
02476 
02477 
02478         VL53L1_init_histogram_config_structure(
02479                   7,   0,   1, 1, 2, 2,
02480                 8+0, 8+1, 8+2, 1, 2, 3,
02481                 phistogram);
02482 
02483 
02484         VL53L1_init_histogram_multizone_config_structure(
02485                   7,   0,   1, 1, 2, 2,
02486                 8+0, 8+1, 8+2, 1, 2, 3,
02487                 &(pzone_cfg->multizone_hist_cfg));
02488 
02489 
02490 
02491         VL53L1_copy_hist_cfg_to_static_cfg(
02492                 phistogram,
02493                 pstatic,
02494                 pgeneral,
02495                 ptiming,
02496                 pdynamic);
02497 
02498 
02499 
02500         pdynamic->system__sequence_config =
02501                 VL53L1_SEQUENCE_VHV_EN |
02502                 VL53L1_SEQUENCE_PHASECAL_EN |
02503                 VL53L1_SEQUENCE_DSS1_EN |
02504                 VL53L1_SEQUENCE_DSS2_EN |
02505                 VL53L1_SEQUENCE_MM1_EN  |
02506                 VL53L1_SEQUENCE_RANGE_EN;
02507     }
02508 
02509     LOG_FUNCTION_END(status);
02510 
02511     return status;
02512 }
02513 
02514 
02515 VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm2(
02516     VL53L1_hist_post_process_config_t  *phistpostprocess,
02517     VL53L1_static_config_t             *pstatic,
02518     VL53L1_histogram_config_t          *phistogram,
02519     VL53L1_general_config_t            *pgeneral,
02520     VL53L1_timing_config_t             *ptiming,
02521     VL53L1_dynamic_config_t            *pdynamic,
02522     VL53L1_system_control_t            *psystem,
02523     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02524     VL53L1_zone_config_t               *pzone_cfg)
02525 {
02526 
02527 
02528     VL53L1_Error  status = VL53L1_ERROR_NONE;
02529 
02530     LOG_FUNCTION_START("");
02531 
02532 
02533 
02534     status =
02535         VL53L1_preset_mode_histogram_medium_range_mm1(
02536             phistpostprocess,
02537             pstatic,
02538             phistogram,
02539             pgeneral,
02540             ptiming,
02541             pdynamic,
02542             psystem,
02543             ptuning_parms,
02544             pzone_cfg);
02545 
02546 
02547 
02548     if (status == VL53L1_ERROR_NONE) {
02549 
02550 
02551 
02552         pdynamic->system__sequence_config =
02553                 VL53L1_SEQUENCE_VHV_EN |
02554                 VL53L1_SEQUENCE_PHASECAL_EN |
02555                 VL53L1_SEQUENCE_DSS1_EN |
02556                 VL53L1_SEQUENCE_DSS2_EN |
02557                 VL53L1_SEQUENCE_MM2_EN |
02558                 VL53L1_SEQUENCE_RANGE_EN;
02559     }
02560 
02561     LOG_FUNCTION_END(status);
02562 
02563     return status;
02564 }
02565 
02566 
02567 VL53L1_Error VL53L1_preset_mode_histogram_short_range(
02568     VL53L1_hist_post_process_config_t  *phistpostprocess,
02569     VL53L1_static_config_t             *pstatic,
02570     VL53L1_histogram_config_t          *phistogram,
02571     VL53L1_general_config_t            *pgeneral,
02572     VL53L1_timing_config_t             *ptiming,
02573     VL53L1_dynamic_config_t            *pdynamic,
02574     VL53L1_system_control_t            *psystem,
02575     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02576     VL53L1_zone_config_t               *pzone_cfg)
02577 {
02578 
02579 
02580     VL53L1_Error  status = VL53L1_ERROR_NONE;
02581 
02582     LOG_FUNCTION_START("");
02583 
02584 
02585 
02586     status =
02587         VL53L1_preset_mode_histogram_ranging(
02588             phistpostprocess,
02589             pstatic,
02590             phistogram,
02591             pgeneral,
02592             ptiming,
02593             pdynamic,
02594             psystem,
02595             ptuning_parms,
02596             pzone_cfg);
02597 
02598 
02599 
02600     if (status == VL53L1_ERROR_NONE) {
02601 
02602 
02603 
02604 
02605 
02606         VL53L1_init_histogram_config_structure(
02607                 7, 7, 0, 1, 1, 1,
02608                 0, 1, 1, 1, 2, 2,
02609                 phistogram);
02610 
02611 
02612         VL53L1_init_histogram_multizone_config_structure(
02613                 7, 7, 0, 1, 1, 1,
02614                 0, 1, 1, 1, 2, 2,
02615                 &(pzone_cfg->multizone_hist_cfg));
02616 
02617 
02618 
02619         VL53L1_copy_hist_cfg_to_static_cfg(
02620                 phistogram,
02621                 pstatic,
02622                 pgeneral,
02623                 ptiming,
02624                 pdynamic);
02625 
02626 
02627 
02628         ptiming->range_config__vcsel_period_a = 0x03;
02629         ptiming->range_config__vcsel_period_b = 0x05;
02630 
02631 
02632 
02633         ptiming->mm_config__timeout_macrop_a_hi = 0x00;
02634         ptiming->mm_config__timeout_macrop_a_lo = 0x52;
02635         ptiming->mm_config__timeout_macrop_b_hi = 0x00;
02636         ptiming->mm_config__timeout_macrop_b_lo = 0x37;
02637 
02638 
02639 
02640         ptiming->range_config__timeout_macrop_a_hi = 0x00;
02641         ptiming->range_config__timeout_macrop_a_lo = 0x66;
02642         ptiming->range_config__timeout_macrop_b_hi = 0x00;
02643         ptiming->range_config__timeout_macrop_b_lo = 0x44;
02644 
02645 
02646 
02647         pgeneral->cal_config__vcsel_start = 0x03;
02648 
02649 
02650 
02651         pgeneral->phasecal_config__timeout_macrop = 0xF5;
02652 
02653 
02654 
02655         pdynamic->sd_config__woi_sd0 = 0x03;
02656         pdynamic->sd_config__woi_sd1 = 0x05;
02657         pdynamic->sd_config__initial_phase_sd0            =
02658             ptuning_parms->tp_init_phase_rtn_hist_short;
02659         pdynamic->sd_config__initial_phase_sd1            =
02660             ptuning_parms->tp_init_phase_ref_hist_short;
02661 
02662 
02663         phistpostprocess->valid_phase_low = 0x08;
02664         phistpostprocess->valid_phase_high = 0x28;
02665 
02666         pdynamic->system__sequence_config =
02667                 VL53L1_SEQUENCE_VHV_EN |
02668                 VL53L1_SEQUENCE_PHASECAL_EN |
02669                 VL53L1_SEQUENCE_DSS1_EN |
02670                 VL53L1_SEQUENCE_DSS2_EN |
02671                 VL53L1_SEQUENCE_MM1_EN  |
02672 
02673                 VL53L1_SEQUENCE_RANGE_EN;
02674 
02675 
02676 
02677 
02678         psystem->system__mode_start =
02679                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
02680                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
02681                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
02682     }
02683 
02684     LOG_FUNCTION_END(status);
02685 
02686     return status;
02687 }
02688 
02689 
02690 
02691 VL53L1_Error VL53L1_preset_mode_special_histogram_short_range(
02692     VL53L1_hist_post_process_config_t  *phistpostprocess,
02693     VL53L1_static_config_t             *pstatic,
02694     VL53L1_histogram_config_t          *phistogram,
02695     VL53L1_general_config_t            *pgeneral,
02696     VL53L1_timing_config_t             *ptiming,
02697     VL53L1_dynamic_config_t            *pdynamic,
02698     VL53L1_system_control_t            *psystem,
02699     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02700     VL53L1_zone_config_t               *pzone_cfg)
02701 {
02702 
02703 
02704     VL53L1_Error  status = VL53L1_ERROR_NONE;
02705 
02706     LOG_FUNCTION_START("");
02707 
02708 
02709 
02710     status =
02711         VL53L1_preset_mode_histogram_short_range(
02712             phistpostprocess,
02713             pstatic,
02714             phistogram,
02715             pgeneral,
02716             ptiming,
02717             pdynamic,
02718             psystem,
02719             ptuning_parms,
02720             pzone_cfg);
02721 
02722 
02723 
02724     if (status == VL53L1_ERROR_NONE) {
02725 
02726 
02727 
02728 
02729 
02730         VL53L1_init_histogram_config_structure(
02731                 7, 7, 0, 0, 1, 1,
02732                 0, 0, 0, 1, 1, 1,
02733                 phistogram);
02734 
02735 
02736         VL53L1_init_histogram_multizone_config_structure(
02737                 7, 7, 0, 0, 1, 1,
02738                 0, 0, 0, 1, 1, 1,
02739                 &(pzone_cfg->multizone_hist_cfg));
02740 
02741 
02742 
02743         VL53L1_copy_hist_cfg_to_static_cfg(
02744                 phistogram,
02745                 pstatic,
02746                 pgeneral,
02747                 ptiming,
02748                 pdynamic);
02749 
02750 
02751 
02752         ptiming->range_config__vcsel_period_a = 0x02;
02753         ptiming->range_config__vcsel_period_b = 0x03;
02754 
02755 
02756 
02757         pgeneral->cal_config__vcsel_start = 0x00;
02758 
02759 
02760 
02761         pgeneral->phasecal_config__target = 0x31;
02762 
02763 
02764 
02765         pdynamic->sd_config__woi_sd0 = 0x02;
02766         pdynamic->sd_config__woi_sd1 = 0x03;
02767         pdynamic->sd_config__initial_phase_sd0            =
02768             ptuning_parms->tp_init_phase_rtn_hist_short;
02769         pdynamic->sd_config__initial_phase_sd1            =
02770             ptuning_parms->tp_init_phase_ref_hist_short;
02771 
02772 
02773 
02774         phistpostprocess->valid_phase_low = 0x10;
02775         phistpostprocess->valid_phase_high = 0x18;
02776 
02777     }
02778 
02779     LOG_FUNCTION_END(status);
02780 
02781     return status;
02782 }
02783 
02784 
02785 
02786 VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm1(
02787     VL53L1_hist_post_process_config_t  *phistpostprocess,
02788     VL53L1_static_config_t             *pstatic,
02789     VL53L1_histogram_config_t          *phistogram,
02790     VL53L1_general_config_t            *pgeneral,
02791     VL53L1_timing_config_t             *ptiming,
02792     VL53L1_dynamic_config_t            *pdynamic,
02793     VL53L1_system_control_t            *psystem,
02794     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02795     VL53L1_zone_config_t               *pzone_cfg)
02796 {
02797 
02798 
02799     VL53L1_Error  status = VL53L1_ERROR_NONE;
02800 
02801     LOG_FUNCTION_START("");
02802 
02803 
02804 
02805     status =
02806         VL53L1_preset_mode_histogram_short_range(
02807             phistpostprocess,
02808                 pstatic,
02809                 phistogram,
02810                 pgeneral,
02811                 ptiming,
02812                 pdynamic,
02813                 psystem,
02814                 ptuning_parms,
02815                 pzone_cfg);
02816 
02817 
02818 
02819     if (status == VL53L1_ERROR_NONE) {
02820 
02821 
02822 
02823 
02824 
02825         VL53L1_init_histogram_config_structure(
02826                   7,   7, 0, 1, 1, 1,
02827                 8+0, 8+1, 1, 1, 2, 2,
02828                 phistogram);
02829 
02830 
02831         VL53L1_init_histogram_multizone_config_structure(
02832                   7,   7, 0, 1, 1, 1,
02833                 8+0, 8+1, 1, 1, 2, 2,
02834                 &(pzone_cfg->multizone_hist_cfg));
02835 
02836 
02837 
02838         VL53L1_copy_hist_cfg_to_static_cfg(
02839                 phistogram,
02840                 pstatic,
02841                 pgeneral,
02842                 ptiming,
02843                 pdynamic);
02844 
02845 
02846 
02847         pdynamic->system__sequence_config =
02848                 VL53L1_SEQUENCE_VHV_EN |
02849                 VL53L1_SEQUENCE_PHASECAL_EN |
02850                 VL53L1_SEQUENCE_DSS1_EN |
02851                 VL53L1_SEQUENCE_DSS2_EN |
02852                 VL53L1_SEQUENCE_MM1_EN  |
02853                 VL53L1_SEQUENCE_RANGE_EN;
02854 
02855     }
02856 
02857     LOG_FUNCTION_END(status);
02858 
02859     return status;
02860 }
02861 
02862 
02863 VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm2(
02864     VL53L1_hist_post_process_config_t  *phistpostprocess,
02865     VL53L1_static_config_t             *pstatic,
02866     VL53L1_histogram_config_t          *phistogram,
02867     VL53L1_general_config_t            *pgeneral,
02868     VL53L1_timing_config_t             *ptiming,
02869     VL53L1_dynamic_config_t            *pdynamic,
02870     VL53L1_system_control_t            *psystem,
02871     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02872     VL53L1_zone_config_t               *pzone_cfg)
02873 {
02874 
02875 
02876     VL53L1_Error  status = VL53L1_ERROR_NONE;
02877 
02878     LOG_FUNCTION_START("");
02879 
02880 
02881 
02882     status =
02883         VL53L1_preset_mode_histogram_short_range_mm1(
02884             phistpostprocess,
02885             pstatic,
02886             phistogram,
02887             pgeneral,
02888             ptiming,
02889             pdynamic,
02890             psystem,
02891             ptuning_parms,
02892             pzone_cfg);
02893 
02894 
02895 
02896     if (status == VL53L1_ERROR_NONE) {
02897 
02898 
02899 
02900         pdynamic->system__sequence_config =
02901                 VL53L1_SEQUENCE_VHV_EN |
02902                 VL53L1_SEQUENCE_PHASECAL_EN |
02903                 VL53L1_SEQUENCE_DSS1_EN |
02904                 VL53L1_SEQUENCE_DSS2_EN |
02905                 VL53L1_SEQUENCE_MM2_EN |
02906                 VL53L1_SEQUENCE_RANGE_EN;
02907     }
02908 
02909     LOG_FUNCTION_END(status);
02910 
02911     return status;
02912 }
02913 
02914 
02915 
02916 VL53L1_Error VL53L1_preset_mode_histogram_characterisation(
02917     VL53L1_hist_post_process_config_t  *phistpostprocess,
02918     VL53L1_static_config_t             *pstatic,
02919     VL53L1_histogram_config_t          *phistogram,
02920     VL53L1_general_config_t            *pgeneral,
02921     VL53L1_timing_config_t             *ptiming,
02922     VL53L1_dynamic_config_t            *pdynamic,
02923     VL53L1_system_control_t            *psystem,
02924     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02925     VL53L1_zone_config_t               *pzone_cfg)
02926 {
02927 
02928 
02929     VL53L1_Error  status = VL53L1_ERROR_NONE;
02930 
02931     LOG_FUNCTION_START("");
02932 
02933 
02934 
02935     status =
02936         VL53L1_preset_mode_histogram_ranging(
02937             phistpostprocess,
02938             pstatic,
02939             phistogram,
02940             pgeneral,
02941             ptiming,
02942             pdynamic,
02943             psystem,
02944             ptuning_parms,
02945             pzone_cfg);
02946 
02947 
02948 
02949     if (status == VL53L1_ERROR_NONE) {
02950 
02951 
02952 
02953         pstatic->debug__ctrl = 0x01;
02954         psystem->power_management__go1_power_force = 0x01;
02955 
02956         pdynamic->system__sequence_config               =
02957                 VL53L1_SEQUENCE_VHV_EN |
02958                 VL53L1_SEQUENCE_PHASECAL_EN |
02959                 VL53L1_SEQUENCE_RANGE_EN;
02960 
02961         psystem->system__mode_start                     =
02962                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM    |
02963                 VL53L1_DEVICEREADOUTMODE_SPLIT_MANUAL   |
02964                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
02965     }
02966 
02967     LOG_FUNCTION_END(status);
02968 
02969     return status;
02970 }
02971 
02972 
02973 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_planar(
02974     VL53L1_hist_post_process_config_t  *phistpostprocess,
02975     VL53L1_static_config_t             *pstatic,
02976     VL53L1_histogram_config_t          *phistogram,
02977     VL53L1_general_config_t            *pgeneral,
02978     VL53L1_timing_config_t             *ptiming,
02979     VL53L1_dynamic_config_t            *pdynamic,
02980     VL53L1_system_control_t            *psystem,
02981     VL53L1_tuning_parm_storage_t       *ptuning_parms,
02982     VL53L1_zone_config_t               *pzone_cfg)
02983 {
02984 
02985 
02986     VL53L1_Error  status = VL53L1_ERROR_NONE;
02987 
02988     LOG_FUNCTION_START("");
02989 
02990 
02991 
02992     status =
02993         VL53L1_preset_mode_histogram_multizone_long_range(
02994             phistpostprocess,
02995             pstatic,
02996             phistogram,
02997             pgeneral,
02998             ptiming,
02999             pdynamic,
03000             psystem,
03001             ptuning_parms,
03002             pzone_cfg);
03003 
03004 
03005 
03006     if (status == VL53L1_ERROR_NONE) {
03007 
03008 
03009 
03010         status =
03011             VL53L1_zone_preset_xtalk_planar(
03012                 pgeneral,
03013                 pzone_cfg);
03014 
03015 
03016 
03017         ptiming->range_config__vcsel_period_a = 0x09;
03018         ptiming->range_config__vcsel_period_b = 0x09;
03019 
03020 
03021 
03022         VL53L1_init_histogram_config_structure(
03023             7, 0, 1, 2, 3, 4,
03024             7, 0, 1, 2, 3, 4,
03025             phistogram);
03026 
03027 
03028 
03029         VL53L1_init_histogram_multizone_config_structure(
03030             7, 0, 1, 2, 3, 4,
03031             7, 0, 1, 2, 3, 4,
03032             &(pzone_cfg->multizone_hist_cfg));
03033 
03034 
03035 
03036 
03037         if (status == VL53L1_ERROR_NONE) {
03038             status =
03039             VL53L1_set_histogram_multizone_initial_bin_config(
03040             pzone_cfg,
03041             phistogram,
03042             &(pzone_cfg->multizone_hist_cfg));
03043         }
03044 
03045 
03046 
03047         VL53L1_copy_hist_cfg_to_static_cfg(
03048             phistogram,
03049             pstatic,
03050             pgeneral,
03051             ptiming,
03052             pdynamic);
03053 
03054     }
03055 
03056     LOG_FUNCTION_END(status);
03057 
03058     return status;
03059 }
03060 
03061 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm1(
03062     VL53L1_hist_post_process_config_t  *phistpostprocess,
03063     VL53L1_static_config_t             *pstatic,
03064     VL53L1_histogram_config_t          *phistogram,
03065     VL53L1_general_config_t            *pgeneral,
03066     VL53L1_timing_config_t             *ptiming,
03067     VL53L1_dynamic_config_t            *pdynamic,
03068     VL53L1_system_control_t            *psystem,
03069     VL53L1_tuning_parm_storage_t       *ptuning_parms,
03070     VL53L1_zone_config_t               *pzone_cfg)
03071 {
03072 
03073 
03074     VL53L1_Error  status = VL53L1_ERROR_NONE;
03075 
03076     LOG_FUNCTION_START("");
03077 
03078 
03079 
03080     status =
03081         VL53L1_preset_mode_histogram_ranging(
03082             phistpostprocess,
03083             pstatic,
03084             phistogram,
03085             pgeneral,
03086             ptiming,
03087             pdynamic,
03088             psystem,
03089             ptuning_parms,
03090             pzone_cfg);
03091 
03092 
03093 
03094 
03095     if (status == VL53L1_ERROR_NONE) {
03096 
03097 
03098 
03099 
03100 
03101         VL53L1_init_histogram_config_structure(
03102                 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
03103                 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
03104                 phistogram);
03105 
03106 
03107         VL53L1_init_histogram_multizone_config_structure(
03108                 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
03109                 8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
03110                 &(pzone_cfg->multizone_hist_cfg));
03111 
03112 
03113 
03114         VL53L1_copy_hist_cfg_to_static_cfg(
03115                 phistogram,
03116                 pstatic,
03117                 pgeneral,
03118                 ptiming,
03119                 pdynamic);
03120 
03121 
03122 
03123         ptiming->range_config__vcsel_period_a = 0x09;
03124         ptiming->range_config__vcsel_period_b = 0x09;
03125 
03126 
03127 
03128         ptiming->mm_config__timeout_macrop_a_hi = 0x00;
03129         ptiming->mm_config__timeout_macrop_a_lo = 0x21;
03130         ptiming->mm_config__timeout_macrop_b_hi = 0x00;
03131         ptiming->mm_config__timeout_macrop_b_lo = 0x21;
03132 
03133 
03134 
03135         ptiming->range_config__timeout_macrop_a_hi = 0x00;
03136         ptiming->range_config__timeout_macrop_a_lo = 0x29;
03137         ptiming->range_config__timeout_macrop_b_hi = 0x00;
03138         ptiming->range_config__timeout_macrop_b_lo = 0x29;
03139 
03140 
03141 
03142         pgeneral->cal_config__vcsel_start = 0x09;
03143 
03144 
03145 
03146         pgeneral->phasecal_config__timeout_macrop = 0xF5;
03147 
03148 
03149 
03150         pdynamic->sd_config__woi_sd0 = 0x09;
03151         pdynamic->sd_config__woi_sd1 = 0x09;
03152         pdynamic->sd_config__initial_phase_sd0 = 0x09;
03153         pdynamic->sd_config__initial_phase_sd1 = 0x06;
03154 
03155         pdynamic->system__sequence_config =
03156                 VL53L1_SEQUENCE_VHV_EN |
03157                 VL53L1_SEQUENCE_PHASECAL_EN |
03158                 VL53L1_SEQUENCE_DSS1_EN |
03159                 VL53L1_SEQUENCE_DSS2_EN |
03160                 VL53L1_SEQUENCE_MM1_EN |
03161                 VL53L1_SEQUENCE_RANGE_EN;
03162 
03163 
03164 
03165 
03166         psystem->system__mode_start =
03167                 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM |
03168                 VL53L1_DEVICEREADOUTMODE_DUAL_SD |
03169                 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
03170     }
03171 
03172     LOG_FUNCTION_END(status);
03173 
03174     return status;
03175 }
03176 
03177 
03178 VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm2(
03179     VL53L1_hist_post_process_config_t  *phistpostprocess,
03180     VL53L1_static_config_t             *pstatic,
03181     VL53L1_histogram_config_t          *phistogram,
03182     VL53L1_general_config_t            *pgeneral,
03183     VL53L1_timing_config_t             *ptiming,
03184     VL53L1_dynamic_config_t            *pdynamic,
03185     VL53L1_system_control_t            *psystem,
03186     VL53L1_tuning_parm_storage_t       *ptuning_parms,
03187     VL53L1_zone_config_t               *pzone_cfg)
03188 {
03189 
03190 
03191     VL53L1_Error  status = VL53L1_ERROR_NONE;
03192 
03193     LOG_FUNCTION_START("");
03194 
03195 
03196 
03197     status =
03198         VL53L1_preset_mode_histogram_xtalk_mm1(
03199             phistpostprocess,
03200             pstatic,
03201             phistogram,
03202             pgeneral,
03203             ptiming,
03204             pdynamic,
03205             psystem,
03206             ptuning_parms,
03207             pzone_cfg);
03208 
03209 
03210         pdynamic->system__sequence_config =
03211                 VL53L1_SEQUENCE_VHV_EN |
03212                 VL53L1_SEQUENCE_PHASECAL_EN |
03213                 VL53L1_SEQUENCE_DSS1_EN |
03214                 VL53L1_SEQUENCE_DSS2_EN |
03215                 VL53L1_SEQUENCE_MM2_EN |
03216                 VL53L1_SEQUENCE_RANGE_EN;
03217 
03218 
03219 
03220     LOG_FUNCTION_END(status);
03221 
03222     return status;
03223 }
03224 
03225 
03226 
03227 
03228 VL53L1_Error VL53L1_preset_mode_histogram_multizone(
03229     VL53L1_hist_post_process_config_t  *phistpostprocess,
03230     VL53L1_static_config_t             *pstatic,
03231     VL53L1_histogram_config_t          *phistogram,
03232     VL53L1_general_config_t            *pgeneral,
03233     VL53L1_timing_config_t             *ptiming,
03234     VL53L1_dynamic_config_t            *pdynamic,
03235     VL53L1_system_control_t            *psystem,
03236     VL53L1_tuning_parm_storage_t       *ptuning_parms,
03237     VL53L1_zone_config_t               *pzone_cfg)
03238 {
03239 
03240 
03241     VL53L1_Error  status = VL53L1_ERROR_NONE;
03242 
03243     LOG_FUNCTION_START("");
03244 
03245 
03246 
03247     status =
03248         VL53L1_preset_mode_histogram_medium_range(
03249             phistpostprocess,
03250             pstatic,
03251             phistogram,
03252             pgeneral,
03253             ptiming,
03254             pdynamic,
03255             psystem,
03256             ptuning_parms,
03257             pzone_cfg);
03258 
03259 
03260 
03261     if (status == VL53L1_ERROR_NONE) {
03262 
03263 
03264 
03265         status =
03266             VL53L1_init_zone_config_structure(
03267                 4, 8, 2,
03268                 4, 8, 2,
03269                 7, 7,
03270                 pzone_cfg);
03271 
03272         pgeneral->global_config__stream_divider =
03273             pzone_cfg->active_zones + 1;
03274 
03275 
03276 
03277         if (status == VL53L1_ERROR_NONE) {
03278             status =
03279             VL53L1_set_histogram_multizone_initial_bin_config(
03280                 pzone_cfg,
03281                 phistogram,
03282                 &(pzone_cfg->multizone_hist_cfg));
03283         }
03284 
03285         VL53L1_copy_hist_cfg_to_static_cfg(
03286                 phistogram,
03287                 pstatic,
03288                 pgeneral,
03289                 ptiming,
03290                 pdynamic);
03291     }
03292 
03293     LOG_FUNCTION_END(status);
03294 
03295     return status;
03296 }
03297 
03298 VL53L1_Error VL53L1_preset_mode_histogram_multizone_short_range(
03299     VL53L1_hist_post_process_config_t  *phistpostprocess,
03300     VL53L1_static_config_t             *pstatic,
03301     VL53L1_histogram_config_t          *phistogram,
03302     VL53L1_general_config_t            *pgeneral,
03303     VL53L1_timing_config_t             *ptiming,
03304     VL53L1_dynamic_config_t            *pdynamic,
03305     VL53L1_system_control_t            *psystem,
03306     VL53L1_tuning_parm_storage_t       *ptuning_parms,
03307     VL53L1_zone_config_t               *pzone_cfg)
03308 {
03309 
03310 
03311     VL53L1_Error  status = VL53L1_ERROR_NONE;
03312 
03313     LOG_FUNCTION_START("");
03314 
03315 
03316 
03317     status =
03318         VL53L1_preset_mode_histogram_short_range(
03319             phistpostprocess,
03320             pstatic,
03321             phistogram,
03322             pgeneral,
03323             ptiming,
03324             pdynamic,
03325             psystem,
03326             ptuning_parms,
03327             pzone_cfg);
03328 
03329 
03330 
03331     if (status == VL53L1_ERROR_NONE) {
03332 
03333 
03334 
03335         status =
03336             VL53L1_init_zone_config_structure(
03337                 4, 8, 2,
03338                 4, 8, 2,
03339                 7, 7,
03340                 pzone_cfg);
03341 
03342         pgeneral->global_config__stream_divider =
03343             pzone_cfg->active_zones + 1;
03344 
03345 
03346 
03347         if (status == VL53L1_ERROR_NONE) {
03348             status =
03349             VL53L1_set_histogram_multizone_initial_bin_config(
03350             pzone_cfg,
03351             phistogram,
03352             &(pzone_cfg->multizone_hist_cfg)
03353             );
03354         }
03355 
03356 
03357 
03358         VL53L1_copy_hist_cfg_to_static_cfg(
03359                 phistogram,
03360                 pstatic,
03361                 pgeneral,
03362                 ptiming,
03363                 pdynamic);
03364     }
03365 
03366     LOG_FUNCTION_END(status);
03367 
03368     return status;
03369 }
03370 
03371 
03372 VL53L1_Error VL53L1_preset_mode_histogram_multizone_long_range(
03373     VL53L1_hist_post_process_config_t  *phistpostprocess,
03374     VL53L1_static_config_t             *pstatic,
03375     VL53L1_histogram_config_t          *phistogram,
03376     VL53L1_general_config_t            *pgeneral,
03377     VL53L1_timing_config_t             *ptiming,
03378     VL53L1_dynamic_config_t            *pdynamic,
03379     VL53L1_system_control_t            *psystem,
03380     VL53L1_tuning_parm_storage_t       *ptuning_parms,
03381     VL53L1_zone_config_t               *pzone_cfg)
03382 {
03383 
03384 
03385     VL53L1_Error  status = VL53L1_ERROR_NONE;
03386 
03387     LOG_FUNCTION_START("");
03388 
03389 
03390 
03391     status =
03392         VL53L1_preset_mode_histogram_long_range(
03393             phistpostprocess,
03394             pstatic,
03395             phistogram,
03396             pgeneral,
03397             ptiming,
03398             pdynamic,
03399             psystem,
03400             ptuning_parms,
03401             pzone_cfg);
03402 
03403 
03404 
03405     if (status == VL53L1_ERROR_NONE) {
03406 
03407 
03408 
03409         status =
03410             VL53L1_init_zone_config_structure(
03411                 4, 8, 2,
03412                 4, 8, 2,
03413                 7, 7,
03414                 pzone_cfg);
03415 
03416         pgeneral->global_config__stream_divider =
03417             pzone_cfg->active_zones + 1;
03418 
03419 
03420 
03421         if (status == VL53L1_ERROR_NONE) {
03422             status =
03423             VL53L1_set_histogram_multizone_initial_bin_config(
03424                 pzone_cfg,
03425                 phistogram,
03426                 &(pzone_cfg->multizone_hist_cfg));
03427         }
03428 
03429 
03430 
03431         VL53L1_copy_hist_cfg_to_static_cfg(
03432             phistogram,
03433             pstatic,
03434             pgeneral,
03435             ptiming,
03436             pdynamic);
03437     }
03438 
03439     LOG_FUNCTION_END(status);
03440 
03441     return status;
03442 }
03443 
03444 
03445 
03446 
03447 VL53L1_Error VL53L1_preset_mode_olt(
03448     VL53L1_static_config_t    *pstatic,
03449     VL53L1_histogram_config_t *phistogram,
03450     VL53L1_general_config_t   *pgeneral,
03451     VL53L1_timing_config_t    *ptiming,
03452     VL53L1_dynamic_config_t   *pdynamic,
03453     VL53L1_system_control_t   *psystem,
03454     VL53L1_tuning_parm_storage_t *ptuning_parms,
03455     VL53L1_zone_config_t      *pzone_cfg)
03456 {
03457 
03458 
03459     VL53L1_Error  status = VL53L1_ERROR_NONE;
03460 
03461     LOG_FUNCTION_START("");
03462 
03463 
03464 
03465     status = VL53L1_preset_mode_standard_ranging(
03466                     pstatic,
03467                     phistogram,
03468                     pgeneral,
03469                     ptiming,
03470                     pdynamic,
03471                     psystem,
03472                     ptuning_parms,
03473                     pzone_cfg);
03474 
03475 
03476 
03477     if (status == VL53L1_ERROR_NONE)
03478 
03479         psystem->system__stream_count_ctrl = 0x01;
03480 
03481     LOG_FUNCTION_END(status);
03482 
03483     return status;
03484 }
03485 
03486 
03487 void VL53L1_copy_hist_cfg_to_static_cfg(
03488     VL53L1_histogram_config_t *phistogram,
03489     VL53L1_static_config_t    *pstatic,
03490     VL53L1_general_config_t   *pgeneral,
03491     VL53L1_timing_config_t    *ptiming,
03492     VL53L1_dynamic_config_t   *pdynamic)
03493 {
03494 
03495 
03496     LOG_FUNCTION_START("");
03497 
03498     SUPPRESS_UNUSED_WARNING(pgeneral);
03499 
03500     pstatic->sigma_estimator__effective_pulse_width_ns =
03501             phistogram->histogram_config__high_amb_even_bin_0_1;
03502     pstatic->sigma_estimator__effective_ambient_width_ns =
03503             phistogram->histogram_config__high_amb_even_bin_2_3;
03504     pstatic->sigma_estimator__sigma_ref_mm =
03505             phistogram->histogram_config__high_amb_even_bin_4_5;
03506 
03507     pstatic->algo__crosstalk_compensation_valid_height_mm =
03508             phistogram->histogram_config__high_amb_odd_bin_0_1;
03509 
03510     pstatic->spare_host_config__static_config_spare_0 =
03511             phistogram->histogram_config__high_amb_odd_bin_2_3;
03512     pstatic->spare_host_config__static_config_spare_1 =
03513             phistogram->histogram_config__high_amb_odd_bin_4_5;
03514 
03515     pstatic->algo__range_ignore_threshold_mcps =
03516         (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
03517                 << 8)
03518         + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
03519 
03520     pstatic->algo__range_ignore_valid_height_mm =
03521             phistogram->histogram_config__mid_amb_even_bin_4_5;
03522     pstatic->algo__range_min_clip =
03523             phistogram->histogram_config__mid_amb_odd_bin_0_1;
03524     pstatic->algo__consistency_check__tolerance =
03525             phistogram->histogram_config__mid_amb_odd_bin_2;
03526 
03527     pstatic->spare_host_config__static_config_spare_2 =
03528             phistogram->histogram_config__mid_amb_odd_bin_3_4;
03529     pstatic->sd_config__reset_stages_msb =
03530             phistogram->histogram_config__mid_amb_odd_bin_5;
03531 
03532     pstatic->sd_config__reset_stages_lsb =
03533             phistogram->histogram_config__user_bin_offset;
03534 
03535     ptiming->range_config__sigma_thresh =
03536         (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
03537                 << 8)
03538         + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
03539 
03540     ptiming->range_config__min_count_rate_rtn_limit_mcps =
03541         (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
03542                 << 8)
03543         + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
03544 
03545     ptiming->range_config__valid_phase_low =
03546             phistogram->histogram_config__low_amb_odd_bin_2_3;
03547     ptiming->range_config__valid_phase_high =
03548             phistogram->histogram_config__low_amb_odd_bin_4_5;
03549 
03550     pdynamic->system__thresh_high =
03551             phistogram->histogram_config__amb_thresh_low;
03552 
03553     pdynamic->system__thresh_low =
03554             phistogram->histogram_config__amb_thresh_high;
03555 
03556     pdynamic->system__enable_xtalk_per_quadrant =
03557             phistogram->histogram_config__spad_array_selection;
03558 
03559     LOG_FUNCTION_END(0);
03560 
03561 }
03562 
03563 void VL53L1_copy_hist_bins_to_static_cfg(
03564     VL53L1_histogram_config_t *phistogram,
03565     VL53L1_static_config_t    *pstatic,
03566     VL53L1_timing_config_t    *ptiming)
03567 {
03568 
03569 
03570     LOG_FUNCTION_START("");
03571 
03572     pstatic->sigma_estimator__effective_pulse_width_ns =
03573             phistogram->histogram_config__high_amb_even_bin_0_1;
03574     pstatic->sigma_estimator__effective_ambient_width_ns =
03575             phistogram->histogram_config__high_amb_even_bin_2_3;
03576     pstatic->sigma_estimator__sigma_ref_mm =
03577             phistogram->histogram_config__high_amb_even_bin_4_5;
03578 
03579     pstatic->algo__crosstalk_compensation_valid_height_mm =
03580             phistogram->histogram_config__high_amb_odd_bin_0_1;
03581 
03582     pstatic->spare_host_config__static_config_spare_0 =
03583             phistogram->histogram_config__high_amb_odd_bin_2_3;
03584     pstatic->spare_host_config__static_config_spare_1 =
03585             phistogram->histogram_config__high_amb_odd_bin_4_5;
03586 
03587     pstatic->algo__range_ignore_threshold_mcps =
03588         (((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
03589                 << 8)
03590         + (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
03591 
03592     pstatic->algo__range_ignore_valid_height_mm =
03593             phistogram->histogram_config__mid_amb_even_bin_4_5;
03594     pstatic->algo__range_min_clip =
03595             phistogram->histogram_config__mid_amb_odd_bin_0_1;
03596     pstatic->algo__consistency_check__tolerance =
03597             phistogram->histogram_config__mid_amb_odd_bin_2;
03598 
03599     pstatic->spare_host_config__static_config_spare_2 =
03600             phistogram->histogram_config__mid_amb_odd_bin_3_4;
03601     pstatic->sd_config__reset_stages_msb =
03602             phistogram->histogram_config__mid_amb_odd_bin_5;
03603 
03604     ptiming->range_config__sigma_thresh =
03605         (((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
03606                 << 8)
03607         + (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
03608 
03609     ptiming->range_config__min_count_rate_rtn_limit_mcps =
03610         (((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
03611                 << 8)
03612         + (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
03613 
03614     ptiming->range_config__valid_phase_low =
03615             phistogram->histogram_config__low_amb_odd_bin_2_3;
03616     ptiming->range_config__valid_phase_high =
03617             phistogram->histogram_config__low_amb_odd_bin_4_5;
03618 
03619     LOG_FUNCTION_END(0);
03620 
03621 }
03622 
03623 
03624 VL53L1_Error VL53L1_preset_mode_histogram_ranging_ref(
03625     VL53L1_hist_post_process_config_t  *phistpostprocess,
03626     VL53L1_static_config_t             *pstatic,
03627     VL53L1_histogram_config_t          *phistogram,
03628     VL53L1_general_config_t            *pgeneral,
03629     VL53L1_timing_config_t             *ptiming,
03630     VL53L1_dynamic_config_t            *pdynamic,
03631     VL53L1_system_control_t            *psystem,
03632     VL53L1_tuning_parm_storage_t       *ptuning_parms,
03633     VL53L1_zone_config_t               *pzone_cfg)
03634 {
03635 
03636 
03637     VL53L1_Error  status = VL53L1_ERROR_NONE;
03638 
03639     LOG_FUNCTION_START("");
03640 
03641 
03642 
03643     status =
03644         VL53L1_preset_mode_histogram_ranging(
03645             phistpostprocess,
03646             pstatic,
03647             phistogram,
03648             pgeneral,
03649             ptiming,
03650             pdynamic,
03651             psystem,
03652             ptuning_parms,
03653             pzone_cfg);
03654 
03655 
03656 
03657     if (status == VL53L1_ERROR_NONE) {
03658 
03659 
03660 
03661         phistogram->histogram_config__spad_array_selection = 0x01;
03662 
03663 
03664 
03665         VL53L1_copy_hist_cfg_to_static_cfg(
03666                 phistogram,
03667                 pstatic,
03668                 pgeneral,
03669                 ptiming,
03670                 pdynamic);
03671     }
03672 
03673     LOG_FUNCTION_END(status);
03674 
03675     return status;
03676 }
03677 
03678 
03679 
03680 
03681