VL53L1CB - The VL53L1CB proximity sensor, based on ST’s Flig…

ST Expansion SW Team » Code » VL53L1CB

ST Expansion SW Team / VL53L1CB

The VL53L1CB proximity sensor, based on ST’s FlightSense™, Time-of-Flight technology.

Dependencies: X_NUCLEO_COMMON ST_INTERFACES

Dependents: VL53L1CB_noshield_1sensor_polls_auton VL53L1CB_noshield_1sensor_interrupt_auton X_NUCLEO_53L1A2

Based on VL53L1 library, this is a library for the VL53L1CB ToF chip.

src/vl53l1_api_preset_modes.c@0:3ac96e360672, 2020-11-06 (annotated)

Committer:: charlesmn
Date:: Fri Nov 06 10:06:37 2020 +0000
Revision:: 0:3ac96e360672
Child:: 7:1add29d51e72

Library for ST Vl53L1A1 time of flight sensor.

Who changed what in which revision?

User	Revision	Line number	New contents of line
charlesmn	0:3ac96e360672	1
charlesmn	0:3ac96e360672	2	/*******************************************************************************
charlesmn	0:3ac96e360672	3	* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn	0:3ac96e360672	4
charlesmn	0:3ac96e360672	5	This file is part of VL53L1 Core and is dual licensed,
charlesmn	0:3ac96e360672	6	either 'STMicroelectronics
charlesmn	0:3ac96e360672	7	Proprietary license'
charlesmn	0:3ac96e360672	8	or 'BSD 3-clause "New" or "Revised" License' , at your option.
charlesmn	0:3ac96e360672	9
charlesmn	0:3ac96e360672	10	********************************************************************************
charlesmn	0:3ac96e360672	11
charlesmn	0:3ac96e360672	12	'STMicroelectronics Proprietary license'
charlesmn	0:3ac96e360672	13
charlesmn	0:3ac96e360672	14	********************************************************************************
charlesmn	0:3ac96e360672	15
charlesmn	0:3ac96e360672	16	License terms: STMicroelectronics Proprietary in accordance with licensing
charlesmn	0:3ac96e360672	17	terms at www.st.com/sla0081
charlesmn	0:3ac96e360672	18
charlesmn	0:3ac96e360672	19	STMicroelectronics confidential
charlesmn	0:3ac96e360672	20	Reproduction and Communication of this document is strictly prohibited unless
charlesmn	0:3ac96e360672	21	specifically authorized in writing by STMicroelectronics.
charlesmn	0:3ac96e360672	22
charlesmn	0:3ac96e360672	23
charlesmn	0:3ac96e360672	24	********************************************************************************
charlesmn	0:3ac96e360672	25
charlesmn	0:3ac96e360672	26	Alternatively, VL53L1 Core may be distributed under the terms of
charlesmn	0:3ac96e360672	27	'BSD 3-clause "New" or "Revised" License', in which case the following
charlesmn	0:3ac96e360672	28	provisions apply instead of the ones
charlesmn	0:3ac96e360672	29	mentioned above :
charlesmn	0:3ac96e360672	30
charlesmn	0:3ac96e360672	31	********************************************************************************
charlesmn	0:3ac96e360672	32
charlesmn	0:3ac96e360672	33	License terms: BSD 3-clause "New" or "Revised" License.
charlesmn	0:3ac96e360672	34
charlesmn	0:3ac96e360672	35	Redistribution and use in source and binary forms, with or without
charlesmn	0:3ac96e360672	36	modification, are permitted provided that the following conditions are met:
charlesmn	0:3ac96e360672	37
charlesmn	0:3ac96e360672	38	1. Redistributions of source code must retain the above copyright notice, this
charlesmn	0:3ac96e360672	39	list of conditions and the following disclaimer.
charlesmn	0:3ac96e360672	40
charlesmn	0:3ac96e360672	41	2. Redistributions in binary form must reproduce the above copyright notice,
charlesmn	0:3ac96e360672	42	this list of conditions and the following disclaimer in the documentation
charlesmn	0:3ac96e360672	43	and/or other materials provided with the distribution.
charlesmn	0:3ac96e360672	44
charlesmn	0:3ac96e360672	45	3. Neither the name of the copyright holder nor the names of its contributors
charlesmn	0:3ac96e360672	46	may be used to endorse or promote products derived from this software
charlesmn	0:3ac96e360672	47	without specific prior written permission.
charlesmn	0:3ac96e360672	48
charlesmn	0:3ac96e360672	49	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
charlesmn	0:3ac96e360672	50	AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
charlesmn	0:3ac96e360672	51	IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
charlesmn	0:3ac96e360672	52	DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
charlesmn	0:3ac96e360672	53	FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
charlesmn	0:3ac96e360672	54	DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
charlesmn	0:3ac96e360672	55	SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
charlesmn	0:3ac96e360672	56	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
charlesmn	0:3ac96e360672	57	OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
charlesmn	0:3ac96e360672	58	OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
charlesmn	0:3ac96e360672	59
charlesmn	0:3ac96e360672	60
charlesmn	0:3ac96e360672	61	********************************************************************************
charlesmn	0:3ac96e360672	62
charlesmn	0:3ac96e360672	63	*/
charlesmn	0:3ac96e360672	64
charlesmn	0:3ac96e360672	65
charlesmn	0:3ac96e360672	66
charlesmn	0:3ac96e360672	67
charlesmn	0:3ac96e360672	68	#include "vl53l1_ll_def.h"
charlesmn	0:3ac96e360672	69	#include "vl53l1_platform_log.h"
charlesmn	0:3ac96e360672	70	#include "vl53l1_register_structs.h"
charlesmn	0:3ac96e360672	71	#include "vl53l1_register_settings.h"
charlesmn	0:3ac96e360672	72	#include "vl53l1_hist_structs.h"
charlesmn	0:3ac96e360672	73	#include "vl53l1_zone_presets.h"
charlesmn	0:3ac96e360672	74	#include "vl53l1_core.h"
charlesmn	0:3ac96e360672	75	#include "vl53l1_api_preset_modes.h"
charlesmn	0:3ac96e360672	76	#include "vl53l1_tuning_parm_defaults.h"
charlesmn	0:3ac96e360672	77
charlesmn	0:3ac96e360672	78
charlesmn	0:3ac96e360672	79	#define LOG_FUNCTION_START(fmt, ...) \
charlesmn	0:3ac96e360672	80	_LOG_FUNCTION_START(VL53L1_TRACE_MODULE_API, fmt, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	81	#define LOG_FUNCTION_END(status, ...) \
charlesmn	0:3ac96e360672	82	_LOG_FUNCTION_END(VL53L1_TRACE_MODULE_API, status, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	83	#define LOG_FUNCTION_END_FMT(status, fmt, ...) \
charlesmn	0:3ac96e360672	84	_LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_API,\
charlesmn	0:3ac96e360672	85	status, fmt, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	86
charlesmn	0:3ac96e360672	87
charlesmn	0:3ac96e360672	88	VL53L1_Error VL53L1_init_refspadchar_config_struct(
charlesmn	0:3ac96e360672	89	VL53L1_refspadchar_config_t *pdata)
charlesmn	0:3ac96e360672	90	{
charlesmn	0:3ac96e360672	91
charlesmn	0:3ac96e360672	92
charlesmn	0:3ac96e360672	93	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	94
charlesmn	0:3ac96e360672	95	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	96
charlesmn	0:3ac96e360672	97
charlesmn	0:3ac96e360672	98
charlesmn	0:3ac96e360672	99	pdata->device_test_mode =
charlesmn	0:3ac96e360672	100	VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE_DEFAULT;
charlesmn	0:3ac96e360672	101	pdata->VL53L1_p_009 =
charlesmn	0:3ac96e360672	102	VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD_DEFAULT;
charlesmn	0:3ac96e360672	103	pdata->timeout_us =
charlesmn	0:3ac96e360672	104	VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	105	pdata->target_count_rate_mcps =
charlesmn	0:3ac96e360672	106	VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	107	pdata->min_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	108	VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	109	pdata->max_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	110	VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	111
charlesmn	0:3ac96e360672	112	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	113
charlesmn	0:3ac96e360672	114	return status;
charlesmn	0:3ac96e360672	115	}
charlesmn	0:3ac96e360672	116
charlesmn	0:3ac96e360672	117
charlesmn	0:3ac96e360672	118	VL53L1_Error VL53L1_init_ssc_config_struct(
charlesmn	0:3ac96e360672	119	VL53L1_ssc_config_t *pdata)
charlesmn	0:3ac96e360672	120	{
charlesmn	0:3ac96e360672	121
charlesmn	0:3ac96e360672	122
charlesmn	0:3ac96e360672	123	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	124
charlesmn	0:3ac96e360672	125	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	126
charlesmn	0:3ac96e360672	127
charlesmn	0:3ac96e360672	128
charlesmn	0:3ac96e360672	129
charlesmn	0:3ac96e360672	130	pdata->array_select = VL53L1_DEVICESSCARRAY_RTN;
charlesmn	0:3ac96e360672	131
charlesmn	0:3ac96e360672	132
charlesmn	0:3ac96e360672	133	pdata->VL53L1_p_009 =
charlesmn	0:3ac96e360672	134	VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD_DEFAULT;
charlesmn	0:3ac96e360672	135
charlesmn	0:3ac96e360672	136
charlesmn	0:3ac96e360672	137	pdata->vcsel_start =
charlesmn	0:3ac96e360672	138	VL53L1_TUNINGPARM_SPADMAP_VCSEL_START_DEFAULT;
charlesmn	0:3ac96e360672	139
charlesmn	0:3ac96e360672	140
charlesmn	0:3ac96e360672	141	pdata->vcsel_width = 0x02;
charlesmn	0:3ac96e360672	142
charlesmn	0:3ac96e360672	143
charlesmn	0:3ac96e360672	144	pdata->timeout_us = 36000;
charlesmn	0:3ac96e360672	145
charlesmn	0:3ac96e360672	146
charlesmn	0:3ac96e360672	147	pdata->rate_limit_mcps =
charlesmn	0:3ac96e360672	148	VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	149
charlesmn	0:3ac96e360672	150	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	151
charlesmn	0:3ac96e360672	152	return status;
charlesmn	0:3ac96e360672	153	}
charlesmn	0:3ac96e360672	154
charlesmn	0:3ac96e360672	155
charlesmn	0:3ac96e360672	156	VL53L1_Error VL53L1_init_xtalk_config_struct(
charlesmn	0:3ac96e360672	157	VL53L1_customer_nvm_managed_t *pnvm,
charlesmn	0:3ac96e360672	158	VL53L1_xtalk_config_t *pdata)
charlesmn	0:3ac96e360672	159	{
charlesmn	0:3ac96e360672	160
charlesmn	0:3ac96e360672	161
charlesmn	0:3ac96e360672	162	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	163
charlesmn	0:3ac96e360672	164	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	165
charlesmn	0:3ac96e360672	166
charlesmn	0:3ac96e360672	167
charlesmn	0:3ac96e360672	168
charlesmn	0:3ac96e360672	169
charlesmn	0:3ac96e360672	170	pdata->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	171	pnvm->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	172	pdata->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	173	pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	174	pdata->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	175	pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	176
charlesmn	0:3ac96e360672	177
charlesmn	0:3ac96e360672	178
charlesmn	0:3ac96e360672	179	pdata->nvm_default__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	180	(uint32_t)pnvm->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	181	pdata->nvm_default__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	182	pnvm->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	183	pdata->nvm_default__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	184	pnvm->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	185
charlesmn	0:3ac96e360672	186	pdata->histogram_mode_crosstalk_margin_kcps =
charlesmn	0:3ac96e360672	187	VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS_DEFAULT;
charlesmn	0:3ac96e360672	188	pdata->lite_mode_crosstalk_margin_kcps =
charlesmn	0:3ac96e360672	189	VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS_DEFAULT;
charlesmn	0:3ac96e360672	190
charlesmn	0:3ac96e360672	191
charlesmn	0:3ac96e360672	192
charlesmn	0:3ac96e360672	193	pdata->crosstalk_range_ignore_threshold_mult =
charlesmn	0:3ac96e360672	194	VL53L1_TUNINGPARM_LITE_RIT_MULT_DEFAULT;
charlesmn	0:3ac96e360672	195
charlesmn	0:3ac96e360672	196	if ((pdata->algo__crosstalk_compensation_plane_offset_kcps == 0x00)
charlesmn	0:3ac96e360672	197	&& (pdata->algo__crosstalk_compensation_x_plane_gradient_kcps
charlesmn	0:3ac96e360672	198	== 0x00)
charlesmn	0:3ac96e360672	199	&& (pdata->algo__crosstalk_compensation_y_plane_gradient_kcps
charlesmn	0:3ac96e360672	200	== 0x00))
charlesmn	0:3ac96e360672	201	pdata->global_crosstalk_compensation_enable = 0x00;
charlesmn	0:3ac96e360672	202	else
charlesmn	0:3ac96e360672	203	pdata->global_crosstalk_compensation_enable = 0x01;
charlesmn	0:3ac96e360672	204
charlesmn	0:3ac96e360672	205
charlesmn	0:3ac96e360672	206	if ((status == VL53L1_ERROR_NONE) &&
charlesmn	0:3ac96e360672	207	(pdata->global_crosstalk_compensation_enable == 0x01)) {
charlesmn	0:3ac96e360672	208	pdata->crosstalk_range_ignore_threshold_rate_mcps =
charlesmn	0:3ac96e360672	209	VL53L1_calc_range_ignore_threshold(
charlesmn	0:3ac96e360672	210	pdata->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	211	pdata->algo__crosstalk_compensation_x_plane_gradient_kcps,
charlesmn	0:3ac96e360672	212	pdata->algo__crosstalk_compensation_y_plane_gradient_kcps,
charlesmn	0:3ac96e360672	213	pdata->crosstalk_range_ignore_threshold_mult);
charlesmn	0:3ac96e360672	214	} else {
charlesmn	0:3ac96e360672	215	pdata->crosstalk_range_ignore_threshold_rate_mcps = 0;
charlesmn	0:3ac96e360672	216	}
charlesmn	0:3ac96e360672	217
charlesmn	0:3ac96e360672	218
charlesmn	0:3ac96e360672	219
charlesmn	0:3ac96e360672	220
charlesmn	0:3ac96e360672	221	pdata->algo__crosstalk_detect_min_valid_range_mm =
charlesmn	0:3ac96e360672	222	VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
charlesmn	0:3ac96e360672	223	pdata->algo__crosstalk_detect_max_valid_range_mm =
charlesmn	0:3ac96e360672	224	VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
charlesmn	0:3ac96e360672	225	pdata->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	226	VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
charlesmn	0:3ac96e360672	227	pdata->algo__crosstalk_detect_max_sigma_mm =
charlesmn	0:3ac96e360672	228	VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
charlesmn	0:3ac96e360672	229
charlesmn	0:3ac96e360672	230	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	231
charlesmn	0:3ac96e360672	232	return status;
charlesmn	0:3ac96e360672	233	}
charlesmn	0:3ac96e360672	234
charlesmn	0:3ac96e360672	235	VL53L1_Error VL53L1_init_xtalk_extract_config_struct(
charlesmn	0:3ac96e360672	236	VL53L1_xtalkextract_config_t *pdata)
charlesmn	0:3ac96e360672	237	{
charlesmn	0:3ac96e360672	238
charlesmn	0:3ac96e360672	239
charlesmn	0:3ac96e360672	240	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	241
charlesmn	0:3ac96e360672	242	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	243
charlesmn	0:3ac96e360672	244
charlesmn	0:3ac96e360672	245
charlesmn	0:3ac96e360672	246	pdata->dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	247	VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	248
charlesmn	0:3ac96e360672	249	pdata->mm_config_timeout_us =
charlesmn	0:3ac96e360672	250	VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	251
charlesmn	0:3ac96e360672	252	pdata->num_of_samples =
charlesmn	0:3ac96e360672	253	VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES_DEFAULT;
charlesmn	0:3ac96e360672	254
charlesmn	0:3ac96e360672	255	pdata->phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	256	VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	257
charlesmn	0:3ac96e360672	258	pdata->range_config_timeout_us =
charlesmn	0:3ac96e360672	259	VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	260
charlesmn	0:3ac96e360672	261
charlesmn	0:3ac96e360672	262
charlesmn	0:3ac96e360672	263
charlesmn	0:3ac96e360672	264	pdata->algo__crosstalk_extract_min_valid_range_mm =
charlesmn	0:3ac96e360672	265	VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM_DEFAULT;
charlesmn	0:3ac96e360672	266	pdata->algo__crosstalk_extract_max_valid_range_mm =
charlesmn	0:3ac96e360672	267	VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM_DEFAULT;
charlesmn	0:3ac96e360672	268	pdata->algo__crosstalk_extract_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	269	VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS_DEFAULT;
charlesmn	0:3ac96e360672	270	pdata->algo__crosstalk_extract_max_sigma_mm =
charlesmn	0:3ac96e360672	271	VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM_DEFAULT;
charlesmn	0:3ac96e360672	272
charlesmn	0:3ac96e360672	273
charlesmn	0:3ac96e360672	274	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	275
charlesmn	0:3ac96e360672	276	return status;
charlesmn	0:3ac96e360672	277	}
charlesmn	0:3ac96e360672	278
charlesmn	0:3ac96e360672	279
charlesmn	0:3ac96e360672	280	VL53L1_Error VL53L1_init_offset_cal_config_struct(
charlesmn	0:3ac96e360672	281	VL53L1_offsetcal_config_t *pdata)
charlesmn	0:3ac96e360672	282	{
charlesmn	0:3ac96e360672	283
charlesmn	0:3ac96e360672	284
charlesmn	0:3ac96e360672	285	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	286
charlesmn	0:3ac96e360672	287	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	288
charlesmn	0:3ac96e360672	289
charlesmn	0:3ac96e360672	290
charlesmn	0:3ac96e360672	291	pdata->dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	292	VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	293
charlesmn	0:3ac96e360672	294	pdata->phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	295	VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	296
charlesmn	0:3ac96e360672	297	pdata->range_config_timeout_us =
charlesmn	0:3ac96e360672	298	VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	299
charlesmn	0:3ac96e360672	300	pdata->mm_config_timeout_us =
charlesmn	0:3ac96e360672	301	VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	302
charlesmn	0:3ac96e360672	303
charlesmn	0:3ac96e360672	304
charlesmn	0:3ac96e360672	305
charlesmn	0:3ac96e360672	306	pdata->pre_num_of_samples =
charlesmn	0:3ac96e360672	307	VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES_DEFAULT;
charlesmn	0:3ac96e360672	308	pdata->mm1_num_of_samples =
charlesmn	0:3ac96e360672	309	VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES_DEFAULT;
charlesmn	0:3ac96e360672	310	pdata->mm2_num_of_samples =
charlesmn	0:3ac96e360672	311	VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES_DEFAULT;
charlesmn	0:3ac96e360672	312
charlesmn	0:3ac96e360672	313	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	314
charlesmn	0:3ac96e360672	315	return status;
charlesmn	0:3ac96e360672	316	}
charlesmn	0:3ac96e360672	317
charlesmn	0:3ac96e360672	318	VL53L1_Error VL53L1_init_zone_cal_config_struct(
charlesmn	0:3ac96e360672	319	VL53L1_zonecal_config_t *pdata)
charlesmn	0:3ac96e360672	320	{
charlesmn	0:3ac96e360672	321
charlesmn	0:3ac96e360672	322
charlesmn	0:3ac96e360672	323	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	324
charlesmn	0:3ac96e360672	325	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	326
charlesmn	0:3ac96e360672	327
charlesmn	0:3ac96e360672	328
charlesmn	0:3ac96e360672	329	pdata->dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	330	VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	331
charlesmn	0:3ac96e360672	332	pdata->phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	333	VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	334
charlesmn	0:3ac96e360672	335	pdata->range_config_timeout_us =
charlesmn	0:3ac96e360672	336	VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	337
charlesmn	0:3ac96e360672	338	pdata->mm_config_timeout_us =
charlesmn	0:3ac96e360672	339	VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	340
charlesmn	0:3ac96e360672	341
charlesmn	0:3ac96e360672	342
charlesmn	0:3ac96e360672	343
charlesmn	0:3ac96e360672	344	pdata->phasecal_num_of_samples =
charlesmn	0:3ac96e360672	345	VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES_DEFAULT;
charlesmn	0:3ac96e360672	346	pdata->zone_num_of_samples =
charlesmn	0:3ac96e360672	347	VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES_DEFAULT;
charlesmn	0:3ac96e360672	348
charlesmn	0:3ac96e360672	349	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	350
charlesmn	0:3ac96e360672	351	return status;
charlesmn	0:3ac96e360672	352	}
charlesmn	0:3ac96e360672	353
charlesmn	0:3ac96e360672	354
charlesmn	0:3ac96e360672	355	VL53L1_Error VL53L1_init_hist_post_process_config_struct(
charlesmn	0:3ac96e360672	356	uint8_t xtalk_compensation_enable,
charlesmn	0:3ac96e360672	357	VL53L1_hist_post_process_config_t *pdata)
charlesmn	0:3ac96e360672	358	{
charlesmn	0:3ac96e360672	359
charlesmn	0:3ac96e360672	360
charlesmn	0:3ac96e360672	361	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	362
charlesmn	0:3ac96e360672	363	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	364
charlesmn	0:3ac96e360672	365
charlesmn	0:3ac96e360672	366
charlesmn	0:3ac96e360672	367	pdata->hist_algo_select =
charlesmn	0:3ac96e360672	368	VL53L1_TUNINGPARM_HIST_ALGO_SELECT_DEFAULT;
charlesmn	0:3ac96e360672	369
charlesmn	0:3ac96e360672	370
charlesmn	0:3ac96e360672	371
charlesmn	0:3ac96e360672	372	pdata->hist_target_order =
charlesmn	0:3ac96e360672	373	VL53L1_TUNINGPARM_HIST_TARGET_ORDER_DEFAULT;
charlesmn	0:3ac96e360672	374
charlesmn	0:3ac96e360672	375
charlesmn	0:3ac96e360672	376
charlesmn	0:3ac96e360672	377	pdata->filter_woi0 =
charlesmn	0:3ac96e360672	378	VL53L1_TUNINGPARM_HIST_FILTER_WOI_0_DEFAULT;
charlesmn	0:3ac96e360672	379	pdata->filter_woi1 =
charlesmn	0:3ac96e360672	380	VL53L1_TUNINGPARM_HIST_FILTER_WOI_1_DEFAULT;
charlesmn	0:3ac96e360672	381
charlesmn	0:3ac96e360672	382
charlesmn	0:3ac96e360672	383	pdata->hist_amb_est_method =
charlesmn	0:3ac96e360672	384	VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD_DEFAULT;
charlesmn	0:3ac96e360672	385
charlesmn	0:3ac96e360672	386	pdata->ambient_thresh_sigma0 =
charlesmn	0:3ac96e360672	387	VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0_DEFAULT;
charlesmn	0:3ac96e360672	388	pdata->ambient_thresh_sigma1 =
charlesmn	0:3ac96e360672	389	VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1_DEFAULT;
charlesmn	0:3ac96e360672	390
charlesmn	0:3ac96e360672	391
charlesmn	0:3ac96e360672	392	pdata->ambient_thresh_events_scaler =
charlesmn	0:3ac96e360672	393	VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER_DEFAULT;
charlesmn	0:3ac96e360672	394
charlesmn	0:3ac96e360672	395
charlesmn	0:3ac96e360672	396	pdata->min_ambient_thresh_events =
charlesmn	0:3ac96e360672	397	VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS_DEFAULT;
charlesmn	0:3ac96e360672	398
charlesmn	0:3ac96e360672	399	pdata->noise_threshold =
charlesmn	0:3ac96e360672	400	VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD_DEFAULT;
charlesmn	0:3ac96e360672	401
charlesmn	0:3ac96e360672	402	pdata->signal_total_events_limit =
charlesmn	0:3ac96e360672	403	VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT_DEFAULT;
charlesmn	0:3ac96e360672	404	pdata->sigma_estimator__sigma_ref_mm =
charlesmn	0:3ac96e360672	405	VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM_DEFAULT;
charlesmn	0:3ac96e360672	406
charlesmn	0:3ac96e360672	407
charlesmn	0:3ac96e360672	408	pdata->sigma_thresh =
charlesmn	0:3ac96e360672	409	VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM_DEFAULT;
charlesmn	0:3ac96e360672	410
charlesmn	0:3ac96e360672	411	pdata->range_offset_mm = 0;
charlesmn	0:3ac96e360672	412
charlesmn	0:3ac96e360672	413	pdata->gain_factor =
charlesmn	0:3ac96e360672	414	VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
charlesmn	0:3ac96e360672	415
charlesmn	0:3ac96e360672	416
charlesmn	0:3ac96e360672	417
charlesmn	0:3ac96e360672	418	pdata->valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	419	pdata->valid_phase_high = 0x88;
charlesmn	0:3ac96e360672	420
charlesmn	0:3ac96e360672	421
charlesmn	0:3ac96e360672	422
charlesmn	0:3ac96e360672	423	pdata->algo__consistency_check__phase_tolerance =
charlesmn	0:3ac96e360672	424	VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE_DEFAULT;
charlesmn	0:3ac96e360672	425
charlesmn	0:3ac96e360672	426
charlesmn	0:3ac96e360672	427
charlesmn	0:3ac96e360672	428	pdata->algo__consistency_check__event_sigma =
charlesmn	0:3ac96e360672	429	VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_DEFAULT;
charlesmn	0:3ac96e360672	430
charlesmn	0:3ac96e360672	431
charlesmn	0:3ac96e360672	432	pdata->algo__consistency_check__event_min_spad_count =
charlesmn	0:3ac96e360672	433	VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT_DEFAULT;
charlesmn	0:3ac96e360672	434
charlesmn	0:3ac96e360672	435
charlesmn	0:3ac96e360672	436
charlesmn	0:3ac96e360672	437	pdata->algo__consistency_check__min_max_tolerance =
charlesmn	0:3ac96e360672	438	VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM_DEFAULT;
charlesmn	0:3ac96e360672	439
charlesmn	0:3ac96e360672	440
charlesmn	0:3ac96e360672	441	pdata->algo__crosstalk_compensation_enable = xtalk_compensation_enable;
charlesmn	0:3ac96e360672	442
charlesmn	0:3ac96e360672	443
charlesmn	0:3ac96e360672	444	pdata->algo__crosstalk_detect_min_valid_range_mm =
charlesmn	0:3ac96e360672	445	VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM_DEFAULT;
charlesmn	0:3ac96e360672	446	pdata->algo__crosstalk_detect_max_valid_range_mm =
charlesmn	0:3ac96e360672	447	VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM_DEFAULT;
charlesmn	0:3ac96e360672	448	pdata->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	449	VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS_DEFAULT;
charlesmn	0:3ac96e360672	450	pdata->algo__crosstalk_detect_max_sigma_mm =
charlesmn	0:3ac96e360672	451	VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM_DEFAULT;
charlesmn	0:3ac96e360672	452
charlesmn	0:3ac96e360672	453
charlesmn	0:3ac96e360672	454
charlesmn	0:3ac96e360672	455
charlesmn	0:3ac96e360672	456
charlesmn	0:3ac96e360672	457	pdata->algo__crosstalk_detect_event_sigma =
charlesmn	0:3ac96e360672	458	VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA_DEFAULT;
charlesmn	0:3ac96e360672	459
charlesmn	0:3ac96e360672	460
charlesmn	0:3ac96e360672	461
charlesmn	0:3ac96e360672	462	pdata->algo__crosstalk_detect_min_max_tolerance =
charlesmn	0:3ac96e360672	463	VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE_DEFAULT;
charlesmn	0:3ac96e360672	464
charlesmn	0:3ac96e360672	465
charlesmn	0:3ac96e360672	466
charlesmn	0:3ac96e360672	467	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	468
charlesmn	0:3ac96e360672	469	return status;
charlesmn	0:3ac96e360672	470	}
charlesmn	0:3ac96e360672	471
charlesmn	0:3ac96e360672	472
charlesmn	0:3ac96e360672	473	VL53L1_Error VL53L1_init_dmax_calibration_data_struct(
charlesmn	0:3ac96e360672	474	VL53L1_dmax_calibration_data_t *pdata)
charlesmn	0:3ac96e360672	475	{
charlesmn	0:3ac96e360672	476
charlesmn	0:3ac96e360672	477
charlesmn	0:3ac96e360672	478	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	479
charlesmn	0:3ac96e360672	480	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	481
charlesmn	0:3ac96e360672	482
charlesmn	0:3ac96e360672	483
charlesmn	0:3ac96e360672	484
charlesmn	0:3ac96e360672	485	pdata->ref__actual_effective_spads = 0x5F2D;
charlesmn	0:3ac96e360672	486
charlesmn	0:3ac96e360672	487	pdata->ref__peak_signal_count_rate_mcps = 0x0844;
charlesmn	0:3ac96e360672	488
charlesmn	0:3ac96e360672	489	pdata->ref__distance_mm = 0x08A5;
charlesmn	0:3ac96e360672	490
charlesmn	0:3ac96e360672	491
charlesmn	0:3ac96e360672	492	pdata->ref_reflectance_pc = 0x0014;
charlesmn	0:3ac96e360672	493
charlesmn	0:3ac96e360672	494
charlesmn	0:3ac96e360672	495	pdata->coverglass_transmission = 0x0100;
charlesmn	0:3ac96e360672	496
charlesmn	0:3ac96e360672	497	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	498
charlesmn	0:3ac96e360672	499	return status;
charlesmn	0:3ac96e360672	500	}
charlesmn	0:3ac96e360672	501
charlesmn	0:3ac96e360672	502
charlesmn	0:3ac96e360672	503	VL53L1_Error VL53L1_init_tuning_parm_storage_struct(
charlesmn	0:3ac96e360672	504	VL53L1_tuning_parm_storage_t *pdata)
charlesmn	0:3ac96e360672	505	{
charlesmn	0:3ac96e360672	506
charlesmn	0:3ac96e360672	507
charlesmn	0:3ac96e360672	508	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	509
charlesmn	0:3ac96e360672	510	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	511
charlesmn	0:3ac96e360672	512
charlesmn	0:3ac96e360672	513
charlesmn	0:3ac96e360672	514	pdata->tp_tuning_parm_version =
charlesmn	0:3ac96e360672	515	VL53L1_TUNINGPARM_VERSION_DEFAULT;
charlesmn	0:3ac96e360672	516	pdata->tp_tuning_parm_key_table_version =
charlesmn	0:3ac96e360672	517	VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT;
charlesmn	0:3ac96e360672	518	pdata->tp_tuning_parm_lld_version =
charlesmn	0:3ac96e360672	519	VL53L1_TUNINGPARM_LLD_VERSION_DEFAULT;
charlesmn	0:3ac96e360672	520	pdata->tp_init_phase_rtn_lite_long =
charlesmn	0:3ac96e360672	521	VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	522	pdata->tp_init_phase_rtn_lite_med =
charlesmn	0:3ac96e360672	523	VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	524	pdata->tp_init_phase_rtn_lite_short =
charlesmn	0:3ac96e360672	525	VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	526	pdata->tp_init_phase_ref_lite_long =
charlesmn	0:3ac96e360672	527	VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	528	pdata->tp_init_phase_ref_lite_med =
charlesmn	0:3ac96e360672	529	VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	530	pdata->tp_init_phase_ref_lite_short =
charlesmn	0:3ac96e360672	531	VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	532	pdata->tp_init_phase_rtn_hist_long =
charlesmn	0:3ac96e360672	533	VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	534	pdata->tp_init_phase_rtn_hist_med =
charlesmn	0:3ac96e360672	535	VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	536	pdata->tp_init_phase_rtn_hist_short =
charlesmn	0:3ac96e360672	537	VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	538	pdata->tp_init_phase_ref_hist_long =
charlesmn	0:3ac96e360672	539	VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	540	pdata->tp_init_phase_ref_hist_med =
charlesmn	0:3ac96e360672	541	VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	542	pdata->tp_init_phase_ref_hist_short =
charlesmn	0:3ac96e360672	543	VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE_DEFAULT;
charlesmn	0:3ac96e360672	544	pdata->tp_consistency_lite_phase_tolerance =
charlesmn	0:3ac96e360672	545	VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE_DEFAULT;
charlesmn	0:3ac96e360672	546	pdata->tp_phasecal_target =
charlesmn	0:3ac96e360672	547	VL53L1_TUNINGPARM_PHASECAL_TARGET_DEFAULT;
charlesmn	0:3ac96e360672	548	pdata->tp_cal_repeat_rate =
charlesmn	0:3ac96e360672	549	VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE_DEFAULT;
charlesmn	0:3ac96e360672	550	pdata->tp_lite_min_clip =
charlesmn	0:3ac96e360672	551	VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM_DEFAULT;
charlesmn	0:3ac96e360672	552	pdata->tp_lite_long_sigma_thresh_mm =
charlesmn	0:3ac96e360672	553	VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM_DEFAULT;
charlesmn	0:3ac96e360672	554	pdata->tp_lite_med_sigma_thresh_mm =
charlesmn	0:3ac96e360672	555	VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM_DEFAULT;
charlesmn	0:3ac96e360672	556	pdata->tp_lite_short_sigma_thresh_mm =
charlesmn	0:3ac96e360672	557	VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM_DEFAULT;
charlesmn	0:3ac96e360672	558	pdata->tp_lite_long_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	559	VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	560	pdata->tp_lite_med_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	561	VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	562	pdata->tp_lite_short_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	563	VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	564	pdata->tp_lite_sigma_est_pulse_width_ns =
charlesmn	0:3ac96e360672	565	VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH_DEFAULT;
charlesmn	0:3ac96e360672	566	pdata->tp_lite_sigma_est_amb_width_ns =
charlesmn	0:3ac96e360672	567	VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS_DEFAULT;
charlesmn	0:3ac96e360672	568	pdata->tp_lite_sigma_ref_mm =
charlesmn	0:3ac96e360672	569	VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM_DEFAULT;
charlesmn	0:3ac96e360672	570	pdata->tp_lite_seed_cfg =
charlesmn	0:3ac96e360672	571	VL53L1_TUNINGPARM_LITE_SEED_CONFIG_DEFAULT;
charlesmn	0:3ac96e360672	572	pdata->tp_timed_seed_cfg =
charlesmn	0:3ac96e360672	573	VL53L1_TUNINGPARM_TIMED_SEED_CONFIG_DEFAULT;
charlesmn	0:3ac96e360672	574	pdata->tp_lite_quantifier =
charlesmn	0:3ac96e360672	575	VL53L1_TUNINGPARM_LITE_QUANTIFIER_DEFAULT;
charlesmn	0:3ac96e360672	576	pdata->tp_lite_first_order_select =
charlesmn	0:3ac96e360672	577	VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT_DEFAULT;
charlesmn	0:3ac96e360672	578
charlesmn	0:3ac96e360672	579
charlesmn	0:3ac96e360672	580
charlesmn	0:3ac96e360672	581
charlesmn	0:3ac96e360672	582	pdata->tp_dss_target_lite_mcps =
charlesmn	0:3ac96e360672	583	VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	584	pdata->tp_dss_target_histo_mcps =
charlesmn	0:3ac96e360672	585	VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	586	pdata->tp_dss_target_histo_mz_mcps =
charlesmn	0:3ac96e360672	587	VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	588	pdata->tp_dss_target_timed_mcps =
charlesmn	0:3ac96e360672	589	VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	590	pdata->tp_phasecal_timeout_lite_us =
charlesmn	0:3ac96e360672	591	VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	592	pdata->tp_phasecal_timeout_hist_long_us =
charlesmn	0:3ac96e360672	593	VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	594	pdata->tp_phasecal_timeout_hist_med_us =
charlesmn	0:3ac96e360672	595	VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	596	pdata->tp_phasecal_timeout_hist_short_us =
charlesmn	0:3ac96e360672	597	VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	598	pdata->tp_phasecal_timeout_mz_long_us =
charlesmn	0:3ac96e360672	599	VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	600	pdata->tp_phasecal_timeout_mz_med_us =
charlesmn	0:3ac96e360672	601	VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	602	pdata->tp_phasecal_timeout_mz_short_us =
charlesmn	0:3ac96e360672	603	VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	604	pdata->tp_phasecal_timeout_timed_us =
charlesmn	0:3ac96e360672	605	VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	606	pdata->tp_mm_timeout_lite_us =
charlesmn	0:3ac96e360672	607	VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	608	pdata->tp_mm_timeout_histo_us =
charlesmn	0:3ac96e360672	609	VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	610	pdata->tp_mm_timeout_mz_us =
charlesmn	0:3ac96e360672	611	VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	612	pdata->tp_mm_timeout_timed_us =
charlesmn	0:3ac96e360672	613	VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	614	pdata->tp_range_timeout_lite_us =
charlesmn	0:3ac96e360672	615	VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	616	pdata->tp_range_timeout_histo_us =
charlesmn	0:3ac96e360672	617	VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	618	pdata->tp_range_timeout_mz_us =
charlesmn	0:3ac96e360672	619	VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	620	pdata->tp_range_timeout_timed_us =
charlesmn	0:3ac96e360672	621	VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	622
charlesmn	0:3ac96e360672	623
charlesmn	0:3ac96e360672	624
charlesmn	0:3ac96e360672	625	pdata->tp_mm_timeout_lpa_us =
charlesmn	0:3ac96e360672	626	VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	627	pdata->tp_range_timeout_lpa_us =
charlesmn	0:3ac96e360672	628	VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US_DEFAULT;
charlesmn	0:3ac96e360672	629
charlesmn	0:3ac96e360672	630	pdata->tp_dss_target_very_short_mcps =
charlesmn	0:3ac96e360672	631	VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS_DEFAULT;
charlesmn	0:3ac96e360672	632
charlesmn	0:3ac96e360672	633	pdata->tp_phasecal_patch_power =
charlesmn	0:3ac96e360672	634	VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER_DEFAULT;
charlesmn	0:3ac96e360672	635
charlesmn	0:3ac96e360672	636	pdata->tp_hist_merge =
charlesmn	0:3ac96e360672	637	VL53L1_TUNINGPARM_HIST_MERGE_DEFAULT;
charlesmn	0:3ac96e360672	638
charlesmn	0:3ac96e360672	639	pdata->tp_reset_merge_threshold =
charlesmn	0:3ac96e360672	640	VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD_DEFAULT;
charlesmn	0:3ac96e360672	641
charlesmn	0:3ac96e360672	642	pdata->tp_hist_merge_max_size =
charlesmn	0:3ac96e360672	643	VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE_DEFAULT;
charlesmn	0:3ac96e360672	644
charlesmn	0:3ac96e360672	645	pdata->tp_uwr_enable =
charlesmn	0:3ac96e360672	646	VL53L1_TUNINGPARM_UWR_ENABLE_DEFAULT;
charlesmn	0:3ac96e360672	647	pdata->tp_uwr_med_z_1_min =
charlesmn	0:3ac96e360672	648	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN_DEFAULT;
charlesmn	0:3ac96e360672	649	pdata->tp_uwr_med_z_1_max =
charlesmn	0:3ac96e360672	650	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX_DEFAULT;
charlesmn	0:3ac96e360672	651	pdata->tp_uwr_med_z_2_min =
charlesmn	0:3ac96e360672	652	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN_DEFAULT;
charlesmn	0:3ac96e360672	653	pdata->tp_uwr_med_z_2_max =
charlesmn	0:3ac96e360672	654	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX_DEFAULT;
charlesmn	0:3ac96e360672	655	pdata->tp_uwr_med_z_3_min =
charlesmn	0:3ac96e360672	656	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN_DEFAULT;
charlesmn	0:3ac96e360672	657	pdata->tp_uwr_med_z_3_max =
charlesmn	0:3ac96e360672	658	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX_DEFAULT;
charlesmn	0:3ac96e360672	659	pdata->tp_uwr_med_z_4_min =
charlesmn	0:3ac96e360672	660	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN_DEFAULT;
charlesmn	0:3ac96e360672	661	pdata->tp_uwr_med_z_4_max =
charlesmn	0:3ac96e360672	662	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX_DEFAULT;
charlesmn	0:3ac96e360672	663	pdata->tp_uwr_med_z_5_min =
charlesmn	0:3ac96e360672	664	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN_DEFAULT;
charlesmn	0:3ac96e360672	665	pdata->tp_uwr_med_z_5_max =
charlesmn	0:3ac96e360672	666	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX_DEFAULT;
charlesmn	0:3ac96e360672	667	pdata->tp_uwr_med_z_6_min =
charlesmn	0:3ac96e360672	668	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN_DEFAULT;
charlesmn	0:3ac96e360672	669	pdata->tp_uwr_med_z_6_max =
charlesmn	0:3ac96e360672	670	VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX_DEFAULT;
charlesmn	0:3ac96e360672	671	pdata->tp_uwr_med_corr_z_1_rangea =
charlesmn	0:3ac96e360672	672	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	673	pdata->tp_uwr_med_corr_z_1_rangeb =
charlesmn	0:3ac96e360672	674	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	675	pdata->tp_uwr_med_corr_z_2_rangea =
charlesmn	0:3ac96e360672	676	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	677	pdata->tp_uwr_med_corr_z_2_rangeb =
charlesmn	0:3ac96e360672	678	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	679	pdata->tp_uwr_med_corr_z_3_rangea =
charlesmn	0:3ac96e360672	680	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	681	pdata->tp_uwr_med_corr_z_3_rangeb =
charlesmn	0:3ac96e360672	682	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	683	pdata->tp_uwr_med_corr_z_4_rangea =
charlesmn	0:3ac96e360672	684	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	685	pdata->tp_uwr_med_corr_z_4_rangeb =
charlesmn	0:3ac96e360672	686	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	687	pdata->tp_uwr_med_corr_z_5_rangea =
charlesmn	0:3ac96e360672	688	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	689	pdata->tp_uwr_med_corr_z_5_rangeb =
charlesmn	0:3ac96e360672	690	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	691	pdata->tp_uwr_med_corr_z_6_rangea =
charlesmn	0:3ac96e360672	692	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	693	pdata->tp_uwr_med_corr_z_6_rangeb =
charlesmn	0:3ac96e360672	694	VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	695	pdata->tp_uwr_lng_z_1_min =
charlesmn	0:3ac96e360672	696	VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN_DEFAULT;
charlesmn	0:3ac96e360672	697	pdata->tp_uwr_lng_z_1_max =
charlesmn	0:3ac96e360672	698	VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX_DEFAULT;
charlesmn	0:3ac96e360672	699	pdata->tp_uwr_lng_z_2_min =
charlesmn	0:3ac96e360672	700	VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN_DEFAULT;
charlesmn	0:3ac96e360672	701	pdata->tp_uwr_lng_z_2_max =
charlesmn	0:3ac96e360672	702	VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX_DEFAULT;
charlesmn	0:3ac96e360672	703	pdata->tp_uwr_lng_z_3_min =
charlesmn	0:3ac96e360672	704	VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN_DEFAULT;
charlesmn	0:3ac96e360672	705	pdata->tp_uwr_lng_z_3_max =
charlesmn	0:3ac96e360672	706	VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX_DEFAULT;
charlesmn	0:3ac96e360672	707	pdata->tp_uwr_lng_z_4_min =
charlesmn	0:3ac96e360672	708	VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN_DEFAULT;
charlesmn	0:3ac96e360672	709	pdata->tp_uwr_lng_z_4_max =
charlesmn	0:3ac96e360672	710	VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX_DEFAULT;
charlesmn	0:3ac96e360672	711	pdata->tp_uwr_lng_z_5_min =
charlesmn	0:3ac96e360672	712	VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN_DEFAULT;
charlesmn	0:3ac96e360672	713	pdata->tp_uwr_lng_z_5_max =
charlesmn	0:3ac96e360672	714	VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX_DEFAULT;
charlesmn	0:3ac96e360672	715	pdata->tp_uwr_lng_corr_z_1_rangea =
charlesmn	0:3ac96e360672	716	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	717	pdata->tp_uwr_lng_corr_z_1_rangeb =
charlesmn	0:3ac96e360672	718	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	719	pdata->tp_uwr_lng_corr_z_2_rangea =
charlesmn	0:3ac96e360672	720	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	721	pdata->tp_uwr_lng_corr_z_2_rangeb =
charlesmn	0:3ac96e360672	722	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	723	pdata->tp_uwr_lng_corr_z_3_rangea =
charlesmn	0:3ac96e360672	724	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	725	pdata->tp_uwr_lng_corr_z_3_rangeb =
charlesmn	0:3ac96e360672	726	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	727	pdata->tp_uwr_lng_corr_z_4_rangea =
charlesmn	0:3ac96e360672	728	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	729	pdata->tp_uwr_lng_corr_z_4_rangeb =
charlesmn	0:3ac96e360672	730	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	731	pdata->tp_uwr_lng_corr_z_5_rangea =
charlesmn	0:3ac96e360672	732	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA_DEFAULT;
charlesmn	0:3ac96e360672	733	pdata->tp_uwr_lng_corr_z_5_rangeb =
charlesmn	0:3ac96e360672	734	VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB_DEFAULT;
charlesmn	0:3ac96e360672	735
charlesmn	0:3ac96e360672	736	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	737
charlesmn	0:3ac96e360672	738	return status;
charlesmn	0:3ac96e360672	739	}
charlesmn	0:3ac96e360672	740
charlesmn	0:3ac96e360672	741
charlesmn	0:3ac96e360672	742	VL53L1_Error VL53L1_init_hist_gen3_dmax_config_struct(
charlesmn	0:3ac96e360672	743	VL53L1_hist_gen3_dmax_config_t *pdata)
charlesmn	0:3ac96e360672	744	{
charlesmn	0:3ac96e360672	745
charlesmn	0:3ac96e360672	746
charlesmn	0:3ac96e360672	747	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	748
charlesmn	0:3ac96e360672	749	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	750
charlesmn	0:3ac96e360672	751
charlesmn	0:3ac96e360672	752	pdata->dss_config__target_total_rate_mcps = 0x1400;
charlesmn	0:3ac96e360672	753	pdata->dss_config__aperture_attenuation = 0x38;
charlesmn	0:3ac96e360672	754
charlesmn	0:3ac96e360672	755	pdata->signal_thresh_sigma =
charlesmn	0:3ac96e360672	756	VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA_DEFAULT;
charlesmn	0:3ac96e360672	757	pdata->ambient_thresh_sigma = 0x70;
charlesmn	0:3ac96e360672	758	pdata->min_ambient_thresh_events = 16;
charlesmn	0:3ac96e360672	759	pdata->signal_total_events_limit = 100;
charlesmn	0:3ac96e360672	760	pdata->max_effective_spads = 0xFFFF;
charlesmn	0:3ac96e360672	761
charlesmn	0:3ac96e360672	762
charlesmn	0:3ac96e360672	763
charlesmn	0:3ac96e360672	764	pdata->target_reflectance_for_dmax_calc[0] =
charlesmn	0:3ac96e360672	765	VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0_DEFAULT;
charlesmn	0:3ac96e360672	766	pdata->target_reflectance_for_dmax_calc[1] =
charlesmn	0:3ac96e360672	767	VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1_DEFAULT;
charlesmn	0:3ac96e360672	768	pdata->target_reflectance_for_dmax_calc[2] =
charlesmn	0:3ac96e360672	769	VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2_DEFAULT;
charlesmn	0:3ac96e360672	770	pdata->target_reflectance_for_dmax_calc[3] =
charlesmn	0:3ac96e360672	771	VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3_DEFAULT;
charlesmn	0:3ac96e360672	772	pdata->target_reflectance_for_dmax_calc[4] =
charlesmn	0:3ac96e360672	773	VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4_DEFAULT;
charlesmn	0:3ac96e360672	774
charlesmn	0:3ac96e360672	775	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	776
charlesmn	0:3ac96e360672	777	return status;
charlesmn	0:3ac96e360672	778	}
charlesmn	0:3ac96e360672	779
charlesmn	0:3ac96e360672	780
charlesmn	0:3ac96e360672	781	VL53L1_Error VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	782	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	783	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	784	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	785	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	786	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	787	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	788	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	789	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	790	{
charlesmn	0:3ac96e360672	791
charlesmn	0:3ac96e360672	792
charlesmn	0:3ac96e360672	793	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	794
charlesmn	0:3ac96e360672	795	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	796
charlesmn	0:3ac96e360672	797
charlesmn	0:3ac96e360672	798
charlesmn	0:3ac96e360672	799
charlesmn	0:3ac96e360672	800	pstatic->dss_config__target_total_rate_mcps = 0x0A00;
charlesmn	0:3ac96e360672	801	pstatic->debug__ctrl = 0x00;
charlesmn	0:3ac96e360672	802	pstatic->test_mode__ctrl = 0x00;
charlesmn	0:3ac96e360672	803	pstatic->clk_gating__ctrl = 0x00;
charlesmn	0:3ac96e360672	804	pstatic->nvm_bist__ctrl = 0x00;
charlesmn	0:3ac96e360672	805	pstatic->nvm_bist__num_nvm_words = 0x00;
charlesmn	0:3ac96e360672	806	pstatic->nvm_bist__start_address = 0x00;
charlesmn	0:3ac96e360672	807	pstatic->host_if__status = 0x00;
charlesmn	0:3ac96e360672	808	pstatic->pad_i2c_hv__config = 0x00;
charlesmn	0:3ac96e360672	809	pstatic->pad_i2c_hv__extsup_config = 0x00;
charlesmn	0:3ac96e360672	810
charlesmn	0:3ac96e360672	811
charlesmn	0:3ac96e360672	812	pstatic->gpio_hv_pad__ctrl = 0x00;
charlesmn	0:3ac96e360672	813
charlesmn	0:3ac96e360672	814
charlesmn	0:3ac96e360672	815	pstatic->gpio_hv_mux__ctrl =
charlesmn	0:3ac96e360672	816	VL53L1_DEVICEINTERRUPTPOLARITY_ACTIVE_LOW \|
charlesmn	0:3ac96e360672	817	VL53L1_DEVICEGPIOMODE_OUTPUT_RANGE_AND_ERROR_INTERRUPTS;
charlesmn	0:3ac96e360672	818
charlesmn	0:3ac96e360672	819	pstatic->gpio__tio_hv_status = 0x02;
charlesmn	0:3ac96e360672	820	pstatic->gpio__fio_hv_status = 0x00;
charlesmn	0:3ac96e360672	821	pstatic->ana_config__spad_sel_pswidth = 0x02;
charlesmn	0:3ac96e360672	822	pstatic->ana_config__vcsel_pulse_width_offset = 0x08;
charlesmn	0:3ac96e360672	823	pstatic->ana_config__fast_osc__config_ctrl = 0x00;
charlesmn	0:3ac96e360672	824
charlesmn	0:3ac96e360672	825	pstatic->sigma_estimator__effective_pulse_width_ns =
charlesmn	0:3ac96e360672	826	ptuning_parms->tp_lite_sigma_est_pulse_width_ns;
charlesmn	0:3ac96e360672	827	pstatic->sigma_estimator__effective_ambient_width_ns =
charlesmn	0:3ac96e360672	828	ptuning_parms->tp_lite_sigma_est_amb_width_ns;
charlesmn	0:3ac96e360672	829	pstatic->sigma_estimator__sigma_ref_mm =
charlesmn	0:3ac96e360672	830	ptuning_parms->tp_lite_sigma_ref_mm;
charlesmn	0:3ac96e360672	831
charlesmn	0:3ac96e360672	832	pstatic->algo__crosstalk_compensation_valid_height_mm = 0x01;
charlesmn	0:3ac96e360672	833	pstatic->spare_host_config__static_config_spare_0 = 0x00;
charlesmn	0:3ac96e360672	834	pstatic->spare_host_config__static_config_spare_1 = 0x00;
charlesmn	0:3ac96e360672	835
charlesmn	0:3ac96e360672	836	pstatic->algo__range_ignore_threshold_mcps = 0x0000;
charlesmn	0:3ac96e360672	837
charlesmn	0:3ac96e360672	838
charlesmn	0:3ac96e360672	839	pstatic->algo__range_ignore_valid_height_mm = 0xff;
charlesmn	0:3ac96e360672	840	pstatic->algo__range_min_clip =
charlesmn	0:3ac96e360672	841	ptuning_parms->tp_lite_min_clip;
charlesmn	0:3ac96e360672	842
charlesmn	0:3ac96e360672	843	pstatic->algo__consistency_check__tolerance =
charlesmn	0:3ac96e360672	844	ptuning_parms->tp_consistency_lite_phase_tolerance;
charlesmn	0:3ac96e360672	845	pstatic->spare_host_config__static_config_spare_2 = 0x00;
charlesmn	0:3ac96e360672	846	pstatic->sd_config__reset_stages_msb = 0x00;
charlesmn	0:3ac96e360672	847	pstatic->sd_config__reset_stages_lsb = 0x00;
charlesmn	0:3ac96e360672	848
charlesmn	0:3ac96e360672	849	pgeneral->gph_config__stream_count_update_value = 0x00;
charlesmn	0:3ac96e360672	850	pgeneral->global_config__stream_divider = 0x00;
charlesmn	0:3ac96e360672	851	pgeneral->system__interrupt_config_gpio =
charlesmn	0:3ac96e360672	852	VL53L1_INTERRUPT_CONFIG_NEW_SAMPLE_READY;
charlesmn	0:3ac96e360672	853	pgeneral->cal_config__vcsel_start = 0x0B;
charlesmn	0:3ac96e360672	854
charlesmn	0:3ac96e360672	855
charlesmn	0:3ac96e360672	856	pgeneral->cal_config__repeat_rate =
charlesmn	0:3ac96e360672	857	ptuning_parms->tp_cal_repeat_rate;
charlesmn	0:3ac96e360672	858	pgeneral->global_config__vcsel_width = 0x02;
charlesmn	0:3ac96e360672	859
charlesmn	0:3ac96e360672	860	pgeneral->phasecal_config__timeout_macrop = 0x0D;
charlesmn	0:3ac96e360672	861
charlesmn	0:3ac96e360672	862	pgeneral->phasecal_config__target =
charlesmn	0:3ac96e360672	863	ptuning_parms->tp_phasecal_target;
charlesmn	0:3ac96e360672	864	pgeneral->phasecal_config__override = 0x00;
charlesmn	0:3ac96e360672	865	pgeneral->dss_config__roi_mode_control =
charlesmn	0:3ac96e360672	866	VL53L1_DEVICEDSSMODE__TARGET_RATE;
charlesmn	0:3ac96e360672	867
charlesmn	0:3ac96e360672	868	pgeneral->system__thresh_rate_high = 0x0000;
charlesmn	0:3ac96e360672	869	pgeneral->system__thresh_rate_low = 0x0000;
charlesmn	0:3ac96e360672	870
charlesmn	0:3ac96e360672	871	pgeneral->dss_config__manual_effective_spads_select = 0x8C00;
charlesmn	0:3ac96e360672	872	pgeneral->dss_config__manual_block_select = 0x00;
charlesmn	0:3ac96e360672	873
charlesmn	0:3ac96e360672	874
charlesmn	0:3ac96e360672	875	pgeneral->dss_config__aperture_attenuation = 0x38;
charlesmn	0:3ac96e360672	876	pgeneral->dss_config__max_spads_limit = 0xFF;
charlesmn	0:3ac96e360672	877	pgeneral->dss_config__min_spads_limit = 0x01;
charlesmn	0:3ac96e360672	878
charlesmn	0:3ac96e360672	879
charlesmn	0:3ac96e360672	880
charlesmn	0:3ac96e360672	881
charlesmn	0:3ac96e360672	882	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	883	ptiming->mm_config__timeout_macrop_a_lo = 0x1a;
charlesmn	0:3ac96e360672	884	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	885	ptiming->mm_config__timeout_macrop_b_lo = 0x20;
charlesmn	0:3ac96e360672	886
charlesmn	0:3ac96e360672	887	ptiming->range_config__timeout_macrop_a_hi = 0x01;
charlesmn	0:3ac96e360672	888	ptiming->range_config__timeout_macrop_a_lo = 0xCC;
charlesmn	0:3ac96e360672	889
charlesmn	0:3ac96e360672	890	ptiming->range_config__vcsel_period_a = 0x0B;
charlesmn	0:3ac96e360672	891
charlesmn	0:3ac96e360672	892	ptiming->range_config__timeout_macrop_b_hi = 0x01;
charlesmn	0:3ac96e360672	893	ptiming->range_config__timeout_macrop_b_lo = 0xF5;
charlesmn	0:3ac96e360672	894
charlesmn	0:3ac96e360672	895	ptiming->range_config__vcsel_period_b = 0x09;
charlesmn	0:3ac96e360672	896
charlesmn	0:3ac96e360672	897	ptiming->range_config__sigma_thresh =
charlesmn	0:3ac96e360672	898	ptuning_parms->tp_lite_med_sigma_thresh_mm;
charlesmn	0:3ac96e360672	899
charlesmn	0:3ac96e360672	900	ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn	0:3ac96e360672	901	ptuning_parms->tp_lite_med_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	902
charlesmn	0:3ac96e360672	903
charlesmn	0:3ac96e360672	904	ptiming->range_config__valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	905	ptiming->range_config__valid_phase_high = 0x78;
charlesmn	0:3ac96e360672	906	ptiming->system__intermeasurement_period = 0x00000000;
charlesmn	0:3ac96e360672	907	ptiming->system__fractional_enable = 0x00;
charlesmn	0:3ac96e360672	908
charlesmn	0:3ac96e360672	909
charlesmn	0:3ac96e360672	910
charlesmn	0:3ac96e360672	911	phistogram->histogram_config__low_amb_even_bin_0_1 = 0x07;
charlesmn	0:3ac96e360672	912	phistogram->histogram_config__low_amb_even_bin_2_3 = 0x21;
charlesmn	0:3ac96e360672	913	phistogram->histogram_config__low_amb_even_bin_4_5 = 0x43;
charlesmn	0:3ac96e360672	914
charlesmn	0:3ac96e360672	915	phistogram->histogram_config__low_amb_odd_bin_0_1 = 0x10;
charlesmn	0:3ac96e360672	916	phistogram->histogram_config__low_amb_odd_bin_2_3 = 0x32;
charlesmn	0:3ac96e360672	917	phistogram->histogram_config__low_amb_odd_bin_4_5 = 0x54;
charlesmn	0:3ac96e360672	918
charlesmn	0:3ac96e360672	919	phistogram->histogram_config__mid_amb_even_bin_0_1 = 0x07;
charlesmn	0:3ac96e360672	920	phistogram->histogram_config__mid_amb_even_bin_2_3 = 0x21;
charlesmn	0:3ac96e360672	921	phistogram->histogram_config__mid_amb_even_bin_4_5 = 0x43;
charlesmn	0:3ac96e360672	922
charlesmn	0:3ac96e360672	923	phistogram->histogram_config__mid_amb_odd_bin_0_1 = 0x10;
charlesmn	0:3ac96e360672	924	phistogram->histogram_config__mid_amb_odd_bin_2 = 0x02;
charlesmn	0:3ac96e360672	925	phistogram->histogram_config__mid_amb_odd_bin_3_4 = 0x43;
charlesmn	0:3ac96e360672	926	phistogram->histogram_config__mid_amb_odd_bin_5 = 0x05;
charlesmn	0:3ac96e360672	927
charlesmn	0:3ac96e360672	928	phistogram->histogram_config__user_bin_offset = 0x00;
charlesmn	0:3ac96e360672	929
charlesmn	0:3ac96e360672	930	phistogram->histogram_config__high_amb_even_bin_0_1 = 0x07;
charlesmn	0:3ac96e360672	931	phistogram->histogram_config__high_amb_even_bin_2_3 = 0x21;
charlesmn	0:3ac96e360672	932	phistogram->histogram_config__high_amb_even_bin_4_5 = 0x43;
charlesmn	0:3ac96e360672	933
charlesmn	0:3ac96e360672	934	phistogram->histogram_config__high_amb_odd_bin_0_1 = 0x10;
charlesmn	0:3ac96e360672	935	phistogram->histogram_config__high_amb_odd_bin_2_3 = 0x32;
charlesmn	0:3ac96e360672	936	phistogram->histogram_config__high_amb_odd_bin_4_5 = 0x54;
charlesmn	0:3ac96e360672	937
charlesmn	0:3ac96e360672	938	phistogram->histogram_config__amb_thresh_low = 0xFFFF;
charlesmn	0:3ac96e360672	939	phistogram->histogram_config__amb_thresh_high = 0xFFFF;
charlesmn	0:3ac96e360672	940
charlesmn	0:3ac96e360672	941	phistogram->histogram_config__spad_array_selection = 0x00;
charlesmn	0:3ac96e360672	942
charlesmn	0:3ac96e360672	943
charlesmn	0:3ac96e360672	944	pzone_cfg->max_zones = VL53L1_MAX_USER_ZONES;
charlesmn	0:3ac96e360672	945	pzone_cfg->active_zones = 0x00;
charlesmn	0:3ac96e360672	946	pzone_cfg->user_zones[0].height = 0x0f;
charlesmn	0:3ac96e360672	947	pzone_cfg->user_zones[0].width = 0x0f;
charlesmn	0:3ac96e360672	948	pzone_cfg->user_zones[0].x_centre = 0x08;
charlesmn	0:3ac96e360672	949	pzone_cfg->user_zones[0].y_centre = 0x08;
charlesmn	0:3ac96e360672	950
charlesmn	0:3ac96e360672	951
charlesmn	0:3ac96e360672	952
charlesmn	0:3ac96e360672	953	pdynamic->system__grouped_parameter_hold_0 = 0x01;
charlesmn	0:3ac96e360672	954
charlesmn	0:3ac96e360672	955	pdynamic->system__thresh_high = 0x0000;
charlesmn	0:3ac96e360672	956	pdynamic->system__thresh_low = 0x0000;
charlesmn	0:3ac96e360672	957	pdynamic->system__enable_xtalk_per_quadrant = 0x00;
charlesmn	0:3ac96e360672	958	pdynamic->system__seed_config =
charlesmn	0:3ac96e360672	959	ptuning_parms->tp_lite_seed_cfg;
charlesmn	0:3ac96e360672	960
charlesmn	0:3ac96e360672	961
charlesmn	0:3ac96e360672	962	pdynamic->sd_config__woi_sd0 = 0x0B;
charlesmn	0:3ac96e360672	963
charlesmn	0:3ac96e360672	964	pdynamic->sd_config__woi_sd1 = 0x09;
charlesmn	0:3ac96e360672	965
charlesmn	0:3ac96e360672	966	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	967	ptuning_parms->tp_init_phase_rtn_lite_med;
charlesmn	0:3ac96e360672	968	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	969	ptuning_parms->tp_init_phase_ref_lite_med;
charlesmn	0:3ac96e360672	970
charlesmn	0:3ac96e360672	971	pdynamic->system__grouped_parameter_hold_1 = 0x01;
charlesmn	0:3ac96e360672	972
charlesmn	0:3ac96e360672	973
charlesmn	0:3ac96e360672	974
charlesmn	0:3ac96e360672	975	pdynamic->sd_config__first_order_select =
charlesmn	0:3ac96e360672	976	ptuning_parms->tp_lite_first_order_select;
charlesmn	0:3ac96e360672	977	pdynamic->sd_config__quantifier =
charlesmn	0:3ac96e360672	978	ptuning_parms->tp_lite_quantifier;
charlesmn	0:3ac96e360672	979
charlesmn	0:3ac96e360672	980
charlesmn	0:3ac96e360672	981	pdynamic->roi_config__user_roi_centre_spad = 0xC7;
charlesmn	0:3ac96e360672	982
charlesmn	0:3ac96e360672	983	pdynamic->roi_config__user_roi_requested_global_xy_size = 0xFF;
charlesmn	0:3ac96e360672	984
charlesmn	0:3ac96e360672	985
charlesmn	0:3ac96e360672	986	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	987	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	988	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	989	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	990	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	991	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	992	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	993
charlesmn	0:3ac96e360672	994	pdynamic->system__grouped_parameter_hold = 0x02;
charlesmn	0:3ac96e360672	995
charlesmn	0:3ac96e360672	996
charlesmn	0:3ac96e360672	997
charlesmn	0:3ac96e360672	998
charlesmn	0:3ac96e360672	999	psystem->system__stream_count_ctrl = 0x00;
charlesmn	0:3ac96e360672	1000	psystem->firmware__enable = 0x01;
charlesmn	0:3ac96e360672	1001	psystem->system__interrupt_clear =
charlesmn	0:3ac96e360672	1002	VL53L1_CLEAR_RANGE_INT;
charlesmn	0:3ac96e360672	1003
charlesmn	0:3ac96e360672	1004	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1005	VL53L1_DEVICESCHEDULERMODE_STREAMING \|
charlesmn	0:3ac96e360672	1006	VL53L1_DEVICEREADOUTMODE_SINGLE_SD \|
charlesmn	0:3ac96e360672	1007	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	1008
charlesmn	0:3ac96e360672	1009	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1010
charlesmn	0:3ac96e360672	1011	return status;
charlesmn	0:3ac96e360672	1012	}
charlesmn	0:3ac96e360672	1013
charlesmn	0:3ac96e360672	1014
charlesmn	0:3ac96e360672	1015	VL53L1_Error VL53L1_preset_mode_standard_ranging_short_range(
charlesmn	0:3ac96e360672	1016	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1017	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1018	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1019	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1020	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1021	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1022	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1023	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1024	{
charlesmn	0:3ac96e360672	1025
charlesmn	0:3ac96e360672	1026
charlesmn	0:3ac96e360672	1027	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1028
charlesmn	0:3ac96e360672	1029	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1030
charlesmn	0:3ac96e360672	1031
charlesmn	0:3ac96e360672	1032
charlesmn	0:3ac96e360672	1033	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1034	pstatic,
charlesmn	0:3ac96e360672	1035	phistogram,
charlesmn	0:3ac96e360672	1036	pgeneral,
charlesmn	0:3ac96e360672	1037	ptiming,
charlesmn	0:3ac96e360672	1038	pdynamic,
charlesmn	0:3ac96e360672	1039	psystem,
charlesmn	0:3ac96e360672	1040	ptuning_parms,
charlesmn	0:3ac96e360672	1041	pzone_cfg);
charlesmn	0:3ac96e360672	1042
charlesmn	0:3ac96e360672	1043
charlesmn	0:3ac96e360672	1044
charlesmn	0:3ac96e360672	1045	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1046
charlesmn	0:3ac96e360672	1047
charlesmn	0:3ac96e360672	1048
charlesmn	0:3ac96e360672	1049	ptiming->range_config__vcsel_period_a = 0x07;
charlesmn	0:3ac96e360672	1050	ptiming->range_config__vcsel_period_b = 0x05;
charlesmn	0:3ac96e360672	1051	ptiming->range_config__sigma_thresh =
charlesmn	0:3ac96e360672	1052	ptuning_parms->tp_lite_short_sigma_thresh_mm;
charlesmn	0:3ac96e360672	1053	ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn	0:3ac96e360672	1054	ptuning_parms->tp_lite_short_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	1055	ptiming->range_config__valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	1056	ptiming->range_config__valid_phase_high = 0x38;
charlesmn	0:3ac96e360672	1057
charlesmn	0:3ac96e360672	1058
charlesmn	0:3ac96e360672	1059
charlesmn	0:3ac96e360672	1060	pdynamic->sd_config__woi_sd0 = 0x07;
charlesmn	0:3ac96e360672	1061	pdynamic->sd_config__woi_sd1 = 0x05;
charlesmn	0:3ac96e360672	1062	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	1063	ptuning_parms->tp_init_phase_rtn_lite_short;
charlesmn	0:3ac96e360672	1064	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	1065	ptuning_parms->tp_init_phase_ref_lite_short;
charlesmn	0:3ac96e360672	1066	}
charlesmn	0:3ac96e360672	1067
charlesmn	0:3ac96e360672	1068	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1069
charlesmn	0:3ac96e360672	1070	return status;
charlesmn	0:3ac96e360672	1071	}
charlesmn	0:3ac96e360672	1072
charlesmn	0:3ac96e360672	1073
charlesmn	0:3ac96e360672	1074	VL53L1_Error VL53L1_preset_mode_standard_ranging_long_range(
charlesmn	0:3ac96e360672	1075	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1076	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1077	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1078	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1079	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1080	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1081	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1082	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1083	{
charlesmn	0:3ac96e360672	1084
charlesmn	0:3ac96e360672	1085
charlesmn	0:3ac96e360672	1086	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1087
charlesmn	0:3ac96e360672	1088	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1089
charlesmn	0:3ac96e360672	1090
charlesmn	0:3ac96e360672	1091
charlesmn	0:3ac96e360672	1092	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1093	pstatic,
charlesmn	0:3ac96e360672	1094	phistogram,
charlesmn	0:3ac96e360672	1095	pgeneral,
charlesmn	0:3ac96e360672	1096	ptiming,
charlesmn	0:3ac96e360672	1097	pdynamic,
charlesmn	0:3ac96e360672	1098	psystem,
charlesmn	0:3ac96e360672	1099	ptuning_parms,
charlesmn	0:3ac96e360672	1100	pzone_cfg);
charlesmn	0:3ac96e360672	1101
charlesmn	0:3ac96e360672	1102
charlesmn	0:3ac96e360672	1103
charlesmn	0:3ac96e360672	1104	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1105
charlesmn	0:3ac96e360672	1106
charlesmn	0:3ac96e360672	1107
charlesmn	0:3ac96e360672	1108	ptiming->range_config__vcsel_period_a = 0x0F;
charlesmn	0:3ac96e360672	1109	ptiming->range_config__vcsel_period_b = 0x0D;
charlesmn	0:3ac96e360672	1110	ptiming->range_config__sigma_thresh =
charlesmn	0:3ac96e360672	1111	ptuning_parms->tp_lite_long_sigma_thresh_mm;
charlesmn	0:3ac96e360672	1112	ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn	0:3ac96e360672	1113	ptuning_parms->tp_lite_long_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	1114	ptiming->range_config__valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	1115	ptiming->range_config__valid_phase_high = 0xB8;
charlesmn	0:3ac96e360672	1116
charlesmn	0:3ac96e360672	1117
charlesmn	0:3ac96e360672	1118
charlesmn	0:3ac96e360672	1119	pdynamic->sd_config__woi_sd0 = 0x0F;
charlesmn	0:3ac96e360672	1120	pdynamic->sd_config__woi_sd1 = 0x0D;
charlesmn	0:3ac96e360672	1121	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	1122	ptuning_parms->tp_init_phase_rtn_lite_long;
charlesmn	0:3ac96e360672	1123	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	1124	ptuning_parms->tp_init_phase_ref_lite_long;
charlesmn	0:3ac96e360672	1125	}
charlesmn	0:3ac96e360672	1126
charlesmn	0:3ac96e360672	1127	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1128
charlesmn	0:3ac96e360672	1129	return status;
charlesmn	0:3ac96e360672	1130	}
charlesmn	0:3ac96e360672	1131
charlesmn	0:3ac96e360672	1132
charlesmn	0:3ac96e360672	1133	VL53L1_Error VL53L1_preset_mode_standard_ranging_mm1_cal(
charlesmn	0:3ac96e360672	1134	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1135	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1136	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1137	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1138	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1139	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1140	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1141	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1142	{
charlesmn	0:3ac96e360672	1143
charlesmn	0:3ac96e360672	1144
charlesmn	0:3ac96e360672	1145	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1146
charlesmn	0:3ac96e360672	1147	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1148
charlesmn	0:3ac96e360672	1149
charlesmn	0:3ac96e360672	1150
charlesmn	0:3ac96e360672	1151	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1152	pstatic,
charlesmn	0:3ac96e360672	1153	phistogram,
charlesmn	0:3ac96e360672	1154	pgeneral,
charlesmn	0:3ac96e360672	1155	ptiming,
charlesmn	0:3ac96e360672	1156	pdynamic,
charlesmn	0:3ac96e360672	1157	psystem,
charlesmn	0:3ac96e360672	1158	ptuning_parms,
charlesmn	0:3ac96e360672	1159	pzone_cfg);
charlesmn	0:3ac96e360672	1160
charlesmn	0:3ac96e360672	1161
charlesmn	0:3ac96e360672	1162
charlesmn	0:3ac96e360672	1163	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1164
charlesmn	0:3ac96e360672	1165	pgeneral->dss_config__roi_mode_control =
charlesmn	0:3ac96e360672	1166	VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
charlesmn	0:3ac96e360672	1167
charlesmn	0:3ac96e360672	1168	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1169	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	1170	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	1171	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	1172	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	1173	VL53L1_SEQUENCE_MM1_EN;
charlesmn	0:3ac96e360672	1174	}
charlesmn	0:3ac96e360672	1175
charlesmn	0:3ac96e360672	1176	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1177
charlesmn	0:3ac96e360672	1178	return status;
charlesmn	0:3ac96e360672	1179	}
charlesmn	0:3ac96e360672	1180
charlesmn	0:3ac96e360672	1181
charlesmn	0:3ac96e360672	1182	VL53L1_Error VL53L1_preset_mode_standard_ranging_mm2_cal(
charlesmn	0:3ac96e360672	1183	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1184	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1185	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1186	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1187	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1188	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1189	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1190	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1191	{
charlesmn	0:3ac96e360672	1192
charlesmn	0:3ac96e360672	1193
charlesmn	0:3ac96e360672	1194	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1195
charlesmn	0:3ac96e360672	1196	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1197
charlesmn	0:3ac96e360672	1198
charlesmn	0:3ac96e360672	1199
charlesmn	0:3ac96e360672	1200	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1201	pstatic,
charlesmn	0:3ac96e360672	1202	phistogram,
charlesmn	0:3ac96e360672	1203	pgeneral,
charlesmn	0:3ac96e360672	1204	ptiming,
charlesmn	0:3ac96e360672	1205	pdynamic,
charlesmn	0:3ac96e360672	1206	psystem,
charlesmn	0:3ac96e360672	1207	ptuning_parms,
charlesmn	0:3ac96e360672	1208	pzone_cfg);
charlesmn	0:3ac96e360672	1209
charlesmn	0:3ac96e360672	1210
charlesmn	0:3ac96e360672	1211
charlesmn	0:3ac96e360672	1212	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1213
charlesmn	0:3ac96e360672	1214	pgeneral->dss_config__roi_mode_control =
charlesmn	0:3ac96e360672	1215	VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
charlesmn	0:3ac96e360672	1216
charlesmn	0:3ac96e360672	1217	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1218	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	1219	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	1220	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	1221	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	1222	VL53L1_SEQUENCE_MM2_EN;
charlesmn	0:3ac96e360672	1223	}
charlesmn	0:3ac96e360672	1224
charlesmn	0:3ac96e360672	1225	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1226
charlesmn	0:3ac96e360672	1227	return status;
charlesmn	0:3ac96e360672	1228	}
charlesmn	0:3ac96e360672	1229
charlesmn	0:3ac96e360672	1230
charlesmn	0:3ac96e360672	1231	VL53L1_Error VL53L1_preset_mode_timed_ranging(
charlesmn	0:3ac96e360672	1232
charlesmn	0:3ac96e360672	1233	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1234	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1235	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1236	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1237	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1238	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1239	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1240	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1241	{
charlesmn	0:3ac96e360672	1242
charlesmn	0:3ac96e360672	1243
charlesmn	0:3ac96e360672	1244	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1245
charlesmn	0:3ac96e360672	1246	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1247
charlesmn	0:3ac96e360672	1248
charlesmn	0:3ac96e360672	1249
charlesmn	0:3ac96e360672	1250	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1251	pstatic,
charlesmn	0:3ac96e360672	1252	phistogram,
charlesmn	0:3ac96e360672	1253	pgeneral,
charlesmn	0:3ac96e360672	1254	ptiming,
charlesmn	0:3ac96e360672	1255	pdynamic,
charlesmn	0:3ac96e360672	1256	psystem,
charlesmn	0:3ac96e360672	1257	ptuning_parms,
charlesmn	0:3ac96e360672	1258	pzone_cfg);
charlesmn	0:3ac96e360672	1259
charlesmn	0:3ac96e360672	1260
charlesmn	0:3ac96e360672	1261
charlesmn	0:3ac96e360672	1262	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1263
charlesmn	0:3ac96e360672	1264
charlesmn	0:3ac96e360672	1265
charlesmn	0:3ac96e360672	1266
charlesmn	0:3ac96e360672	1267	pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn	0:3ac96e360672	1268
charlesmn	0:3ac96e360672	1269
charlesmn	0:3ac96e360672	1270	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	1271	ptiming->range_config__timeout_macrop_a_lo = 0xB1;
charlesmn	0:3ac96e360672	1272
charlesmn	0:3ac96e360672	1273	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	1274	ptiming->range_config__timeout_macrop_b_lo = 0xD4;
charlesmn	0:3ac96e360672	1275
charlesmn	0:3ac96e360672	1276
charlesmn	0:3ac96e360672	1277
charlesmn	0:3ac96e360672	1278	ptiming->system__intermeasurement_period = 0x00000600;
charlesmn	0:3ac96e360672	1279	pdynamic->system__seed_config =
charlesmn	0:3ac96e360672	1280	ptuning_parms->tp_timed_seed_cfg;
charlesmn	0:3ac96e360672	1281
charlesmn	0:3ac96e360672	1282
charlesmn	0:3ac96e360672	1283
charlesmn	0:3ac96e360672	1284
charlesmn	0:3ac96e360672	1285	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1286	VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO \|
charlesmn	0:3ac96e360672	1287	VL53L1_DEVICEREADOUTMODE_SINGLE_SD \|
charlesmn	0:3ac96e360672	1288	VL53L1_DEVICEMEASUREMENTMODE_TIMED;
charlesmn	0:3ac96e360672	1289	}
charlesmn	0:3ac96e360672	1290
charlesmn	0:3ac96e360672	1291	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1292
charlesmn	0:3ac96e360672	1293	return status;
charlesmn	0:3ac96e360672	1294	}
charlesmn	0:3ac96e360672	1295
charlesmn	0:3ac96e360672	1296	VL53L1_Error VL53L1_preset_mode_timed_ranging_short_range(
charlesmn	0:3ac96e360672	1297
charlesmn	0:3ac96e360672	1298	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1299	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1300	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1301	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1302	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1303	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1304	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1305	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1306	{
charlesmn	0:3ac96e360672	1307
charlesmn	0:3ac96e360672	1308
charlesmn	0:3ac96e360672	1309	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1310
charlesmn	0:3ac96e360672	1311	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1312
charlesmn	0:3ac96e360672	1313
charlesmn	0:3ac96e360672	1314
charlesmn	0:3ac96e360672	1315	status = VL53L1_preset_mode_standard_ranging_short_range(
charlesmn	0:3ac96e360672	1316	pstatic,
charlesmn	0:3ac96e360672	1317	phistogram,
charlesmn	0:3ac96e360672	1318	pgeneral,
charlesmn	0:3ac96e360672	1319	ptiming,
charlesmn	0:3ac96e360672	1320	pdynamic,
charlesmn	0:3ac96e360672	1321	psystem,
charlesmn	0:3ac96e360672	1322	ptuning_parms,
charlesmn	0:3ac96e360672	1323	pzone_cfg);
charlesmn	0:3ac96e360672	1324
charlesmn	0:3ac96e360672	1325
charlesmn	0:3ac96e360672	1326
charlesmn	0:3ac96e360672	1327	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1328
charlesmn	0:3ac96e360672	1329
charlesmn	0:3ac96e360672	1330
charlesmn	0:3ac96e360672	1331
charlesmn	0:3ac96e360672	1332	pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn	0:3ac96e360672	1333
charlesmn	0:3ac96e360672	1334
charlesmn	0:3ac96e360672	1335
charlesmn	0:3ac96e360672	1336
charlesmn	0:3ac96e360672	1337
charlesmn	0:3ac96e360672	1338	ptiming->range_config__timeout_macrop_a_hi = 0x01;
charlesmn	0:3ac96e360672	1339	ptiming->range_config__timeout_macrop_a_lo = 0x84;
charlesmn	0:3ac96e360672	1340
charlesmn	0:3ac96e360672	1341	ptiming->range_config__timeout_macrop_b_hi = 0x01;
charlesmn	0:3ac96e360672	1342	ptiming->range_config__timeout_macrop_b_lo = 0xB1;
charlesmn	0:3ac96e360672	1343
charlesmn	0:3ac96e360672	1344	ptiming->system__intermeasurement_period = 0x00000600;
charlesmn	0:3ac96e360672	1345	pdynamic->system__seed_config =
charlesmn	0:3ac96e360672	1346	ptuning_parms->tp_timed_seed_cfg;
charlesmn	0:3ac96e360672	1347
charlesmn	0:3ac96e360672	1348
charlesmn	0:3ac96e360672	1349
charlesmn	0:3ac96e360672	1350
charlesmn	0:3ac96e360672	1351	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1352	VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO \|
charlesmn	0:3ac96e360672	1353	VL53L1_DEVICEREADOUTMODE_SINGLE_SD \|
charlesmn	0:3ac96e360672	1354	VL53L1_DEVICEMEASUREMENTMODE_TIMED;
charlesmn	0:3ac96e360672	1355	}
charlesmn	0:3ac96e360672	1356
charlesmn	0:3ac96e360672	1357	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1358
charlesmn	0:3ac96e360672	1359	return status;
charlesmn	0:3ac96e360672	1360	}
charlesmn	0:3ac96e360672	1361
charlesmn	0:3ac96e360672	1362	VL53L1_Error VL53L1_preset_mode_timed_ranging_long_range(
charlesmn	0:3ac96e360672	1363
charlesmn	0:3ac96e360672	1364	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1365	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1366	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1367	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1368	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1369	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1370	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1371	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1372	{
charlesmn	0:3ac96e360672	1373
charlesmn	0:3ac96e360672	1374
charlesmn	0:3ac96e360672	1375	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1376
charlesmn	0:3ac96e360672	1377	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1378
charlesmn	0:3ac96e360672	1379
charlesmn	0:3ac96e360672	1380
charlesmn	0:3ac96e360672	1381	status = VL53L1_preset_mode_standard_ranging_long_range(
charlesmn	0:3ac96e360672	1382	pstatic,
charlesmn	0:3ac96e360672	1383	phistogram,
charlesmn	0:3ac96e360672	1384	pgeneral,
charlesmn	0:3ac96e360672	1385	ptiming,
charlesmn	0:3ac96e360672	1386	pdynamic,
charlesmn	0:3ac96e360672	1387	psystem,
charlesmn	0:3ac96e360672	1388	ptuning_parms,
charlesmn	0:3ac96e360672	1389	pzone_cfg);
charlesmn	0:3ac96e360672	1390
charlesmn	0:3ac96e360672	1391
charlesmn	0:3ac96e360672	1392
charlesmn	0:3ac96e360672	1393	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1394
charlesmn	0:3ac96e360672	1395
charlesmn	0:3ac96e360672	1396
charlesmn	0:3ac96e360672	1397
charlesmn	0:3ac96e360672	1398	pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn	0:3ac96e360672	1399
charlesmn	0:3ac96e360672	1400
charlesmn	0:3ac96e360672	1401
charlesmn	0:3ac96e360672	1402
charlesmn	0:3ac96e360672	1403
charlesmn	0:3ac96e360672	1404	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	1405	ptiming->range_config__timeout_macrop_a_lo = 0x97;
charlesmn	0:3ac96e360672	1406
charlesmn	0:3ac96e360672	1407	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	1408	ptiming->range_config__timeout_macrop_b_lo = 0xB1;
charlesmn	0:3ac96e360672	1409
charlesmn	0:3ac96e360672	1410	ptiming->system__intermeasurement_period = 0x00000600;
charlesmn	0:3ac96e360672	1411	pdynamic->system__seed_config =
charlesmn	0:3ac96e360672	1412	ptuning_parms->tp_timed_seed_cfg;
charlesmn	0:3ac96e360672	1413
charlesmn	0:3ac96e360672	1414
charlesmn	0:3ac96e360672	1415
charlesmn	0:3ac96e360672	1416
charlesmn	0:3ac96e360672	1417	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1418	VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO \|
charlesmn	0:3ac96e360672	1419	VL53L1_DEVICEREADOUTMODE_SINGLE_SD \|
charlesmn	0:3ac96e360672	1420	VL53L1_DEVICEMEASUREMENTMODE_TIMED;
charlesmn	0:3ac96e360672	1421	}
charlesmn	0:3ac96e360672	1422
charlesmn	0:3ac96e360672	1423	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1424
charlesmn	0:3ac96e360672	1425	return status;
charlesmn	0:3ac96e360672	1426	}
charlesmn	0:3ac96e360672	1427
charlesmn	0:3ac96e360672	1428
charlesmn	0:3ac96e360672	1429	VL53L1_Error VL53L1_preset_mode_low_power_auto_ranging(
charlesmn	0:3ac96e360672	1430
charlesmn	0:3ac96e360672	1431	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1432	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1433	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1434	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1435	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1436	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1437	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1438	VL53L1_zone_config_t *pzone_cfg,
charlesmn	0:3ac96e360672	1439	VL53L1_low_power_auto_data_t *plpadata)
charlesmn	0:3ac96e360672	1440	{
charlesmn	0:3ac96e360672	1441
charlesmn	0:3ac96e360672	1442
charlesmn	0:3ac96e360672	1443	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1444
charlesmn	0:3ac96e360672	1445	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1446
charlesmn	0:3ac96e360672	1447
charlesmn	0:3ac96e360672	1448
charlesmn	0:3ac96e360672	1449	status = VL53L1_preset_mode_timed_ranging(
charlesmn	0:3ac96e360672	1450	pstatic,
charlesmn	0:3ac96e360672	1451	phistogram,
charlesmn	0:3ac96e360672	1452	pgeneral,
charlesmn	0:3ac96e360672	1453	ptiming,
charlesmn	0:3ac96e360672	1454	pdynamic,
charlesmn	0:3ac96e360672	1455	psystem,
charlesmn	0:3ac96e360672	1456	ptuning_parms,
charlesmn	0:3ac96e360672	1457	pzone_cfg);
charlesmn	0:3ac96e360672	1458
charlesmn	0:3ac96e360672	1459
charlesmn	0:3ac96e360672	1460
charlesmn	0:3ac96e360672	1461	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1462	status = VL53L1_config_low_power_auto_mode(
charlesmn	0:3ac96e360672	1463	pgeneral,
charlesmn	0:3ac96e360672	1464	pdynamic,
charlesmn	0:3ac96e360672	1465	plpadata
charlesmn	0:3ac96e360672	1466	);
charlesmn	0:3ac96e360672	1467	}
charlesmn	0:3ac96e360672	1468
charlesmn	0:3ac96e360672	1469	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1470
charlesmn	0:3ac96e360672	1471	return status;
charlesmn	0:3ac96e360672	1472	}
charlesmn	0:3ac96e360672	1473
charlesmn	0:3ac96e360672	1474	VL53L1_Error VL53L1_preset_mode_low_power_auto_short_ranging(
charlesmn	0:3ac96e360672	1475
charlesmn	0:3ac96e360672	1476	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1477	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1478	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1479	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1480	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1481	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1482	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1483	VL53L1_zone_config_t *pzone_cfg,
charlesmn	0:3ac96e360672	1484	VL53L1_low_power_auto_data_t *plpadata)
charlesmn	0:3ac96e360672	1485	{
charlesmn	0:3ac96e360672	1486
charlesmn	0:3ac96e360672	1487
charlesmn	0:3ac96e360672	1488	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1489
charlesmn	0:3ac96e360672	1490	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1491
charlesmn	0:3ac96e360672	1492
charlesmn	0:3ac96e360672	1493
charlesmn	0:3ac96e360672	1494	status = VL53L1_preset_mode_timed_ranging_short_range(
charlesmn	0:3ac96e360672	1495	pstatic,
charlesmn	0:3ac96e360672	1496	phistogram,
charlesmn	0:3ac96e360672	1497	pgeneral,
charlesmn	0:3ac96e360672	1498	ptiming,
charlesmn	0:3ac96e360672	1499	pdynamic,
charlesmn	0:3ac96e360672	1500	psystem,
charlesmn	0:3ac96e360672	1501	ptuning_parms,
charlesmn	0:3ac96e360672	1502	pzone_cfg);
charlesmn	0:3ac96e360672	1503
charlesmn	0:3ac96e360672	1504
charlesmn	0:3ac96e360672	1505
charlesmn	0:3ac96e360672	1506	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1507	status = VL53L1_config_low_power_auto_mode(
charlesmn	0:3ac96e360672	1508	pgeneral,
charlesmn	0:3ac96e360672	1509	pdynamic,
charlesmn	0:3ac96e360672	1510	plpadata
charlesmn	0:3ac96e360672	1511	);
charlesmn	0:3ac96e360672	1512	}
charlesmn	0:3ac96e360672	1513
charlesmn	0:3ac96e360672	1514	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1515
charlesmn	0:3ac96e360672	1516	return status;
charlesmn	0:3ac96e360672	1517	}
charlesmn	0:3ac96e360672	1518
charlesmn	0:3ac96e360672	1519	VL53L1_Error VL53L1_preset_mode_low_power_auto_long_ranging(
charlesmn	0:3ac96e360672	1520
charlesmn	0:3ac96e360672	1521	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1522	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1523	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1524	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1525	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1526	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1527	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1528	VL53L1_zone_config_t *pzone_cfg,
charlesmn	0:3ac96e360672	1529	VL53L1_low_power_auto_data_t *plpadata)
charlesmn	0:3ac96e360672	1530	{
charlesmn	0:3ac96e360672	1531
charlesmn	0:3ac96e360672	1532
charlesmn	0:3ac96e360672	1533	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1534
charlesmn	0:3ac96e360672	1535	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1536
charlesmn	0:3ac96e360672	1537
charlesmn	0:3ac96e360672	1538
charlesmn	0:3ac96e360672	1539	status = VL53L1_preset_mode_timed_ranging_long_range(
charlesmn	0:3ac96e360672	1540	pstatic,
charlesmn	0:3ac96e360672	1541	phistogram,
charlesmn	0:3ac96e360672	1542	pgeneral,
charlesmn	0:3ac96e360672	1543	ptiming,
charlesmn	0:3ac96e360672	1544	pdynamic,
charlesmn	0:3ac96e360672	1545	psystem,
charlesmn	0:3ac96e360672	1546	ptuning_parms,
charlesmn	0:3ac96e360672	1547	pzone_cfg);
charlesmn	0:3ac96e360672	1548
charlesmn	0:3ac96e360672	1549
charlesmn	0:3ac96e360672	1550
charlesmn	0:3ac96e360672	1551	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1552	status = VL53L1_config_low_power_auto_mode(
charlesmn	0:3ac96e360672	1553	pgeneral,
charlesmn	0:3ac96e360672	1554	pdynamic,
charlesmn	0:3ac96e360672	1555	plpadata
charlesmn	0:3ac96e360672	1556	);
charlesmn	0:3ac96e360672	1557	}
charlesmn	0:3ac96e360672	1558
charlesmn	0:3ac96e360672	1559	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1560
charlesmn	0:3ac96e360672	1561	return status;
charlesmn	0:3ac96e360672	1562	}
charlesmn	0:3ac96e360672	1563
charlesmn	0:3ac96e360672	1564
charlesmn	0:3ac96e360672	1565
charlesmn	0:3ac96e360672	1566	VL53L1_Error VL53L1_preset_mode_singleshot_ranging(
charlesmn	0:3ac96e360672	1567
charlesmn	0:3ac96e360672	1568	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1569	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1570	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1571	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1572	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1573	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1574	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1575	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1576	{
charlesmn	0:3ac96e360672	1577
charlesmn	0:3ac96e360672	1578
charlesmn	0:3ac96e360672	1579	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1580
charlesmn	0:3ac96e360672	1581	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1582
charlesmn	0:3ac96e360672	1583
charlesmn	0:3ac96e360672	1584
charlesmn	0:3ac96e360672	1585	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1586	pstatic,
charlesmn	0:3ac96e360672	1587	phistogram,
charlesmn	0:3ac96e360672	1588	pgeneral,
charlesmn	0:3ac96e360672	1589	ptiming,
charlesmn	0:3ac96e360672	1590	pdynamic,
charlesmn	0:3ac96e360672	1591	psystem,
charlesmn	0:3ac96e360672	1592	ptuning_parms,
charlesmn	0:3ac96e360672	1593	pzone_cfg);
charlesmn	0:3ac96e360672	1594
charlesmn	0:3ac96e360672	1595
charlesmn	0:3ac96e360672	1596
charlesmn	0:3ac96e360672	1597	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1598
charlesmn	0:3ac96e360672	1599
charlesmn	0:3ac96e360672	1600
charlesmn	0:3ac96e360672	1601
charlesmn	0:3ac96e360672	1602	pdynamic->system__grouped_parameter_hold = 0x00;
charlesmn	0:3ac96e360672	1603
charlesmn	0:3ac96e360672	1604
charlesmn	0:3ac96e360672	1605
charlesmn	0:3ac96e360672	1606
charlesmn	0:3ac96e360672	1607	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	1608	ptiming->range_config__timeout_macrop_a_lo = 0xB1;
charlesmn	0:3ac96e360672	1609
charlesmn	0:3ac96e360672	1610	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	1611	ptiming->range_config__timeout_macrop_b_lo = 0xD4;
charlesmn	0:3ac96e360672	1612
charlesmn	0:3ac96e360672	1613	pdynamic->system__seed_config =
charlesmn	0:3ac96e360672	1614	ptuning_parms->tp_timed_seed_cfg;
charlesmn	0:3ac96e360672	1615
charlesmn	0:3ac96e360672	1616
charlesmn	0:3ac96e360672	1617
charlesmn	0:3ac96e360672	1618
charlesmn	0:3ac96e360672	1619	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1620	VL53L1_DEVICESCHEDULERMODE_PSEUDO_SOLO \|
charlesmn	0:3ac96e360672	1621	VL53L1_DEVICEREADOUTMODE_SINGLE_SD \|
charlesmn	0:3ac96e360672	1622	VL53L1_DEVICEMEASUREMENTMODE_SINGLESHOT;
charlesmn	0:3ac96e360672	1623	}
charlesmn	0:3ac96e360672	1624
charlesmn	0:3ac96e360672	1625	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1626
charlesmn	0:3ac96e360672	1627	return status;
charlesmn	0:3ac96e360672	1628	}
charlesmn	0:3ac96e360672	1629
charlesmn	0:3ac96e360672	1630
charlesmn	0:3ac96e360672	1631	VL53L1_Error VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	1632	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	1633	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1634	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1635	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1636	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1637	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1638	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1639	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1640	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1641	{
charlesmn	0:3ac96e360672	1642
charlesmn	0:3ac96e360672	1643
charlesmn	0:3ac96e360672	1644	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1645
charlesmn	0:3ac96e360672	1646	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1647
charlesmn	0:3ac96e360672	1648
charlesmn	0:3ac96e360672	1649
charlesmn	0:3ac96e360672	1650	status =
charlesmn	0:3ac96e360672	1651	VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1652	pstatic,
charlesmn	0:3ac96e360672	1653	phistogram,
charlesmn	0:3ac96e360672	1654	pgeneral,
charlesmn	0:3ac96e360672	1655	ptiming,
charlesmn	0:3ac96e360672	1656	pdynamic,
charlesmn	0:3ac96e360672	1657	psystem,
charlesmn	0:3ac96e360672	1658	ptuning_parms,
charlesmn	0:3ac96e360672	1659	pzone_cfg);
charlesmn	0:3ac96e360672	1660
charlesmn	0:3ac96e360672	1661
charlesmn	0:3ac96e360672	1662
charlesmn	0:3ac96e360672	1663	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1664
charlesmn	0:3ac96e360672	1665
charlesmn	0:3ac96e360672	1666
charlesmn	0:3ac96e360672	1667	pstatic->dss_config__target_total_rate_mcps = 0x1400;
charlesmn	0:3ac96e360672	1668
charlesmn	0:3ac96e360672	1669
charlesmn	0:3ac96e360672	1670
charlesmn	0:3ac96e360672	1671	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	1672	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	1673	0, 1, 2, 3, 4, 5,
charlesmn	0:3ac96e360672	1674	phistogram);
charlesmn	0:3ac96e360672	1675
charlesmn	0:3ac96e360672	1676
charlesmn	0:3ac96e360672	1677	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	1678	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	1679	0, 1, 2, 3, 4, 5,
charlesmn	0:3ac96e360672	1680	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	1681
charlesmn	0:3ac96e360672	1682
charlesmn	0:3ac96e360672	1683
charlesmn	0:3ac96e360672	1684
charlesmn	0:3ac96e360672	1685	ptiming->range_config__vcsel_period_a = 0x09;
charlesmn	0:3ac96e360672	1686	ptiming->range_config__vcsel_period_b = 0x0B;
charlesmn	0:3ac96e360672	1687	pdynamic->sd_config__woi_sd0 = 0x09;
charlesmn	0:3ac96e360672	1688	pdynamic->sd_config__woi_sd1 = 0x0B;
charlesmn	0:3ac96e360672	1689
charlesmn	0:3ac96e360672	1690
charlesmn	0:3ac96e360672	1691
charlesmn	0:3ac96e360672	1692
charlesmn	0:3ac96e360672	1693	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	1694	ptiming->mm_config__timeout_macrop_a_lo = 0x20;
charlesmn	0:3ac96e360672	1695	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	1696	ptiming->mm_config__timeout_macrop_b_lo = 0x1A;
charlesmn	0:3ac96e360672	1697
charlesmn	0:3ac96e360672	1698
charlesmn	0:3ac96e360672	1699	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	1700	ptiming->range_config__timeout_macrop_a_lo = 0x28;
charlesmn	0:3ac96e360672	1701
charlesmn	0:3ac96e360672	1702
charlesmn	0:3ac96e360672	1703	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	1704	ptiming->range_config__timeout_macrop_b_lo = 0x21;
charlesmn	0:3ac96e360672	1705
charlesmn	0:3ac96e360672	1706
charlesmn	0:3ac96e360672	1707	pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn	0:3ac96e360672	1708
charlesmn	0:3ac96e360672	1709
charlesmn	0:3ac96e360672	1710
charlesmn	0:3ac96e360672	1711	phistpostprocess->valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	1712	phistpostprocess->valid_phase_high = 0x88;
charlesmn	0:3ac96e360672	1713
charlesmn	0:3ac96e360672	1714
charlesmn	0:3ac96e360672	1715
charlesmn	0:3ac96e360672	1716	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	1717	phistogram,
charlesmn	0:3ac96e360672	1718	pstatic,
charlesmn	0:3ac96e360672	1719	pgeneral,
charlesmn	0:3ac96e360672	1720	ptiming,
charlesmn	0:3ac96e360672	1721	pdynamic);
charlesmn	0:3ac96e360672	1722
charlesmn	0:3ac96e360672	1723
charlesmn	0:3ac96e360672	1724
charlesmn	0:3ac96e360672	1725
charlesmn	0:3ac96e360672	1726	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1727	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	1728	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	1729	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	1730	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	1731
charlesmn	0:3ac96e360672	1732
charlesmn	0:3ac96e360672	1733	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	1734
charlesmn	0:3ac96e360672	1735
charlesmn	0:3ac96e360672	1736
charlesmn	0:3ac96e360672	1737
charlesmn	0:3ac96e360672	1738	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1739	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	1740	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	1741	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	1742	}
charlesmn	0:3ac96e360672	1743
charlesmn	0:3ac96e360672	1744	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1745
charlesmn	0:3ac96e360672	1746	return status;
charlesmn	0:3ac96e360672	1747	}
charlesmn	0:3ac96e360672	1748
charlesmn	0:3ac96e360672	1749
charlesmn	0:3ac96e360672	1750	VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn	0:3ac96e360672	1751	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	1752	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1753	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1754	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1755	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1756	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1757	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1758	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1759	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1760	{
charlesmn	0:3ac96e360672	1761
charlesmn	0:3ac96e360672	1762
charlesmn	0:3ac96e360672	1763	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1764
charlesmn	0:3ac96e360672	1765	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1766
charlesmn	0:3ac96e360672	1767
charlesmn	0:3ac96e360672	1768
charlesmn	0:3ac96e360672	1769	status =
charlesmn	0:3ac96e360672	1770	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	1771	phistpostprocess,
charlesmn	0:3ac96e360672	1772	pstatic,
charlesmn	0:3ac96e360672	1773	phistogram,
charlesmn	0:3ac96e360672	1774	pgeneral,
charlesmn	0:3ac96e360672	1775	ptiming,
charlesmn	0:3ac96e360672	1776	pdynamic,
charlesmn	0:3ac96e360672	1777	psystem,
charlesmn	0:3ac96e360672	1778	ptuning_parms,
charlesmn	0:3ac96e360672	1779	pzone_cfg);
charlesmn	0:3ac96e360672	1780
charlesmn	0:3ac96e360672	1781
charlesmn	0:3ac96e360672	1782
charlesmn	0:3ac96e360672	1783	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1784
charlesmn	0:3ac96e360672	1785
charlesmn	0:3ac96e360672	1786
charlesmn	0:3ac96e360672	1787	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	1788	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	1789	8+0, 8+1, 8+2, 3, 4, 5,
charlesmn	0:3ac96e360672	1790	phistogram);
charlesmn	0:3ac96e360672	1791
charlesmn	0:3ac96e360672	1792
charlesmn	0:3ac96e360672	1793	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	1794	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	1795	8+0, 8+1, 8+2, 3, 4, 5,
charlesmn	0:3ac96e360672	1796	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	1797
charlesmn	0:3ac96e360672	1798
charlesmn	0:3ac96e360672	1799
charlesmn	0:3ac96e360672	1800	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	1801	phistogram,
charlesmn	0:3ac96e360672	1802	pstatic,
charlesmn	0:3ac96e360672	1803	pgeneral,
charlesmn	0:3ac96e360672	1804	ptiming,
charlesmn	0:3ac96e360672	1805	pdynamic);
charlesmn	0:3ac96e360672	1806
charlesmn	0:3ac96e360672	1807
charlesmn	0:3ac96e360672	1808
charlesmn	0:3ac96e360672	1809	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1810	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	1811	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	1812	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	1813	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	1814	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	1815	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	1816
charlesmn	0:3ac96e360672	1817
charlesmn	0:3ac96e360672	1818
charlesmn	0:3ac96e360672	1819	psystem->system__mode_start =
charlesmn	0:3ac96e360672	1820	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	1821	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	1822	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	1823	}
charlesmn	0:3ac96e360672	1824
charlesmn	0:3ac96e360672	1825	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1826
charlesmn	0:3ac96e360672	1827	return status;
charlesmn	0:3ac96e360672	1828	}
charlesmn	0:3ac96e360672	1829
charlesmn	0:3ac96e360672	1830
charlesmn	0:3ac96e360672	1831	VL53L1_Error VL53L1_preset_mode_histogram_ranging_with_mm2(
charlesmn	0:3ac96e360672	1832	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	1833	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1834	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1835	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1836	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1837	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1838	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1839	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1840	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1841	{
charlesmn	0:3ac96e360672	1842
charlesmn	0:3ac96e360672	1843
charlesmn	0:3ac96e360672	1844	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1845
charlesmn	0:3ac96e360672	1846	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1847
charlesmn	0:3ac96e360672	1848
charlesmn	0:3ac96e360672	1849
charlesmn	0:3ac96e360672	1850	status =
charlesmn	0:3ac96e360672	1851	VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn	0:3ac96e360672	1852	phistpostprocess,
charlesmn	0:3ac96e360672	1853	pstatic,
charlesmn	0:3ac96e360672	1854	phistogram,
charlesmn	0:3ac96e360672	1855	pgeneral,
charlesmn	0:3ac96e360672	1856	ptiming,
charlesmn	0:3ac96e360672	1857	pdynamic,
charlesmn	0:3ac96e360672	1858	psystem,
charlesmn	0:3ac96e360672	1859	ptuning_parms,
charlesmn	0:3ac96e360672	1860	pzone_cfg);
charlesmn	0:3ac96e360672	1861
charlesmn	0:3ac96e360672	1862
charlesmn	0:3ac96e360672	1863
charlesmn	0:3ac96e360672	1864	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1865
charlesmn	0:3ac96e360672	1866
charlesmn	0:3ac96e360672	1867
charlesmn	0:3ac96e360672	1868	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1869	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	1870	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	1871	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	1872	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	1873	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	1874	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	1875	}
charlesmn	0:3ac96e360672	1876
charlesmn	0:3ac96e360672	1877	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1878
charlesmn	0:3ac96e360672	1879	return status;
charlesmn	0:3ac96e360672	1880	}
charlesmn	0:3ac96e360672	1881
charlesmn	0:3ac96e360672	1882
charlesmn	0:3ac96e360672	1883	VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn	0:3ac96e360672	1884	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	1885	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1886	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1887	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1888	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1889	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1890	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1891	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1892	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1893	{
charlesmn	0:3ac96e360672	1894
charlesmn	0:3ac96e360672	1895
charlesmn	0:3ac96e360672	1896	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1897
charlesmn	0:3ac96e360672	1898	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1899
charlesmn	0:3ac96e360672	1900
charlesmn	0:3ac96e360672	1901
charlesmn	0:3ac96e360672	1902	status =
charlesmn	0:3ac96e360672	1903	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	1904	phistpostprocess,
charlesmn	0:3ac96e360672	1905	pstatic,
charlesmn	0:3ac96e360672	1906	phistogram,
charlesmn	0:3ac96e360672	1907	pgeneral,
charlesmn	0:3ac96e360672	1908	ptiming,
charlesmn	0:3ac96e360672	1909	pdynamic,
charlesmn	0:3ac96e360672	1910	psystem,
charlesmn	0:3ac96e360672	1911	ptuning_parms,
charlesmn	0:3ac96e360672	1912	pzone_cfg);
charlesmn	0:3ac96e360672	1913
charlesmn	0:3ac96e360672	1914
charlesmn	0:3ac96e360672	1915
charlesmn	0:3ac96e360672	1916	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1917
charlesmn	0:3ac96e360672	1918
charlesmn	0:3ac96e360672	1919
charlesmn	0:3ac96e360672	1920	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	1921	7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn	0:3ac96e360672	1922	8+0, 8+1, 8+2, 8+3, 8+4, 8+5,
charlesmn	0:3ac96e360672	1923	phistogram);
charlesmn	0:3ac96e360672	1924
charlesmn	0:3ac96e360672	1925
charlesmn	0:3ac96e360672	1926	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	1927	7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn	0:3ac96e360672	1928	8+0, 8+1, 8+2, 8+3, 8+4, 8+5,
charlesmn	0:3ac96e360672	1929	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	1930
charlesmn	0:3ac96e360672	1931
charlesmn	0:3ac96e360672	1932
charlesmn	0:3ac96e360672	1933	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	1934	phistogram,
charlesmn	0:3ac96e360672	1935	pstatic,
charlesmn	0:3ac96e360672	1936	pgeneral,
charlesmn	0:3ac96e360672	1937	ptiming,
charlesmn	0:3ac96e360672	1938	pdynamic);
charlesmn	0:3ac96e360672	1939
charlesmn	0:3ac96e360672	1940
charlesmn	0:3ac96e360672	1941
charlesmn	0:3ac96e360672	1942	pgeneral->dss_config__roi_mode_control =
charlesmn	0:3ac96e360672	1943	VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS;
charlesmn	0:3ac96e360672	1944
charlesmn	0:3ac96e360672	1945
charlesmn	0:3ac96e360672	1946
charlesmn	0:3ac96e360672	1947	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1948	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	1949	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	1950	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	1951	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	1952	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	1953	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	1954
charlesmn	0:3ac96e360672	1955	}
charlesmn	0:3ac96e360672	1956
charlesmn	0:3ac96e360672	1957	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1958
charlesmn	0:3ac96e360672	1959	return status;
charlesmn	0:3ac96e360672	1960	}
charlesmn	0:3ac96e360672	1961
charlesmn	0:3ac96e360672	1962
charlesmn	0:3ac96e360672	1963	VL53L1_Error VL53L1_preset_mode_histogram_ranging_mm2_cal(
charlesmn	0:3ac96e360672	1964	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	1965	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	1966	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	1967	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	1968	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	1969	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	1970	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	1971	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	1972	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1973	{
charlesmn	0:3ac96e360672	1974
charlesmn	0:3ac96e360672	1975
charlesmn	0:3ac96e360672	1976	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1977
charlesmn	0:3ac96e360672	1978	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1979
charlesmn	0:3ac96e360672	1980
charlesmn	0:3ac96e360672	1981
charlesmn	0:3ac96e360672	1982	status =
charlesmn	0:3ac96e360672	1983	VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn	0:3ac96e360672	1984	phistpostprocess,
charlesmn	0:3ac96e360672	1985	pstatic,
charlesmn	0:3ac96e360672	1986	phistogram,
charlesmn	0:3ac96e360672	1987	pgeneral,
charlesmn	0:3ac96e360672	1988	ptiming,
charlesmn	0:3ac96e360672	1989	pdynamic,
charlesmn	0:3ac96e360672	1990	psystem,
charlesmn	0:3ac96e360672	1991	ptuning_parms,
charlesmn	0:3ac96e360672	1992	pzone_cfg);
charlesmn	0:3ac96e360672	1993
charlesmn	0:3ac96e360672	1994	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1995
charlesmn	0:3ac96e360672	1996
charlesmn	0:3ac96e360672	1997
charlesmn	0:3ac96e360672	1998	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	1999	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2000	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2001	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2002	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2003	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	2004	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2005
charlesmn	0:3ac96e360672	2006	}
charlesmn	0:3ac96e360672	2007
charlesmn	0:3ac96e360672	2008	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2009
charlesmn	0:3ac96e360672	2010	return status;
charlesmn	0:3ac96e360672	2011	}
charlesmn	0:3ac96e360672	2012
charlesmn	0:3ac96e360672	2013
charlesmn	0:3ac96e360672	2014	VL53L1_Error VL53L1_preset_mode_histogram_ranging_short_timing(
charlesmn	0:3ac96e360672	2015	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2016	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2017	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2018	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2019	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2020	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2021	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2022	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2023	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2024	{
charlesmn	0:3ac96e360672	2025
charlesmn	0:3ac96e360672	2026
charlesmn	0:3ac96e360672	2027	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2028
charlesmn	0:3ac96e360672	2029	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2030
charlesmn	0:3ac96e360672	2031
charlesmn	0:3ac96e360672	2032
charlesmn	0:3ac96e360672	2033	status =
charlesmn	0:3ac96e360672	2034	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	2035	phistpostprocess,
charlesmn	0:3ac96e360672	2036	pstatic,
charlesmn	0:3ac96e360672	2037	phistogram,
charlesmn	0:3ac96e360672	2038	pgeneral,
charlesmn	0:3ac96e360672	2039	ptiming,
charlesmn	0:3ac96e360672	2040	pdynamic,
charlesmn	0:3ac96e360672	2041	psystem,
charlesmn	0:3ac96e360672	2042	ptuning_parms,
charlesmn	0:3ac96e360672	2043	pzone_cfg);
charlesmn	0:3ac96e360672	2044
charlesmn	0:3ac96e360672	2045
charlesmn	0:3ac96e360672	2046
charlesmn	0:3ac96e360672	2047	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2048
charlesmn	0:3ac96e360672	2049
charlesmn	0:3ac96e360672	2050
charlesmn	0:3ac96e360672	2051	pstatic->dss_config__target_total_rate_mcps = 0x1400;
charlesmn	0:3ac96e360672	2052
charlesmn	0:3ac96e360672	2053
charlesmn	0:3ac96e360672	2054
charlesmn	0:3ac96e360672	2055	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2056	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2057	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2058	phistogram);
charlesmn	0:3ac96e360672	2059
charlesmn	0:3ac96e360672	2060
charlesmn	0:3ac96e360672	2061	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2062	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2063	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2064	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2065
charlesmn	0:3ac96e360672	2066
charlesmn	0:3ac96e360672	2067
charlesmn	0:3ac96e360672	2068	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2069	phistogram,
charlesmn	0:3ac96e360672	2070	pstatic,
charlesmn	0:3ac96e360672	2071	pgeneral,
charlesmn	0:3ac96e360672	2072	ptiming,
charlesmn	0:3ac96e360672	2073	pdynamic);
charlesmn	0:3ac96e360672	2074
charlesmn	0:3ac96e360672	2075
charlesmn	0:3ac96e360672	2076
charlesmn	0:3ac96e360672	2077	ptiming->range_config__vcsel_period_a = 0x04;
charlesmn	0:3ac96e360672	2078	ptiming->range_config__vcsel_period_b = 0x03;
charlesmn	0:3ac96e360672	2079	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2080	ptiming->mm_config__timeout_macrop_a_lo = 0x42;
charlesmn	0:3ac96e360672	2081	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2082	ptiming->mm_config__timeout_macrop_b_lo = 0x42;
charlesmn	0:3ac96e360672	2083	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2084	ptiming->range_config__timeout_macrop_a_lo = 0x52;
charlesmn	0:3ac96e360672	2085	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2086	ptiming->range_config__timeout_macrop_b_lo = 0x66;
charlesmn	0:3ac96e360672	2087
charlesmn	0:3ac96e360672	2088	pgeneral->cal_config__vcsel_start = 0x04;
charlesmn	0:3ac96e360672	2089
charlesmn	0:3ac96e360672	2090
charlesmn	0:3ac96e360672	2091
charlesmn	0:3ac96e360672	2092	pgeneral->phasecal_config__timeout_macrop = 0xa4;
charlesmn	0:3ac96e360672	2093
charlesmn	0:3ac96e360672	2094
charlesmn	0:3ac96e360672	2095
charlesmn	0:3ac96e360672	2096	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2097	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2098	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2099	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2100	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2101
charlesmn	0:3ac96e360672	2102
charlesmn	0:3ac96e360672	2103	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2104
charlesmn	0:3ac96e360672	2105
charlesmn	0:3ac96e360672	2106
charlesmn	0:3ac96e360672	2107
charlesmn	0:3ac96e360672	2108	psystem->system__mode_start =
charlesmn	0:3ac96e360672	2109	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	2110	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	2111	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	2112	}
charlesmn	0:3ac96e360672	2113
charlesmn	0:3ac96e360672	2114	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2115
charlesmn	0:3ac96e360672	2116	return status;
charlesmn	0:3ac96e360672	2117	}
charlesmn	0:3ac96e360672	2118
charlesmn	0:3ac96e360672	2119
charlesmn	0:3ac96e360672	2120	VL53L1_Error VL53L1_preset_mode_histogram_long_range(
charlesmn	0:3ac96e360672	2121	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2122	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2123	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2124	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2125	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2126	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2127	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2128	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2129	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2130	{
charlesmn	0:3ac96e360672	2131
charlesmn	0:3ac96e360672	2132
charlesmn	0:3ac96e360672	2133	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2134
charlesmn	0:3ac96e360672	2135	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2136
charlesmn	0:3ac96e360672	2137
charlesmn	0:3ac96e360672	2138
charlesmn	0:3ac96e360672	2139	status =
charlesmn	0:3ac96e360672	2140	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	2141	phistpostprocess,
charlesmn	0:3ac96e360672	2142	pstatic,
charlesmn	0:3ac96e360672	2143	phistogram,
charlesmn	0:3ac96e360672	2144	pgeneral,
charlesmn	0:3ac96e360672	2145	ptiming,
charlesmn	0:3ac96e360672	2146	pdynamic,
charlesmn	0:3ac96e360672	2147	psystem,
charlesmn	0:3ac96e360672	2148	ptuning_parms,
charlesmn	0:3ac96e360672	2149	pzone_cfg);
charlesmn	0:3ac96e360672	2150
charlesmn	0:3ac96e360672	2151
charlesmn	0:3ac96e360672	2152
charlesmn	0:3ac96e360672	2153	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2154
charlesmn	0:3ac96e360672	2155
charlesmn	0:3ac96e360672	2156
charlesmn	0:3ac96e360672	2157
charlesmn	0:3ac96e360672	2158
charlesmn	0:3ac96e360672	2159	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2160	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2161	0, 1, 2, 3, 4, 5,
charlesmn	0:3ac96e360672	2162	phistogram);
charlesmn	0:3ac96e360672	2163
charlesmn	0:3ac96e360672	2164
charlesmn	0:3ac96e360672	2165	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2166	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2167	0, 1, 2, 3, 4, 5,
charlesmn	0:3ac96e360672	2168	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2169
charlesmn	0:3ac96e360672	2170
charlesmn	0:3ac96e360672	2171
charlesmn	0:3ac96e360672	2172	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2173	phistogram,
charlesmn	0:3ac96e360672	2174	pstatic,
charlesmn	0:3ac96e360672	2175	pgeneral,
charlesmn	0:3ac96e360672	2176	ptiming,
charlesmn	0:3ac96e360672	2177	pdynamic);
charlesmn	0:3ac96e360672	2178
charlesmn	0:3ac96e360672	2179
charlesmn	0:3ac96e360672	2180
charlesmn	0:3ac96e360672	2181	ptiming->range_config__vcsel_period_a = 0x09;
charlesmn	0:3ac96e360672	2182	ptiming->range_config__vcsel_period_b = 0x0b;
charlesmn	0:3ac96e360672	2183
charlesmn	0:3ac96e360672	2184
charlesmn	0:3ac96e360672	2185
charlesmn	0:3ac96e360672	2186	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2187	ptiming->mm_config__timeout_macrop_a_lo = 0x21;
charlesmn	0:3ac96e360672	2188	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2189	ptiming->mm_config__timeout_macrop_b_lo = 0x1b;
charlesmn	0:3ac96e360672	2190
charlesmn	0:3ac96e360672	2191
charlesmn	0:3ac96e360672	2192
charlesmn	0:3ac96e360672	2193	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2194	ptiming->range_config__timeout_macrop_a_lo = 0x29;
charlesmn	0:3ac96e360672	2195	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2196	ptiming->range_config__timeout_macrop_b_lo = 0x22;
charlesmn	0:3ac96e360672	2197
charlesmn	0:3ac96e360672	2198
charlesmn	0:3ac96e360672	2199
charlesmn	0:3ac96e360672	2200	pgeneral->cal_config__vcsel_start = 0x09;
charlesmn	0:3ac96e360672	2201
charlesmn	0:3ac96e360672	2202
charlesmn	0:3ac96e360672	2203
charlesmn	0:3ac96e360672	2204	pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn	0:3ac96e360672	2205
charlesmn	0:3ac96e360672	2206
charlesmn	0:3ac96e360672	2207
charlesmn	0:3ac96e360672	2208	pdynamic->sd_config__woi_sd0 = 0x09;
charlesmn	0:3ac96e360672	2209	pdynamic->sd_config__woi_sd1 = 0x0B;
charlesmn	0:3ac96e360672	2210	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	2211	ptuning_parms->tp_init_phase_rtn_hist_long;
charlesmn	0:3ac96e360672	2212	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	2213	ptuning_parms->tp_init_phase_ref_hist_long;
charlesmn	0:3ac96e360672	2214
charlesmn	0:3ac96e360672	2215
charlesmn	0:3ac96e360672	2216
charlesmn	0:3ac96e360672	2217	phistpostprocess->valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	2218	phistpostprocess->valid_phase_high = 0x88;
charlesmn	0:3ac96e360672	2219
charlesmn	0:3ac96e360672	2220	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2221	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2222	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2223	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2224	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2225	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2226
charlesmn	0:3ac96e360672	2227
charlesmn	0:3ac96e360672	2228
charlesmn	0:3ac96e360672	2229
charlesmn	0:3ac96e360672	2230	psystem->system__mode_start =
charlesmn	0:3ac96e360672	2231	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	2232	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	2233	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	2234	}
charlesmn	0:3ac96e360672	2235
charlesmn	0:3ac96e360672	2236	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2237
charlesmn	0:3ac96e360672	2238	return status;
charlesmn	0:3ac96e360672	2239	}
charlesmn	0:3ac96e360672	2240
charlesmn	0:3ac96e360672	2241
charlesmn	0:3ac96e360672	2242	VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn	0:3ac96e360672	2243	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2244	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2245	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2246	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2247	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2248	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2249	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2250	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2251	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2252	{
charlesmn	0:3ac96e360672	2253
charlesmn	0:3ac96e360672	2254
charlesmn	0:3ac96e360672	2255	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2256
charlesmn	0:3ac96e360672	2257	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2258
charlesmn	0:3ac96e360672	2259
charlesmn	0:3ac96e360672	2260
charlesmn	0:3ac96e360672	2261	status =
charlesmn	0:3ac96e360672	2262	VL53L1_preset_mode_histogram_long_range(
charlesmn	0:3ac96e360672	2263	phistpostprocess,
charlesmn	0:3ac96e360672	2264	pstatic,
charlesmn	0:3ac96e360672	2265	phistogram,
charlesmn	0:3ac96e360672	2266	pgeneral,
charlesmn	0:3ac96e360672	2267	ptiming,
charlesmn	0:3ac96e360672	2268	pdynamic,
charlesmn	0:3ac96e360672	2269	psystem,
charlesmn	0:3ac96e360672	2270	ptuning_parms,
charlesmn	0:3ac96e360672	2271	pzone_cfg);
charlesmn	0:3ac96e360672	2272
charlesmn	0:3ac96e360672	2273
charlesmn	0:3ac96e360672	2274
charlesmn	0:3ac96e360672	2275	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2276
charlesmn	0:3ac96e360672	2277
charlesmn	0:3ac96e360672	2278
charlesmn	0:3ac96e360672	2279
charlesmn	0:3ac96e360672	2280
charlesmn	0:3ac96e360672	2281	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2282	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2283	8+0, 8+1, 8+2, 3, 4, 5,
charlesmn	0:3ac96e360672	2284	phistogram);
charlesmn	0:3ac96e360672	2285
charlesmn	0:3ac96e360672	2286
charlesmn	0:3ac96e360672	2287	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2288	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	2289	8+0, 8+1, 8+2, 3, 4, 5,
charlesmn	0:3ac96e360672	2290	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2291
charlesmn	0:3ac96e360672	2292
charlesmn	0:3ac96e360672	2293
charlesmn	0:3ac96e360672	2294	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2295	phistogram,
charlesmn	0:3ac96e360672	2296	pstatic,
charlesmn	0:3ac96e360672	2297	pgeneral,
charlesmn	0:3ac96e360672	2298	ptiming,
charlesmn	0:3ac96e360672	2299	pdynamic);
charlesmn	0:3ac96e360672	2300
charlesmn	0:3ac96e360672	2301
charlesmn	0:3ac96e360672	2302
charlesmn	0:3ac96e360672	2303	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2304	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2305	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2306	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2307	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2308	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	2309	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2310	}
charlesmn	0:3ac96e360672	2311
charlesmn	0:3ac96e360672	2312	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2313
charlesmn	0:3ac96e360672	2314	return status;
charlesmn	0:3ac96e360672	2315	}
charlesmn	0:3ac96e360672	2316
charlesmn	0:3ac96e360672	2317
charlesmn	0:3ac96e360672	2318	VL53L1_Error VL53L1_preset_mode_histogram_long_range_mm2(
charlesmn	0:3ac96e360672	2319	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2320	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2321	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2322	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2323	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2324	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2325	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2326	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2327	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2328	{
charlesmn	0:3ac96e360672	2329
charlesmn	0:3ac96e360672	2330
charlesmn	0:3ac96e360672	2331	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2332
charlesmn	0:3ac96e360672	2333	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2334
charlesmn	0:3ac96e360672	2335
charlesmn	0:3ac96e360672	2336
charlesmn	0:3ac96e360672	2337	status =
charlesmn	0:3ac96e360672	2338	VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn	0:3ac96e360672	2339	phistpostprocess,
charlesmn	0:3ac96e360672	2340	pstatic,
charlesmn	0:3ac96e360672	2341	phistogram,
charlesmn	0:3ac96e360672	2342	pgeneral,
charlesmn	0:3ac96e360672	2343	ptiming,
charlesmn	0:3ac96e360672	2344	pdynamic,
charlesmn	0:3ac96e360672	2345	psystem,
charlesmn	0:3ac96e360672	2346	ptuning_parms,
charlesmn	0:3ac96e360672	2347	pzone_cfg);
charlesmn	0:3ac96e360672	2348
charlesmn	0:3ac96e360672	2349
charlesmn	0:3ac96e360672	2350
charlesmn	0:3ac96e360672	2351	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2352
charlesmn	0:3ac96e360672	2353
charlesmn	0:3ac96e360672	2354
charlesmn	0:3ac96e360672	2355	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2356	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2357	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2358	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2359	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2360	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	2361	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2362	}
charlesmn	0:3ac96e360672	2363
charlesmn	0:3ac96e360672	2364	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2365
charlesmn	0:3ac96e360672	2366	return status;
charlesmn	0:3ac96e360672	2367	}
charlesmn	0:3ac96e360672	2368
charlesmn	0:3ac96e360672	2369
charlesmn	0:3ac96e360672	2370
charlesmn	0:3ac96e360672	2371	VL53L1_Error VL53L1_preset_mode_histogram_medium_range(
charlesmn	0:3ac96e360672	2372	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2373	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2374	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2375	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2376	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2377	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2378	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2379	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2380	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2381	{
charlesmn	0:3ac96e360672	2382
charlesmn	0:3ac96e360672	2383
charlesmn	0:3ac96e360672	2384	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2385
charlesmn	0:3ac96e360672	2386	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2387
charlesmn	0:3ac96e360672	2388
charlesmn	0:3ac96e360672	2389
charlesmn	0:3ac96e360672	2390	status =
charlesmn	0:3ac96e360672	2391	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	2392	phistpostprocess,
charlesmn	0:3ac96e360672	2393	pstatic,
charlesmn	0:3ac96e360672	2394	phistogram,
charlesmn	0:3ac96e360672	2395	pgeneral,
charlesmn	0:3ac96e360672	2396	ptiming,
charlesmn	0:3ac96e360672	2397	pdynamic,
charlesmn	0:3ac96e360672	2398	psystem,
charlesmn	0:3ac96e360672	2399	ptuning_parms,
charlesmn	0:3ac96e360672	2400	pzone_cfg);
charlesmn	0:3ac96e360672	2401
charlesmn	0:3ac96e360672	2402
charlesmn	0:3ac96e360672	2403
charlesmn	0:3ac96e360672	2404	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2405
charlesmn	0:3ac96e360672	2406
charlesmn	0:3ac96e360672	2407
charlesmn	0:3ac96e360672	2408
charlesmn	0:3ac96e360672	2409
charlesmn	0:3ac96e360672	2410	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2411	7, 0, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2412	0, 1, 2, 1, 2, 3,
charlesmn	0:3ac96e360672	2413	phistogram);
charlesmn	0:3ac96e360672	2414
charlesmn	0:3ac96e360672	2415
charlesmn	0:3ac96e360672	2416	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2417	7, 0, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2418	0, 1, 2, 1, 2, 3,
charlesmn	0:3ac96e360672	2419	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2420
charlesmn	0:3ac96e360672	2421
charlesmn	0:3ac96e360672	2422
charlesmn	0:3ac96e360672	2423	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2424	phistogram,
charlesmn	0:3ac96e360672	2425	pstatic,
charlesmn	0:3ac96e360672	2426	pgeneral,
charlesmn	0:3ac96e360672	2427	ptiming,
charlesmn	0:3ac96e360672	2428	pdynamic);
charlesmn	0:3ac96e360672	2429
charlesmn	0:3ac96e360672	2430
charlesmn	0:3ac96e360672	2431
charlesmn	0:3ac96e360672	2432	ptiming->range_config__vcsel_period_a = 0x05;
charlesmn	0:3ac96e360672	2433	ptiming->range_config__vcsel_period_b = 0x07;
charlesmn	0:3ac96e360672	2434
charlesmn	0:3ac96e360672	2435
charlesmn	0:3ac96e360672	2436
charlesmn	0:3ac96e360672	2437	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2438	ptiming->mm_config__timeout_macrop_a_lo = 0x36;
charlesmn	0:3ac96e360672	2439	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2440	ptiming->mm_config__timeout_macrop_b_lo = 0x28;
charlesmn	0:3ac96e360672	2441
charlesmn	0:3ac96e360672	2442
charlesmn	0:3ac96e360672	2443
charlesmn	0:3ac96e360672	2444	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2445	ptiming->range_config__timeout_macrop_a_lo = 0x44;
charlesmn	0:3ac96e360672	2446	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2447	ptiming->range_config__timeout_macrop_b_lo = 0x33;
charlesmn	0:3ac96e360672	2448
charlesmn	0:3ac96e360672	2449
charlesmn	0:3ac96e360672	2450
charlesmn	0:3ac96e360672	2451	pgeneral->cal_config__vcsel_start = 0x05;
charlesmn	0:3ac96e360672	2452
charlesmn	0:3ac96e360672	2453
charlesmn	0:3ac96e360672	2454
charlesmn	0:3ac96e360672	2455	pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn	0:3ac96e360672	2456
charlesmn	0:3ac96e360672	2457
charlesmn	0:3ac96e360672	2458
charlesmn	0:3ac96e360672	2459	pdynamic->sd_config__woi_sd0 = 0x05;
charlesmn	0:3ac96e360672	2460	pdynamic->sd_config__woi_sd1 = 0x07;
charlesmn	0:3ac96e360672	2461	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	2462	ptuning_parms->tp_init_phase_rtn_hist_med;
charlesmn	0:3ac96e360672	2463	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	2464	ptuning_parms->tp_init_phase_ref_hist_med;
charlesmn	0:3ac96e360672	2465
charlesmn	0:3ac96e360672	2466
charlesmn	0:3ac96e360672	2467
charlesmn	0:3ac96e360672	2468	phistpostprocess->valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	2469	phistpostprocess->valid_phase_high = 0x48;
charlesmn	0:3ac96e360672	2470
charlesmn	0:3ac96e360672	2471	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2472	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2473	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2474	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2475	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2476	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2477
charlesmn	0:3ac96e360672	2478
charlesmn	0:3ac96e360672	2479
charlesmn	0:3ac96e360672	2480
charlesmn	0:3ac96e360672	2481	psystem->system__mode_start =
charlesmn	0:3ac96e360672	2482	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	2483	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	2484	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	2485	}
charlesmn	0:3ac96e360672	2486
charlesmn	0:3ac96e360672	2487	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2488
charlesmn	0:3ac96e360672	2489	return status;
charlesmn	0:3ac96e360672	2490	}
charlesmn	0:3ac96e360672	2491
charlesmn	0:3ac96e360672	2492
charlesmn	0:3ac96e360672	2493	VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn	0:3ac96e360672	2494	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2495	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2496	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2497	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2498	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2499	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2500	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2501	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2502	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2503	{
charlesmn	0:3ac96e360672	2504
charlesmn	0:3ac96e360672	2505
charlesmn	0:3ac96e360672	2506	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2507
charlesmn	0:3ac96e360672	2508	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2509
charlesmn	0:3ac96e360672	2510
charlesmn	0:3ac96e360672	2511
charlesmn	0:3ac96e360672	2512	status =
charlesmn	0:3ac96e360672	2513	VL53L1_preset_mode_histogram_medium_range(
charlesmn	0:3ac96e360672	2514	phistpostprocess,
charlesmn	0:3ac96e360672	2515	pstatic,
charlesmn	0:3ac96e360672	2516	phistogram,
charlesmn	0:3ac96e360672	2517	pgeneral,
charlesmn	0:3ac96e360672	2518	ptiming,
charlesmn	0:3ac96e360672	2519	pdynamic,
charlesmn	0:3ac96e360672	2520	psystem,
charlesmn	0:3ac96e360672	2521	ptuning_parms,
charlesmn	0:3ac96e360672	2522	pzone_cfg);
charlesmn	0:3ac96e360672	2523
charlesmn	0:3ac96e360672	2524
charlesmn	0:3ac96e360672	2525
charlesmn	0:3ac96e360672	2526	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2527
charlesmn	0:3ac96e360672	2528
charlesmn	0:3ac96e360672	2529
charlesmn	0:3ac96e360672	2530	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2531	7, 0, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2532	8+0, 8+1, 8+2, 1, 2, 3,
charlesmn	0:3ac96e360672	2533	phistogram);
charlesmn	0:3ac96e360672	2534
charlesmn	0:3ac96e360672	2535
charlesmn	0:3ac96e360672	2536	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2537	7, 0, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2538	8+0, 8+1, 8+2, 1, 2, 3,
charlesmn	0:3ac96e360672	2539	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2540
charlesmn	0:3ac96e360672	2541
charlesmn	0:3ac96e360672	2542
charlesmn	0:3ac96e360672	2543	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2544	phistogram,
charlesmn	0:3ac96e360672	2545	pstatic,
charlesmn	0:3ac96e360672	2546	pgeneral,
charlesmn	0:3ac96e360672	2547	ptiming,
charlesmn	0:3ac96e360672	2548	pdynamic);
charlesmn	0:3ac96e360672	2549
charlesmn	0:3ac96e360672	2550
charlesmn	0:3ac96e360672	2551
charlesmn	0:3ac96e360672	2552	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2553	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2554	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2555	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2556	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2557	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	2558	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2559	}
charlesmn	0:3ac96e360672	2560
charlesmn	0:3ac96e360672	2561	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2562
charlesmn	0:3ac96e360672	2563	return status;
charlesmn	0:3ac96e360672	2564	}
charlesmn	0:3ac96e360672	2565
charlesmn	0:3ac96e360672	2566
charlesmn	0:3ac96e360672	2567	VL53L1_Error VL53L1_preset_mode_histogram_medium_range_mm2(
charlesmn	0:3ac96e360672	2568	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2569	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2570	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2571	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2572	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2573	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2574	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2575	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2576	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2577	{
charlesmn	0:3ac96e360672	2578
charlesmn	0:3ac96e360672	2579
charlesmn	0:3ac96e360672	2580	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2581
charlesmn	0:3ac96e360672	2582	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2583
charlesmn	0:3ac96e360672	2584
charlesmn	0:3ac96e360672	2585
charlesmn	0:3ac96e360672	2586	status =
charlesmn	0:3ac96e360672	2587	VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn	0:3ac96e360672	2588	phistpostprocess,
charlesmn	0:3ac96e360672	2589	pstatic,
charlesmn	0:3ac96e360672	2590	phistogram,
charlesmn	0:3ac96e360672	2591	pgeneral,
charlesmn	0:3ac96e360672	2592	ptiming,
charlesmn	0:3ac96e360672	2593	pdynamic,
charlesmn	0:3ac96e360672	2594	psystem,
charlesmn	0:3ac96e360672	2595	ptuning_parms,
charlesmn	0:3ac96e360672	2596	pzone_cfg);
charlesmn	0:3ac96e360672	2597
charlesmn	0:3ac96e360672	2598
charlesmn	0:3ac96e360672	2599
charlesmn	0:3ac96e360672	2600	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2601
charlesmn	0:3ac96e360672	2602
charlesmn	0:3ac96e360672	2603
charlesmn	0:3ac96e360672	2604	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2605	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2606	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2607	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2608	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2609	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	2610	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2611	}
charlesmn	0:3ac96e360672	2612
charlesmn	0:3ac96e360672	2613	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2614
charlesmn	0:3ac96e360672	2615	return status;
charlesmn	0:3ac96e360672	2616	}
charlesmn	0:3ac96e360672	2617
charlesmn	0:3ac96e360672	2618
charlesmn	0:3ac96e360672	2619	VL53L1_Error VL53L1_preset_mode_histogram_short_range(
charlesmn	0:3ac96e360672	2620	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2621	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2622	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2623	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2624	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2625	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2626	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2627	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2628	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2629	{
charlesmn	0:3ac96e360672	2630
charlesmn	0:3ac96e360672	2631
charlesmn	0:3ac96e360672	2632	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2633
charlesmn	0:3ac96e360672	2634	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2635
charlesmn	0:3ac96e360672	2636
charlesmn	0:3ac96e360672	2637
charlesmn	0:3ac96e360672	2638	status =
charlesmn	0:3ac96e360672	2639	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	2640	phistpostprocess,
charlesmn	0:3ac96e360672	2641	pstatic,
charlesmn	0:3ac96e360672	2642	phistogram,
charlesmn	0:3ac96e360672	2643	pgeneral,
charlesmn	0:3ac96e360672	2644	ptiming,
charlesmn	0:3ac96e360672	2645	pdynamic,
charlesmn	0:3ac96e360672	2646	psystem,
charlesmn	0:3ac96e360672	2647	ptuning_parms,
charlesmn	0:3ac96e360672	2648	pzone_cfg);
charlesmn	0:3ac96e360672	2649
charlesmn	0:3ac96e360672	2650
charlesmn	0:3ac96e360672	2651
charlesmn	0:3ac96e360672	2652	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2653
charlesmn	0:3ac96e360672	2654
charlesmn	0:3ac96e360672	2655
charlesmn	0:3ac96e360672	2656
charlesmn	0:3ac96e360672	2657
charlesmn	0:3ac96e360672	2658	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2659	7, 7, 0, 1, 1, 1,
charlesmn	0:3ac96e360672	2660	0, 1, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2661	phistogram);
charlesmn	0:3ac96e360672	2662
charlesmn	0:3ac96e360672	2663
charlesmn	0:3ac96e360672	2664	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2665	7, 7, 0, 1, 1, 1,
charlesmn	0:3ac96e360672	2666	0, 1, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2667	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2668
charlesmn	0:3ac96e360672	2669
charlesmn	0:3ac96e360672	2670
charlesmn	0:3ac96e360672	2671	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2672	phistogram,
charlesmn	0:3ac96e360672	2673	pstatic,
charlesmn	0:3ac96e360672	2674	pgeneral,
charlesmn	0:3ac96e360672	2675	ptiming,
charlesmn	0:3ac96e360672	2676	pdynamic);
charlesmn	0:3ac96e360672	2677
charlesmn	0:3ac96e360672	2678
charlesmn	0:3ac96e360672	2679
charlesmn	0:3ac96e360672	2680	ptiming->range_config__vcsel_period_a = 0x03;
charlesmn	0:3ac96e360672	2681	ptiming->range_config__vcsel_period_b = 0x05;
charlesmn	0:3ac96e360672	2682
charlesmn	0:3ac96e360672	2683
charlesmn	0:3ac96e360672	2684
charlesmn	0:3ac96e360672	2685	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2686	ptiming->mm_config__timeout_macrop_a_lo = 0x52;
charlesmn	0:3ac96e360672	2687	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2688	ptiming->mm_config__timeout_macrop_b_lo = 0x37;
charlesmn	0:3ac96e360672	2689
charlesmn	0:3ac96e360672	2690
charlesmn	0:3ac96e360672	2691
charlesmn	0:3ac96e360672	2692	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	2693	ptiming->range_config__timeout_macrop_a_lo = 0x66;
charlesmn	0:3ac96e360672	2694	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	2695	ptiming->range_config__timeout_macrop_b_lo = 0x44;
charlesmn	0:3ac96e360672	2696
charlesmn	0:3ac96e360672	2697
charlesmn	0:3ac96e360672	2698
charlesmn	0:3ac96e360672	2699	pgeneral->cal_config__vcsel_start = 0x03;
charlesmn	0:3ac96e360672	2700
charlesmn	0:3ac96e360672	2701
charlesmn	0:3ac96e360672	2702
charlesmn	0:3ac96e360672	2703	pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn	0:3ac96e360672	2704
charlesmn	0:3ac96e360672	2705
charlesmn	0:3ac96e360672	2706
charlesmn	0:3ac96e360672	2707	pdynamic->sd_config__woi_sd0 = 0x03;
charlesmn	0:3ac96e360672	2708	pdynamic->sd_config__woi_sd1 = 0x05;
charlesmn	0:3ac96e360672	2709	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	2710	ptuning_parms->tp_init_phase_rtn_hist_short;
charlesmn	0:3ac96e360672	2711	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	2712	ptuning_parms->tp_init_phase_ref_hist_short;
charlesmn	0:3ac96e360672	2713
charlesmn	0:3ac96e360672	2714
charlesmn	0:3ac96e360672	2715	phistpostprocess->valid_phase_low = 0x08;
charlesmn	0:3ac96e360672	2716	phistpostprocess->valid_phase_high = 0x28;
charlesmn	0:3ac96e360672	2717
charlesmn	0:3ac96e360672	2718	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2719	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2720	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2721	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2722	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2723	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	2724
charlesmn	0:3ac96e360672	2725	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2726
charlesmn	0:3ac96e360672	2727
charlesmn	0:3ac96e360672	2728
charlesmn	0:3ac96e360672	2729
charlesmn	0:3ac96e360672	2730	psystem->system__mode_start =
charlesmn	0:3ac96e360672	2731	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	2732	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	2733	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	2734	}
charlesmn	0:3ac96e360672	2735
charlesmn	0:3ac96e360672	2736	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2737
charlesmn	0:3ac96e360672	2738	return status;
charlesmn	0:3ac96e360672	2739	}
charlesmn	0:3ac96e360672	2740
charlesmn	0:3ac96e360672	2741
charlesmn	0:3ac96e360672	2742
charlesmn	0:3ac96e360672	2743	VL53L1_Error VL53L1_preset_mode_special_histogram_short_range(
charlesmn	0:3ac96e360672	2744	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2745	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2746	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2747	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2748	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2749	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2750	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2751	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2752	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2753	{
charlesmn	0:3ac96e360672	2754
charlesmn	0:3ac96e360672	2755
charlesmn	0:3ac96e360672	2756	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2757
charlesmn	0:3ac96e360672	2758	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2759
charlesmn	0:3ac96e360672	2760
charlesmn	0:3ac96e360672	2761
charlesmn	0:3ac96e360672	2762	status =
charlesmn	0:3ac96e360672	2763	VL53L1_preset_mode_histogram_short_range(
charlesmn	0:3ac96e360672	2764	phistpostprocess,
charlesmn	0:3ac96e360672	2765	pstatic,
charlesmn	0:3ac96e360672	2766	phistogram,
charlesmn	0:3ac96e360672	2767	pgeneral,
charlesmn	0:3ac96e360672	2768	ptiming,
charlesmn	0:3ac96e360672	2769	pdynamic,
charlesmn	0:3ac96e360672	2770	psystem,
charlesmn	0:3ac96e360672	2771	ptuning_parms,
charlesmn	0:3ac96e360672	2772	pzone_cfg);
charlesmn	0:3ac96e360672	2773
charlesmn	0:3ac96e360672	2774
charlesmn	0:3ac96e360672	2775
charlesmn	0:3ac96e360672	2776	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2777
charlesmn	0:3ac96e360672	2778
charlesmn	0:3ac96e360672	2779
charlesmn	0:3ac96e360672	2780
charlesmn	0:3ac96e360672	2781
charlesmn	0:3ac96e360672	2782	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2783	7, 7, 0, 0, 1, 1,
charlesmn	0:3ac96e360672	2784	0, 0, 0, 1, 1, 1,
charlesmn	0:3ac96e360672	2785	phistogram);
charlesmn	0:3ac96e360672	2786
charlesmn	0:3ac96e360672	2787
charlesmn	0:3ac96e360672	2788	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2789	7, 7, 0, 0, 1, 1,
charlesmn	0:3ac96e360672	2790	0, 0, 0, 1, 1, 1,
charlesmn	0:3ac96e360672	2791	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2792
charlesmn	0:3ac96e360672	2793
charlesmn	0:3ac96e360672	2794
charlesmn	0:3ac96e360672	2795	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2796	phistogram,
charlesmn	0:3ac96e360672	2797	pstatic,
charlesmn	0:3ac96e360672	2798	pgeneral,
charlesmn	0:3ac96e360672	2799	ptiming,
charlesmn	0:3ac96e360672	2800	pdynamic);
charlesmn	0:3ac96e360672	2801
charlesmn	0:3ac96e360672	2802
charlesmn	0:3ac96e360672	2803
charlesmn	0:3ac96e360672	2804	ptiming->range_config__vcsel_period_a = 0x02;
charlesmn	0:3ac96e360672	2805	ptiming->range_config__vcsel_period_b = 0x03;
charlesmn	0:3ac96e360672	2806
charlesmn	0:3ac96e360672	2807
charlesmn	0:3ac96e360672	2808
charlesmn	0:3ac96e360672	2809	pgeneral->cal_config__vcsel_start = 0x00;
charlesmn	0:3ac96e360672	2810
charlesmn	0:3ac96e360672	2811
charlesmn	0:3ac96e360672	2812
charlesmn	0:3ac96e360672	2813	pgeneral->phasecal_config__target = 0x31;
charlesmn	0:3ac96e360672	2814
charlesmn	0:3ac96e360672	2815
charlesmn	0:3ac96e360672	2816
charlesmn	0:3ac96e360672	2817	pdynamic->sd_config__woi_sd0 = 0x02;
charlesmn	0:3ac96e360672	2818	pdynamic->sd_config__woi_sd1 = 0x03;
charlesmn	0:3ac96e360672	2819	pdynamic->sd_config__initial_phase_sd0 =
charlesmn	0:3ac96e360672	2820	ptuning_parms->tp_init_phase_rtn_hist_short;
charlesmn	0:3ac96e360672	2821	pdynamic->sd_config__initial_phase_sd1 =
charlesmn	0:3ac96e360672	2822	ptuning_parms->tp_init_phase_ref_hist_short;
charlesmn	0:3ac96e360672	2823
charlesmn	0:3ac96e360672	2824
charlesmn	0:3ac96e360672	2825
charlesmn	0:3ac96e360672	2826	phistpostprocess->valid_phase_low = 0x10;
charlesmn	0:3ac96e360672	2827	phistpostprocess->valid_phase_high = 0x18;
charlesmn	0:3ac96e360672	2828
charlesmn	0:3ac96e360672	2829	}
charlesmn	0:3ac96e360672	2830
charlesmn	0:3ac96e360672	2831	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2832
charlesmn	0:3ac96e360672	2833	return status;
charlesmn	0:3ac96e360672	2834	}
charlesmn	0:3ac96e360672	2835
charlesmn	0:3ac96e360672	2836
charlesmn	0:3ac96e360672	2837
charlesmn	0:3ac96e360672	2838	VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn	0:3ac96e360672	2839	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2840	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2841	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2842	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2843	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2844	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2845	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2846	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2847	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2848	{
charlesmn	0:3ac96e360672	2849
charlesmn	0:3ac96e360672	2850
charlesmn	0:3ac96e360672	2851	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2852
charlesmn	0:3ac96e360672	2853	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2854
charlesmn	0:3ac96e360672	2855
charlesmn	0:3ac96e360672	2856
charlesmn	0:3ac96e360672	2857	status =
charlesmn	0:3ac96e360672	2858	VL53L1_preset_mode_histogram_short_range(
charlesmn	0:3ac96e360672	2859	phistpostprocess,
charlesmn	0:3ac96e360672	2860	pstatic,
charlesmn	0:3ac96e360672	2861	phistogram,
charlesmn	0:3ac96e360672	2862	pgeneral,
charlesmn	0:3ac96e360672	2863	ptiming,
charlesmn	0:3ac96e360672	2864	pdynamic,
charlesmn	0:3ac96e360672	2865	psystem,
charlesmn	0:3ac96e360672	2866	ptuning_parms,
charlesmn	0:3ac96e360672	2867	pzone_cfg);
charlesmn	0:3ac96e360672	2868
charlesmn	0:3ac96e360672	2869
charlesmn	0:3ac96e360672	2870
charlesmn	0:3ac96e360672	2871	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2872
charlesmn	0:3ac96e360672	2873
charlesmn	0:3ac96e360672	2874
charlesmn	0:3ac96e360672	2875
charlesmn	0:3ac96e360672	2876
charlesmn	0:3ac96e360672	2877	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	2878	7, 7, 0, 1, 1, 1,
charlesmn	0:3ac96e360672	2879	8+0, 8+1, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2880	phistogram);
charlesmn	0:3ac96e360672	2881
charlesmn	0:3ac96e360672	2882
charlesmn	0:3ac96e360672	2883	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	2884	7, 7, 0, 1, 1, 1,
charlesmn	0:3ac96e360672	2885	8+0, 8+1, 1, 1, 2, 2,
charlesmn	0:3ac96e360672	2886	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	2887
charlesmn	0:3ac96e360672	2888
charlesmn	0:3ac96e360672	2889
charlesmn	0:3ac96e360672	2890	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	2891	phistogram,
charlesmn	0:3ac96e360672	2892	pstatic,
charlesmn	0:3ac96e360672	2893	pgeneral,
charlesmn	0:3ac96e360672	2894	ptiming,
charlesmn	0:3ac96e360672	2895	pdynamic);
charlesmn	0:3ac96e360672	2896
charlesmn	0:3ac96e360672	2897
charlesmn	0:3ac96e360672	2898
charlesmn	0:3ac96e360672	2899	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2900	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2901	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2902	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2903	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2904	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	2905	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2906
charlesmn	0:3ac96e360672	2907	}
charlesmn	0:3ac96e360672	2908
charlesmn	0:3ac96e360672	2909	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2910
charlesmn	0:3ac96e360672	2911	return status;
charlesmn	0:3ac96e360672	2912	}
charlesmn	0:3ac96e360672	2913
charlesmn	0:3ac96e360672	2914
charlesmn	0:3ac96e360672	2915	VL53L1_Error VL53L1_preset_mode_histogram_short_range_mm2(
charlesmn	0:3ac96e360672	2916	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2917	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2918	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2919	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2920	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2921	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2922	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2923	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2924	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2925	{
charlesmn	0:3ac96e360672	2926
charlesmn	0:3ac96e360672	2927
charlesmn	0:3ac96e360672	2928	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2929
charlesmn	0:3ac96e360672	2930	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2931
charlesmn	0:3ac96e360672	2932
charlesmn	0:3ac96e360672	2933
charlesmn	0:3ac96e360672	2934	status =
charlesmn	0:3ac96e360672	2935	VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn	0:3ac96e360672	2936	phistpostprocess,
charlesmn	0:3ac96e360672	2937	pstatic,
charlesmn	0:3ac96e360672	2938	phistogram,
charlesmn	0:3ac96e360672	2939	pgeneral,
charlesmn	0:3ac96e360672	2940	ptiming,
charlesmn	0:3ac96e360672	2941	pdynamic,
charlesmn	0:3ac96e360672	2942	psystem,
charlesmn	0:3ac96e360672	2943	ptuning_parms,
charlesmn	0:3ac96e360672	2944	pzone_cfg);
charlesmn	0:3ac96e360672	2945
charlesmn	0:3ac96e360672	2946
charlesmn	0:3ac96e360672	2947
charlesmn	0:3ac96e360672	2948	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2949
charlesmn	0:3ac96e360672	2950
charlesmn	0:3ac96e360672	2951
charlesmn	0:3ac96e360672	2952	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	2953	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	2954	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	2955	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	2956	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	2957	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	2958	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	2959	}
charlesmn	0:3ac96e360672	2960
charlesmn	0:3ac96e360672	2961	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2962
charlesmn	0:3ac96e360672	2963	return status;
charlesmn	0:3ac96e360672	2964	}
charlesmn	0:3ac96e360672	2965
charlesmn	0:3ac96e360672	2966
charlesmn	0:3ac96e360672	2967
charlesmn	0:3ac96e360672	2968	VL53L1_Error VL53L1_preset_mode_histogram_characterisation(
charlesmn	0:3ac96e360672	2969	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	2970	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	2971	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	2972	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	2973	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	2974	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	2975	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	2976	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	2977	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	2978	{
charlesmn	0:3ac96e360672	2979
charlesmn	0:3ac96e360672	2980
charlesmn	0:3ac96e360672	2981	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2982
charlesmn	0:3ac96e360672	2983	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2984
charlesmn	0:3ac96e360672	2985
charlesmn	0:3ac96e360672	2986
charlesmn	0:3ac96e360672	2987	status =
charlesmn	0:3ac96e360672	2988	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	2989	phistpostprocess,
charlesmn	0:3ac96e360672	2990	pstatic,
charlesmn	0:3ac96e360672	2991	phistogram,
charlesmn	0:3ac96e360672	2992	pgeneral,
charlesmn	0:3ac96e360672	2993	ptiming,
charlesmn	0:3ac96e360672	2994	pdynamic,
charlesmn	0:3ac96e360672	2995	psystem,
charlesmn	0:3ac96e360672	2996	ptuning_parms,
charlesmn	0:3ac96e360672	2997	pzone_cfg);
charlesmn	0:3ac96e360672	2998
charlesmn	0:3ac96e360672	2999
charlesmn	0:3ac96e360672	3000
charlesmn	0:3ac96e360672	3001	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3002
charlesmn	0:3ac96e360672	3003
charlesmn	0:3ac96e360672	3004
charlesmn	0:3ac96e360672	3005	pstatic->debug__ctrl = 0x01;
charlesmn	0:3ac96e360672	3006	psystem->power_management__go1_power_force = 0x01;
charlesmn	0:3ac96e360672	3007
charlesmn	0:3ac96e360672	3008	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	3009	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	3010	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	3011	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	3012
charlesmn	0:3ac96e360672	3013	psystem->system__mode_start =
charlesmn	0:3ac96e360672	3014	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	3015	VL53L1_DEVICEREADOUTMODE_SPLIT_MANUAL \|
charlesmn	0:3ac96e360672	3016	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	3017	}
charlesmn	0:3ac96e360672	3018
charlesmn	0:3ac96e360672	3019	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3020
charlesmn	0:3ac96e360672	3021	return status;
charlesmn	0:3ac96e360672	3022	}
charlesmn	0:3ac96e360672	3023
charlesmn	0:3ac96e360672	3024
charlesmn	0:3ac96e360672	3025	VL53L1_Error VL53L1_preset_mode_histogram_xtalk_planar(
charlesmn	0:3ac96e360672	3026	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3027	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3028	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3029	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3030	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3031	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3032	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3033	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3034	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3035	{
charlesmn	0:3ac96e360672	3036
charlesmn	0:3ac96e360672	3037
charlesmn	0:3ac96e360672	3038	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3039
charlesmn	0:3ac96e360672	3040	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3041
charlesmn	0:3ac96e360672	3042
charlesmn	0:3ac96e360672	3043
charlesmn	0:3ac96e360672	3044	status =
charlesmn	0:3ac96e360672	3045	VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn	0:3ac96e360672	3046	phistpostprocess,
charlesmn	0:3ac96e360672	3047	pstatic,
charlesmn	0:3ac96e360672	3048	phistogram,
charlesmn	0:3ac96e360672	3049	pgeneral,
charlesmn	0:3ac96e360672	3050	ptiming,
charlesmn	0:3ac96e360672	3051	pdynamic,
charlesmn	0:3ac96e360672	3052	psystem,
charlesmn	0:3ac96e360672	3053	ptuning_parms,
charlesmn	0:3ac96e360672	3054	pzone_cfg);
charlesmn	0:3ac96e360672	3055
charlesmn	0:3ac96e360672	3056
charlesmn	0:3ac96e360672	3057
charlesmn	0:3ac96e360672	3058	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3059
charlesmn	0:3ac96e360672	3060
charlesmn	0:3ac96e360672	3061
charlesmn	0:3ac96e360672	3062	status =
charlesmn	0:3ac96e360672	3063	VL53L1_zone_preset_xtalk_planar(
charlesmn	0:3ac96e360672	3064	pgeneral,
charlesmn	0:3ac96e360672	3065	pzone_cfg);
charlesmn	0:3ac96e360672	3066
charlesmn	0:3ac96e360672	3067
charlesmn	0:3ac96e360672	3068
charlesmn	0:3ac96e360672	3069	ptiming->range_config__vcsel_period_a = 0x09;
charlesmn	0:3ac96e360672	3070	ptiming->range_config__vcsel_period_b = 0x09;
charlesmn	0:3ac96e360672	3071
charlesmn	0:3ac96e360672	3072
charlesmn	0:3ac96e360672	3073
charlesmn	0:3ac96e360672	3074	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	3075	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	3076	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	3077	phistogram);
charlesmn	0:3ac96e360672	3078
charlesmn	0:3ac96e360672	3079
charlesmn	0:3ac96e360672	3080
charlesmn	0:3ac96e360672	3081	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	3082	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	3083	7, 0, 1, 2, 3, 4,
charlesmn	0:3ac96e360672	3084	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	3085
charlesmn	0:3ac96e360672	3086
charlesmn	0:3ac96e360672	3087
charlesmn	0:3ac96e360672	3088
charlesmn	0:3ac96e360672	3089	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3090	status =
charlesmn	0:3ac96e360672	3091	VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn	0:3ac96e360672	3092	pzone_cfg,
charlesmn	0:3ac96e360672	3093	phistogram,
charlesmn	0:3ac96e360672	3094	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	3095	}
charlesmn	0:3ac96e360672	3096
charlesmn	0:3ac96e360672	3097
charlesmn	0:3ac96e360672	3098
charlesmn	0:3ac96e360672	3099	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3100	phistogram,
charlesmn	0:3ac96e360672	3101	pstatic,
charlesmn	0:3ac96e360672	3102	pgeneral,
charlesmn	0:3ac96e360672	3103	ptiming,
charlesmn	0:3ac96e360672	3104	pdynamic);
charlesmn	0:3ac96e360672	3105
charlesmn	0:3ac96e360672	3106	}
charlesmn	0:3ac96e360672	3107
charlesmn	0:3ac96e360672	3108	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3109
charlesmn	0:3ac96e360672	3110	return status;
charlesmn	0:3ac96e360672	3111	}
charlesmn	0:3ac96e360672	3112
charlesmn	0:3ac96e360672	3113	VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn	0:3ac96e360672	3114	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3115	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3116	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3117	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3118	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3119	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3120	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3121	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3122	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3123	{
charlesmn	0:3ac96e360672	3124
charlesmn	0:3ac96e360672	3125
charlesmn	0:3ac96e360672	3126	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3127
charlesmn	0:3ac96e360672	3128	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3129
charlesmn	0:3ac96e360672	3130
charlesmn	0:3ac96e360672	3131
charlesmn	0:3ac96e360672	3132	status =
charlesmn	0:3ac96e360672	3133	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	3134	phistpostprocess,
charlesmn	0:3ac96e360672	3135	pstatic,
charlesmn	0:3ac96e360672	3136	phistogram,
charlesmn	0:3ac96e360672	3137	pgeneral,
charlesmn	0:3ac96e360672	3138	ptiming,
charlesmn	0:3ac96e360672	3139	pdynamic,
charlesmn	0:3ac96e360672	3140	psystem,
charlesmn	0:3ac96e360672	3141	ptuning_parms,
charlesmn	0:3ac96e360672	3142	pzone_cfg);
charlesmn	0:3ac96e360672	3143
charlesmn	0:3ac96e360672	3144
charlesmn	0:3ac96e360672	3145
charlesmn	0:3ac96e360672	3146
charlesmn	0:3ac96e360672	3147	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3148
charlesmn	0:3ac96e360672	3149
charlesmn	0:3ac96e360672	3150
charlesmn	0:3ac96e360672	3151
charlesmn	0:3ac96e360672	3152
charlesmn	0:3ac96e360672	3153	VL53L1_init_histogram_config_structure(
charlesmn	0:3ac96e360672	3154	8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn	0:3ac96e360672	3155	8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn	0:3ac96e360672	3156	phistogram);
charlesmn	0:3ac96e360672	3157
charlesmn	0:3ac96e360672	3158
charlesmn	0:3ac96e360672	3159	VL53L1_init_histogram_multizone_config_structure(
charlesmn	0:3ac96e360672	3160	8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn	0:3ac96e360672	3161	8+7, 8+0, 8+1, 8+2, 8+3, 8+4,
charlesmn	0:3ac96e360672	3162	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	3163
charlesmn	0:3ac96e360672	3164
charlesmn	0:3ac96e360672	3165
charlesmn	0:3ac96e360672	3166	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3167	phistogram,
charlesmn	0:3ac96e360672	3168	pstatic,
charlesmn	0:3ac96e360672	3169	pgeneral,
charlesmn	0:3ac96e360672	3170	ptiming,
charlesmn	0:3ac96e360672	3171	pdynamic);
charlesmn	0:3ac96e360672	3172
charlesmn	0:3ac96e360672	3173
charlesmn	0:3ac96e360672	3174
charlesmn	0:3ac96e360672	3175	ptiming->range_config__vcsel_period_a = 0x09;
charlesmn	0:3ac96e360672	3176	ptiming->range_config__vcsel_period_b = 0x09;
charlesmn	0:3ac96e360672	3177
charlesmn	0:3ac96e360672	3178
charlesmn	0:3ac96e360672	3179
charlesmn	0:3ac96e360672	3180	ptiming->mm_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	3181	ptiming->mm_config__timeout_macrop_a_lo = 0x21;
charlesmn	0:3ac96e360672	3182	ptiming->mm_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	3183	ptiming->mm_config__timeout_macrop_b_lo = 0x21;
charlesmn	0:3ac96e360672	3184
charlesmn	0:3ac96e360672	3185
charlesmn	0:3ac96e360672	3186
charlesmn	0:3ac96e360672	3187	ptiming->range_config__timeout_macrop_a_hi = 0x00;
charlesmn	0:3ac96e360672	3188	ptiming->range_config__timeout_macrop_a_lo = 0x29;
charlesmn	0:3ac96e360672	3189	ptiming->range_config__timeout_macrop_b_hi = 0x00;
charlesmn	0:3ac96e360672	3190	ptiming->range_config__timeout_macrop_b_lo = 0x29;
charlesmn	0:3ac96e360672	3191
charlesmn	0:3ac96e360672	3192
charlesmn	0:3ac96e360672	3193
charlesmn	0:3ac96e360672	3194	pgeneral->cal_config__vcsel_start = 0x09;
charlesmn	0:3ac96e360672	3195
charlesmn	0:3ac96e360672	3196
charlesmn	0:3ac96e360672	3197
charlesmn	0:3ac96e360672	3198	pgeneral->phasecal_config__timeout_macrop = 0xF5;
charlesmn	0:3ac96e360672	3199
charlesmn	0:3ac96e360672	3200
charlesmn	0:3ac96e360672	3201
charlesmn	0:3ac96e360672	3202	pdynamic->sd_config__woi_sd0 = 0x09;
charlesmn	0:3ac96e360672	3203	pdynamic->sd_config__woi_sd1 = 0x09;
charlesmn	0:3ac96e360672	3204	pdynamic->sd_config__initial_phase_sd0 = 0x09;
charlesmn	0:3ac96e360672	3205	pdynamic->sd_config__initial_phase_sd1 = 0x06;
charlesmn	0:3ac96e360672	3206
charlesmn	0:3ac96e360672	3207	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	3208	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	3209	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	3210	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	3211	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	3212	VL53L1_SEQUENCE_MM1_EN \|
charlesmn	0:3ac96e360672	3213	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	3214
charlesmn	0:3ac96e360672	3215
charlesmn	0:3ac96e360672	3216
charlesmn	0:3ac96e360672	3217
charlesmn	0:3ac96e360672	3218	psystem->system__mode_start =
charlesmn	0:3ac96e360672	3219	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM \|
charlesmn	0:3ac96e360672	3220	VL53L1_DEVICEREADOUTMODE_DUAL_SD \|
charlesmn	0:3ac96e360672	3221	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK;
charlesmn	0:3ac96e360672	3222	}
charlesmn	0:3ac96e360672	3223
charlesmn	0:3ac96e360672	3224	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3225
charlesmn	0:3ac96e360672	3226	return status;
charlesmn	0:3ac96e360672	3227	}
charlesmn	0:3ac96e360672	3228
charlesmn	0:3ac96e360672	3229
charlesmn	0:3ac96e360672	3230	VL53L1_Error VL53L1_preset_mode_histogram_xtalk_mm2(
charlesmn	0:3ac96e360672	3231	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3232	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3233	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3234	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3235	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3236	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3237	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3238	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3239	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3240	{
charlesmn	0:3ac96e360672	3241
charlesmn	0:3ac96e360672	3242
charlesmn	0:3ac96e360672	3243	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3244
charlesmn	0:3ac96e360672	3245	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3246
charlesmn	0:3ac96e360672	3247
charlesmn	0:3ac96e360672	3248
charlesmn	0:3ac96e360672	3249	status =
charlesmn	0:3ac96e360672	3250	VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn	0:3ac96e360672	3251	phistpostprocess,
charlesmn	0:3ac96e360672	3252	pstatic,
charlesmn	0:3ac96e360672	3253	phistogram,
charlesmn	0:3ac96e360672	3254	pgeneral,
charlesmn	0:3ac96e360672	3255	ptiming,
charlesmn	0:3ac96e360672	3256	pdynamic,
charlesmn	0:3ac96e360672	3257	psystem,
charlesmn	0:3ac96e360672	3258	ptuning_parms,
charlesmn	0:3ac96e360672	3259	pzone_cfg);
charlesmn	0:3ac96e360672	3260
charlesmn	0:3ac96e360672	3261
charlesmn	0:3ac96e360672	3262	pdynamic->system__sequence_config =
charlesmn	0:3ac96e360672	3263	VL53L1_SEQUENCE_VHV_EN \|
charlesmn	0:3ac96e360672	3264	VL53L1_SEQUENCE_PHASECAL_EN \|
charlesmn	0:3ac96e360672	3265	VL53L1_SEQUENCE_DSS1_EN \|
charlesmn	0:3ac96e360672	3266	VL53L1_SEQUENCE_DSS2_EN \|
charlesmn	0:3ac96e360672	3267	VL53L1_SEQUENCE_MM2_EN \|
charlesmn	0:3ac96e360672	3268	VL53L1_SEQUENCE_RANGE_EN;
charlesmn	0:3ac96e360672	3269
charlesmn	0:3ac96e360672	3270
charlesmn	0:3ac96e360672	3271
charlesmn	0:3ac96e360672	3272	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3273
charlesmn	0:3ac96e360672	3274	return status;
charlesmn	0:3ac96e360672	3275	}
charlesmn	0:3ac96e360672	3276
charlesmn	0:3ac96e360672	3277
charlesmn	0:3ac96e360672	3278
charlesmn	0:3ac96e360672	3279
charlesmn	0:3ac96e360672	3280	VL53L1_Error VL53L1_preset_mode_histogram_multizone(
charlesmn	0:3ac96e360672	3281	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3282	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3283	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3284	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3285	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3286	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3287	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3288	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3289	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3290	{
charlesmn	0:3ac96e360672	3291
charlesmn	0:3ac96e360672	3292
charlesmn	0:3ac96e360672	3293	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3294
charlesmn	0:3ac96e360672	3295	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3296
charlesmn	0:3ac96e360672	3297
charlesmn	0:3ac96e360672	3298
charlesmn	0:3ac96e360672	3299	status =
charlesmn	0:3ac96e360672	3300	VL53L1_preset_mode_histogram_medium_range(
charlesmn	0:3ac96e360672	3301	phistpostprocess,
charlesmn	0:3ac96e360672	3302	pstatic,
charlesmn	0:3ac96e360672	3303	phistogram,
charlesmn	0:3ac96e360672	3304	pgeneral,
charlesmn	0:3ac96e360672	3305	ptiming,
charlesmn	0:3ac96e360672	3306	pdynamic,
charlesmn	0:3ac96e360672	3307	psystem,
charlesmn	0:3ac96e360672	3308	ptuning_parms,
charlesmn	0:3ac96e360672	3309	pzone_cfg);
charlesmn	0:3ac96e360672	3310
charlesmn	0:3ac96e360672	3311
charlesmn	0:3ac96e360672	3312
charlesmn	0:3ac96e360672	3313	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3314
charlesmn	0:3ac96e360672	3315
charlesmn	0:3ac96e360672	3316
charlesmn	0:3ac96e360672	3317	status =
charlesmn	0:3ac96e360672	3318	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	3319	4, 8, 2,
charlesmn	0:3ac96e360672	3320	4, 8, 2,
charlesmn	0:3ac96e360672	3321	7, 7,
charlesmn	0:3ac96e360672	3322	pzone_cfg);
charlesmn	0:3ac96e360672	3323
charlesmn	0:3ac96e360672	3324	pgeneral->global_config__stream_divider =
charlesmn	0:3ac96e360672	3325	pzone_cfg->active_zones + 1;
charlesmn	0:3ac96e360672	3326
charlesmn	0:3ac96e360672	3327
charlesmn	0:3ac96e360672	3328
charlesmn	0:3ac96e360672	3329	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3330	status =
charlesmn	0:3ac96e360672	3331	VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn	0:3ac96e360672	3332	pzone_cfg,
charlesmn	0:3ac96e360672	3333	phistogram,
charlesmn	0:3ac96e360672	3334	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	3335	}
charlesmn	0:3ac96e360672	3336
charlesmn	0:3ac96e360672	3337	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3338	phistogram,
charlesmn	0:3ac96e360672	3339	pstatic,
charlesmn	0:3ac96e360672	3340	pgeneral,
charlesmn	0:3ac96e360672	3341	ptiming,
charlesmn	0:3ac96e360672	3342	pdynamic);
charlesmn	0:3ac96e360672	3343	}
charlesmn	0:3ac96e360672	3344
charlesmn	0:3ac96e360672	3345	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3346
charlesmn	0:3ac96e360672	3347	return status;
charlesmn	0:3ac96e360672	3348	}
charlesmn	0:3ac96e360672	3349
charlesmn	0:3ac96e360672	3350	VL53L1_Error VL53L1_preset_mode_histogram_multizone_short_range(
charlesmn	0:3ac96e360672	3351	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3352	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3353	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3354	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3355	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3356	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3357	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3358	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3359	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3360	{
charlesmn	0:3ac96e360672	3361
charlesmn	0:3ac96e360672	3362
charlesmn	0:3ac96e360672	3363	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3364
charlesmn	0:3ac96e360672	3365	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3366
charlesmn	0:3ac96e360672	3367
charlesmn	0:3ac96e360672	3368
charlesmn	0:3ac96e360672	3369	status =
charlesmn	0:3ac96e360672	3370	VL53L1_preset_mode_histogram_short_range(
charlesmn	0:3ac96e360672	3371	phistpostprocess,
charlesmn	0:3ac96e360672	3372	pstatic,
charlesmn	0:3ac96e360672	3373	phistogram,
charlesmn	0:3ac96e360672	3374	pgeneral,
charlesmn	0:3ac96e360672	3375	ptiming,
charlesmn	0:3ac96e360672	3376	pdynamic,
charlesmn	0:3ac96e360672	3377	psystem,
charlesmn	0:3ac96e360672	3378	ptuning_parms,
charlesmn	0:3ac96e360672	3379	pzone_cfg);
charlesmn	0:3ac96e360672	3380
charlesmn	0:3ac96e360672	3381
charlesmn	0:3ac96e360672	3382
charlesmn	0:3ac96e360672	3383	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3384
charlesmn	0:3ac96e360672	3385
charlesmn	0:3ac96e360672	3386
charlesmn	0:3ac96e360672	3387	status =
charlesmn	0:3ac96e360672	3388	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	3389	4, 8, 2,
charlesmn	0:3ac96e360672	3390	4, 8, 2,
charlesmn	0:3ac96e360672	3391	7, 7,
charlesmn	0:3ac96e360672	3392	pzone_cfg);
charlesmn	0:3ac96e360672	3393
charlesmn	0:3ac96e360672	3394	pgeneral->global_config__stream_divider =
charlesmn	0:3ac96e360672	3395	pzone_cfg->active_zones + 1;
charlesmn	0:3ac96e360672	3396
charlesmn	0:3ac96e360672	3397
charlesmn	0:3ac96e360672	3398
charlesmn	0:3ac96e360672	3399	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3400	status =
charlesmn	0:3ac96e360672	3401	VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn	0:3ac96e360672	3402	pzone_cfg,
charlesmn	0:3ac96e360672	3403	phistogram,
charlesmn	0:3ac96e360672	3404	&(pzone_cfg->multizone_hist_cfg)
charlesmn	0:3ac96e360672	3405	);
charlesmn	0:3ac96e360672	3406	}
charlesmn	0:3ac96e360672	3407
charlesmn	0:3ac96e360672	3408
charlesmn	0:3ac96e360672	3409
charlesmn	0:3ac96e360672	3410	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3411	phistogram,
charlesmn	0:3ac96e360672	3412	pstatic,
charlesmn	0:3ac96e360672	3413	pgeneral,
charlesmn	0:3ac96e360672	3414	ptiming,
charlesmn	0:3ac96e360672	3415	pdynamic);
charlesmn	0:3ac96e360672	3416	}
charlesmn	0:3ac96e360672	3417
charlesmn	0:3ac96e360672	3418	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3419
charlesmn	0:3ac96e360672	3420	return status;
charlesmn	0:3ac96e360672	3421	}
charlesmn	0:3ac96e360672	3422
charlesmn	0:3ac96e360672	3423
charlesmn	0:3ac96e360672	3424	VL53L1_Error VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn	0:3ac96e360672	3425	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3426	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3427	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3428	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3429	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3430	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3431	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3432	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3433	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3434	{
charlesmn	0:3ac96e360672	3435
charlesmn	0:3ac96e360672	3436
charlesmn	0:3ac96e360672	3437	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3438
charlesmn	0:3ac96e360672	3439	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3440
charlesmn	0:3ac96e360672	3441
charlesmn	0:3ac96e360672	3442
charlesmn	0:3ac96e360672	3443	status =
charlesmn	0:3ac96e360672	3444	VL53L1_preset_mode_histogram_long_range(
charlesmn	0:3ac96e360672	3445	phistpostprocess,
charlesmn	0:3ac96e360672	3446	pstatic,
charlesmn	0:3ac96e360672	3447	phistogram,
charlesmn	0:3ac96e360672	3448	pgeneral,
charlesmn	0:3ac96e360672	3449	ptiming,
charlesmn	0:3ac96e360672	3450	pdynamic,
charlesmn	0:3ac96e360672	3451	psystem,
charlesmn	0:3ac96e360672	3452	ptuning_parms,
charlesmn	0:3ac96e360672	3453	pzone_cfg);
charlesmn	0:3ac96e360672	3454
charlesmn	0:3ac96e360672	3455
charlesmn	0:3ac96e360672	3456
charlesmn	0:3ac96e360672	3457	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3458
charlesmn	0:3ac96e360672	3459
charlesmn	0:3ac96e360672	3460
charlesmn	0:3ac96e360672	3461	status =
charlesmn	0:3ac96e360672	3462	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	3463	4, 8, 2,
charlesmn	0:3ac96e360672	3464	4, 8, 2,
charlesmn	0:3ac96e360672	3465	7, 7,
charlesmn	0:3ac96e360672	3466	pzone_cfg);
charlesmn	0:3ac96e360672	3467
charlesmn	0:3ac96e360672	3468	pgeneral->global_config__stream_divider =
charlesmn	0:3ac96e360672	3469	pzone_cfg->active_zones + 1;
charlesmn	0:3ac96e360672	3470
charlesmn	0:3ac96e360672	3471
charlesmn	0:3ac96e360672	3472
charlesmn	0:3ac96e360672	3473	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3474	status =
charlesmn	0:3ac96e360672	3475	VL53L1_set_histogram_multizone_initial_bin_config(
charlesmn	0:3ac96e360672	3476	pzone_cfg,
charlesmn	0:3ac96e360672	3477	phistogram,
charlesmn	0:3ac96e360672	3478	&(pzone_cfg->multizone_hist_cfg));
charlesmn	0:3ac96e360672	3479	}
charlesmn	0:3ac96e360672	3480
charlesmn	0:3ac96e360672	3481
charlesmn	0:3ac96e360672	3482
charlesmn	0:3ac96e360672	3483	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3484	phistogram,
charlesmn	0:3ac96e360672	3485	pstatic,
charlesmn	0:3ac96e360672	3486	pgeneral,
charlesmn	0:3ac96e360672	3487	ptiming,
charlesmn	0:3ac96e360672	3488	pdynamic);
charlesmn	0:3ac96e360672	3489	}
charlesmn	0:3ac96e360672	3490
charlesmn	0:3ac96e360672	3491	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3492
charlesmn	0:3ac96e360672	3493	return status;
charlesmn	0:3ac96e360672	3494	}
charlesmn	0:3ac96e360672	3495
charlesmn	0:3ac96e360672	3496
charlesmn	0:3ac96e360672	3497
charlesmn	0:3ac96e360672	3498
charlesmn	0:3ac96e360672	3499	VL53L1_Error VL53L1_preset_mode_olt(
charlesmn	0:3ac96e360672	3500	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3501	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3502	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3503	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3504	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3505	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3506	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3507	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3508	{
charlesmn	0:3ac96e360672	3509
charlesmn	0:3ac96e360672	3510
charlesmn	0:3ac96e360672	3511	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3512
charlesmn	0:3ac96e360672	3513	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3514
charlesmn	0:3ac96e360672	3515
charlesmn	0:3ac96e360672	3516
charlesmn	0:3ac96e360672	3517	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	3518	pstatic,
charlesmn	0:3ac96e360672	3519	phistogram,
charlesmn	0:3ac96e360672	3520	pgeneral,
charlesmn	0:3ac96e360672	3521	ptiming,
charlesmn	0:3ac96e360672	3522	pdynamic,
charlesmn	0:3ac96e360672	3523	psystem,
charlesmn	0:3ac96e360672	3524	ptuning_parms,
charlesmn	0:3ac96e360672	3525	pzone_cfg);
charlesmn	0:3ac96e360672	3526
charlesmn	0:3ac96e360672	3527
charlesmn	0:3ac96e360672	3528
charlesmn	0:3ac96e360672	3529	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3530
charlesmn	0:3ac96e360672	3531	psystem->system__stream_count_ctrl = 0x01;
charlesmn	0:3ac96e360672	3532
charlesmn	0:3ac96e360672	3533	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3534
charlesmn	0:3ac96e360672	3535	return status;
charlesmn	0:3ac96e360672	3536	}
charlesmn	0:3ac96e360672	3537
charlesmn	0:3ac96e360672	3538
charlesmn	0:3ac96e360672	3539	void VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3540	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3541	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3542	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3543	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3544	VL53L1_dynamic_config_t *pdynamic)
charlesmn	0:3ac96e360672	3545	{
charlesmn	0:3ac96e360672	3546
charlesmn	0:3ac96e360672	3547
charlesmn	0:3ac96e360672	3548	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3549
charlesmn	0:3ac96e360672	3550	SUPPRESS_UNUSED_WARNING(pgeneral);
charlesmn	0:3ac96e360672	3551
charlesmn	0:3ac96e360672	3552	pstatic->sigma_estimator__effective_pulse_width_ns =
charlesmn	0:3ac96e360672	3553	phistogram->histogram_config__high_amb_even_bin_0_1;
charlesmn	0:3ac96e360672	3554	pstatic->sigma_estimator__effective_ambient_width_ns =
charlesmn	0:3ac96e360672	3555	phistogram->histogram_config__high_amb_even_bin_2_3;
charlesmn	0:3ac96e360672	3556	pstatic->sigma_estimator__sigma_ref_mm =
charlesmn	0:3ac96e360672	3557	phistogram->histogram_config__high_amb_even_bin_4_5;
charlesmn	0:3ac96e360672	3558
charlesmn	0:3ac96e360672	3559	pstatic->algo__crosstalk_compensation_valid_height_mm =
charlesmn	0:3ac96e360672	3560	phistogram->histogram_config__high_amb_odd_bin_0_1;
charlesmn	0:3ac96e360672	3561
charlesmn	0:3ac96e360672	3562	pstatic->spare_host_config__static_config_spare_0 =
charlesmn	0:3ac96e360672	3563	phistogram->histogram_config__high_amb_odd_bin_2_3;
charlesmn	0:3ac96e360672	3564	pstatic->spare_host_config__static_config_spare_1 =
charlesmn	0:3ac96e360672	3565	phistogram->histogram_config__high_amb_odd_bin_4_5;
charlesmn	0:3ac96e360672	3566
charlesmn	0:3ac96e360672	3567	pstatic->algo__range_ignore_threshold_mcps =
charlesmn	0:3ac96e360672	3568	(((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
charlesmn	0:3ac96e360672	3569	<< 8)
charlesmn	0:3ac96e360672	3570	+ (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
charlesmn	0:3ac96e360672	3571
charlesmn	0:3ac96e360672	3572	pstatic->algo__range_ignore_valid_height_mm =
charlesmn	0:3ac96e360672	3573	phistogram->histogram_config__mid_amb_even_bin_4_5;
charlesmn	0:3ac96e360672	3574	pstatic->algo__range_min_clip =
charlesmn	0:3ac96e360672	3575	phistogram->histogram_config__mid_amb_odd_bin_0_1;
charlesmn	0:3ac96e360672	3576	pstatic->algo__consistency_check__tolerance =
charlesmn	0:3ac96e360672	3577	phistogram->histogram_config__mid_amb_odd_bin_2;
charlesmn	0:3ac96e360672	3578
charlesmn	0:3ac96e360672	3579	pstatic->spare_host_config__static_config_spare_2 =
charlesmn	0:3ac96e360672	3580	phistogram->histogram_config__mid_amb_odd_bin_3_4;
charlesmn	0:3ac96e360672	3581	pstatic->sd_config__reset_stages_msb =
charlesmn	0:3ac96e360672	3582	phistogram->histogram_config__mid_amb_odd_bin_5;
charlesmn	0:3ac96e360672	3583
charlesmn	0:3ac96e360672	3584	pstatic->sd_config__reset_stages_lsb =
charlesmn	0:3ac96e360672	3585	phistogram->histogram_config__user_bin_offset;
charlesmn	0:3ac96e360672	3586
charlesmn	0:3ac96e360672	3587	ptiming->range_config__sigma_thresh =
charlesmn	0:3ac96e360672	3588	(((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
charlesmn	0:3ac96e360672	3589	<< 8)
charlesmn	0:3ac96e360672	3590	+ (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
charlesmn	0:3ac96e360672	3591
charlesmn	0:3ac96e360672	3592	ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn	0:3ac96e360672	3593	(((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
charlesmn	0:3ac96e360672	3594	<< 8)
charlesmn	0:3ac96e360672	3595	+ (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
charlesmn	0:3ac96e360672	3596
charlesmn	0:3ac96e360672	3597	ptiming->range_config__valid_phase_low =
charlesmn	0:3ac96e360672	3598	phistogram->histogram_config__low_amb_odd_bin_2_3;
charlesmn	0:3ac96e360672	3599	ptiming->range_config__valid_phase_high =
charlesmn	0:3ac96e360672	3600	phistogram->histogram_config__low_amb_odd_bin_4_5;
charlesmn	0:3ac96e360672	3601
charlesmn	0:3ac96e360672	3602	pdynamic->system__thresh_high =
charlesmn	0:3ac96e360672	3603	phistogram->histogram_config__amb_thresh_low;
charlesmn	0:3ac96e360672	3604
charlesmn	0:3ac96e360672	3605	pdynamic->system__thresh_low =
charlesmn	0:3ac96e360672	3606	phistogram->histogram_config__amb_thresh_high;
charlesmn	0:3ac96e360672	3607
charlesmn	0:3ac96e360672	3608	pdynamic->system__enable_xtalk_per_quadrant =
charlesmn	0:3ac96e360672	3609	phistogram->histogram_config__spad_array_selection;
charlesmn	0:3ac96e360672	3610
charlesmn	0:3ac96e360672	3611	LOG_FUNCTION_END(0);
charlesmn	0:3ac96e360672	3612
charlesmn	0:3ac96e360672	3613	}
charlesmn	0:3ac96e360672	3614
charlesmn	0:3ac96e360672	3615	void VL53L1_copy_hist_bins_to_static_cfg(
charlesmn	0:3ac96e360672	3616	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3617	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3618	VL53L1_timing_config_t *ptiming)
charlesmn	0:3ac96e360672	3619	{
charlesmn	0:3ac96e360672	3620
charlesmn	0:3ac96e360672	3621
charlesmn	0:3ac96e360672	3622	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3623
charlesmn	0:3ac96e360672	3624	pstatic->sigma_estimator__effective_pulse_width_ns =
charlesmn	0:3ac96e360672	3625	phistogram->histogram_config__high_amb_even_bin_0_1;
charlesmn	0:3ac96e360672	3626	pstatic->sigma_estimator__effective_ambient_width_ns =
charlesmn	0:3ac96e360672	3627	phistogram->histogram_config__high_amb_even_bin_2_3;
charlesmn	0:3ac96e360672	3628	pstatic->sigma_estimator__sigma_ref_mm =
charlesmn	0:3ac96e360672	3629	phistogram->histogram_config__high_amb_even_bin_4_5;
charlesmn	0:3ac96e360672	3630
charlesmn	0:3ac96e360672	3631	pstatic->algo__crosstalk_compensation_valid_height_mm =
charlesmn	0:3ac96e360672	3632	phistogram->histogram_config__high_amb_odd_bin_0_1;
charlesmn	0:3ac96e360672	3633
charlesmn	0:3ac96e360672	3634	pstatic->spare_host_config__static_config_spare_0 =
charlesmn	0:3ac96e360672	3635	phistogram->histogram_config__high_amb_odd_bin_2_3;
charlesmn	0:3ac96e360672	3636	pstatic->spare_host_config__static_config_spare_1 =
charlesmn	0:3ac96e360672	3637	phistogram->histogram_config__high_amb_odd_bin_4_5;
charlesmn	0:3ac96e360672	3638
charlesmn	0:3ac96e360672	3639	pstatic->algo__range_ignore_threshold_mcps =
charlesmn	0:3ac96e360672	3640	(((uint16_t)phistogram->histogram_config__mid_amb_even_bin_0_1)
charlesmn	0:3ac96e360672	3641	<< 8)
charlesmn	0:3ac96e360672	3642	+ (uint16_t)phistogram->histogram_config__mid_amb_even_bin_2_3;
charlesmn	0:3ac96e360672	3643
charlesmn	0:3ac96e360672	3644	pstatic->algo__range_ignore_valid_height_mm =
charlesmn	0:3ac96e360672	3645	phistogram->histogram_config__mid_amb_even_bin_4_5;
charlesmn	0:3ac96e360672	3646	pstatic->algo__range_min_clip =
charlesmn	0:3ac96e360672	3647	phistogram->histogram_config__mid_amb_odd_bin_0_1;
charlesmn	0:3ac96e360672	3648	pstatic->algo__consistency_check__tolerance =
charlesmn	0:3ac96e360672	3649	phistogram->histogram_config__mid_amb_odd_bin_2;
charlesmn	0:3ac96e360672	3650
charlesmn	0:3ac96e360672	3651	pstatic->spare_host_config__static_config_spare_2 =
charlesmn	0:3ac96e360672	3652	phistogram->histogram_config__mid_amb_odd_bin_3_4;
charlesmn	0:3ac96e360672	3653	pstatic->sd_config__reset_stages_msb =
charlesmn	0:3ac96e360672	3654	phistogram->histogram_config__mid_amb_odd_bin_5;
charlesmn	0:3ac96e360672	3655
charlesmn	0:3ac96e360672	3656	ptiming->range_config__sigma_thresh =
charlesmn	0:3ac96e360672	3657	(((uint16_t)phistogram->histogram_config__low_amb_even_bin_0_1)
charlesmn	0:3ac96e360672	3658	<< 8)
charlesmn	0:3ac96e360672	3659	+ (uint16_t)phistogram->histogram_config__low_amb_even_bin_2_3;
charlesmn	0:3ac96e360672	3660
charlesmn	0:3ac96e360672	3661	ptiming->range_config__min_count_rate_rtn_limit_mcps =
charlesmn	0:3ac96e360672	3662	(((uint16_t)phistogram->histogram_config__low_amb_even_bin_4_5)
charlesmn	0:3ac96e360672	3663	<< 8)
charlesmn	0:3ac96e360672	3664	+ (uint16_t)phistogram->histogram_config__low_amb_odd_bin_0_1;
charlesmn	0:3ac96e360672	3665
charlesmn	0:3ac96e360672	3666	ptiming->range_config__valid_phase_low =
charlesmn	0:3ac96e360672	3667	phistogram->histogram_config__low_amb_odd_bin_2_3;
charlesmn	0:3ac96e360672	3668	ptiming->range_config__valid_phase_high =
charlesmn	0:3ac96e360672	3669	phistogram->histogram_config__low_amb_odd_bin_4_5;
charlesmn	0:3ac96e360672	3670
charlesmn	0:3ac96e360672	3671	LOG_FUNCTION_END(0);
charlesmn	0:3ac96e360672	3672
charlesmn	0:3ac96e360672	3673	}
charlesmn	0:3ac96e360672	3674
charlesmn	0:3ac96e360672	3675
charlesmn	0:3ac96e360672	3676	VL53L1_Error VL53L1_preset_mode_histogram_ranging_ref(
charlesmn	0:3ac96e360672	3677	VL53L1_hist_post_process_config_t *phistpostprocess,
charlesmn	0:3ac96e360672	3678	VL53L1_static_config_t *pstatic,
charlesmn	0:3ac96e360672	3679	VL53L1_histogram_config_t *phistogram,
charlesmn	0:3ac96e360672	3680	VL53L1_general_config_t *pgeneral,
charlesmn	0:3ac96e360672	3681	VL53L1_timing_config_t *ptiming,
charlesmn	0:3ac96e360672	3682	VL53L1_dynamic_config_t *pdynamic,
charlesmn	0:3ac96e360672	3683	VL53L1_system_control_t *psystem,
charlesmn	0:3ac96e360672	3684	VL53L1_tuning_parm_storage_t *ptuning_parms,
charlesmn	0:3ac96e360672	3685	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	3686	{
charlesmn	0:3ac96e360672	3687
charlesmn	0:3ac96e360672	3688
charlesmn	0:3ac96e360672	3689	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3690
charlesmn	0:3ac96e360672	3691	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3692
charlesmn	0:3ac96e360672	3693
charlesmn	0:3ac96e360672	3694
charlesmn	0:3ac96e360672	3695	status =
charlesmn	0:3ac96e360672	3696	VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	3697	phistpostprocess,
charlesmn	0:3ac96e360672	3698	pstatic,
charlesmn	0:3ac96e360672	3699	phistogram,
charlesmn	0:3ac96e360672	3700	pgeneral,
charlesmn	0:3ac96e360672	3701	ptiming,
charlesmn	0:3ac96e360672	3702	pdynamic,
charlesmn	0:3ac96e360672	3703	psystem,
charlesmn	0:3ac96e360672	3704	ptuning_parms,
charlesmn	0:3ac96e360672	3705	pzone_cfg);
charlesmn	0:3ac96e360672	3706
charlesmn	0:3ac96e360672	3707
charlesmn	0:3ac96e360672	3708
charlesmn	0:3ac96e360672	3709	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3710
charlesmn	0:3ac96e360672	3711
charlesmn	0:3ac96e360672	3712
charlesmn	0:3ac96e360672	3713	phistogram->histogram_config__spad_array_selection = 0x01;
charlesmn	0:3ac96e360672	3714
charlesmn	0:3ac96e360672	3715
charlesmn	0:3ac96e360672	3716
charlesmn	0:3ac96e360672	3717	VL53L1_copy_hist_cfg_to_static_cfg(
charlesmn	0:3ac96e360672	3718	phistogram,
charlesmn	0:3ac96e360672	3719	pstatic,
charlesmn	0:3ac96e360672	3720	pgeneral,
charlesmn	0:3ac96e360672	3721	ptiming,
charlesmn	0:3ac96e360672	3722	pdynamic);
charlesmn	0:3ac96e360672	3723	}
charlesmn	0:3ac96e360672	3724
charlesmn	0:3ac96e360672	3725	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3726
charlesmn	0:3ac96e360672	3727	return status;
charlesmn	0:3ac96e360672	3728	}
charlesmn	0:3ac96e360672	3729
charlesmn	0:3ac96e360672	3730
charlesmn	0:3ac96e360672	3731
charlesmn	0:3ac96e360672	3732
charlesmn	0:3ac96e360672	3733
charlesmn	0:3ac96e360672	3734

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Type:	Library
Created:	06 Oct 2020
Imports:	8
Forks:	0
Commits:	19
Dependents:	3
Dependencies:	2
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src/vl53l1_api_preset_modes.c@0:3ac96e360672, 2020-11-06 (annotated)

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