VL53L1CB - The VL53L1CB proximity sensor, based on ST’s Flig…

ST Expansion SW Team » Code » VL53L1CB

ST Expansion SW Team / VL53L1CB

The VL53L1CB proximity sensor, based on ST’s FlightSense™, Time-of-Flight technology.

Dependencies: X_NUCLEO_COMMON ST_INTERFACES

Dependents: VL53L1CB_noshield_1sensor_polls_auton VL53L1CB_noshield_1sensor_interrupt_auton X_NUCLEO_53L1A2

Based on VL53L1 library, this is a library for the VL53L1CB ToF chip.

src/vl53l1_api_core.c@0:3ac96e360672, 2020-11-06 (annotated)

Committer:: charlesmn
Date:: Fri Nov 06 10:06:37 2020 +0000
Revision:: 0:3ac96e360672
Child:: 7:1add29d51e72

Library for ST Vl53L1A1 time of flight sensor.

Who changed what in which revision?

User	Revision	Line number	New contents of line
charlesmn	0:3ac96e360672	1
charlesmn	0:3ac96e360672	2	/*******************************************************************************
charlesmn	0:3ac96e360672	3	* Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn	0:3ac96e360672	4
charlesmn	0:3ac96e360672	5	This file is part of VL53L1 Core and is dual licensed,
charlesmn	0:3ac96e360672	6	either 'STMicroelectronics
charlesmn	0:3ac96e360672	7	Proprietary license'
charlesmn	0:3ac96e360672	8	or 'BSD 3-clause "New" or "Revised" License' , at your option.
charlesmn	0:3ac96e360672	9
charlesmn	0:3ac96e360672	10	********************************************************************************
charlesmn	0:3ac96e360672	11
charlesmn	0:3ac96e360672	12	'STMicroelectronics Proprietary license'
charlesmn	0:3ac96e360672	13
charlesmn	0:3ac96e360672	14	********************************************************************************
charlesmn	0:3ac96e360672	15
charlesmn	0:3ac96e360672	16	License terms: STMicroelectronics Proprietary in accordance with licensing
charlesmn	0:3ac96e360672	17	terms at www.st.com/sla0081
charlesmn	0:3ac96e360672	18
charlesmn	0:3ac96e360672	19	STMicroelectronics confidential
charlesmn	0:3ac96e360672	20	Reproduction and Communication of this document is strictly prohibited unless
charlesmn	0:3ac96e360672	21	specifically authorized in writing by STMicroelectronics.
charlesmn	0:3ac96e360672	22
charlesmn	0:3ac96e360672	23
charlesmn	0:3ac96e360672	24	********************************************************************************
charlesmn	0:3ac96e360672	25
charlesmn	0:3ac96e360672	26	Alternatively, VL53L1 Core may be distributed under the terms of
charlesmn	0:3ac96e360672	27	'BSD 3-clause "New" or "Revised" License', in which case the following
charlesmn	0:3ac96e360672	28	provisions apply instead of the ones
charlesmn	0:3ac96e360672	29	mentioned above :
charlesmn	0:3ac96e360672	30
charlesmn	0:3ac96e360672	31	********************************************************************************
charlesmn	0:3ac96e360672	32
charlesmn	0:3ac96e360672	33	License terms: BSD 3-clause "New" or "Revised" License.
charlesmn	0:3ac96e360672	34
charlesmn	0:3ac96e360672	35	Redistribution and use in source and binary forms, with or without
charlesmn	0:3ac96e360672	36	modification, are permitted provided that the following conditions are met:
charlesmn	0:3ac96e360672	37
charlesmn	0:3ac96e360672	38	1. Redistributions of source code must retain the above copyright notice, this
charlesmn	0:3ac96e360672	39	list of conditions and the following disclaimer.
charlesmn	0:3ac96e360672	40
charlesmn	0:3ac96e360672	41	2. Redistributions in binary form must reproduce the above copyright notice,
charlesmn	0:3ac96e360672	42	this list of conditions and the following disclaimer in the documentation
charlesmn	0:3ac96e360672	43	and/or other materials provided with the distribution.
charlesmn	0:3ac96e360672	44
charlesmn	0:3ac96e360672	45	3. Neither the name of the copyright holder nor the names of its contributors
charlesmn	0:3ac96e360672	46	may be used to endorse or promote products derived from this software
charlesmn	0:3ac96e360672	47	without specific prior written permission.
charlesmn	0:3ac96e360672	48
charlesmn	0:3ac96e360672	49	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
charlesmn	0:3ac96e360672	50	AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
charlesmn	0:3ac96e360672	51	IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
charlesmn	0:3ac96e360672	52	DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
charlesmn	0:3ac96e360672	53	FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
charlesmn	0:3ac96e360672	54	DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
charlesmn	0:3ac96e360672	55	SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
charlesmn	0:3ac96e360672	56	CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
charlesmn	0:3ac96e360672	57	OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
charlesmn	0:3ac96e360672	58	OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
charlesmn	0:3ac96e360672	59
charlesmn	0:3ac96e360672	60
charlesmn	0:3ac96e360672	61	********************************************************************************
charlesmn	0:3ac96e360672	62
charlesmn	0:3ac96e360672	63	*/
charlesmn	0:3ac96e360672	64
charlesmn	0:3ac96e360672	65
charlesmn	0:3ac96e360672	66
charlesmn	0:3ac96e360672	67
charlesmn	0:3ac96e360672	68
charlesmn	0:3ac96e360672	69	#include "vl53l1_ll_def.h"
charlesmn	0:3ac96e360672	70	#include "vl53l1_ll_device.h"
charlesmn	0:3ac96e360672	71	#include "vl53l1_platform.h"
charlesmn	0:3ac96e360672	72	#include "vl53l1_platform_ipp.h"
charlesmn	0:3ac96e360672	73	#include "vl53l1_register_map.h"
charlesmn	0:3ac96e360672	74	#include "vl53l1_register_settings.h"
charlesmn	0:3ac96e360672	75	#include "vl53l1_register_funcs.h"
charlesmn	0:3ac96e360672	76	#include "vl53l1_hist_map.h"
charlesmn	0:3ac96e360672	77	#include "vl53l1_hist_structs.h"
charlesmn	0:3ac96e360672	78	#include "vl53l1_nvm_map.h"
charlesmn	0:3ac96e360672	79	#include "vl53l1_nvm_structs.h"
charlesmn	0:3ac96e360672	80	#include "vl53l1_nvm.h"
charlesmn	0:3ac96e360672	81	#include "vl53l1_core.h"
charlesmn	0:3ac96e360672	82	#include "vl53l1_wait.h"
charlesmn	0:3ac96e360672	83	#include "vl53l1_zone_presets.h"
charlesmn	0:3ac96e360672	84	#include "vl53l1_api_preset_modes.h"
charlesmn	0:3ac96e360672	85	#include "vl53l1_silicon_core.h"
charlesmn	0:3ac96e360672	86	#include "vl53l1_api_core.h"
charlesmn	0:3ac96e360672	87	#include "vl53l1_tuning_parm_defaults.h"
charlesmn	0:3ac96e360672	88
charlesmn	0:3ac96e360672	89	#ifdef VL53L1_LOG_ENABLE
charlesmn	0:3ac96e360672	90	#include "vl53l1_api_debug.h"
charlesmn	0:3ac96e360672	91	#endif
charlesmn	0:3ac96e360672	92
charlesmn	0:3ac96e360672	93	#define LOG_FUNCTION_START(fmt, ...) \
charlesmn	0:3ac96e360672	94	_LOG_FUNCTION_START(VL53L1_TRACE_MODULE_CORE, fmt, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	95	#define LOG_FUNCTION_END(status, ...) \
charlesmn	0:3ac96e360672	96	_LOG_FUNCTION_END(VL53L1_TRACE_MODULE_CORE, status, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	97	#define LOG_FUNCTION_END_FMT(status, fmt, ...) \
charlesmn	0:3ac96e360672	98	_LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_CORE, status, \
charlesmn	0:3ac96e360672	99	fmt, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	100
charlesmn	0:3ac96e360672	101	#define trace_print(level, ...) \
charlesmn	0:3ac96e360672	102	_LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_CORE, \
charlesmn	0:3ac96e360672	103	level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__)
charlesmn	0:3ac96e360672	104
charlesmn	0:3ac96e360672	105	#define VL53L1_MAX_I2C_XFER_SIZE 256
charlesmn	0:3ac96e360672	106
charlesmn	0:3ac96e360672	107	static VL53L1_Error select_offset_per_vcsel(VL53L1_LLDriverData_t *pdev,
charlesmn	0:3ac96e360672	108	int16_t *poffset) {
charlesmn	0:3ac96e360672	109	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	110	int16_t tA, tB;
charlesmn	0:3ac96e360672	111	uint8_t isc;
charlesmn	0:3ac96e360672	112
charlesmn	0:3ac96e360672	113	switch (pdev->preset_mode) {
charlesmn	0:3ac96e360672	114	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn	0:3ac96e360672	115	tA = pdev->per_vcsel_cal_data.short_a_offset_mm;
charlesmn	0:3ac96e360672	116	tB = pdev->per_vcsel_cal_data.short_b_offset_mm;
charlesmn	0:3ac96e360672	117	break;
charlesmn	0:3ac96e360672	118	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn	0:3ac96e360672	119	tA = pdev->per_vcsel_cal_data.medium_a_offset_mm;
charlesmn	0:3ac96e360672	120	tB = pdev->per_vcsel_cal_data.medium_b_offset_mm;
charlesmn	0:3ac96e360672	121	break;
charlesmn	0:3ac96e360672	122	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn	0:3ac96e360672	123	tA = pdev->per_vcsel_cal_data.long_a_offset_mm;
charlesmn	0:3ac96e360672	124	tB = pdev->per_vcsel_cal_data.long_b_offset_mm;
charlesmn	0:3ac96e360672	125	break;
charlesmn	0:3ac96e360672	126	default:
charlesmn	0:3ac96e360672	127	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	128	*poffset = 0;
charlesmn	0:3ac96e360672	129	break;
charlesmn	0:3ac96e360672	130	}
charlesmn	0:3ac96e360672	131
charlesmn	0:3ac96e360672	132	isc = pdev->ll_state.cfg_internal_stream_count;
charlesmn	0:3ac96e360672	133	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	134	*poffset = (isc & 0x01) ? tA : tB;
charlesmn	0:3ac96e360672	135
charlesmn	0:3ac96e360672	136	return status;
charlesmn	0:3ac96e360672	137	}
charlesmn	0:3ac96e360672	138
charlesmn	0:3ac96e360672	139	static void vl53l1_diff_histo_stddev(VL53L1_LLDriverData_t *pdev,
charlesmn	0:3ac96e360672	140	VL53L1_histogram_bin_data_t *pdata, uint8_t timing, uint8_t HighIndex,
charlesmn	0:3ac96e360672	141	uint8_t prev_pos, int32_t *pdiff_histo_stddev) {
charlesmn	0:3ac96e360672	142	uint16_t bin = 0;
charlesmn	0:3ac96e360672	143	int32_t total_rate_pre = 0;
charlesmn	0:3ac96e360672	144	int32_t total_rate_cur = 0;
charlesmn	0:3ac96e360672	145	int32_t PrevBin, CurrBin;
charlesmn	0:3ac96e360672	146
charlesmn	0:3ac96e360672	147	total_rate_pre = 0;
charlesmn	0:3ac96e360672	148	total_rate_cur = 0;
charlesmn	0:3ac96e360672	149
charlesmn	0:3ac96e360672	150
charlesmn	0:3ac96e360672	151	for (bin = timing * 4; bin < HighIndex; bin++) {
charlesmn	0:3ac96e360672	152	total_rate_pre +=
charlesmn	0:3ac96e360672	153	pdev->multi_bins_rec[prev_pos][timing][bin];
charlesmn	0:3ac96e360672	154	total_rate_cur += pdata->bin_data[bin];
charlesmn	0:3ac96e360672	155	}
charlesmn	0:3ac96e360672	156
charlesmn	0:3ac96e360672	157	if ((total_rate_pre != 0) && (total_rate_cur != 0))
charlesmn	0:3ac96e360672	158	for (bin = timing * 4; bin < HighIndex; bin++) {
charlesmn	0:3ac96e360672	159	PrevBin = pdev->multi_bins_rec[prev_pos][timing][bin];
charlesmn	0:3ac96e360672	160	PrevBin = (PrevBin * 1000) / total_rate_pre;
charlesmn	0:3ac96e360672	161	CurrBin = pdata->bin_data[bin] * 1000 / total_rate_cur;
charlesmn	0:3ac96e360672	162	pdiff_histo_stddev += (PrevBin - CurrBin)
charlesmn	0:3ac96e360672	163	(PrevBin - CurrBin);
charlesmn	0:3ac96e360672	164	}
charlesmn	0:3ac96e360672	165	}
charlesmn	0:3ac96e360672	166
charlesmn	0:3ac96e360672	167	static void vl53l1_histo_merge(VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	168	VL53L1_histogram_bin_data_t *pdata) {
charlesmn	0:3ac96e360672	169	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	170	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	171	uint16_t bin = 0;
charlesmn	0:3ac96e360672	172	uint8_t i = 0;
charlesmn	0:3ac96e360672	173	int32_t TuningBinRecSize = 0;
charlesmn	0:3ac96e360672	174	uint8_t recom_been_reset = 0;
charlesmn	0:3ac96e360672	175	uint8_t timing = 0;
charlesmn	0:3ac96e360672	176	int32_t rmt = 0;
charlesmn	0:3ac96e360672	177	int32_t diff_histo_stddev = 0;
charlesmn	0:3ac96e360672	178	uint8_t HighIndex, prev_pos;
charlesmn	0:3ac96e360672	179	uint8_t BuffSize = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn	0:3ac96e360672	180	uint8_t pos;
charlesmn	0:3ac96e360672	181
charlesmn	0:3ac96e360672	182	VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE,
charlesmn	0:3ac96e360672	183	&TuningBinRecSize);
charlesmn	0:3ac96e360672	184
charlesmn	0:3ac96e360672	185	VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD,
charlesmn	0:3ac96e360672	186	&rmt);
charlesmn	0:3ac96e360672	187
charlesmn	0:3ac96e360672	188
charlesmn	0:3ac96e360672	189	if (pdev->pos_before_next_recom == 0) {
charlesmn	0:3ac96e360672	190
charlesmn	0:3ac96e360672	191	timing = 1 - pdata->result__stream_count % 2;
charlesmn	0:3ac96e360672	192
charlesmn	0:3ac96e360672	193	diff_histo_stddev = 0;
charlesmn	0:3ac96e360672	194	HighIndex = BuffSize - timing * 4;
charlesmn	0:3ac96e360672	195	if (pdev->bin_rec_pos > 0)
charlesmn	0:3ac96e360672	196	prev_pos = pdev->bin_rec_pos - 1;
charlesmn	0:3ac96e360672	197	else
charlesmn	0:3ac96e360672	198	prev_pos = (TuningBinRecSize - 1);
charlesmn	0:3ac96e360672	199
charlesmn	0:3ac96e360672	200	if (pdev->multi_bins_rec[prev_pos][timing][4] > 0)
charlesmn	0:3ac96e360672	201	vl53l1_diff_histo_stddev(pdev, pdata,
charlesmn	0:3ac96e360672	202	timing, HighIndex, prev_pos,
charlesmn	0:3ac96e360672	203	&diff_histo_stddev);
charlesmn	0:3ac96e360672	204
charlesmn	0:3ac96e360672	205	if (diff_histo_stddev >= rmt) {
charlesmn	0:3ac96e360672	206	memset(pdev->multi_bins_rec, 0,
charlesmn	0:3ac96e360672	207	sizeof(pdev->multi_bins_rec));
charlesmn	0:3ac96e360672	208	pdev->bin_rec_pos = 0;
charlesmn	0:3ac96e360672	209
charlesmn	0:3ac96e360672	210	recom_been_reset = 1;
charlesmn	0:3ac96e360672	211
charlesmn	0:3ac96e360672	212	if (timing == 0)
charlesmn	0:3ac96e360672	213	pdev->pos_before_next_recom =
charlesmn	0:3ac96e360672	214	VL53L1_FRAME_WAIT_EVENT;
charlesmn	0:3ac96e360672	215	else
charlesmn	0:3ac96e360672	216	pdev->pos_before_next_recom =
charlesmn	0:3ac96e360672	217	VL53L1_FRAME_WAIT_EVENT + 1;
charlesmn	0:3ac96e360672	218	} else {
charlesmn	0:3ac96e360672	219
charlesmn	0:3ac96e360672	220	pos = pdev->bin_rec_pos;
charlesmn	0:3ac96e360672	221	for (i = 0; i < BuffSize; i++)
charlesmn	0:3ac96e360672	222	pdev->multi_bins_rec[pos][timing][i] =
charlesmn	0:3ac96e360672	223	pdata->bin_data[i];
charlesmn	0:3ac96e360672	224	}
charlesmn	0:3ac96e360672	225
charlesmn	0:3ac96e360672	226	if (pdev->bin_rec_pos == (TuningBinRecSize - 1) && timing == 1)
charlesmn	0:3ac96e360672	227	pdev->bin_rec_pos = 0;
charlesmn	0:3ac96e360672	228	else if (timing == 1)
charlesmn	0:3ac96e360672	229	pdev->bin_rec_pos++;
charlesmn	0:3ac96e360672	230
charlesmn	0:3ac96e360672	231	if (!((recom_been_reset == 1) && (timing == 0)) &&
charlesmn	0:3ac96e360672	232	(pdev->pos_before_next_recom == 0)) {
charlesmn	0:3ac96e360672	233
charlesmn	0:3ac96e360672	234	for (bin = 0; bin < BuffSize; bin++)
charlesmn	0:3ac96e360672	235	pdata->bin_data[bin] = 0;
charlesmn	0:3ac96e360672	236
charlesmn	0:3ac96e360672	237	for (bin = 0; bin < BuffSize; bin++)
charlesmn	0:3ac96e360672	238	for (i = 0; i < TuningBinRecSize; i++)
charlesmn	0:3ac96e360672	239	pdata->bin_data[bin] +=
charlesmn	0:3ac96e360672	240	(pdev->multi_bins_rec[i][timing][bin]);
charlesmn	0:3ac96e360672	241	}
charlesmn	0:3ac96e360672	242	} else {
charlesmn	0:3ac96e360672	243
charlesmn	0:3ac96e360672	244	pdev->pos_before_next_recom--;
charlesmn	0:3ac96e360672	245	if (pdev->pos_before_next_recom == 255)
charlesmn	0:3ac96e360672	246	pdev->pos_before_next_recom = 0;
charlesmn	0:3ac96e360672	247	}
charlesmn	0:3ac96e360672	248	}
charlesmn	0:3ac96e360672	249
charlesmn	0:3ac96e360672	250	VL53L1_Error VL53L1_load_patch(
charlesmn	0:3ac96e360672	251	VL53L1_DEV Dev) {
charlesmn	0:3ac96e360672	252	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	253	int32_t patch_tuning = 0;
charlesmn	0:3ac96e360672	254	uint8_t comms_buffer[256];
charlesmn	0:3ac96e360672	255	uint32_t patch_power;
charlesmn	0:3ac96e360672	256
charlesmn	0:3ac96e360672	257	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	258
charlesmn	0:3ac96e360672	259	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	260	status = VL53L1_WrByte(Dev,
charlesmn	0:3ac96e360672	261	VL53L1_FIRMWARE__ENABLE, 0x00);
charlesmn	0:3ac96e360672	262
charlesmn	0:3ac96e360672	263	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	264	VL53L1_enable_powerforce(Dev);
charlesmn	0:3ac96e360672	265
charlesmn	0:3ac96e360672	266	VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER,
charlesmn	0:3ac96e360672	267	&patch_tuning);
charlesmn	0:3ac96e360672	268
charlesmn	0:3ac96e360672	269	switch (patch_tuning) {
charlesmn	0:3ac96e360672	270	case 0:
charlesmn	0:3ac96e360672	271	patch_power = 0x00;
charlesmn	0:3ac96e360672	272	break;
charlesmn	0:3ac96e360672	273	case 1:
charlesmn	0:3ac96e360672	274	patch_power = 0x10;
charlesmn	0:3ac96e360672	275	break;
charlesmn	0:3ac96e360672	276	case 2:
charlesmn	0:3ac96e360672	277	patch_power = 0x20;
charlesmn	0:3ac96e360672	278	break;
charlesmn	0:3ac96e360672	279	case 3:
charlesmn	0:3ac96e360672	280	patch_power = 0x40;
charlesmn	0:3ac96e360672	281	break;
charlesmn	0:3ac96e360672	282	default:
charlesmn	0:3ac96e360672	283	patch_power = 0x00;
charlesmn	0:3ac96e360672	284	}
charlesmn	0:3ac96e360672	285
charlesmn	0:3ac96e360672	286	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	287
charlesmn	0:3ac96e360672	288	comms_buffer[0] = 0x29;
charlesmn	0:3ac96e360672	289	comms_buffer[1] = 0xC9;
charlesmn	0:3ac96e360672	290	comms_buffer[2] = 0x0E;
charlesmn	0:3ac96e360672	291	comms_buffer[3] = 0x40;
charlesmn	0:3ac96e360672	292	comms_buffer[4] = 0x28;
charlesmn	0:3ac96e360672	293	comms_buffer[5] = patch_power;
charlesmn	0:3ac96e360672	294
charlesmn	0:3ac96e360672	295	status = VL53L1_WriteMulti(Dev,
charlesmn	0:3ac96e360672	296	VL53L1_PATCH__OFFSET_0, comms_buffer, 6);
charlesmn	0:3ac96e360672	297	}
charlesmn	0:3ac96e360672	298
charlesmn	0:3ac96e360672	299	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	300	comms_buffer[0] = 0x03;
charlesmn	0:3ac96e360672	301	comms_buffer[1] = 0x6D;
charlesmn	0:3ac96e360672	302	comms_buffer[2] = 0x03;
charlesmn	0:3ac96e360672	303	comms_buffer[3] = 0x6F;
charlesmn	0:3ac96e360672	304	comms_buffer[4] = 0x07;
charlesmn	0:3ac96e360672	305	comms_buffer[5] = 0x29;
charlesmn	0:3ac96e360672	306	status = VL53L1_WriteMulti(Dev,
charlesmn	0:3ac96e360672	307	VL53L1_PATCH__ADDRESS_0, comms_buffer, 6);
charlesmn	0:3ac96e360672	308	}
charlesmn	0:3ac96e360672	309
charlesmn	0:3ac96e360672	310	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	311	comms_buffer[0] = 0x00;
charlesmn	0:3ac96e360672	312	comms_buffer[1] = 0x07;
charlesmn	0:3ac96e360672	313	status = VL53L1_WriteMulti(Dev,
charlesmn	0:3ac96e360672	314	VL53L1_PATCH__JMP_ENABLES, comms_buffer, 2);
charlesmn	0:3ac96e360672	315	}
charlesmn	0:3ac96e360672	316
charlesmn	0:3ac96e360672	317	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	318	comms_buffer[0] = 0x00;
charlesmn	0:3ac96e360672	319	comms_buffer[1] = 0x07;
charlesmn	0:3ac96e360672	320	status = VL53L1_WriteMulti(Dev,
charlesmn	0:3ac96e360672	321	VL53L1_PATCH__DATA_ENABLES, comms_buffer, 2);
charlesmn	0:3ac96e360672	322	}
charlesmn	0:3ac96e360672	323
charlesmn	0:3ac96e360672	324	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	325	status = VL53L1_WrByte(Dev,
charlesmn	0:3ac96e360672	326	VL53L1_PATCH__CTRL, 0x01);
charlesmn	0:3ac96e360672	327
charlesmn	0:3ac96e360672	328	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	329	status = VL53L1_WrByte(Dev,
charlesmn	0:3ac96e360672	330	VL53L1_FIRMWARE__ENABLE, 0x01);
charlesmn	0:3ac96e360672	331
charlesmn	0:3ac96e360672	332	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	333
charlesmn	0:3ac96e360672	334	return status;
charlesmn	0:3ac96e360672	335	}
charlesmn	0:3ac96e360672	336
charlesmn	0:3ac96e360672	337	VL53L1_Error VL53L1_unload_patch(
charlesmn	0:3ac96e360672	338	VL53L1_DEV Dev) {
charlesmn	0:3ac96e360672	339	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	340
charlesmn	0:3ac96e360672	341	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	342	status = VL53L1_WrByte(Dev,
charlesmn	0:3ac96e360672	343	VL53L1_FIRMWARE__ENABLE, 0x00);
charlesmn	0:3ac96e360672	344
charlesmn	0:3ac96e360672	345	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	346	VL53L1_disable_powerforce(Dev);
charlesmn	0:3ac96e360672	347
charlesmn	0:3ac96e360672	348	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	349	status = VL53L1_WrByte(Dev,
charlesmn	0:3ac96e360672	350	VL53L1_PATCH__CTRL, 0x00);
charlesmn	0:3ac96e360672	351
charlesmn	0:3ac96e360672	352	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	353	status = VL53L1_WrByte(Dev,
charlesmn	0:3ac96e360672	354	VL53L1_FIRMWARE__ENABLE, 0x01);
charlesmn	0:3ac96e360672	355
charlesmn	0:3ac96e360672	356	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	357
charlesmn	0:3ac96e360672	358	return status;
charlesmn	0:3ac96e360672	359	}
charlesmn	0:3ac96e360672	360
charlesmn	0:3ac96e360672	361	VL53L1_Error VL53L1_get_version(
charlesmn	0:3ac96e360672	362	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	363	VL53L1_ll_version_t *pdata)
charlesmn	0:3ac96e360672	364	{
charlesmn	0:3ac96e360672	365
charlesmn	0:3ac96e360672	366
charlesmn	0:3ac96e360672	367	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	368
charlesmn	0:3ac96e360672	369	VL53L1_init_version(Dev);
charlesmn	0:3ac96e360672	370
charlesmn	0:3ac96e360672	371	memcpy(pdata, &(pdev->version), sizeof(VL53L1_ll_version_t));
charlesmn	0:3ac96e360672	372
charlesmn	0:3ac96e360672	373	return VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	374	}
charlesmn	0:3ac96e360672	375
charlesmn	0:3ac96e360672	376
charlesmn	0:3ac96e360672	377	VL53L1_Error VL53L1_get_device_firmware_version(
charlesmn	0:3ac96e360672	378	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	379	uint16_t *pfw_version)
charlesmn	0:3ac96e360672	380	{
charlesmn	0:3ac96e360672	381
charlesmn	0:3ac96e360672	382
charlesmn	0:3ac96e360672	383	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	384
charlesmn	0:3ac96e360672	385	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	386
charlesmn	0:3ac96e360672	387	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	388	status = VL53L1_disable_firmware(Dev);
charlesmn	0:3ac96e360672	389
charlesmn	0:3ac96e360672	390	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	391	status = VL53L1_RdWord(
charlesmn	0:3ac96e360672	392	Dev,
charlesmn	0:3ac96e360672	393	VL53L1_MCU_GENERAL_PURPOSE__GP_0,
charlesmn	0:3ac96e360672	394	pfw_version);
charlesmn	0:3ac96e360672	395
charlesmn	0:3ac96e360672	396	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	397	status = VL53L1_enable_firmware(Dev);
charlesmn	0:3ac96e360672	398
charlesmn	0:3ac96e360672	399	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	400
charlesmn	0:3ac96e360672	401	return status;
charlesmn	0:3ac96e360672	402	}
charlesmn	0:3ac96e360672	403
charlesmn	0:3ac96e360672	404
charlesmn	0:3ac96e360672	405	VL53L1_Error VL53L1_data_init(
charlesmn	0:3ac96e360672	406	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	407	uint8_t read_p2p_data)
charlesmn	0:3ac96e360672	408	{
charlesmn	0:3ac96e360672	409
charlesmn	0:3ac96e360672	410
charlesmn	0:3ac96e360672	411	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	412	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	413	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	414	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	415	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	416
charlesmn	0:3ac96e360672	417
charlesmn	0:3ac96e360672	418
charlesmn	0:3ac96e360672	419	VL53L1_zone_objects_t *pobjects;
charlesmn	0:3ac96e360672	420
charlesmn	0:3ac96e360672	421	uint8_t i = 0;
charlesmn	0:3ac96e360672	422
charlesmn	0:3ac96e360672	423	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	424
charlesmn	0:3ac96e360672	425	VL53L1_init_ll_driver_state(
charlesmn	0:3ac96e360672	426	Dev,
charlesmn	0:3ac96e360672	427	VL53L1_DEVICESTATE_UNKNOWN);
charlesmn	0:3ac96e360672	428
charlesmn	0:3ac96e360672	429	pres->range_results.max_results = VL53L1_MAX_RANGE_RESULTS;
charlesmn	0:3ac96e360672	430	pres->range_results.active_results = 0;
charlesmn	0:3ac96e360672	431	pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn	0:3ac96e360672	432	pres->zone_results.active_zones = 0;
charlesmn	0:3ac96e360672	433
charlesmn	0:3ac96e360672	434	for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn	0:3ac96e360672	435	pobjects = &(pres->zone_results.VL53L1_p_002[i]);
charlesmn	0:3ac96e360672	436	pobjects->xmonitor.VL53L1_p_020 = 0;
charlesmn	0:3ac96e360672	437	pobjects->xmonitor.VL53L1_p_021 = 0;
charlesmn	0:3ac96e360672	438	pobjects->xmonitor.VL53L1_p_014 = 0;
charlesmn	0:3ac96e360672	439	pobjects->xmonitor.range_status =
charlesmn	0:3ac96e360672	440	VL53L1_DEVICEERROR_NOUPDATE;
charlesmn	0:3ac96e360672	441	}
charlesmn	0:3ac96e360672	442
charlesmn	0:3ac96e360672	443
charlesmn	0:3ac96e360672	444
charlesmn	0:3ac96e360672	445	pres->zone_hists.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn	0:3ac96e360672	446	pres->zone_hists.active_zones = 0;
charlesmn	0:3ac96e360672	447
charlesmn	0:3ac96e360672	448
charlesmn	0:3ac96e360672	449
charlesmn	0:3ac96e360672	450	pres->zone_cal.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn	0:3ac96e360672	451	pres->zone_cal.active_zones = 0;
charlesmn	0:3ac96e360672	452	for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn	0:3ac96e360672	453	pres->zone_cal.VL53L1_p_002[i].no_of_samples = 0;
charlesmn	0:3ac96e360672	454	pres->zone_cal.VL53L1_p_002[i].effective_spads = 0;
charlesmn	0:3ac96e360672	455	pres->zone_cal.VL53L1_p_002[i].peak_rate_mcps = 0;
charlesmn	0:3ac96e360672	456	pres->zone_cal.VL53L1_p_002[i].median_range_mm = 0;
charlesmn	0:3ac96e360672	457	pres->zone_cal.VL53L1_p_002[i].range_mm_offset = 0;
charlesmn	0:3ac96e360672	458	}
charlesmn	0:3ac96e360672	459
charlesmn	0:3ac96e360672	460	pdev->wait_method = VL53L1_WAIT_METHOD_BLOCKING;
charlesmn	0:3ac96e360672	461	pdev->preset_mode = VL53L1_DEVICEPRESETMODE_STANDARD_RANGING;
charlesmn	0:3ac96e360672	462	pdev->zone_preset = VL53L1_DEVICEZONEPRESET_NONE;
charlesmn	0:3ac96e360672	463	pdev->measurement_mode = VL53L1_DEVICEMEASUREMENTMODE_STOP;
charlesmn	0:3ac96e360672	464
charlesmn	0:3ac96e360672	465	pdev->offset_calibration_mode =
charlesmn	0:3ac96e360672	466	VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD;
charlesmn	0:3ac96e360672	467	pdev->offset_correction_mode =
charlesmn	0:3ac96e360672	468	VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS;
charlesmn	0:3ac96e360672	469	pdev->dmax_mode =
charlesmn	0:3ac96e360672	470	VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA;
charlesmn	0:3ac96e360672	471
charlesmn	0:3ac96e360672	472	pdev->phasecal_config_timeout_us = 1000;
charlesmn	0:3ac96e360672	473	pdev->mm_config_timeout_us = 2000;
charlesmn	0:3ac96e360672	474	pdev->range_config_timeout_us = 13000;
charlesmn	0:3ac96e360672	475	pdev->inter_measurement_period_ms = 100;
charlesmn	0:3ac96e360672	476	pdev->dss_config__target_total_rate_mcps = 0x0A00;
charlesmn	0:3ac96e360672	477	pdev->debug_mode = 0x00;
charlesmn	0:3ac96e360672	478
charlesmn	0:3ac96e360672	479	pdev->offset_results.max_results = VL53L1_MAX_OFFSET_RANGE_RESULTS;
charlesmn	0:3ac96e360672	480	pdev->offset_results.active_results = 0;
charlesmn	0:3ac96e360672	481
charlesmn	0:3ac96e360672	482
charlesmn	0:3ac96e360672	483
charlesmn	0:3ac96e360672	484	pdev->gain_cal.standard_ranging_gain_factor =
charlesmn	0:3ac96e360672	485	VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR_DEFAULT;
charlesmn	0:3ac96e360672	486	pdev->gain_cal.histogram_ranging_gain_factor =
charlesmn	0:3ac96e360672	487	VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT;
charlesmn	0:3ac96e360672	488
charlesmn	0:3ac96e360672	489
charlesmn	0:3ac96e360672	490	VL53L1_init_version(Dev);
charlesmn	0:3ac96e360672	491
charlesmn	0:3ac96e360672	492
charlesmn	0:3ac96e360672	493	memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
charlesmn	0:3ac96e360672	494	pdev->bin_rec_pos = 0;
charlesmn	0:3ac96e360672	495	pdev->pos_before_next_recom = 0;
charlesmn	0:3ac96e360672	496
charlesmn	0:3ac96e360672	497
charlesmn	0:3ac96e360672	498
charlesmn	0:3ac96e360672	499	if (read_p2p_data > 0 && status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	500	status = VL53L1_read_p2p_data(Dev);
charlesmn	0:3ac96e360672	501
charlesmn	0:3ac96e360672	502
charlesmn	0:3ac96e360672	503	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	504	status = VL53L1_init_refspadchar_config_struct(
charlesmn	0:3ac96e360672	505	&(pdev->refspadchar));
charlesmn	0:3ac96e360672	506
charlesmn	0:3ac96e360672	507
charlesmn	0:3ac96e360672	508	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	509	status = VL53L1_init_ssc_config_struct(
charlesmn	0:3ac96e360672	510	&(pdev->ssc_cfg));
charlesmn	0:3ac96e360672	511
charlesmn	0:3ac96e360672	512
charlesmn	0:3ac96e360672	513	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	514	status = VL53L1_init_xtalk_config_struct(
charlesmn	0:3ac96e360672	515	&(pdev->customer),
charlesmn	0:3ac96e360672	516	&(pdev->xtalk_cfg));
charlesmn	0:3ac96e360672	517
charlesmn	0:3ac96e360672	518
charlesmn	0:3ac96e360672	519	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	520	status = VL53L1_init_xtalk_extract_config_struct(
charlesmn	0:3ac96e360672	521	&(pdev->xtalk_extract_cfg));
charlesmn	0:3ac96e360672	522
charlesmn	0:3ac96e360672	523
charlesmn	0:3ac96e360672	524	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	525	status = VL53L1_init_offset_cal_config_struct(
charlesmn	0:3ac96e360672	526	&(pdev->offsetcal_cfg));
charlesmn	0:3ac96e360672	527
charlesmn	0:3ac96e360672	528
charlesmn	0:3ac96e360672	529	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	530	status = VL53L1_init_zone_cal_config_struct(
charlesmn	0:3ac96e360672	531	&(pdev->zonecal_cfg));
charlesmn	0:3ac96e360672	532
charlesmn	0:3ac96e360672	533
charlesmn	0:3ac96e360672	534	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	535	status = VL53L1_init_hist_post_process_config_struct(
charlesmn	0:3ac96e360672	536	pdev->xtalk_cfg.global_crosstalk_compensation_enable,
charlesmn	0:3ac96e360672	537	&(pdev->histpostprocess));
charlesmn	0:3ac96e360672	538
charlesmn	0:3ac96e360672	539
charlesmn	0:3ac96e360672	540	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	541	status = VL53L1_init_hist_gen3_dmax_config_struct(
charlesmn	0:3ac96e360672	542	&(pdev->dmax_cfg));
charlesmn	0:3ac96e360672	543
charlesmn	0:3ac96e360672	544
charlesmn	0:3ac96e360672	545	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	546	status = VL53L1_init_tuning_parm_storage_struct(
charlesmn	0:3ac96e360672	547	&(pdev->tuning_parms));
charlesmn	0:3ac96e360672	548
charlesmn	0:3ac96e360672	549
charlesmn	0:3ac96e360672	550
charlesmn	0:3ac96e360672	551	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	552	status = VL53L1_set_preset_mode(
charlesmn	0:3ac96e360672	553	Dev,
charlesmn	0:3ac96e360672	554	pdev->preset_mode,
charlesmn	0:3ac96e360672	555	pdev->dss_config__target_total_rate_mcps,
charlesmn	0:3ac96e360672	556	pdev->phasecal_config_timeout_us,
charlesmn	0:3ac96e360672	557	pdev->mm_config_timeout_us,
charlesmn	0:3ac96e360672	558	pdev->range_config_timeout_us,
charlesmn	0:3ac96e360672	559	pdev->inter_measurement_period_ms);
charlesmn	0:3ac96e360672	560
charlesmn	0:3ac96e360672	561
charlesmn	0:3ac96e360672	562	VL53L1_init_histogram_bin_data_struct(
charlesmn	0:3ac96e360672	563	0,
charlesmn	0:3ac96e360672	564	VL53L1_HISTOGRAM_BUFFER_SIZE,
charlesmn	0:3ac96e360672	565	&(pdev->hist_data));
charlesmn	0:3ac96e360672	566
charlesmn	0:3ac96e360672	567	VL53L1_init_histogram_bin_data_struct(
charlesmn	0:3ac96e360672	568	0,
charlesmn	0:3ac96e360672	569	VL53L1_HISTOGRAM_BUFFER_SIZE,
charlesmn	0:3ac96e360672	570	&(pdev->hist_xtalk));
charlesmn	0:3ac96e360672	571
charlesmn	0:3ac96e360672	572
charlesmn	0:3ac96e360672	573	VL53L1_init_xtalk_bin_data_struct(
charlesmn	0:3ac96e360672	574	0,
charlesmn	0:3ac96e360672	575	VL53L1_XTALK_HISTO_BINS,
charlesmn	0:3ac96e360672	576	&(pdev->xtalk_shapes.xtalk_shape));
charlesmn	0:3ac96e360672	577
charlesmn	0:3ac96e360672	578
charlesmn	0:3ac96e360672	579
charlesmn	0:3ac96e360672	580	VL53L1_xtalk_cal_data_init(
charlesmn	0:3ac96e360672	581	Dev
charlesmn	0:3ac96e360672	582	);
charlesmn	0:3ac96e360672	583
charlesmn	0:3ac96e360672	584
charlesmn	0:3ac96e360672	585
charlesmn	0:3ac96e360672	586	VL53L1_dynamic_xtalk_correction_data_init(
charlesmn	0:3ac96e360672	587	Dev
charlesmn	0:3ac96e360672	588	);
charlesmn	0:3ac96e360672	589
charlesmn	0:3ac96e360672	590
charlesmn	0:3ac96e360672	591
charlesmn	0:3ac96e360672	592	VL53L1_low_power_auto_data_init(
charlesmn	0:3ac96e360672	593	Dev
charlesmn	0:3ac96e360672	594	);
charlesmn	0:3ac96e360672	595
charlesmn	0:3ac96e360672	596	#ifdef VL53L1_LOG_ENABLE
charlesmn	0:3ac96e360672	597
charlesmn	0:3ac96e360672	598
charlesmn	0:3ac96e360672	599
charlesmn	0:3ac96e360672	600	VL53L1_print_static_nvm_managed(
charlesmn	0:3ac96e360672	601	&(pdev->stat_nvm),
charlesmn	0:3ac96e360672	602	"data_init():pdev->lldata.stat_nvm.",
charlesmn	0:3ac96e360672	603	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	604
charlesmn	0:3ac96e360672	605	VL53L1_print_customer_nvm_managed(
charlesmn	0:3ac96e360672	606	&(pdev->customer),
charlesmn	0:3ac96e360672	607	"data_init():pdev->lldata.customer.",
charlesmn	0:3ac96e360672	608	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	609
charlesmn	0:3ac96e360672	610	VL53L1_print_nvm_copy_data(
charlesmn	0:3ac96e360672	611	&(pdev->nvm_copy_data),
charlesmn	0:3ac96e360672	612	"data_init():pdev->lldata.nvm_copy_data.",
charlesmn	0:3ac96e360672	613	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	614
charlesmn	0:3ac96e360672	615	VL53L1_print_dmax_calibration_data(
charlesmn	0:3ac96e360672	616	&(pdev->fmt_dmax_cal),
charlesmn	0:3ac96e360672	617	"data_init():pdev->lldata.fmt_dmax_cal.",
charlesmn	0:3ac96e360672	618	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	619
charlesmn	0:3ac96e360672	620	VL53L1_print_dmax_calibration_data(
charlesmn	0:3ac96e360672	621	&(pdev->cust_dmax_cal),
charlesmn	0:3ac96e360672	622	"data_init():pdev->lldata.cust_dmax_cal.",
charlesmn	0:3ac96e360672	623	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	624
charlesmn	0:3ac96e360672	625	VL53L1_print_additional_offset_cal_data(
charlesmn	0:3ac96e360672	626	&(pdev->add_off_cal_data),
charlesmn	0:3ac96e360672	627	"data_init():pdev->lldata.add_off_cal_data.",
charlesmn	0:3ac96e360672	628	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	629
charlesmn	0:3ac96e360672	630	VL53L1_print_user_zone(
charlesmn	0:3ac96e360672	631	&(pdev->mm_roi),
charlesmn	0:3ac96e360672	632	"data_init():pdev->lldata.mm_roi.",
charlesmn	0:3ac96e360672	633	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	634
charlesmn	0:3ac96e360672	635	VL53L1_print_optical_centre(
charlesmn	0:3ac96e360672	636	&(pdev->optical_centre),
charlesmn	0:3ac96e360672	637	"data_init():pdev->lldata.optical_centre.",
charlesmn	0:3ac96e360672	638	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	639
charlesmn	0:3ac96e360672	640	VL53L1_print_cal_peak_rate_map(
charlesmn	0:3ac96e360672	641	&(pdev->cal_peak_rate_map),
charlesmn	0:3ac96e360672	642	"data_init():pdev->lldata.cal_peak_rate_map.",
charlesmn	0:3ac96e360672	643	VL53L1_TRACE_MODULE_DATA_INIT);
charlesmn	0:3ac96e360672	644
charlesmn	0:3ac96e360672	645	#endif
charlesmn	0:3ac96e360672	646
charlesmn	0:3ac96e360672	647	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	648
charlesmn	0:3ac96e360672	649	return status;
charlesmn	0:3ac96e360672	650	}
charlesmn	0:3ac96e360672	651
charlesmn	0:3ac96e360672	652
charlesmn	0:3ac96e360672	653	VL53L1_Error VL53L1_read_p2p_data(
charlesmn	0:3ac96e360672	654	VL53L1_DEV Dev)
charlesmn	0:3ac96e360672	655	{
charlesmn	0:3ac96e360672	656
charlesmn	0:3ac96e360672	657
charlesmn	0:3ac96e360672	658
charlesmn	0:3ac96e360672	659	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	660	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	661	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	662	VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn	0:3ac96e360672	663	VL53L1_additional_offset_cal_data_t *pCD = &(pdev->add_off_cal_data);
charlesmn	0:3ac96e360672	664
charlesmn	0:3ac96e360672	665	VL53L1_decoded_nvm_fmt_range_data_t fmt_rrd;
charlesmn	0:3ac96e360672	666
charlesmn	0:3ac96e360672	667	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	668
charlesmn	0:3ac96e360672	669	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	670	status = VL53L1_get_static_nvm_managed(
charlesmn	0:3ac96e360672	671	Dev,
charlesmn	0:3ac96e360672	672	&(pdev->stat_nvm));
charlesmn	0:3ac96e360672	673
charlesmn	0:3ac96e360672	674	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	675	status = VL53L1_get_customer_nvm_managed(
charlesmn	0:3ac96e360672	676	Dev,
charlesmn	0:3ac96e360672	677	&(pdev->customer));
charlesmn	0:3ac96e360672	678
charlesmn	0:3ac96e360672	679	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	680
charlesmn	0:3ac96e360672	681	status = VL53L1_get_nvm_copy_data(
charlesmn	0:3ac96e360672	682	Dev,
charlesmn	0:3ac96e360672	683	&(pdev->nvm_copy_data));
charlesmn	0:3ac96e360672	684
charlesmn	0:3ac96e360672	685
charlesmn	0:3ac96e360672	686	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	687	VL53L1_copy_rtn_good_spads_to_buffer(
charlesmn	0:3ac96e360672	688	&(pdev->nvm_copy_data),
charlesmn	0:3ac96e360672	689	&(pdev->rtn_good_spads[0]));
charlesmn	0:3ac96e360672	690	}
charlesmn	0:3ac96e360672	691
charlesmn	0:3ac96e360672	692
charlesmn	0:3ac96e360672	693
charlesmn	0:3ac96e360672	694	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	695	pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	696	pN->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	697	pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	698	pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	699	pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	700	pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	701	}
charlesmn	0:3ac96e360672	702
charlesmn	0:3ac96e360672	703
charlesmn	0:3ac96e360672	704	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	705	status =
charlesmn	0:3ac96e360672	706	VL53L1_read_nvm_optical_centre(
charlesmn	0:3ac96e360672	707	Dev,
charlesmn	0:3ac96e360672	708	&(pdev->optical_centre));
charlesmn	0:3ac96e360672	709
charlesmn	0:3ac96e360672	710
charlesmn	0:3ac96e360672	711
charlesmn	0:3ac96e360672	712	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	713	status =
charlesmn	0:3ac96e360672	714	VL53L1_read_nvm_cal_peak_rate_map(
charlesmn	0:3ac96e360672	715	Dev,
charlesmn	0:3ac96e360672	716	&(pdev->cal_peak_rate_map));
charlesmn	0:3ac96e360672	717
charlesmn	0:3ac96e360672	718
charlesmn	0:3ac96e360672	719
charlesmn	0:3ac96e360672	720	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	721
charlesmn	0:3ac96e360672	722	status =
charlesmn	0:3ac96e360672	723	VL53L1_read_nvm_additional_offset_cal_data(
charlesmn	0:3ac96e360672	724	Dev,
charlesmn	0:3ac96e360672	725	&(pdev->add_off_cal_data));
charlesmn	0:3ac96e360672	726
charlesmn	0:3ac96e360672	727
charlesmn	0:3ac96e360672	728
charlesmn	0:3ac96e360672	729	if (pCD->result__mm_inner_peak_signal_count_rtn_mcps == 0 &&
charlesmn	0:3ac96e360672	730	pCD->result__mm_outer_peak_signal_count_rtn_mcps == 0) {
charlesmn	0:3ac96e360672	731
charlesmn	0:3ac96e360672	732	pCD->result__mm_inner_peak_signal_count_rtn_mcps
charlesmn	0:3ac96e360672	733	= 0x0080;
charlesmn	0:3ac96e360672	734	pCD->result__mm_outer_peak_signal_count_rtn_mcps
charlesmn	0:3ac96e360672	735	= 0x0180;
charlesmn	0:3ac96e360672	736
charlesmn	0:3ac96e360672	737
charlesmn	0:3ac96e360672	738
charlesmn	0:3ac96e360672	739	VL53L1_calc_mm_effective_spads(
charlesmn	0:3ac96e360672	740	pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn	0:3ac96e360672	741	pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
charlesmn	0:3ac96e360672	742	0xC7,
charlesmn	0:3ac96e360672	743	0xFF,
charlesmn	0:3ac96e360672	744	&(pdev->rtn_good_spads[0]),
charlesmn	0:3ac96e360672	745	VL53L1_RTN_SPAD_APERTURE_TRANSMISSION,
charlesmn	0:3ac96e360672	746	&(pCD->result__mm_inner_actual_effective_spads),
charlesmn	0:3ac96e360672	747	&(pCD->result__mm_outer_actual_effective_spads));
charlesmn	0:3ac96e360672	748	}
charlesmn	0:3ac96e360672	749	}
charlesmn	0:3ac96e360672	750
charlesmn	0:3ac96e360672	751
charlesmn	0:3ac96e360672	752	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	753
charlesmn	0:3ac96e360672	754	status =
charlesmn	0:3ac96e360672	755	VL53L1_read_nvm_fmt_range_results_data(
charlesmn	0:3ac96e360672	756	Dev,
charlesmn	0:3ac96e360672	757	VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK,
charlesmn	0:3ac96e360672	758	&fmt_rrd);
charlesmn	0:3ac96e360672	759
charlesmn	0:3ac96e360672	760	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	761	pdev->fmt_dmax_cal.ref__actual_effective_spads =
charlesmn	0:3ac96e360672	762	fmt_rrd.result__actual_effective_rtn_spads;
charlesmn	0:3ac96e360672	763	pdev->fmt_dmax_cal.ref__peak_signal_count_rate_mcps =
charlesmn	0:3ac96e360672	764	fmt_rrd.result__peak_signal_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	765	pdev->fmt_dmax_cal.ref__distance_mm =
charlesmn	0:3ac96e360672	766	fmt_rrd.measured_distance_mm;
charlesmn	0:3ac96e360672	767
charlesmn	0:3ac96e360672	768
charlesmn	0:3ac96e360672	769	if (pdev->cal_peak_rate_map.cal_reflectance_pc != 0) {
charlesmn	0:3ac96e360672	770	pdev->fmt_dmax_cal.ref_reflectance_pc =
charlesmn	0:3ac96e360672	771	pdev->cal_peak_rate_map.cal_reflectance_pc;
charlesmn	0:3ac96e360672	772	} else {
charlesmn	0:3ac96e360672	773	pdev->fmt_dmax_cal.ref_reflectance_pc = 0x0014;
charlesmn	0:3ac96e360672	774	}
charlesmn	0:3ac96e360672	775
charlesmn	0:3ac96e360672	776
charlesmn	0:3ac96e360672	777	pdev->fmt_dmax_cal.coverglass_transmission = 0x0100;
charlesmn	0:3ac96e360672	778	}
charlesmn	0:3ac96e360672	779	}
charlesmn	0:3ac96e360672	780
charlesmn	0:3ac96e360672	781
charlesmn	0:3ac96e360672	782	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	783	status =
charlesmn	0:3ac96e360672	784	VL53L1_RdWord(
charlesmn	0:3ac96e360672	785	Dev,
charlesmn	0:3ac96e360672	786	VL53L1_RESULT__OSC_CALIBRATE_VAL,
charlesmn	0:3ac96e360672	787	&(pdev->dbg_results.result__osc_calibrate_val));
charlesmn	0:3ac96e360672	788
charlesmn	0:3ac96e360672	789
charlesmn	0:3ac96e360672	790
charlesmn	0:3ac96e360672	791	if (pdev->stat_nvm.osc_measured__fast_osc__frequency < 0x1000) {
charlesmn	0:3ac96e360672	792	trace_print(
charlesmn	0:3ac96e360672	793	VL53L1_TRACE_LEVEL_WARNING,
charlesmn	0:3ac96e360672	794	"\nInvalid %s value (0x%04X) - forcing to 0x%04X\n\n",
charlesmn	0:3ac96e360672	795	"pdev->stat_nvm.osc_measured__fast_osc__frequency",
charlesmn	0:3ac96e360672	796	pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn	0:3ac96e360672	797	0xBCCC);
charlesmn	0:3ac96e360672	798	pdev->stat_nvm.osc_measured__fast_osc__frequency = 0xBCCC;
charlesmn	0:3ac96e360672	799	}
charlesmn	0:3ac96e360672	800
charlesmn	0:3ac96e360672	801
charlesmn	0:3ac96e360672	802
charlesmn	0:3ac96e360672	803	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	804	status =
charlesmn	0:3ac96e360672	805	VL53L1_get_mode_mitigation_roi(
charlesmn	0:3ac96e360672	806	Dev,
charlesmn	0:3ac96e360672	807	&(pdev->mm_roi));
charlesmn	0:3ac96e360672	808
charlesmn	0:3ac96e360672	809
charlesmn	0:3ac96e360672	810
charlesmn	0:3ac96e360672	811	if (pdev->optical_centre.x_centre == 0 &&
charlesmn	0:3ac96e360672	812	pdev->optical_centre.y_centre == 0) {
charlesmn	0:3ac96e360672	813	pdev->optical_centre.x_centre =
charlesmn	0:3ac96e360672	814	pdev->mm_roi.x_centre << 4;
charlesmn	0:3ac96e360672	815	pdev->optical_centre.y_centre =
charlesmn	0:3ac96e360672	816	pdev->mm_roi.y_centre << 4;
charlesmn	0:3ac96e360672	817	}
charlesmn	0:3ac96e360672	818
charlesmn	0:3ac96e360672	819	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	820
charlesmn	0:3ac96e360672	821	return status;
charlesmn	0:3ac96e360672	822	}
charlesmn	0:3ac96e360672	823
charlesmn	0:3ac96e360672	824
charlesmn	0:3ac96e360672	825	VL53L1_Error VL53L1_software_reset(
charlesmn	0:3ac96e360672	826	VL53L1_DEV Dev)
charlesmn	0:3ac96e360672	827	{
charlesmn	0:3ac96e360672	828
charlesmn	0:3ac96e360672	829
charlesmn	0:3ac96e360672	830	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	831
charlesmn	0:3ac96e360672	832	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	833
charlesmn	0:3ac96e360672	834
charlesmn	0:3ac96e360672	835	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	836	status = VL53L1_WrByte(
charlesmn	0:3ac96e360672	837	Dev,
charlesmn	0:3ac96e360672	838	VL53L1_SOFT_RESET,
charlesmn	0:3ac96e360672	839	0x00);
charlesmn	0:3ac96e360672	840
charlesmn	0:3ac96e360672	841
charlesmn	0:3ac96e360672	842	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	843	status =
charlesmn	0:3ac96e360672	844	VL53L1_WaitUs(
charlesmn	0:3ac96e360672	845	Dev,
charlesmn	0:3ac96e360672	846	VL53L1_SOFTWARE_RESET_DURATION_US);
charlesmn	0:3ac96e360672	847
charlesmn	0:3ac96e360672	848
charlesmn	0:3ac96e360672	849	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	850	status = VL53L1_WrByte(
charlesmn	0:3ac96e360672	851	Dev,
charlesmn	0:3ac96e360672	852	VL53L1_SOFT_RESET,
charlesmn	0:3ac96e360672	853	0x01);
charlesmn	0:3ac96e360672	854
charlesmn	0:3ac96e360672	855
charlesmn	0:3ac96e360672	856	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	857	status = VL53L1_wait_for_boot_completion(Dev);
charlesmn	0:3ac96e360672	858
charlesmn	0:3ac96e360672	859	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	860
charlesmn	0:3ac96e360672	861	return status;
charlesmn	0:3ac96e360672	862	}
charlesmn	0:3ac96e360672	863
charlesmn	0:3ac96e360672	864
charlesmn	0:3ac96e360672	865	VL53L1_Error VL53L1_set_part_to_part_data(
charlesmn	0:3ac96e360672	866	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	867	VL53L1_calibration_data_t *pcal_data)
charlesmn	0:3ac96e360672	868	{
charlesmn	0:3ac96e360672	869
charlesmn	0:3ac96e360672	870
charlesmn	0:3ac96e360672	871	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	872	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	873	VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn	0:3ac96e360672	874	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	875	VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn	0:3ac96e360672	876
charlesmn	0:3ac96e360672	877	uint32_t tempu32;
charlesmn	0:3ac96e360672	878
charlesmn	0:3ac96e360672	879	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	880
charlesmn	0:3ac96e360672	881	if (pcal_data->struct_version !=
charlesmn	0:3ac96e360672	882	VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION) {
charlesmn	0:3ac96e360672	883	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	884	}
charlesmn	0:3ac96e360672	885
charlesmn	0:3ac96e360672	886	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	887
charlesmn	0:3ac96e360672	888
charlesmn	0:3ac96e360672	889	memcpy(
charlesmn	0:3ac96e360672	890	&(pdev->customer),
charlesmn	0:3ac96e360672	891	&(pcal_data->customer),
charlesmn	0:3ac96e360672	892	sizeof(VL53L1_customer_nvm_managed_t));
charlesmn	0:3ac96e360672	893
charlesmn	0:3ac96e360672	894
charlesmn	0:3ac96e360672	895	memcpy(
charlesmn	0:3ac96e360672	896	&(pdev->add_off_cal_data),
charlesmn	0:3ac96e360672	897	&(pcal_data->add_off_cal_data),
charlesmn	0:3ac96e360672	898	sizeof(VL53L1_additional_offset_cal_data_t));
charlesmn	0:3ac96e360672	899
charlesmn	0:3ac96e360672	900
charlesmn	0:3ac96e360672	901	memcpy(
charlesmn	0:3ac96e360672	902	&(pdev->fmt_dmax_cal),
charlesmn	0:3ac96e360672	903	&(pcal_data->fmt_dmax_cal),
charlesmn	0:3ac96e360672	904	sizeof(VL53L1_dmax_calibration_data_t));
charlesmn	0:3ac96e360672	905
charlesmn	0:3ac96e360672	906
charlesmn	0:3ac96e360672	907	memcpy(
charlesmn	0:3ac96e360672	908	&(pdev->cust_dmax_cal),
charlesmn	0:3ac96e360672	909	&(pcal_data->cust_dmax_cal),
charlesmn	0:3ac96e360672	910	sizeof(VL53L1_dmax_calibration_data_t));
charlesmn	0:3ac96e360672	911
charlesmn	0:3ac96e360672	912
charlesmn	0:3ac96e360672	913	memcpy(
charlesmn	0:3ac96e360672	914	&(pdev->xtalk_shapes),
charlesmn	0:3ac96e360672	915	&(pcal_data->xtalkhisto),
charlesmn	0:3ac96e360672	916	sizeof(VL53L1_xtalk_histogram_data_t));
charlesmn	0:3ac96e360672	917
charlesmn	0:3ac96e360672	918
charlesmn	0:3ac96e360672	919	memcpy(
charlesmn	0:3ac96e360672	920	&(pdev->gain_cal),
charlesmn	0:3ac96e360672	921	&(pcal_data->gain_cal),
charlesmn	0:3ac96e360672	922	sizeof(VL53L1_gain_calibration_data_t));
charlesmn	0:3ac96e360672	923
charlesmn	0:3ac96e360672	924
charlesmn	0:3ac96e360672	925	memcpy(
charlesmn	0:3ac96e360672	926	&(pdev->cal_peak_rate_map),
charlesmn	0:3ac96e360672	927	&(pcal_data->cal_peak_rate_map),
charlesmn	0:3ac96e360672	928	sizeof(VL53L1_cal_peak_rate_map_t));
charlesmn	0:3ac96e360672	929
charlesmn	0:3ac96e360672	930
charlesmn	0:3ac96e360672	931	memcpy(
charlesmn	0:3ac96e360672	932	&(pdev->per_vcsel_cal_data),
charlesmn	0:3ac96e360672	933	&(pcal_data->per_vcsel_cal_data),
charlesmn	0:3ac96e360672	934	sizeof(VL53L1_per_vcsel_period_offset_cal_data_t));
charlesmn	0:3ac96e360672	935
charlesmn	0:3ac96e360672	936
charlesmn	0:3ac96e360672	937
charlesmn	0:3ac96e360672	938	pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	939	pN->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	940	pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	941	pN->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	942	pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	943	pN->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	944
charlesmn	0:3ac96e360672	945	pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	946	VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn	0:3ac96e360672	947	pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	948	pC->histogram_mode_crosstalk_margin_kcps);
charlesmn	0:3ac96e360672	949
charlesmn	0:3ac96e360672	950	pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	951	pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	952	pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	953	pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	954
charlesmn	0:3ac96e360672	955
charlesmn	0:3ac96e360672	956
charlesmn	0:3ac96e360672	957	if (pC->global_crosstalk_compensation_enable == 0x00) {
charlesmn	0:3ac96e360672	958	pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	959	0x00;
charlesmn	0:3ac96e360672	960	pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	961	0x00;
charlesmn	0:3ac96e360672	962	pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	963	0x00;
charlesmn	0:3ac96e360672	964	} else {
charlesmn	0:3ac96e360672	965	tempu32 =
charlesmn	0:3ac96e360672	966	VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn	0:3ac96e360672	967	pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	968	pC->lite_mode_crosstalk_margin_kcps);
charlesmn	0:3ac96e360672	969
charlesmn	0:3ac96e360672	970
charlesmn	0:3ac96e360672	971	if (tempu32 > 0xFFFF)
charlesmn	0:3ac96e360672	972	tempu32 = 0xFFFF;
charlesmn	0:3ac96e360672	973
charlesmn	0:3ac96e360672	974	pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	975	(uint16_t)tempu32;
charlesmn	0:3ac96e360672	976	}
charlesmn	0:3ac96e360672	977	}
charlesmn	0:3ac96e360672	978
charlesmn	0:3ac96e360672	979	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	980
charlesmn	0:3ac96e360672	981	return status;
charlesmn	0:3ac96e360672	982	}
charlesmn	0:3ac96e360672	983
charlesmn	0:3ac96e360672	984
charlesmn	0:3ac96e360672	985	VL53L1_Error VL53L1_get_part_to_part_data(
charlesmn	0:3ac96e360672	986	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	987	VL53L1_calibration_data_t *pcal_data)
charlesmn	0:3ac96e360672	988	{
charlesmn	0:3ac96e360672	989
charlesmn	0:3ac96e360672	990
charlesmn	0:3ac96e360672	991	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	992	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	993	VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn	0:3ac96e360672	994	VL53L1_customer_nvm_managed_t *pCN = &(pcal_data->customer);
charlesmn	0:3ac96e360672	995
charlesmn	0:3ac96e360672	996	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	997
charlesmn	0:3ac96e360672	998	pcal_data->struct_version =
charlesmn	0:3ac96e360672	999	VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION;
charlesmn	0:3ac96e360672	1000
charlesmn	0:3ac96e360672	1001
charlesmn	0:3ac96e360672	1002	memcpy(
charlesmn	0:3ac96e360672	1003	&(pcal_data->customer),
charlesmn	0:3ac96e360672	1004	&(pdev->customer),
charlesmn	0:3ac96e360672	1005	sizeof(VL53L1_customer_nvm_managed_t));
charlesmn	0:3ac96e360672	1006
charlesmn	0:3ac96e360672	1007
charlesmn	0:3ac96e360672	1008
charlesmn	0:3ac96e360672	1009
charlesmn	0:3ac96e360672	1010	if (pC->algo__crosstalk_compensation_plane_offset_kcps > 0xFFFF) {
charlesmn	0:3ac96e360672	1011	pCN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	1012	0xFFFF;
charlesmn	0:3ac96e360672	1013	} else {
charlesmn	0:3ac96e360672	1014	pCN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	1015	(uint16_t)pC->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	1016	}
charlesmn	0:3ac96e360672	1017	pCN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	1018	pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	1019	pCN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	1020	pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	1021
charlesmn	0:3ac96e360672	1022
charlesmn	0:3ac96e360672	1023	memcpy(
charlesmn	0:3ac96e360672	1024	&(pcal_data->fmt_dmax_cal),
charlesmn	0:3ac96e360672	1025	&(pdev->fmt_dmax_cal),
charlesmn	0:3ac96e360672	1026	sizeof(VL53L1_dmax_calibration_data_t));
charlesmn	0:3ac96e360672	1027
charlesmn	0:3ac96e360672	1028
charlesmn	0:3ac96e360672	1029	memcpy(
charlesmn	0:3ac96e360672	1030	&(pcal_data->cust_dmax_cal),
charlesmn	0:3ac96e360672	1031	&(pdev->cust_dmax_cal),
charlesmn	0:3ac96e360672	1032	sizeof(VL53L1_dmax_calibration_data_t));
charlesmn	0:3ac96e360672	1033
charlesmn	0:3ac96e360672	1034
charlesmn	0:3ac96e360672	1035	memcpy(
charlesmn	0:3ac96e360672	1036	&(pcal_data->add_off_cal_data),
charlesmn	0:3ac96e360672	1037	&(pdev->add_off_cal_data),
charlesmn	0:3ac96e360672	1038	sizeof(VL53L1_additional_offset_cal_data_t));
charlesmn	0:3ac96e360672	1039
charlesmn	0:3ac96e360672	1040
charlesmn	0:3ac96e360672	1041	memcpy(
charlesmn	0:3ac96e360672	1042	&(pcal_data->optical_centre),
charlesmn	0:3ac96e360672	1043	&(pdev->optical_centre),
charlesmn	0:3ac96e360672	1044	sizeof(VL53L1_optical_centre_t));
charlesmn	0:3ac96e360672	1045
charlesmn	0:3ac96e360672	1046
charlesmn	0:3ac96e360672	1047	memcpy(
charlesmn	0:3ac96e360672	1048	&(pcal_data->xtalkhisto),
charlesmn	0:3ac96e360672	1049	&(pdev->xtalk_shapes),
charlesmn	0:3ac96e360672	1050	sizeof(VL53L1_xtalk_histogram_data_t));
charlesmn	0:3ac96e360672	1051
charlesmn	0:3ac96e360672	1052
charlesmn	0:3ac96e360672	1053	memcpy(
charlesmn	0:3ac96e360672	1054	&(pcal_data->gain_cal),
charlesmn	0:3ac96e360672	1055	&(pdev->gain_cal),
charlesmn	0:3ac96e360672	1056	sizeof(VL53L1_gain_calibration_data_t));
charlesmn	0:3ac96e360672	1057
charlesmn	0:3ac96e360672	1058
charlesmn	0:3ac96e360672	1059	memcpy(
charlesmn	0:3ac96e360672	1060	&(pcal_data->cal_peak_rate_map),
charlesmn	0:3ac96e360672	1061	&(pdev->cal_peak_rate_map),
charlesmn	0:3ac96e360672	1062	sizeof(VL53L1_cal_peak_rate_map_t));
charlesmn	0:3ac96e360672	1063
charlesmn	0:3ac96e360672	1064
charlesmn	0:3ac96e360672	1065	memcpy(
charlesmn	0:3ac96e360672	1066	&(pcal_data->per_vcsel_cal_data),
charlesmn	0:3ac96e360672	1067	&(pdev->per_vcsel_cal_data),
charlesmn	0:3ac96e360672	1068	sizeof(VL53L1_per_vcsel_period_offset_cal_data_t));
charlesmn	0:3ac96e360672	1069
charlesmn	0:3ac96e360672	1070	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1071
charlesmn	0:3ac96e360672	1072	return status;
charlesmn	0:3ac96e360672	1073	}
charlesmn	0:3ac96e360672	1074
charlesmn	0:3ac96e360672	1075
charlesmn	0:3ac96e360672	1076	VL53L1_Error VL53L1_set_inter_measurement_period_ms(
charlesmn	0:3ac96e360672	1077	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1078	uint32_t inter_measurement_period_ms)
charlesmn	0:3ac96e360672	1079	{
charlesmn	0:3ac96e360672	1080
charlesmn	0:3ac96e360672	1081
charlesmn	0:3ac96e360672	1082	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1083	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1084
charlesmn	0:3ac96e360672	1085	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1086
charlesmn	0:3ac96e360672	1087	if (pdev->dbg_results.result__osc_calibrate_val == 0)
charlesmn	0:3ac96e360672	1088	status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn	0:3ac96e360672	1089
charlesmn	0:3ac96e360672	1090	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1091	pdev->inter_measurement_period_ms = inter_measurement_period_ms;
charlesmn	0:3ac96e360672	1092	pdev->tim_cfg.system__intermeasurement_period =
charlesmn	0:3ac96e360672	1093	inter_measurement_period_ms *
charlesmn	0:3ac96e360672	1094	(uint32_t)pdev->dbg_results.result__osc_calibrate_val;
charlesmn	0:3ac96e360672	1095	}
charlesmn	0:3ac96e360672	1096
charlesmn	0:3ac96e360672	1097	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1098
charlesmn	0:3ac96e360672	1099	return status;
charlesmn	0:3ac96e360672	1100	}
charlesmn	0:3ac96e360672	1101
charlesmn	0:3ac96e360672	1102
charlesmn	0:3ac96e360672	1103	VL53L1_Error VL53L1_get_inter_measurement_period_ms(
charlesmn	0:3ac96e360672	1104	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1105	uint32_t *pinter_measurement_period_ms)
charlesmn	0:3ac96e360672	1106	{
charlesmn	0:3ac96e360672	1107
charlesmn	0:3ac96e360672	1108
charlesmn	0:3ac96e360672	1109	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1110	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1111
charlesmn	0:3ac96e360672	1112	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1113
charlesmn	0:3ac96e360672	1114	if (pdev->dbg_results.result__osc_calibrate_val == 0)
charlesmn	0:3ac96e360672	1115	status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn	0:3ac96e360672	1116
charlesmn	0:3ac96e360672	1117	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	1118	*pinter_measurement_period_ms =
charlesmn	0:3ac96e360672	1119	pdev->tim_cfg.system__intermeasurement_period /
charlesmn	0:3ac96e360672	1120	(uint32_t)pdev->dbg_results.result__osc_calibrate_val;
charlesmn	0:3ac96e360672	1121
charlesmn	0:3ac96e360672	1122
charlesmn	0:3ac96e360672	1123	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1124
charlesmn	0:3ac96e360672	1125	return status;
charlesmn	0:3ac96e360672	1126	}
charlesmn	0:3ac96e360672	1127
charlesmn	0:3ac96e360672	1128
charlesmn	0:3ac96e360672	1129	VL53L1_Error VL53L1_set_timeouts_us(
charlesmn	0:3ac96e360672	1130	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1131	uint32_t phasecal_config_timeout_us,
charlesmn	0:3ac96e360672	1132	uint32_t mm_config_timeout_us,
charlesmn	0:3ac96e360672	1133	uint32_t range_config_timeout_us)
charlesmn	0:3ac96e360672	1134	{
charlesmn	0:3ac96e360672	1135
charlesmn	0:3ac96e360672	1136
charlesmn	0:3ac96e360672	1137	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1138	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1139	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1140
charlesmn	0:3ac96e360672	1141	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1142
charlesmn	0:3ac96e360672	1143	if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
charlesmn	0:3ac96e360672	1144	status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn	0:3ac96e360672	1145
charlesmn	0:3ac96e360672	1146	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1147
charlesmn	0:3ac96e360672	1148	pdev->phasecal_config_timeout_us = phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	1149	pdev->mm_config_timeout_us = mm_config_timeout_us;
charlesmn	0:3ac96e360672	1150	pdev->range_config_timeout_us = range_config_timeout_us;
charlesmn	0:3ac96e360672	1151
charlesmn	0:3ac96e360672	1152	status =
charlesmn	0:3ac96e360672	1153	VL53L1_calc_timeout_register_values(
charlesmn	0:3ac96e360672	1154	phasecal_config_timeout_us,
charlesmn	0:3ac96e360672	1155	mm_config_timeout_us,
charlesmn	0:3ac96e360672	1156	range_config_timeout_us,
charlesmn	0:3ac96e360672	1157	pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn	0:3ac96e360672	1158	&(pdev->gen_cfg),
charlesmn	0:3ac96e360672	1159	&(pdev->tim_cfg));
charlesmn	0:3ac96e360672	1160	}
charlesmn	0:3ac96e360672	1161
charlesmn	0:3ac96e360672	1162	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1163
charlesmn	0:3ac96e360672	1164	return status;
charlesmn	0:3ac96e360672	1165	}
charlesmn	0:3ac96e360672	1166
charlesmn	0:3ac96e360672	1167
charlesmn	0:3ac96e360672	1168	VL53L1_Error VL53L1_get_timeouts_us(
charlesmn	0:3ac96e360672	1169	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1170	uint32_t *pphasecal_config_timeout_us,
charlesmn	0:3ac96e360672	1171	uint32_t *pmm_config_timeout_us,
charlesmn	0:3ac96e360672	1172	uint32_t *prange_config_timeout_us)
charlesmn	0:3ac96e360672	1173	{
charlesmn	0:3ac96e360672	1174
charlesmn	0:3ac96e360672	1175
charlesmn	0:3ac96e360672	1176	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1177	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1178	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1179
charlesmn	0:3ac96e360672	1180	uint32_t macro_period_us = 0;
charlesmn	0:3ac96e360672	1181	uint16_t timeout_encoded = 0;
charlesmn	0:3ac96e360672	1182
charlesmn	0:3ac96e360672	1183	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1184
charlesmn	0:3ac96e360672	1185	if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0)
charlesmn	0:3ac96e360672	1186	status = VL53L1_ERROR_DIVISION_BY_ZERO;
charlesmn	0:3ac96e360672	1187
charlesmn	0:3ac96e360672	1188	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	1189
charlesmn	0:3ac96e360672	1190
charlesmn	0:3ac96e360672	1191	macro_period_us =
charlesmn	0:3ac96e360672	1192	VL53L1_calc_macro_period_us(
charlesmn	0:3ac96e360672	1193	pdev->stat_nvm.osc_measured__fast_osc__frequency,
charlesmn	0:3ac96e360672	1194	pdev->tim_cfg.range_config__vcsel_period_a);
charlesmn	0:3ac96e360672	1195
charlesmn	0:3ac96e360672	1196
charlesmn	0:3ac96e360672	1197
charlesmn	0:3ac96e360672	1198	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1199	VL53L1_calc_timeout_us(
charlesmn	0:3ac96e360672	1200	(uint32_t)pdev->gen_cfg.phasecal_config__timeout_macrop,
charlesmn	0:3ac96e360672	1201	macro_period_us);
charlesmn	0:3ac96e360672	1202
charlesmn	0:3ac96e360672	1203
charlesmn	0:3ac96e360672	1204
charlesmn	0:3ac96e360672	1205	timeout_encoded =
charlesmn	0:3ac96e360672	1206	(uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_hi;
charlesmn	0:3ac96e360672	1207	timeout_encoded = (timeout_encoded << 8) +
charlesmn	0:3ac96e360672	1208	(uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_lo;
charlesmn	0:3ac96e360672	1209
charlesmn	0:3ac96e360672	1210	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1211	VL53L1_calc_decoded_timeout_us(
charlesmn	0:3ac96e360672	1212	timeout_encoded,
charlesmn	0:3ac96e360672	1213	macro_period_us);
charlesmn	0:3ac96e360672	1214
charlesmn	0:3ac96e360672	1215
charlesmn	0:3ac96e360672	1216
charlesmn	0:3ac96e360672	1217	timeout_encoded =
charlesmn	0:3ac96e360672	1218	(uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_hi;
charlesmn	0:3ac96e360672	1219	timeout_encoded = (timeout_encoded << 8) +
charlesmn	0:3ac96e360672	1220	(uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_lo;
charlesmn	0:3ac96e360672	1221
charlesmn	0:3ac96e360672	1222	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1223	VL53L1_calc_decoded_timeout_us(
charlesmn	0:3ac96e360672	1224	timeout_encoded,
charlesmn	0:3ac96e360672	1225	macro_period_us);
charlesmn	0:3ac96e360672	1226
charlesmn	0:3ac96e360672	1227	pdev->phasecal_config_timeout_us = *pphasecal_config_timeout_us;
charlesmn	0:3ac96e360672	1228	pdev->mm_config_timeout_us = *pmm_config_timeout_us;
charlesmn	0:3ac96e360672	1229	pdev->range_config_timeout_us = *prange_config_timeout_us;
charlesmn	0:3ac96e360672	1230
charlesmn	0:3ac96e360672	1231	}
charlesmn	0:3ac96e360672	1232
charlesmn	0:3ac96e360672	1233	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1234
charlesmn	0:3ac96e360672	1235	return status;
charlesmn	0:3ac96e360672	1236	}
charlesmn	0:3ac96e360672	1237
charlesmn	0:3ac96e360672	1238
charlesmn	0:3ac96e360672	1239	VL53L1_Error VL53L1_set_calibration_repeat_period(
charlesmn	0:3ac96e360672	1240	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1241	uint16_t cal_config__repeat_period)
charlesmn	0:3ac96e360672	1242	{
charlesmn	0:3ac96e360672	1243
charlesmn	0:3ac96e360672	1244
charlesmn	0:3ac96e360672	1245	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1246	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1247	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1248
charlesmn	0:3ac96e360672	1249	pdev->gen_cfg.cal_config__repeat_rate = cal_config__repeat_period;
charlesmn	0:3ac96e360672	1250
charlesmn	0:3ac96e360672	1251	return status;
charlesmn	0:3ac96e360672	1252
charlesmn	0:3ac96e360672	1253	}
charlesmn	0:3ac96e360672	1254
charlesmn	0:3ac96e360672	1255
charlesmn	0:3ac96e360672	1256	VL53L1_Error VL53L1_get_calibration_repeat_period(
charlesmn	0:3ac96e360672	1257	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1258	uint16_t *pcal_config__repeat_period)
charlesmn	0:3ac96e360672	1259	{
charlesmn	0:3ac96e360672	1260
charlesmn	0:3ac96e360672	1261
charlesmn	0:3ac96e360672	1262	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1263	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1264	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1265
charlesmn	0:3ac96e360672	1266	*pcal_config__repeat_period = pdev->gen_cfg.cal_config__repeat_rate;
charlesmn	0:3ac96e360672	1267
charlesmn	0:3ac96e360672	1268	return status;
charlesmn	0:3ac96e360672	1269
charlesmn	0:3ac96e360672	1270	}
charlesmn	0:3ac96e360672	1271
charlesmn	0:3ac96e360672	1272
charlesmn	0:3ac96e360672	1273	VL53L1_Error VL53L1_set_sequence_config_bit(
charlesmn	0:3ac96e360672	1274	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1275	VL53L1_DeviceSequenceConfig bit_id,
charlesmn	0:3ac96e360672	1276	uint8_t value)
charlesmn	0:3ac96e360672	1277	{
charlesmn	0:3ac96e360672	1278
charlesmn	0:3ac96e360672	1279
charlesmn	0:3ac96e360672	1280	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1281	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1282	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1283
charlesmn	0:3ac96e360672	1284	uint8_t bit_mask = 0x01;
charlesmn	0:3ac96e360672	1285	uint8_t clr_mask = 0xFF - bit_mask;
charlesmn	0:3ac96e360672	1286	uint8_t bit_value = value & bit_mask;
charlesmn	0:3ac96e360672	1287
charlesmn	0:3ac96e360672	1288	if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) {
charlesmn	0:3ac96e360672	1289
charlesmn	0:3ac96e360672	1290	if (bit_id > 0) {
charlesmn	0:3ac96e360672	1291	bit_mask = 0x01 << bit_id;
charlesmn	0:3ac96e360672	1292	bit_value = bit_value << bit_id;
charlesmn	0:3ac96e360672	1293	clr_mask = 0xFF - bit_mask;
charlesmn	0:3ac96e360672	1294	}
charlesmn	0:3ac96e360672	1295
charlesmn	0:3ac96e360672	1296	pdev->dyn_cfg.system__sequence_config =
charlesmn	0:3ac96e360672	1297	(pdev->dyn_cfg.system__sequence_config & clr_mask) \|
charlesmn	0:3ac96e360672	1298	bit_value;
charlesmn	0:3ac96e360672	1299
charlesmn	0:3ac96e360672	1300	} else {
charlesmn	0:3ac96e360672	1301	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	1302	}
charlesmn	0:3ac96e360672	1303
charlesmn	0:3ac96e360672	1304	return status;
charlesmn	0:3ac96e360672	1305
charlesmn	0:3ac96e360672	1306	}
charlesmn	0:3ac96e360672	1307
charlesmn	0:3ac96e360672	1308
charlesmn	0:3ac96e360672	1309	VL53L1_Error VL53L1_get_sequence_config_bit(
charlesmn	0:3ac96e360672	1310	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1311	VL53L1_DeviceSequenceConfig bit_id,
charlesmn	0:3ac96e360672	1312	uint8_t *pvalue)
charlesmn	0:3ac96e360672	1313	{
charlesmn	0:3ac96e360672	1314
charlesmn	0:3ac96e360672	1315
charlesmn	0:3ac96e360672	1316	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1317	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1318	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1319
charlesmn	0:3ac96e360672	1320	uint8_t bit_mask = 0x01;
charlesmn	0:3ac96e360672	1321
charlesmn	0:3ac96e360672	1322	if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) {
charlesmn	0:3ac96e360672	1323
charlesmn	0:3ac96e360672	1324	if (bit_id > 0)
charlesmn	0:3ac96e360672	1325	bit_mask = 0x01 << bit_id;
charlesmn	0:3ac96e360672	1326
charlesmn	0:3ac96e360672	1327	*pvalue =
charlesmn	0:3ac96e360672	1328	pdev->dyn_cfg.system__sequence_config & bit_mask;
charlesmn	0:3ac96e360672	1329
charlesmn	0:3ac96e360672	1330	if (bit_id > 0)
charlesmn	0:3ac96e360672	1331	pvalue = pvalue >> bit_id;
charlesmn	0:3ac96e360672	1332
charlesmn	0:3ac96e360672	1333	} else {
charlesmn	0:3ac96e360672	1334	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	1335	}
charlesmn	0:3ac96e360672	1336
charlesmn	0:3ac96e360672	1337	return status;
charlesmn	0:3ac96e360672	1338	}
charlesmn	0:3ac96e360672	1339
charlesmn	0:3ac96e360672	1340
charlesmn	0:3ac96e360672	1341	VL53L1_Error VL53L1_set_interrupt_polarity(
charlesmn	0:3ac96e360672	1342	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1343	VL53L1_DeviceInterruptPolarity interrupt_polarity)
charlesmn	0:3ac96e360672	1344	{
charlesmn	0:3ac96e360672	1345
charlesmn	0:3ac96e360672	1346
charlesmn	0:3ac96e360672	1347	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1348	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1349	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1350
charlesmn	0:3ac96e360672	1351	pdev->stat_cfg.gpio_hv_mux__ctrl =
charlesmn	0:3ac96e360672	1352	(pdev->stat_cfg.gpio_hv_mux__ctrl &
charlesmn	0:3ac96e360672	1353	VL53L1_DEVICEINTERRUPTPOLARITY_CLEAR_MASK) \|
charlesmn	0:3ac96e360672	1354	(interrupt_polarity &
charlesmn	0:3ac96e360672	1355	VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK);
charlesmn	0:3ac96e360672	1356
charlesmn	0:3ac96e360672	1357	return status;
charlesmn	0:3ac96e360672	1358
charlesmn	0:3ac96e360672	1359	}
charlesmn	0:3ac96e360672	1360
charlesmn	0:3ac96e360672	1361
charlesmn	0:3ac96e360672	1362	VL53L1_Error VL53L1_set_refspadchar_config_struct(
charlesmn	0:3ac96e360672	1363	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1364	VL53L1_refspadchar_config_t *pdata)
charlesmn	0:3ac96e360672	1365	{
charlesmn	0:3ac96e360672	1366
charlesmn	0:3ac96e360672	1367
charlesmn	0:3ac96e360672	1368	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1369	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1370	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1371
charlesmn	0:3ac96e360672	1372	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1373
charlesmn	0:3ac96e360672	1374	pdev->refspadchar.device_test_mode = pdata->device_test_mode;
charlesmn	0:3ac96e360672	1375	pdev->refspadchar.VL53L1_p_009 = pdata->VL53L1_p_009;
charlesmn	0:3ac96e360672	1376	pdev->refspadchar.timeout_us = pdata->timeout_us;
charlesmn	0:3ac96e360672	1377	pdev->refspadchar.target_count_rate_mcps =
charlesmn	0:3ac96e360672	1378	pdata->target_count_rate_mcps;
charlesmn	0:3ac96e360672	1379	pdev->refspadchar.min_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	1380	pdata->min_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	1381	pdev->refspadchar.max_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	1382	pdata->max_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	1383
charlesmn	0:3ac96e360672	1384	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1385
charlesmn	0:3ac96e360672	1386	return status;
charlesmn	0:3ac96e360672	1387	}
charlesmn	0:3ac96e360672	1388
charlesmn	0:3ac96e360672	1389	VL53L1_Error VL53L1_get_refspadchar_config_struct(
charlesmn	0:3ac96e360672	1390	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1391	VL53L1_refspadchar_config_t *pdata)
charlesmn	0:3ac96e360672	1392	{
charlesmn	0:3ac96e360672	1393
charlesmn	0:3ac96e360672	1394
charlesmn	0:3ac96e360672	1395	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1396	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1397	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1398
charlesmn	0:3ac96e360672	1399	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1400
charlesmn	0:3ac96e360672	1401	pdata->device_test_mode = pdev->refspadchar.device_test_mode;
charlesmn	0:3ac96e360672	1402	pdata->VL53L1_p_009 = pdev->refspadchar.VL53L1_p_009;
charlesmn	0:3ac96e360672	1403	pdata->timeout_us = pdev->refspadchar.timeout_us;
charlesmn	0:3ac96e360672	1404	pdata->target_count_rate_mcps =
charlesmn	0:3ac96e360672	1405	pdev->refspadchar.target_count_rate_mcps;
charlesmn	0:3ac96e360672	1406	pdata->min_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	1407	pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	1408	pdata->max_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	1409	pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	1410
charlesmn	0:3ac96e360672	1411	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1412
charlesmn	0:3ac96e360672	1413	return status;
charlesmn	0:3ac96e360672	1414	}
charlesmn	0:3ac96e360672	1415
charlesmn	0:3ac96e360672	1416
charlesmn	0:3ac96e360672	1417
charlesmn	0:3ac96e360672	1418	VL53L1_Error VL53L1_set_range_ignore_threshold(
charlesmn	0:3ac96e360672	1419	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1420	uint8_t range_ignore_thresh_mult,
charlesmn	0:3ac96e360672	1421	uint16_t range_ignore_threshold_mcps)
charlesmn	0:3ac96e360672	1422	{
charlesmn	0:3ac96e360672	1423
charlesmn	0:3ac96e360672	1424
charlesmn	0:3ac96e360672	1425	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1426	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1427	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1428
charlesmn	0:3ac96e360672	1429	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
charlesmn	0:3ac96e360672	1430	range_ignore_threshold_mcps;
charlesmn	0:3ac96e360672	1431
charlesmn	0:3ac96e360672	1432	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
charlesmn	0:3ac96e360672	1433	range_ignore_thresh_mult;
charlesmn	0:3ac96e360672	1434
charlesmn	0:3ac96e360672	1435	return status;
charlesmn	0:3ac96e360672	1436
charlesmn	0:3ac96e360672	1437	}
charlesmn	0:3ac96e360672	1438
charlesmn	0:3ac96e360672	1439	VL53L1_Error VL53L1_get_range_ignore_threshold(
charlesmn	0:3ac96e360672	1440	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1441	uint8_t *prange_ignore_thresh_mult,
charlesmn	0:3ac96e360672	1442	uint16_t *prange_ignore_threshold_mcps_internal,
charlesmn	0:3ac96e360672	1443	uint16_t *prange_ignore_threshold_mcps_current)
charlesmn	0:3ac96e360672	1444	{
charlesmn	0:3ac96e360672	1445
charlesmn	0:3ac96e360672	1446
charlesmn	0:3ac96e360672	1447	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1448	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1449	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1450
charlesmn	0:3ac96e360672	1451	*prange_ignore_thresh_mult =
charlesmn	0:3ac96e360672	1452	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn	0:3ac96e360672	1453
charlesmn	0:3ac96e360672	1454	*prange_ignore_threshold_mcps_current =
charlesmn	0:3ac96e360672	1455	pdev->stat_cfg.algo__range_ignore_threshold_mcps;
charlesmn	0:3ac96e360672	1456
charlesmn	0:3ac96e360672	1457	*prange_ignore_threshold_mcps_internal =
charlesmn	0:3ac96e360672	1458	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
charlesmn	0:3ac96e360672	1459
charlesmn	0:3ac96e360672	1460	return status;
charlesmn	0:3ac96e360672	1461
charlesmn	0:3ac96e360672	1462	}
charlesmn	0:3ac96e360672	1463
charlesmn	0:3ac96e360672	1464
charlesmn	0:3ac96e360672	1465
charlesmn	0:3ac96e360672	1466	VL53L1_Error VL53L1_get_interrupt_polarity(
charlesmn	0:3ac96e360672	1467	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1468	VL53L1_DeviceInterruptPolarity *pinterrupt_polarity)
charlesmn	0:3ac96e360672	1469	{
charlesmn	0:3ac96e360672	1470
charlesmn	0:3ac96e360672	1471
charlesmn	0:3ac96e360672	1472	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1473	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1474	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1475
charlesmn	0:3ac96e360672	1476	*pinterrupt_polarity =
charlesmn	0:3ac96e360672	1477	pdev->stat_cfg.gpio_hv_mux__ctrl &
charlesmn	0:3ac96e360672	1478	VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK;
charlesmn	0:3ac96e360672	1479
charlesmn	0:3ac96e360672	1480	return status;
charlesmn	0:3ac96e360672	1481
charlesmn	0:3ac96e360672	1482	}
charlesmn	0:3ac96e360672	1483
charlesmn	0:3ac96e360672	1484
charlesmn	0:3ac96e360672	1485	VL53L1_Error VL53L1_set_user_zone(
charlesmn	0:3ac96e360672	1486	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1487	VL53L1_user_zone_t *puser_zone)
charlesmn	0:3ac96e360672	1488	{
charlesmn	0:3ac96e360672	1489
charlesmn	0:3ac96e360672	1490
charlesmn	0:3ac96e360672	1491	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1492	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1493
charlesmn	0:3ac96e360672	1494	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1495
charlesmn	0:3ac96e360672	1496
charlesmn	0:3ac96e360672	1497	VL53L1_encode_row_col(
charlesmn	0:3ac96e360672	1498	puser_zone->y_centre,
charlesmn	0:3ac96e360672	1499	puser_zone->x_centre,
charlesmn	0:3ac96e360672	1500	&(pdev->dyn_cfg.roi_config__user_roi_centre_spad));
charlesmn	0:3ac96e360672	1501
charlesmn	0:3ac96e360672	1502
charlesmn	0:3ac96e360672	1503	VL53L1_encode_zone_size(
charlesmn	0:3ac96e360672	1504	puser_zone->width,
charlesmn	0:3ac96e360672	1505	puser_zone->height,
charlesmn	0:3ac96e360672	1506	&(pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size));
charlesmn	0:3ac96e360672	1507
charlesmn	0:3ac96e360672	1508
charlesmn	0:3ac96e360672	1509
charlesmn	0:3ac96e360672	1510	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1511
charlesmn	0:3ac96e360672	1512	return status;
charlesmn	0:3ac96e360672	1513	}
charlesmn	0:3ac96e360672	1514
charlesmn	0:3ac96e360672	1515
charlesmn	0:3ac96e360672	1516	VL53L1_Error VL53L1_get_user_zone(
charlesmn	0:3ac96e360672	1517	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1518	VL53L1_user_zone_t *puser_zone)
charlesmn	0:3ac96e360672	1519	{
charlesmn	0:3ac96e360672	1520
charlesmn	0:3ac96e360672	1521
charlesmn	0:3ac96e360672	1522	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1523	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1524
charlesmn	0:3ac96e360672	1525	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1526
charlesmn	0:3ac96e360672	1527
charlesmn	0:3ac96e360672	1528	VL53L1_decode_row_col(
charlesmn	0:3ac96e360672	1529	pdev->dyn_cfg.roi_config__user_roi_centre_spad,
charlesmn	0:3ac96e360672	1530	&(puser_zone->y_centre),
charlesmn	0:3ac96e360672	1531	&(puser_zone->x_centre));
charlesmn	0:3ac96e360672	1532
charlesmn	0:3ac96e360672	1533
charlesmn	0:3ac96e360672	1534	VL53L1_decode_zone_size(
charlesmn	0:3ac96e360672	1535	pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size,
charlesmn	0:3ac96e360672	1536	&(puser_zone->width),
charlesmn	0:3ac96e360672	1537	&(puser_zone->height));
charlesmn	0:3ac96e360672	1538
charlesmn	0:3ac96e360672	1539	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1540
charlesmn	0:3ac96e360672	1541	return status;
charlesmn	0:3ac96e360672	1542	}
charlesmn	0:3ac96e360672	1543
charlesmn	0:3ac96e360672	1544
charlesmn	0:3ac96e360672	1545
charlesmn	0:3ac96e360672	1546	VL53L1_Error VL53L1_get_mode_mitigation_roi(
charlesmn	0:3ac96e360672	1547	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1548	VL53L1_user_zone_t *pmm_roi)
charlesmn	0:3ac96e360672	1549	{
charlesmn	0:3ac96e360672	1550
charlesmn	0:3ac96e360672	1551
charlesmn	0:3ac96e360672	1552	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1553	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1554
charlesmn	0:3ac96e360672	1555	uint8_t x = 0;
charlesmn	0:3ac96e360672	1556	uint8_t y = 0;
charlesmn	0:3ac96e360672	1557	uint8_t xy_size = 0;
charlesmn	0:3ac96e360672	1558
charlesmn	0:3ac96e360672	1559	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1560
charlesmn	0:3ac96e360672	1561
charlesmn	0:3ac96e360672	1562	VL53L1_decode_row_col(
charlesmn	0:3ac96e360672	1563	pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn	0:3ac96e360672	1564	&y,
charlesmn	0:3ac96e360672	1565	&x);
charlesmn	0:3ac96e360672	1566
charlesmn	0:3ac96e360672	1567	pmm_roi->x_centre = x;
charlesmn	0:3ac96e360672	1568	pmm_roi->y_centre = y;
charlesmn	0:3ac96e360672	1569
charlesmn	0:3ac96e360672	1570
charlesmn	0:3ac96e360672	1571	xy_size = pdev->nvm_copy_data.roi_config__mode_roi_xy_size;
charlesmn	0:3ac96e360672	1572
charlesmn	0:3ac96e360672	1573	pmm_roi->height = xy_size >> 4;
charlesmn	0:3ac96e360672	1574	pmm_roi->width = xy_size & 0x0F;
charlesmn	0:3ac96e360672	1575
charlesmn	0:3ac96e360672	1576	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1577
charlesmn	0:3ac96e360672	1578	return status;
charlesmn	0:3ac96e360672	1579	}
charlesmn	0:3ac96e360672	1580
charlesmn	0:3ac96e360672	1581
charlesmn	0:3ac96e360672	1582	VL53L1_Error VL53L1_set_zone_config(
charlesmn	0:3ac96e360672	1583	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1584	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1585	{
charlesmn	0:3ac96e360672	1586
charlesmn	0:3ac96e360672	1587
charlesmn	0:3ac96e360672	1588
charlesmn	0:3ac96e360672	1589	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1590	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1591
charlesmn	0:3ac96e360672	1592	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1593
charlesmn	0:3ac96e360672	1594
charlesmn	0:3ac96e360672	1595	memcpy(&(pdev->zone_cfg.user_zones), &(pzone_cfg->user_zones),
charlesmn	0:3ac96e360672	1596	sizeof(pdev->zone_cfg.user_zones));
charlesmn	0:3ac96e360672	1597
charlesmn	0:3ac96e360672	1598
charlesmn	0:3ac96e360672	1599	pdev->zone_cfg.max_zones = pzone_cfg->max_zones;
charlesmn	0:3ac96e360672	1600	pdev->zone_cfg.active_zones = pzone_cfg->active_zones;
charlesmn	0:3ac96e360672	1601
charlesmn	0:3ac96e360672	1602	status = VL53L1_init_zone_config_histogram_bins(&pdev->zone_cfg);
charlesmn	0:3ac96e360672	1603
charlesmn	0:3ac96e360672	1604
charlesmn	0:3ac96e360672	1605
charlesmn	0:3ac96e360672	1606	if (pzone_cfg->active_zones == 0)
charlesmn	0:3ac96e360672	1607	pdev->gen_cfg.global_config__stream_divider = 0;
charlesmn	0:3ac96e360672	1608	else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES)
charlesmn	0:3ac96e360672	1609	pdev->gen_cfg.global_config__stream_divider =
charlesmn	0:3ac96e360672	1610	pzone_cfg->active_zones + 1;
charlesmn	0:3ac96e360672	1611	else
charlesmn	0:3ac96e360672	1612	pdev->gen_cfg.global_config__stream_divider =
charlesmn	0:3ac96e360672	1613	VL53L1_MAX_USER_ZONES + 1;
charlesmn	0:3ac96e360672	1614
charlesmn	0:3ac96e360672	1615	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1616
charlesmn	0:3ac96e360672	1617	return status;
charlesmn	0:3ac96e360672	1618
charlesmn	0:3ac96e360672	1619	}
charlesmn	0:3ac96e360672	1620
charlesmn	0:3ac96e360672	1621
charlesmn	0:3ac96e360672	1622	VL53L1_Error VL53L1_get_zone_config(
charlesmn	0:3ac96e360672	1623	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1624	VL53L1_zone_config_t *pzone_cfg)
charlesmn	0:3ac96e360672	1625	{
charlesmn	0:3ac96e360672	1626
charlesmn	0:3ac96e360672	1627
charlesmn	0:3ac96e360672	1628	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1629	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1630
charlesmn	0:3ac96e360672	1631	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1632
charlesmn	0:3ac96e360672	1633
charlesmn	0:3ac96e360672	1634	memcpy(pzone_cfg, &(pdev->zone_cfg), sizeof(VL53L1_zone_config_t));
charlesmn	0:3ac96e360672	1635
charlesmn	0:3ac96e360672	1636	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1637
charlesmn	0:3ac96e360672	1638	return status;
charlesmn	0:3ac96e360672	1639	}
charlesmn	0:3ac96e360672	1640
charlesmn	0:3ac96e360672	1641	VL53L1_Error VL53L1_get_preset_mode_timing_cfg(
charlesmn	0:3ac96e360672	1642	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1643	VL53L1_DevicePresetModes device_preset_mode,
charlesmn	0:3ac96e360672	1644	uint16_t *pdss_config__target_total_rate_mcps,
charlesmn	0:3ac96e360672	1645	uint32_t *pphasecal_config_timeout_us,
charlesmn	0:3ac96e360672	1646	uint32_t *pmm_config_timeout_us,
charlesmn	0:3ac96e360672	1647	uint32_t *prange_config_timeout_us)
charlesmn	0:3ac96e360672	1648	{
charlesmn	0:3ac96e360672	1649	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1650	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1651
charlesmn	0:3ac96e360672	1652	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1653
charlesmn	0:3ac96e360672	1654
charlesmn	0:3ac96e360672	1655	switch (device_preset_mode) {
charlesmn	0:3ac96e360672	1656
charlesmn	0:3ac96e360672	1657	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING:
charlesmn	0:3ac96e360672	1658	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE:
charlesmn	0:3ac96e360672	1659	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE:
charlesmn	0:3ac96e360672	1660	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL:
charlesmn	0:3ac96e360672	1661	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL:
charlesmn	0:3ac96e360672	1662	case VL53L1_DEVICEPRESETMODE_OLT:
charlesmn	0:3ac96e360672	1663	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1664	pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn	0:3ac96e360672	1665	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1666	pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn	0:3ac96e360672	1667	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1668	pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn	0:3ac96e360672	1669	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1670	pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn	0:3ac96e360672	1671	break;
charlesmn	0:3ac96e360672	1672
charlesmn	0:3ac96e360672	1673	case VL53L1_DEVICEPRESETMODE_TIMED_RANGING:
charlesmn	0:3ac96e360672	1674	case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE:
charlesmn	0:3ac96e360672	1675	case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE:
charlesmn	0:3ac96e360672	1676	case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING:
charlesmn	0:3ac96e360672	1677	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1678	pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn	0:3ac96e360672	1679	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1680	pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn	0:3ac96e360672	1681	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1682	pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn	0:3ac96e360672	1683	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1684	pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn	0:3ac96e360672	1685	break;
charlesmn	0:3ac96e360672	1686
charlesmn	0:3ac96e360672	1687	case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE:
charlesmn	0:3ac96e360672	1688	case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE:
charlesmn	0:3ac96e360672	1689	case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE:
charlesmn	0:3ac96e360672	1690	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1691	pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn	0:3ac96e360672	1692	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1693	pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn	0:3ac96e360672	1694	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1695	pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn	0:3ac96e360672	1696	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1697	pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn	0:3ac96e360672	1698	break;
charlesmn	0:3ac96e360672	1699
charlesmn	0:3ac96e360672	1700	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING:
charlesmn	0:3ac96e360672	1701	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1:
charlesmn	0:3ac96e360672	1702	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2:
charlesmn	0:3ac96e360672	1703	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL:
charlesmn	0:3ac96e360672	1704	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL:
charlesmn	0:3ac96e360672	1705	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY:
charlesmn	0:3ac96e360672	1706	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn	0:3ac96e360672	1707	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1:
charlesmn	0:3ac96e360672	1708	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2:
charlesmn	0:3ac96e360672	1709	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION:
charlesmn	0:3ac96e360672	1710	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1711	pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn	0:3ac96e360672	1712	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1713	pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn	0:3ac96e360672	1714	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1715	pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	1716	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1717	pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	1718
charlesmn	0:3ac96e360672	1719	break;
charlesmn	0:3ac96e360672	1720
charlesmn	0:3ac96e360672	1721	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE:
charlesmn	0:3ac96e360672	1722	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1723	pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn	0:3ac96e360672	1724	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1725	pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn	0:3ac96e360672	1726	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1727	pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn	0:3ac96e360672	1728	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1729	pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn	0:3ac96e360672	1730	break;
charlesmn	0:3ac96e360672	1731
charlesmn	0:3ac96e360672	1732	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE:
charlesmn	0:3ac96e360672	1733	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1734	pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn	0:3ac96e360672	1735	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1736	pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn	0:3ac96e360672	1737	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1738	pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn	0:3ac96e360672	1739	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1740	pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn	0:3ac96e360672	1741	break;
charlesmn	0:3ac96e360672	1742
charlesmn	0:3ac96e360672	1743	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE:
charlesmn	0:3ac96e360672	1744	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1745	pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn	0:3ac96e360672	1746	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1747	pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn	0:3ac96e360672	1748	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1749	pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn	0:3ac96e360672	1750	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1751	pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn	0:3ac96e360672	1752	break;
charlesmn	0:3ac96e360672	1753
charlesmn	0:3ac96e360672	1754	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING:
charlesmn	0:3ac96e360672	1755	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1756	pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn	0:3ac96e360672	1757	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1758	pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn	0:3ac96e360672	1759	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1760	pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	1761	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1762	pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	1763	break;
charlesmn	0:3ac96e360672	1764
charlesmn	0:3ac96e360672	1765	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn	0:3ac96e360672	1766	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1:
charlesmn	0:3ac96e360672	1767	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2:
charlesmn	0:3ac96e360672	1768	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1769	pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn	0:3ac96e360672	1770	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1771	pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn	0:3ac96e360672	1772	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1773	pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	1774	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1775	pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	1776	break;
charlesmn	0:3ac96e360672	1777
charlesmn	0:3ac96e360672	1778
charlesmn	0:3ac96e360672	1779	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn	0:3ac96e360672	1780	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1:
charlesmn	0:3ac96e360672	1781	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2:
charlesmn	0:3ac96e360672	1782	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1783	pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn	0:3ac96e360672	1784	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1785	pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn	0:3ac96e360672	1786	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1787	pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	1788	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1789	pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	1790	break;
charlesmn	0:3ac96e360672	1791
charlesmn	0:3ac96e360672	1792	case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE:
charlesmn	0:3ac96e360672	1793	*pdss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	1794	pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn	0:3ac96e360672	1795	*pphasecal_config_timeout_us =
charlesmn	0:3ac96e360672	1796	pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn	0:3ac96e360672	1797	*pmm_config_timeout_us =
charlesmn	0:3ac96e360672	1798	pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	1799	*prange_config_timeout_us =
charlesmn	0:3ac96e360672	1800	pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	1801	break;
charlesmn	0:3ac96e360672	1802
charlesmn	0:3ac96e360672	1803	default:
charlesmn	0:3ac96e360672	1804	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	1805	break;
charlesmn	0:3ac96e360672	1806
charlesmn	0:3ac96e360672	1807	}
charlesmn	0:3ac96e360672	1808
charlesmn	0:3ac96e360672	1809	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	1810
charlesmn	0:3ac96e360672	1811	return status;
charlesmn	0:3ac96e360672	1812	}
charlesmn	0:3ac96e360672	1813
charlesmn	0:3ac96e360672	1814
charlesmn	0:3ac96e360672	1815	VL53L1_Error VL53L1_set_preset_mode(
charlesmn	0:3ac96e360672	1816	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	1817	VL53L1_DevicePresetModes device_preset_mode,
charlesmn	0:3ac96e360672	1818	uint16_t dss_config__target_total_rate_mcps,
charlesmn	0:3ac96e360672	1819	uint32_t phasecal_config_timeout_us,
charlesmn	0:3ac96e360672	1820	uint32_t mm_config_timeout_us,
charlesmn	0:3ac96e360672	1821	uint32_t range_config_timeout_us,
charlesmn	0:3ac96e360672	1822	uint32_t inter_measurement_period_ms)
charlesmn	0:3ac96e360672	1823	{
charlesmn	0:3ac96e360672	1824
charlesmn	0:3ac96e360672	1825
charlesmn	0:3ac96e360672	1826	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	1827	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	1828	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	1829	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	1830	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	1831
charlesmn	0:3ac96e360672	1832	VL53L1_hist_post_process_config_t *phistpostprocess =
charlesmn	0:3ac96e360672	1833	&(pdev->histpostprocess);
charlesmn	0:3ac96e360672	1834
charlesmn	0:3ac96e360672	1835	VL53L1_static_config_t *pstatic = &(pdev->stat_cfg);
charlesmn	0:3ac96e360672	1836	VL53L1_histogram_config_t *phistogram = &(pdev->hist_cfg);
charlesmn	0:3ac96e360672	1837	VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn	0:3ac96e360672	1838	VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg);
charlesmn	0:3ac96e360672	1839	VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
charlesmn	0:3ac96e360672	1840	VL53L1_system_control_t *psystem = &(pdev->sys_ctrl);
charlesmn	0:3ac96e360672	1841	VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
charlesmn	0:3ac96e360672	1842	VL53L1_tuning_parm_storage_t *ptuning_parms = &(pdev->tuning_parms);
charlesmn	0:3ac96e360672	1843	VL53L1_low_power_auto_data_t *plpadata =
charlesmn	0:3ac96e360672	1844	&(pdev->low_power_auto_data);
charlesmn	0:3ac96e360672	1845
charlesmn	0:3ac96e360672	1846	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	1847
charlesmn	0:3ac96e360672	1848
charlesmn	0:3ac96e360672	1849	pdev->preset_mode = device_preset_mode;
charlesmn	0:3ac96e360672	1850	pdev->mm_config_timeout_us = mm_config_timeout_us;
charlesmn	0:3ac96e360672	1851	pdev->range_config_timeout_us = range_config_timeout_us;
charlesmn	0:3ac96e360672	1852	pdev->inter_measurement_period_ms = inter_measurement_period_ms;
charlesmn	0:3ac96e360672	1853
charlesmn	0:3ac96e360672	1854
charlesmn	0:3ac96e360672	1855
charlesmn	0:3ac96e360672	1856	VL53L1_init_ll_driver_state(
charlesmn	0:3ac96e360672	1857	Dev,
charlesmn	0:3ac96e360672	1858	VL53L1_DEVICESTATE_SW_STANDBY);
charlesmn	0:3ac96e360672	1859
charlesmn	0:3ac96e360672	1860
charlesmn	0:3ac96e360672	1861
charlesmn	0:3ac96e360672	1862	switch (device_preset_mode) {
charlesmn	0:3ac96e360672	1863
charlesmn	0:3ac96e360672	1864	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING:
charlesmn	0:3ac96e360672	1865	status = VL53L1_preset_mode_standard_ranging(
charlesmn	0:3ac96e360672	1866	pstatic,
charlesmn	0:3ac96e360672	1867	phistogram,
charlesmn	0:3ac96e360672	1868	pgeneral,
charlesmn	0:3ac96e360672	1869	ptiming,
charlesmn	0:3ac96e360672	1870	pdynamic,
charlesmn	0:3ac96e360672	1871	psystem,
charlesmn	0:3ac96e360672	1872	ptuning_parms,
charlesmn	0:3ac96e360672	1873	pzone_cfg);
charlesmn	0:3ac96e360672	1874	break;
charlesmn	0:3ac96e360672	1875
charlesmn	0:3ac96e360672	1876	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE:
charlesmn	0:3ac96e360672	1877	status = VL53L1_preset_mode_standard_ranging_short_range(
charlesmn	0:3ac96e360672	1878	pstatic,
charlesmn	0:3ac96e360672	1879	phistogram,
charlesmn	0:3ac96e360672	1880	pgeneral,
charlesmn	0:3ac96e360672	1881	ptiming,
charlesmn	0:3ac96e360672	1882	pdynamic,
charlesmn	0:3ac96e360672	1883	psystem,
charlesmn	0:3ac96e360672	1884	ptuning_parms,
charlesmn	0:3ac96e360672	1885	pzone_cfg);
charlesmn	0:3ac96e360672	1886	break;
charlesmn	0:3ac96e360672	1887
charlesmn	0:3ac96e360672	1888	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE:
charlesmn	0:3ac96e360672	1889	status = VL53L1_preset_mode_standard_ranging_long_range(
charlesmn	0:3ac96e360672	1890	pstatic,
charlesmn	0:3ac96e360672	1891	phistogram,
charlesmn	0:3ac96e360672	1892	pgeneral,
charlesmn	0:3ac96e360672	1893	ptiming,
charlesmn	0:3ac96e360672	1894	pdynamic,
charlesmn	0:3ac96e360672	1895	psystem,
charlesmn	0:3ac96e360672	1896	ptuning_parms,
charlesmn	0:3ac96e360672	1897	pzone_cfg);
charlesmn	0:3ac96e360672	1898	break;
charlesmn	0:3ac96e360672	1899
charlesmn	0:3ac96e360672	1900	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL:
charlesmn	0:3ac96e360672	1901	status = VL53L1_preset_mode_standard_ranging_mm1_cal(
charlesmn	0:3ac96e360672	1902	pstatic,
charlesmn	0:3ac96e360672	1903	phistogram,
charlesmn	0:3ac96e360672	1904	pgeneral,
charlesmn	0:3ac96e360672	1905	ptiming,
charlesmn	0:3ac96e360672	1906	pdynamic,
charlesmn	0:3ac96e360672	1907	psystem,
charlesmn	0:3ac96e360672	1908	ptuning_parms,
charlesmn	0:3ac96e360672	1909	pzone_cfg);
charlesmn	0:3ac96e360672	1910	break;
charlesmn	0:3ac96e360672	1911
charlesmn	0:3ac96e360672	1912	case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL:
charlesmn	0:3ac96e360672	1913	status = VL53L1_preset_mode_standard_ranging_mm2_cal(
charlesmn	0:3ac96e360672	1914	pstatic,
charlesmn	0:3ac96e360672	1915	phistogram,
charlesmn	0:3ac96e360672	1916	pgeneral,
charlesmn	0:3ac96e360672	1917	ptiming,
charlesmn	0:3ac96e360672	1918	pdynamic,
charlesmn	0:3ac96e360672	1919	psystem,
charlesmn	0:3ac96e360672	1920	ptuning_parms,
charlesmn	0:3ac96e360672	1921	pzone_cfg);
charlesmn	0:3ac96e360672	1922	break;
charlesmn	0:3ac96e360672	1923
charlesmn	0:3ac96e360672	1924	case VL53L1_DEVICEPRESETMODE_TIMED_RANGING:
charlesmn	0:3ac96e360672	1925	status = VL53L1_preset_mode_timed_ranging(
charlesmn	0:3ac96e360672	1926	pstatic,
charlesmn	0:3ac96e360672	1927	phistogram,
charlesmn	0:3ac96e360672	1928	pgeneral,
charlesmn	0:3ac96e360672	1929	ptiming,
charlesmn	0:3ac96e360672	1930	pdynamic,
charlesmn	0:3ac96e360672	1931	psystem,
charlesmn	0:3ac96e360672	1932	ptuning_parms,
charlesmn	0:3ac96e360672	1933	pzone_cfg);
charlesmn	0:3ac96e360672	1934	break;
charlesmn	0:3ac96e360672	1935
charlesmn	0:3ac96e360672	1936	case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE:
charlesmn	0:3ac96e360672	1937	status = VL53L1_preset_mode_timed_ranging_short_range(
charlesmn	0:3ac96e360672	1938	pstatic,
charlesmn	0:3ac96e360672	1939	phistogram,
charlesmn	0:3ac96e360672	1940	pgeneral,
charlesmn	0:3ac96e360672	1941	ptiming,
charlesmn	0:3ac96e360672	1942	pdynamic,
charlesmn	0:3ac96e360672	1943	psystem,
charlesmn	0:3ac96e360672	1944	ptuning_parms,
charlesmn	0:3ac96e360672	1945	pzone_cfg);
charlesmn	0:3ac96e360672	1946	break;
charlesmn	0:3ac96e360672	1947
charlesmn	0:3ac96e360672	1948	case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE:
charlesmn	0:3ac96e360672	1949	status = VL53L1_preset_mode_timed_ranging_long_range(
charlesmn	0:3ac96e360672	1950	pstatic,
charlesmn	0:3ac96e360672	1951	phistogram,
charlesmn	0:3ac96e360672	1952	pgeneral,
charlesmn	0:3ac96e360672	1953	ptiming,
charlesmn	0:3ac96e360672	1954	pdynamic,
charlesmn	0:3ac96e360672	1955	psystem,
charlesmn	0:3ac96e360672	1956	ptuning_parms,
charlesmn	0:3ac96e360672	1957	pzone_cfg);
charlesmn	0:3ac96e360672	1958	break;
charlesmn	0:3ac96e360672	1959
charlesmn	0:3ac96e360672	1960	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING:
charlesmn	0:3ac96e360672	1961	status = VL53L1_preset_mode_histogram_ranging(
charlesmn	0:3ac96e360672	1962	phistpostprocess,
charlesmn	0:3ac96e360672	1963	pstatic,
charlesmn	0:3ac96e360672	1964	phistogram,
charlesmn	0:3ac96e360672	1965	pgeneral,
charlesmn	0:3ac96e360672	1966	ptiming,
charlesmn	0:3ac96e360672	1967	pdynamic,
charlesmn	0:3ac96e360672	1968	psystem,
charlesmn	0:3ac96e360672	1969	ptuning_parms,
charlesmn	0:3ac96e360672	1970	pzone_cfg);
charlesmn	0:3ac96e360672	1971	break;
charlesmn	0:3ac96e360672	1972
charlesmn	0:3ac96e360672	1973	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1:
charlesmn	0:3ac96e360672	1974	status = VL53L1_preset_mode_histogram_ranging_with_mm1(
charlesmn	0:3ac96e360672	1975	phistpostprocess,
charlesmn	0:3ac96e360672	1976	pstatic,
charlesmn	0:3ac96e360672	1977	phistogram,
charlesmn	0:3ac96e360672	1978	pgeneral,
charlesmn	0:3ac96e360672	1979	ptiming,
charlesmn	0:3ac96e360672	1980	pdynamic,
charlesmn	0:3ac96e360672	1981	psystem,
charlesmn	0:3ac96e360672	1982	ptuning_parms,
charlesmn	0:3ac96e360672	1983	pzone_cfg);
charlesmn	0:3ac96e360672	1984	break;
charlesmn	0:3ac96e360672	1985
charlesmn	0:3ac96e360672	1986	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2:
charlesmn	0:3ac96e360672	1987	status = VL53L1_preset_mode_histogram_ranging_with_mm2(
charlesmn	0:3ac96e360672	1988	phistpostprocess,
charlesmn	0:3ac96e360672	1989	pstatic,
charlesmn	0:3ac96e360672	1990	phistogram,
charlesmn	0:3ac96e360672	1991	pgeneral,
charlesmn	0:3ac96e360672	1992	ptiming,
charlesmn	0:3ac96e360672	1993	pdynamic,
charlesmn	0:3ac96e360672	1994	psystem,
charlesmn	0:3ac96e360672	1995	ptuning_parms,
charlesmn	0:3ac96e360672	1996	pzone_cfg);
charlesmn	0:3ac96e360672	1997	break;
charlesmn	0:3ac96e360672	1998
charlesmn	0:3ac96e360672	1999	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL:
charlesmn	0:3ac96e360672	2000	status = VL53L1_preset_mode_histogram_ranging_mm1_cal(
charlesmn	0:3ac96e360672	2001	phistpostprocess,
charlesmn	0:3ac96e360672	2002	pstatic,
charlesmn	0:3ac96e360672	2003	phistogram,
charlesmn	0:3ac96e360672	2004	pgeneral,
charlesmn	0:3ac96e360672	2005	ptiming,
charlesmn	0:3ac96e360672	2006	pdynamic,
charlesmn	0:3ac96e360672	2007	psystem,
charlesmn	0:3ac96e360672	2008	ptuning_parms,
charlesmn	0:3ac96e360672	2009	pzone_cfg);
charlesmn	0:3ac96e360672	2010	break;
charlesmn	0:3ac96e360672	2011
charlesmn	0:3ac96e360672	2012	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL:
charlesmn	0:3ac96e360672	2013	status = VL53L1_preset_mode_histogram_ranging_mm2_cal(
charlesmn	0:3ac96e360672	2014	phistpostprocess,
charlesmn	0:3ac96e360672	2015	pstatic,
charlesmn	0:3ac96e360672	2016	phistogram,
charlesmn	0:3ac96e360672	2017	pgeneral,
charlesmn	0:3ac96e360672	2018	ptiming,
charlesmn	0:3ac96e360672	2019	pdynamic,
charlesmn	0:3ac96e360672	2020	psystem,
charlesmn	0:3ac96e360672	2021	ptuning_parms,
charlesmn	0:3ac96e360672	2022	pzone_cfg);
charlesmn	0:3ac96e360672	2023	break;
charlesmn	0:3ac96e360672	2024
charlesmn	0:3ac96e360672	2025	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE:
charlesmn	0:3ac96e360672	2026	status = VL53L1_preset_mode_histogram_multizone(
charlesmn	0:3ac96e360672	2027	phistpostprocess,
charlesmn	0:3ac96e360672	2028	pstatic,
charlesmn	0:3ac96e360672	2029	phistogram,
charlesmn	0:3ac96e360672	2030	pgeneral,
charlesmn	0:3ac96e360672	2031	ptiming,
charlesmn	0:3ac96e360672	2032	pdynamic,
charlesmn	0:3ac96e360672	2033	psystem,
charlesmn	0:3ac96e360672	2034	ptuning_parms,
charlesmn	0:3ac96e360672	2035	pzone_cfg);
charlesmn	0:3ac96e360672	2036	break;
charlesmn	0:3ac96e360672	2037
charlesmn	0:3ac96e360672	2038	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE:
charlesmn	0:3ac96e360672	2039	status = VL53L1_preset_mode_histogram_multizone_short_range(
charlesmn	0:3ac96e360672	2040	phistpostprocess,
charlesmn	0:3ac96e360672	2041	pstatic,
charlesmn	0:3ac96e360672	2042	phistogram,
charlesmn	0:3ac96e360672	2043	pgeneral,
charlesmn	0:3ac96e360672	2044	ptiming,
charlesmn	0:3ac96e360672	2045	pdynamic,
charlesmn	0:3ac96e360672	2046	psystem,
charlesmn	0:3ac96e360672	2047	ptuning_parms,
charlesmn	0:3ac96e360672	2048	pzone_cfg);
charlesmn	0:3ac96e360672	2049	break;
charlesmn	0:3ac96e360672	2050
charlesmn	0:3ac96e360672	2051	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE:
charlesmn	0:3ac96e360672	2052	status = VL53L1_preset_mode_histogram_multizone_long_range(
charlesmn	0:3ac96e360672	2053	phistpostprocess,
charlesmn	0:3ac96e360672	2054	pstatic,
charlesmn	0:3ac96e360672	2055	phistogram,
charlesmn	0:3ac96e360672	2056	pgeneral,
charlesmn	0:3ac96e360672	2057	ptiming,
charlesmn	0:3ac96e360672	2058	pdynamic,
charlesmn	0:3ac96e360672	2059	psystem,
charlesmn	0:3ac96e360672	2060	ptuning_parms,
charlesmn	0:3ac96e360672	2061	pzone_cfg);
charlesmn	0:3ac96e360672	2062	break;
charlesmn	0:3ac96e360672	2063
charlesmn	0:3ac96e360672	2064	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY:
charlesmn	0:3ac96e360672	2065	status = VL53L1_preset_mode_histogram_ranging_ref(
charlesmn	0:3ac96e360672	2066	phistpostprocess,
charlesmn	0:3ac96e360672	2067	pstatic,
charlesmn	0:3ac96e360672	2068	phistogram,
charlesmn	0:3ac96e360672	2069	pgeneral,
charlesmn	0:3ac96e360672	2070	ptiming,
charlesmn	0:3ac96e360672	2071	pdynamic,
charlesmn	0:3ac96e360672	2072	psystem,
charlesmn	0:3ac96e360672	2073	ptuning_parms,
charlesmn	0:3ac96e360672	2074	pzone_cfg);
charlesmn	0:3ac96e360672	2075	break;
charlesmn	0:3ac96e360672	2076
charlesmn	0:3ac96e360672	2077	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING:
charlesmn	0:3ac96e360672	2078	status = VL53L1_preset_mode_histogram_ranging_short_timing(
charlesmn	0:3ac96e360672	2079	phistpostprocess,
charlesmn	0:3ac96e360672	2080	pstatic,
charlesmn	0:3ac96e360672	2081	phistogram,
charlesmn	0:3ac96e360672	2082	pgeneral,
charlesmn	0:3ac96e360672	2083	ptiming,
charlesmn	0:3ac96e360672	2084	pdynamic,
charlesmn	0:3ac96e360672	2085	psystem,
charlesmn	0:3ac96e360672	2086	ptuning_parms,
charlesmn	0:3ac96e360672	2087	pzone_cfg);
charlesmn	0:3ac96e360672	2088	break;
charlesmn	0:3ac96e360672	2089
charlesmn	0:3ac96e360672	2090	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE:
charlesmn	0:3ac96e360672	2091	status = VL53L1_preset_mode_histogram_long_range(
charlesmn	0:3ac96e360672	2092	phistpostprocess,
charlesmn	0:3ac96e360672	2093	pstatic,
charlesmn	0:3ac96e360672	2094	phistogram,
charlesmn	0:3ac96e360672	2095	pgeneral,
charlesmn	0:3ac96e360672	2096	ptiming,
charlesmn	0:3ac96e360672	2097	pdynamic,
charlesmn	0:3ac96e360672	2098	psystem,
charlesmn	0:3ac96e360672	2099	ptuning_parms,
charlesmn	0:3ac96e360672	2100	pzone_cfg);
charlesmn	0:3ac96e360672	2101	break;
charlesmn	0:3ac96e360672	2102
charlesmn	0:3ac96e360672	2103	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1:
charlesmn	0:3ac96e360672	2104	status = VL53L1_preset_mode_histogram_long_range_mm1(
charlesmn	0:3ac96e360672	2105	phistpostprocess,
charlesmn	0:3ac96e360672	2106	pstatic,
charlesmn	0:3ac96e360672	2107	phistogram,
charlesmn	0:3ac96e360672	2108	pgeneral,
charlesmn	0:3ac96e360672	2109	ptiming,
charlesmn	0:3ac96e360672	2110	pdynamic,
charlesmn	0:3ac96e360672	2111	psystem,
charlesmn	0:3ac96e360672	2112	ptuning_parms,
charlesmn	0:3ac96e360672	2113	pzone_cfg);
charlesmn	0:3ac96e360672	2114	break;
charlesmn	0:3ac96e360672	2115
charlesmn	0:3ac96e360672	2116	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2:
charlesmn	0:3ac96e360672	2117	status = VL53L1_preset_mode_histogram_long_range_mm2(
charlesmn	0:3ac96e360672	2118	phistpostprocess,
charlesmn	0:3ac96e360672	2119	pstatic,
charlesmn	0:3ac96e360672	2120	phistogram,
charlesmn	0:3ac96e360672	2121	pgeneral,
charlesmn	0:3ac96e360672	2122	ptiming,
charlesmn	0:3ac96e360672	2123	pdynamic,
charlesmn	0:3ac96e360672	2124	psystem,
charlesmn	0:3ac96e360672	2125	ptuning_parms,
charlesmn	0:3ac96e360672	2126	pzone_cfg);
charlesmn	0:3ac96e360672	2127	break;
charlesmn	0:3ac96e360672	2128
charlesmn	0:3ac96e360672	2129	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE:
charlesmn	0:3ac96e360672	2130	status = VL53L1_preset_mode_histogram_medium_range(
charlesmn	0:3ac96e360672	2131	phistpostprocess,
charlesmn	0:3ac96e360672	2132	pstatic,
charlesmn	0:3ac96e360672	2133	phistogram,
charlesmn	0:3ac96e360672	2134	pgeneral,
charlesmn	0:3ac96e360672	2135	ptiming,
charlesmn	0:3ac96e360672	2136	pdynamic,
charlesmn	0:3ac96e360672	2137	psystem,
charlesmn	0:3ac96e360672	2138	ptuning_parms,
charlesmn	0:3ac96e360672	2139	pzone_cfg);
charlesmn	0:3ac96e360672	2140	break;
charlesmn	0:3ac96e360672	2141
charlesmn	0:3ac96e360672	2142	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1:
charlesmn	0:3ac96e360672	2143	status = VL53L1_preset_mode_histogram_medium_range_mm1(
charlesmn	0:3ac96e360672	2144	phistpostprocess,
charlesmn	0:3ac96e360672	2145	pstatic,
charlesmn	0:3ac96e360672	2146	phistogram,
charlesmn	0:3ac96e360672	2147	pgeneral,
charlesmn	0:3ac96e360672	2148	ptiming,
charlesmn	0:3ac96e360672	2149	pdynamic,
charlesmn	0:3ac96e360672	2150	psystem,
charlesmn	0:3ac96e360672	2151	ptuning_parms,
charlesmn	0:3ac96e360672	2152	pzone_cfg);
charlesmn	0:3ac96e360672	2153	break;
charlesmn	0:3ac96e360672	2154
charlesmn	0:3ac96e360672	2155	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2:
charlesmn	0:3ac96e360672	2156	status = VL53L1_preset_mode_histogram_medium_range_mm2(
charlesmn	0:3ac96e360672	2157	phistpostprocess,
charlesmn	0:3ac96e360672	2158	pstatic,
charlesmn	0:3ac96e360672	2159	phistogram,
charlesmn	0:3ac96e360672	2160	pgeneral,
charlesmn	0:3ac96e360672	2161	ptiming,
charlesmn	0:3ac96e360672	2162	pdynamic,
charlesmn	0:3ac96e360672	2163	psystem,
charlesmn	0:3ac96e360672	2164	ptuning_parms,
charlesmn	0:3ac96e360672	2165	pzone_cfg);
charlesmn	0:3ac96e360672	2166	break;
charlesmn	0:3ac96e360672	2167
charlesmn	0:3ac96e360672	2168	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE:
charlesmn	0:3ac96e360672	2169	status = VL53L1_preset_mode_histogram_short_range(
charlesmn	0:3ac96e360672	2170	phistpostprocess,
charlesmn	0:3ac96e360672	2171	pstatic,
charlesmn	0:3ac96e360672	2172	phistogram,
charlesmn	0:3ac96e360672	2173	pgeneral,
charlesmn	0:3ac96e360672	2174	ptiming,
charlesmn	0:3ac96e360672	2175	pdynamic,
charlesmn	0:3ac96e360672	2176	psystem,
charlesmn	0:3ac96e360672	2177	ptuning_parms,
charlesmn	0:3ac96e360672	2178	pzone_cfg);
charlesmn	0:3ac96e360672	2179	break;
charlesmn	0:3ac96e360672	2180
charlesmn	0:3ac96e360672	2181	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1:
charlesmn	0:3ac96e360672	2182	status = VL53L1_preset_mode_histogram_short_range_mm1(
charlesmn	0:3ac96e360672	2183	phistpostprocess,
charlesmn	0:3ac96e360672	2184	pstatic,
charlesmn	0:3ac96e360672	2185	phistogram,
charlesmn	0:3ac96e360672	2186	pgeneral,
charlesmn	0:3ac96e360672	2187	ptiming,
charlesmn	0:3ac96e360672	2188	pdynamic,
charlesmn	0:3ac96e360672	2189	psystem,
charlesmn	0:3ac96e360672	2190	ptuning_parms,
charlesmn	0:3ac96e360672	2191	pzone_cfg);
charlesmn	0:3ac96e360672	2192	break;
charlesmn	0:3ac96e360672	2193
charlesmn	0:3ac96e360672	2194	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2:
charlesmn	0:3ac96e360672	2195	status = VL53L1_preset_mode_histogram_short_range_mm2(
charlesmn	0:3ac96e360672	2196	phistpostprocess,
charlesmn	0:3ac96e360672	2197	pstatic,
charlesmn	0:3ac96e360672	2198	phistogram,
charlesmn	0:3ac96e360672	2199	pgeneral,
charlesmn	0:3ac96e360672	2200	ptiming,
charlesmn	0:3ac96e360672	2201	pdynamic,
charlesmn	0:3ac96e360672	2202	psystem,
charlesmn	0:3ac96e360672	2203	ptuning_parms,
charlesmn	0:3ac96e360672	2204	pzone_cfg);
charlesmn	0:3ac96e360672	2205	break;
charlesmn	0:3ac96e360672	2206
charlesmn	0:3ac96e360672	2207	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION:
charlesmn	0:3ac96e360672	2208	status = VL53L1_preset_mode_histogram_characterisation(
charlesmn	0:3ac96e360672	2209	phistpostprocess,
charlesmn	0:3ac96e360672	2210	pstatic,
charlesmn	0:3ac96e360672	2211	phistogram,
charlesmn	0:3ac96e360672	2212	pgeneral,
charlesmn	0:3ac96e360672	2213	ptiming,
charlesmn	0:3ac96e360672	2214	pdynamic,
charlesmn	0:3ac96e360672	2215	psystem,
charlesmn	0:3ac96e360672	2216	ptuning_parms,
charlesmn	0:3ac96e360672	2217	pzone_cfg);
charlesmn	0:3ac96e360672	2218	break;
charlesmn	0:3ac96e360672	2219
charlesmn	0:3ac96e360672	2220	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_PLANAR:
charlesmn	0:3ac96e360672	2221	status = VL53L1_preset_mode_histogram_xtalk_planar(
charlesmn	0:3ac96e360672	2222	phistpostprocess,
charlesmn	0:3ac96e360672	2223	pstatic,
charlesmn	0:3ac96e360672	2224	phistogram,
charlesmn	0:3ac96e360672	2225	pgeneral,
charlesmn	0:3ac96e360672	2226	ptiming,
charlesmn	0:3ac96e360672	2227	pdynamic,
charlesmn	0:3ac96e360672	2228	psystem,
charlesmn	0:3ac96e360672	2229	ptuning_parms,
charlesmn	0:3ac96e360672	2230	pzone_cfg);
charlesmn	0:3ac96e360672	2231	break;
charlesmn	0:3ac96e360672	2232
charlesmn	0:3ac96e360672	2233	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM1:
charlesmn	0:3ac96e360672	2234	status = VL53L1_preset_mode_histogram_xtalk_mm1(
charlesmn	0:3ac96e360672	2235	phistpostprocess,
charlesmn	0:3ac96e360672	2236	pstatic,
charlesmn	0:3ac96e360672	2237	phistogram,
charlesmn	0:3ac96e360672	2238	pgeneral,
charlesmn	0:3ac96e360672	2239	ptiming,
charlesmn	0:3ac96e360672	2240	pdynamic,
charlesmn	0:3ac96e360672	2241	psystem,
charlesmn	0:3ac96e360672	2242	ptuning_parms,
charlesmn	0:3ac96e360672	2243	pzone_cfg);
charlesmn	0:3ac96e360672	2244	break;
charlesmn	0:3ac96e360672	2245
charlesmn	0:3ac96e360672	2246	case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM2:
charlesmn	0:3ac96e360672	2247	status = VL53L1_preset_mode_histogram_xtalk_mm2(
charlesmn	0:3ac96e360672	2248	phistpostprocess,
charlesmn	0:3ac96e360672	2249	pstatic,
charlesmn	0:3ac96e360672	2250	phistogram,
charlesmn	0:3ac96e360672	2251	pgeneral,
charlesmn	0:3ac96e360672	2252	ptiming,
charlesmn	0:3ac96e360672	2253	pdynamic,
charlesmn	0:3ac96e360672	2254	psystem,
charlesmn	0:3ac96e360672	2255	ptuning_parms,
charlesmn	0:3ac96e360672	2256	pzone_cfg);
charlesmn	0:3ac96e360672	2257	break;
charlesmn	0:3ac96e360672	2258
charlesmn	0:3ac96e360672	2259	case VL53L1_DEVICEPRESETMODE_OLT:
charlesmn	0:3ac96e360672	2260	status = VL53L1_preset_mode_olt(
charlesmn	0:3ac96e360672	2261	pstatic,
charlesmn	0:3ac96e360672	2262	phistogram,
charlesmn	0:3ac96e360672	2263	pgeneral,
charlesmn	0:3ac96e360672	2264	ptiming,
charlesmn	0:3ac96e360672	2265	pdynamic,
charlesmn	0:3ac96e360672	2266	psystem,
charlesmn	0:3ac96e360672	2267	ptuning_parms,
charlesmn	0:3ac96e360672	2268	pzone_cfg);
charlesmn	0:3ac96e360672	2269	break;
charlesmn	0:3ac96e360672	2270
charlesmn	0:3ac96e360672	2271	case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING:
charlesmn	0:3ac96e360672	2272	status = VL53L1_preset_mode_singleshot_ranging(
charlesmn	0:3ac96e360672	2273	pstatic,
charlesmn	0:3ac96e360672	2274	phistogram,
charlesmn	0:3ac96e360672	2275	pgeneral,
charlesmn	0:3ac96e360672	2276	ptiming,
charlesmn	0:3ac96e360672	2277	pdynamic,
charlesmn	0:3ac96e360672	2278	psystem,
charlesmn	0:3ac96e360672	2279	ptuning_parms,
charlesmn	0:3ac96e360672	2280	pzone_cfg);
charlesmn	0:3ac96e360672	2281	break;
charlesmn	0:3ac96e360672	2282
charlesmn	0:3ac96e360672	2283	case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE:
charlesmn	0:3ac96e360672	2284	status = VL53L1_preset_mode_low_power_auto_short_ranging(
charlesmn	0:3ac96e360672	2285	pstatic,
charlesmn	0:3ac96e360672	2286	phistogram,
charlesmn	0:3ac96e360672	2287	pgeneral,
charlesmn	0:3ac96e360672	2288	ptiming,
charlesmn	0:3ac96e360672	2289	pdynamic,
charlesmn	0:3ac96e360672	2290	psystem,
charlesmn	0:3ac96e360672	2291	ptuning_parms,
charlesmn	0:3ac96e360672	2292	pzone_cfg,
charlesmn	0:3ac96e360672	2293	plpadata);
charlesmn	0:3ac96e360672	2294	break;
charlesmn	0:3ac96e360672	2295
charlesmn	0:3ac96e360672	2296	case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE:
charlesmn	0:3ac96e360672	2297	status = VL53L1_preset_mode_low_power_auto_ranging(
charlesmn	0:3ac96e360672	2298	pstatic,
charlesmn	0:3ac96e360672	2299	phistogram,
charlesmn	0:3ac96e360672	2300	pgeneral,
charlesmn	0:3ac96e360672	2301	ptiming,
charlesmn	0:3ac96e360672	2302	pdynamic,
charlesmn	0:3ac96e360672	2303	psystem,
charlesmn	0:3ac96e360672	2304	ptuning_parms,
charlesmn	0:3ac96e360672	2305	pzone_cfg,
charlesmn	0:3ac96e360672	2306	plpadata);
charlesmn	0:3ac96e360672	2307	break;
charlesmn	0:3ac96e360672	2308
charlesmn	0:3ac96e360672	2309	case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE:
charlesmn	0:3ac96e360672	2310	status = VL53L1_preset_mode_low_power_auto_long_ranging(
charlesmn	0:3ac96e360672	2311	pstatic,
charlesmn	0:3ac96e360672	2312	phistogram,
charlesmn	0:3ac96e360672	2313	pgeneral,
charlesmn	0:3ac96e360672	2314	ptiming,
charlesmn	0:3ac96e360672	2315	pdynamic,
charlesmn	0:3ac96e360672	2316	psystem,
charlesmn	0:3ac96e360672	2317	ptuning_parms,
charlesmn	0:3ac96e360672	2318	pzone_cfg,
charlesmn	0:3ac96e360672	2319	plpadata);
charlesmn	0:3ac96e360672	2320	break;
charlesmn	0:3ac96e360672	2321
charlesmn	0:3ac96e360672	2322
charlesmn	0:3ac96e360672	2323	case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE:
charlesmn	0:3ac96e360672	2324	status = VL53L1_preset_mode_special_histogram_short_range(
charlesmn	0:3ac96e360672	2325	phistpostprocess,
charlesmn	0:3ac96e360672	2326	pstatic,
charlesmn	0:3ac96e360672	2327	phistogram,
charlesmn	0:3ac96e360672	2328	pgeneral,
charlesmn	0:3ac96e360672	2329	ptiming,
charlesmn	0:3ac96e360672	2330	pdynamic,
charlesmn	0:3ac96e360672	2331	psystem,
charlesmn	0:3ac96e360672	2332	ptuning_parms,
charlesmn	0:3ac96e360672	2333	pzone_cfg);
charlesmn	0:3ac96e360672	2334	break;
charlesmn	0:3ac96e360672	2335
charlesmn	0:3ac96e360672	2336	default:
charlesmn	0:3ac96e360672	2337	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	2338	break;
charlesmn	0:3ac96e360672	2339
charlesmn	0:3ac96e360672	2340	}
charlesmn	0:3ac96e360672	2341
charlesmn	0:3ac96e360672	2342
charlesmn	0:3ac96e360672	2343
charlesmn	0:3ac96e360672	2344	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2345
charlesmn	0:3ac96e360672	2346	pstatic->dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	2347	dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	2348	pdev->dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	2349	dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	2350
charlesmn	0:3ac96e360672	2351	}
charlesmn	0:3ac96e360672	2352
charlesmn	0:3ac96e360672	2353
charlesmn	0:3ac96e360672	2354
charlesmn	0:3ac96e360672	2355	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	2356	status =
charlesmn	0:3ac96e360672	2357	VL53L1_set_timeouts_us(
charlesmn	0:3ac96e360672	2358	Dev,
charlesmn	0:3ac96e360672	2359	phasecal_config_timeout_us,
charlesmn	0:3ac96e360672	2360	mm_config_timeout_us,
charlesmn	0:3ac96e360672	2361	range_config_timeout_us);
charlesmn	0:3ac96e360672	2362
charlesmn	0:3ac96e360672	2363	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	2364	status =
charlesmn	0:3ac96e360672	2365	VL53L1_set_inter_measurement_period_ms(
charlesmn	0:3ac96e360672	2366	Dev,
charlesmn	0:3ac96e360672	2367	inter_measurement_period_ms);
charlesmn	0:3ac96e360672	2368
charlesmn	0:3ac96e360672	2369
charlesmn	0:3ac96e360672	2370
charlesmn	0:3ac96e360672	2371	V53L1_init_zone_results_structure(
charlesmn	0:3ac96e360672	2372	pdev->zone_cfg.active_zones+1,
charlesmn	0:3ac96e360672	2373	&(pres->zone_results));
charlesmn	0:3ac96e360672	2374
charlesmn	0:3ac96e360672	2375	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2376
charlesmn	0:3ac96e360672	2377	return status;
charlesmn	0:3ac96e360672	2378	}
charlesmn	0:3ac96e360672	2379
charlesmn	0:3ac96e360672	2380
charlesmn	0:3ac96e360672	2381	VL53L1_Error VL53L1_set_zone_preset(
charlesmn	0:3ac96e360672	2382	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2383	VL53L1_DeviceZonePreset zone_preset)
charlesmn	0:3ac96e360672	2384	{
charlesmn	0:3ac96e360672	2385
charlesmn	0:3ac96e360672	2386
charlesmn	0:3ac96e360672	2387	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2388	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2389
charlesmn	0:3ac96e360672	2390	VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn	0:3ac96e360672	2391	VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg);
charlesmn	0:3ac96e360672	2392
charlesmn	0:3ac96e360672	2393	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2394
charlesmn	0:3ac96e360672	2395
charlesmn	0:3ac96e360672	2396	pdev->zone_preset = zone_preset;
charlesmn	0:3ac96e360672	2397
charlesmn	0:3ac96e360672	2398
charlesmn	0:3ac96e360672	2399
charlesmn	0:3ac96e360672	2400	switch (zone_preset) {
charlesmn	0:3ac96e360672	2401
charlesmn	0:3ac96e360672	2402	case VL53L1_DEVICEZONEPRESET_XTALK_PLANAR:
charlesmn	0:3ac96e360672	2403	status =
charlesmn	0:3ac96e360672	2404	VL53L1_zone_preset_xtalk_planar(
charlesmn	0:3ac96e360672	2405	pgeneral,
charlesmn	0:3ac96e360672	2406	pzone_cfg);
charlesmn	0:3ac96e360672	2407	break;
charlesmn	0:3ac96e360672	2408
charlesmn	0:3ac96e360672	2409	case VL53L1_DEVICEZONEPRESET_1X1_SIZE_16X16:
charlesmn	0:3ac96e360672	2410	status =
charlesmn	0:3ac96e360672	2411	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2412	8, 1, 1,
charlesmn	0:3ac96e360672	2413	8, 1, 1,
charlesmn	0:3ac96e360672	2414	15, 15,
charlesmn	0:3ac96e360672	2415	pzone_cfg);
charlesmn	0:3ac96e360672	2416	break;
charlesmn	0:3ac96e360672	2417
charlesmn	0:3ac96e360672	2418	case VL53L1_DEVICEZONEPRESET_1X2_SIZE_16X8:
charlesmn	0:3ac96e360672	2419	status =
charlesmn	0:3ac96e360672	2420	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2421	8, 1, 1,
charlesmn	0:3ac96e360672	2422	4, 8, 2,
charlesmn	0:3ac96e360672	2423	15, 7,
charlesmn	0:3ac96e360672	2424	pzone_cfg);
charlesmn	0:3ac96e360672	2425	break;
charlesmn	0:3ac96e360672	2426
charlesmn	0:3ac96e360672	2427	case VL53L1_DEVICEZONEPRESET_2X1_SIZE_8X16:
charlesmn	0:3ac96e360672	2428	status =
charlesmn	0:3ac96e360672	2429	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2430	4, 8, 2,
charlesmn	0:3ac96e360672	2431	8, 1, 1,
charlesmn	0:3ac96e360672	2432	7, 15,
charlesmn	0:3ac96e360672	2433	pzone_cfg);
charlesmn	0:3ac96e360672	2434	break;
charlesmn	0:3ac96e360672	2435
charlesmn	0:3ac96e360672	2436	case VL53L1_DEVICEZONEPRESET_2X2_SIZE_8X8:
charlesmn	0:3ac96e360672	2437	status =
charlesmn	0:3ac96e360672	2438	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2439	4, 8, 2,
charlesmn	0:3ac96e360672	2440	4, 8, 2,
charlesmn	0:3ac96e360672	2441	7, 7,
charlesmn	0:3ac96e360672	2442	pzone_cfg);
charlesmn	0:3ac96e360672	2443	break;
charlesmn	0:3ac96e360672	2444
charlesmn	0:3ac96e360672	2445	case VL53L1_DEVICEZONEPRESET_3X3_SIZE_5X5:
charlesmn	0:3ac96e360672	2446	status =
charlesmn	0:3ac96e360672	2447	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2448	2, 5, 3,
charlesmn	0:3ac96e360672	2449	2, 5, 3,
charlesmn	0:3ac96e360672	2450	4, 4,
charlesmn	0:3ac96e360672	2451	pzone_cfg);
charlesmn	0:3ac96e360672	2452	break;
charlesmn	0:3ac96e360672	2453
charlesmn	0:3ac96e360672	2454	case VL53L1_DEVICEZONEPRESET_4X4_SIZE_4X4:
charlesmn	0:3ac96e360672	2455	status =
charlesmn	0:3ac96e360672	2456	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2457	2, 4, 4,
charlesmn	0:3ac96e360672	2458	2, 4, 4,
charlesmn	0:3ac96e360672	2459	3, 3,
charlesmn	0:3ac96e360672	2460	pzone_cfg);
charlesmn	0:3ac96e360672	2461	break;
charlesmn	0:3ac96e360672	2462
charlesmn	0:3ac96e360672	2463	case VL53L1_DEVICEZONEPRESET_5X5_SIZE_4X4:
charlesmn	0:3ac96e360672	2464	status =
charlesmn	0:3ac96e360672	2465	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2466	2, 3, 5,
charlesmn	0:3ac96e360672	2467	2, 3, 5,
charlesmn	0:3ac96e360672	2468	3, 3,
charlesmn	0:3ac96e360672	2469	pzone_cfg);
charlesmn	0:3ac96e360672	2470	break;
charlesmn	0:3ac96e360672	2471
charlesmn	0:3ac96e360672	2472	case VL53L1_DEVICEZONEPRESET_11X11_SIZE_5X5:
charlesmn	0:3ac96e360672	2473	status =
charlesmn	0:3ac96e360672	2474	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2475	3, 1, 11,
charlesmn	0:3ac96e360672	2476	3, 1, 11,
charlesmn	0:3ac96e360672	2477	4, 4,
charlesmn	0:3ac96e360672	2478	pzone_cfg);
charlesmn	0:3ac96e360672	2479	break;
charlesmn	0:3ac96e360672	2480
charlesmn	0:3ac96e360672	2481	case VL53L1_DEVICEZONEPRESET_13X13_SIZE_4X4:
charlesmn	0:3ac96e360672	2482	status =
charlesmn	0:3ac96e360672	2483	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2484	2, 1, 13,
charlesmn	0:3ac96e360672	2485	2, 1, 13,
charlesmn	0:3ac96e360672	2486	3, 3,
charlesmn	0:3ac96e360672	2487	pzone_cfg);
charlesmn	0:3ac96e360672	2488
charlesmn	0:3ac96e360672	2489	break;
charlesmn	0:3ac96e360672	2490
charlesmn	0:3ac96e360672	2491	case VL53L1_DEVICEZONEPRESET_1X1_SIZE_4X4_POS_8X8:
charlesmn	0:3ac96e360672	2492	status =
charlesmn	0:3ac96e360672	2493	VL53L1_init_zone_config_structure(
charlesmn	0:3ac96e360672	2494	8, 1, 1,
charlesmn	0:3ac96e360672	2495	8, 1, 1,
charlesmn	0:3ac96e360672	2496	3, 3,
charlesmn	0:3ac96e360672	2497	pzone_cfg);
charlesmn	0:3ac96e360672	2498	break;
charlesmn	0:3ac96e360672	2499
charlesmn	0:3ac96e360672	2500	}
charlesmn	0:3ac96e360672	2501
charlesmn	0:3ac96e360672	2502
charlesmn	0:3ac96e360672	2503
charlesmn	0:3ac96e360672	2504	if (pzone_cfg->active_zones == 0)
charlesmn	0:3ac96e360672	2505	pdev->gen_cfg.global_config__stream_divider = 0;
charlesmn	0:3ac96e360672	2506	else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES)
charlesmn	0:3ac96e360672	2507	pdev->gen_cfg.global_config__stream_divider =
charlesmn	0:3ac96e360672	2508	pzone_cfg->active_zones + 1;
charlesmn	0:3ac96e360672	2509	else
charlesmn	0:3ac96e360672	2510	pdev->gen_cfg.global_config__stream_divider =
charlesmn	0:3ac96e360672	2511	VL53L1_MAX_USER_ZONES + 1;
charlesmn	0:3ac96e360672	2512
charlesmn	0:3ac96e360672	2513	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2514
charlesmn	0:3ac96e360672	2515	return status;
charlesmn	0:3ac96e360672	2516	}
charlesmn	0:3ac96e360672	2517
charlesmn	0:3ac96e360672	2518
charlesmn	0:3ac96e360672	2519	VL53L1_Error VL53L1_enable_xtalk_compensation(
charlesmn	0:3ac96e360672	2520	VL53L1_DEV Dev)
charlesmn	0:3ac96e360672	2521	{
charlesmn	0:3ac96e360672	2522
charlesmn	0:3ac96e360672	2523
charlesmn	0:3ac96e360672	2524	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2525	uint32_t tempu32;
charlesmn	0:3ac96e360672	2526
charlesmn	0:3ac96e360672	2527	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2528	VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn	0:3ac96e360672	2529	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	2530	VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn	0:3ac96e360672	2531
charlesmn	0:3ac96e360672	2532	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2533
charlesmn	0:3ac96e360672	2534
charlesmn	0:3ac96e360672	2535	tempu32 = VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn	0:3ac96e360672	2536	pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	2537	pC->lite_mode_crosstalk_margin_kcps);
charlesmn	0:3ac96e360672	2538	if (tempu32 > 0xFFFF)
charlesmn	0:3ac96e360672	2539	tempu32 = 0xFFFF;
charlesmn	0:3ac96e360672	2540
charlesmn	0:3ac96e360672	2541	pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	2542	(uint16_t)tempu32;
charlesmn	0:3ac96e360672	2543
charlesmn	0:3ac96e360672	2544	pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	2545	pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	2546
charlesmn	0:3ac96e360672	2547	pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	2548	pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	2549
charlesmn	0:3ac96e360672	2550
charlesmn	0:3ac96e360672	2551	pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	2552	VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn	0:3ac96e360672	2553	pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	2554	pC->histogram_mode_crosstalk_margin_kcps);
charlesmn	0:3ac96e360672	2555
charlesmn	0:3ac96e360672	2556	pHP->algo__crosstalk_compensation_x_plane_gradient_kcps
charlesmn	0:3ac96e360672	2557	= pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	2558	pHP->algo__crosstalk_compensation_y_plane_gradient_kcps
charlesmn	0:3ac96e360672	2559	= pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	2560
charlesmn	0:3ac96e360672	2561
charlesmn	0:3ac96e360672	2562
charlesmn	0:3ac96e360672	2563	pC->global_crosstalk_compensation_enable = 0x01;
charlesmn	0:3ac96e360672	2564
charlesmn	0:3ac96e360672	2565	pHP->algo__crosstalk_compensation_enable =
charlesmn	0:3ac96e360672	2566	pC->global_crosstalk_compensation_enable;
charlesmn	0:3ac96e360672	2567
charlesmn	0:3ac96e360672	2568
charlesmn	0:3ac96e360672	2569
charlesmn	0:3ac96e360672	2570
charlesmn	0:3ac96e360672	2571	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2572	pC->crosstalk_range_ignore_threshold_rate_mcps =
charlesmn	0:3ac96e360672	2573	VL53L1_calc_range_ignore_threshold(
charlesmn	0:3ac96e360672	2574	pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	2575	pC->algo__crosstalk_compensation_x_plane_gradient_kcps,
charlesmn	0:3ac96e360672	2576	pC->algo__crosstalk_compensation_y_plane_gradient_kcps,
charlesmn	0:3ac96e360672	2577	pC->crosstalk_range_ignore_threshold_mult);
charlesmn	0:3ac96e360672	2578	}
charlesmn	0:3ac96e360672	2579
charlesmn	0:3ac96e360672	2580
charlesmn	0:3ac96e360672	2581
charlesmn	0:3ac96e360672	2582	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	2583	status =
charlesmn	0:3ac96e360672	2584	VL53L1_set_customer_nvm_managed(
charlesmn	0:3ac96e360672	2585	Dev,
charlesmn	0:3ac96e360672	2586	&(pdev->customer));
charlesmn	0:3ac96e360672	2587
charlesmn	0:3ac96e360672	2588	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2589
charlesmn	0:3ac96e360672	2590	return status;
charlesmn	0:3ac96e360672	2591
charlesmn	0:3ac96e360672	2592	}
charlesmn	0:3ac96e360672	2593
charlesmn	0:3ac96e360672	2594	void VL53L1_get_xtalk_compensation_enable(
charlesmn	0:3ac96e360672	2595	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2596	uint8_t *pcrosstalk_compensation_enable)
charlesmn	0:3ac96e360672	2597	{
charlesmn	0:3ac96e360672	2598
charlesmn	0:3ac96e360672	2599
charlesmn	0:3ac96e360672	2600	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2601
charlesmn	0:3ac96e360672	2602	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2603
charlesmn	0:3ac96e360672	2604
charlesmn	0:3ac96e360672	2605
charlesmn	0:3ac96e360672	2606	*pcrosstalk_compensation_enable =
charlesmn	0:3ac96e360672	2607	pdev->xtalk_cfg.global_crosstalk_compensation_enable;
charlesmn	0:3ac96e360672	2608
charlesmn	0:3ac96e360672	2609	}
charlesmn	0:3ac96e360672	2610
charlesmn	0:3ac96e360672	2611
charlesmn	0:3ac96e360672	2612	VL53L1_Error VL53L1_get_lite_xtalk_margin_kcps(
charlesmn	0:3ac96e360672	2613	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2614	int16_t *pxtalk_margin)
charlesmn	0:3ac96e360672	2615	{
charlesmn	0:3ac96e360672	2616
charlesmn	0:3ac96e360672	2617
charlesmn	0:3ac96e360672	2618
charlesmn	0:3ac96e360672	2619	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2620
charlesmn	0:3ac96e360672	2621	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2622
charlesmn	0:3ac96e360672	2623	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2624
charlesmn	0:3ac96e360672	2625	*pxtalk_margin = pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn	0:3ac96e360672	2626
charlesmn	0:3ac96e360672	2627	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2628
charlesmn	0:3ac96e360672	2629	return status;
charlesmn	0:3ac96e360672	2630
charlesmn	0:3ac96e360672	2631	}
charlesmn	0:3ac96e360672	2632
charlesmn	0:3ac96e360672	2633	VL53L1_Error VL53L1_set_lite_xtalk_margin_kcps(
charlesmn	0:3ac96e360672	2634	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2635	int16_t xtalk_margin)
charlesmn	0:3ac96e360672	2636	{
charlesmn	0:3ac96e360672	2637
charlesmn	0:3ac96e360672	2638
charlesmn	0:3ac96e360672	2639
charlesmn	0:3ac96e360672	2640	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2641
charlesmn	0:3ac96e360672	2642	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2643
charlesmn	0:3ac96e360672	2644	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2645
charlesmn	0:3ac96e360672	2646	pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = xtalk_margin;
charlesmn	0:3ac96e360672	2647
charlesmn	0:3ac96e360672	2648	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2649
charlesmn	0:3ac96e360672	2650	return status;
charlesmn	0:3ac96e360672	2651	}
charlesmn	0:3ac96e360672	2652
charlesmn	0:3ac96e360672	2653
charlesmn	0:3ac96e360672	2654	VL53L1_Error VL53L1_get_histogram_xtalk_margin_kcps(
charlesmn	0:3ac96e360672	2655	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2656	int16_t *pxtalk_margin)
charlesmn	0:3ac96e360672	2657	{
charlesmn	0:3ac96e360672	2658
charlesmn	0:3ac96e360672	2659
charlesmn	0:3ac96e360672	2660
charlesmn	0:3ac96e360672	2661	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2662
charlesmn	0:3ac96e360672	2663	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2664
charlesmn	0:3ac96e360672	2665	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2666
charlesmn	0:3ac96e360672	2667	*pxtalk_margin = pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn	0:3ac96e360672	2668
charlesmn	0:3ac96e360672	2669	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2670
charlesmn	0:3ac96e360672	2671	return status;
charlesmn	0:3ac96e360672	2672
charlesmn	0:3ac96e360672	2673	}
charlesmn	0:3ac96e360672	2674
charlesmn	0:3ac96e360672	2675	VL53L1_Error VL53L1_set_histogram_xtalk_margin_kcps(
charlesmn	0:3ac96e360672	2676	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2677	int16_t xtalk_margin)
charlesmn	0:3ac96e360672	2678	{
charlesmn	0:3ac96e360672	2679
charlesmn	0:3ac96e360672	2680
charlesmn	0:3ac96e360672	2681
charlesmn	0:3ac96e360672	2682	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2683
charlesmn	0:3ac96e360672	2684	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2685
charlesmn	0:3ac96e360672	2686	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2687
charlesmn	0:3ac96e360672	2688	pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = xtalk_margin;
charlesmn	0:3ac96e360672	2689
charlesmn	0:3ac96e360672	2690	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2691
charlesmn	0:3ac96e360672	2692	return status;
charlesmn	0:3ac96e360672	2693	}
charlesmn	0:3ac96e360672	2694
charlesmn	0:3ac96e360672	2695	VL53L1_Error VL53L1_restore_xtalk_nvm_default(
charlesmn	0:3ac96e360672	2696	VL53L1_DEV Dev)
charlesmn	0:3ac96e360672	2697	{
charlesmn	0:3ac96e360672	2698
charlesmn	0:3ac96e360672	2699
charlesmn	0:3ac96e360672	2700
charlesmn	0:3ac96e360672	2701	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2702
charlesmn	0:3ac96e360672	2703	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2704	VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn	0:3ac96e360672	2705
charlesmn	0:3ac96e360672	2706	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2707
charlesmn	0:3ac96e360672	2708	pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	2709	pC->nvm_default__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	2710	pC->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	2711	pC->nvm_default__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	2712	pC->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	2713	pC->nvm_default__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	2714
charlesmn	0:3ac96e360672	2715	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2716
charlesmn	0:3ac96e360672	2717	return status;
charlesmn	0:3ac96e360672	2718	}
charlesmn	0:3ac96e360672	2719
charlesmn	0:3ac96e360672	2720	VL53L1_Error VL53L1_disable_xtalk_compensation(
charlesmn	0:3ac96e360672	2721	VL53L1_DEV Dev)
charlesmn	0:3ac96e360672	2722	{
charlesmn	0:3ac96e360672	2723
charlesmn	0:3ac96e360672	2724
charlesmn	0:3ac96e360672	2725	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2726
charlesmn	0:3ac96e360672	2727	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2728	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	2729	VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn	0:3ac96e360672	2730
charlesmn	0:3ac96e360672	2731	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2732
charlesmn	0:3ac96e360672	2733
charlesmn	0:3ac96e360672	2734	pN->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	2735	0x00;
charlesmn	0:3ac96e360672	2736
charlesmn	0:3ac96e360672	2737	pN->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	2738	0x00;
charlesmn	0:3ac96e360672	2739
charlesmn	0:3ac96e360672	2740	pN->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	2741	0x00;
charlesmn	0:3ac96e360672	2742
charlesmn	0:3ac96e360672	2743
charlesmn	0:3ac96e360672	2744
charlesmn	0:3ac96e360672	2745	pdev->xtalk_cfg.global_crosstalk_compensation_enable = 0x00;
charlesmn	0:3ac96e360672	2746
charlesmn	0:3ac96e360672	2747	pHP->algo__crosstalk_compensation_enable =
charlesmn	0:3ac96e360672	2748	pdev->xtalk_cfg.global_crosstalk_compensation_enable;
charlesmn	0:3ac96e360672	2749
charlesmn	0:3ac96e360672	2750
charlesmn	0:3ac96e360672	2751
charlesmn	0:3ac96e360672	2752	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2753	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps =
charlesmn	0:3ac96e360672	2754	0x0000;
charlesmn	0:3ac96e360672	2755	}
charlesmn	0:3ac96e360672	2756
charlesmn	0:3ac96e360672	2757
charlesmn	0:3ac96e360672	2758
charlesmn	0:3ac96e360672	2759	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	2760	status =
charlesmn	0:3ac96e360672	2761	VL53L1_set_customer_nvm_managed(
charlesmn	0:3ac96e360672	2762	Dev,
charlesmn	0:3ac96e360672	2763	&(pdev->customer));
charlesmn	0:3ac96e360672	2764	}
charlesmn	0:3ac96e360672	2765	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2766
charlesmn	0:3ac96e360672	2767	return status;
charlesmn	0:3ac96e360672	2768
charlesmn	0:3ac96e360672	2769	}
charlesmn	0:3ac96e360672	2770
charlesmn	0:3ac96e360672	2771
charlesmn	0:3ac96e360672	2772	VL53L1_Error VL53L1_get_histogram_phase_consistency(
charlesmn	0:3ac96e360672	2773	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2774	uint8_t *pphase_consistency)
charlesmn	0:3ac96e360672	2775	{
charlesmn	0:3ac96e360672	2776
charlesmn	0:3ac96e360672	2777
charlesmn	0:3ac96e360672	2778
charlesmn	0:3ac96e360672	2779	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2780
charlesmn	0:3ac96e360672	2781	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2782	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	2783
charlesmn	0:3ac96e360672	2784	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2785
charlesmn	0:3ac96e360672	2786	*pphase_consistency =
charlesmn	0:3ac96e360672	2787	pHP->algo__consistency_check__phase_tolerance;
charlesmn	0:3ac96e360672	2788
charlesmn	0:3ac96e360672	2789	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2790
charlesmn	0:3ac96e360672	2791	return status;
charlesmn	0:3ac96e360672	2792
charlesmn	0:3ac96e360672	2793	}
charlesmn	0:3ac96e360672	2794
charlesmn	0:3ac96e360672	2795	VL53L1_Error VL53L1_set_histogram_phase_consistency(
charlesmn	0:3ac96e360672	2796	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2797	uint8_t phase_consistency)
charlesmn	0:3ac96e360672	2798	{
charlesmn	0:3ac96e360672	2799
charlesmn	0:3ac96e360672	2800
charlesmn	0:3ac96e360672	2801
charlesmn	0:3ac96e360672	2802	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2803
charlesmn	0:3ac96e360672	2804	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2805
charlesmn	0:3ac96e360672	2806	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2807
charlesmn	0:3ac96e360672	2808	pdev->histpostprocess.algo__consistency_check__phase_tolerance =
charlesmn	0:3ac96e360672	2809	phase_consistency;
charlesmn	0:3ac96e360672	2810
charlesmn	0:3ac96e360672	2811	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2812
charlesmn	0:3ac96e360672	2813	return status;
charlesmn	0:3ac96e360672	2814
charlesmn	0:3ac96e360672	2815	}
charlesmn	0:3ac96e360672	2816
charlesmn	0:3ac96e360672	2817	VL53L1_Error VL53L1_get_histogram_event_consistency(
charlesmn	0:3ac96e360672	2818	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2819	uint8_t *pevent_consistency)
charlesmn	0:3ac96e360672	2820	{
charlesmn	0:3ac96e360672	2821
charlesmn	0:3ac96e360672	2822
charlesmn	0:3ac96e360672	2823
charlesmn	0:3ac96e360672	2824	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2825
charlesmn	0:3ac96e360672	2826	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2827
charlesmn	0:3ac96e360672	2828	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2829
charlesmn	0:3ac96e360672	2830	*pevent_consistency =
charlesmn	0:3ac96e360672	2831	pdev->histpostprocess.algo__consistency_check__event_sigma;
charlesmn	0:3ac96e360672	2832
charlesmn	0:3ac96e360672	2833	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2834
charlesmn	0:3ac96e360672	2835	return status;
charlesmn	0:3ac96e360672	2836
charlesmn	0:3ac96e360672	2837	}
charlesmn	0:3ac96e360672	2838
charlesmn	0:3ac96e360672	2839	VL53L1_Error VL53L1_set_histogram_event_consistency(
charlesmn	0:3ac96e360672	2840	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2841	uint8_t event_consistency)
charlesmn	0:3ac96e360672	2842	{
charlesmn	0:3ac96e360672	2843
charlesmn	0:3ac96e360672	2844
charlesmn	0:3ac96e360672	2845
charlesmn	0:3ac96e360672	2846	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2847
charlesmn	0:3ac96e360672	2848	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2849
charlesmn	0:3ac96e360672	2850	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2851
charlesmn	0:3ac96e360672	2852	pdev->histpostprocess.algo__consistency_check__event_sigma =
charlesmn	0:3ac96e360672	2853	event_consistency;
charlesmn	0:3ac96e360672	2854
charlesmn	0:3ac96e360672	2855	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2856
charlesmn	0:3ac96e360672	2857	return status;
charlesmn	0:3ac96e360672	2858
charlesmn	0:3ac96e360672	2859	}
charlesmn	0:3ac96e360672	2860
charlesmn	0:3ac96e360672	2861	VL53L1_Error VL53L1_get_histogram_ambient_threshold_sigma(
charlesmn	0:3ac96e360672	2862	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2863	uint8_t *pamb_thresh_sigma)
charlesmn	0:3ac96e360672	2864	{
charlesmn	0:3ac96e360672	2865
charlesmn	0:3ac96e360672	2866
charlesmn	0:3ac96e360672	2867
charlesmn	0:3ac96e360672	2868	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2869
charlesmn	0:3ac96e360672	2870	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2871
charlesmn	0:3ac96e360672	2872	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2873
charlesmn	0:3ac96e360672	2874	*pamb_thresh_sigma =
charlesmn	0:3ac96e360672	2875	pdev->histpostprocess.ambient_thresh_sigma1;
charlesmn	0:3ac96e360672	2876
charlesmn	0:3ac96e360672	2877	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2878
charlesmn	0:3ac96e360672	2879	return status;
charlesmn	0:3ac96e360672	2880
charlesmn	0:3ac96e360672	2881	}
charlesmn	0:3ac96e360672	2882
charlesmn	0:3ac96e360672	2883	VL53L1_Error VL53L1_set_histogram_ambient_threshold_sigma(
charlesmn	0:3ac96e360672	2884	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2885	uint8_t amb_thresh_sigma)
charlesmn	0:3ac96e360672	2886	{
charlesmn	0:3ac96e360672	2887
charlesmn	0:3ac96e360672	2888
charlesmn	0:3ac96e360672	2889
charlesmn	0:3ac96e360672	2890	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2891
charlesmn	0:3ac96e360672	2892	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2893
charlesmn	0:3ac96e360672	2894	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2895
charlesmn	0:3ac96e360672	2896	pdev->histpostprocess.ambient_thresh_sigma1 =
charlesmn	0:3ac96e360672	2897	amb_thresh_sigma;
charlesmn	0:3ac96e360672	2898
charlesmn	0:3ac96e360672	2899	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2900
charlesmn	0:3ac96e360672	2901	return status;
charlesmn	0:3ac96e360672	2902
charlesmn	0:3ac96e360672	2903	}
charlesmn	0:3ac96e360672	2904
charlesmn	0:3ac96e360672	2905	VL53L1_Error VL53L1_get_lite_sigma_threshold(
charlesmn	0:3ac96e360672	2906	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2907	uint16_t *plite_sigma)
charlesmn	0:3ac96e360672	2908	{
charlesmn	0:3ac96e360672	2909
charlesmn	0:3ac96e360672	2910
charlesmn	0:3ac96e360672	2911
charlesmn	0:3ac96e360672	2912	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2913
charlesmn	0:3ac96e360672	2914	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2915
charlesmn	0:3ac96e360672	2916	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2917
charlesmn	0:3ac96e360672	2918	*plite_sigma =
charlesmn	0:3ac96e360672	2919	pdev->tim_cfg.range_config__sigma_thresh;
charlesmn	0:3ac96e360672	2920
charlesmn	0:3ac96e360672	2921	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2922
charlesmn	0:3ac96e360672	2923	return status;
charlesmn	0:3ac96e360672	2924
charlesmn	0:3ac96e360672	2925	}
charlesmn	0:3ac96e360672	2926
charlesmn	0:3ac96e360672	2927	VL53L1_Error VL53L1_set_lite_sigma_threshold(
charlesmn	0:3ac96e360672	2928	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2929	uint16_t lite_sigma)
charlesmn	0:3ac96e360672	2930	{
charlesmn	0:3ac96e360672	2931
charlesmn	0:3ac96e360672	2932
charlesmn	0:3ac96e360672	2933
charlesmn	0:3ac96e360672	2934	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2935
charlesmn	0:3ac96e360672	2936	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2937
charlesmn	0:3ac96e360672	2938	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2939
charlesmn	0:3ac96e360672	2940	pdev->tim_cfg.range_config__sigma_thresh = lite_sigma;
charlesmn	0:3ac96e360672	2941
charlesmn	0:3ac96e360672	2942	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2943
charlesmn	0:3ac96e360672	2944	return status;
charlesmn	0:3ac96e360672	2945
charlesmn	0:3ac96e360672	2946	}
charlesmn	0:3ac96e360672	2947
charlesmn	0:3ac96e360672	2948	VL53L1_Error VL53L1_get_lite_min_count_rate(
charlesmn	0:3ac96e360672	2949	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2950	uint16_t *plite_mincountrate)
charlesmn	0:3ac96e360672	2951	{
charlesmn	0:3ac96e360672	2952
charlesmn	0:3ac96e360672	2953
charlesmn	0:3ac96e360672	2954
charlesmn	0:3ac96e360672	2955	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2956
charlesmn	0:3ac96e360672	2957	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2958
charlesmn	0:3ac96e360672	2959	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2960
charlesmn	0:3ac96e360672	2961	*plite_mincountrate =
charlesmn	0:3ac96e360672	2962	pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps;
charlesmn	0:3ac96e360672	2963
charlesmn	0:3ac96e360672	2964	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2965
charlesmn	0:3ac96e360672	2966	return status;
charlesmn	0:3ac96e360672	2967
charlesmn	0:3ac96e360672	2968	}
charlesmn	0:3ac96e360672	2969
charlesmn	0:3ac96e360672	2970	VL53L1_Error VL53L1_set_lite_min_count_rate(
charlesmn	0:3ac96e360672	2971	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2972	uint16_t lite_mincountrate)
charlesmn	0:3ac96e360672	2973	{
charlesmn	0:3ac96e360672	2974
charlesmn	0:3ac96e360672	2975
charlesmn	0:3ac96e360672	2976
charlesmn	0:3ac96e360672	2977	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	2978
charlesmn	0:3ac96e360672	2979	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	2980
charlesmn	0:3ac96e360672	2981	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	2982
charlesmn	0:3ac96e360672	2983	pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps =
charlesmn	0:3ac96e360672	2984	lite_mincountrate;
charlesmn	0:3ac96e360672	2985
charlesmn	0:3ac96e360672	2986	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	2987
charlesmn	0:3ac96e360672	2988	return status;
charlesmn	0:3ac96e360672	2989
charlesmn	0:3ac96e360672	2990	}
charlesmn	0:3ac96e360672	2991
charlesmn	0:3ac96e360672	2992
charlesmn	0:3ac96e360672	2993	VL53L1_Error VL53L1_get_xtalk_detect_config(
charlesmn	0:3ac96e360672	2994	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	2995	int16_t *pmax_valid_range_mm,
charlesmn	0:3ac96e360672	2996	int16_t *pmin_valid_range_mm,
charlesmn	0:3ac96e360672	2997	uint16_t *pmax_valid_rate_kcps,
charlesmn	0:3ac96e360672	2998	uint16_t *pmax_sigma_mm)
charlesmn	0:3ac96e360672	2999	{
charlesmn	0:3ac96e360672	3000
charlesmn	0:3ac96e360672	3001
charlesmn	0:3ac96e360672	3002
charlesmn	0:3ac96e360672	3003	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3004
charlesmn	0:3ac96e360672	3005	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3006
charlesmn	0:3ac96e360672	3007	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3008
charlesmn	0:3ac96e360672	3009	*pmax_valid_range_mm =
charlesmn	0:3ac96e360672	3010	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
charlesmn	0:3ac96e360672	3011	*pmin_valid_range_mm =
charlesmn	0:3ac96e360672	3012	pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
charlesmn	0:3ac96e360672	3013	*pmax_valid_rate_kcps =
charlesmn	0:3ac96e360672	3014	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn	0:3ac96e360672	3015	*pmax_sigma_mm =
charlesmn	0:3ac96e360672	3016	pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn	0:3ac96e360672	3017
charlesmn	0:3ac96e360672	3018	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3019
charlesmn	0:3ac96e360672	3020	return status;
charlesmn	0:3ac96e360672	3021
charlesmn	0:3ac96e360672	3022	}
charlesmn	0:3ac96e360672	3023
charlesmn	0:3ac96e360672	3024	VL53L1_Error VL53L1_set_xtalk_detect_config(
charlesmn	0:3ac96e360672	3025	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3026	int16_t max_valid_range_mm,
charlesmn	0:3ac96e360672	3027	int16_t min_valid_range_mm,
charlesmn	0:3ac96e360672	3028	uint16_t max_valid_rate_kcps,
charlesmn	0:3ac96e360672	3029	uint16_t max_sigma_mm)
charlesmn	0:3ac96e360672	3030	{
charlesmn	0:3ac96e360672	3031
charlesmn	0:3ac96e360672	3032
charlesmn	0:3ac96e360672	3033
charlesmn	0:3ac96e360672	3034	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3035
charlesmn	0:3ac96e360672	3036	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3037
charlesmn	0:3ac96e360672	3038	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3039
charlesmn	0:3ac96e360672	3040	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
charlesmn	0:3ac96e360672	3041	max_valid_range_mm;
charlesmn	0:3ac96e360672	3042	pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
charlesmn	0:3ac96e360672	3043	min_valid_range_mm;
charlesmn	0:3ac96e360672	3044	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	3045	max_valid_rate_kcps;
charlesmn	0:3ac96e360672	3046	pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
charlesmn	0:3ac96e360672	3047	max_sigma_mm;
charlesmn	0:3ac96e360672	3048
charlesmn	0:3ac96e360672	3049	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3050
charlesmn	0:3ac96e360672	3051	return status;
charlesmn	0:3ac96e360672	3052
charlesmn	0:3ac96e360672	3053	}
charlesmn	0:3ac96e360672	3054
charlesmn	0:3ac96e360672	3055	VL53L1_Error VL53L1_get_target_order_mode(
charlesmn	0:3ac96e360672	3056	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3057	VL53L1_HistTargetOrder *phist_target_order)
charlesmn	0:3ac96e360672	3058	{
charlesmn	0:3ac96e360672	3059
charlesmn	0:3ac96e360672	3060
charlesmn	0:3ac96e360672	3061
charlesmn	0:3ac96e360672	3062	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3063
charlesmn	0:3ac96e360672	3064	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3065
charlesmn	0:3ac96e360672	3066	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3067
charlesmn	0:3ac96e360672	3068	*phist_target_order =
charlesmn	0:3ac96e360672	3069	pdev->histpostprocess.hist_target_order;
charlesmn	0:3ac96e360672	3070
charlesmn	0:3ac96e360672	3071	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3072
charlesmn	0:3ac96e360672	3073	return status;
charlesmn	0:3ac96e360672	3074
charlesmn	0:3ac96e360672	3075	}
charlesmn	0:3ac96e360672	3076
charlesmn	0:3ac96e360672	3077	VL53L1_Error VL53L1_set_target_order_mode(
charlesmn	0:3ac96e360672	3078	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3079	VL53L1_HistTargetOrder hist_target_order)
charlesmn	0:3ac96e360672	3080	{
charlesmn	0:3ac96e360672	3081
charlesmn	0:3ac96e360672	3082
charlesmn	0:3ac96e360672	3083
charlesmn	0:3ac96e360672	3084	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3085
charlesmn	0:3ac96e360672	3086	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3087
charlesmn	0:3ac96e360672	3088	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3089
charlesmn	0:3ac96e360672	3090	pdev->histpostprocess.hist_target_order = hist_target_order;
charlesmn	0:3ac96e360672	3091
charlesmn	0:3ac96e360672	3092	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3093
charlesmn	0:3ac96e360672	3094	return status;
charlesmn	0:3ac96e360672	3095
charlesmn	0:3ac96e360672	3096	}
charlesmn	0:3ac96e360672	3097
charlesmn	0:3ac96e360672	3098
charlesmn	0:3ac96e360672	3099	VL53L1_Error VL53L1_get_dmax_reflectance_values(
charlesmn	0:3ac96e360672	3100	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3101	VL53L1_dmax_reflectance_array_t *pdmax_reflectances)
charlesmn	0:3ac96e360672	3102	{
charlesmn	0:3ac96e360672	3103
charlesmn	0:3ac96e360672	3104	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3105
charlesmn	0:3ac96e360672	3106	uint8_t i = 0;
charlesmn	0:3ac96e360672	3107
charlesmn	0:3ac96e360672	3108	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3109
charlesmn	0:3ac96e360672	3110	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3111
charlesmn	0:3ac96e360672	3112
charlesmn	0:3ac96e360672	3113
charlesmn	0:3ac96e360672	3114	for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) {
charlesmn	0:3ac96e360672	3115	pdmax_reflectances->target_reflectance_for_dmax[i] =
charlesmn	0:3ac96e360672	3116	pdev->dmax_cfg.target_reflectance_for_dmax_calc[i];
charlesmn	0:3ac96e360672	3117	}
charlesmn	0:3ac96e360672	3118
charlesmn	0:3ac96e360672	3119	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3120
charlesmn	0:3ac96e360672	3121	return status;
charlesmn	0:3ac96e360672	3122
charlesmn	0:3ac96e360672	3123	}
charlesmn	0:3ac96e360672	3124
charlesmn	0:3ac96e360672	3125	VL53L1_Error VL53L1_set_dmax_reflectance_values(
charlesmn	0:3ac96e360672	3126	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3127	VL53L1_dmax_reflectance_array_t *pdmax_reflectances)
charlesmn	0:3ac96e360672	3128	{
charlesmn	0:3ac96e360672	3129
charlesmn	0:3ac96e360672	3130	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3131
charlesmn	0:3ac96e360672	3132	uint8_t i = 0;
charlesmn	0:3ac96e360672	3133
charlesmn	0:3ac96e360672	3134	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3135
charlesmn	0:3ac96e360672	3136	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3137
charlesmn	0:3ac96e360672	3138
charlesmn	0:3ac96e360672	3139
charlesmn	0:3ac96e360672	3140	for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) {
charlesmn	0:3ac96e360672	3141	pdev->dmax_cfg.target_reflectance_for_dmax_calc[i] =
charlesmn	0:3ac96e360672	3142	pdmax_reflectances->target_reflectance_for_dmax[i];
charlesmn	0:3ac96e360672	3143	}
charlesmn	0:3ac96e360672	3144
charlesmn	0:3ac96e360672	3145	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3146
charlesmn	0:3ac96e360672	3147	return status;
charlesmn	0:3ac96e360672	3148
charlesmn	0:3ac96e360672	3149	}
charlesmn	0:3ac96e360672	3150
charlesmn	0:3ac96e360672	3151	VL53L1_Error VL53L1_get_vhv_loopbound(
charlesmn	0:3ac96e360672	3152	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3153	uint8_t *pvhv_loopbound)
charlesmn	0:3ac96e360672	3154	{
charlesmn	0:3ac96e360672	3155
charlesmn	0:3ac96e360672	3156
charlesmn	0:3ac96e360672	3157
charlesmn	0:3ac96e360672	3158	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3159
charlesmn	0:3ac96e360672	3160	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3161
charlesmn	0:3ac96e360672	3162	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3163
charlesmn	0:3ac96e360672	3164	*pvhv_loopbound =
charlesmn	0:3ac96e360672	3165	pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound / 4;
charlesmn	0:3ac96e360672	3166
charlesmn	0:3ac96e360672	3167	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3168
charlesmn	0:3ac96e360672	3169	return status;
charlesmn	0:3ac96e360672	3170
charlesmn	0:3ac96e360672	3171	}
charlesmn	0:3ac96e360672	3172
charlesmn	0:3ac96e360672	3173
charlesmn	0:3ac96e360672	3174
charlesmn	0:3ac96e360672	3175	VL53L1_Error VL53L1_set_vhv_loopbound(
charlesmn	0:3ac96e360672	3176	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3177	uint8_t vhv_loopbound)
charlesmn	0:3ac96e360672	3178	{
charlesmn	0:3ac96e360672	3179
charlesmn	0:3ac96e360672	3180
charlesmn	0:3ac96e360672	3181
charlesmn	0:3ac96e360672	3182	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3183
charlesmn	0:3ac96e360672	3184	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3185
charlesmn	0:3ac96e360672	3186	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3187
charlesmn	0:3ac96e360672	3188	pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
charlesmn	0:3ac96e360672	3189	(pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound & 0x03) +
charlesmn	0:3ac96e360672	3190	(vhv_loopbound * 4);
charlesmn	0:3ac96e360672	3191
charlesmn	0:3ac96e360672	3192	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3193
charlesmn	0:3ac96e360672	3194	return status;
charlesmn	0:3ac96e360672	3195
charlesmn	0:3ac96e360672	3196	}
charlesmn	0:3ac96e360672	3197
charlesmn	0:3ac96e360672	3198
charlesmn	0:3ac96e360672	3199
charlesmn	0:3ac96e360672	3200	VL53L1_Error VL53L1_get_vhv_config(
charlesmn	0:3ac96e360672	3201	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3202	uint8_t *pvhv_init_en,
charlesmn	0:3ac96e360672	3203	uint8_t *pvhv_init_value)
charlesmn	0:3ac96e360672	3204	{
charlesmn	0:3ac96e360672	3205
charlesmn	0:3ac96e360672	3206
charlesmn	0:3ac96e360672	3207
charlesmn	0:3ac96e360672	3208
charlesmn	0:3ac96e360672	3209
charlesmn	0:3ac96e360672	3210	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3211
charlesmn	0:3ac96e360672	3212	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3213
charlesmn	0:3ac96e360672	3214	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3215
charlesmn	0:3ac96e360672	3216	*pvhv_init_en = (pdev->stat_nvm.vhv_config__init & 0x80) >> 7;
charlesmn	0:3ac96e360672	3217	*pvhv_init_value =
charlesmn	0:3ac96e360672	3218	(pdev->stat_nvm.vhv_config__init & 0x7F);
charlesmn	0:3ac96e360672	3219
charlesmn	0:3ac96e360672	3220	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3221
charlesmn	0:3ac96e360672	3222	return status;
charlesmn	0:3ac96e360672	3223
charlesmn	0:3ac96e360672	3224	}
charlesmn	0:3ac96e360672	3225
charlesmn	0:3ac96e360672	3226
charlesmn	0:3ac96e360672	3227
charlesmn	0:3ac96e360672	3228	VL53L1_Error VL53L1_set_vhv_config(
charlesmn	0:3ac96e360672	3229	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3230	uint8_t vhv_init_en,
charlesmn	0:3ac96e360672	3231	uint8_t vhv_init_value)
charlesmn	0:3ac96e360672	3232	{
charlesmn	0:3ac96e360672	3233
charlesmn	0:3ac96e360672	3234
charlesmn	0:3ac96e360672	3235
charlesmn	0:3ac96e360672	3236	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3237
charlesmn	0:3ac96e360672	3238	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3239
charlesmn	0:3ac96e360672	3240	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3241
charlesmn	0:3ac96e360672	3242	pdev->stat_nvm.vhv_config__init =
charlesmn	0:3ac96e360672	3243	((vhv_init_en & 0x01) << 7) +
charlesmn	0:3ac96e360672	3244	(vhv_init_value & 0x7F);
charlesmn	0:3ac96e360672	3245
charlesmn	0:3ac96e360672	3246	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3247
charlesmn	0:3ac96e360672	3248	return status;
charlesmn	0:3ac96e360672	3249
charlesmn	0:3ac96e360672	3250	}
charlesmn	0:3ac96e360672	3251
charlesmn	0:3ac96e360672	3252
charlesmn	0:3ac96e360672	3253
charlesmn	0:3ac96e360672	3254	VL53L1_Error VL53L1_init_and_start_range(
charlesmn	0:3ac96e360672	3255	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3256	uint8_t measurement_mode,
charlesmn	0:3ac96e360672	3257	VL53L1_DeviceConfigLevel device_config_level)
charlesmn	0:3ac96e360672	3258	{
charlesmn	0:3ac96e360672	3259
charlesmn	0:3ac96e360672	3260
charlesmn	0:3ac96e360672	3261	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3262	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3263	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	3264	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	3265
charlesmn	0:3ac96e360672	3266	uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn	0:3ac96e360672	3267
charlesmn	0:3ac96e360672	3268	VL53L1_static_nvm_managed_t *pstatic_nvm = &(pdev->stat_nvm);
charlesmn	0:3ac96e360672	3269	VL53L1_customer_nvm_managed_t *pcustomer_nvm = &(pdev->customer);
charlesmn	0:3ac96e360672	3270	VL53L1_static_config_t *pstatic = &(pdev->stat_cfg);
charlesmn	0:3ac96e360672	3271	VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg);
charlesmn	0:3ac96e360672	3272	VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg);
charlesmn	0:3ac96e360672	3273	VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg);
charlesmn	0:3ac96e360672	3274	VL53L1_system_control_t *psystem = &(pdev->sys_ctrl);
charlesmn	0:3ac96e360672	3275
charlesmn	0:3ac96e360672	3276	VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state);
charlesmn	0:3ac96e360672	3277	VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn	0:3ac96e360672	3278
charlesmn	0:3ac96e360672	3279	uint8_t *pbuffer = &buffer[0];
charlesmn	0:3ac96e360672	3280	uint16_t i = 0;
charlesmn	0:3ac96e360672	3281	uint16_t i2c_index = 0;
charlesmn	0:3ac96e360672	3282	uint16_t i2c_buffer_offset_bytes = 0;
charlesmn	0:3ac96e360672	3283	uint16_t i2c_buffer_size_bytes = 0;
charlesmn	0:3ac96e360672	3284
charlesmn	0:3ac96e360672	3285	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3286
charlesmn	0:3ac96e360672	3287
charlesmn	0:3ac96e360672	3288	pdev->measurement_mode = measurement_mode;
charlesmn	0:3ac96e360672	3289
charlesmn	0:3ac96e360672	3290
charlesmn	0:3ac96e360672	3291
charlesmn	0:3ac96e360672	3292	psystem->system__mode_start =
charlesmn	0:3ac96e360672	3293	(psystem->system__mode_start &
charlesmn	0:3ac96e360672	3294	VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) \|
charlesmn	0:3ac96e360672	3295	measurement_mode;
charlesmn	0:3ac96e360672	3296
charlesmn	0:3ac96e360672	3297
charlesmn	0:3ac96e360672	3298
charlesmn	0:3ac96e360672	3299	status =
charlesmn	0:3ac96e360672	3300	VL53L1_set_user_zone(
charlesmn	0:3ac96e360672	3301	Dev,
charlesmn	0:3ac96e360672	3302	&(pdev->zone_cfg.user_zones[pdev->ll_state.cfg_zone_id]));
charlesmn	0:3ac96e360672	3303
charlesmn	0:3ac96e360672	3304
charlesmn	0:3ac96e360672	3305	if (pdev->zone_cfg.active_zones > 0) {
charlesmn	0:3ac96e360672	3306	status =
charlesmn	0:3ac96e360672	3307	VL53L1_set_zone_dss_config(
charlesmn	0:3ac96e360672	3308	Dev,
charlesmn	0:3ac96e360672	3309	&(pres->zone_dyn_cfgs.VL53L1_p_002[pdev->ll_state.cfg_zone_id])
charlesmn	0:3ac96e360672	3310	);
charlesmn	0:3ac96e360672	3311	}
charlesmn	0:3ac96e360672	3312
charlesmn	0:3ac96e360672	3313
charlesmn	0:3ac96e360672	3314
charlesmn	0:3ac96e360672	3315
charlesmn	0:3ac96e360672	3316	if (((pdev->sys_ctrl.system__mode_start &
charlesmn	0:3ac96e360672	3317	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) == 0x00) &&
charlesmn	0:3ac96e360672	3318	(pdev->xtalk_cfg.global_crosstalk_compensation_enable
charlesmn	0:3ac96e360672	3319	== 0x01)) {
charlesmn	0:3ac96e360672	3320	pdev->stat_cfg.algo__range_ignore_threshold_mcps =
charlesmn	0:3ac96e360672	3321	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps;
charlesmn	0:3ac96e360672	3322	}
charlesmn	0:3ac96e360672	3323
charlesmn	0:3ac96e360672	3324
charlesmn	0:3ac96e360672	3325
charlesmn	0:3ac96e360672	3326
charlesmn	0:3ac96e360672	3327
charlesmn	0:3ac96e360672	3328	if (pdev->low_power_auto_data.low_power_auto_range_count == 0xFF)
charlesmn	0:3ac96e360672	3329	pdev->low_power_auto_data.low_power_auto_range_count = 0x0;
charlesmn	0:3ac96e360672	3330
charlesmn	0:3ac96e360672	3331
charlesmn	0:3ac96e360672	3332	if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
charlesmn	0:3ac96e360672	3333	(pdev->low_power_auto_data.low_power_auto_range_count == 0)) {
charlesmn	0:3ac96e360672	3334
charlesmn	0:3ac96e360672	3335	pdev->low_power_auto_data.saved_interrupt_config =
charlesmn	0:3ac96e360672	3336	pdev->gen_cfg.system__interrupt_config_gpio;
charlesmn	0:3ac96e360672	3337
charlesmn	0:3ac96e360672	3338	pdev->gen_cfg.system__interrupt_config_gpio = 1 << 5;
charlesmn	0:3ac96e360672	3339
charlesmn	0:3ac96e360672	3340	if ((pdev->dyn_cfg.system__sequence_config & (
charlesmn	0:3ac96e360672	3341	VL53L1_SEQUENCE_MM1_EN \| VL53L1_SEQUENCE_MM2_EN)) ==
charlesmn	0:3ac96e360672	3342	0x0) {
charlesmn	0:3ac96e360672	3343	pN->algo__part_to_part_range_offset_mm =
charlesmn	0:3ac96e360672	3344	(pN->mm_config__outer_offset_mm << 2);
charlesmn	0:3ac96e360672	3345	} else {
charlesmn	0:3ac96e360672	3346	pN->algo__part_to_part_range_offset_mm = 0x0;
charlesmn	0:3ac96e360672	3347	}
charlesmn	0:3ac96e360672	3348
charlesmn	0:3ac96e360672	3349
charlesmn	0:3ac96e360672	3350	if (device_config_level <
charlesmn	0:3ac96e360672	3351	VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS) {
charlesmn	0:3ac96e360672	3352	device_config_level =
charlesmn	0:3ac96e360672	3353	VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS;
charlesmn	0:3ac96e360672	3354	}
charlesmn	0:3ac96e360672	3355	}
charlesmn	0:3ac96e360672	3356
charlesmn	0:3ac96e360672	3357	if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) &&
charlesmn	0:3ac96e360672	3358	(pdev->low_power_auto_data.low_power_auto_range_count == 1)) {
charlesmn	0:3ac96e360672	3359
charlesmn	0:3ac96e360672	3360	pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn	0:3ac96e360672	3361	pdev->low_power_auto_data.saved_interrupt_config;
charlesmn	0:3ac96e360672	3362
charlesmn	0:3ac96e360672	3363
charlesmn	0:3ac96e360672	3364	device_config_level = VL53L1_DEVICECONFIGLEVEL_FULL;
charlesmn	0:3ac96e360672	3365	}
charlesmn	0:3ac96e360672	3366
charlesmn	0:3ac96e360672	3367
charlesmn	0:3ac96e360672	3368
charlesmn	0:3ac96e360672	3369
charlesmn	0:3ac96e360672	3370
charlesmn	0:3ac96e360672	3371	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3372	status = VL53L1_save_cfg_data(Dev);
charlesmn	0:3ac96e360672	3373
charlesmn	0:3ac96e360672	3374
charlesmn	0:3ac96e360672	3375
charlesmn	0:3ac96e360672	3376	switch (device_config_level) {
charlesmn	0:3ac96e360672	3377	case VL53L1_DEVICECONFIGLEVEL_FULL:
charlesmn	0:3ac96e360672	3378	i2c_index = VL53L1_STATIC_NVM_MANAGED_I2C_INDEX;
charlesmn	0:3ac96e360672	3379	break;
charlesmn	0:3ac96e360672	3380	case VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS:
charlesmn	0:3ac96e360672	3381	i2c_index = VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX;
charlesmn	0:3ac96e360672	3382	break;
charlesmn	0:3ac96e360672	3383	case VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS:
charlesmn	0:3ac96e360672	3384	i2c_index = VL53L1_STATIC_CONFIG_I2C_INDEX;
charlesmn	0:3ac96e360672	3385	break;
charlesmn	0:3ac96e360672	3386	case VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS:
charlesmn	0:3ac96e360672	3387	i2c_index = VL53L1_GENERAL_CONFIG_I2C_INDEX;
charlesmn	0:3ac96e360672	3388	break;
charlesmn	0:3ac96e360672	3389	case VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS:
charlesmn	0:3ac96e360672	3390	i2c_index = VL53L1_TIMING_CONFIG_I2C_INDEX;
charlesmn	0:3ac96e360672	3391	break;
charlesmn	0:3ac96e360672	3392	case VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS:
charlesmn	0:3ac96e360672	3393	i2c_index = VL53L1_DYNAMIC_CONFIG_I2C_INDEX;
charlesmn	0:3ac96e360672	3394	break;
charlesmn	0:3ac96e360672	3395	default:
charlesmn	0:3ac96e360672	3396	i2c_index = VL53L1_SYSTEM_CONTROL_I2C_INDEX;
charlesmn	0:3ac96e360672	3397	break;
charlesmn	0:3ac96e360672	3398	}
charlesmn	0:3ac96e360672	3399
charlesmn	0:3ac96e360672	3400
charlesmn	0:3ac96e360672	3401
charlesmn	0:3ac96e360672	3402	i2c_buffer_size_bytes =
charlesmn	0:3ac96e360672	3403	(VL53L1_SYSTEM_CONTROL_I2C_INDEX +
charlesmn	0:3ac96e360672	3404	VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES) -
charlesmn	0:3ac96e360672	3405	i2c_index;
charlesmn	0:3ac96e360672	3406
charlesmn	0:3ac96e360672	3407
charlesmn	0:3ac96e360672	3408
charlesmn	0:3ac96e360672	3409	pbuffer = &buffer[0];
charlesmn	0:3ac96e360672	3410	for (i = 0; i < i2c_buffer_size_bytes; i++)
charlesmn	0:3ac96e360672	3411	*pbuffer++ = 0;
charlesmn	0:3ac96e360672	3412
charlesmn	0:3ac96e360672	3413
charlesmn	0:3ac96e360672	3414
charlesmn	0:3ac96e360672	3415	if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_FULL &&
charlesmn	0:3ac96e360672	3416	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3417
charlesmn	0:3ac96e360672	3418	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3419	VL53L1_STATIC_NVM_MANAGED_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3420
charlesmn	0:3ac96e360672	3421	status =
charlesmn	0:3ac96e360672	3422	VL53L1_i2c_encode_static_nvm_managed(
charlesmn	0:3ac96e360672	3423	pstatic_nvm,
charlesmn	0:3ac96e360672	3424	VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3425	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3426	}
charlesmn	0:3ac96e360672	3427
charlesmn	0:3ac96e360672	3428	if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS &&
charlesmn	0:3ac96e360672	3429	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3430
charlesmn	0:3ac96e360672	3431	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3432	VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3433
charlesmn	0:3ac96e360672	3434	status =
charlesmn	0:3ac96e360672	3435	VL53L1_i2c_encode_customer_nvm_managed(
charlesmn	0:3ac96e360672	3436	pcustomer_nvm,
charlesmn	0:3ac96e360672	3437	VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3438	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3439	}
charlesmn	0:3ac96e360672	3440
charlesmn	0:3ac96e360672	3441	if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS &&
charlesmn	0:3ac96e360672	3442	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3443
charlesmn	0:3ac96e360672	3444	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3445	VL53L1_STATIC_CONFIG_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3446
charlesmn	0:3ac96e360672	3447	status =
charlesmn	0:3ac96e360672	3448	VL53L1_i2c_encode_static_config(
charlesmn	0:3ac96e360672	3449	pstatic,
charlesmn	0:3ac96e360672	3450	VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3451	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3452	}
charlesmn	0:3ac96e360672	3453
charlesmn	0:3ac96e360672	3454	if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS &&
charlesmn	0:3ac96e360672	3455	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3456
charlesmn	0:3ac96e360672	3457	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3458	VL53L1_GENERAL_CONFIG_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3459
charlesmn	0:3ac96e360672	3460	status =
charlesmn	0:3ac96e360672	3461	VL53L1_i2c_encode_general_config(
charlesmn	0:3ac96e360672	3462	pgeneral,
charlesmn	0:3ac96e360672	3463	VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3464	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3465	}
charlesmn	0:3ac96e360672	3466
charlesmn	0:3ac96e360672	3467	if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS &&
charlesmn	0:3ac96e360672	3468	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3469
charlesmn	0:3ac96e360672	3470	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3471	VL53L1_TIMING_CONFIG_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3472
charlesmn	0:3ac96e360672	3473	status =
charlesmn	0:3ac96e360672	3474	VL53L1_i2c_encode_timing_config(
charlesmn	0:3ac96e360672	3475	ptiming,
charlesmn	0:3ac96e360672	3476	VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3477	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3478	}
charlesmn	0:3ac96e360672	3479
charlesmn	0:3ac96e360672	3480	if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS &&
charlesmn	0:3ac96e360672	3481	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3482
charlesmn	0:3ac96e360672	3483	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3484	VL53L1_DYNAMIC_CONFIG_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3485
charlesmn	0:3ac96e360672	3486
charlesmn	0:3ac96e360672	3487	if ((psystem->system__mode_start &
charlesmn	0:3ac96e360672	3488	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) ==
charlesmn	0:3ac96e360672	3489	VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) {
charlesmn	0:3ac96e360672	3490	pdynamic->system__grouped_parameter_hold_0 =
charlesmn	0:3ac96e360672	3491	pstate->cfg_gph_id \| 0x01;
charlesmn	0:3ac96e360672	3492	pdynamic->system__grouped_parameter_hold_1 =
charlesmn	0:3ac96e360672	3493	pstate->cfg_gph_id \| 0x01;
charlesmn	0:3ac96e360672	3494	pdynamic->system__grouped_parameter_hold =
charlesmn	0:3ac96e360672	3495	pstate->cfg_gph_id;
charlesmn	0:3ac96e360672	3496	}
charlesmn	0:3ac96e360672	3497	status =
charlesmn	0:3ac96e360672	3498	VL53L1_i2c_encode_dynamic_config(
charlesmn	0:3ac96e360672	3499	pdynamic,
charlesmn	0:3ac96e360672	3500	VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3501	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3502	}
charlesmn	0:3ac96e360672	3503
charlesmn	0:3ac96e360672	3504	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3505
charlesmn	0:3ac96e360672	3506	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3507	VL53L1_SYSTEM_CONTROL_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3508
charlesmn	0:3ac96e360672	3509	status =
charlesmn	0:3ac96e360672	3510	VL53L1_i2c_encode_system_control(
charlesmn	0:3ac96e360672	3511	psystem,
charlesmn	0:3ac96e360672	3512	VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3513	&buffer[i2c_buffer_offset_bytes]);
charlesmn	0:3ac96e360672	3514	}
charlesmn	0:3ac96e360672	3515
charlesmn	0:3ac96e360672	3516
charlesmn	0:3ac96e360672	3517
charlesmn	0:3ac96e360672	3518	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3519	status =
charlesmn	0:3ac96e360672	3520	VL53L1_WriteMulti(
charlesmn	0:3ac96e360672	3521	Dev,
charlesmn	0:3ac96e360672	3522	i2c_index,
charlesmn	0:3ac96e360672	3523	buffer,
charlesmn	0:3ac96e360672	3524	(uint32_t)i2c_buffer_size_bytes);
charlesmn	0:3ac96e360672	3525	}
charlesmn	0:3ac96e360672	3526
charlesmn	0:3ac96e360672	3527
charlesmn	0:3ac96e360672	3528	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3529	status = VL53L1_update_ll_driver_rd_state(Dev);
charlesmn	0:3ac96e360672	3530
charlesmn	0:3ac96e360672	3531	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3532	status = VL53L1_update_ll_driver_cfg_state(Dev);
charlesmn	0:3ac96e360672	3533
charlesmn	0:3ac96e360672	3534	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3535
charlesmn	0:3ac96e360672	3536	return status;
charlesmn	0:3ac96e360672	3537	}
charlesmn	0:3ac96e360672	3538
charlesmn	0:3ac96e360672	3539
charlesmn	0:3ac96e360672	3540	VL53L1_Error VL53L1_stop_range(
charlesmn	0:3ac96e360672	3541	VL53L1_DEV Dev)
charlesmn	0:3ac96e360672	3542	{
charlesmn	0:3ac96e360672	3543
charlesmn	0:3ac96e360672	3544
charlesmn	0:3ac96e360672	3545	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3546
charlesmn	0:3ac96e360672	3547	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	3548	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3549	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	3550	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	3551
charlesmn	0:3ac96e360672	3552
charlesmn	0:3ac96e360672	3553
charlesmn	0:3ac96e360672	3554	pdev->sys_ctrl.system__mode_start =
charlesmn	0:3ac96e360672	3555	(pdev->sys_ctrl.system__mode_start &
charlesmn	0:3ac96e360672	3556	VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) \|
charlesmn	0:3ac96e360672	3557	VL53L1_DEVICEMEASUREMENTMODE_ABORT;
charlesmn	0:3ac96e360672	3558
charlesmn	0:3ac96e360672	3559	status = VL53L1_set_system_control(
charlesmn	0:3ac96e360672	3560	Dev,
charlesmn	0:3ac96e360672	3561	&pdev->sys_ctrl);
charlesmn	0:3ac96e360672	3562
charlesmn	0:3ac96e360672	3563
charlesmn	0:3ac96e360672	3564	pdev->sys_ctrl.system__mode_start =
charlesmn	0:3ac96e360672	3565	(pdev->sys_ctrl.system__mode_start &
charlesmn	0:3ac96e360672	3566	VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK);
charlesmn	0:3ac96e360672	3567
charlesmn	0:3ac96e360672	3568
charlesmn	0:3ac96e360672	3569	VL53L1_init_ll_driver_state(
charlesmn	0:3ac96e360672	3570	Dev,
charlesmn	0:3ac96e360672	3571	VL53L1_DEVICESTATE_SW_STANDBY);
charlesmn	0:3ac96e360672	3572
charlesmn	0:3ac96e360672	3573
charlesmn	0:3ac96e360672	3574	V53L1_init_zone_results_structure(
charlesmn	0:3ac96e360672	3575	pdev->zone_cfg.active_zones+1,
charlesmn	0:3ac96e360672	3576	&(pres->zone_results));
charlesmn	0:3ac96e360672	3577
charlesmn	0:3ac96e360672	3578
charlesmn	0:3ac96e360672	3579	V53L1_init_zone_dss_configs(Dev);
charlesmn	0:3ac96e360672	3580
charlesmn	0:3ac96e360672	3581
charlesmn	0:3ac96e360672	3582	if (pdev->low_power_auto_data.is_low_power_auto_mode == 1)
charlesmn	0:3ac96e360672	3583	VL53L1_low_power_auto_data_stop_range(Dev);
charlesmn	0:3ac96e360672	3584
charlesmn	0:3ac96e360672	3585	return status;
charlesmn	0:3ac96e360672	3586	}
charlesmn	0:3ac96e360672	3587
charlesmn	0:3ac96e360672	3588
charlesmn	0:3ac96e360672	3589	VL53L1_Error VL53L1_get_measurement_results(
charlesmn	0:3ac96e360672	3590	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3591	VL53L1_DeviceResultsLevel device_results_level)
charlesmn	0:3ac96e360672	3592	{
charlesmn	0:3ac96e360672	3593
charlesmn	0:3ac96e360672	3594
charlesmn	0:3ac96e360672	3595	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3596	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3597
charlesmn	0:3ac96e360672	3598	uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn	0:3ac96e360672	3599
charlesmn	0:3ac96e360672	3600	VL53L1_system_results_t *psystem_results = &(pdev->sys_results);
charlesmn	0:3ac96e360672	3601	VL53L1_core_results_t *pcore_results = &(pdev->core_results);
charlesmn	0:3ac96e360672	3602	VL53L1_debug_results_t *pdebug_results = &(pdev->dbg_results);
charlesmn	0:3ac96e360672	3603
charlesmn	0:3ac96e360672	3604	uint16_t i2c_index = VL53L1_SYSTEM_RESULTS_I2C_INDEX;
charlesmn	0:3ac96e360672	3605	uint16_t i2c_buffer_offset_bytes = 0;
charlesmn	0:3ac96e360672	3606	uint16_t i2c_buffer_size_bytes = 0;
charlesmn	0:3ac96e360672	3607
charlesmn	0:3ac96e360672	3608	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3609
charlesmn	0:3ac96e360672	3610
charlesmn	0:3ac96e360672	3611
charlesmn	0:3ac96e360672	3612	switch (device_results_level) {
charlesmn	0:3ac96e360672	3613	case VL53L1_DEVICERESULTSLEVEL_FULL:
charlesmn	0:3ac96e360672	3614	i2c_buffer_size_bytes =
charlesmn	0:3ac96e360672	3615	(VL53L1_DEBUG_RESULTS_I2C_INDEX +
charlesmn	0:3ac96e360672	3616	VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES) -
charlesmn	0:3ac96e360672	3617	i2c_index;
charlesmn	0:3ac96e360672	3618	break;
charlesmn	0:3ac96e360672	3619	case VL53L1_DEVICERESULTSLEVEL_UPTO_CORE:
charlesmn	0:3ac96e360672	3620	i2c_buffer_size_bytes =
charlesmn	0:3ac96e360672	3621	(VL53L1_CORE_RESULTS_I2C_INDEX +
charlesmn	0:3ac96e360672	3622	VL53L1_CORE_RESULTS_I2C_SIZE_BYTES) -
charlesmn	0:3ac96e360672	3623	i2c_index;
charlesmn	0:3ac96e360672	3624	break;
charlesmn	0:3ac96e360672	3625	default:
charlesmn	0:3ac96e360672	3626	i2c_buffer_size_bytes =
charlesmn	0:3ac96e360672	3627	VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES;
charlesmn	0:3ac96e360672	3628	break;
charlesmn	0:3ac96e360672	3629	}
charlesmn	0:3ac96e360672	3630
charlesmn	0:3ac96e360672	3631
charlesmn	0:3ac96e360672	3632
charlesmn	0:3ac96e360672	3633	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3634	status =
charlesmn	0:3ac96e360672	3635	VL53L1_ReadMulti(
charlesmn	0:3ac96e360672	3636	Dev,
charlesmn	0:3ac96e360672	3637	i2c_index,
charlesmn	0:3ac96e360672	3638	buffer,
charlesmn	0:3ac96e360672	3639	(uint32_t)i2c_buffer_size_bytes);
charlesmn	0:3ac96e360672	3640
charlesmn	0:3ac96e360672	3641
charlesmn	0:3ac96e360672	3642
charlesmn	0:3ac96e360672	3643	if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_FULL &&
charlesmn	0:3ac96e360672	3644	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3645
charlesmn	0:3ac96e360672	3646	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3647	VL53L1_DEBUG_RESULTS_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3648
charlesmn	0:3ac96e360672	3649	status =
charlesmn	0:3ac96e360672	3650	VL53L1_i2c_decode_debug_results(
charlesmn	0:3ac96e360672	3651	VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3652	&buffer[i2c_buffer_offset_bytes],
charlesmn	0:3ac96e360672	3653	pdebug_results);
charlesmn	0:3ac96e360672	3654	}
charlesmn	0:3ac96e360672	3655
charlesmn	0:3ac96e360672	3656	if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_UPTO_CORE &&
charlesmn	0:3ac96e360672	3657	status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3658
charlesmn	0:3ac96e360672	3659	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	3660	VL53L1_CORE_RESULTS_I2C_INDEX - i2c_index;
charlesmn	0:3ac96e360672	3661
charlesmn	0:3ac96e360672	3662	status =
charlesmn	0:3ac96e360672	3663	VL53L1_i2c_decode_core_results(
charlesmn	0:3ac96e360672	3664	VL53L1_CORE_RESULTS_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3665	&buffer[i2c_buffer_offset_bytes],
charlesmn	0:3ac96e360672	3666	pcore_results);
charlesmn	0:3ac96e360672	3667	}
charlesmn	0:3ac96e360672	3668
charlesmn	0:3ac96e360672	3669	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3670
charlesmn	0:3ac96e360672	3671	i2c_buffer_offset_bytes = 0;
charlesmn	0:3ac96e360672	3672	status =
charlesmn	0:3ac96e360672	3673	VL53L1_i2c_decode_system_results(
charlesmn	0:3ac96e360672	3674	VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES,
charlesmn	0:3ac96e360672	3675	&buffer[i2c_buffer_offset_bytes],
charlesmn	0:3ac96e360672	3676	psystem_results);
charlesmn	0:3ac96e360672	3677	}
charlesmn	0:3ac96e360672	3678
charlesmn	0:3ac96e360672	3679	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	3680
charlesmn	0:3ac96e360672	3681	return status;
charlesmn	0:3ac96e360672	3682	}
charlesmn	0:3ac96e360672	3683
charlesmn	0:3ac96e360672	3684
charlesmn	0:3ac96e360672	3685	VL53L1_Error VL53L1_get_device_results(
charlesmn	0:3ac96e360672	3686	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	3687	VL53L1_DeviceResultsLevel device_results_level,
charlesmn	0:3ac96e360672	3688	VL53L1_range_results_t *prange_results)
charlesmn	0:3ac96e360672	3689	{
charlesmn	0:3ac96e360672	3690
charlesmn	0:3ac96e360672	3691
charlesmn	0:3ac96e360672	3692	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	3693
charlesmn	0:3ac96e360672	3694	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	3695	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	3696	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	3697	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	3698
charlesmn	0:3ac96e360672	3699	VL53L1_range_results_t *presults =
charlesmn	0:3ac96e360672	3700	&(pres->range_results);
charlesmn	0:3ac96e360672	3701	VL53L1_zone_objects_t *pobjects =
charlesmn	0:3ac96e360672	3702	&(pres->zone_results.VL53L1_p_002[0]);
charlesmn	0:3ac96e360672	3703	VL53L1_ll_driver_state_t *pstate =
charlesmn	0:3ac96e360672	3704	&(pdev->ll_state);
charlesmn	0:3ac96e360672	3705	VL53L1_zone_config_t *pzone_cfg =
charlesmn	0:3ac96e360672	3706	&(pdev->zone_cfg);
charlesmn	0:3ac96e360672	3707	VL53L1_zone_hist_info_t *phist_info =
charlesmn	0:3ac96e360672	3708	&(pres->zone_hists.VL53L1_p_002[0]);
charlesmn	0:3ac96e360672	3709
charlesmn	0:3ac96e360672	3710	VL53L1_dmax_calibration_data_t dmax_cal;
charlesmn	0:3ac96e360672	3711	VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
charlesmn	0:3ac96e360672	3712	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	3713	VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg);
charlesmn	0:3ac96e360672	3714	VL53L1_low_power_auto_data_t *pL = &(pdev->low_power_auto_data);
charlesmn	0:3ac96e360672	3715	VL53L1_histogram_bin_data_t *pHD = &(pdev->hist_data);
charlesmn	0:3ac96e360672	3716	VL53L1_customer_nvm_managed_t *pN = &(pdev->customer);
charlesmn	0:3ac96e360672	3717	VL53L1_zone_histograms_t *pZH = &(pres->zone_hists);
charlesmn	0:3ac96e360672	3718	VL53L1_xtalk_calibration_results_t *pXCR = &(pdev->xtalk_cal);
charlesmn	0:3ac96e360672	3719	uint8_t tmp8;
charlesmn	0:3ac96e360672	3720	uint8_t zid;
charlesmn	0:3ac96e360672	3721	uint8_t i;
charlesmn	0:3ac96e360672	3722	uint8_t histo_merge_nb, idx;
charlesmn	0:3ac96e360672	3723	uint8_t merge_enabled;
charlesmn	0:3ac96e360672	3724	VL53L1_range_data_t *pdata;
charlesmn	0:3ac96e360672	3725
charlesmn	0:3ac96e360672	3726	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	3727
charlesmn	0:3ac96e360672	3728	merge_enabled = (pdev->tuning_parms.tp_hist_merge == 1) &&
charlesmn	0:3ac96e360672	3729	(VL53L1DevDataGet(Dev, CurrentParameters.PresetMode) ==
charlesmn	0:3ac96e360672	3730	VL53L1_PRESETMODE_RANGING);
charlesmn	0:3ac96e360672	3731
charlesmn	0:3ac96e360672	3732
charlesmn	0:3ac96e360672	3733	if ((pdev->sys_ctrl.system__mode_start &
charlesmn	0:3ac96e360672	3734	VL53L1_DEVICESCHEDULERMODE_HISTOGRAM)
charlesmn	0:3ac96e360672	3735	== VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) {
charlesmn	0:3ac96e360672	3736
charlesmn	0:3ac96e360672	3737
charlesmn	0:3ac96e360672	3738
charlesmn	0:3ac96e360672	3739	status = VL53L1_get_histogram_bin_data(
charlesmn	0:3ac96e360672	3740	Dev,
charlesmn	0:3ac96e360672	3741	&(pdev->hist_data));
charlesmn	0:3ac96e360672	3742
charlesmn	0:3ac96e360672	3743
charlesmn	0:3ac96e360672	3744
charlesmn	0:3ac96e360672	3745
charlesmn	0:3ac96e360672	3746	if (status == VL53L1_ERROR_NONE &&
charlesmn	0:3ac96e360672	3747	pHD->number_of_ambient_bins == 0) {
charlesmn	0:3ac96e360672	3748	zid = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	3749	status = VL53L1_hist_copy_and_scale_ambient_info(
charlesmn	0:3ac96e360672	3750	&(pZH->VL53L1_p_002[zid]),
charlesmn	0:3ac96e360672	3751	&(pdev->hist_data));
charlesmn	0:3ac96e360672	3752	}
charlesmn	0:3ac96e360672	3753
charlesmn	0:3ac96e360672	3754
charlesmn	0:3ac96e360672	3755	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3756	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3757
charlesmn	0:3ac96e360672	3758	VL53L1_compute_histo_merge_nb(Dev, &histo_merge_nb);
charlesmn	0:3ac96e360672	3759	if (histo_merge_nb == 0)
charlesmn	0:3ac96e360672	3760	histo_merge_nb = 1;
charlesmn	0:3ac96e360672	3761	idx = histo_merge_nb - 1;
charlesmn	0:3ac96e360672	3762	if (merge_enabled)
charlesmn	0:3ac96e360672	3763	pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	3764	pXCR->algo__xtalk_cpo_HistoMerge_kcps[idx];
charlesmn	0:3ac96e360672	3765
charlesmn	0:3ac96e360672	3766	pHP->gain_factor =
charlesmn	0:3ac96e360672	3767	pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn	0:3ac96e360672	3768
charlesmn	0:3ac96e360672	3769	pHP->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	3770	VL53L1_calc_crosstalk_plane_offset_with_margin(
charlesmn	0:3ac96e360672	3771	pC->algo__crosstalk_compensation_plane_offset_kcps,
charlesmn	0:3ac96e360672	3772	pC->histogram_mode_crosstalk_margin_kcps);
charlesmn	0:3ac96e360672	3773
charlesmn	0:3ac96e360672	3774	pHP->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	3775	pC->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	3776	pHP->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	3777	pC->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	3778
charlesmn	0:3ac96e360672	3779	pdev->dmax_cfg.ambient_thresh_sigma =
charlesmn	0:3ac96e360672	3780	pHP->ambient_thresh_sigma1;
charlesmn	0:3ac96e360672	3781	pdev->dmax_cfg.min_ambient_thresh_events =
charlesmn	0:3ac96e360672	3782	pHP->min_ambient_thresh_events;
charlesmn	0:3ac96e360672	3783	pdev->dmax_cfg.signal_total_events_limit =
charlesmn	0:3ac96e360672	3784	pHP->signal_total_events_limit;
charlesmn	0:3ac96e360672	3785	pdev->dmax_cfg.dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	3786	pdev->stat_cfg.dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	3787	pdev->dmax_cfg.dss_config__aperture_attenuation =
charlesmn	0:3ac96e360672	3788	pdev->gen_cfg.dss_config__aperture_attenuation;
charlesmn	0:3ac96e360672	3789
charlesmn	0:3ac96e360672	3790	pHP->algo__crosstalk_detect_max_valid_range_mm =
charlesmn	0:3ac96e360672	3791	pC->algo__crosstalk_detect_max_valid_range_mm;
charlesmn	0:3ac96e360672	3792	pHP->algo__crosstalk_detect_min_valid_range_mm =
charlesmn	0:3ac96e360672	3793	pC->algo__crosstalk_detect_min_valid_range_mm;
charlesmn	0:3ac96e360672	3794	pHP->algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	3795	pC->algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn	0:3ac96e360672	3796	pHP->algo__crosstalk_detect_max_sigma_mm =
charlesmn	0:3ac96e360672	3797	pC->algo__crosstalk_detect_max_sigma_mm;
charlesmn	0:3ac96e360672	3798
charlesmn	0:3ac96e360672	3799
charlesmn	0:3ac96e360672	3800
charlesmn	0:3ac96e360672	3801	VL53L1_copy_rtn_good_spads_to_buffer(
charlesmn	0:3ac96e360672	3802	&(pdev->nvm_copy_data),
charlesmn	0:3ac96e360672	3803	&(pdev->rtn_good_spads[0]));
charlesmn	0:3ac96e360672	3804
charlesmn	0:3ac96e360672	3805
charlesmn	0:3ac96e360672	3806
charlesmn	0:3ac96e360672	3807	switch (pdev->offset_correction_mode) {
charlesmn	0:3ac96e360672	3808
charlesmn	0:3ac96e360672	3809	case VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS:
charlesmn	0:3ac96e360672	3810	tmp8 = pdev->gen_cfg.dss_config__aperture_attenuation;
charlesmn	0:3ac96e360672	3811
charlesmn	0:3ac96e360672	3812	VL53L1_hist_combine_mm1_mm2_offsets(
charlesmn	0:3ac96e360672	3813	pN->mm_config__inner_offset_mm,
charlesmn	0:3ac96e360672	3814	pN->mm_config__outer_offset_mm,
charlesmn	0:3ac96e360672	3815	pdev->nvm_copy_data.roi_config__mode_roi_centre_spad,
charlesmn	0:3ac96e360672	3816	pdev->nvm_copy_data.roi_config__mode_roi_xy_size,
charlesmn	0:3ac96e360672	3817	pHD->roi_config__user_roi_centre_spad,
charlesmn	0:3ac96e360672	3818	pHD->roi_config__user_roi_requested_global_xy_size,
charlesmn	0:3ac96e360672	3819	&(pdev->add_off_cal_data),
charlesmn	0:3ac96e360672	3820	&(pdev->rtn_good_spads[0]),
charlesmn	0:3ac96e360672	3821	(uint16_t)tmp8,
charlesmn	0:3ac96e360672	3822	&(pHP->range_offset_mm));
charlesmn	0:3ac96e360672	3823	break;
charlesmn	0:3ac96e360672	3824	case VL53L1_OFFSETCORRECTIONMODE__PER_ZONE_OFFSETS:
charlesmn	0:3ac96e360672	3825	zid = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	3826	pHP->range_offset_mm = (int16_t)(
charlesmn	0:3ac96e360672	3827	pres->zone_cal.VL53L1_p_002[zid].range_mm_offset);
charlesmn	0:3ac96e360672	3828	break;
charlesmn	0:3ac96e360672	3829	case VL53L1_OFFSETCORRECTIONMODE__PER_VCSEL_OFFSETS:
charlesmn	0:3ac96e360672	3830	select_offset_per_vcsel(
charlesmn	0:3ac96e360672	3831	pdev,
charlesmn	0:3ac96e360672	3832	&(pHP->range_offset_mm));
charlesmn	0:3ac96e360672	3833	pHP->range_offset_mm *= 4;
charlesmn	0:3ac96e360672	3834	break;
charlesmn	0:3ac96e360672	3835	default:
charlesmn	0:3ac96e360672	3836	pHP->range_offset_mm = 0;
charlesmn	0:3ac96e360672	3837	break;
charlesmn	0:3ac96e360672	3838
charlesmn	0:3ac96e360672	3839	}
charlesmn	0:3ac96e360672	3840
charlesmn	0:3ac96e360672	3841
charlesmn	0:3ac96e360672	3842
charlesmn	0:3ac96e360672	3843	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3844	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3845
charlesmn	0:3ac96e360672	3846
charlesmn	0:3ac96e360672	3847	VL53L1_calc_max_effective_spads(
charlesmn	0:3ac96e360672	3848	pHD->roi_config__user_roi_centre_spad,
charlesmn	0:3ac96e360672	3849	pHD->roi_config__user_roi_requested_global_xy_size,
charlesmn	0:3ac96e360672	3850	&(pdev->rtn_good_spads[0]),
charlesmn	0:3ac96e360672	3851	(uint16_t)pdev->gen_cfg.dss_config__aperture_attenuation,
charlesmn	0:3ac96e360672	3852	&(pdev->dmax_cfg.max_effective_spads));
charlesmn	0:3ac96e360672	3853
charlesmn	0:3ac96e360672	3854	status =
charlesmn	0:3ac96e360672	3855	VL53L1_get_dmax_calibration_data(
charlesmn	0:3ac96e360672	3856	Dev,
charlesmn	0:3ac96e360672	3857	pdev->dmax_mode,
charlesmn	0:3ac96e360672	3858	pdev->ll_state.rd_zone_id,
charlesmn	0:3ac96e360672	3859	pdmax_cal);
charlesmn	0:3ac96e360672	3860
charlesmn	0:3ac96e360672	3861
charlesmn	0:3ac96e360672	3862
charlesmn	0:3ac96e360672	3863	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3864	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3865
charlesmn	0:3ac96e360672	3866	status = VL53L1_ipp_hist_process_data(
charlesmn	0:3ac96e360672	3867	Dev,
charlesmn	0:3ac96e360672	3868	pdmax_cal,
charlesmn	0:3ac96e360672	3869	&(pdev->dmax_cfg),
charlesmn	0:3ac96e360672	3870	&(pdev->histpostprocess),
charlesmn	0:3ac96e360672	3871	&(pdev->hist_data),
charlesmn	0:3ac96e360672	3872	&(pdev->xtalk_shapes),
charlesmn	0:3ac96e360672	3873	pdev->wArea1,
charlesmn	0:3ac96e360672	3874	pdev->wArea2,
charlesmn	0:3ac96e360672	3875	&histo_merge_nb,
charlesmn	0:3ac96e360672	3876	presults);
charlesmn	0:3ac96e360672	3877
charlesmn	0:3ac96e360672	3878	if ((merge_enabled) && (histo_merge_nb > 1))
charlesmn	0:3ac96e360672	3879	for (i = 0; i < VL53L1_MAX_RANGE_RESULTS; i++) {
charlesmn	0:3ac96e360672	3880	pdata = &(presults->VL53L1_p_002[i]);
charlesmn	0:3ac96e360672	3881	pdata->VL53L1_p_020 /= histo_merge_nb;
charlesmn	0:3ac96e360672	3882	pdata->VL53L1_p_021 /= histo_merge_nb;
charlesmn	0:3ac96e360672	3883	pdata->VL53L1_p_013 /= histo_merge_nb;
charlesmn	0:3ac96e360672	3884	pdata->peak_signal_count_rate_mcps /= histo_merge_nb;
charlesmn	0:3ac96e360672	3885	pdata->avg_signal_count_rate_mcps /= histo_merge_nb;
charlesmn	0:3ac96e360672	3886	pdata->ambient_count_rate_mcps /= histo_merge_nb;
charlesmn	0:3ac96e360672	3887	pdata->VL53L1_p_012 /= histo_merge_nb;
charlesmn	0:3ac96e360672	3888	}
charlesmn	0:3ac96e360672	3889
charlesmn	0:3ac96e360672	3890
charlesmn	0:3ac96e360672	3891	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3892	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3893
charlesmn	0:3ac96e360672	3894	status = VL53L1_hist_wrap_dmax(
charlesmn	0:3ac96e360672	3895	&(pdev->histpostprocess),
charlesmn	0:3ac96e360672	3896	&(pdev->hist_data),
charlesmn	0:3ac96e360672	3897	&(presults->wrap_dmax_mm));
charlesmn	0:3ac96e360672	3898
charlesmn	0:3ac96e360672	3899
charlesmn	0:3ac96e360672	3900	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3901	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3902
charlesmn	0:3ac96e360672	3903	zid = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	3904	status = VL53L1_hist_phase_consistency_check(
charlesmn	0:3ac96e360672	3905	Dev,
charlesmn	0:3ac96e360672	3906	&(pZH->VL53L1_p_002[zid]),
charlesmn	0:3ac96e360672	3907	&(pres->zone_results.VL53L1_p_002[zid]),
charlesmn	0:3ac96e360672	3908	presults);
charlesmn	0:3ac96e360672	3909
charlesmn	0:3ac96e360672	3910
charlesmn	0:3ac96e360672	3911	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3912	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3913
charlesmn	0:3ac96e360672	3914	zid = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	3915	status = VL53L1_hist_xmonitor_consistency_check(
charlesmn	0:3ac96e360672	3916	Dev,
charlesmn	0:3ac96e360672	3917	&(pZH->VL53L1_p_002[zid]),
charlesmn	0:3ac96e360672	3918	&(pres->zone_results.VL53L1_p_002[zid]),
charlesmn	0:3ac96e360672	3919	&(presults->xmonitor));
charlesmn	0:3ac96e360672	3920
charlesmn	0:3ac96e360672	3921
charlesmn	0:3ac96e360672	3922	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3923	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3924
charlesmn	0:3ac96e360672	3925
charlesmn	0:3ac96e360672	3926	zid = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	3927	pZH->max_zones = VL53L1_MAX_USER_ZONES;
charlesmn	0:3ac96e360672	3928	pZH->active_zones =
charlesmn	0:3ac96e360672	3929	pdev->zone_cfg.active_zones+1;
charlesmn	0:3ac96e360672	3930	pHD->zone_id = zid;
charlesmn	0:3ac96e360672	3931
charlesmn	0:3ac96e360672	3932	if (zid <
charlesmn	0:3ac96e360672	3933	pres->zone_results.max_zones) {
charlesmn	0:3ac96e360672	3934
charlesmn	0:3ac96e360672	3935	phist_info =
charlesmn	0:3ac96e360672	3936	&(pZH->VL53L1_p_002[zid]);
charlesmn	0:3ac96e360672	3937
charlesmn	0:3ac96e360672	3938	phist_info->rd_device_state =
charlesmn	0:3ac96e360672	3939	pHD->rd_device_state;
charlesmn	0:3ac96e360672	3940
charlesmn	0:3ac96e360672	3941	phist_info->number_of_ambient_bins =
charlesmn	0:3ac96e360672	3942	pHD->number_of_ambient_bins;
charlesmn	0:3ac96e360672	3943
charlesmn	0:3ac96e360672	3944	phist_info->result__dss_actual_effective_spads =
charlesmn	0:3ac96e360672	3945	pHD->result__dss_actual_effective_spads;
charlesmn	0:3ac96e360672	3946
charlesmn	0:3ac96e360672	3947	phist_info->VL53L1_p_009 =
charlesmn	0:3ac96e360672	3948	pHD->VL53L1_p_009;
charlesmn	0:3ac96e360672	3949
charlesmn	0:3ac96e360672	3950	phist_info->total_periods_elapsed =
charlesmn	0:3ac96e360672	3951	pHD->total_periods_elapsed;
charlesmn	0:3ac96e360672	3952
charlesmn	0:3ac96e360672	3953	phist_info->ambient_events_sum =
charlesmn	0:3ac96e360672	3954	pHD->ambient_events_sum;
charlesmn	0:3ac96e360672	3955	}
charlesmn	0:3ac96e360672	3956
charlesmn	0:3ac96e360672	3957
charlesmn	0:3ac96e360672	3958
charlesmn	0:3ac96e360672	3959	if (status != VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3960	goto UPDATE_DYNAMIC_CONFIG;
charlesmn	0:3ac96e360672	3961
charlesmn	0:3ac96e360672	3962	VL53L1_hist_copy_results_to_sys_and_core(
charlesmn	0:3ac96e360672	3963	&(pdev->hist_data),
charlesmn	0:3ac96e360672	3964	presults,
charlesmn	0:3ac96e360672	3965	&(pdev->sys_results),
charlesmn	0:3ac96e360672	3966	&(pdev->core_results));
charlesmn	0:3ac96e360672	3967
charlesmn	0:3ac96e360672	3968
charlesmn	0:3ac96e360672	3969	UPDATE_DYNAMIC_CONFIG:
charlesmn	0:3ac96e360672	3970	if (pzone_cfg->active_zones > 0) {
charlesmn	0:3ac96e360672	3971	if (pstate->rd_device_state !=
charlesmn	0:3ac96e360672	3972	VL53L1_DEVICESTATE_RANGING_WAIT_GPH_SYNC) {
charlesmn	0:3ac96e360672	3973	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	3974	status = VL53L1_dynamic_zone_update(
charlesmn	0:3ac96e360672	3975	Dev, presults);
charlesmn	0:3ac96e360672	3976	}
charlesmn	0:3ac96e360672	3977	}
charlesmn	0:3ac96e360672	3978
charlesmn	0:3ac96e360672	3979
charlesmn	0:3ac96e360672	3980	for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) {
charlesmn	0:3ac96e360672	3981	pzone_cfg->bin_config[i] =
charlesmn	0:3ac96e360672	3982	((pdev->ll_state.cfg_internal_stream_count)
charlesmn	0:3ac96e360672	3983	& 0x01) ?
charlesmn	0:3ac96e360672	3984	VL53L1_ZONECONFIG_BINCONFIG__HIGHAMB :
charlesmn	0:3ac96e360672	3985	VL53L1_ZONECONFIG_BINCONFIG__LOWAMB;
charlesmn	0:3ac96e360672	3986	}
charlesmn	0:3ac96e360672	3987
charlesmn	0:3ac96e360672	3988	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3989	status = VL53L1_multizone_hist_bins_update(Dev);
charlesmn	0:3ac96e360672	3990
charlesmn	0:3ac96e360672	3991	}
charlesmn	0:3ac96e360672	3992
charlesmn	0:3ac96e360672	3993
charlesmn	0:3ac96e360672	3994
charlesmn	0:3ac96e360672	3995	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	3996	status = VL53L1_dynamic_xtalk_correction_corrector(Dev);
charlesmn	0:3ac96e360672	3997
charlesmn	0:3ac96e360672	3998	#ifdef VL53L1_LOG_ENABLE
charlesmn	0:3ac96e360672	3999	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4000	VL53L1_print_histogram_bin_data(
charlesmn	0:3ac96e360672	4001	&(pdev->hist_data),
charlesmn	0:3ac96e360672	4002	"get_device_results():pdev->lldata.hist_data.",
charlesmn	0:3ac96e360672	4003	VL53L1_TRACE_MODULE_HISTOGRAM_DATA);
charlesmn	0:3ac96e360672	4004	#endif
charlesmn	0:3ac96e360672	4005
charlesmn	0:3ac96e360672	4006	if (merge_enabled)
charlesmn	0:3ac96e360672	4007	pC->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	4008	pXCR->algo__xtalk_cpo_HistoMerge_kcps[0];
charlesmn	0:3ac96e360672	4009	} else {
charlesmn	0:3ac96e360672	4010
charlesmn	0:3ac96e360672	4011	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4012	status = VL53L1_get_measurement_results(
charlesmn	0:3ac96e360672	4013	Dev,
charlesmn	0:3ac96e360672	4014	device_results_level);
charlesmn	0:3ac96e360672	4015
charlesmn	0:3ac96e360672	4016	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4017	VL53L1_copy_sys_and_core_results_to_range_results(
charlesmn	0:3ac96e360672	4018	(int32_t)pdev->gain_cal.standard_ranging_gain_factor,
charlesmn	0:3ac96e360672	4019	&(pdev->sys_results),
charlesmn	0:3ac96e360672	4020	&(pdev->core_results),
charlesmn	0:3ac96e360672	4021	presults);
charlesmn	0:3ac96e360672	4022
charlesmn	0:3ac96e360672	4023
charlesmn	0:3ac96e360672	4024
charlesmn	0:3ac96e360672	4025	if (pL->is_low_power_auto_mode == 1) {
charlesmn	0:3ac96e360672	4026
charlesmn	0:3ac96e360672	4027	if ((status == VL53L1_ERROR_NONE) &&
charlesmn	0:3ac96e360672	4028	(pL->low_power_auto_range_count == 0)) {
charlesmn	0:3ac96e360672	4029
charlesmn	0:3ac96e360672	4030	status =
charlesmn	0:3ac96e360672	4031	VL53L1_low_power_auto_setup_manual_calibration(
charlesmn	0:3ac96e360672	4032	Dev);
charlesmn	0:3ac96e360672	4033	pL->low_power_auto_range_count = 1;
charlesmn	0:3ac96e360672	4034	} else if ((status == VL53L1_ERROR_NONE) &&
charlesmn	0:3ac96e360672	4035	(pL->low_power_auto_range_count == 1)) {
charlesmn	0:3ac96e360672	4036	pL->low_power_auto_range_count = 2;
charlesmn	0:3ac96e360672	4037	}
charlesmn	0:3ac96e360672	4038
charlesmn	0:3ac96e360672	4039
charlesmn	0:3ac96e360672	4040	if ((pL->low_power_auto_range_count != 0xFF) &&
charlesmn	0:3ac96e360672	4041	(status == VL53L1_ERROR_NONE)) {
charlesmn	0:3ac96e360672	4042	status = VL53L1_low_power_auto_update_DSS(
charlesmn	0:3ac96e360672	4043	Dev);
charlesmn	0:3ac96e360672	4044	}
charlesmn	0:3ac96e360672	4045	}
charlesmn	0:3ac96e360672	4046
charlesmn	0:3ac96e360672	4047	}
charlesmn	0:3ac96e360672	4048
charlesmn	0:3ac96e360672	4049
charlesmn	0:3ac96e360672	4050	presults->cfg_device_state = pdev->ll_state.cfg_device_state;
charlesmn	0:3ac96e360672	4051	presults->rd_device_state = pdev->ll_state.rd_device_state;
charlesmn	0:3ac96e360672	4052	presults->zone_id = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	4053
charlesmn	0:3ac96e360672	4054	if (status == VL53L1_ERROR_NONE) {
charlesmn	0:3ac96e360672	4055
charlesmn	0:3ac96e360672	4056
charlesmn	0:3ac96e360672	4057	pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES;
charlesmn	0:3ac96e360672	4058	pres->zone_results.active_zones = pdev->zone_cfg.active_zones+1;
charlesmn	0:3ac96e360672	4059	zid = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	4060
charlesmn	0:3ac96e360672	4061	if (zid < pres->zone_results.max_zones) {
charlesmn	0:3ac96e360672	4062
charlesmn	0:3ac96e360672	4063	pobjects =
charlesmn	0:3ac96e360672	4064	&(pres->zone_results.VL53L1_p_002[zid]);
charlesmn	0:3ac96e360672	4065
charlesmn	0:3ac96e360672	4066	pobjects->cfg_device_state =
charlesmn	0:3ac96e360672	4067	presults->cfg_device_state;
charlesmn	0:3ac96e360672	4068	pobjects->rd_device_state = presults->rd_device_state;
charlesmn	0:3ac96e360672	4069	pobjects->zone_id = presults->zone_id;
charlesmn	0:3ac96e360672	4070	pobjects->stream_count = presults->stream_count;
charlesmn	0:3ac96e360672	4071
charlesmn	0:3ac96e360672	4072
charlesmn	0:3ac96e360672	4073
charlesmn	0:3ac96e360672	4074	pobjects->xmonitor.VL53L1_p_020 =
charlesmn	0:3ac96e360672	4075	presults->xmonitor.VL53L1_p_020;
charlesmn	0:3ac96e360672	4076	pobjects->xmonitor.VL53L1_p_021 =
charlesmn	0:3ac96e360672	4077	presults->xmonitor.VL53L1_p_021;
charlesmn	0:3ac96e360672	4078	pobjects->xmonitor.VL53L1_p_014 =
charlesmn	0:3ac96e360672	4079	presults->xmonitor.VL53L1_p_014;
charlesmn	0:3ac96e360672	4080	pobjects->xmonitor.range_status =
charlesmn	0:3ac96e360672	4081	presults->xmonitor.range_status;
charlesmn	0:3ac96e360672	4082
charlesmn	0:3ac96e360672	4083	pobjects->max_objects = presults->max_results;
charlesmn	0:3ac96e360672	4084	pobjects->active_objects = presults->active_results;
charlesmn	0:3ac96e360672	4085
charlesmn	0:3ac96e360672	4086	for (i = 0; i < presults->active_results; i++) {
charlesmn	0:3ac96e360672	4087	pobjects->VL53L1_p_002[i].VL53L1_p_020 =
charlesmn	0:3ac96e360672	4088	presults->VL53L1_p_002[i].VL53L1_p_020;
charlesmn	0:3ac96e360672	4089	pobjects->VL53L1_p_002[i].VL53L1_p_021 =
charlesmn	0:3ac96e360672	4090	presults->VL53L1_p_002[i].VL53L1_p_021;
charlesmn	0:3ac96e360672	4091	pobjects->VL53L1_p_002[i].VL53L1_p_014 =
charlesmn	0:3ac96e360672	4092	presults->VL53L1_p_002[i].VL53L1_p_014;
charlesmn	0:3ac96e360672	4093	pobjects->VL53L1_p_002[i].range_status =
charlesmn	0:3ac96e360672	4094	presults->VL53L1_p_002[i].range_status;
charlesmn	0:3ac96e360672	4095	}
charlesmn	0:3ac96e360672	4096
charlesmn	0:3ac96e360672	4097
charlesmn	0:3ac96e360672	4098	}
charlesmn	0:3ac96e360672	4099	}
charlesmn	0:3ac96e360672	4100
charlesmn	0:3ac96e360672	4101
charlesmn	0:3ac96e360672	4102
charlesmn	0:3ac96e360672	4103	memcpy(
charlesmn	0:3ac96e360672	4104	prange_results,
charlesmn	0:3ac96e360672	4105	presults,
charlesmn	0:3ac96e360672	4106	sizeof(VL53L1_range_results_t));
charlesmn	0:3ac96e360672	4107
charlesmn	0:3ac96e360672	4108
charlesmn	0:3ac96e360672	4109
charlesmn	0:3ac96e360672	4110	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4111	status = VL53L1_check_ll_driver_rd_state(Dev);
charlesmn	0:3ac96e360672	4112
charlesmn	0:3ac96e360672	4113	#ifdef VL53L1_LOG_ENABLE
charlesmn	0:3ac96e360672	4114	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4115	VL53L1_print_range_results(
charlesmn	0:3ac96e360672	4116	presults,
charlesmn	0:3ac96e360672	4117	"get_device_results():pdev->llresults.range_results.",
charlesmn	0:3ac96e360672	4118	VL53L1_TRACE_MODULE_RANGE_RESULTS_DATA);
charlesmn	0:3ac96e360672	4119	#endif
charlesmn	0:3ac96e360672	4120
charlesmn	0:3ac96e360672	4121	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4122
charlesmn	0:3ac96e360672	4123	return status;
charlesmn	0:3ac96e360672	4124	}
charlesmn	0:3ac96e360672	4125
charlesmn	0:3ac96e360672	4126
charlesmn	0:3ac96e360672	4127	VL53L1_Error VL53L1_clear_interrupt_and_enable_next_range(
charlesmn	0:3ac96e360672	4128	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4129	uint8_t measurement_mode)
charlesmn	0:3ac96e360672	4130	{
charlesmn	0:3ac96e360672	4131
charlesmn	0:3ac96e360672	4132
charlesmn	0:3ac96e360672	4133
charlesmn	0:3ac96e360672	4134	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4135
charlesmn	0:3ac96e360672	4136	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4137
charlesmn	0:3ac96e360672	4138
charlesmn	0:3ac96e360672	4139
charlesmn	0:3ac96e360672	4140
charlesmn	0:3ac96e360672	4141
charlesmn	0:3ac96e360672	4142
charlesmn	0:3ac96e360672	4143
charlesmn	0:3ac96e360672	4144
charlesmn	0:3ac96e360672	4145
charlesmn	0:3ac96e360672	4146
charlesmn	0:3ac96e360672	4147	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4148	status = VL53L1_init_and_start_range(
charlesmn	0:3ac96e360672	4149	Dev,
charlesmn	0:3ac96e360672	4150	measurement_mode,
charlesmn	0:3ac96e360672	4151	VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS);
charlesmn	0:3ac96e360672	4152
charlesmn	0:3ac96e360672	4153	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4154
charlesmn	0:3ac96e360672	4155	return status;
charlesmn	0:3ac96e360672	4156	}
charlesmn	0:3ac96e360672	4157
charlesmn	0:3ac96e360672	4158
charlesmn	0:3ac96e360672	4159	VL53L1_Error VL53L1_get_histogram_bin_data(
charlesmn	0:3ac96e360672	4160	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4161	VL53L1_histogram_bin_data_t *pdata)
charlesmn	0:3ac96e360672	4162	{
charlesmn	0:3ac96e360672	4163
charlesmn	0:3ac96e360672	4164
charlesmn	0:3ac96e360672	4165	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4166	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	4167	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4168	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	4169	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	4170
charlesmn	0:3ac96e360672	4171	VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg;
charlesmn	0:3ac96e360672	4172
charlesmn	0:3ac96e360672	4173	VL53L1_static_nvm_managed_t *pstat_nvm = &(pdev->stat_nvm);
charlesmn	0:3ac96e360672	4174	VL53L1_static_config_t *pstat_cfg = &(pdev->stat_cfg);
charlesmn	0:3ac96e360672	4175	VL53L1_general_config_t *pgen_cfg = &(pdev->gen_cfg);
charlesmn	0:3ac96e360672	4176	VL53L1_timing_config_t *ptim_cfg = &(pdev->tim_cfg);
charlesmn	0:3ac96e360672	4177	VL53L1_range_results_t *presults = &(pres->range_results);
charlesmn	0:3ac96e360672	4178
charlesmn	0:3ac96e360672	4179	uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE];
charlesmn	0:3ac96e360672	4180	uint8_t *pbuffer = &buffer[0];
charlesmn	0:3ac96e360672	4181	uint8_t bin_23_0 = 0x00;
charlesmn	0:3ac96e360672	4182	uint16_t bin = 0;
charlesmn	0:3ac96e360672	4183	uint16_t i2c_buffer_offset_bytes = 0;
charlesmn	0:3ac96e360672	4184	uint16_t encoded_timeout = 0;
charlesmn	0:3ac96e360672	4185	uint32_t pll_period_us = 0;
charlesmn	0:3ac96e360672	4186	uint32_t periods_elapsed_tmp = 0;
charlesmn	0:3ac96e360672	4187	uint8_t i = 0;
charlesmn	0:3ac96e360672	4188	int32_t hist_merge = 0;
charlesmn	0:3ac96e360672	4189
charlesmn	0:3ac96e360672	4190	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4191
charlesmn	0:3ac96e360672	4192
charlesmn	0:3ac96e360672	4193
charlesmn	0:3ac96e360672	4194	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4195	status = VL53L1_ReadMulti(
charlesmn	0:3ac96e360672	4196	Dev,
charlesmn	0:3ac96e360672	4197	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX,
charlesmn	0:3ac96e360672	4198	pbuffer,
charlesmn	0:3ac96e360672	4199	VL53L1_HISTOGRAM_BIN_DATA_I2C_SIZE_BYTES);
charlesmn	0:3ac96e360672	4200
charlesmn	0:3ac96e360672	4201
charlesmn	0:3ac96e360672	4202
charlesmn	0:3ac96e360672	4203	pdata->result__interrupt_status = *(pbuffer + 0);
charlesmn	0:3ac96e360672	4204	pdata->result__range_status = *(pbuffer + 1);
charlesmn	0:3ac96e360672	4205	pdata->result__report_status = *(pbuffer + 2);
charlesmn	0:3ac96e360672	4206	pdata->result__stream_count = *(pbuffer + 3);
charlesmn	0:3ac96e360672	4207	pdata->result__dss_actual_effective_spads =
charlesmn	0:3ac96e360672	4208	VL53L1_i2c_decode_uint16_t(2, pbuffer + 4);
charlesmn	0:3ac96e360672	4209
charlesmn	0:3ac96e360672	4210
charlesmn	0:3ac96e360672	4211
charlesmn	0:3ac96e360672	4212	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	4213	VL53L1_PHASECAL_RESULT__REFERENCE_PHASE -
charlesmn	0:3ac96e360672	4214	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn	0:3ac96e360672	4215
charlesmn	0:3ac96e360672	4216	pbuffer = &buffer[i2c_buffer_offset_bytes];
charlesmn	0:3ac96e360672	4217
charlesmn	0:3ac96e360672	4218	pdata->phasecal_result__reference_phase =
charlesmn	0:3ac96e360672	4219	VL53L1_i2c_decode_uint16_t(2, pbuffer);
charlesmn	0:3ac96e360672	4220
charlesmn	0:3ac96e360672	4221	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	4222	VL53L1_PHASECAL_RESULT__VCSEL_START -
charlesmn	0:3ac96e360672	4223	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn	0:3ac96e360672	4224
charlesmn	0:3ac96e360672	4225	pdata->phasecal_result__vcsel_start = buffer[i2c_buffer_offset_bytes];
charlesmn	0:3ac96e360672	4226
charlesmn	0:3ac96e360672	4227
charlesmn	0:3ac96e360672	4228
charlesmn	0:3ac96e360672	4229	pdev->dbg_results.phasecal_result__reference_phase =
charlesmn	0:3ac96e360672	4230	pdata->phasecal_result__reference_phase;
charlesmn	0:3ac96e360672	4231	pdev->dbg_results.phasecal_result__vcsel_start =
charlesmn	0:3ac96e360672	4232	pdata->phasecal_result__vcsel_start;
charlesmn	0:3ac96e360672	4233
charlesmn	0:3ac96e360672	4234
charlesmn	0:3ac96e360672	4235
charlesmn	0:3ac96e360672	4236	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	4237	VL53L1_RESULT__HISTOGRAM_BIN_23_0_MSB -
charlesmn	0:3ac96e360672	4238	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn	0:3ac96e360672	4239
charlesmn	0:3ac96e360672	4240	bin_23_0 = buffer[i2c_buffer_offset_bytes] << 2;
charlesmn	0:3ac96e360672	4241
charlesmn	0:3ac96e360672	4242	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	4243	VL53L1_RESULT__HISTOGRAM_BIN_23_0_LSB -
charlesmn	0:3ac96e360672	4244	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn	0:3ac96e360672	4245
charlesmn	0:3ac96e360672	4246	bin_23_0 += buffer[i2c_buffer_offset_bytes];
charlesmn	0:3ac96e360672	4247
charlesmn	0:3ac96e360672	4248	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	4249	VL53L1_RESULT__HISTOGRAM_BIN_23_0 -
charlesmn	0:3ac96e360672	4250	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn	0:3ac96e360672	4251
charlesmn	0:3ac96e360672	4252	buffer[i2c_buffer_offset_bytes] = bin_23_0;
charlesmn	0:3ac96e360672	4253
charlesmn	0:3ac96e360672	4254
charlesmn	0:3ac96e360672	4255
charlesmn	0:3ac96e360672	4256	i2c_buffer_offset_bytes =
charlesmn	0:3ac96e360672	4257	VL53L1_RESULT__HISTOGRAM_BIN_0_2 -
charlesmn	0:3ac96e360672	4258	VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX;
charlesmn	0:3ac96e360672	4259
charlesmn	0:3ac96e360672	4260	pbuffer = &buffer[i2c_buffer_offset_bytes];
charlesmn	0:3ac96e360672	4261	for (bin = 0; bin < VL53L1_HISTOGRAM_BUFFER_SIZE; bin++) {
charlesmn	0:3ac96e360672	4262	pdata->bin_data[bin] =
charlesmn	0:3ac96e360672	4263	(int32_t)VL53L1_i2c_decode_uint32_t(3, pbuffer);
charlesmn	0:3ac96e360672	4264	pbuffer += 3;
charlesmn	0:3ac96e360672	4265	}
charlesmn	0:3ac96e360672	4266
charlesmn	0:3ac96e360672	4267	VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE,
charlesmn	0:3ac96e360672	4268	&hist_merge);
charlesmn	0:3ac96e360672	4269
charlesmn	0:3ac96e360672	4270	if (pdata->result__stream_count == 0) {
charlesmn	0:3ac96e360672	4271
charlesmn	0:3ac96e360672	4272	memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec));
charlesmn	0:3ac96e360672	4273	pdev->bin_rec_pos = 0;
charlesmn	0:3ac96e360672	4274	pdev->pos_before_next_recom = 0;
charlesmn	0:3ac96e360672	4275	}
charlesmn	0:3ac96e360672	4276
charlesmn	0:3ac96e360672	4277	if (hist_merge == 1)
charlesmn	0:3ac96e360672	4278	vl53l1_histo_merge(Dev, pdata);
charlesmn	0:3ac96e360672	4279
charlesmn	0:3ac96e360672	4280
charlesmn	0:3ac96e360672	4281	pdata->zone_id = pdev->ll_state.rd_zone_id;
charlesmn	0:3ac96e360672	4282	pdata->VL53L1_p_022 = 0;
charlesmn	0:3ac96e360672	4283	pdata->VL53L1_p_023 = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn	0:3ac96e360672	4284	pdata->VL53L1_p_024 = VL53L1_HISTOGRAM_BUFFER_SIZE;
charlesmn	0:3ac96e360672	4285
charlesmn	0:3ac96e360672	4286	pdata->cal_config__vcsel_start = pgen_cfg->cal_config__vcsel_start;
charlesmn	0:3ac96e360672	4287
charlesmn	0:3ac96e360672	4288
charlesmn	0:3ac96e360672	4289
charlesmn	0:3ac96e360672	4290	pdata->vcsel_width =
charlesmn	0:3ac96e360672	4291	((uint16_t)pgen_cfg->global_config__vcsel_width) << 4;
charlesmn	0:3ac96e360672	4292	pdata->vcsel_width +=
charlesmn	0:3ac96e360672	4293	(uint16_t)pstat_cfg->ana_config__vcsel_pulse_width_offset;
charlesmn	0:3ac96e360672	4294
charlesmn	0:3ac96e360672	4295
charlesmn	0:3ac96e360672	4296	pdata->VL53L1_p_019 =
charlesmn	0:3ac96e360672	4297	pstat_nvm->osc_measured__fast_osc__frequency;
charlesmn	0:3ac96e360672	4298
charlesmn	0:3ac96e360672	4299
charlesmn	0:3ac96e360672	4300
charlesmn	0:3ac96e360672	4301	VL53L1_hist_get_bin_sequence_config(Dev, pdata);
charlesmn	0:3ac96e360672	4302
charlesmn	0:3ac96e360672	4303
charlesmn	0:3ac96e360672	4304
charlesmn	0:3ac96e360672	4305	if (pdev->ll_state.rd_timing_status == 0) {
charlesmn	0:3ac96e360672	4306
charlesmn	0:3ac96e360672	4307	encoded_timeout =
charlesmn	0:3ac96e360672	4308	(ptim_cfg->range_config__timeout_macrop_a_hi << 8)
charlesmn	0:3ac96e360672	4309	+ ptim_cfg->range_config__timeout_macrop_a_lo;
charlesmn	0:3ac96e360672	4310	pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_a;
charlesmn	0:3ac96e360672	4311	} else {
charlesmn	0:3ac96e360672	4312
charlesmn	0:3ac96e360672	4313	encoded_timeout =
charlesmn	0:3ac96e360672	4314	(ptim_cfg->range_config__timeout_macrop_b_hi << 8)
charlesmn	0:3ac96e360672	4315	+ ptim_cfg->range_config__timeout_macrop_b_lo;
charlesmn	0:3ac96e360672	4316	pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_b;
charlesmn	0:3ac96e360672	4317	}
charlesmn	0:3ac96e360672	4318
charlesmn	0:3ac96e360672	4319
charlesmn	0:3ac96e360672	4320
charlesmn	0:3ac96e360672	4321	pdata->number_of_ambient_bins = 0;
charlesmn	0:3ac96e360672	4322
charlesmn	0:3ac96e360672	4323	for (i = 0; i < 6; i++) {
charlesmn	0:3ac96e360672	4324	if ((pdata->bin_seq[i] & 0x07) == 0x07)
charlesmn	0:3ac96e360672	4325	pdata->number_of_ambient_bins =
charlesmn	0:3ac96e360672	4326	pdata->number_of_ambient_bins + 0x04;
charlesmn	0:3ac96e360672	4327	}
charlesmn	0:3ac96e360672	4328
charlesmn	0:3ac96e360672	4329	pdata->total_periods_elapsed =
charlesmn	0:3ac96e360672	4330	VL53L1_decode_timeout(encoded_timeout);
charlesmn	0:3ac96e360672	4331
charlesmn	0:3ac96e360672	4332
charlesmn	0:3ac96e360672	4333
charlesmn	0:3ac96e360672	4334
charlesmn	0:3ac96e360672	4335	pll_period_us =
charlesmn	0:3ac96e360672	4336	VL53L1_calc_pll_period_us(pdata->VL53L1_p_019);
charlesmn	0:3ac96e360672	4337
charlesmn	0:3ac96e360672	4338
charlesmn	0:3ac96e360672	4339
charlesmn	0:3ac96e360672	4340	periods_elapsed_tmp = pdata->total_periods_elapsed + 1;
charlesmn	0:3ac96e360672	4341
charlesmn	0:3ac96e360672	4342
charlesmn	0:3ac96e360672	4343
charlesmn	0:3ac96e360672	4344	pdata->peak_duration_us =
charlesmn	0:3ac96e360672	4345	VL53L1_duration_maths(
charlesmn	0:3ac96e360672	4346	pll_period_us,
charlesmn	0:3ac96e360672	4347	(uint32_t)pdata->vcsel_width,
charlesmn	0:3ac96e360672	4348	VL53L1_RANGING_WINDOW_VCSEL_PERIODS,
charlesmn	0:3ac96e360672	4349	periods_elapsed_tmp);
charlesmn	0:3ac96e360672	4350
charlesmn	0:3ac96e360672	4351	pdata->woi_duration_us = 0;
charlesmn	0:3ac96e360672	4352
charlesmn	0:3ac96e360672	4353
charlesmn	0:3ac96e360672	4354
charlesmn	0:3ac96e360672	4355	VL53L1_hist_calc_zero_distance_phase(pdata);
charlesmn	0:3ac96e360672	4356
charlesmn	0:3ac96e360672	4357
charlesmn	0:3ac96e360672	4358
charlesmn	0:3ac96e360672	4359	VL53L1_hist_estimate_ambient_from_ambient_bins(pdata);
charlesmn	0:3ac96e360672	4360
charlesmn	0:3ac96e360672	4361
charlesmn	0:3ac96e360672	4362
charlesmn	0:3ac96e360672	4363	pdata->cfg_device_state = pdev->ll_state.cfg_device_state;
charlesmn	0:3ac96e360672	4364	pdata->rd_device_state = pdev->ll_state.rd_device_state;
charlesmn	0:3ac96e360672	4365
charlesmn	0:3ac96e360672	4366
charlesmn	0:3ac96e360672	4367
charlesmn	0:3ac96e360672	4368	pzone_dyn_cfg = &(pres->zone_dyn_cfgs.VL53L1_p_002[pdata->zone_id]);
charlesmn	0:3ac96e360672	4369
charlesmn	0:3ac96e360672	4370	pdata->roi_config__user_roi_centre_spad =
charlesmn	0:3ac96e360672	4371	pzone_dyn_cfg->roi_config__user_roi_centre_spad;
charlesmn	0:3ac96e360672	4372	pdata->roi_config__user_roi_requested_global_xy_size =
charlesmn	0:3ac96e360672	4373	pzone_dyn_cfg->roi_config__user_roi_requested_global_xy_size;
charlesmn	0:3ac96e360672	4374
charlesmn	0:3ac96e360672	4375
charlesmn	0:3ac96e360672	4376
charlesmn	0:3ac96e360672	4377	presults->device_status = VL53L1_DEVICEERROR_NOUPDATE;
charlesmn	0:3ac96e360672	4378
charlesmn	0:3ac96e360672	4379
charlesmn	0:3ac96e360672	4380
charlesmn	0:3ac96e360672	4381	switch (pdata->result__range_status &
charlesmn	0:3ac96e360672	4382	VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) {
charlesmn	0:3ac96e360672	4383
charlesmn	0:3ac96e360672	4384	case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
charlesmn	0:3ac96e360672	4385	case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
charlesmn	0:3ac96e360672	4386	case VL53L1_DEVICEERROR_NOVHVVALUEFOUND:
charlesmn	0:3ac96e360672	4387	case VL53L1_DEVICEERROR_USERROICLIP:
charlesmn	0:3ac96e360672	4388	case VL53L1_DEVICEERROR_MULTCLIPFAIL:
charlesmn	0:3ac96e360672	4389
charlesmn	0:3ac96e360672	4390	presults->device_status = (pdata->result__range_status &
charlesmn	0:3ac96e360672	4391	VL53L1_RANGE_STATUS__RANGE_STATUS_MASK);
charlesmn	0:3ac96e360672	4392
charlesmn	0:3ac96e360672	4393	status = VL53L1_ERROR_RANGE_ERROR;
charlesmn	0:3ac96e360672	4394
charlesmn	0:3ac96e360672	4395	break;
charlesmn	0:3ac96e360672	4396
charlesmn	0:3ac96e360672	4397	}
charlesmn	0:3ac96e360672	4398
charlesmn	0:3ac96e360672	4399	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4400
charlesmn	0:3ac96e360672	4401	return status;
charlesmn	0:3ac96e360672	4402	}
charlesmn	0:3ac96e360672	4403
charlesmn	0:3ac96e360672	4404
charlesmn	0:3ac96e360672	4405	void VL53L1_copy_sys_and_core_results_to_range_results(
charlesmn	0:3ac96e360672	4406	int32_t gain_factor,
charlesmn	0:3ac96e360672	4407	VL53L1_system_results_t *psys,
charlesmn	0:3ac96e360672	4408	VL53L1_core_results_t *pcore,
charlesmn	0:3ac96e360672	4409	VL53L1_range_results_t *presults)
charlesmn	0:3ac96e360672	4410	{
charlesmn	0:3ac96e360672	4411	uint8_t i = 0;
charlesmn	0:3ac96e360672	4412
charlesmn	0:3ac96e360672	4413	VL53L1_range_data_t *pdata;
charlesmn	0:3ac96e360672	4414	int32_t range_mm = 0;
charlesmn	0:3ac96e360672	4415	uint32_t tmpu32 = 0;
charlesmn	0:3ac96e360672	4416	uint16_t rpscr_crosstalk_corrected_mcps_sd0;
charlesmn	0:3ac96e360672	4417	uint16_t rmmo_effective_spads_sd0;
charlesmn	0:3ac96e360672	4418	uint16_t rmmi_effective_spads_sd0;
charlesmn	0:3ac96e360672	4419
charlesmn	0:3ac96e360672	4420	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4421
charlesmn	0:3ac96e360672	4422
charlesmn	0:3ac96e360672	4423
charlesmn	0:3ac96e360672	4424	presults->zone_id = 0;
charlesmn	0:3ac96e360672	4425	presults->stream_count = psys->result__stream_count;
charlesmn	0:3ac96e360672	4426	presults->wrap_dmax_mm = 0;
charlesmn	0:3ac96e360672	4427	presults->max_results = VL53L1_MAX_RANGE_RESULTS;
charlesmn	0:3ac96e360672	4428	presults->active_results = 1;
charlesmn	0:3ac96e360672	4429	rpscr_crosstalk_corrected_mcps_sd0 =
charlesmn	0:3ac96e360672	4430	psys->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0;
charlesmn	0:3ac96e360672	4431	rmmo_effective_spads_sd0 =
charlesmn	0:3ac96e360672	4432	psys->result__mm_outer_actual_effective_spads_sd0;
charlesmn	0:3ac96e360672	4433	rmmi_effective_spads_sd0 =
charlesmn	0:3ac96e360672	4434	psys->result__mm_inner_actual_effective_spads_sd0;
charlesmn	0:3ac96e360672	4435
charlesmn	0:3ac96e360672	4436
charlesmn	0:3ac96e360672	4437	for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++)
charlesmn	0:3ac96e360672	4438	presults->VL53L1_p_007[i] = 0;
charlesmn	0:3ac96e360672	4439
charlesmn	0:3ac96e360672	4440	pdata = &(presults->VL53L1_p_002[0]);
charlesmn	0:3ac96e360672	4441
charlesmn	0:3ac96e360672	4442	for (i = 0; i < 2; i++) {
charlesmn	0:3ac96e360672	4443
charlesmn	0:3ac96e360672	4444	pdata->range_id = i;
charlesmn	0:3ac96e360672	4445	pdata->time_stamp = 0;
charlesmn	0:3ac96e360672	4446
charlesmn	0:3ac96e360672	4447	if ((psys->result__stream_count == 0) &&
charlesmn	0:3ac96e360672	4448	((psys->result__range_status &
charlesmn	0:3ac96e360672	4449	VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) ==
charlesmn	0:3ac96e360672	4450	VL53L1_DEVICEERROR_RANGECOMPLETE)) {
charlesmn	0:3ac96e360672	4451	pdata->range_status =
charlesmn	0:3ac96e360672	4452	VL53L1_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK;
charlesmn	0:3ac96e360672	4453	} else {
charlesmn	0:3ac96e360672	4454	pdata->range_status =
charlesmn	0:3ac96e360672	4455	psys->result__range_status &
charlesmn	0:3ac96e360672	4456	VL53L1_RANGE_STATUS__RANGE_STATUS_MASK;
charlesmn	0:3ac96e360672	4457	}
charlesmn	0:3ac96e360672	4458
charlesmn	0:3ac96e360672	4459	pdata->VL53L1_p_015 = 0;
charlesmn	0:3ac96e360672	4460	pdata->VL53L1_p_022 = 0;
charlesmn	0:3ac96e360672	4461	pdata->VL53L1_p_025 = 0;
charlesmn	0:3ac96e360672	4462	pdata->VL53L1_p_026 = 0;
charlesmn	0:3ac96e360672	4463	pdata->VL53L1_p_016 = 0;
charlesmn	0:3ac96e360672	4464	pdata->VL53L1_p_027 = 0;
charlesmn	0:3ac96e360672	4465
charlesmn	0:3ac96e360672	4466	switch (i) {
charlesmn	0:3ac96e360672	4467
charlesmn	0:3ac96e360672	4468	case 0:
charlesmn	0:3ac96e360672	4469	if (psys->result__report_status ==
charlesmn	0:3ac96e360672	4470	VL53L1_DEVICEREPORTSTATUS_MM1)
charlesmn	0:3ac96e360672	4471	pdata->VL53L1_p_006 =
charlesmn	0:3ac96e360672	4472	rmmi_effective_spads_sd0;
charlesmn	0:3ac96e360672	4473	else if (psys->result__report_status ==
charlesmn	0:3ac96e360672	4474	VL53L1_DEVICEREPORTSTATUS_MM2)
charlesmn	0:3ac96e360672	4475	pdata->VL53L1_p_006 =
charlesmn	0:3ac96e360672	4476	rmmo_effective_spads_sd0;
charlesmn	0:3ac96e360672	4477	else
charlesmn	0:3ac96e360672	4478	pdata->VL53L1_p_006 =
charlesmn	0:3ac96e360672	4479	psys->result__dss_actual_effective_spads_sd0;
charlesmn	0:3ac96e360672	4480
charlesmn	0:3ac96e360672	4481	pdata->peak_signal_count_rate_mcps =
charlesmn	0:3ac96e360672	4482	rpscr_crosstalk_corrected_mcps_sd0;
charlesmn	0:3ac96e360672	4483	pdata->avg_signal_count_rate_mcps =
charlesmn	0:3ac96e360672	4484	psys->result__avg_signal_count_rate_mcps_sd0;
charlesmn	0:3ac96e360672	4485	pdata->ambient_count_rate_mcps =
charlesmn	0:3ac96e360672	4486	psys->result__ambient_count_rate_mcps_sd0;
charlesmn	0:3ac96e360672	4487
charlesmn	0:3ac96e360672	4488
charlesmn	0:3ac96e360672	4489
charlesmn	0:3ac96e360672	4490
charlesmn	0:3ac96e360672	4491	tmpu32 = ((uint32_t)psys->result__sigma_sd0 << 5);
charlesmn	0:3ac96e360672	4492	if (tmpu32 > 0xFFFF)
charlesmn	0:3ac96e360672	4493	tmpu32 = 0xFFFF;
charlesmn	0:3ac96e360672	4494
charlesmn	0:3ac96e360672	4495	pdata->VL53L1_p_005 = (uint16_t)tmpu32;
charlesmn	0:3ac96e360672	4496
charlesmn	0:3ac96e360672	4497
charlesmn	0:3ac96e360672	4498
charlesmn	0:3ac96e360672	4499	pdata->VL53L1_p_014 =
charlesmn	0:3ac96e360672	4500	psys->result__phase_sd0;
charlesmn	0:3ac96e360672	4501
charlesmn	0:3ac96e360672	4502	range_mm = (int32_t)(
charlesmn	0:3ac96e360672	4503	psys->result__final_crosstalk_corrected_range_mm_sd0);
charlesmn	0:3ac96e360672	4504
charlesmn	0:3ac96e360672	4505
charlesmn	0:3ac96e360672	4506	range_mm *= gain_factor;
charlesmn	0:3ac96e360672	4507	range_mm += 0x0400;
charlesmn	0:3ac96e360672	4508	range_mm /= 0x0800;
charlesmn	0:3ac96e360672	4509
charlesmn	0:3ac96e360672	4510	pdata->median_range_mm = (int16_t)range_mm;
charlesmn	0:3ac96e360672	4511
charlesmn	0:3ac96e360672	4512	pdata->VL53L1_p_021 =
charlesmn	0:3ac96e360672	4513	pcore->result_core__ranging_total_events_sd0;
charlesmn	0:3ac96e360672	4514	pdata->VL53L1_p_013 =
charlesmn	0:3ac96e360672	4515	pcore->result_core__signal_total_events_sd0;
charlesmn	0:3ac96e360672	4516	pdata->total_periods_elapsed =
charlesmn	0:3ac96e360672	4517	pcore->result_core__total_periods_elapsed_sd0;
charlesmn	0:3ac96e360672	4518	pdata->VL53L1_p_020 =
charlesmn	0:3ac96e360672	4519	pcore->result_core__ambient_window_events_sd0;
charlesmn	0:3ac96e360672	4520
charlesmn	0:3ac96e360672	4521	break;
charlesmn	0:3ac96e360672	4522	case 1:
charlesmn	0:3ac96e360672	4523
charlesmn	0:3ac96e360672	4524	pdata->VL53L1_p_006 =
charlesmn	0:3ac96e360672	4525	psys->result__dss_actual_effective_spads_sd1;
charlesmn	0:3ac96e360672	4526	pdata->peak_signal_count_rate_mcps =
charlesmn	0:3ac96e360672	4527	psys->result__peak_signal_count_rate_mcps_sd1;
charlesmn	0:3ac96e360672	4528	pdata->avg_signal_count_rate_mcps =
charlesmn	0:3ac96e360672	4529	0xFFFF;
charlesmn	0:3ac96e360672	4530	pdata->ambient_count_rate_mcps =
charlesmn	0:3ac96e360672	4531	psys->result__ambient_count_rate_mcps_sd1;
charlesmn	0:3ac96e360672	4532
charlesmn	0:3ac96e360672	4533
charlesmn	0:3ac96e360672	4534
charlesmn	0:3ac96e360672	4535
charlesmn	0:3ac96e360672	4536	tmpu32 = ((uint32_t)psys->result__sigma_sd1 << 5);
charlesmn	0:3ac96e360672	4537	if (tmpu32 > 0xFFFF)
charlesmn	0:3ac96e360672	4538	tmpu32 = 0xFFFF;
charlesmn	0:3ac96e360672	4539
charlesmn	0:3ac96e360672	4540	pdata->VL53L1_p_005 = (uint16_t)tmpu32;
charlesmn	0:3ac96e360672	4541
charlesmn	0:3ac96e360672	4542
charlesmn	0:3ac96e360672	4543
charlesmn	0:3ac96e360672	4544	pdata->VL53L1_p_014 =
charlesmn	0:3ac96e360672	4545	psys->result__phase_sd1;
charlesmn	0:3ac96e360672	4546
charlesmn	0:3ac96e360672	4547	range_mm = (int32_t)(
charlesmn	0:3ac96e360672	4548	psys->result__final_crosstalk_corrected_range_mm_sd1);
charlesmn	0:3ac96e360672	4549
charlesmn	0:3ac96e360672	4550
charlesmn	0:3ac96e360672	4551	range_mm *= gain_factor;
charlesmn	0:3ac96e360672	4552	range_mm += 0x0400;
charlesmn	0:3ac96e360672	4553	range_mm /= 0x0800;
charlesmn	0:3ac96e360672	4554
charlesmn	0:3ac96e360672	4555	pdata->median_range_mm = (int16_t)range_mm;
charlesmn	0:3ac96e360672	4556
charlesmn	0:3ac96e360672	4557	pdata->VL53L1_p_021 =
charlesmn	0:3ac96e360672	4558	pcore->result_core__ranging_total_events_sd1;
charlesmn	0:3ac96e360672	4559	pdata->VL53L1_p_013 =
charlesmn	0:3ac96e360672	4560	pcore->result_core__signal_total_events_sd1;
charlesmn	0:3ac96e360672	4561	pdata->total_periods_elapsed =
charlesmn	0:3ac96e360672	4562	pcore->result_core__total_periods_elapsed_sd1;
charlesmn	0:3ac96e360672	4563	pdata->VL53L1_p_020 =
charlesmn	0:3ac96e360672	4564	pcore->result_core__ambient_window_events_sd1;
charlesmn	0:3ac96e360672	4565
charlesmn	0:3ac96e360672	4566	break;
charlesmn	0:3ac96e360672	4567	}
charlesmn	0:3ac96e360672	4568
charlesmn	0:3ac96e360672	4569
charlesmn	0:3ac96e360672	4570	pdata->VL53L1_p_028 = pdata->VL53L1_p_014;
charlesmn	0:3ac96e360672	4571	pdata->VL53L1_p_029 = pdata->VL53L1_p_014;
charlesmn	0:3ac96e360672	4572	pdata->min_range_mm = pdata->median_range_mm;
charlesmn	0:3ac96e360672	4573	pdata->max_range_mm = pdata->median_range_mm;
charlesmn	0:3ac96e360672	4574
charlesmn	0:3ac96e360672	4575	pdata++;
charlesmn	0:3ac96e360672	4576	}
charlesmn	0:3ac96e360672	4577
charlesmn	0:3ac96e360672	4578
charlesmn	0:3ac96e360672	4579
charlesmn	0:3ac96e360672	4580	presults->device_status = VL53L1_DEVICEERROR_NOUPDATE;
charlesmn	0:3ac96e360672	4581
charlesmn	0:3ac96e360672	4582
charlesmn	0:3ac96e360672	4583
charlesmn	0:3ac96e360672	4584	switch (psys->result__range_status &
charlesmn	0:3ac96e360672	4585	VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) {
charlesmn	0:3ac96e360672	4586
charlesmn	0:3ac96e360672	4587	case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE:
charlesmn	0:3ac96e360672	4588	case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE:
charlesmn	0:3ac96e360672	4589	case VL53L1_DEVICEERROR_NOVHVVALUEFOUND:
charlesmn	0:3ac96e360672	4590	case VL53L1_DEVICEERROR_USERROICLIP:
charlesmn	0:3ac96e360672	4591	case VL53L1_DEVICEERROR_MULTCLIPFAIL:
charlesmn	0:3ac96e360672	4592
charlesmn	0:3ac96e360672	4593	presults->device_status = (psys->result__range_status &
charlesmn	0:3ac96e360672	4594	VL53L1_RANGE_STATUS__RANGE_STATUS_MASK);
charlesmn	0:3ac96e360672	4595
charlesmn	0:3ac96e360672	4596	presults->VL53L1_p_002[0].range_status =
charlesmn	0:3ac96e360672	4597	VL53L1_DEVICEERROR_NOUPDATE;
charlesmn	0:3ac96e360672	4598	break;
charlesmn	0:3ac96e360672	4599
charlesmn	0:3ac96e360672	4600	}
charlesmn	0:3ac96e360672	4601
charlesmn	0:3ac96e360672	4602	LOG_FUNCTION_END(0);
charlesmn	0:3ac96e360672	4603	}
charlesmn	0:3ac96e360672	4604
charlesmn	0:3ac96e360672	4605
charlesmn	0:3ac96e360672	4606	VL53L1_Error VL53L1_set_zone_dss_config(
charlesmn	0:3ac96e360672	4607	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4608	VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg)
charlesmn	0:3ac96e360672	4609	{
charlesmn	0:3ac96e360672	4610
charlesmn	0:3ac96e360672	4611
charlesmn	0:3ac96e360672	4612
charlesmn	0:3ac96e360672	4613	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4614
charlesmn	0:3ac96e360672	4615	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4616	VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state);
charlesmn	0:3ac96e360672	4617
charlesmn	0:3ac96e360672	4618	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4619
charlesmn	0:3ac96e360672	4620	if (pstate->cfg_device_state ==
charlesmn	0:3ac96e360672	4621	VL53L1_DEVICESTATE_RANGING_DSS_MANUAL) {
charlesmn	0:3ac96e360672	4622	pdev->gen_cfg.dss_config__roi_mode_control =
charlesmn	0:3ac96e360672	4623	VL53L1_DSS_CONTROL__MODE_EFFSPADS;
charlesmn	0:3ac96e360672	4624	pdev->gen_cfg.dss_config__manual_effective_spads_select =
charlesmn	0:3ac96e360672	4625	pzone_dyn_cfg->dss_requested_effective_spad_count;
charlesmn	0:3ac96e360672	4626	} else {
charlesmn	0:3ac96e360672	4627	pdev->gen_cfg.dss_config__roi_mode_control =
charlesmn	0:3ac96e360672	4628	VL53L1_DSS_CONTROL__MODE_TARGET_RATE;
charlesmn	0:3ac96e360672	4629	}
charlesmn	0:3ac96e360672	4630
charlesmn	0:3ac96e360672	4631	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4632	return status;
charlesmn	0:3ac96e360672	4633	}
charlesmn	0:3ac96e360672	4634
charlesmn	0:3ac96e360672	4635
charlesmn	0:3ac96e360672	4636	VL53L1_Error VL53L1_calc_ambient_dmax(
charlesmn	0:3ac96e360672	4637	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4638	uint16_t target_reflectance,
charlesmn	0:3ac96e360672	4639	int16_t *pambient_dmax_mm)
charlesmn	0:3ac96e360672	4640	{
charlesmn	0:3ac96e360672	4641	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4642
charlesmn	0:3ac96e360672	4643	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	4644	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4645
charlesmn	0:3ac96e360672	4646	VL53L1_dmax_calibration_data_t dmax_cal;
charlesmn	0:3ac96e360672	4647	VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal;
charlesmn	0:3ac96e360672	4648
charlesmn	0:3ac96e360672	4649	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4650
charlesmn	0:3ac96e360672	4651
charlesmn	0:3ac96e360672	4652
charlesmn	0:3ac96e360672	4653	status =
charlesmn	0:3ac96e360672	4654	VL53L1_get_dmax_calibration_data(
charlesmn	0:3ac96e360672	4655	Dev,
charlesmn	0:3ac96e360672	4656	pdev->debug_mode,
charlesmn	0:3ac96e360672	4657	pdev->ll_state.rd_zone_id,
charlesmn	0:3ac96e360672	4658	pdmax_cal);
charlesmn	0:3ac96e360672	4659
charlesmn	0:3ac96e360672	4660
charlesmn	0:3ac96e360672	4661
charlesmn	0:3ac96e360672	4662	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	4663	status =
charlesmn	0:3ac96e360672	4664	VL53L1_ipp_hist_ambient_dmax(
charlesmn	0:3ac96e360672	4665	Dev,
charlesmn	0:3ac96e360672	4666	target_reflectance,
charlesmn	0:3ac96e360672	4667	&(pdev->fmt_dmax_cal),
charlesmn	0:3ac96e360672	4668	&(pdev->dmax_cfg),
charlesmn	0:3ac96e360672	4669	&(pdev->hist_data),
charlesmn	0:3ac96e360672	4670	pambient_dmax_mm);
charlesmn	0:3ac96e360672	4671
charlesmn	0:3ac96e360672	4672	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4673
charlesmn	0:3ac96e360672	4674	return status;
charlesmn	0:3ac96e360672	4675	}
charlesmn	0:3ac96e360672	4676
charlesmn	0:3ac96e360672	4677
charlesmn	0:3ac96e360672	4678
charlesmn	0:3ac96e360672	4679	VL53L1_Error VL53L1_set_GPIO_interrupt_config(
charlesmn	0:3ac96e360672	4680	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4681	VL53L1_GPIO_Interrupt_Mode intr_mode_distance,
charlesmn	0:3ac96e360672	4682	VL53L1_GPIO_Interrupt_Mode intr_mode_rate,
charlesmn	0:3ac96e360672	4683	uint8_t intr_new_measure_ready,
charlesmn	0:3ac96e360672	4684	uint8_t intr_no_target,
charlesmn	0:3ac96e360672	4685	uint8_t intr_combined_mode,
charlesmn	0:3ac96e360672	4686	uint16_t thresh_distance_high,
charlesmn	0:3ac96e360672	4687	uint16_t thresh_distance_low,
charlesmn	0:3ac96e360672	4688	uint16_t thresh_rate_high,
charlesmn	0:3ac96e360672	4689	uint16_t thresh_rate_low
charlesmn	0:3ac96e360672	4690	)
charlesmn	0:3ac96e360672	4691	{
charlesmn	0:3ac96e360672	4692	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4693
charlesmn	0:3ac96e360672	4694	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4695	VL53L1_GPIO_interrupt_config_t *pintconf =
charlesmn	0:3ac96e360672	4696	&(pdev->gpio_interrupt_config);
charlesmn	0:3ac96e360672	4697
charlesmn	0:3ac96e360672	4698	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4699
charlesmn	0:3ac96e360672	4700
charlesmn	0:3ac96e360672	4701	pintconf->intr_mode_distance = intr_mode_distance;
charlesmn	0:3ac96e360672	4702	pintconf->intr_mode_rate = intr_mode_rate;
charlesmn	0:3ac96e360672	4703	pintconf->intr_new_measure_ready = intr_new_measure_ready;
charlesmn	0:3ac96e360672	4704	pintconf->intr_no_target = intr_no_target;
charlesmn	0:3ac96e360672	4705	pintconf->intr_combined_mode = intr_combined_mode;
charlesmn	0:3ac96e360672	4706	pintconf->threshold_distance_high = thresh_distance_high;
charlesmn	0:3ac96e360672	4707	pintconf->threshold_distance_low = thresh_distance_low;
charlesmn	0:3ac96e360672	4708	pintconf->threshold_rate_high = thresh_rate_high;
charlesmn	0:3ac96e360672	4709	pintconf->threshold_rate_low = thresh_rate_low;
charlesmn	0:3ac96e360672	4710
charlesmn	0:3ac96e360672	4711
charlesmn	0:3ac96e360672	4712	pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn	0:3ac96e360672	4713	VL53L1_encode_GPIO_interrupt_config(pintconf);
charlesmn	0:3ac96e360672	4714
charlesmn	0:3ac96e360672	4715
charlesmn	0:3ac96e360672	4716
charlesmn	0:3ac96e360672	4717	status = VL53L1_set_GPIO_thresholds_from_struct(
charlesmn	0:3ac96e360672	4718	Dev,
charlesmn	0:3ac96e360672	4719	pintconf);
charlesmn	0:3ac96e360672	4720
charlesmn	0:3ac96e360672	4721	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4722	return status;
charlesmn	0:3ac96e360672	4723	}
charlesmn	0:3ac96e360672	4724
charlesmn	0:3ac96e360672	4725
charlesmn	0:3ac96e360672	4726
charlesmn	0:3ac96e360672	4727	VL53L1_Error VL53L1_set_GPIO_interrupt_config_struct(
charlesmn	0:3ac96e360672	4728	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4729	VL53L1_GPIO_interrupt_config_t intconf)
charlesmn	0:3ac96e360672	4730	{
charlesmn	0:3ac96e360672	4731	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4732
charlesmn	0:3ac96e360672	4733	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4734	VL53L1_GPIO_interrupt_config_t *pintconf =
charlesmn	0:3ac96e360672	4735	&(pdev->gpio_interrupt_config);
charlesmn	0:3ac96e360672	4736
charlesmn	0:3ac96e360672	4737	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4738
charlesmn	0:3ac96e360672	4739
charlesmn	0:3ac96e360672	4740	memcpy(pintconf, &(intconf), sizeof(VL53L1_GPIO_interrupt_config_t));
charlesmn	0:3ac96e360672	4741
charlesmn	0:3ac96e360672	4742
charlesmn	0:3ac96e360672	4743	pdev->gen_cfg.system__interrupt_config_gpio =
charlesmn	0:3ac96e360672	4744	VL53L1_encode_GPIO_interrupt_config(pintconf);
charlesmn	0:3ac96e360672	4745
charlesmn	0:3ac96e360672	4746
charlesmn	0:3ac96e360672	4747	status = VL53L1_set_GPIO_thresholds_from_struct(
charlesmn	0:3ac96e360672	4748	Dev,
charlesmn	0:3ac96e360672	4749	pintconf);
charlesmn	0:3ac96e360672	4750
charlesmn	0:3ac96e360672	4751	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4752	return status;
charlesmn	0:3ac96e360672	4753	}
charlesmn	0:3ac96e360672	4754
charlesmn	0:3ac96e360672	4755
charlesmn	0:3ac96e360672	4756
charlesmn	0:3ac96e360672	4757	VL53L1_Error VL53L1_get_GPIO_interrupt_config(
charlesmn	0:3ac96e360672	4758	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4759	VL53L1_GPIO_interrupt_config_t *pintconf)
charlesmn	0:3ac96e360672	4760	{
charlesmn	0:3ac96e360672	4761	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4762
charlesmn	0:3ac96e360672	4763	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4764
charlesmn	0:3ac96e360672	4765	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4766
charlesmn	0:3ac96e360672	4767
charlesmn	0:3ac96e360672	4768	pdev->gpio_interrupt_config = VL53L1_decode_GPIO_interrupt_config(
charlesmn	0:3ac96e360672	4769	pdev->gen_cfg.system__interrupt_config_gpio);
charlesmn	0:3ac96e360672	4770
charlesmn	0:3ac96e360672	4771
charlesmn	0:3ac96e360672	4772	pdev->gpio_interrupt_config.threshold_distance_high =
charlesmn	0:3ac96e360672	4773	pdev->dyn_cfg.system__thresh_high;
charlesmn	0:3ac96e360672	4774	pdev->gpio_interrupt_config.threshold_distance_low =
charlesmn	0:3ac96e360672	4775	pdev->dyn_cfg.system__thresh_low;
charlesmn	0:3ac96e360672	4776
charlesmn	0:3ac96e360672	4777	pdev->gpio_interrupt_config.threshold_rate_high =
charlesmn	0:3ac96e360672	4778	pdev->gen_cfg.system__thresh_rate_high;
charlesmn	0:3ac96e360672	4779	pdev->gpio_interrupt_config.threshold_rate_low =
charlesmn	0:3ac96e360672	4780	pdev->gen_cfg.system__thresh_rate_low;
charlesmn	0:3ac96e360672	4781
charlesmn	0:3ac96e360672	4782	if (pintconf == &(pdev->gpio_interrupt_config)) {
charlesmn	0:3ac96e360672	4783
charlesmn	0:3ac96e360672	4784	} else {
charlesmn	0:3ac96e360672	4785
charlesmn	0:3ac96e360672	4786
charlesmn	0:3ac96e360672	4787	memcpy(pintconf, &(pdev->gpio_interrupt_config),
charlesmn	0:3ac96e360672	4788	sizeof(VL53L1_GPIO_interrupt_config_t));
charlesmn	0:3ac96e360672	4789	}
charlesmn	0:3ac96e360672	4790
charlesmn	0:3ac96e360672	4791	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4792	return status;
charlesmn	0:3ac96e360672	4793	}
charlesmn	0:3ac96e360672	4794
charlesmn	0:3ac96e360672	4795
charlesmn	0:3ac96e360672	4796	VL53L1_Error VL53L1_set_dmax_mode(
charlesmn	0:3ac96e360672	4797	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4798	VL53L1_DeviceDmaxMode dmax_mode)
charlesmn	0:3ac96e360672	4799	{
charlesmn	0:3ac96e360672	4800
charlesmn	0:3ac96e360672	4801
charlesmn	0:3ac96e360672	4802	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4803
charlesmn	0:3ac96e360672	4804	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4805
charlesmn	0:3ac96e360672	4806	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4807
charlesmn	0:3ac96e360672	4808	pdev->dmax_mode = dmax_mode;
charlesmn	0:3ac96e360672	4809
charlesmn	0:3ac96e360672	4810	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4811
charlesmn	0:3ac96e360672	4812	return status;
charlesmn	0:3ac96e360672	4813	}
charlesmn	0:3ac96e360672	4814
charlesmn	0:3ac96e360672	4815
charlesmn	0:3ac96e360672	4816	VL53L1_Error VL53L1_get_dmax_mode(
charlesmn	0:3ac96e360672	4817	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4818	VL53L1_DeviceDmaxMode *pdmax_mode)
charlesmn	0:3ac96e360672	4819	{
charlesmn	0:3ac96e360672	4820
charlesmn	0:3ac96e360672	4821
charlesmn	0:3ac96e360672	4822	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4823
charlesmn	0:3ac96e360672	4824	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4825
charlesmn	0:3ac96e360672	4826	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4827
charlesmn	0:3ac96e360672	4828	*pdmax_mode = pdev->dmax_mode;
charlesmn	0:3ac96e360672	4829
charlesmn	0:3ac96e360672	4830	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4831
charlesmn	0:3ac96e360672	4832	return status;
charlesmn	0:3ac96e360672	4833	}
charlesmn	0:3ac96e360672	4834
charlesmn	0:3ac96e360672	4835
charlesmn	0:3ac96e360672	4836	VL53L1_Error VL53L1_get_dmax_calibration_data(
charlesmn	0:3ac96e360672	4837	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4838	VL53L1_DeviceDmaxMode dmax_mode,
charlesmn	0:3ac96e360672	4839	uint8_t zone_id,
charlesmn	0:3ac96e360672	4840	VL53L1_dmax_calibration_data_t *pdmax_cal)
charlesmn	0:3ac96e360672	4841	{
charlesmn	0:3ac96e360672	4842
charlesmn	0:3ac96e360672	4843
charlesmn	0:3ac96e360672	4844	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4845
charlesmn	0:3ac96e360672	4846	VL53L1_LLDriverData_t *pdev =
charlesmn	0:3ac96e360672	4847	VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4848	VL53L1_LLDriverResults_t *pres =
charlesmn	0:3ac96e360672	4849	VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	4850
charlesmn	0:3ac96e360672	4851	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4852
charlesmn	0:3ac96e360672	4853	switch (dmax_mode) {
charlesmn	0:3ac96e360672	4854
charlesmn	0:3ac96e360672	4855	case VL53L1_DEVICEDMAXMODE__PER_ZONE_CAL_DATA:
charlesmn	0:3ac96e360672	4856	pdmax_cal->ref__actual_effective_spads =
charlesmn	0:3ac96e360672	4857	(uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].effective_spads;
charlesmn	0:3ac96e360672	4858	pdmax_cal->ref__peak_signal_count_rate_mcps =
charlesmn	0:3ac96e360672	4859	(uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].peak_rate_mcps;
charlesmn	0:3ac96e360672	4860	pdmax_cal->ref__distance_mm =
charlesmn	0:3ac96e360672	4861	pres->zone_cal.cal_distance_mm;
charlesmn	0:3ac96e360672	4862	pdmax_cal->ref_reflectance_pc =
charlesmn	0:3ac96e360672	4863	pres->zone_cal.cal_reflectance_pc;
charlesmn	0:3ac96e360672	4864	pdmax_cal->coverglass_transmission = 0x0100;
charlesmn	0:3ac96e360672	4865	break;
charlesmn	0:3ac96e360672	4866
charlesmn	0:3ac96e360672	4867	case VL53L1_DEVICEDMAXMODE__CUST_CAL_DATA:
charlesmn	0:3ac96e360672	4868	memcpy(
charlesmn	0:3ac96e360672	4869	pdmax_cal,
charlesmn	0:3ac96e360672	4870	&(pdev->cust_dmax_cal),
charlesmn	0:3ac96e360672	4871	sizeof(VL53L1_dmax_calibration_data_t));
charlesmn	0:3ac96e360672	4872	break;
charlesmn	0:3ac96e360672	4873
charlesmn	0:3ac96e360672	4874	case VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA:
charlesmn	0:3ac96e360672	4875	memcpy(
charlesmn	0:3ac96e360672	4876	pdmax_cal,
charlesmn	0:3ac96e360672	4877	&(pdev->fmt_dmax_cal),
charlesmn	0:3ac96e360672	4878	sizeof(VL53L1_dmax_calibration_data_t));
charlesmn	0:3ac96e360672	4879	break;
charlesmn	0:3ac96e360672	4880
charlesmn	0:3ac96e360672	4881	default:
charlesmn	0:3ac96e360672	4882	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	4883	break;
charlesmn	0:3ac96e360672	4884
charlesmn	0:3ac96e360672	4885	}
charlesmn	0:3ac96e360672	4886
charlesmn	0:3ac96e360672	4887	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4888
charlesmn	0:3ac96e360672	4889	return status;
charlesmn	0:3ac96e360672	4890	}
charlesmn	0:3ac96e360672	4891
charlesmn	0:3ac96e360672	4892
charlesmn	0:3ac96e360672	4893	VL53L1_Error VL53L1_set_hist_dmax_config(
charlesmn	0:3ac96e360672	4894	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4895	VL53L1_hist_gen3_dmax_config_t *pdmax_cfg)
charlesmn	0:3ac96e360672	4896	{
charlesmn	0:3ac96e360672	4897
charlesmn	0:3ac96e360672	4898
charlesmn	0:3ac96e360672	4899
charlesmn	0:3ac96e360672	4900	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4901
charlesmn	0:3ac96e360672	4902	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4903
charlesmn	0:3ac96e360672	4904	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4905
charlesmn	0:3ac96e360672	4906
charlesmn	0:3ac96e360672	4907	memcpy(
charlesmn	0:3ac96e360672	4908	&(pdev->dmax_cfg),
charlesmn	0:3ac96e360672	4909	pdmax_cfg,
charlesmn	0:3ac96e360672	4910	sizeof(VL53L1_hist_gen3_dmax_config_t));
charlesmn	0:3ac96e360672	4911
charlesmn	0:3ac96e360672	4912	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4913
charlesmn	0:3ac96e360672	4914	return status;
charlesmn	0:3ac96e360672	4915	}
charlesmn	0:3ac96e360672	4916
charlesmn	0:3ac96e360672	4917
charlesmn	0:3ac96e360672	4918	VL53L1_Error VL53L1_get_hist_dmax_config(
charlesmn	0:3ac96e360672	4919	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4920	VL53L1_hist_gen3_dmax_config_t *pdmax_cfg)
charlesmn	0:3ac96e360672	4921	{
charlesmn	0:3ac96e360672	4922
charlesmn	0:3ac96e360672	4923
charlesmn	0:3ac96e360672	4924
charlesmn	0:3ac96e360672	4925	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4926
charlesmn	0:3ac96e360672	4927	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4928
charlesmn	0:3ac96e360672	4929	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4930
charlesmn	0:3ac96e360672	4931
charlesmn	0:3ac96e360672	4932	memcpy(
charlesmn	0:3ac96e360672	4933	pdmax_cfg,
charlesmn	0:3ac96e360672	4934	&(pdev->dmax_cfg),
charlesmn	0:3ac96e360672	4935	sizeof(VL53L1_hist_gen3_dmax_config_t));
charlesmn	0:3ac96e360672	4936
charlesmn	0:3ac96e360672	4937	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4938
charlesmn	0:3ac96e360672	4939	return status;
charlesmn	0:3ac96e360672	4940	}
charlesmn	0:3ac96e360672	4941
charlesmn	0:3ac96e360672	4942
charlesmn	0:3ac96e360672	4943	VL53L1_Error VL53L1_set_offset_calibration_mode(
charlesmn	0:3ac96e360672	4944	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4945	VL53L1_OffsetCalibrationMode offset_cal_mode)
charlesmn	0:3ac96e360672	4946	{
charlesmn	0:3ac96e360672	4947
charlesmn	0:3ac96e360672	4948
charlesmn	0:3ac96e360672	4949
charlesmn	0:3ac96e360672	4950	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4951
charlesmn	0:3ac96e360672	4952	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4953
charlesmn	0:3ac96e360672	4954	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4955
charlesmn	0:3ac96e360672	4956	pdev->offset_calibration_mode = offset_cal_mode;
charlesmn	0:3ac96e360672	4957
charlesmn	0:3ac96e360672	4958	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4959
charlesmn	0:3ac96e360672	4960	return status;
charlesmn	0:3ac96e360672	4961	}
charlesmn	0:3ac96e360672	4962
charlesmn	0:3ac96e360672	4963
charlesmn	0:3ac96e360672	4964	VL53L1_Error VL53L1_get_offset_calibration_mode(
charlesmn	0:3ac96e360672	4965	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4966	VL53L1_OffsetCalibrationMode *poffset_cal_mode)
charlesmn	0:3ac96e360672	4967	{
charlesmn	0:3ac96e360672	4968
charlesmn	0:3ac96e360672	4969
charlesmn	0:3ac96e360672	4970
charlesmn	0:3ac96e360672	4971	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4972
charlesmn	0:3ac96e360672	4973	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4974
charlesmn	0:3ac96e360672	4975	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4976
charlesmn	0:3ac96e360672	4977	*poffset_cal_mode = pdev->offset_calibration_mode;
charlesmn	0:3ac96e360672	4978
charlesmn	0:3ac96e360672	4979	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	4980
charlesmn	0:3ac96e360672	4981	return status;
charlesmn	0:3ac96e360672	4982	}
charlesmn	0:3ac96e360672	4983
charlesmn	0:3ac96e360672	4984
charlesmn	0:3ac96e360672	4985	VL53L1_Error VL53L1_set_offset_correction_mode(
charlesmn	0:3ac96e360672	4986	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	4987	VL53L1_OffsetCorrectionMode offset_cor_mode)
charlesmn	0:3ac96e360672	4988	{
charlesmn	0:3ac96e360672	4989
charlesmn	0:3ac96e360672	4990
charlesmn	0:3ac96e360672	4991
charlesmn	0:3ac96e360672	4992	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	4993
charlesmn	0:3ac96e360672	4994	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	4995
charlesmn	0:3ac96e360672	4996	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	4997
charlesmn	0:3ac96e360672	4998	pdev->offset_correction_mode = offset_cor_mode;
charlesmn	0:3ac96e360672	4999
charlesmn	0:3ac96e360672	5000	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	5001
charlesmn	0:3ac96e360672	5002	return status;
charlesmn	0:3ac96e360672	5003	}
charlesmn	0:3ac96e360672	5004
charlesmn	0:3ac96e360672	5005
charlesmn	0:3ac96e360672	5006	VL53L1_Error VL53L1_get_offset_correction_mode(
charlesmn	0:3ac96e360672	5007	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	5008	VL53L1_OffsetCorrectionMode *poffset_cor_mode)
charlesmn	0:3ac96e360672	5009	{
charlesmn	0:3ac96e360672	5010
charlesmn	0:3ac96e360672	5011
charlesmn	0:3ac96e360672	5012
charlesmn	0:3ac96e360672	5013	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	5014
charlesmn	0:3ac96e360672	5015	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	5016
charlesmn	0:3ac96e360672	5017	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	5018
charlesmn	0:3ac96e360672	5019	*poffset_cor_mode = pdev->offset_correction_mode;
charlesmn	0:3ac96e360672	5020
charlesmn	0:3ac96e360672	5021	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	5022
charlesmn	0:3ac96e360672	5023	return status;
charlesmn	0:3ac96e360672	5024	}
charlesmn	0:3ac96e360672	5025
charlesmn	0:3ac96e360672	5026
charlesmn	0:3ac96e360672	5027
charlesmn	0:3ac96e360672	5028
charlesmn	0:3ac96e360672	5029	VL53L1_Error VL53L1_set_zone_calibration_data(
charlesmn	0:3ac96e360672	5030	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	5031	VL53L1_zone_calibration_results_t *pzone_cal)
charlesmn	0:3ac96e360672	5032	{
charlesmn	0:3ac96e360672	5033
charlesmn	0:3ac96e360672	5034
charlesmn	0:3ac96e360672	5035
charlesmn	0:3ac96e360672	5036	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	5037
charlesmn	0:3ac96e360672	5038	VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	5039
charlesmn	0:3ac96e360672	5040	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	5041
charlesmn	0:3ac96e360672	5042	if (pzone_cal->struct_version !=
charlesmn	0:3ac96e360672	5043	VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION)
charlesmn	0:3ac96e360672	5044	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	5045
charlesmn	0:3ac96e360672	5046
charlesmn	0:3ac96e360672	5047	if (status == VL53L1_ERROR_NONE)
charlesmn	0:3ac96e360672	5048
charlesmn	0:3ac96e360672	5049	memcpy(
charlesmn	0:3ac96e360672	5050	&(pres->zone_cal),
charlesmn	0:3ac96e360672	5051	pzone_cal,
charlesmn	0:3ac96e360672	5052	sizeof(VL53L1_zone_calibration_results_t));
charlesmn	0:3ac96e360672	5053
charlesmn	0:3ac96e360672	5054	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	5055
charlesmn	0:3ac96e360672	5056	return status;
charlesmn	0:3ac96e360672	5057	}
charlesmn	0:3ac96e360672	5058
charlesmn	0:3ac96e360672	5059
charlesmn	0:3ac96e360672	5060	VL53L1_Error VL53L1_get_zone_calibration_data(
charlesmn	0:3ac96e360672	5061	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	5062	VL53L1_zone_calibration_results_t *pzone_cal)
charlesmn	0:3ac96e360672	5063	{
charlesmn	0:3ac96e360672	5064
charlesmn	0:3ac96e360672	5065
charlesmn	0:3ac96e360672	5066
charlesmn	0:3ac96e360672	5067	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	5068
charlesmn	0:3ac96e360672	5069	VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev);
charlesmn	0:3ac96e360672	5070
charlesmn	0:3ac96e360672	5071	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	5072
charlesmn	0:3ac96e360672	5073
charlesmn	0:3ac96e360672	5074	memcpy(
charlesmn	0:3ac96e360672	5075	pzone_cal,
charlesmn	0:3ac96e360672	5076	&(pres->zone_cal),
charlesmn	0:3ac96e360672	5077	sizeof(VL53L1_zone_calibration_results_t));
charlesmn	0:3ac96e360672	5078
charlesmn	0:3ac96e360672	5079	pzone_cal->struct_version =
charlesmn	0:3ac96e360672	5080	VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION;
charlesmn	0:3ac96e360672	5081
charlesmn	0:3ac96e360672	5082	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	5083
charlesmn	0:3ac96e360672	5084	return status;
charlesmn	0:3ac96e360672	5085	}
charlesmn	0:3ac96e360672	5086
charlesmn	0:3ac96e360672	5087
charlesmn	0:3ac96e360672	5088	VL53L1_Error VL53L1_get_tuning_debug_data(
charlesmn	0:3ac96e360672	5089	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	5090	VL53L1_tuning_parameters_t *ptun_data)
charlesmn	0:3ac96e360672	5091	{
charlesmn	0:3ac96e360672	5092
charlesmn	0:3ac96e360672	5093
charlesmn	0:3ac96e360672	5094	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	5095
charlesmn	0:3ac96e360672	5096	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	5097	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	5098	VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn	0:3ac96e360672	5099
charlesmn	0:3ac96e360672	5100	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	5101
charlesmn	0:3ac96e360672	5102	ptun_data->vl53l1_tuningparm_version =
charlesmn	0:3ac96e360672	5103	pdev->tuning_parms.tp_tuning_parm_version;
charlesmn	0:3ac96e360672	5104
charlesmn	0:3ac96e360672	5105	ptun_data->vl53l1_tuningparm_key_table_version =
charlesmn	0:3ac96e360672	5106	pdev->tuning_parms.tp_tuning_parm_key_table_version;
charlesmn	0:3ac96e360672	5107
charlesmn	0:3ac96e360672	5108
charlesmn	0:3ac96e360672	5109	ptun_data->vl53l1_tuningparm_lld_version =
charlesmn	0:3ac96e360672	5110	pdev->tuning_parms.tp_tuning_parm_lld_version;
charlesmn	0:3ac96e360672	5111
charlesmn	0:3ac96e360672	5112	ptun_data->vl53l1_tuningparm_hist_algo_select =
charlesmn	0:3ac96e360672	5113	pHP->hist_algo_select;
charlesmn	0:3ac96e360672	5114
charlesmn	0:3ac96e360672	5115	ptun_data->vl53l1_tuningparm_hist_target_order =
charlesmn	0:3ac96e360672	5116	pHP->hist_target_order;
charlesmn	0:3ac96e360672	5117
charlesmn	0:3ac96e360672	5118	ptun_data->vl53l1_tuningparm_hist_filter_woi_0 =
charlesmn	0:3ac96e360672	5119	pHP->filter_woi0;
charlesmn	0:3ac96e360672	5120
charlesmn	0:3ac96e360672	5121	ptun_data->vl53l1_tuningparm_hist_filter_woi_1 =
charlesmn	0:3ac96e360672	5122	pHP->filter_woi1;
charlesmn	0:3ac96e360672	5123
charlesmn	0:3ac96e360672	5124	ptun_data->vl53l1_tuningparm_hist_amb_est_method =
charlesmn	0:3ac96e360672	5125	pHP->hist_amb_est_method;
charlesmn	0:3ac96e360672	5126
charlesmn	0:3ac96e360672	5127	ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_0 =
charlesmn	0:3ac96e360672	5128	pHP->ambient_thresh_sigma0;
charlesmn	0:3ac96e360672	5129
charlesmn	0:3ac96e360672	5130	ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_1 =
charlesmn	0:3ac96e360672	5131	pHP->ambient_thresh_sigma1;
charlesmn	0:3ac96e360672	5132
charlesmn	0:3ac96e360672	5133	ptun_data->vl53l1_tuningparm_hist_min_amb_thresh_events =
charlesmn	0:3ac96e360672	5134	pHP->min_ambient_thresh_events;
charlesmn	0:3ac96e360672	5135
charlesmn	0:3ac96e360672	5136	ptun_data->vl53l1_tuningparm_hist_amb_events_scaler =
charlesmn	0:3ac96e360672	5137	pHP->ambient_thresh_events_scaler;
charlesmn	0:3ac96e360672	5138
charlesmn	0:3ac96e360672	5139	ptun_data->vl53l1_tuningparm_hist_noise_threshold =
charlesmn	0:3ac96e360672	5140	pHP->noise_threshold;
charlesmn	0:3ac96e360672	5141
charlesmn	0:3ac96e360672	5142	ptun_data->vl53l1_tuningparm_hist_signal_total_events_limit =
charlesmn	0:3ac96e360672	5143	pHP->signal_total_events_limit;
charlesmn	0:3ac96e360672	5144
charlesmn	0:3ac96e360672	5145	ptun_data->vl53l1_tuningparm_hist_sigma_est_ref_mm =
charlesmn	0:3ac96e360672	5146	pHP->sigma_estimator__sigma_ref_mm;
charlesmn	0:3ac96e360672	5147
charlesmn	0:3ac96e360672	5148	ptun_data->vl53l1_tuningparm_hist_sigma_thresh_mm =
charlesmn	0:3ac96e360672	5149	pHP->sigma_thresh;
charlesmn	0:3ac96e360672	5150
charlesmn	0:3ac96e360672	5151	ptun_data->vl53l1_tuningparm_hist_gain_factor =
charlesmn	0:3ac96e360672	5152	pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn	0:3ac96e360672	5153
charlesmn	0:3ac96e360672	5154	ptun_data->vl53l1_tuningparm_consistency_hist_phase_tolerance =
charlesmn	0:3ac96e360672	5155	pHP->algo__consistency_check__phase_tolerance;
charlesmn	0:3ac96e360672	5156
charlesmn	0:3ac96e360672	5157	ptun_data->vl53l1_tuningparm_consistency_hist_min_max_tolerance_mm =
charlesmn	0:3ac96e360672	5158	pHP->algo__consistency_check__min_max_tolerance;
charlesmn	0:3ac96e360672	5159
charlesmn	0:3ac96e360672	5160	ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma =
charlesmn	0:3ac96e360672	5161	pHP->algo__consistency_check__event_sigma;
charlesmn	0:3ac96e360672	5162
charlesmn	0:3ac96e360672	5163	ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma_min_spad_limit
charlesmn	0:3ac96e360672	5164	= pHP->algo__consistency_check__event_min_spad_count;
charlesmn	0:3ac96e360672	5165
charlesmn	0:3ac96e360672	5166	ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_long_range =
charlesmn	0:3ac96e360672	5167	pdev->tuning_parms.tp_init_phase_rtn_hist_long;
charlesmn	0:3ac96e360672	5168
charlesmn	0:3ac96e360672	5169	ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_med_range =
charlesmn	0:3ac96e360672	5170	pdev->tuning_parms.tp_init_phase_rtn_hist_med;
charlesmn	0:3ac96e360672	5171
charlesmn	0:3ac96e360672	5172	ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_short_range =
charlesmn	0:3ac96e360672	5173	pdev->tuning_parms.tp_init_phase_rtn_hist_short;
charlesmn	0:3ac96e360672	5174
charlesmn	0:3ac96e360672	5175	ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_long_range =
charlesmn	0:3ac96e360672	5176	pdev->tuning_parms.tp_init_phase_ref_hist_long;
charlesmn	0:3ac96e360672	5177
charlesmn	0:3ac96e360672	5178	ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_med_range =
charlesmn	0:3ac96e360672	5179	pdev->tuning_parms.tp_init_phase_ref_hist_med;
charlesmn	0:3ac96e360672	5180
charlesmn	0:3ac96e360672	5181	ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_short_range =
charlesmn	0:3ac96e360672	5182	pdev->tuning_parms.tp_init_phase_ref_hist_short;
charlesmn	0:3ac96e360672	5183
charlesmn	0:3ac96e360672	5184	ptun_data->vl53l1_tuningparm_xtalk_detect_min_valid_range_mm =
charlesmn	0:3ac96e360672	5185	pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm;
charlesmn	0:3ac96e360672	5186
charlesmn	0:3ac96e360672	5187	ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_range_mm =
charlesmn	0:3ac96e360672	5188	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm;
charlesmn	0:3ac96e360672	5189
charlesmn	0:3ac96e360672	5190	ptun_data->vl53l1_tuningparm_xtalk_detect_max_sigma_mm =
charlesmn	0:3ac96e360672	5191	pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn	0:3ac96e360672	5192
charlesmn	0:3ac96e360672	5193	ptun_data->vl53l1_tuningparm_xtalk_detect_min_max_tolerance =
charlesmn	0:3ac96e360672	5194	pHP->algo__crosstalk_detect_min_max_tolerance;
charlesmn	0:3ac96e360672	5195
charlesmn	0:3ac96e360672	5196	ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	5197	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps;
charlesmn	0:3ac96e360672	5198
charlesmn	0:3ac96e360672	5199	ptun_data->vl53l1_tuningparm_xtalk_detect_event_sigma =
charlesmn	0:3ac96e360672	5200	pHP->algo__crosstalk_detect_event_sigma;
charlesmn	0:3ac96e360672	5201
charlesmn	0:3ac96e360672	5202	ptun_data->vl53l1_tuningparm_hist_xtalk_margin_kcps =
charlesmn	0:3ac96e360672	5203	pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn	0:3ac96e360672	5204
charlesmn	0:3ac96e360672	5205	ptun_data->vl53l1_tuningparm_consistency_lite_phase_tolerance =
charlesmn	0:3ac96e360672	5206	pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
charlesmn	0:3ac96e360672	5207
charlesmn	0:3ac96e360672	5208	ptun_data->vl53l1_tuningparm_phasecal_target =
charlesmn	0:3ac96e360672	5209	pdev->tuning_parms.tp_phasecal_target;
charlesmn	0:3ac96e360672	5210
charlesmn	0:3ac96e360672	5211	ptun_data->vl53l1_tuningparm_lite_cal_repeat_rate =
charlesmn	0:3ac96e360672	5212	pdev->tuning_parms.tp_cal_repeat_rate;
charlesmn	0:3ac96e360672	5213
charlesmn	0:3ac96e360672	5214	ptun_data->vl53l1_tuningparm_lite_ranging_gain_factor =
charlesmn	0:3ac96e360672	5215	pdev->gain_cal.standard_ranging_gain_factor;
charlesmn	0:3ac96e360672	5216
charlesmn	0:3ac96e360672	5217	ptun_data->vl53l1_tuningparm_lite_min_clip_mm =
charlesmn	0:3ac96e360672	5218	pdev->tuning_parms.tp_lite_min_clip;
charlesmn	0:3ac96e360672	5219
charlesmn	0:3ac96e360672	5220	ptun_data->vl53l1_tuningparm_lite_long_sigma_thresh_mm =
charlesmn	0:3ac96e360672	5221	pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
charlesmn	0:3ac96e360672	5222
charlesmn	0:3ac96e360672	5223	ptun_data->vl53l1_tuningparm_lite_med_sigma_thresh_mm =
charlesmn	0:3ac96e360672	5224	pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
charlesmn	0:3ac96e360672	5225
charlesmn	0:3ac96e360672	5226	ptun_data->vl53l1_tuningparm_lite_short_sigma_thresh_mm =
charlesmn	0:3ac96e360672	5227	pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
charlesmn	0:3ac96e360672	5228
charlesmn	0:3ac96e360672	5229	ptun_data->vl53l1_tuningparm_lite_long_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	5230	pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	5231
charlesmn	0:3ac96e360672	5232	ptun_data->vl53l1_tuningparm_lite_med_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	5233	pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	5234
charlesmn	0:3ac96e360672	5235	ptun_data->vl53l1_tuningparm_lite_short_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	5236	pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	5237
charlesmn	0:3ac96e360672	5238	ptun_data->vl53l1_tuningparm_lite_sigma_est_pulse_width =
charlesmn	0:3ac96e360672	5239	pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
charlesmn	0:3ac96e360672	5240
charlesmn	0:3ac96e360672	5241	ptun_data->vl53l1_tuningparm_lite_sigma_est_amb_width_ns =
charlesmn	0:3ac96e360672	5242	pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
charlesmn	0:3ac96e360672	5243
charlesmn	0:3ac96e360672	5244	ptun_data->vl53l1_tuningparm_lite_sigma_ref_mm =
charlesmn	0:3ac96e360672	5245	pdev->tuning_parms.tp_lite_sigma_ref_mm;
charlesmn	0:3ac96e360672	5246
charlesmn	0:3ac96e360672	5247	ptun_data->vl53l1_tuningparm_lite_rit_mult =
charlesmn	0:3ac96e360672	5248	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn	0:3ac96e360672	5249
charlesmn	0:3ac96e360672	5250	ptun_data->vl53l1_tuningparm_lite_seed_config =
charlesmn	0:3ac96e360672	5251	pdev->tuning_parms.tp_lite_seed_cfg;
charlesmn	0:3ac96e360672	5252
charlesmn	0:3ac96e360672	5253	ptun_data->vl53l1_tuningparm_lite_quantifier =
charlesmn	0:3ac96e360672	5254	pdev->tuning_parms.tp_lite_quantifier;
charlesmn	0:3ac96e360672	5255
charlesmn	0:3ac96e360672	5256	ptun_data->vl53l1_tuningparm_lite_first_order_select =
charlesmn	0:3ac96e360672	5257	pdev->tuning_parms.tp_lite_first_order_select;
charlesmn	0:3ac96e360672	5258
charlesmn	0:3ac96e360672	5259	ptun_data->vl53l1_tuningparm_lite_xtalk_margin_kcps =
charlesmn	0:3ac96e360672	5260	pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn	0:3ac96e360672	5261
charlesmn	0:3ac96e360672	5262	ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_long_range =
charlesmn	0:3ac96e360672	5263	pdev->tuning_parms.tp_init_phase_rtn_lite_long;
charlesmn	0:3ac96e360672	5264
charlesmn	0:3ac96e360672	5265	ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_med_range =
charlesmn	0:3ac96e360672	5266	pdev->tuning_parms.tp_init_phase_rtn_lite_med;
charlesmn	0:3ac96e360672	5267
charlesmn	0:3ac96e360672	5268	ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_short_range =
charlesmn	0:3ac96e360672	5269	pdev->tuning_parms.tp_init_phase_rtn_lite_short;
charlesmn	0:3ac96e360672	5270
charlesmn	0:3ac96e360672	5271	ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_long_range =
charlesmn	0:3ac96e360672	5272	pdev->tuning_parms.tp_init_phase_ref_lite_long;
charlesmn	0:3ac96e360672	5273
charlesmn	0:3ac96e360672	5274	ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_med_range =
charlesmn	0:3ac96e360672	5275	pdev->tuning_parms.tp_init_phase_ref_lite_med;
charlesmn	0:3ac96e360672	5276
charlesmn	0:3ac96e360672	5277	ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_short_range =
charlesmn	0:3ac96e360672	5278	pdev->tuning_parms.tp_init_phase_ref_lite_short;
charlesmn	0:3ac96e360672	5279
charlesmn	0:3ac96e360672	5280	ptun_data->vl53l1_tuningparm_timed_seed_config =
charlesmn	0:3ac96e360672	5281	pdev->tuning_parms.tp_timed_seed_cfg;
charlesmn	0:3ac96e360672	5282
charlesmn	0:3ac96e360672	5283	ptun_data->vl53l1_tuningparm_dmax_cfg_signal_thresh_sigma =
charlesmn	0:3ac96e360672	5284	pdev->dmax_cfg.signal_thresh_sigma;
charlesmn	0:3ac96e360672	5285
charlesmn	0:3ac96e360672	5286	ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_0 =
charlesmn	0:3ac96e360672	5287	pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
charlesmn	0:3ac96e360672	5288
charlesmn	0:3ac96e360672	5289	ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_1 =
charlesmn	0:3ac96e360672	5290	pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
charlesmn	0:3ac96e360672	5291
charlesmn	0:3ac96e360672	5292	ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_2 =
charlesmn	0:3ac96e360672	5293	pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
charlesmn	0:3ac96e360672	5294
charlesmn	0:3ac96e360672	5295	ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_3 =
charlesmn	0:3ac96e360672	5296	pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
charlesmn	0:3ac96e360672	5297
charlesmn	0:3ac96e360672	5298	ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_4 =
charlesmn	0:3ac96e360672	5299	pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
charlesmn	0:3ac96e360672	5300
charlesmn	0:3ac96e360672	5301	ptun_data->vl53l1_tuningparm_vhv_loopbound =
charlesmn	0:3ac96e360672	5302	pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
charlesmn	0:3ac96e360672	5303
charlesmn	0:3ac96e360672	5304	ptun_data->vl53l1_tuningparm_refspadchar_device_test_mode =
charlesmn	0:3ac96e360672	5305	pdev->refspadchar.device_test_mode;
charlesmn	0:3ac96e360672	5306
charlesmn	0:3ac96e360672	5307	ptun_data->vl53l1_tuningparm_refspadchar_vcsel_period =
charlesmn	0:3ac96e360672	5308	pdev->refspadchar.VL53L1_p_009;
charlesmn	0:3ac96e360672	5309
charlesmn	0:3ac96e360672	5310	ptun_data->vl53l1_tuningparm_refspadchar_phasecal_timeout_us =
charlesmn	0:3ac96e360672	5311	pdev->refspadchar.timeout_us;
charlesmn	0:3ac96e360672	5312
charlesmn	0:3ac96e360672	5313	ptun_data->vl53l1_tuningparm_refspadchar_target_count_rate_mcps =
charlesmn	0:3ac96e360672	5314	pdev->refspadchar.target_count_rate_mcps;
charlesmn	0:3ac96e360672	5315
charlesmn	0:3ac96e360672	5316	ptun_data->vl53l1_tuningparm_refspadchar_min_countrate_limit_mcps =
charlesmn	0:3ac96e360672	5317	pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	5318
charlesmn	0:3ac96e360672	5319	ptun_data->vl53l1_tuningparm_refspadchar_max_countrate_limit_mcps =
charlesmn	0:3ac96e360672	5320	pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	5321
charlesmn	0:3ac96e360672	5322	ptun_data->vl53l1_tuningparm_xtalk_extract_num_of_samples =
charlesmn	0:3ac96e360672	5323	pXC->num_of_samples;
charlesmn	0:3ac96e360672	5324
charlesmn	0:3ac96e360672	5325	ptun_data->vl53l1_tuningparm_xtalk_extract_min_filter_thresh_mm =
charlesmn	0:3ac96e360672	5326	pXC->algo__crosstalk_extract_min_valid_range_mm;
charlesmn	0:3ac96e360672	5327
charlesmn	0:3ac96e360672	5328	ptun_data->vl53l1_tuningparm_xtalk_extract_max_filter_thresh_mm =
charlesmn	0:3ac96e360672	5329	pXC->algo__crosstalk_extract_max_valid_range_mm;
charlesmn	0:3ac96e360672	5330
charlesmn	0:3ac96e360672	5331	ptun_data->vl53l1_tuningparm_xtalk_extract_dss_rate_mcps =
charlesmn	0:3ac96e360672	5332	pXC->dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	5333
charlesmn	0:3ac96e360672	5334	ptun_data->vl53l1_tuningparm_xtalk_extract_phasecal_timeout_us =
charlesmn	0:3ac96e360672	5335	pXC->phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	5336
charlesmn	0:3ac96e360672	5337	ptun_data->vl53l1_tuningparm_xtalk_extract_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	5338	pXC->algo__crosstalk_extract_max_valid_rate_kcps;
charlesmn	0:3ac96e360672	5339
charlesmn	0:3ac96e360672	5340	ptun_data->vl53l1_tuningparm_xtalk_extract_sigma_threshold_mm =
charlesmn	0:3ac96e360672	5341	pXC->algo__crosstalk_extract_max_sigma_mm;
charlesmn	0:3ac96e360672	5342
charlesmn	0:3ac96e360672	5343	ptun_data->vl53l1_tuningparm_xtalk_extract_dss_timeout_us =
charlesmn	0:3ac96e360672	5344	pXC->mm_config_timeout_us;
charlesmn	0:3ac96e360672	5345
charlesmn	0:3ac96e360672	5346	ptun_data->vl53l1_tuningparm_xtalk_extract_bin_timeout_us =
charlesmn	0:3ac96e360672	5347	pXC->range_config_timeout_us;
charlesmn	0:3ac96e360672	5348
charlesmn	0:3ac96e360672	5349	ptun_data->vl53l1_tuningparm_offset_cal_dss_rate_mcps =
charlesmn	0:3ac96e360672	5350	pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	5351
charlesmn	0:3ac96e360672	5352	ptun_data->vl53l1_tuningparm_offset_cal_phasecal_timeout_us =
charlesmn	0:3ac96e360672	5353	pdev->offsetcal_cfg.phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	5354
charlesmn	0:3ac96e360672	5355	ptun_data->vl53l1_tuningparm_offset_cal_mm_timeout_us =
charlesmn	0:3ac96e360672	5356	pdev->offsetcal_cfg.mm_config_timeout_us;
charlesmn	0:3ac96e360672	5357
charlesmn	0:3ac96e360672	5358	ptun_data->vl53l1_tuningparm_offset_cal_range_timeout_us =
charlesmn	0:3ac96e360672	5359	pdev->offsetcal_cfg.range_config_timeout_us;
charlesmn	0:3ac96e360672	5360
charlesmn	0:3ac96e360672	5361	ptun_data->vl53l1_tuningparm_offset_cal_pre_samples =
charlesmn	0:3ac96e360672	5362	pdev->offsetcal_cfg.pre_num_of_samples;
charlesmn	0:3ac96e360672	5363
charlesmn	0:3ac96e360672	5364	ptun_data->vl53l1_tuningparm_offset_cal_mm1_samples =
charlesmn	0:3ac96e360672	5365	pdev->offsetcal_cfg.mm1_num_of_samples;
charlesmn	0:3ac96e360672	5366
charlesmn	0:3ac96e360672	5367	ptun_data->vl53l1_tuningparm_offset_cal_mm2_samples =
charlesmn	0:3ac96e360672	5368	pdev->offsetcal_cfg.mm2_num_of_samples;
charlesmn	0:3ac96e360672	5369
charlesmn	0:3ac96e360672	5370	ptun_data->vl53l1_tuningparm_zone_cal_dss_rate_mcps =
charlesmn	0:3ac96e360672	5371	pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	5372
charlesmn	0:3ac96e360672	5373	ptun_data->vl53l1_tuningparm_zone_cal_phasecal_timeout_us =
charlesmn	0:3ac96e360672	5374	pdev->zonecal_cfg.phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	5375
charlesmn	0:3ac96e360672	5376	ptun_data->vl53l1_tuningparm_zone_cal_dss_timeout_us =
charlesmn	0:3ac96e360672	5377	pdev->zonecal_cfg.mm_config_timeout_us;
charlesmn	0:3ac96e360672	5378
charlesmn	0:3ac96e360672	5379	ptun_data->vl53l1_tuningparm_zone_cal_phasecal_num_samples =
charlesmn	0:3ac96e360672	5380	pdev->zonecal_cfg.phasecal_num_of_samples;
charlesmn	0:3ac96e360672	5381
charlesmn	0:3ac96e360672	5382	ptun_data->vl53l1_tuningparm_zone_cal_range_timeout_us =
charlesmn	0:3ac96e360672	5383	pdev->zonecal_cfg.range_config_timeout_us;
charlesmn	0:3ac96e360672	5384
charlesmn	0:3ac96e360672	5385	ptun_data->vl53l1_tuningparm_zone_cal_zone_num_samples =
charlesmn	0:3ac96e360672	5386	pdev->zonecal_cfg.zone_num_of_samples;
charlesmn	0:3ac96e360672	5387
charlesmn	0:3ac96e360672	5388	ptun_data->vl53l1_tuningparm_spadmap_vcsel_period =
charlesmn	0:3ac96e360672	5389	pdev->ssc_cfg.VL53L1_p_009;
charlesmn	0:3ac96e360672	5390
charlesmn	0:3ac96e360672	5391	ptun_data->vl53l1_tuningparm_spadmap_vcsel_start =
charlesmn	0:3ac96e360672	5392	pdev->ssc_cfg.vcsel_start;
charlesmn	0:3ac96e360672	5393
charlesmn	0:3ac96e360672	5394	ptun_data->vl53l1_tuningparm_spadmap_rate_limit_mcps =
charlesmn	0:3ac96e360672	5395	pdev->ssc_cfg.rate_limit_mcps;
charlesmn	0:3ac96e360672	5396
charlesmn	0:3ac96e360672	5397	ptun_data->vl53l1_tuningparm_lite_dss_config_target_total_rate_mcps =
charlesmn	0:3ac96e360672	5398	pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn	0:3ac96e360672	5399
charlesmn	0:3ac96e360672	5400	ptun_data->vl53l1_tuningparm_ranging_dss_config_target_total_rate_mcps =
charlesmn	0:3ac96e360672	5401	pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn	0:3ac96e360672	5402
charlesmn	0:3ac96e360672	5403	ptun_data->vl53l1_tuningparm_mz_dss_config_target_total_rate_mcps =
charlesmn	0:3ac96e360672	5404	pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn	0:3ac96e360672	5405
charlesmn	0:3ac96e360672	5406	ptun_data->vl53l1_tuningparm_timed_dss_config_target_total_rate_mcps =
charlesmn	0:3ac96e360672	5407	pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn	0:3ac96e360672	5408
charlesmn	0:3ac96e360672	5409	ptun_data->vl53l1_tuningparm_lite_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5410	pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn	0:3ac96e360672	5411
charlesmn	0:3ac96e360672	5412	ptun_data->vl53l1_tuningparm_ranging_long_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5413	pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn	0:3ac96e360672	5414
charlesmn	0:3ac96e360672	5415	ptun_data->vl53l1_tuningparm_ranging_med_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5416	pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn	0:3ac96e360672	5417
charlesmn	0:3ac96e360672	5418	ptun_data->vl53l1_tuningparm_ranging_short_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5419	pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn	0:3ac96e360672	5420
charlesmn	0:3ac96e360672	5421	ptun_data->vl53l1_tuningparm_mz_long_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5422	pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn	0:3ac96e360672	5423
charlesmn	0:3ac96e360672	5424	ptun_data->vl53l1_tuningparm_mz_med_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5425	pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn	0:3ac96e360672	5426
charlesmn	0:3ac96e360672	5427	ptun_data->vl53l1_tuningparm_mz_short_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5428	pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn	0:3ac96e360672	5429
charlesmn	0:3ac96e360672	5430	ptun_data->vl53l1_tuningparm_timed_phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	5431	pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn	0:3ac96e360672	5432
charlesmn	0:3ac96e360672	5433	ptun_data->vl53l1_tuningparm_lite_mm_config_timeout_us =
charlesmn	0:3ac96e360672	5434	pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn	0:3ac96e360672	5435
charlesmn	0:3ac96e360672	5436	ptun_data->vl53l1_tuningparm_ranging_mm_config_timeout_us =
charlesmn	0:3ac96e360672	5437	pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	5438
charlesmn	0:3ac96e360672	5439	ptun_data->vl53l1_tuningparm_mz_mm_config_timeout_us =
charlesmn	0:3ac96e360672	5440	pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn	0:3ac96e360672	5441
charlesmn	0:3ac96e360672	5442	ptun_data->vl53l1_tuningparm_timed_mm_config_timeout_us =
charlesmn	0:3ac96e360672	5443	pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn	0:3ac96e360672	5444
charlesmn	0:3ac96e360672	5445	ptun_data->vl53l1_tuningparm_lite_range_config_timeout_us =
charlesmn	0:3ac96e360672	5446	pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn	0:3ac96e360672	5447
charlesmn	0:3ac96e360672	5448	ptun_data->vl53l1_tuningparm_ranging_range_config_timeout_us =
charlesmn	0:3ac96e360672	5449	pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	5450
charlesmn	0:3ac96e360672	5451	ptun_data->vl53l1_tuningparm_mz_range_config_timeout_us =
charlesmn	0:3ac96e360672	5452	pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn	0:3ac96e360672	5453
charlesmn	0:3ac96e360672	5454	ptun_data->vl53l1_tuningparm_timed_range_config_timeout_us =
charlesmn	0:3ac96e360672	5455	pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn	0:3ac96e360672	5456
charlesmn	0:3ac96e360672	5457	ptun_data->vl53l1_tuningparm_dynxtalk_smudge_margin =
charlesmn	0:3ac96e360672	5458	pdev->smudge_correct_config.smudge_margin;
charlesmn	0:3ac96e360672	5459
charlesmn	0:3ac96e360672	5460	ptun_data->vl53l1_tuningparm_dynxtalk_noise_margin =
charlesmn	0:3ac96e360672	5461	pdev->smudge_correct_config.noise_margin;
charlesmn	0:3ac96e360672	5462
charlesmn	0:3ac96e360672	5463	ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit =
charlesmn	0:3ac96e360672	5464	pdev->smudge_correct_config.user_xtalk_offset_limit;
charlesmn	0:3ac96e360672	5465
charlesmn	0:3ac96e360672	5466	ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit_hi =
charlesmn	0:3ac96e360672	5467	pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
charlesmn	0:3ac96e360672	5468
charlesmn	0:3ac96e360672	5469	ptun_data->vl53l1_tuningparm_dynxtalk_sample_limit =
charlesmn	0:3ac96e360672	5470	pdev->smudge_correct_config.sample_limit;
charlesmn	0:3ac96e360672	5471
charlesmn	0:3ac96e360672	5472	ptun_data->vl53l1_tuningparm_dynxtalk_single_xtalk_delta =
charlesmn	0:3ac96e360672	5473	pdev->smudge_correct_config.single_xtalk_delta;
charlesmn	0:3ac96e360672	5474
charlesmn	0:3ac96e360672	5475	ptun_data->vl53l1_tuningparm_dynxtalk_averaged_xtalk_delta =
charlesmn	0:3ac96e360672	5476	pdev->smudge_correct_config.averaged_xtalk_delta;
charlesmn	0:3ac96e360672	5477
charlesmn	0:3ac96e360672	5478	ptun_data->vl53l1_tuningparm_dynxtalk_clip_limit =
charlesmn	0:3ac96e360672	5479	pdev->smudge_correct_config.smudge_corr_clip_limit;
charlesmn	0:3ac96e360672	5480
charlesmn	0:3ac96e360672	5481	ptun_data->vl53l1_tuningparm_dynxtalk_scaler_calc_method =
charlesmn	0:3ac96e360672	5482	pdev->smudge_correct_config.scaler_calc_method;
charlesmn	0:3ac96e360672	5483
charlesmn	0:3ac96e360672	5484	ptun_data->vl53l1_tuningparm_dynxtalk_xgradient_scaler =
charlesmn	0:3ac96e360672	5485	pdev->smudge_correct_config.x_gradient_scaler;
charlesmn	0:3ac96e360672	5486
charlesmn	0:3ac96e360672	5487	ptun_data->vl53l1_tuningparm_dynxtalk_ygradient_scaler =
charlesmn	0:3ac96e360672	5488	pdev->smudge_correct_config.y_gradient_scaler;
charlesmn	0:3ac96e360672	5489
charlesmn	0:3ac96e360672	5490	ptun_data->vl53l1_tuningparm_dynxtalk_user_scaler_set =
charlesmn	0:3ac96e360672	5491	pdev->smudge_correct_config.user_scaler_set;
charlesmn	0:3ac96e360672	5492
charlesmn	0:3ac96e360672	5493	ptun_data->vl53l1_tuningparm_dynxtalk_smudge_cor_single_apply =
charlesmn	0:3ac96e360672	5494	pdev->smudge_correct_config.smudge_corr_single_apply;
charlesmn	0:3ac96e360672	5495
charlesmn	0:3ac96e360672	5496	ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_amb_threshold =
charlesmn	0:3ac96e360672	5497	pdev->smudge_correct_config.smudge_corr_ambient_threshold;
charlesmn	0:3ac96e360672	5498
charlesmn	0:3ac96e360672	5499	ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_amb_threshold_kcps =
charlesmn	0:3ac96e360672	5500	pdev->smudge_correct_config.nodetect_ambient_threshold;
charlesmn	0:3ac96e360672	5501
charlesmn	0:3ac96e360672	5502	ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_sample_limit =
charlesmn	0:3ac96e360672	5503	pdev->smudge_correct_config.nodetect_sample_limit;
charlesmn	0:3ac96e360672	5504
charlesmn	0:3ac96e360672	5505	ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps =
charlesmn	0:3ac96e360672	5506	pdev->smudge_correct_config.nodetect_xtalk_offset;
charlesmn	0:3ac96e360672	5507
charlesmn	0:3ac96e360672	5508	ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_min_range_mm =
charlesmn	0:3ac96e360672	5509	pdev->smudge_correct_config.nodetect_min_range_mm;
charlesmn	0:3ac96e360672	5510
charlesmn	0:3ac96e360672	5511	ptun_data->vl53l1_tuningparm_lowpowerauto_vhv_loop_bound =
charlesmn	0:3ac96e360672	5512	pdev->low_power_auto_data.vhv_loop_bound;
charlesmn	0:3ac96e360672	5513
charlesmn	0:3ac96e360672	5514	ptun_data->vl53l1_tuningparm_lowpowerauto_mm_config_timeout_us =
charlesmn	0:3ac96e360672	5515	pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn	0:3ac96e360672	5516
charlesmn	0:3ac96e360672	5517	ptun_data->vl53l1_tuningparm_lowpowerauto_range_config_timeout_us =
charlesmn	0:3ac96e360672	5518	pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn	0:3ac96e360672	5519
charlesmn	0:3ac96e360672	5520	ptun_data->vl53l1_tuningparm_very_short_dss_rate_mcps =
charlesmn	0:3ac96e360672	5521	pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn	0:3ac96e360672	5522
charlesmn	0:3ac96e360672	5523	ptun_data->vl53l1_tuningparm_phasecal_patch_power =
charlesmn	0:3ac96e360672	5524	pdev->tuning_parms.tp_phasecal_patch_power;
charlesmn	0:3ac96e360672	5525
charlesmn	0:3ac96e360672	5526	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	5527
charlesmn	0:3ac96e360672	5528	return status;
charlesmn	0:3ac96e360672	5529	}
charlesmn	0:3ac96e360672	5530
charlesmn	0:3ac96e360672	5531
charlesmn	0:3ac96e360672	5532
charlesmn	0:3ac96e360672	5533
charlesmn	0:3ac96e360672	5534
charlesmn	0:3ac96e360672	5535	VL53L1_Error VL53L1_get_tuning_parm(
charlesmn	0:3ac96e360672	5536	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	5537	VL53L1_TuningParms tuning_parm_key,
charlesmn	0:3ac96e360672	5538	int32_t *ptuning_parm_value)
charlesmn	0:3ac96e360672	5539	{
charlesmn	0:3ac96e360672	5540
charlesmn	0:3ac96e360672	5541
charlesmn	0:3ac96e360672	5542
charlesmn	0:3ac96e360672	5543	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	5544
charlesmn	0:3ac96e360672	5545	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	5546	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	5547	VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn	0:3ac96e360672	5548
charlesmn	0:3ac96e360672	5549	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	5550
charlesmn	0:3ac96e360672	5551	switch (tuning_parm_key) {
charlesmn	0:3ac96e360672	5552
charlesmn	0:3ac96e360672	5553	case VL53L1_TUNINGPARM_VERSION:
charlesmn	0:3ac96e360672	5554	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5555	(int32_t)pdev->tuning_parms.tp_tuning_parm_version;
charlesmn	0:3ac96e360672	5556	break;
charlesmn	0:3ac96e360672	5557	case VL53L1_TUNINGPARM_KEY_TABLE_VERSION:
charlesmn	0:3ac96e360672	5558	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5559	(int32_t)pdev->tuning_parms.tp_tuning_parm_key_table_version;
charlesmn	0:3ac96e360672	5560	break;
charlesmn	0:3ac96e360672	5561	case VL53L1_TUNINGPARM_LLD_VERSION:
charlesmn	0:3ac96e360672	5562	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5563	(int32_t)pdev->tuning_parms.tp_tuning_parm_lld_version;
charlesmn	0:3ac96e360672	5564	break;
charlesmn	0:3ac96e360672	5565	case VL53L1_TUNINGPARM_HIST_ALGO_SELECT:
charlesmn	0:3ac96e360672	5566	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5567	(int32_t)pHP->hist_algo_select;
charlesmn	0:3ac96e360672	5568	break;
charlesmn	0:3ac96e360672	5569	case VL53L1_TUNINGPARM_HIST_TARGET_ORDER:
charlesmn	0:3ac96e360672	5570	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5571	(int32_t)pHP->hist_target_order;
charlesmn	0:3ac96e360672	5572	break;
charlesmn	0:3ac96e360672	5573	case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0:
charlesmn	0:3ac96e360672	5574	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5575	(int32_t)pHP->filter_woi0;
charlesmn	0:3ac96e360672	5576	break;
charlesmn	0:3ac96e360672	5577	case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1:
charlesmn	0:3ac96e360672	5578	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5579	(int32_t)pHP->filter_woi1;
charlesmn	0:3ac96e360672	5580	break;
charlesmn	0:3ac96e360672	5581	case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD:
charlesmn	0:3ac96e360672	5582	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5583	(int32_t)pHP->hist_amb_est_method;
charlesmn	0:3ac96e360672	5584	break;
charlesmn	0:3ac96e360672	5585	case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
charlesmn	0:3ac96e360672	5586	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5587	(int32_t)pHP->ambient_thresh_sigma0;
charlesmn	0:3ac96e360672	5588	break;
charlesmn	0:3ac96e360672	5589	case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
charlesmn	0:3ac96e360672	5590	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5591	(int32_t)pHP->ambient_thresh_sigma1;
charlesmn	0:3ac96e360672	5592	break;
charlesmn	0:3ac96e360672	5593	case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
charlesmn	0:3ac96e360672	5594	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5595	(int32_t)pHP->min_ambient_thresh_events;
charlesmn	0:3ac96e360672	5596	break;
charlesmn	0:3ac96e360672	5597	case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
charlesmn	0:3ac96e360672	5598	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5599	(int32_t)pHP->ambient_thresh_events_scaler;
charlesmn	0:3ac96e360672	5600	break;
charlesmn	0:3ac96e360672	5601	case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD:
charlesmn	0:3ac96e360672	5602	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5603	(int32_t)pHP->noise_threshold;
charlesmn	0:3ac96e360672	5604	break;
charlesmn	0:3ac96e360672	5605	case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
charlesmn	0:3ac96e360672	5606	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5607	(int32_t)pHP->signal_total_events_limit;
charlesmn	0:3ac96e360672	5608	break;
charlesmn	0:3ac96e360672	5609	case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
charlesmn	0:3ac96e360672	5610	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5611	(int32_t)pHP->sigma_estimator__sigma_ref_mm;
charlesmn	0:3ac96e360672	5612	break;
charlesmn	0:3ac96e360672	5613	case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	5614	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5615	(int32_t)pHP->sigma_thresh;
charlesmn	0:3ac96e360672	5616	break;
charlesmn	0:3ac96e360672	5617	case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR:
charlesmn	0:3ac96e360672	5618	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5619	(int32_t)pdev->gain_cal.histogram_ranging_gain_factor;
charlesmn	0:3ac96e360672	5620	break;
charlesmn	0:3ac96e360672	5621	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
charlesmn	0:3ac96e360672	5622	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5623	(int32_t)pHP->algo__consistency_check__phase_tolerance;
charlesmn	0:3ac96e360672	5624	break;
charlesmn	0:3ac96e360672	5625	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
charlesmn	0:3ac96e360672	5626	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5627	(int32_t)pHP->algo__consistency_check__min_max_tolerance;
charlesmn	0:3ac96e360672	5628	break;
charlesmn	0:3ac96e360672	5629	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
charlesmn	0:3ac96e360672	5630	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5631	(int32_t)pHP->algo__consistency_check__event_sigma;
charlesmn	0:3ac96e360672	5632	break;
charlesmn	0:3ac96e360672	5633	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
charlesmn	0:3ac96e360672	5634	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5635	(int32_t)pHP->algo__consistency_check__event_min_spad_count;
charlesmn	0:3ac96e360672	5636	break;
charlesmn	0:3ac96e360672	5637	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
charlesmn	0:3ac96e360672	5638	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5639	(int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_long;
charlesmn	0:3ac96e360672	5640	break;
charlesmn	0:3ac96e360672	5641	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
charlesmn	0:3ac96e360672	5642	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5643	(int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_med;
charlesmn	0:3ac96e360672	5644	break;
charlesmn	0:3ac96e360672	5645	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
charlesmn	0:3ac96e360672	5646	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5647	(int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_short;
charlesmn	0:3ac96e360672	5648	break;
charlesmn	0:3ac96e360672	5649	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
charlesmn	0:3ac96e360672	5650	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5651	(int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_long;
charlesmn	0:3ac96e360672	5652	break;
charlesmn	0:3ac96e360672	5653	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
charlesmn	0:3ac96e360672	5654	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5655	(int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_med;
charlesmn	0:3ac96e360672	5656	break;
charlesmn	0:3ac96e360672	5657	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
charlesmn	0:3ac96e360672	5658	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5659	(int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_short;
charlesmn	0:3ac96e360672	5660	break;
charlesmn	0:3ac96e360672	5661	case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
charlesmn	0:3ac96e360672	5662	*ptuning_parm_value = (int32_t)(
charlesmn	0:3ac96e360672	5663	pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm);
charlesmn	0:3ac96e360672	5664	break;
charlesmn	0:3ac96e360672	5665	case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
charlesmn	0:3ac96e360672	5666	*ptuning_parm_value = (int32_t)(
charlesmn	0:3ac96e360672	5667	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm);
charlesmn	0:3ac96e360672	5668	break;
charlesmn	0:3ac96e360672	5669	case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
charlesmn	0:3ac96e360672	5670	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5671	(int32_t)pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm;
charlesmn	0:3ac96e360672	5672	break;
charlesmn	0:3ac96e360672	5673	case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
charlesmn	0:3ac96e360672	5674	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5675	(int32_t)pHP->algo__crosstalk_detect_min_max_tolerance;
charlesmn	0:3ac96e360672	5676	break;
charlesmn	0:3ac96e360672	5677	case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
charlesmn	0:3ac96e360672	5678	*ptuning_parm_value = (int32_t)(
charlesmn	0:3ac96e360672	5679	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps);
charlesmn	0:3ac96e360672	5680	break;
charlesmn	0:3ac96e360672	5681	case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
charlesmn	0:3ac96e360672	5682	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5683	(int32_t)pHP->algo__crosstalk_detect_event_sigma;
charlesmn	0:3ac96e360672	5684	break;
charlesmn	0:3ac96e360672	5685	case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
charlesmn	0:3ac96e360672	5686	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5687	(int32_t)pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps;
charlesmn	0:3ac96e360672	5688	break;
charlesmn	0:3ac96e360672	5689	case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
charlesmn	0:3ac96e360672	5690	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5691	(int32_t)pdev->tuning_parms.tp_consistency_lite_phase_tolerance;
charlesmn	0:3ac96e360672	5692	break;
charlesmn	0:3ac96e360672	5693	case VL53L1_TUNINGPARM_PHASECAL_TARGET:
charlesmn	0:3ac96e360672	5694	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5695	(int32_t)pdev->tuning_parms.tp_phasecal_target;
charlesmn	0:3ac96e360672	5696	break;
charlesmn	0:3ac96e360672	5697	case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE:
charlesmn	0:3ac96e360672	5698	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5699	(int32_t)pdev->tuning_parms.tp_cal_repeat_rate;
charlesmn	0:3ac96e360672	5700	break;
charlesmn	0:3ac96e360672	5701	case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
charlesmn	0:3ac96e360672	5702	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5703	(int32_t)pdev->gain_cal.standard_ranging_gain_factor;
charlesmn	0:3ac96e360672	5704	break;
charlesmn	0:3ac96e360672	5705	case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM:
charlesmn	0:3ac96e360672	5706	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5707	(int32_t)pdev->tuning_parms.tp_lite_min_clip;
charlesmn	0:3ac96e360672	5708	break;
charlesmn	0:3ac96e360672	5709	case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	5710	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5711	(int32_t)pdev->tuning_parms.tp_lite_long_sigma_thresh_mm;
charlesmn	0:3ac96e360672	5712	break;
charlesmn	0:3ac96e360672	5713	case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	5714	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5715	(int32_t)pdev->tuning_parms.tp_lite_med_sigma_thresh_mm;
charlesmn	0:3ac96e360672	5716	break;
charlesmn	0:3ac96e360672	5717	case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	5718	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5719	(int32_t)pdev->tuning_parms.tp_lite_short_sigma_thresh_mm;
charlesmn	0:3ac96e360672	5720	break;
charlesmn	0:3ac96e360672	5721	case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
charlesmn	0:3ac96e360672	5722	*ptuning_parm_value = (int32_t)(
charlesmn	0:3ac96e360672	5723	pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps);
charlesmn	0:3ac96e360672	5724	break;
charlesmn	0:3ac96e360672	5725	case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
charlesmn	0:3ac96e360672	5726	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5727	(int32_t)pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps;
charlesmn	0:3ac96e360672	5728	break;
charlesmn	0:3ac96e360672	5729	case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
charlesmn	0:3ac96e360672	5730	*ptuning_parm_value = (int32_t)(
charlesmn	0:3ac96e360672	5731	pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps);
charlesmn	0:3ac96e360672	5732	break;
charlesmn	0:3ac96e360672	5733	case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
charlesmn	0:3ac96e360672	5734	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5735	(int32_t)pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns;
charlesmn	0:3ac96e360672	5736	break;
charlesmn	0:3ac96e360672	5737	case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
charlesmn	0:3ac96e360672	5738	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5739	(int32_t)pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns;
charlesmn	0:3ac96e360672	5740	break;
charlesmn	0:3ac96e360672	5741	case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM:
charlesmn	0:3ac96e360672	5742	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5743	(int32_t)pdev->tuning_parms.tp_lite_sigma_ref_mm;
charlesmn	0:3ac96e360672	5744	break;
charlesmn	0:3ac96e360672	5745	case VL53L1_TUNINGPARM_LITE_RIT_MULT:
charlesmn	0:3ac96e360672	5746	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5747	(int32_t)pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult;
charlesmn	0:3ac96e360672	5748	break;
charlesmn	0:3ac96e360672	5749	case VL53L1_TUNINGPARM_LITE_SEED_CONFIG:
charlesmn	0:3ac96e360672	5750	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5751	(int32_t)pdev->tuning_parms.tp_lite_seed_cfg;
charlesmn	0:3ac96e360672	5752	break;
charlesmn	0:3ac96e360672	5753	case VL53L1_TUNINGPARM_LITE_QUANTIFIER:
charlesmn	0:3ac96e360672	5754	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5755	(int32_t)pdev->tuning_parms.tp_lite_quantifier;
charlesmn	0:3ac96e360672	5756	break;
charlesmn	0:3ac96e360672	5757	case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
charlesmn	0:3ac96e360672	5758	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5759	(int32_t)pdev->tuning_parms.tp_lite_first_order_select;
charlesmn	0:3ac96e360672	5760	break;
charlesmn	0:3ac96e360672	5761	case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
charlesmn	0:3ac96e360672	5762	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5763	(int32_t)pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps;
charlesmn	0:3ac96e360672	5764	break;
charlesmn	0:3ac96e360672	5765	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
charlesmn	0:3ac96e360672	5766	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5767	(int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_long;
charlesmn	0:3ac96e360672	5768	break;
charlesmn	0:3ac96e360672	5769	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
charlesmn	0:3ac96e360672	5770	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5771	(int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_med;
charlesmn	0:3ac96e360672	5772	break;
charlesmn	0:3ac96e360672	5773	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
charlesmn	0:3ac96e360672	5774	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5775	(int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_short;
charlesmn	0:3ac96e360672	5776	break;
charlesmn	0:3ac96e360672	5777	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
charlesmn	0:3ac96e360672	5778	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5779	(int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_long;
charlesmn	0:3ac96e360672	5780	break;
charlesmn	0:3ac96e360672	5781	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
charlesmn	0:3ac96e360672	5782	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5783	(int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_med;
charlesmn	0:3ac96e360672	5784	break;
charlesmn	0:3ac96e360672	5785	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
charlesmn	0:3ac96e360672	5786	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5787	(int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_short;
charlesmn	0:3ac96e360672	5788	break;
charlesmn	0:3ac96e360672	5789	case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG:
charlesmn	0:3ac96e360672	5790	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5791	(int32_t)pdev->tuning_parms.tp_timed_seed_cfg;
charlesmn	0:3ac96e360672	5792	break;
charlesmn	0:3ac96e360672	5793	case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
charlesmn	0:3ac96e360672	5794	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5795	(int32_t)pdev->dmax_cfg.signal_thresh_sigma;
charlesmn	0:3ac96e360672	5796	break;
charlesmn	0:3ac96e360672	5797	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
charlesmn	0:3ac96e360672	5798	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5799	(int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[0];
charlesmn	0:3ac96e360672	5800	break;
charlesmn	0:3ac96e360672	5801	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
charlesmn	0:3ac96e360672	5802	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5803	(int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[1];
charlesmn	0:3ac96e360672	5804	break;
charlesmn	0:3ac96e360672	5805	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
charlesmn	0:3ac96e360672	5806	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5807	(int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[2];
charlesmn	0:3ac96e360672	5808	break;
charlesmn	0:3ac96e360672	5809	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
charlesmn	0:3ac96e360672	5810	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5811	(int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[3];
charlesmn	0:3ac96e360672	5812	break;
charlesmn	0:3ac96e360672	5813	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
charlesmn	0:3ac96e360672	5814	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5815	(int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[4];
charlesmn	0:3ac96e360672	5816	break;
charlesmn	0:3ac96e360672	5817	case VL53L1_TUNINGPARM_VHV_LOOPBOUND:
charlesmn	0:3ac96e360672	5818	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5819	(int32_t)pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound;
charlesmn	0:3ac96e360672	5820	break;
charlesmn	0:3ac96e360672	5821	case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
charlesmn	0:3ac96e360672	5822	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5823	(int32_t)pdev->refspadchar.device_test_mode;
charlesmn	0:3ac96e360672	5824	break;
charlesmn	0:3ac96e360672	5825	case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
charlesmn	0:3ac96e360672	5826	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5827	(int32_t)pdev->refspadchar.VL53L1_p_009;
charlesmn	0:3ac96e360672	5828	break;
charlesmn	0:3ac96e360672	5829	case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	5830	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5831	(int32_t)pdev->refspadchar.timeout_us;
charlesmn	0:3ac96e360672	5832	break;
charlesmn	0:3ac96e360672	5833	case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
charlesmn	0:3ac96e360672	5834	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5835	(int32_t)pdev->refspadchar.target_count_rate_mcps;
charlesmn	0:3ac96e360672	5836	break;
charlesmn	0:3ac96e360672	5837	case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
charlesmn	0:3ac96e360672	5838	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5839	(int32_t)pdev->refspadchar.min_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	5840	break;
charlesmn	0:3ac96e360672	5841	case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
charlesmn	0:3ac96e360672	5842	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5843	(int32_t)pdev->refspadchar.max_count_rate_limit_mcps;
charlesmn	0:3ac96e360672	5844	break;
charlesmn	0:3ac96e360672	5845	case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
charlesmn	0:3ac96e360672	5846	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5847	(int32_t)pXC->num_of_samples;
charlesmn	0:3ac96e360672	5848	break;
charlesmn	0:3ac96e360672	5849	case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
charlesmn	0:3ac96e360672	5850	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5851	(int32_t)pXC->algo__crosstalk_extract_min_valid_range_mm;
charlesmn	0:3ac96e360672	5852	break;
charlesmn	0:3ac96e360672	5853	case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
charlesmn	0:3ac96e360672	5854	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5855	(int32_t)pXC->algo__crosstalk_extract_max_valid_range_mm;
charlesmn	0:3ac96e360672	5856	break;
charlesmn	0:3ac96e360672	5857	case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	5858	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5859	(int32_t)pXC->dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	5860	break;
charlesmn	0:3ac96e360672	5861	case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	5862	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5863	(int32_t)pXC->phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	5864	break;
charlesmn	0:3ac96e360672	5865	case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
charlesmn	0:3ac96e360672	5866	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5867	(int32_t)pXC->algo__crosstalk_extract_max_valid_rate_kcps;
charlesmn	0:3ac96e360672	5868	break;
charlesmn	0:3ac96e360672	5869	case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
charlesmn	0:3ac96e360672	5870	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5871	(int32_t)pXC->algo__crosstalk_extract_max_sigma_mm;
charlesmn	0:3ac96e360672	5872	break;
charlesmn	0:3ac96e360672	5873	case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
charlesmn	0:3ac96e360672	5874	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5875	(int32_t)pXC->mm_config_timeout_us;
charlesmn	0:3ac96e360672	5876	break;
charlesmn	0:3ac96e360672	5877	case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
charlesmn	0:3ac96e360672	5878	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5879	(int32_t)pXC->range_config_timeout_us;
charlesmn	0:3ac96e360672	5880	break;
charlesmn	0:3ac96e360672	5881	case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	5882	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5883	(int32_t)pdev->offsetcal_cfg.dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	5884	break;
charlesmn	0:3ac96e360672	5885	case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	5886	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5887	(int32_t)pdev->offsetcal_cfg.phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	5888	break;
charlesmn	0:3ac96e360672	5889	case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
charlesmn	0:3ac96e360672	5890	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5891	(int32_t)pdev->offsetcal_cfg.mm_config_timeout_us;
charlesmn	0:3ac96e360672	5892	break;
charlesmn	0:3ac96e360672	5893	case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
charlesmn	0:3ac96e360672	5894	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5895	(int32_t)pdev->offsetcal_cfg.range_config_timeout_us;
charlesmn	0:3ac96e360672	5896	break;
charlesmn	0:3ac96e360672	5897	case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
charlesmn	0:3ac96e360672	5898	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5899	(int32_t)pdev->offsetcal_cfg.pre_num_of_samples;
charlesmn	0:3ac96e360672	5900	break;
charlesmn	0:3ac96e360672	5901	case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
charlesmn	0:3ac96e360672	5902	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5903	(int32_t)pdev->offsetcal_cfg.mm1_num_of_samples;
charlesmn	0:3ac96e360672	5904	break;
charlesmn	0:3ac96e360672	5905	case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
charlesmn	0:3ac96e360672	5906	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5907	(int32_t)pdev->offsetcal_cfg.mm2_num_of_samples;
charlesmn	0:3ac96e360672	5908	break;
charlesmn	0:3ac96e360672	5909	case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	5910	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5911	(int32_t)pdev->zonecal_cfg.dss_config__target_total_rate_mcps;
charlesmn	0:3ac96e360672	5912	break;
charlesmn	0:3ac96e360672	5913	case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	5914	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5915	(int32_t)pdev->zonecal_cfg.phasecal_config_timeout_us;
charlesmn	0:3ac96e360672	5916	break;
charlesmn	0:3ac96e360672	5917	case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
charlesmn	0:3ac96e360672	5918	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5919	(int32_t)pdev->zonecal_cfg.mm_config_timeout_us;
charlesmn	0:3ac96e360672	5920	break;
charlesmn	0:3ac96e360672	5921	case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
charlesmn	0:3ac96e360672	5922	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5923	(int32_t)pdev->zonecal_cfg.phasecal_num_of_samples;
charlesmn	0:3ac96e360672	5924	break;
charlesmn	0:3ac96e360672	5925	case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
charlesmn	0:3ac96e360672	5926	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5927	(int32_t)pdev->zonecal_cfg.range_config_timeout_us;
charlesmn	0:3ac96e360672	5928	break;
charlesmn	0:3ac96e360672	5929	case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
charlesmn	0:3ac96e360672	5930	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5931	(int32_t)pdev->zonecal_cfg.zone_num_of_samples;
charlesmn	0:3ac96e360672	5932	break;
charlesmn	0:3ac96e360672	5933	case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
charlesmn	0:3ac96e360672	5934	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5935	(int32_t)pdev->ssc_cfg.VL53L1_p_009;
charlesmn	0:3ac96e360672	5936	break;
charlesmn	0:3ac96e360672	5937	case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START:
charlesmn	0:3ac96e360672	5938	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5939	(int32_t)pdev->ssc_cfg.vcsel_start;
charlesmn	0:3ac96e360672	5940	break;
charlesmn	0:3ac96e360672	5941	case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
charlesmn	0:3ac96e360672	5942	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5943	(int32_t)pdev->ssc_cfg.rate_limit_mcps;
charlesmn	0:3ac96e360672	5944	break;
charlesmn	0:3ac96e360672	5945	case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	5946	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5947	(int32_t)pdev->tuning_parms.tp_dss_target_lite_mcps;
charlesmn	0:3ac96e360672	5948	break;
charlesmn	0:3ac96e360672	5949	case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	5950	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5951	(int32_t)pdev->tuning_parms.tp_dss_target_histo_mcps;
charlesmn	0:3ac96e360672	5952	break;
charlesmn	0:3ac96e360672	5953	case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	5954	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5955	(int32_t)pdev->tuning_parms.tp_dss_target_histo_mz_mcps;
charlesmn	0:3ac96e360672	5956	break;
charlesmn	0:3ac96e360672	5957	case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	5958	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5959	(int32_t)pdev->tuning_parms.tp_dss_target_timed_mcps;
charlesmn	0:3ac96e360672	5960	break;
charlesmn	0:3ac96e360672	5961	case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5962	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5963	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_lite_us;
charlesmn	0:3ac96e360672	5964	break;
charlesmn	0:3ac96e360672	5965	case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5966	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5967	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_long_us;
charlesmn	0:3ac96e360672	5968	break;
charlesmn	0:3ac96e360672	5969	case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5970	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5971	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_med_us;
charlesmn	0:3ac96e360672	5972	break;
charlesmn	0:3ac96e360672	5973	case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5974	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5975	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_short_us;
charlesmn	0:3ac96e360672	5976	break;
charlesmn	0:3ac96e360672	5977	case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5978	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5979	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_long_us;
charlesmn	0:3ac96e360672	5980	break;
charlesmn	0:3ac96e360672	5981	case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5982	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5983	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_med_us;
charlesmn	0:3ac96e360672	5984	break;
charlesmn	0:3ac96e360672	5985	case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5986	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5987	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_short_us;
charlesmn	0:3ac96e360672	5988	break;
charlesmn	0:3ac96e360672	5989	case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5990	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5991	(int32_t)pdev->tuning_parms.tp_phasecal_timeout_timed_us;
charlesmn	0:3ac96e360672	5992	break;
charlesmn	0:3ac96e360672	5993	case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5994	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5995	(int32_t)pdev->tuning_parms.tp_mm_timeout_lite_us;
charlesmn	0:3ac96e360672	5996	break;
charlesmn	0:3ac96e360672	5997	case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	5998	*ptuning_parm_value =
charlesmn	0:3ac96e360672	5999	(int32_t)pdev->tuning_parms.tp_mm_timeout_histo_us;
charlesmn	0:3ac96e360672	6000	break;
charlesmn	0:3ac96e360672	6001	case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6002	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6003	(int32_t)pdev->tuning_parms.tp_mm_timeout_mz_us;
charlesmn	0:3ac96e360672	6004	break;
charlesmn	0:3ac96e360672	6005	case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6006	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6007	(int32_t)pdev->tuning_parms.tp_mm_timeout_timed_us;
charlesmn	0:3ac96e360672	6008	break;
charlesmn	0:3ac96e360672	6009	case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6010	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6011	(int32_t)pdev->tuning_parms.tp_range_timeout_lite_us;
charlesmn	0:3ac96e360672	6012	break;
charlesmn	0:3ac96e360672	6013	case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6014	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6015	(int32_t)pdev->tuning_parms.tp_range_timeout_histo_us;
charlesmn	0:3ac96e360672	6016	break;
charlesmn	0:3ac96e360672	6017	case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6018	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6019	(int32_t)pdev->tuning_parms.tp_range_timeout_mz_us;
charlesmn	0:3ac96e360672	6020	break;
charlesmn	0:3ac96e360672	6021	case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6022	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6023	(int32_t)pdev->tuning_parms.tp_range_timeout_timed_us;
charlesmn	0:3ac96e360672	6024	break;
charlesmn	0:3ac96e360672	6025	case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
charlesmn	0:3ac96e360672	6026	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6027	(int32_t)pdev->smudge_correct_config.smudge_margin;
charlesmn	0:3ac96e360672	6028	break;
charlesmn	0:3ac96e360672	6029	case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
charlesmn	0:3ac96e360672	6030	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6031	(int32_t)pdev->smudge_correct_config.noise_margin;
charlesmn	0:3ac96e360672	6032	break;
charlesmn	0:3ac96e360672	6033	case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
charlesmn	0:3ac96e360672	6034	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6035	(int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit;
charlesmn	0:3ac96e360672	6036	break;
charlesmn	0:3ac96e360672	6037	case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
charlesmn	0:3ac96e360672	6038	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6039	(int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit_hi;
charlesmn	0:3ac96e360672	6040	break;
charlesmn	0:3ac96e360672	6041	case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
charlesmn	0:3ac96e360672	6042	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6043	(int32_t)pdev->smudge_correct_config.sample_limit;
charlesmn	0:3ac96e360672	6044	break;
charlesmn	0:3ac96e360672	6045	case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
charlesmn	0:3ac96e360672	6046	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6047	(int32_t)pdev->smudge_correct_config.single_xtalk_delta;
charlesmn	0:3ac96e360672	6048	break;
charlesmn	0:3ac96e360672	6049	case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
charlesmn	0:3ac96e360672	6050	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6051	(int32_t)pdev->smudge_correct_config.averaged_xtalk_delta;
charlesmn	0:3ac96e360672	6052	break;
charlesmn	0:3ac96e360672	6053	case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
charlesmn	0:3ac96e360672	6054	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6055	(int32_t)pdev->smudge_correct_config.smudge_corr_clip_limit;
charlesmn	0:3ac96e360672	6056	break;
charlesmn	0:3ac96e360672	6057	case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
charlesmn	0:3ac96e360672	6058	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6059	(int32_t)pdev->smudge_correct_config.scaler_calc_method;
charlesmn	0:3ac96e360672	6060	break;
charlesmn	0:3ac96e360672	6061	case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
charlesmn	0:3ac96e360672	6062	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6063	(int32_t)pdev->smudge_correct_config.x_gradient_scaler;
charlesmn	0:3ac96e360672	6064	break;
charlesmn	0:3ac96e360672	6065	case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
charlesmn	0:3ac96e360672	6066	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6067	(int32_t)pdev->smudge_correct_config.y_gradient_scaler;
charlesmn	0:3ac96e360672	6068	break;
charlesmn	0:3ac96e360672	6069	case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
charlesmn	0:3ac96e360672	6070	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6071	(int32_t)pdev->smudge_correct_config.user_scaler_set;
charlesmn	0:3ac96e360672	6072	break;
charlesmn	0:3ac96e360672	6073	case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
charlesmn	0:3ac96e360672	6074	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6075	(int32_t)pdev->smudge_correct_config.smudge_corr_single_apply;
charlesmn	0:3ac96e360672	6076	break;
charlesmn	0:3ac96e360672	6077	case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
charlesmn	0:3ac96e360672	6078	*ptuning_parm_value = (int32_t)(
charlesmn	0:3ac96e360672	6079	pdev->smudge_correct_config.smudge_corr_ambient_threshold);
charlesmn	0:3ac96e360672	6080	break;
charlesmn	0:3ac96e360672	6081	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
charlesmn	0:3ac96e360672	6082	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6083	(int32_t)pdev->smudge_correct_config.nodetect_ambient_threshold;
charlesmn	0:3ac96e360672	6084	break;
charlesmn	0:3ac96e360672	6085	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
charlesmn	0:3ac96e360672	6086	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6087	(int32_t)pdev->smudge_correct_config.nodetect_sample_limit;
charlesmn	0:3ac96e360672	6088	break;
charlesmn	0:3ac96e360672	6089	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
charlesmn	0:3ac96e360672	6090	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6091	(int32_t)pdev->smudge_correct_config.nodetect_xtalk_offset;
charlesmn	0:3ac96e360672	6092	break;
charlesmn	0:3ac96e360672	6093	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
charlesmn	0:3ac96e360672	6094	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6095	(int32_t)pdev->smudge_correct_config.nodetect_min_range_mm;
charlesmn	0:3ac96e360672	6096	break;
charlesmn	0:3ac96e360672	6097	case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
charlesmn	0:3ac96e360672	6098	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6099	(int32_t)pdev->low_power_auto_data.vhv_loop_bound;
charlesmn	0:3ac96e360672	6100	break;
charlesmn	0:3ac96e360672	6101	case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6102	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6103	(int32_t)pdev->tuning_parms.tp_mm_timeout_lpa_us;
charlesmn	0:3ac96e360672	6104	break;
charlesmn	0:3ac96e360672	6105	case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6106	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6107	(int32_t)pdev->tuning_parms.tp_range_timeout_lpa_us;
charlesmn	0:3ac96e360672	6108	break;
charlesmn	0:3ac96e360672	6109	case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	6110	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6111	(int32_t)pdev->tuning_parms.tp_dss_target_very_short_mcps;
charlesmn	0:3ac96e360672	6112	break;
charlesmn	0:3ac96e360672	6113	case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER:
charlesmn	0:3ac96e360672	6114	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6115	(int32_t) pdev->tuning_parms.tp_phasecal_patch_power;
charlesmn	0:3ac96e360672	6116	break;
charlesmn	0:3ac96e360672	6117	case VL53L1_TUNINGPARM_HIST_MERGE:
charlesmn	0:3ac96e360672	6118	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6119	(int32_t) pdev->tuning_parms.tp_hist_merge;
charlesmn	0:3ac96e360672	6120	break;
charlesmn	0:3ac96e360672	6121	case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD:
charlesmn	0:3ac96e360672	6122	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6123	(int32_t) pdev->tuning_parms.tp_reset_merge_threshold;
charlesmn	0:3ac96e360672	6124	break;
charlesmn	0:3ac96e360672	6125	case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE:
charlesmn	0:3ac96e360672	6126	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6127	(int32_t) pdev->tuning_parms.tp_hist_merge_max_size;
charlesmn	0:3ac96e360672	6128	break;
charlesmn	0:3ac96e360672	6129	case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
charlesmn	0:3ac96e360672	6130	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6131	pdev->smudge_correct_config.max_smudge_factor;
charlesmn	0:3ac96e360672	6132	break;
charlesmn	0:3ac96e360672	6133
charlesmn	0:3ac96e360672	6134	case VL53L1_TUNINGPARM_UWR_ENABLE:
charlesmn	0:3ac96e360672	6135	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6136	pdev->tuning_parms.tp_uwr_enable;
charlesmn	0:3ac96e360672	6137	break;
charlesmn	0:3ac96e360672	6138	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
charlesmn	0:3ac96e360672	6139	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6140	pdev->tuning_parms.tp_uwr_med_z_1_min;
charlesmn	0:3ac96e360672	6141	break;
charlesmn	0:3ac96e360672	6142	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
charlesmn	0:3ac96e360672	6143	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6144	pdev->tuning_parms.tp_uwr_med_z_1_max;
charlesmn	0:3ac96e360672	6145	break;
charlesmn	0:3ac96e360672	6146	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
charlesmn	0:3ac96e360672	6147	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6148	pdev->tuning_parms.tp_uwr_med_z_2_min;
charlesmn	0:3ac96e360672	6149	break;
charlesmn	0:3ac96e360672	6150	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
charlesmn	0:3ac96e360672	6151	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6152	pdev->tuning_parms.tp_uwr_med_z_2_max;
charlesmn	0:3ac96e360672	6153	break;
charlesmn	0:3ac96e360672	6154	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
charlesmn	0:3ac96e360672	6155	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6156	pdev->tuning_parms.tp_uwr_med_z_3_min;
charlesmn	0:3ac96e360672	6157	break;
charlesmn	0:3ac96e360672	6158	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
charlesmn	0:3ac96e360672	6159	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6160	pdev->tuning_parms.tp_uwr_med_z_3_max;
charlesmn	0:3ac96e360672	6161	break;
charlesmn	0:3ac96e360672	6162	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
charlesmn	0:3ac96e360672	6163	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6164	pdev->tuning_parms.tp_uwr_med_z_4_min;
charlesmn	0:3ac96e360672	6165	break;
charlesmn	0:3ac96e360672	6166	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
charlesmn	0:3ac96e360672	6167	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6168	pdev->tuning_parms.tp_uwr_med_z_4_max;
charlesmn	0:3ac96e360672	6169	break;
charlesmn	0:3ac96e360672	6170	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
charlesmn	0:3ac96e360672	6171	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6172	pdev->tuning_parms.tp_uwr_med_z_5_min;
charlesmn	0:3ac96e360672	6173	break;
charlesmn	0:3ac96e360672	6174	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
charlesmn	0:3ac96e360672	6175	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6176	pdev->tuning_parms.tp_uwr_med_z_5_max;
charlesmn	0:3ac96e360672	6177	break;
charlesmn	0:3ac96e360672	6178	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN:
charlesmn	0:3ac96e360672	6179	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6180	pdev->tuning_parms.tp_uwr_med_z_6_min;
charlesmn	0:3ac96e360672	6181	break;
charlesmn	0:3ac96e360672	6182	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX:
charlesmn	0:3ac96e360672	6183	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6184	pdev->tuning_parms.tp_uwr_med_z_6_max;
charlesmn	0:3ac96e360672	6185	break;
charlesmn	0:3ac96e360672	6186	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
charlesmn	0:3ac96e360672	6187	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6188	pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea;
charlesmn	0:3ac96e360672	6189	break;
charlesmn	0:3ac96e360672	6190	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
charlesmn	0:3ac96e360672	6191	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6192	pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb;
charlesmn	0:3ac96e360672	6193	break;
charlesmn	0:3ac96e360672	6194	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
charlesmn	0:3ac96e360672	6195	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6196	pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea;
charlesmn	0:3ac96e360672	6197	break;
charlesmn	0:3ac96e360672	6198	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
charlesmn	0:3ac96e360672	6199	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6200	pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb;
charlesmn	0:3ac96e360672	6201	break;
charlesmn	0:3ac96e360672	6202	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
charlesmn	0:3ac96e360672	6203	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6204	pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea;
charlesmn	0:3ac96e360672	6205	break;
charlesmn	0:3ac96e360672	6206	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
charlesmn	0:3ac96e360672	6207	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6208	pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb;
charlesmn	0:3ac96e360672	6209	break;
charlesmn	0:3ac96e360672	6210	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
charlesmn	0:3ac96e360672	6211	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6212	pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea;
charlesmn	0:3ac96e360672	6213	break;
charlesmn	0:3ac96e360672	6214	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
charlesmn	0:3ac96e360672	6215	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6216	pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb;
charlesmn	0:3ac96e360672	6217	break;
charlesmn	0:3ac96e360672	6218	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
charlesmn	0:3ac96e360672	6219	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6220	pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea;
charlesmn	0:3ac96e360672	6221	break;
charlesmn	0:3ac96e360672	6222	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
charlesmn	0:3ac96e360672	6223	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6224	pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb;
charlesmn	0:3ac96e360672	6225	break;
charlesmn	0:3ac96e360672	6226	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA:
charlesmn	0:3ac96e360672	6227	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6228	pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea;
charlesmn	0:3ac96e360672	6229	break;
charlesmn	0:3ac96e360672	6230	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB:
charlesmn	0:3ac96e360672	6231	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6232	pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb;
charlesmn	0:3ac96e360672	6233	break;
charlesmn	0:3ac96e360672	6234	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
charlesmn	0:3ac96e360672	6235	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6236	pdev->tuning_parms.tp_uwr_lng_z_1_min;
charlesmn	0:3ac96e360672	6237	break;
charlesmn	0:3ac96e360672	6238	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
charlesmn	0:3ac96e360672	6239	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6240	pdev->tuning_parms.tp_uwr_lng_z_1_max;
charlesmn	0:3ac96e360672	6241	break;
charlesmn	0:3ac96e360672	6242	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
charlesmn	0:3ac96e360672	6243	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6244	pdev->tuning_parms.tp_uwr_lng_z_2_min;
charlesmn	0:3ac96e360672	6245	break;
charlesmn	0:3ac96e360672	6246	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
charlesmn	0:3ac96e360672	6247	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6248	pdev->tuning_parms.tp_uwr_lng_z_2_max;
charlesmn	0:3ac96e360672	6249	break;
charlesmn	0:3ac96e360672	6250	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
charlesmn	0:3ac96e360672	6251	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6252	pdev->tuning_parms.tp_uwr_lng_z_3_min;
charlesmn	0:3ac96e360672	6253	break;
charlesmn	0:3ac96e360672	6254	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
charlesmn	0:3ac96e360672	6255	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6256	pdev->tuning_parms.tp_uwr_lng_z_3_max;
charlesmn	0:3ac96e360672	6257	break;
charlesmn	0:3ac96e360672	6258	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
charlesmn	0:3ac96e360672	6259	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6260	pdev->tuning_parms.tp_uwr_lng_z_4_min;
charlesmn	0:3ac96e360672	6261	break;
charlesmn	0:3ac96e360672	6262	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
charlesmn	0:3ac96e360672	6263	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6264	pdev->tuning_parms.tp_uwr_lng_z_4_max;
charlesmn	0:3ac96e360672	6265	break;
charlesmn	0:3ac96e360672	6266	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
charlesmn	0:3ac96e360672	6267	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6268	pdev->tuning_parms.tp_uwr_lng_z_5_min;
charlesmn	0:3ac96e360672	6269	break;
charlesmn	0:3ac96e360672	6270	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
charlesmn	0:3ac96e360672	6271	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6272	pdev->tuning_parms.tp_uwr_lng_z_5_max;
charlesmn	0:3ac96e360672	6273	break;
charlesmn	0:3ac96e360672	6274	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
charlesmn	0:3ac96e360672	6275	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6276	pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea;
charlesmn	0:3ac96e360672	6277	break;
charlesmn	0:3ac96e360672	6278	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
charlesmn	0:3ac96e360672	6279	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6280	pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb;
charlesmn	0:3ac96e360672	6281	break;
charlesmn	0:3ac96e360672	6282	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
charlesmn	0:3ac96e360672	6283	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6284	pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea;
charlesmn	0:3ac96e360672	6285	break;
charlesmn	0:3ac96e360672	6286	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
charlesmn	0:3ac96e360672	6287	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6288	pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb;
charlesmn	0:3ac96e360672	6289	break;
charlesmn	0:3ac96e360672	6290	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
charlesmn	0:3ac96e360672	6291	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6292	pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea;
charlesmn	0:3ac96e360672	6293	break;
charlesmn	0:3ac96e360672	6294	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
charlesmn	0:3ac96e360672	6295	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6296	pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb;
charlesmn	0:3ac96e360672	6297	break;
charlesmn	0:3ac96e360672	6298	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
charlesmn	0:3ac96e360672	6299	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6300	pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea;
charlesmn	0:3ac96e360672	6301	break;
charlesmn	0:3ac96e360672	6302	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
charlesmn	0:3ac96e360672	6303	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6304	pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb;
charlesmn	0:3ac96e360672	6305	break;
charlesmn	0:3ac96e360672	6306	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
charlesmn	0:3ac96e360672	6307	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6308	pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea;
charlesmn	0:3ac96e360672	6309	break;
charlesmn	0:3ac96e360672	6310	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
charlesmn	0:3ac96e360672	6311	*ptuning_parm_value =
charlesmn	0:3ac96e360672	6312	pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb;
charlesmn	0:3ac96e360672	6313	break;
charlesmn	0:3ac96e360672	6314
charlesmn	0:3ac96e360672	6315	default:
charlesmn	0:3ac96e360672	6316	*ptuning_parm_value = 0x7FFFFFFF;
charlesmn	0:3ac96e360672	6317	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	6318	break;
charlesmn	0:3ac96e360672	6319
charlesmn	0:3ac96e360672	6320	}
charlesmn	0:3ac96e360672	6321
charlesmn	0:3ac96e360672	6322	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	6323
charlesmn	0:3ac96e360672	6324	return status;
charlesmn	0:3ac96e360672	6325	}
charlesmn	0:3ac96e360672	6326
charlesmn	0:3ac96e360672	6327	VL53L1_Error VL53L1_set_tuning_parm(
charlesmn	0:3ac96e360672	6328	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	6329	VL53L1_TuningParms tuning_parm_key,
charlesmn	0:3ac96e360672	6330	int32_t tuning_parm_value)
charlesmn	0:3ac96e360672	6331	{
charlesmn	0:3ac96e360672	6332
charlesmn	0:3ac96e360672	6333
charlesmn	0:3ac96e360672	6334
charlesmn	0:3ac96e360672	6335	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	6336
charlesmn	0:3ac96e360672	6337	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	6338	VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess);
charlesmn	0:3ac96e360672	6339	VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg);
charlesmn	0:3ac96e360672	6340
charlesmn	0:3ac96e360672	6341	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	6342
charlesmn	0:3ac96e360672	6343	switch (tuning_parm_key) {
charlesmn	0:3ac96e360672	6344
charlesmn	0:3ac96e360672	6345	case VL53L1_TUNINGPARM_VERSION:
charlesmn	0:3ac96e360672	6346	pdev->tuning_parms.tp_tuning_parm_version =
charlesmn	0:3ac96e360672	6347	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6348	break;
charlesmn	0:3ac96e360672	6349	case VL53L1_TUNINGPARM_KEY_TABLE_VERSION:
charlesmn	0:3ac96e360672	6350	pdev->tuning_parms.tp_tuning_parm_key_table_version =
charlesmn	0:3ac96e360672	6351	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6352
charlesmn	0:3ac96e360672	6353
charlesmn	0:3ac96e360672	6354
charlesmn	0:3ac96e360672	6355	if ((uint16_t)tuning_parm_value
charlesmn	0:3ac96e360672	6356	!= VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT)
charlesmn	0:3ac96e360672	6357	status = VL53L1_ERROR_TUNING_PARM_KEY_MISMATCH;
charlesmn	0:3ac96e360672	6358
charlesmn	0:3ac96e360672	6359	break;
charlesmn	0:3ac96e360672	6360	case VL53L1_TUNINGPARM_LLD_VERSION:
charlesmn	0:3ac96e360672	6361	pdev->tuning_parms.tp_tuning_parm_lld_version =
charlesmn	0:3ac96e360672	6362	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6363	break;
charlesmn	0:3ac96e360672	6364	case VL53L1_TUNINGPARM_HIST_ALGO_SELECT:
charlesmn	0:3ac96e360672	6365	pHP->hist_algo_select =
charlesmn	0:3ac96e360672	6366	(VL53L1_HistAlgoSelect)tuning_parm_value;
charlesmn	0:3ac96e360672	6367	break;
charlesmn	0:3ac96e360672	6368	case VL53L1_TUNINGPARM_HIST_TARGET_ORDER:
charlesmn	0:3ac96e360672	6369	pHP->hist_target_order =
charlesmn	0:3ac96e360672	6370	(VL53L1_HistTargetOrder)tuning_parm_value;
charlesmn	0:3ac96e360672	6371	break;
charlesmn	0:3ac96e360672	6372	case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0:
charlesmn	0:3ac96e360672	6373	pHP->filter_woi0 =
charlesmn	0:3ac96e360672	6374	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6375	break;
charlesmn	0:3ac96e360672	6376	case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1:
charlesmn	0:3ac96e360672	6377	pHP->filter_woi1 =
charlesmn	0:3ac96e360672	6378	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6379	break;
charlesmn	0:3ac96e360672	6380	case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD:
charlesmn	0:3ac96e360672	6381	pHP->hist_amb_est_method =
charlesmn	0:3ac96e360672	6382	(VL53L1_HistAmbEstMethod)tuning_parm_value;
charlesmn	0:3ac96e360672	6383	break;
charlesmn	0:3ac96e360672	6384	case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0:
charlesmn	0:3ac96e360672	6385	pHP->ambient_thresh_sigma0 =
charlesmn	0:3ac96e360672	6386	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6387	break;
charlesmn	0:3ac96e360672	6388	case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1:
charlesmn	0:3ac96e360672	6389	pHP->ambient_thresh_sigma1 =
charlesmn	0:3ac96e360672	6390	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6391	break;
charlesmn	0:3ac96e360672	6392	case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS:
charlesmn	0:3ac96e360672	6393	pHP->min_ambient_thresh_events =
charlesmn	0:3ac96e360672	6394	(int32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6395	break;
charlesmn	0:3ac96e360672	6396	case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER:
charlesmn	0:3ac96e360672	6397	pHP->ambient_thresh_events_scaler =
charlesmn	0:3ac96e360672	6398	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6399	break;
charlesmn	0:3ac96e360672	6400	case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD:
charlesmn	0:3ac96e360672	6401	pHP->noise_threshold =
charlesmn	0:3ac96e360672	6402	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6403	break;
charlesmn	0:3ac96e360672	6404	case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT:
charlesmn	0:3ac96e360672	6405	pHP->signal_total_events_limit =
charlesmn	0:3ac96e360672	6406	(int32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6407	break;
charlesmn	0:3ac96e360672	6408	case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM:
charlesmn	0:3ac96e360672	6409	pHP->sigma_estimator__sigma_ref_mm =
charlesmn	0:3ac96e360672	6410	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6411	break;
charlesmn	0:3ac96e360672	6412	case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	6413	pHP->sigma_thresh =
charlesmn	0:3ac96e360672	6414	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6415	break;
charlesmn	0:3ac96e360672	6416	case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR:
charlesmn	0:3ac96e360672	6417	pdev->gain_cal.histogram_ranging_gain_factor =
charlesmn	0:3ac96e360672	6418	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6419	break;
charlesmn	0:3ac96e360672	6420	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE:
charlesmn	0:3ac96e360672	6421	pHP->algo__consistency_check__phase_tolerance =
charlesmn	0:3ac96e360672	6422	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6423	break;
charlesmn	0:3ac96e360672	6424	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM:
charlesmn	0:3ac96e360672	6425	pHP->algo__consistency_check__min_max_tolerance =
charlesmn	0:3ac96e360672	6426	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6427	break;
charlesmn	0:3ac96e360672	6428	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA:
charlesmn	0:3ac96e360672	6429	pHP->algo__consistency_check__event_sigma =
charlesmn	0:3ac96e360672	6430	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6431	break;
charlesmn	0:3ac96e360672	6432	case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT:
charlesmn	0:3ac96e360672	6433	pHP->algo__consistency_check__event_min_spad_count =
charlesmn	0:3ac96e360672	6434	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6435	break;
charlesmn	0:3ac96e360672	6436	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE:
charlesmn	0:3ac96e360672	6437	pdev->tuning_parms.tp_init_phase_rtn_hist_long =
charlesmn	0:3ac96e360672	6438	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6439	break;
charlesmn	0:3ac96e360672	6440	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE:
charlesmn	0:3ac96e360672	6441	pdev->tuning_parms.tp_init_phase_rtn_hist_med =
charlesmn	0:3ac96e360672	6442	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6443	break;
charlesmn	0:3ac96e360672	6444	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE:
charlesmn	0:3ac96e360672	6445	pdev->tuning_parms.tp_init_phase_rtn_hist_short =
charlesmn	0:3ac96e360672	6446	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6447	break;
charlesmn	0:3ac96e360672	6448	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE:
charlesmn	0:3ac96e360672	6449	pdev->tuning_parms.tp_init_phase_ref_hist_long =
charlesmn	0:3ac96e360672	6450	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6451	break;
charlesmn	0:3ac96e360672	6452	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE:
charlesmn	0:3ac96e360672	6453	pdev->tuning_parms.tp_init_phase_ref_hist_med =
charlesmn	0:3ac96e360672	6454	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6455	break;
charlesmn	0:3ac96e360672	6456	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE:
charlesmn	0:3ac96e360672	6457	pdev->tuning_parms.tp_init_phase_ref_hist_short =
charlesmn	0:3ac96e360672	6458	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6459	break;
charlesmn	0:3ac96e360672	6460	case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM:
charlesmn	0:3ac96e360672	6461	pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm =
charlesmn	0:3ac96e360672	6462	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6463	break;
charlesmn	0:3ac96e360672	6464	case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM:
charlesmn	0:3ac96e360672	6465	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm =
charlesmn	0:3ac96e360672	6466	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6467	break;
charlesmn	0:3ac96e360672	6468	case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM:
charlesmn	0:3ac96e360672	6469	pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm =
charlesmn	0:3ac96e360672	6470	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6471	break;
charlesmn	0:3ac96e360672	6472	case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE:
charlesmn	0:3ac96e360672	6473	pHP->algo__crosstalk_detect_min_max_tolerance =
charlesmn	0:3ac96e360672	6474	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6475	break;
charlesmn	0:3ac96e360672	6476	case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS:
charlesmn	0:3ac96e360672	6477	pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	6478	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6479	break;
charlesmn	0:3ac96e360672	6480	case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA:
charlesmn	0:3ac96e360672	6481	pHP->algo__crosstalk_detect_event_sigma =
charlesmn	0:3ac96e360672	6482	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6483	break;
charlesmn	0:3ac96e360672	6484	case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS:
charlesmn	0:3ac96e360672	6485	pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps =
charlesmn	0:3ac96e360672	6486	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6487	break;
charlesmn	0:3ac96e360672	6488	case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE:
charlesmn	0:3ac96e360672	6489	pdev->tuning_parms.tp_consistency_lite_phase_tolerance =
charlesmn	0:3ac96e360672	6490	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6491	break;
charlesmn	0:3ac96e360672	6492	case VL53L1_TUNINGPARM_PHASECAL_TARGET:
charlesmn	0:3ac96e360672	6493	pdev->tuning_parms.tp_phasecal_target =
charlesmn	0:3ac96e360672	6494	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6495	break;
charlesmn	0:3ac96e360672	6496	case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE:
charlesmn	0:3ac96e360672	6497	pdev->tuning_parms.tp_cal_repeat_rate =
charlesmn	0:3ac96e360672	6498	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6499	break;
charlesmn	0:3ac96e360672	6500	case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR:
charlesmn	0:3ac96e360672	6501	pdev->gain_cal.standard_ranging_gain_factor =
charlesmn	0:3ac96e360672	6502	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6503	break;
charlesmn	0:3ac96e360672	6504	case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM:
charlesmn	0:3ac96e360672	6505	pdev->tuning_parms.tp_lite_min_clip =
charlesmn	0:3ac96e360672	6506	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6507	break;
charlesmn	0:3ac96e360672	6508	case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	6509	pdev->tuning_parms.tp_lite_long_sigma_thresh_mm =
charlesmn	0:3ac96e360672	6510	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6511	break;
charlesmn	0:3ac96e360672	6512	case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	6513	pdev->tuning_parms.tp_lite_med_sigma_thresh_mm =
charlesmn	0:3ac96e360672	6514	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6515	break;
charlesmn	0:3ac96e360672	6516	case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM:
charlesmn	0:3ac96e360672	6517	pdev->tuning_parms.tp_lite_short_sigma_thresh_mm =
charlesmn	0:3ac96e360672	6518	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6519	break;
charlesmn	0:3ac96e360672	6520	case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS:
charlesmn	0:3ac96e360672	6521	pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	6522	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6523	break;
charlesmn	0:3ac96e360672	6524	case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS:
charlesmn	0:3ac96e360672	6525	pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	6526	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6527	break;
charlesmn	0:3ac96e360672	6528	case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS:
charlesmn	0:3ac96e360672	6529	pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps =
charlesmn	0:3ac96e360672	6530	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6531	break;
charlesmn	0:3ac96e360672	6532	case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH:
charlesmn	0:3ac96e360672	6533	pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns =
charlesmn	0:3ac96e360672	6534	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6535	break;
charlesmn	0:3ac96e360672	6536	case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS:
charlesmn	0:3ac96e360672	6537	pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns =
charlesmn	0:3ac96e360672	6538	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6539	break;
charlesmn	0:3ac96e360672	6540	case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM:
charlesmn	0:3ac96e360672	6541	pdev->tuning_parms.tp_lite_sigma_ref_mm =
charlesmn	0:3ac96e360672	6542	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6543	break;
charlesmn	0:3ac96e360672	6544	case VL53L1_TUNINGPARM_LITE_RIT_MULT:
charlesmn	0:3ac96e360672	6545	pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult =
charlesmn	0:3ac96e360672	6546	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6547	break;
charlesmn	0:3ac96e360672	6548	case VL53L1_TUNINGPARM_LITE_SEED_CONFIG:
charlesmn	0:3ac96e360672	6549	pdev->tuning_parms.tp_lite_seed_cfg =
charlesmn	0:3ac96e360672	6550	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6551	break;
charlesmn	0:3ac96e360672	6552	case VL53L1_TUNINGPARM_LITE_QUANTIFIER:
charlesmn	0:3ac96e360672	6553	pdev->tuning_parms.tp_lite_quantifier =
charlesmn	0:3ac96e360672	6554	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6555	break;
charlesmn	0:3ac96e360672	6556	case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT:
charlesmn	0:3ac96e360672	6557	pdev->tuning_parms.tp_lite_first_order_select =
charlesmn	0:3ac96e360672	6558	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6559	break;
charlesmn	0:3ac96e360672	6560	case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS:
charlesmn	0:3ac96e360672	6561	pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps =
charlesmn	0:3ac96e360672	6562	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6563	break;
charlesmn	0:3ac96e360672	6564	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE:
charlesmn	0:3ac96e360672	6565	pdev->tuning_parms.tp_init_phase_rtn_lite_long =
charlesmn	0:3ac96e360672	6566	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6567	break;
charlesmn	0:3ac96e360672	6568	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE:
charlesmn	0:3ac96e360672	6569	pdev->tuning_parms.tp_init_phase_rtn_lite_med =
charlesmn	0:3ac96e360672	6570	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6571	break;
charlesmn	0:3ac96e360672	6572	case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE:
charlesmn	0:3ac96e360672	6573	pdev->tuning_parms.tp_init_phase_rtn_lite_short =
charlesmn	0:3ac96e360672	6574	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6575	break;
charlesmn	0:3ac96e360672	6576	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE:
charlesmn	0:3ac96e360672	6577	pdev->tuning_parms.tp_init_phase_ref_lite_long =
charlesmn	0:3ac96e360672	6578	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6579	break;
charlesmn	0:3ac96e360672	6580	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE:
charlesmn	0:3ac96e360672	6581	pdev->tuning_parms.tp_init_phase_ref_lite_med =
charlesmn	0:3ac96e360672	6582	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6583	break;
charlesmn	0:3ac96e360672	6584	case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE:
charlesmn	0:3ac96e360672	6585	pdev->tuning_parms.tp_init_phase_ref_lite_short =
charlesmn	0:3ac96e360672	6586	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6587	break;
charlesmn	0:3ac96e360672	6588	case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG:
charlesmn	0:3ac96e360672	6589	pdev->tuning_parms.tp_timed_seed_cfg =
charlesmn	0:3ac96e360672	6590	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6591	break;
charlesmn	0:3ac96e360672	6592	case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA:
charlesmn	0:3ac96e360672	6593	pdev->dmax_cfg.signal_thresh_sigma =
charlesmn	0:3ac96e360672	6594	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6595	break;
charlesmn	0:3ac96e360672	6596	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0:
charlesmn	0:3ac96e360672	6597	pdev->dmax_cfg.target_reflectance_for_dmax_calc[0] =
charlesmn	0:3ac96e360672	6598	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6599	break;
charlesmn	0:3ac96e360672	6600	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1:
charlesmn	0:3ac96e360672	6601	pdev->dmax_cfg.target_reflectance_for_dmax_calc[1] =
charlesmn	0:3ac96e360672	6602	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6603	break;
charlesmn	0:3ac96e360672	6604	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2:
charlesmn	0:3ac96e360672	6605	pdev->dmax_cfg.target_reflectance_for_dmax_calc[2] =
charlesmn	0:3ac96e360672	6606	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6607	break;
charlesmn	0:3ac96e360672	6608	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3:
charlesmn	0:3ac96e360672	6609	pdev->dmax_cfg.target_reflectance_for_dmax_calc[3] =
charlesmn	0:3ac96e360672	6610	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6611	break;
charlesmn	0:3ac96e360672	6612	case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4:
charlesmn	0:3ac96e360672	6613	pdev->dmax_cfg.target_reflectance_for_dmax_calc[4] =
charlesmn	0:3ac96e360672	6614	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6615	break;
charlesmn	0:3ac96e360672	6616	case VL53L1_TUNINGPARM_VHV_LOOPBOUND:
charlesmn	0:3ac96e360672	6617	pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound =
charlesmn	0:3ac96e360672	6618	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6619	break;
charlesmn	0:3ac96e360672	6620	case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE:
charlesmn	0:3ac96e360672	6621	pdev->refspadchar.device_test_mode =
charlesmn	0:3ac96e360672	6622	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6623	break;
charlesmn	0:3ac96e360672	6624	case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD:
charlesmn	0:3ac96e360672	6625	pdev->refspadchar.VL53L1_p_009 =
charlesmn	0:3ac96e360672	6626	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6627	break;
charlesmn	0:3ac96e360672	6628	case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	6629	pdev->refspadchar.timeout_us =
charlesmn	0:3ac96e360672	6630	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6631	break;
charlesmn	0:3ac96e360672	6632	case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS:
charlesmn	0:3ac96e360672	6633	pdev->refspadchar.target_count_rate_mcps =
charlesmn	0:3ac96e360672	6634	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6635	break;
charlesmn	0:3ac96e360672	6636	case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS:
charlesmn	0:3ac96e360672	6637	pdev->refspadchar.min_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	6638	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6639	break;
charlesmn	0:3ac96e360672	6640	case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS:
charlesmn	0:3ac96e360672	6641	pdev->refspadchar.max_count_rate_limit_mcps =
charlesmn	0:3ac96e360672	6642	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6643	break;
charlesmn	0:3ac96e360672	6644	case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES:
charlesmn	0:3ac96e360672	6645	pXC->num_of_samples =
charlesmn	0:3ac96e360672	6646	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6647	break;
charlesmn	0:3ac96e360672	6648	case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM:
charlesmn	0:3ac96e360672	6649	pXC->algo__crosstalk_extract_min_valid_range_mm =
charlesmn	0:3ac96e360672	6650	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6651	break;
charlesmn	0:3ac96e360672	6652	case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM:
charlesmn	0:3ac96e360672	6653	pXC->algo__crosstalk_extract_max_valid_range_mm =
charlesmn	0:3ac96e360672	6654	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6655	break;
charlesmn	0:3ac96e360672	6656	case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	6657	pXC->dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	6658	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6659	break;
charlesmn	0:3ac96e360672	6660	case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	6661	pXC->phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	6662	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6663	break;
charlesmn	0:3ac96e360672	6664	case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS:
charlesmn	0:3ac96e360672	6665	pXC->algo__crosstalk_extract_max_valid_rate_kcps =
charlesmn	0:3ac96e360672	6666	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6667	break;
charlesmn	0:3ac96e360672	6668	case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM:
charlesmn	0:3ac96e360672	6669	pXC->algo__crosstalk_extract_max_sigma_mm =
charlesmn	0:3ac96e360672	6670	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6671	break;
charlesmn	0:3ac96e360672	6672	case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US:
charlesmn	0:3ac96e360672	6673	pXC->mm_config_timeout_us =
charlesmn	0:3ac96e360672	6674	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6675	break;
charlesmn	0:3ac96e360672	6676	case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US:
charlesmn	0:3ac96e360672	6677	pXC->range_config_timeout_us =
charlesmn	0:3ac96e360672	6678	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6679	break;
charlesmn	0:3ac96e360672	6680	case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	6681	pdev->offsetcal_cfg.dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	6682	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6683	break;
charlesmn	0:3ac96e360672	6684	case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	6685	pdev->offsetcal_cfg.phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	6686	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6687	break;
charlesmn	0:3ac96e360672	6688	case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US:
charlesmn	0:3ac96e360672	6689	pdev->offsetcal_cfg.mm_config_timeout_us =
charlesmn	0:3ac96e360672	6690	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6691	break;
charlesmn	0:3ac96e360672	6692	case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US:
charlesmn	0:3ac96e360672	6693	pdev->offsetcal_cfg.range_config_timeout_us =
charlesmn	0:3ac96e360672	6694	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6695	break;
charlesmn	0:3ac96e360672	6696	case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES:
charlesmn	0:3ac96e360672	6697	pdev->offsetcal_cfg.pre_num_of_samples =
charlesmn	0:3ac96e360672	6698	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6699	break;
charlesmn	0:3ac96e360672	6700	case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES:
charlesmn	0:3ac96e360672	6701	pdev->offsetcal_cfg.mm1_num_of_samples =
charlesmn	0:3ac96e360672	6702	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6703	break;
charlesmn	0:3ac96e360672	6704	case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES:
charlesmn	0:3ac96e360672	6705	pdev->offsetcal_cfg.mm2_num_of_samples =
charlesmn	0:3ac96e360672	6706	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6707	break;
charlesmn	0:3ac96e360672	6708	case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	6709	pdev->zonecal_cfg.dss_config__target_total_rate_mcps =
charlesmn	0:3ac96e360672	6710	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6711	break;
charlesmn	0:3ac96e360672	6712	case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US:
charlesmn	0:3ac96e360672	6713	pdev->zonecal_cfg.phasecal_config_timeout_us =
charlesmn	0:3ac96e360672	6714	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6715	break;
charlesmn	0:3ac96e360672	6716	case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US:
charlesmn	0:3ac96e360672	6717	pdev->zonecal_cfg.mm_config_timeout_us =
charlesmn	0:3ac96e360672	6718	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6719	break;
charlesmn	0:3ac96e360672	6720	case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES:
charlesmn	0:3ac96e360672	6721	pdev->zonecal_cfg.phasecal_num_of_samples =
charlesmn	0:3ac96e360672	6722	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6723	break;
charlesmn	0:3ac96e360672	6724	case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US:
charlesmn	0:3ac96e360672	6725	pdev->zonecal_cfg.range_config_timeout_us =
charlesmn	0:3ac96e360672	6726	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6727	break;
charlesmn	0:3ac96e360672	6728	case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES:
charlesmn	0:3ac96e360672	6729	pdev->zonecal_cfg.zone_num_of_samples =
charlesmn	0:3ac96e360672	6730	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6731	break;
charlesmn	0:3ac96e360672	6732	case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD:
charlesmn	0:3ac96e360672	6733	pdev->ssc_cfg.VL53L1_p_009 =
charlesmn	0:3ac96e360672	6734	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6735	break;
charlesmn	0:3ac96e360672	6736	case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START:
charlesmn	0:3ac96e360672	6737	pdev->ssc_cfg.vcsel_start =
charlesmn	0:3ac96e360672	6738	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6739	break;
charlesmn	0:3ac96e360672	6740	case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS:
charlesmn	0:3ac96e360672	6741	pdev->ssc_cfg.rate_limit_mcps =
charlesmn	0:3ac96e360672	6742	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6743	break;
charlesmn	0:3ac96e360672	6744	case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	6745	pdev->tuning_parms.tp_dss_target_lite_mcps =
charlesmn	0:3ac96e360672	6746	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6747	break;
charlesmn	0:3ac96e360672	6748	case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	6749	pdev->tuning_parms.tp_dss_target_histo_mcps =
charlesmn	0:3ac96e360672	6750	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6751	break;
charlesmn	0:3ac96e360672	6752	case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	6753	pdev->tuning_parms.tp_dss_target_histo_mz_mcps =
charlesmn	0:3ac96e360672	6754	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6755	break;
charlesmn	0:3ac96e360672	6756	case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS:
charlesmn	0:3ac96e360672	6757	pdev->tuning_parms.tp_dss_target_timed_mcps =
charlesmn	0:3ac96e360672	6758	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6759	break;
charlesmn	0:3ac96e360672	6760	case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6761	pdev->tuning_parms.tp_phasecal_timeout_lite_us =
charlesmn	0:3ac96e360672	6762	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6763	break;
charlesmn	0:3ac96e360672	6764	case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6765	pdev->tuning_parms.tp_phasecal_timeout_hist_long_us =
charlesmn	0:3ac96e360672	6766	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6767	break;
charlesmn	0:3ac96e360672	6768	case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6769	pdev->tuning_parms.tp_phasecal_timeout_hist_med_us =
charlesmn	0:3ac96e360672	6770	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6771	break;
charlesmn	0:3ac96e360672	6772	case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6773	pdev->tuning_parms.tp_phasecal_timeout_hist_short_us =
charlesmn	0:3ac96e360672	6774	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6775	break;
charlesmn	0:3ac96e360672	6776	case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6777	pdev->tuning_parms.tp_phasecal_timeout_mz_long_us =
charlesmn	0:3ac96e360672	6778	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6779	break;
charlesmn	0:3ac96e360672	6780	case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6781	pdev->tuning_parms.tp_phasecal_timeout_mz_med_us =
charlesmn	0:3ac96e360672	6782	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6783	break;
charlesmn	0:3ac96e360672	6784	case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6785	pdev->tuning_parms.tp_phasecal_timeout_mz_short_us =
charlesmn	0:3ac96e360672	6786	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6787	break;
charlesmn	0:3ac96e360672	6788	case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6789	pdev->tuning_parms.tp_phasecal_timeout_timed_us =
charlesmn	0:3ac96e360672	6790	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6791	break;
charlesmn	0:3ac96e360672	6792	case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6793	pdev->tuning_parms.tp_mm_timeout_lite_us =
charlesmn	0:3ac96e360672	6794	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6795	break;
charlesmn	0:3ac96e360672	6796	case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6797	pdev->tuning_parms.tp_mm_timeout_histo_us =
charlesmn	0:3ac96e360672	6798	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6799	break;
charlesmn	0:3ac96e360672	6800	case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6801	pdev->tuning_parms.tp_mm_timeout_mz_us =
charlesmn	0:3ac96e360672	6802	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6803	break;
charlesmn	0:3ac96e360672	6804	case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6805	pdev->tuning_parms.tp_mm_timeout_timed_us =
charlesmn	0:3ac96e360672	6806	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6807	break;
charlesmn	0:3ac96e360672	6808	case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6809	pdev->tuning_parms.tp_range_timeout_lite_us =
charlesmn	0:3ac96e360672	6810	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6811	break;
charlesmn	0:3ac96e360672	6812	case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6813	pdev->tuning_parms.tp_range_timeout_histo_us =
charlesmn	0:3ac96e360672	6814	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6815	break;
charlesmn	0:3ac96e360672	6816	case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6817	pdev->tuning_parms.tp_range_timeout_mz_us =
charlesmn	0:3ac96e360672	6818	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6819	break;
charlesmn	0:3ac96e360672	6820	case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6821	pdev->tuning_parms.tp_range_timeout_timed_us =
charlesmn	0:3ac96e360672	6822	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6823	break;
charlesmn	0:3ac96e360672	6824	case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN:
charlesmn	0:3ac96e360672	6825	pdev->smudge_correct_config.smudge_margin =
charlesmn	0:3ac96e360672	6826	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6827	break;
charlesmn	0:3ac96e360672	6828	case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN:
charlesmn	0:3ac96e360672	6829	pdev->smudge_correct_config.noise_margin =
charlesmn	0:3ac96e360672	6830	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6831	break;
charlesmn	0:3ac96e360672	6832	case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT:
charlesmn	0:3ac96e360672	6833	pdev->smudge_correct_config.user_xtalk_offset_limit =
charlesmn	0:3ac96e360672	6834	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6835	break;
charlesmn	0:3ac96e360672	6836	case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI:
charlesmn	0:3ac96e360672	6837	pdev->smudge_correct_config.user_xtalk_offset_limit_hi =
charlesmn	0:3ac96e360672	6838	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6839	break;
charlesmn	0:3ac96e360672	6840	case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT:
charlesmn	0:3ac96e360672	6841	pdev->smudge_correct_config.sample_limit =
charlesmn	0:3ac96e360672	6842	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6843	break;
charlesmn	0:3ac96e360672	6844	case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA:
charlesmn	0:3ac96e360672	6845	pdev->smudge_correct_config.single_xtalk_delta =
charlesmn	0:3ac96e360672	6846	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6847	break;
charlesmn	0:3ac96e360672	6848	case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA:
charlesmn	0:3ac96e360672	6849	pdev->smudge_correct_config.averaged_xtalk_delta =
charlesmn	0:3ac96e360672	6850	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6851	break;
charlesmn	0:3ac96e360672	6852	case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT:
charlesmn	0:3ac96e360672	6853	pdev->smudge_correct_config.smudge_corr_clip_limit =
charlesmn	0:3ac96e360672	6854	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6855	break;
charlesmn	0:3ac96e360672	6856	case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD:
charlesmn	0:3ac96e360672	6857	pdev->smudge_correct_config.scaler_calc_method =
charlesmn	0:3ac96e360672	6858	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6859	break;
charlesmn	0:3ac96e360672	6860	case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER:
charlesmn	0:3ac96e360672	6861	pdev->smudge_correct_config.x_gradient_scaler =
charlesmn	0:3ac96e360672	6862	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6863	break;
charlesmn	0:3ac96e360672	6864	case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER:
charlesmn	0:3ac96e360672	6865	pdev->smudge_correct_config.y_gradient_scaler =
charlesmn	0:3ac96e360672	6866	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6867	break;
charlesmn	0:3ac96e360672	6868	case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET:
charlesmn	0:3ac96e360672	6869	pdev->smudge_correct_config.user_scaler_set =
charlesmn	0:3ac96e360672	6870	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6871	break;
charlesmn	0:3ac96e360672	6872
charlesmn	0:3ac96e360672	6873	case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY:
charlesmn	0:3ac96e360672	6874	pdev->smudge_correct_config.smudge_corr_single_apply =
charlesmn	0:3ac96e360672	6875	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6876	break;
charlesmn	0:3ac96e360672	6877	case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD:
charlesmn	0:3ac96e360672	6878	pdev->smudge_correct_config.smudge_corr_ambient_threshold =
charlesmn	0:3ac96e360672	6879	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6880	break;
charlesmn	0:3ac96e360672	6881	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS:
charlesmn	0:3ac96e360672	6882	pdev->smudge_correct_config.nodetect_ambient_threshold =
charlesmn	0:3ac96e360672	6883	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6884	break;
charlesmn	0:3ac96e360672	6885	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT:
charlesmn	0:3ac96e360672	6886	pdev->smudge_correct_config.nodetect_sample_limit =
charlesmn	0:3ac96e360672	6887	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6888	break;
charlesmn	0:3ac96e360672	6889	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS:
charlesmn	0:3ac96e360672	6890	pdev->smudge_correct_config.nodetect_xtalk_offset =
charlesmn	0:3ac96e360672	6891	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6892	break;
charlesmn	0:3ac96e360672	6893	case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM:
charlesmn	0:3ac96e360672	6894	pdev->smudge_correct_config.nodetect_min_range_mm =
charlesmn	0:3ac96e360672	6895	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6896	break;
charlesmn	0:3ac96e360672	6897	case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND:
charlesmn	0:3ac96e360672	6898	pdev->low_power_auto_data.vhv_loop_bound =
charlesmn	0:3ac96e360672	6899	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6900	break;
charlesmn	0:3ac96e360672	6901	case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6902	pdev->tuning_parms.tp_mm_timeout_lpa_us =
charlesmn	0:3ac96e360672	6903	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6904	break;
charlesmn	0:3ac96e360672	6905	case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US:
charlesmn	0:3ac96e360672	6906	pdev->tuning_parms.tp_range_timeout_lpa_us =
charlesmn	0:3ac96e360672	6907	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6908	break;
charlesmn	0:3ac96e360672	6909	case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS:
charlesmn	0:3ac96e360672	6910	pdev->tuning_parms.tp_dss_target_very_short_mcps =
charlesmn	0:3ac96e360672	6911	(uint16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6912	break;
charlesmn	0:3ac96e360672	6913	case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER:
charlesmn	0:3ac96e360672	6914	pdev->tuning_parms.tp_phasecal_patch_power =
charlesmn	0:3ac96e360672	6915	(uint16_t) tuning_parm_value;
charlesmn	0:3ac96e360672	6916	break;
charlesmn	0:3ac96e360672	6917	case VL53L1_TUNINGPARM_HIST_MERGE:
charlesmn	0:3ac96e360672	6918	pdev->tuning_parms.tp_hist_merge =
charlesmn	0:3ac96e360672	6919	(uint16_t) tuning_parm_value;
charlesmn	0:3ac96e360672	6920	break;
charlesmn	0:3ac96e360672	6921	case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD:
charlesmn	0:3ac96e360672	6922	pdev->tuning_parms.tp_reset_merge_threshold =
charlesmn	0:3ac96e360672	6923	(uint16_t) tuning_parm_value;
charlesmn	0:3ac96e360672	6924	break;
charlesmn	0:3ac96e360672	6925	case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE:
charlesmn	0:3ac96e360672	6926	pdev->tuning_parms.tp_hist_merge_max_size =
charlesmn	0:3ac96e360672	6927	(uint16_t) tuning_parm_value;
charlesmn	0:3ac96e360672	6928	break;
charlesmn	0:3ac96e360672	6929	case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR:
charlesmn	0:3ac96e360672	6930	pdev->smudge_correct_config.max_smudge_factor =
charlesmn	0:3ac96e360672	6931	(uint32_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6932	break;
charlesmn	0:3ac96e360672	6933
charlesmn	0:3ac96e360672	6934	case VL53L1_TUNINGPARM_UWR_ENABLE:
charlesmn	0:3ac96e360672	6935	pdev->tuning_parms.tp_uwr_enable =
charlesmn	0:3ac96e360672	6936	(uint8_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6937	break;
charlesmn	0:3ac96e360672	6938	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN:
charlesmn	0:3ac96e360672	6939	pdev->tuning_parms.tp_uwr_med_z_1_min =
charlesmn	0:3ac96e360672	6940	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6941	break;
charlesmn	0:3ac96e360672	6942	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX:
charlesmn	0:3ac96e360672	6943	pdev->tuning_parms.tp_uwr_med_z_1_max =
charlesmn	0:3ac96e360672	6944	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6945	break;
charlesmn	0:3ac96e360672	6946	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN:
charlesmn	0:3ac96e360672	6947	pdev->tuning_parms.tp_uwr_med_z_2_min =
charlesmn	0:3ac96e360672	6948	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6949	break;
charlesmn	0:3ac96e360672	6950	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX:
charlesmn	0:3ac96e360672	6951	pdev->tuning_parms.tp_uwr_med_z_2_max =
charlesmn	0:3ac96e360672	6952	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6953	break;
charlesmn	0:3ac96e360672	6954	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN:
charlesmn	0:3ac96e360672	6955	pdev->tuning_parms.tp_uwr_med_z_3_min =
charlesmn	0:3ac96e360672	6956	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6957	break;
charlesmn	0:3ac96e360672	6958	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX:
charlesmn	0:3ac96e360672	6959	pdev->tuning_parms.tp_uwr_med_z_3_max =
charlesmn	0:3ac96e360672	6960	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6961	break;
charlesmn	0:3ac96e360672	6962	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN:
charlesmn	0:3ac96e360672	6963	pdev->tuning_parms.tp_uwr_med_z_4_min =
charlesmn	0:3ac96e360672	6964	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6965	break;
charlesmn	0:3ac96e360672	6966	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX:
charlesmn	0:3ac96e360672	6967	pdev->tuning_parms.tp_uwr_med_z_4_max =
charlesmn	0:3ac96e360672	6968	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6969	break;
charlesmn	0:3ac96e360672	6970	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN:
charlesmn	0:3ac96e360672	6971	pdev->tuning_parms.tp_uwr_med_z_5_min =
charlesmn	0:3ac96e360672	6972	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6973	break;
charlesmn	0:3ac96e360672	6974	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX:
charlesmn	0:3ac96e360672	6975	pdev->tuning_parms.tp_uwr_med_z_5_max =
charlesmn	0:3ac96e360672	6976	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6977	break;
charlesmn	0:3ac96e360672	6978	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN:
charlesmn	0:3ac96e360672	6979	pdev->tuning_parms.tp_uwr_med_z_6_min =
charlesmn	0:3ac96e360672	6980	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6981	break;
charlesmn	0:3ac96e360672	6982	case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX:
charlesmn	0:3ac96e360672	6983	pdev->tuning_parms.tp_uwr_med_z_6_max =
charlesmn	0:3ac96e360672	6984	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6985	break;
charlesmn	0:3ac96e360672	6986	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA:
charlesmn	0:3ac96e360672	6987	pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea =
charlesmn	0:3ac96e360672	6988	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6989	break;
charlesmn	0:3ac96e360672	6990	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB:
charlesmn	0:3ac96e360672	6991	pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb =
charlesmn	0:3ac96e360672	6992	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6993	break;
charlesmn	0:3ac96e360672	6994	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA:
charlesmn	0:3ac96e360672	6995	pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea =
charlesmn	0:3ac96e360672	6996	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	6997	break;
charlesmn	0:3ac96e360672	6998	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB:
charlesmn	0:3ac96e360672	6999	pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb =
charlesmn	0:3ac96e360672	7000	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7001	break;
charlesmn	0:3ac96e360672	7002	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA:
charlesmn	0:3ac96e360672	7003	pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea =
charlesmn	0:3ac96e360672	7004	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7005	break;
charlesmn	0:3ac96e360672	7006	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB:
charlesmn	0:3ac96e360672	7007	pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb =
charlesmn	0:3ac96e360672	7008	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7009	break;
charlesmn	0:3ac96e360672	7010	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA:
charlesmn	0:3ac96e360672	7011	pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea =
charlesmn	0:3ac96e360672	7012	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7013	break;
charlesmn	0:3ac96e360672	7014	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB:
charlesmn	0:3ac96e360672	7015	pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb =
charlesmn	0:3ac96e360672	7016	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7017	break;
charlesmn	0:3ac96e360672	7018	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA:
charlesmn	0:3ac96e360672	7019	pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea =
charlesmn	0:3ac96e360672	7020	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7021	break;
charlesmn	0:3ac96e360672	7022	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB:
charlesmn	0:3ac96e360672	7023	pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb =
charlesmn	0:3ac96e360672	7024	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7025	break;
charlesmn	0:3ac96e360672	7026	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA:
charlesmn	0:3ac96e360672	7027	pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea =
charlesmn	0:3ac96e360672	7028	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7029	break;
charlesmn	0:3ac96e360672	7030	case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB:
charlesmn	0:3ac96e360672	7031	pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb =
charlesmn	0:3ac96e360672	7032	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7033	break;
charlesmn	0:3ac96e360672	7034	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN:
charlesmn	0:3ac96e360672	7035	pdev->tuning_parms.tp_uwr_lng_z_1_min =
charlesmn	0:3ac96e360672	7036	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7037	break;
charlesmn	0:3ac96e360672	7038	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX:
charlesmn	0:3ac96e360672	7039	pdev->tuning_parms.tp_uwr_lng_z_1_max =
charlesmn	0:3ac96e360672	7040	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7041	break;
charlesmn	0:3ac96e360672	7042	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN:
charlesmn	0:3ac96e360672	7043	pdev->tuning_parms.tp_uwr_lng_z_2_min =
charlesmn	0:3ac96e360672	7044	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7045	break;
charlesmn	0:3ac96e360672	7046	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX:
charlesmn	0:3ac96e360672	7047	pdev->tuning_parms.tp_uwr_lng_z_2_max =
charlesmn	0:3ac96e360672	7048	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7049	break;
charlesmn	0:3ac96e360672	7050	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN:
charlesmn	0:3ac96e360672	7051	pdev->tuning_parms.tp_uwr_lng_z_3_min =
charlesmn	0:3ac96e360672	7052	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7053	break;
charlesmn	0:3ac96e360672	7054	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX:
charlesmn	0:3ac96e360672	7055	pdev->tuning_parms.tp_uwr_lng_z_3_max =
charlesmn	0:3ac96e360672	7056	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7057	break;
charlesmn	0:3ac96e360672	7058	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN:
charlesmn	0:3ac96e360672	7059	pdev->tuning_parms.tp_uwr_lng_z_4_min =
charlesmn	0:3ac96e360672	7060	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7061	break;
charlesmn	0:3ac96e360672	7062	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX:
charlesmn	0:3ac96e360672	7063	pdev->tuning_parms.tp_uwr_lng_z_4_max =
charlesmn	0:3ac96e360672	7064	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7065	break;
charlesmn	0:3ac96e360672	7066	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN:
charlesmn	0:3ac96e360672	7067	pdev->tuning_parms.tp_uwr_lng_z_5_min =
charlesmn	0:3ac96e360672	7068	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7069	break;
charlesmn	0:3ac96e360672	7070	case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX:
charlesmn	0:3ac96e360672	7071	pdev->tuning_parms.tp_uwr_lng_z_5_max =
charlesmn	0:3ac96e360672	7072	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7073	break;
charlesmn	0:3ac96e360672	7074	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA:
charlesmn	0:3ac96e360672	7075	pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea =
charlesmn	0:3ac96e360672	7076	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7077	break;
charlesmn	0:3ac96e360672	7078	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB:
charlesmn	0:3ac96e360672	7079	pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb =
charlesmn	0:3ac96e360672	7080	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7081	break;
charlesmn	0:3ac96e360672	7082	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA:
charlesmn	0:3ac96e360672	7083	pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea =
charlesmn	0:3ac96e360672	7084	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7085	break;
charlesmn	0:3ac96e360672	7086	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB:
charlesmn	0:3ac96e360672	7087	pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb =
charlesmn	0:3ac96e360672	7088	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7089	break;
charlesmn	0:3ac96e360672	7090	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA:
charlesmn	0:3ac96e360672	7091	pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea =
charlesmn	0:3ac96e360672	7092	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7093	break;
charlesmn	0:3ac96e360672	7094	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB:
charlesmn	0:3ac96e360672	7095	pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb =
charlesmn	0:3ac96e360672	7096	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7097	break;
charlesmn	0:3ac96e360672	7098	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA:
charlesmn	0:3ac96e360672	7099	pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea =
charlesmn	0:3ac96e360672	7100	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7101	break;
charlesmn	0:3ac96e360672	7102	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB:
charlesmn	0:3ac96e360672	7103	pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb =
charlesmn	0:3ac96e360672	7104	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7105	break;
charlesmn	0:3ac96e360672	7106	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA:
charlesmn	0:3ac96e360672	7107	pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea =
charlesmn	0:3ac96e360672	7108	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7109	break;
charlesmn	0:3ac96e360672	7110	case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB:
charlesmn	0:3ac96e360672	7111	pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb =
charlesmn	0:3ac96e360672	7112	(int16_t)tuning_parm_value;
charlesmn	0:3ac96e360672	7113	break;
charlesmn	0:3ac96e360672	7114
charlesmn	0:3ac96e360672	7115
charlesmn	0:3ac96e360672	7116	default:
charlesmn	0:3ac96e360672	7117	status = VL53L1_ERROR_INVALID_PARAMS;
charlesmn	0:3ac96e360672	7118	break;
charlesmn	0:3ac96e360672	7119
charlesmn	0:3ac96e360672	7120	}
charlesmn	0:3ac96e360672	7121
charlesmn	0:3ac96e360672	7122	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7123
charlesmn	0:3ac96e360672	7124	return status;
charlesmn	0:3ac96e360672	7125	}
charlesmn	0:3ac96e360672	7126
charlesmn	0:3ac96e360672	7127
charlesmn	0:3ac96e360672	7128
charlesmn	0:3ac96e360672	7129
charlesmn	0:3ac96e360672	7130
charlesmn	0:3ac96e360672	7131	VL53L1_Error VL53L1_dynamic_xtalk_correction_enable(
charlesmn	0:3ac96e360672	7132	VL53L1_DEV Dev
charlesmn	0:3ac96e360672	7133	)
charlesmn	0:3ac96e360672	7134	{
charlesmn	0:3ac96e360672	7135
charlesmn	0:3ac96e360672	7136
charlesmn	0:3ac96e360672	7137
charlesmn	0:3ac96e360672	7138	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7139
charlesmn	0:3ac96e360672	7140	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7141
charlesmn	0:3ac96e360672	7142	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7143
charlesmn	0:3ac96e360672	7144	pdev->smudge_correct_config.smudge_corr_enabled = 1;
charlesmn	0:3ac96e360672	7145
charlesmn	0:3ac96e360672	7146	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7147
charlesmn	0:3ac96e360672	7148	return status;
charlesmn	0:3ac96e360672	7149	}
charlesmn	0:3ac96e360672	7150
charlesmn	0:3ac96e360672	7151	VL53L1_Error VL53L1_dynamic_xtalk_correction_disable(
charlesmn	0:3ac96e360672	7152	VL53L1_DEV Dev
charlesmn	0:3ac96e360672	7153	)
charlesmn	0:3ac96e360672	7154	{
charlesmn	0:3ac96e360672	7155
charlesmn	0:3ac96e360672	7156
charlesmn	0:3ac96e360672	7157
charlesmn	0:3ac96e360672	7158	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7159
charlesmn	0:3ac96e360672	7160	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7161
charlesmn	0:3ac96e360672	7162	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7163
charlesmn	0:3ac96e360672	7164	pdev->smudge_correct_config.smudge_corr_enabled = 0;
charlesmn	0:3ac96e360672	7165
charlesmn	0:3ac96e360672	7166	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7167
charlesmn	0:3ac96e360672	7168	return status;
charlesmn	0:3ac96e360672	7169	}
charlesmn	0:3ac96e360672	7170
charlesmn	0:3ac96e360672	7171	VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_enable(
charlesmn	0:3ac96e360672	7172	VL53L1_DEV Dev
charlesmn	0:3ac96e360672	7173	)
charlesmn	0:3ac96e360672	7174	{
charlesmn	0:3ac96e360672	7175
charlesmn	0:3ac96e360672	7176
charlesmn	0:3ac96e360672	7177
charlesmn	0:3ac96e360672	7178	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7179
charlesmn	0:3ac96e360672	7180	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7181
charlesmn	0:3ac96e360672	7182	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7183
charlesmn	0:3ac96e360672	7184	pdev->smudge_correct_config.smudge_corr_apply_enabled = 1;
charlesmn	0:3ac96e360672	7185
charlesmn	0:3ac96e360672	7186	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7187
charlesmn	0:3ac96e360672	7188	return status;
charlesmn	0:3ac96e360672	7189	}
charlesmn	0:3ac96e360672	7190
charlesmn	0:3ac96e360672	7191	VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_disable(
charlesmn	0:3ac96e360672	7192	VL53L1_DEV Dev
charlesmn	0:3ac96e360672	7193	)
charlesmn	0:3ac96e360672	7194	{
charlesmn	0:3ac96e360672	7195
charlesmn	0:3ac96e360672	7196
charlesmn	0:3ac96e360672	7197
charlesmn	0:3ac96e360672	7198	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7199
charlesmn	0:3ac96e360672	7200	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7201
charlesmn	0:3ac96e360672	7202	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7203
charlesmn	0:3ac96e360672	7204	pdev->smudge_correct_config.smudge_corr_apply_enabled = 0;
charlesmn	0:3ac96e360672	7205
charlesmn	0:3ac96e360672	7206	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7207
charlesmn	0:3ac96e360672	7208	return status;
charlesmn	0:3ac96e360672	7209	}
charlesmn	0:3ac96e360672	7210
charlesmn	0:3ac96e360672	7211	VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_enable(
charlesmn	0:3ac96e360672	7212	VL53L1_DEV Dev
charlesmn	0:3ac96e360672	7213	)
charlesmn	0:3ac96e360672	7214	{
charlesmn	0:3ac96e360672	7215
charlesmn	0:3ac96e360672	7216
charlesmn	0:3ac96e360672	7217
charlesmn	0:3ac96e360672	7218	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7219
charlesmn	0:3ac96e360672	7220	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7221
charlesmn	0:3ac96e360672	7222	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7223
charlesmn	0:3ac96e360672	7224	pdev->smudge_correct_config.smudge_corr_single_apply = 1;
charlesmn	0:3ac96e360672	7225
charlesmn	0:3ac96e360672	7226	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7227
charlesmn	0:3ac96e360672	7228	return status;
charlesmn	0:3ac96e360672	7229	}
charlesmn	0:3ac96e360672	7230
charlesmn	0:3ac96e360672	7231	VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_disable(
charlesmn	0:3ac96e360672	7232	VL53L1_DEV Dev
charlesmn	0:3ac96e360672	7233	)
charlesmn	0:3ac96e360672	7234	{
charlesmn	0:3ac96e360672	7235
charlesmn	0:3ac96e360672	7236
charlesmn	0:3ac96e360672	7237
charlesmn	0:3ac96e360672	7238	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7239
charlesmn	0:3ac96e360672	7240	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7241
charlesmn	0:3ac96e360672	7242	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7243
charlesmn	0:3ac96e360672	7244	pdev->smudge_correct_config.smudge_corr_single_apply = 0;
charlesmn	0:3ac96e360672	7245
charlesmn	0:3ac96e360672	7246	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7247
charlesmn	0:3ac96e360672	7248	return status;
charlesmn	0:3ac96e360672	7249	}
charlesmn	0:3ac96e360672	7250
charlesmn	0:3ac96e360672	7251
charlesmn	0:3ac96e360672	7252	VL53L1_Error VL53L1_dynamic_xtalk_correction_set_scalers(
charlesmn	0:3ac96e360672	7253	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	7254	int16_t x_scaler_in,
charlesmn	0:3ac96e360672	7255	int16_t y_scaler_in,
charlesmn	0:3ac96e360672	7256	uint8_t user_scaler_set_in
charlesmn	0:3ac96e360672	7257	)
charlesmn	0:3ac96e360672	7258	{
charlesmn	0:3ac96e360672	7259
charlesmn	0:3ac96e360672	7260
charlesmn	0:3ac96e360672	7261
charlesmn	0:3ac96e360672	7262	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7263
charlesmn	0:3ac96e360672	7264	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7265
charlesmn	0:3ac96e360672	7266	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7267
charlesmn	0:3ac96e360672	7268	pdev->smudge_correct_config.x_gradient_scaler = x_scaler_in;
charlesmn	0:3ac96e360672	7269	pdev->smudge_correct_config.y_gradient_scaler = y_scaler_in;
charlesmn	0:3ac96e360672	7270	pdev->smudge_correct_config.user_scaler_set = user_scaler_set_in;
charlesmn	0:3ac96e360672	7271
charlesmn	0:3ac96e360672	7272	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7273
charlesmn	0:3ac96e360672	7274	return status;
charlesmn	0:3ac96e360672	7275	}
charlesmn	0:3ac96e360672	7276
charlesmn	0:3ac96e360672	7277
charlesmn	0:3ac96e360672	7278
charlesmn	0:3ac96e360672	7279
charlesmn	0:3ac96e360672	7280
charlesmn	0:3ac96e360672	7281
charlesmn	0:3ac96e360672	7282	VL53L1_Error VL53L1_get_current_xtalk_settings(
charlesmn	0:3ac96e360672	7283	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	7284	VL53L1_xtalk_calibration_results_t *pxtalk
charlesmn	0:3ac96e360672	7285	)
charlesmn	0:3ac96e360672	7286	{
charlesmn	0:3ac96e360672	7287
charlesmn	0:3ac96e360672	7288
charlesmn	0:3ac96e360672	7289	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7290	uint8_t i;
charlesmn	0:3ac96e360672	7291
charlesmn	0:3ac96e360672	7292	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7293
charlesmn	0:3ac96e360672	7294	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7295
charlesmn	0:3ac96e360672	7296	pxtalk->algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	7297	pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	7298	pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	7299	pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	7300	pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	7301	pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	7302	for (i = 0; i < VL53L1_BIN_REC_SIZE; i++)
charlesmn	0:3ac96e360672	7303	pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i] =
charlesmn	0:3ac96e360672	7304	pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i];
charlesmn	0:3ac96e360672	7305
charlesmn	0:3ac96e360672	7306	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7307
charlesmn	0:3ac96e360672	7308	return status;
charlesmn	0:3ac96e360672	7309
charlesmn	0:3ac96e360672	7310	}
charlesmn	0:3ac96e360672	7311
charlesmn	0:3ac96e360672	7312
charlesmn	0:3ac96e360672	7313
charlesmn	0:3ac96e360672	7314
charlesmn	0:3ac96e360672	7315
charlesmn	0:3ac96e360672	7316	VL53L1_Error VL53L1_set_current_xtalk_settings(
charlesmn	0:3ac96e360672	7317	VL53L1_DEV Dev,
charlesmn	0:3ac96e360672	7318	VL53L1_xtalk_calibration_results_t *pxtalk
charlesmn	0:3ac96e360672	7319	)
charlesmn	0:3ac96e360672	7320	{
charlesmn	0:3ac96e360672	7321
charlesmn	0:3ac96e360672	7322
charlesmn	0:3ac96e360672	7323	VL53L1_Error status = VL53L1_ERROR_NONE;
charlesmn	0:3ac96e360672	7324	uint8_t i;
charlesmn	0:3ac96e360672	7325
charlesmn	0:3ac96e360672	7326	VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev);
charlesmn	0:3ac96e360672	7327
charlesmn	0:3ac96e360672	7328	LOG_FUNCTION_START("");
charlesmn	0:3ac96e360672	7329
charlesmn	0:3ac96e360672	7330	pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps =
charlesmn	0:3ac96e360672	7331	pxtalk->algo__crosstalk_compensation_plane_offset_kcps;
charlesmn	0:3ac96e360672	7332	pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps =
charlesmn	0:3ac96e360672	7333	pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn	0:3ac96e360672	7334	pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps =
charlesmn	0:3ac96e360672	7335	pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn	0:3ac96e360672	7336	for (i = 0; i < VL53L1_BIN_REC_SIZE; i++)
charlesmn	0:3ac96e360672	7337	pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i] =
charlesmn	0:3ac96e360672	7338	pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i];
charlesmn	0:3ac96e360672	7339
charlesmn	0:3ac96e360672	7340	LOG_FUNCTION_END(status);
charlesmn	0:3ac96e360672	7341
charlesmn	0:3ac96e360672	7342	return status;
charlesmn	0:3ac96e360672	7343
charlesmn	0:3ac96e360672	7344	}
charlesmn	0:3ac96e360672	7345
charlesmn	0:3ac96e360672	7346
charlesmn	0:3ac96e360672	7347
charlesmn	0:3ac96e360672	7348

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	06 Oct 2020
Imports:	8
Forks:	0
Commits:	19
Dependents:	3
Dependencies:	2
Followers:	63

src/vl53l1_api_core.c@0:3ac96e360672, 2020-11-06 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning