ST Expansion SW Team
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VL53L1
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vl53l1_api_core.c
00001 00002 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 00003 /****************************************************************************** 00004 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved 00005 00006 This file is part of VL53L1 and is dual licensed, 00007 either GPL-2.0+ 00008 or 'BSD 3-clause "New" or "Revised" License' , at your option. 00009 ****************************************************************************** 00010 */ 00011 00012 00013 00014 00015 00016 #include "vl53l1_ll_def.h" 00017 #include "vl53l1_ll_device.h" 00018 #include "vl53l1_platform.h" 00019 #include "vl53l1_platform_ipp.h" 00020 #include "vl53l1_register_map.h" 00021 #include "vl53l1_register_settings.h" 00022 #include "vl53l1_register_funcs.h" 00023 #include "vl53l1_hist_map.h" 00024 #include "vl53l1_hist_structs.h" 00025 #include "vl53l1_nvm_map.h" 00026 #include "vl53l1_nvm_structs.h" 00027 #include "vl53l1_nvm.h" 00028 #include "vl53l1_core.h" 00029 #include "vl53l1_wait.h" 00030 #include "vl53l1_zone_presets.h" 00031 #include "vl53l1_api_preset_modes.h" 00032 #include "vl53l1_silicon_core.h" 00033 #include "vl53l1_api_core.h" 00034 #include "vl53l1_tuning_parm_defaults.h" 00035 00036 #ifdef VL53L1_LOG_ENABLE 00037 #include "vl53l1_api_debug.h" 00038 #endif 00039 00040 #define LOG_FUNCTION_START(fmt, ...) \ 00041 _LOG_FUNCTION_START(VL53L1_TRACE_MODULE_CORE, fmt, ##__VA_ARGS__) 00042 #define LOG_FUNCTION_END(status, ...) \ 00043 _LOG_FUNCTION_END(VL53L1_TRACE_MODULE_CORE, status, ##__VA_ARGS__) 00044 #define LOG_FUNCTION_END_FMT(status, fmt, ...) \ 00045 _LOG_FUNCTION_END_FMT(VL53L1_TRACE_MODULE_CORE, status, \ 00046 fmt, ##__VA_ARGS__) 00047 00048 #define trace_print(level, ...) \ 00049 _LOG_TRACE_PRINT(VL53L1_TRACE_MODULE_CORE, \ 00050 level, VL53L1_TRACE_FUNCTION_NONE, ##__VA_ARGS__) 00051 00052 #define VL53L1_MAX_I2C_XFER_SIZE 256 00053 00054 static VL53L1_Error select_offset_per_vcsel(VL53L1_LLDriverData_t *pdev, 00055 int16_t *poffset) { 00056 VL53L1_Error status = VL53L1_ERROR_NONE; 00057 int16_t tA, tB; 00058 uint8_t isc; 00059 00060 switch (pdev->preset_mode) { 00061 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE: 00062 tA = pdev->per_vcsel_cal_data.short_a_offset_mm; 00063 tB = pdev->per_vcsel_cal_data.short_b_offset_mm; 00064 break; 00065 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE: 00066 tA = pdev->per_vcsel_cal_data.medium_a_offset_mm; 00067 tB = pdev->per_vcsel_cal_data.medium_b_offset_mm; 00068 break; 00069 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE: 00070 tA = pdev->per_vcsel_cal_data.long_a_offset_mm; 00071 tB = pdev->per_vcsel_cal_data.long_b_offset_mm; 00072 break; 00073 default: 00074 status = VL53L1_ERROR_INVALID_PARAMS; 00075 *poffset = 0; 00076 break; 00077 } 00078 00079 isc = pdev->ll_state.cfg_internal_stream_count; 00080 if (status == VL53L1_ERROR_NONE) 00081 *poffset = (isc & 0x01) ? tA : tB; 00082 00083 return status; 00084 } 00085 00086 static void vl53l1_diff_histo_stddev(VL53L1_LLDriverData_t *pdev, 00087 VL53L1_histogram_bin_data_t *pdata, uint8_t timing, uint8_t HighIndex, 00088 uint8_t prev_pos, int32_t *pdiff_histo_stddev) { 00089 uint16_t bin = 0; 00090 int32_t total_rate_pre = 0; 00091 int32_t total_rate_cur = 0; 00092 int32_t PrevBin, CurrBin; 00093 00094 total_rate_pre = 0; 00095 total_rate_cur = 0; 00096 00097 00098 for (bin = timing * 4; bin < HighIndex; bin++) { 00099 total_rate_pre += 00100 pdev->multi_bins_rec[prev_pos][timing][bin]; 00101 total_rate_cur += pdata->bin_data[bin]; 00102 } 00103 00104 if ((total_rate_pre != 0) && (total_rate_cur != 0)) 00105 for (bin = timing * 4; bin < HighIndex; bin++) { 00106 PrevBin = pdev->multi_bins_rec[prev_pos][timing][bin]; 00107 PrevBin = (PrevBin * 1000) / total_rate_pre; 00108 CurrBin = pdata->bin_data[bin] * 1000 / total_rate_cur; 00109 *pdiff_histo_stddev += (PrevBin - CurrBin) * 00110 (PrevBin - CurrBin); 00111 } 00112 } 00113 00114 static void vl53l1_histo_merge(VL53L1_DEV Dev, 00115 VL53L1_histogram_bin_data_t *pdata) { 00116 VL53L1_LLDriverData_t *pdev = 00117 VL53L1DevStructGetLLDriverHandle(Dev); 00118 uint16_t bin = 0; 00119 uint8_t i = 0; 00120 int32_t TuningBinRecSize = 0; 00121 uint8_t recom_been_reset = 0; 00122 uint8_t timing = 0; 00123 int32_t rmt = 0; 00124 int32_t diff_histo_stddev = 0; 00125 uint8_t HighIndex, prev_pos; 00126 uint8_t BuffSize = VL53L1_HISTOGRAM_BUFFER_SIZE; 00127 uint8_t pos; 00128 00129 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE, 00130 &TuningBinRecSize); 00131 00132 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD, 00133 &rmt); 00134 00135 00136 if (pdev->pos_before_next_recom == 0) { 00137 00138 timing = 1 - pdata->result__stream_count % 2; 00139 00140 diff_histo_stddev = 0; 00141 HighIndex = BuffSize - timing * 4; 00142 if (pdev->bin_rec_pos > 0) 00143 prev_pos = pdev->bin_rec_pos - 1; 00144 else 00145 prev_pos = (TuningBinRecSize - 1); 00146 00147 if (pdev->multi_bins_rec[prev_pos][timing][4] > 0) 00148 vl53l1_diff_histo_stddev(pdev, pdata, 00149 timing, HighIndex, prev_pos, 00150 &diff_histo_stddev); 00151 00152 if (diff_histo_stddev >= rmt) { 00153 memset(pdev->multi_bins_rec, 0, 00154 sizeof(pdev->multi_bins_rec)); 00155 pdev->bin_rec_pos = 0; 00156 00157 recom_been_reset = 1; 00158 00159 if (timing == 0) 00160 pdev->pos_before_next_recom = 00161 VL53L1_FRAME_WAIT_EVENT; 00162 else 00163 pdev->pos_before_next_recom = 00164 VL53L1_FRAME_WAIT_EVENT + 1; 00165 } else { 00166 00167 pos = pdev->bin_rec_pos; 00168 for (i = 0; i < BuffSize; i++) 00169 pdev->multi_bins_rec[pos][timing][i] = 00170 pdata->bin_data[i]; 00171 } 00172 00173 if (pdev->bin_rec_pos == (TuningBinRecSize - 1) && timing == 1) 00174 pdev->bin_rec_pos = 0; 00175 else if (timing == 1) 00176 pdev->bin_rec_pos++; 00177 00178 if (!((recom_been_reset == 1) && (timing == 0)) && 00179 (pdev->pos_before_next_recom == 0)) { 00180 00181 for (bin = 0; bin < BuffSize; bin++) 00182 pdata->bin_data[bin] = 0; 00183 00184 for (bin = 0; bin < BuffSize; bin++) 00185 for (i = 0; i < TuningBinRecSize; i++) 00186 pdata->bin_data[bin] += 00187 (pdev->multi_bins_rec[i][timing][bin]); 00188 } 00189 } else { 00190 00191 pdev->pos_before_next_recom--; 00192 if (pdev->pos_before_next_recom == 255) 00193 pdev->pos_before_next_recom = 0; 00194 } 00195 } 00196 00197 VL53L1_Error VL53L1_load_patch( 00198 VL53L1_DEV Dev) { 00199 VL53L1_Error status = VL53L1_ERROR_NONE; 00200 int32_t patch_tuning = 0; 00201 uint8_t comms_buffer[256]; 00202 uint32_t patch_power; 00203 00204 LOG_FUNCTION_START(""); 00205 00206 if (status == VL53L1_ERROR_NONE) 00207 status = VL53L1_WrByte(Dev, 00208 VL53L1_FIRMWARE__ENABLE, 0x00); 00209 00210 if (status == VL53L1_ERROR_NONE) 00211 VL53L1_enable_powerforce(Dev); 00212 00213 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER, 00214 &patch_tuning); 00215 00216 switch (patch_tuning) { 00217 case 0: 00218 patch_power = 0x00; 00219 break; 00220 case 1: 00221 patch_power = 0x10; 00222 break; 00223 case 2: 00224 patch_power = 0x20; 00225 break; 00226 case 3: 00227 patch_power = 0x40; 00228 break; 00229 default: 00230 patch_power = 0x00; 00231 } 00232 00233 if (status == VL53L1_ERROR_NONE) { 00234 00235 comms_buffer[0] = 0x29; 00236 comms_buffer[1] = 0xC9; 00237 comms_buffer[2] = 0x0E; 00238 comms_buffer[3] = 0x40; 00239 comms_buffer[4] = 0x28; 00240 comms_buffer[5] = patch_power; 00241 00242 status = VL53L1_WriteMulti(Dev, 00243 VL53L1_PATCH__OFFSET_0, comms_buffer, 6); 00244 } 00245 00246 if (status == VL53L1_ERROR_NONE) { 00247 comms_buffer[0] = 0x03; 00248 comms_buffer[1] = 0x6D; 00249 comms_buffer[2] = 0x03; 00250 comms_buffer[3] = 0x6F; 00251 comms_buffer[4] = 0x07; 00252 comms_buffer[5] = 0x29; 00253 status = VL53L1_WriteMulti(Dev, 00254 VL53L1_PATCH__ADDRESS_0, comms_buffer, 6); 00255 } 00256 00257 if (status == VL53L1_ERROR_NONE) { 00258 comms_buffer[0] = 0x00; 00259 comms_buffer[1] = 0x07; 00260 status = VL53L1_WriteMulti(Dev, 00261 VL53L1_PATCH__JMP_ENABLES, comms_buffer, 2); 00262 } 00263 00264 if (status == VL53L1_ERROR_NONE) { 00265 comms_buffer[0] = 0x00; 00266 comms_buffer[1] = 0x07; 00267 status = VL53L1_WriteMulti(Dev, 00268 VL53L1_PATCH__DATA_ENABLES, comms_buffer, 2); 00269 } 00270 00271 if (status == VL53L1_ERROR_NONE) 00272 status = VL53L1_WrByte(Dev, 00273 VL53L1_PATCH__CTRL, 0x01); 00274 00275 if (status == VL53L1_ERROR_NONE) 00276 status = VL53L1_WrByte(Dev, 00277 VL53L1_FIRMWARE__ENABLE, 0x01); 00278 00279 LOG_FUNCTION_END(status); 00280 00281 return status; 00282 } 00283 00284 VL53L1_Error VL53L1_unload_patch( 00285 VL53L1_DEV Dev) { 00286 VL53L1_Error status = VL53L1_ERROR_NONE; 00287 00288 if (status == VL53L1_ERROR_NONE) 00289 status = VL53L1_WrByte(Dev, 00290 VL53L1_FIRMWARE__ENABLE, 0x00); 00291 00292 if (status == VL53L1_ERROR_NONE) 00293 VL53L1_disable_powerforce(Dev); 00294 00295 if (status == VL53L1_ERROR_NONE) 00296 status = VL53L1_WrByte(Dev, 00297 VL53L1_PATCH__CTRL, 0x00); 00298 00299 if (status == VL53L1_ERROR_NONE) 00300 status = VL53L1_WrByte(Dev, 00301 VL53L1_FIRMWARE__ENABLE, 0x01); 00302 00303 LOG_FUNCTION_END(status); 00304 00305 return status; 00306 } 00307 00308 VL53L1_Error VL53L1_get_version( 00309 VL53L1_DEV Dev, 00310 VL53L1_ll_version_t *pdata) 00311 { 00312 00313 00314 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00315 00316 VL53L1_init_version(Dev); 00317 00318 memcpy(pdata, &(pdev->version), sizeof(VL53L1_ll_version_t)); 00319 00320 return VL53L1_ERROR_NONE; 00321 } 00322 00323 00324 VL53L1_Error VL53L1_get_device_firmware_version( 00325 VL53L1_DEV Dev, 00326 uint16_t *pfw_version) 00327 { 00328 00329 00330 VL53L1_Error status = VL53L1_ERROR_NONE; 00331 00332 LOG_FUNCTION_START(""); 00333 00334 if (status == VL53L1_ERROR_NONE) 00335 status = VL53L1_disable_firmware(Dev); 00336 00337 if (status == VL53L1_ERROR_NONE) 00338 status = VL53L1_RdWord( 00339 Dev, 00340 VL53L1_MCU_GENERAL_PURPOSE__GP_0, 00341 pfw_version); 00342 00343 if (status == VL53L1_ERROR_NONE) 00344 status = VL53L1_enable_firmware(Dev); 00345 00346 LOG_FUNCTION_END(status); 00347 00348 return status; 00349 } 00350 00351 00352 VL53L1_Error VL53L1_data_init( 00353 VL53L1_DEV Dev, 00354 uint8_t read_p2p_data) 00355 { 00356 00357 00358 VL53L1_Error status = VL53L1_ERROR_NONE; 00359 VL53L1_LLDriverData_t *pdev = 00360 VL53L1DevStructGetLLDriverHandle(Dev); 00361 VL53L1_LLDriverResults_t *pres = 00362 VL53L1DevStructGetLLResultsHandle(Dev); 00363 00364 00365 00366 VL53L1_zone_objects_t *pobjects; 00367 00368 uint8_t i = 0; 00369 00370 LOG_FUNCTION_START(""); 00371 00372 VL53L1_init_ll_driver_state( 00373 Dev, 00374 VL53L1_DEVICESTATE_UNKNOWN); 00375 00376 pres->range_results.max_results = VL53L1_MAX_RANGE_RESULTS; 00377 pres->range_results.active_results = 0; 00378 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES; 00379 pres->zone_results.active_zones = 0; 00380 00381 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) { 00382 pobjects = &(pres->zone_results.VL53L1_p_002[i]); 00383 pobjects->xmonitor.VL53L1_p_020 = 0; 00384 pobjects->xmonitor.VL53L1_p_021 = 0; 00385 pobjects->xmonitor.VL53L1_p_014 = 0; 00386 pobjects->xmonitor.range_status = 00387 VL53L1_DEVICEERROR_NOUPDATE; 00388 } 00389 00390 00391 00392 pres->zone_hists.max_zones = VL53L1_MAX_USER_ZONES; 00393 pres->zone_hists.active_zones = 0; 00394 00395 00396 00397 pres->zone_cal.max_zones = VL53L1_MAX_USER_ZONES; 00398 pres->zone_cal.active_zones = 0; 00399 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) { 00400 pres->zone_cal.VL53L1_p_002[i].no_of_samples = 0; 00401 pres->zone_cal.VL53L1_p_002[i].effective_spads = 0; 00402 pres->zone_cal.VL53L1_p_002[i].peak_rate_mcps = 0; 00403 pres->zone_cal.VL53L1_p_002[i].median_range_mm = 0; 00404 pres->zone_cal.VL53L1_p_002[i].range_mm_offset = 0; 00405 } 00406 00407 pdev->wait_method = VL53L1_WAIT_METHOD_BLOCKING; 00408 pdev->preset_mode = VL53L1_DEVICEPRESETMODE_STANDARD_RANGING; 00409 pdev->zone_preset = VL53L1_DEVICEZONEPRESET_NONE; 00410 pdev->measurement_mode = VL53L1_DEVICEMEASUREMENTMODE_STOP; 00411 00412 pdev->offset_calibration_mode = 00413 VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD; 00414 pdev->offset_correction_mode = 00415 VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS; 00416 pdev->dmax_mode = 00417 VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA; 00418 00419 pdev->phasecal_config_timeout_us = 1000; 00420 pdev->mm_config_timeout_us = 2000; 00421 pdev->range_config_timeout_us = 13000; 00422 pdev->inter_measurement_period_ms = 100; 00423 pdev->dss_config__target_total_rate_mcps = 0x0A00; 00424 pdev->debug_mode = 0x00; 00425 00426 pdev->offset_results.max_results = VL53L1_MAX_OFFSET_RANGE_RESULTS; 00427 pdev->offset_results.active_results = 0; 00428 00429 00430 00431 pdev->gain_cal.standard_ranging_gain_factor = 00432 VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR_DEFAULT; 00433 pdev->gain_cal.histogram_ranging_gain_factor = 00434 VL53L1_TUNINGPARM_HIST_GAIN_FACTOR_DEFAULT; 00435 00436 00437 VL53L1_init_version(Dev); 00438 00439 00440 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec)); 00441 pdev->bin_rec_pos = 0; 00442 pdev->pos_before_next_recom = 0; 00443 00444 00445 00446 if (read_p2p_data > 0 && status == VL53L1_ERROR_NONE) 00447 status = VL53L1_read_p2p_data(Dev); 00448 00449 00450 if (status == VL53L1_ERROR_NONE) 00451 status = VL53L1_init_refspadchar_config_struct( 00452 &(pdev->refspadchar)); 00453 00454 00455 if (status == VL53L1_ERROR_NONE) 00456 status = VL53L1_init_ssc_config_struct( 00457 &(pdev->ssc_cfg)); 00458 00459 00460 if (status == VL53L1_ERROR_NONE) 00461 status = VL53L1_init_xtalk_config_struct( 00462 &(pdev->customer), 00463 &(pdev->xtalk_cfg)); 00464 00465 00466 if (status == VL53L1_ERROR_NONE) 00467 status = VL53L1_init_xtalk_extract_config_struct( 00468 &(pdev->xtalk_extract_cfg)); 00469 00470 00471 if (status == VL53L1_ERROR_NONE) 00472 status = VL53L1_init_offset_cal_config_struct( 00473 &(pdev->offsetcal_cfg)); 00474 00475 00476 if (status == VL53L1_ERROR_NONE) 00477 status = VL53L1_init_zone_cal_config_struct( 00478 &(pdev->zonecal_cfg)); 00479 00480 00481 if (status == VL53L1_ERROR_NONE) 00482 status = VL53L1_init_hist_post_process_config_struct( 00483 pdev->xtalk_cfg.global_crosstalk_compensation_enable, 00484 &(pdev->histpostprocess)); 00485 00486 00487 if (status == VL53L1_ERROR_NONE) 00488 status = VL53L1_init_hist_gen3_dmax_config_struct( 00489 &(pdev->dmax_cfg)); 00490 00491 00492 if (status == VL53L1_ERROR_NONE) 00493 status = VL53L1_init_tuning_parm_storage_struct( 00494 &(pdev->tuning_parms)); 00495 00496 00497 00498 if (status == VL53L1_ERROR_NONE) 00499 status = VL53L1_set_preset_mode( 00500 Dev, 00501 pdev->preset_mode, 00502 pdev->dss_config__target_total_rate_mcps, 00503 pdev->phasecal_config_timeout_us, 00504 pdev->mm_config_timeout_us, 00505 pdev->range_config_timeout_us, 00506 pdev->inter_measurement_period_ms); 00507 00508 00509 VL53L1_init_histogram_bin_data_struct( 00510 0, 00511 VL53L1_HISTOGRAM_BUFFER_SIZE, 00512 &(pdev->hist_data)); 00513 00514 VL53L1_init_histogram_bin_data_struct( 00515 0, 00516 VL53L1_HISTOGRAM_BUFFER_SIZE, 00517 &(pdev->hist_xtalk)); 00518 00519 00520 VL53L1_init_xtalk_bin_data_struct( 00521 0, 00522 VL53L1_XTALK_HISTO_BINS, 00523 &(pdev->xtalk_shapes.xtalk_shape)); 00524 00525 00526 00527 VL53L1_xtalk_cal_data_init( 00528 Dev 00529 ); 00530 00531 00532 00533 VL53L1_dynamic_xtalk_correction_data_init( 00534 Dev 00535 ); 00536 00537 00538 00539 VL53L1_low_power_auto_data_init( 00540 Dev 00541 ); 00542 00543 #ifdef VL53L1_LOG_ENABLE 00544 00545 00546 00547 VL53L1_print_static_nvm_managed( 00548 &(pdev->stat_nvm), 00549 "data_init():pdev->lldata.stat_nvm.", 00550 VL53L1_TRACE_MODULE_DATA_INIT); 00551 00552 VL53L1_print_customer_nvm_managed( 00553 &(pdev->customer), 00554 "data_init():pdev->lldata.customer.", 00555 VL53L1_TRACE_MODULE_DATA_INIT); 00556 00557 VL53L1_print_nvm_copy_data( 00558 &(pdev->nvm_copy_data), 00559 "data_init():pdev->lldata.nvm_copy_data.", 00560 VL53L1_TRACE_MODULE_DATA_INIT); 00561 00562 VL53L1_print_dmax_calibration_data( 00563 &(pdev->fmt_dmax_cal), 00564 "data_init():pdev->lldata.fmt_dmax_cal.", 00565 VL53L1_TRACE_MODULE_DATA_INIT); 00566 00567 VL53L1_print_dmax_calibration_data( 00568 &(pdev->cust_dmax_cal), 00569 "data_init():pdev->lldata.cust_dmax_cal.", 00570 VL53L1_TRACE_MODULE_DATA_INIT); 00571 00572 VL53L1_print_additional_offset_cal_data( 00573 &(pdev->add_off_cal_data), 00574 "data_init():pdev->lldata.add_off_cal_data.", 00575 VL53L1_TRACE_MODULE_DATA_INIT); 00576 00577 VL53L1_print_user_zone( 00578 &(pdev->mm_roi), 00579 "data_init():pdev->lldata.mm_roi.", 00580 VL53L1_TRACE_MODULE_DATA_INIT); 00581 00582 VL53L1_print_optical_centre( 00583 &(pdev->optical_centre), 00584 "data_init():pdev->lldata.optical_centre.", 00585 VL53L1_TRACE_MODULE_DATA_INIT); 00586 00587 VL53L1_print_cal_peak_rate_map( 00588 &(pdev->cal_peak_rate_map), 00589 "data_init():pdev->lldata.cal_peak_rate_map.", 00590 VL53L1_TRACE_MODULE_DATA_INIT); 00591 00592 #endif 00593 00594 LOG_FUNCTION_END(status); 00595 00596 return status; 00597 } 00598 00599 00600 VL53L1_Error VL53L1_read_p2p_data( 00601 VL53L1_DEV Dev) 00602 { 00603 00604 00605 00606 VL53L1_Error status = VL53L1_ERROR_NONE; 00607 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00608 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 00609 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 00610 VL53L1_additional_offset_cal_data_t *pCD = &(pdev->add_off_cal_data); 00611 00612 VL53L1_decoded_nvm_fmt_range_data_t fmt_rrd; 00613 00614 LOG_FUNCTION_START(""); 00615 00616 if (status == VL53L1_ERROR_NONE) 00617 status = VL53L1_get_static_nvm_managed( 00618 Dev, 00619 &(pdev->stat_nvm)); 00620 00621 if (status == VL53L1_ERROR_NONE) 00622 status = VL53L1_get_customer_nvm_managed( 00623 Dev, 00624 &(pdev->customer)); 00625 00626 if (status == VL53L1_ERROR_NONE) { 00627 00628 status = VL53L1_get_nvm_copy_data( 00629 Dev, 00630 &(pdev->nvm_copy_data)); 00631 00632 00633 if (status == VL53L1_ERROR_NONE) 00634 VL53L1_copy_rtn_good_spads_to_buffer( 00635 &(pdev->nvm_copy_data), 00636 &(pdev->rtn_good_spads[0])); 00637 } 00638 00639 00640 00641 if (status == VL53L1_ERROR_NONE) { 00642 pHP->algo__crosstalk_compensation_plane_offset_kcps = 00643 pN->algo__crosstalk_compensation_plane_offset_kcps; 00644 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps = 00645 pN->algo__crosstalk_compensation_x_plane_gradient_kcps; 00646 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps = 00647 pN->algo__crosstalk_compensation_y_plane_gradient_kcps; 00648 } 00649 00650 00651 if (status == VL53L1_ERROR_NONE) 00652 status = 00653 VL53L1_read_nvm_optical_centre( 00654 Dev, 00655 &(pdev->optical_centre)); 00656 00657 00658 00659 if (status == VL53L1_ERROR_NONE) 00660 status = 00661 VL53L1_read_nvm_cal_peak_rate_map( 00662 Dev, 00663 &(pdev->cal_peak_rate_map)); 00664 00665 00666 00667 if (status == VL53L1_ERROR_NONE) { 00668 00669 status = 00670 VL53L1_read_nvm_additional_offset_cal_data( 00671 Dev, 00672 &(pdev->add_off_cal_data)); 00673 00674 00675 00676 if (pCD->result__mm_inner_peak_signal_count_rtn_mcps == 0 && 00677 pCD->result__mm_outer_peak_signal_count_rtn_mcps == 0) { 00678 00679 pCD->result__mm_inner_peak_signal_count_rtn_mcps 00680 = 0x0080; 00681 pCD->result__mm_outer_peak_signal_count_rtn_mcps 00682 = 0x0180; 00683 00684 00685 00686 VL53L1_calc_mm_effective_spads( 00687 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad, 00688 pdev->nvm_copy_data.roi_config__mode_roi_xy_size, 00689 0xC7, 00690 0xFF, 00691 &(pdev->rtn_good_spads[0]), 00692 VL53L1_RTN_SPAD_APERTURE_TRANSMISSION, 00693 &(pCD->result__mm_inner_actual_effective_spads), 00694 &(pCD->result__mm_outer_actual_effective_spads)); 00695 } 00696 } 00697 00698 00699 if (status == VL53L1_ERROR_NONE) { 00700 00701 status = 00702 VL53L1_read_nvm_fmt_range_results_data( 00703 Dev, 00704 VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK, 00705 &fmt_rrd); 00706 00707 if (status == VL53L1_ERROR_NONE) { 00708 pdev->fmt_dmax_cal.ref__actual_effective_spads = 00709 fmt_rrd.result__actual_effective_rtn_spads; 00710 pdev->fmt_dmax_cal.ref__peak_signal_count_rate_mcps = 00711 fmt_rrd.result__peak_signal_count_rate_rtn_mcps; 00712 pdev->fmt_dmax_cal.ref__distance_mm = 00713 fmt_rrd.measured_distance_mm; 00714 00715 00716 if (pdev->cal_peak_rate_map.cal_reflectance_pc != 0) { 00717 pdev->fmt_dmax_cal.ref_reflectance_pc = 00718 pdev->cal_peak_rate_map.cal_reflectance_pc; 00719 } else { 00720 pdev->fmt_dmax_cal.ref_reflectance_pc = 0x0014; 00721 } 00722 00723 00724 pdev->fmt_dmax_cal.coverglass_transmission = 0x0100; 00725 } 00726 } 00727 00728 00729 if (status == VL53L1_ERROR_NONE) 00730 status = 00731 VL53L1_RdWord( 00732 Dev, 00733 VL53L1_RESULT__OSC_CALIBRATE_VAL, 00734 &(pdev->dbg_results.result__osc_calibrate_val)); 00735 00736 00737 00738 if (pdev->stat_nvm.osc_measured__fast_osc__frequency < 0x1000) { 00739 trace_print( 00740 VL53L1_TRACE_LEVEL_WARNING, 00741 "\nInvalid %s value (0x%04X) - forcing to 0x%04X\n\n", 00742 "pdev->stat_nvm.osc_measured__fast_osc__frequency", 00743 pdev->stat_nvm.osc_measured__fast_osc__frequency, 00744 0xBCCC); 00745 pdev->stat_nvm.osc_measured__fast_osc__frequency = 0xBCCC; 00746 } 00747 00748 00749 00750 if (status == VL53L1_ERROR_NONE) 00751 status = 00752 VL53L1_get_mode_mitigation_roi( 00753 Dev, 00754 &(pdev->mm_roi)); 00755 00756 00757 00758 if (pdev->optical_centre.x_centre == 0 && 00759 pdev->optical_centre.y_centre == 0) { 00760 pdev->optical_centre.x_centre = 00761 pdev->mm_roi.x_centre << 4; 00762 pdev->optical_centre.y_centre = 00763 pdev->mm_roi.y_centre << 4; 00764 } 00765 00766 LOG_FUNCTION_END(status); 00767 00768 return status; 00769 } 00770 00771 00772 VL53L1_Error VL53L1_software_reset( 00773 VL53L1_DEV Dev) 00774 { 00775 00776 00777 VL53L1_Error status = VL53L1_ERROR_NONE; 00778 00779 LOG_FUNCTION_START(""); 00780 00781 00782 if (status == VL53L1_ERROR_NONE) 00783 status = VL53L1_WrByte( 00784 Dev, 00785 VL53L1_SOFT_RESET, 00786 0x00); 00787 00788 00789 if (status == VL53L1_ERROR_NONE) 00790 status = 00791 VL53L1_WaitUs( 00792 Dev, 00793 VL53L1_SOFTWARE_RESET_DURATION_US); 00794 00795 00796 if (status == VL53L1_ERROR_NONE) 00797 status = VL53L1_WrByte( 00798 Dev, 00799 VL53L1_SOFT_RESET, 00800 0x01); 00801 00802 00803 if (status == VL53L1_ERROR_NONE) 00804 status = VL53L1_wait_for_boot_completion(Dev); 00805 00806 LOG_FUNCTION_END(status); 00807 00808 return status; 00809 } 00810 00811 00812 VL53L1_Error VL53L1_set_part_to_part_data( 00813 VL53L1_DEV Dev, 00814 VL53L1_calibration_data_t *pcal_data) 00815 { 00816 00817 00818 VL53L1_Error status = VL53L1_ERROR_NONE; 00819 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00820 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 00821 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 00822 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 00823 00824 uint32_t tempu32; 00825 00826 LOG_FUNCTION_START(""); 00827 00828 if (pcal_data->struct_version != 00829 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION) { 00830 status = VL53L1_ERROR_INVALID_PARAMS; 00831 } 00832 00833 if (status == VL53L1_ERROR_NONE) { 00834 00835 00836 memcpy( 00837 &(pdev->customer), 00838 &(pcal_data->customer), 00839 sizeof(VL53L1_customer_nvm_managed_t)); 00840 00841 00842 memcpy( 00843 &(pdev->add_off_cal_data), 00844 &(pcal_data->add_off_cal_data), 00845 sizeof(VL53L1_additional_offset_cal_data_t)); 00846 00847 00848 memcpy( 00849 &(pdev->fmt_dmax_cal), 00850 &(pcal_data->fmt_dmax_cal), 00851 sizeof(VL53L1_dmax_calibration_data_t)); 00852 00853 00854 memcpy( 00855 &(pdev->cust_dmax_cal), 00856 &(pcal_data->cust_dmax_cal), 00857 sizeof(VL53L1_dmax_calibration_data_t)); 00858 00859 00860 memcpy( 00861 &(pdev->xtalk_shapes), 00862 &(pcal_data->xtalkhisto), 00863 sizeof(VL53L1_xtalk_histogram_data_t)); 00864 00865 00866 memcpy( 00867 &(pdev->gain_cal), 00868 &(pcal_data->gain_cal), 00869 sizeof(VL53L1_gain_calibration_data_t)); 00870 00871 00872 memcpy( 00873 &(pdev->cal_peak_rate_map), 00874 &(pcal_data->cal_peak_rate_map), 00875 sizeof(VL53L1_cal_peak_rate_map_t)); 00876 00877 00878 memcpy( 00879 &(pdev->per_vcsel_cal_data), 00880 &(pcal_data->per_vcsel_cal_data), 00881 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t)); 00882 00883 00884 00885 pC->algo__crosstalk_compensation_plane_offset_kcps = 00886 pN->algo__crosstalk_compensation_plane_offset_kcps; 00887 pC->algo__crosstalk_compensation_x_plane_gradient_kcps = 00888 pN->algo__crosstalk_compensation_x_plane_gradient_kcps; 00889 pC->algo__crosstalk_compensation_y_plane_gradient_kcps = 00890 pN->algo__crosstalk_compensation_y_plane_gradient_kcps; 00891 00892 pHP->algo__crosstalk_compensation_plane_offset_kcps = 00893 VL53L1_calc_crosstalk_plane_offset_with_margin( 00894 pC->algo__crosstalk_compensation_plane_offset_kcps, 00895 pC->histogram_mode_crosstalk_margin_kcps); 00896 00897 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps = 00898 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 00899 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps = 00900 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 00901 00902 00903 00904 if (pC->global_crosstalk_compensation_enable == 0x00) { 00905 pN->algo__crosstalk_compensation_plane_offset_kcps = 00906 0x00; 00907 pN->algo__crosstalk_compensation_x_plane_gradient_kcps = 00908 0x00; 00909 pN->algo__crosstalk_compensation_y_plane_gradient_kcps = 00910 0x00; 00911 } else { 00912 tempu32 = 00913 VL53L1_calc_crosstalk_plane_offset_with_margin( 00914 pC->algo__crosstalk_compensation_plane_offset_kcps, 00915 pC->lite_mode_crosstalk_margin_kcps); 00916 00917 00918 if (tempu32 > 0xFFFF) 00919 tempu32 = 0xFFFF; 00920 00921 pN->algo__crosstalk_compensation_plane_offset_kcps = 00922 (uint16_t)tempu32; 00923 } 00924 } 00925 00926 LOG_FUNCTION_END(status); 00927 00928 return status; 00929 } 00930 00931 00932 VL53L1_Error VL53L1_get_part_to_part_data( 00933 VL53L1_DEV Dev, 00934 VL53L1_calibration_data_t *pcal_data) 00935 { 00936 00937 00938 VL53L1_Error status = VL53L1_ERROR_NONE; 00939 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 00940 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 00941 VL53L1_customer_nvm_managed_t *pCN = &(pcal_data->customer); 00942 00943 LOG_FUNCTION_START(""); 00944 00945 pcal_data->struct_version = 00946 VL53L1_LL_CALIBRATION_DATA_STRUCT_VERSION; 00947 00948 00949 memcpy( 00950 &(pcal_data->customer), 00951 &(pdev->customer), 00952 sizeof(VL53L1_customer_nvm_managed_t)); 00953 00954 00955 00956 00957 if (pC->algo__crosstalk_compensation_plane_offset_kcps > 0xFFFF) { 00958 pCN->algo__crosstalk_compensation_plane_offset_kcps = 00959 0xFFFF; 00960 } else { 00961 pCN->algo__crosstalk_compensation_plane_offset_kcps = 00962 (uint16_t)pC->algo__crosstalk_compensation_plane_offset_kcps; 00963 } 00964 pCN->algo__crosstalk_compensation_x_plane_gradient_kcps = 00965 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 00966 pCN->algo__crosstalk_compensation_y_plane_gradient_kcps = 00967 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 00968 00969 00970 memcpy( 00971 &(pcal_data->fmt_dmax_cal), 00972 &(pdev->fmt_dmax_cal), 00973 sizeof(VL53L1_dmax_calibration_data_t)); 00974 00975 00976 memcpy( 00977 &(pcal_data->cust_dmax_cal), 00978 &(pdev->cust_dmax_cal), 00979 sizeof(VL53L1_dmax_calibration_data_t)); 00980 00981 00982 memcpy( 00983 &(pcal_data->add_off_cal_data), 00984 &(pdev->add_off_cal_data), 00985 sizeof(VL53L1_additional_offset_cal_data_t)); 00986 00987 00988 memcpy( 00989 &(pcal_data->optical_centre), 00990 &(pdev->optical_centre), 00991 sizeof(VL53L1_optical_centre_t)); 00992 00993 00994 memcpy( 00995 &(pcal_data->xtalkhisto), 00996 &(pdev->xtalk_shapes), 00997 sizeof(VL53L1_xtalk_histogram_data_t)); 00998 00999 01000 memcpy( 01001 &(pcal_data->gain_cal), 01002 &(pdev->gain_cal), 01003 sizeof(VL53L1_gain_calibration_data_t)); 01004 01005 01006 memcpy( 01007 &(pcal_data->cal_peak_rate_map), 01008 &(pdev->cal_peak_rate_map), 01009 sizeof(VL53L1_cal_peak_rate_map_t)); 01010 01011 01012 memcpy( 01013 &(pcal_data->per_vcsel_cal_data), 01014 &(pdev->per_vcsel_cal_data), 01015 sizeof(VL53L1_per_vcsel_period_offset_cal_data_t)); 01016 01017 LOG_FUNCTION_END(status); 01018 01019 return status; 01020 } 01021 01022 01023 VL53L1_Error VL53L1_set_inter_measurement_period_ms( 01024 VL53L1_DEV Dev, 01025 uint32_t inter_measurement_period_ms) 01026 { 01027 01028 01029 VL53L1_Error status = VL53L1_ERROR_NONE; 01030 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01031 01032 LOG_FUNCTION_START(""); 01033 01034 if (pdev->dbg_results.result__osc_calibrate_val == 0) 01035 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01036 01037 if (status == VL53L1_ERROR_NONE) { 01038 pdev->inter_measurement_period_ms = inter_measurement_period_ms; 01039 pdev->tim_cfg.system__intermeasurement_period = 01040 inter_measurement_period_ms * 01041 (uint32_t)pdev->dbg_results.result__osc_calibrate_val; 01042 } 01043 01044 LOG_FUNCTION_END(status); 01045 01046 return status; 01047 } 01048 01049 01050 VL53L1_Error VL53L1_get_inter_measurement_period_ms( 01051 VL53L1_DEV Dev, 01052 uint32_t *pinter_measurement_period_ms) 01053 { 01054 01055 01056 VL53L1_Error status = VL53L1_ERROR_NONE; 01057 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01058 01059 LOG_FUNCTION_START(""); 01060 01061 if (pdev->dbg_results.result__osc_calibrate_val == 0) 01062 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01063 01064 if (status == VL53L1_ERROR_NONE) 01065 *pinter_measurement_period_ms = 01066 pdev->tim_cfg.system__intermeasurement_period / 01067 (uint32_t)pdev->dbg_results.result__osc_calibrate_val; 01068 01069 01070 LOG_FUNCTION_END(status); 01071 01072 return status; 01073 } 01074 01075 01076 VL53L1_Error VL53L1_set_timeouts_us( 01077 VL53L1_DEV Dev, 01078 uint32_t phasecal_config_timeout_us, 01079 uint32_t mm_config_timeout_us, 01080 uint32_t range_config_timeout_us) 01081 { 01082 01083 01084 VL53L1_Error status = VL53L1_ERROR_NONE; 01085 VL53L1_LLDriverData_t *pdev = 01086 VL53L1DevStructGetLLDriverHandle(Dev); 01087 01088 LOG_FUNCTION_START(""); 01089 01090 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0) 01091 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01092 01093 if (status == VL53L1_ERROR_NONE) { 01094 01095 pdev->phasecal_config_timeout_us = phasecal_config_timeout_us; 01096 pdev->mm_config_timeout_us = mm_config_timeout_us; 01097 pdev->range_config_timeout_us = range_config_timeout_us; 01098 01099 status = 01100 VL53L1_calc_timeout_register_values( 01101 phasecal_config_timeout_us, 01102 mm_config_timeout_us, 01103 range_config_timeout_us, 01104 pdev->stat_nvm.osc_measured__fast_osc__frequency, 01105 &(pdev->gen_cfg), 01106 &(pdev->tim_cfg)); 01107 } 01108 01109 LOG_FUNCTION_END(status); 01110 01111 return status; 01112 } 01113 01114 01115 VL53L1_Error VL53L1_get_timeouts_us( 01116 VL53L1_DEV Dev, 01117 uint32_t *pphasecal_config_timeout_us, 01118 uint32_t *pmm_config_timeout_us, 01119 uint32_t *prange_config_timeout_us) 01120 { 01121 01122 01123 VL53L1_Error status = VL53L1_ERROR_NONE; 01124 VL53L1_LLDriverData_t *pdev = 01125 VL53L1DevStructGetLLDriverHandle(Dev); 01126 01127 uint32_t macro_period_us = 0; 01128 uint16_t timeout_encoded = 0; 01129 01130 LOG_FUNCTION_START(""); 01131 01132 if (pdev->stat_nvm.osc_measured__fast_osc__frequency == 0) 01133 status = VL53L1_ERROR_DIVISION_BY_ZERO; 01134 01135 if (status == VL53L1_ERROR_NONE) { 01136 01137 01138 macro_period_us = 01139 VL53L1_calc_macro_period_us( 01140 pdev->stat_nvm.osc_measured__fast_osc__frequency, 01141 pdev->tim_cfg.range_config__vcsel_period_a); 01142 01143 01144 01145 *pphasecal_config_timeout_us = 01146 VL53L1_calc_timeout_us( 01147 (uint32_t)pdev->gen_cfg.phasecal_config__timeout_macrop, 01148 macro_period_us); 01149 01150 01151 01152 timeout_encoded = 01153 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_hi; 01154 timeout_encoded = (timeout_encoded << 8) + 01155 (uint16_t)pdev->tim_cfg.mm_config__timeout_macrop_a_lo; 01156 01157 *pmm_config_timeout_us = 01158 VL53L1_calc_decoded_timeout_us( 01159 timeout_encoded, 01160 macro_period_us); 01161 01162 01163 01164 timeout_encoded = 01165 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_hi; 01166 timeout_encoded = (timeout_encoded << 8) + 01167 (uint16_t)pdev->tim_cfg.range_config__timeout_macrop_a_lo; 01168 01169 *prange_config_timeout_us = 01170 VL53L1_calc_decoded_timeout_us( 01171 timeout_encoded, 01172 macro_period_us); 01173 01174 pdev->phasecal_config_timeout_us = *pphasecal_config_timeout_us; 01175 pdev->mm_config_timeout_us = *pmm_config_timeout_us; 01176 pdev->range_config_timeout_us = *prange_config_timeout_us; 01177 01178 } 01179 01180 LOG_FUNCTION_END(status); 01181 01182 return status; 01183 } 01184 01185 01186 VL53L1_Error VL53L1_set_calibration_repeat_period( 01187 VL53L1_DEV Dev, 01188 uint16_t cal_config__repeat_period) 01189 { 01190 01191 01192 VL53L1_Error status = VL53L1_ERROR_NONE; 01193 VL53L1_LLDriverData_t *pdev = 01194 VL53L1DevStructGetLLDriverHandle(Dev); 01195 01196 pdev->gen_cfg.cal_config__repeat_rate = cal_config__repeat_period; 01197 01198 return status; 01199 01200 } 01201 01202 01203 VL53L1_Error VL53L1_get_calibration_repeat_period( 01204 VL53L1_DEV Dev, 01205 uint16_t *pcal_config__repeat_period) 01206 { 01207 01208 01209 VL53L1_Error status = VL53L1_ERROR_NONE; 01210 VL53L1_LLDriverData_t *pdev = 01211 VL53L1DevStructGetLLDriverHandle(Dev); 01212 01213 *pcal_config__repeat_period = pdev->gen_cfg.cal_config__repeat_rate; 01214 01215 return status; 01216 01217 } 01218 01219 01220 VL53L1_Error VL53L1_set_sequence_config_bit( 01221 VL53L1_DEV Dev, 01222 VL53L1_DeviceSequenceConfig bit_id, 01223 uint8_t value) 01224 { 01225 01226 01227 VL53L1_Error status = VL53L1_ERROR_NONE; 01228 VL53L1_LLDriverData_t *pdev = 01229 VL53L1DevStructGetLLDriverHandle(Dev); 01230 01231 uint8_t bit_mask = 0x01; 01232 uint8_t clr_mask = 0xFF - bit_mask; 01233 uint8_t bit_value = value & bit_mask; 01234 01235 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) { 01236 01237 if (bit_id > 0) { 01238 bit_mask = 0x01 << bit_id; 01239 bit_value = bit_value << bit_id; 01240 clr_mask = 0xFF - bit_mask; 01241 } 01242 01243 pdev->dyn_cfg.system__sequence_config = 01244 (pdev->dyn_cfg.system__sequence_config & clr_mask) | 01245 bit_value; 01246 01247 } else { 01248 status = VL53L1_ERROR_INVALID_PARAMS; 01249 } 01250 01251 return status; 01252 01253 } 01254 01255 01256 VL53L1_Error VL53L1_get_sequence_config_bit( 01257 VL53L1_DEV Dev, 01258 VL53L1_DeviceSequenceConfig bit_id, 01259 uint8_t *pvalue) 01260 { 01261 01262 01263 VL53L1_Error status = VL53L1_ERROR_NONE; 01264 VL53L1_LLDriverData_t *pdev = 01265 VL53L1DevStructGetLLDriverHandle(Dev); 01266 01267 uint8_t bit_mask = 0x01; 01268 01269 if (bit_id <= VL53L1_DEVICESEQUENCECONFIG_RANGE) { 01270 01271 if (bit_id > 0) 01272 bit_mask = 0x01 << bit_id; 01273 01274 *pvalue = 01275 pdev->dyn_cfg.system__sequence_config & bit_mask; 01276 01277 if (bit_id > 0) 01278 *pvalue = *pvalue >> bit_id; 01279 01280 } else { 01281 status = VL53L1_ERROR_INVALID_PARAMS; 01282 } 01283 01284 return status; 01285 } 01286 01287 01288 VL53L1_Error VL53L1_set_interrupt_polarity( 01289 VL53L1_DEV Dev, 01290 VL53L1_DeviceInterruptPolarity interrupt_polarity) 01291 { 01292 01293 01294 VL53L1_Error status = VL53L1_ERROR_NONE; 01295 VL53L1_LLDriverData_t *pdev = 01296 VL53L1DevStructGetLLDriverHandle(Dev); 01297 01298 pdev->stat_cfg.gpio_hv_mux__ctrl = 01299 (pdev->stat_cfg.gpio_hv_mux__ctrl & 01300 VL53L1_DEVICEINTERRUPTPOLARITY_CLEAR_MASK) | 01301 (interrupt_polarity & 01302 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK); 01303 01304 return status; 01305 01306 } 01307 01308 01309 VL53L1_Error VL53L1_set_refspadchar_config_struct( 01310 VL53L1_DEV Dev, 01311 VL53L1_refspadchar_config_t *pdata) 01312 { 01313 01314 01315 VL53L1_Error status = VL53L1_ERROR_NONE; 01316 VL53L1_LLDriverData_t *pdev = 01317 VL53L1DevStructGetLLDriverHandle(Dev); 01318 01319 LOG_FUNCTION_START(""); 01320 01321 pdev->refspadchar.device_test_mode = pdata->device_test_mode; 01322 pdev->refspadchar.VL53L1_p_009 = pdata->VL53L1_p_009; 01323 pdev->refspadchar.timeout_us = pdata->timeout_us; 01324 pdev->refspadchar.target_count_rate_mcps = 01325 pdata->target_count_rate_mcps; 01326 pdev->refspadchar.min_count_rate_limit_mcps = 01327 pdata->min_count_rate_limit_mcps; 01328 pdev->refspadchar.max_count_rate_limit_mcps = 01329 pdata->max_count_rate_limit_mcps; 01330 01331 LOG_FUNCTION_END(status); 01332 01333 return status; 01334 } 01335 01336 VL53L1_Error VL53L1_get_refspadchar_config_struct( 01337 VL53L1_DEV Dev, 01338 VL53L1_refspadchar_config_t *pdata) 01339 { 01340 01341 01342 VL53L1_Error status = VL53L1_ERROR_NONE; 01343 VL53L1_LLDriverData_t *pdev = 01344 VL53L1DevStructGetLLDriverHandle(Dev); 01345 01346 LOG_FUNCTION_START(""); 01347 01348 pdata->device_test_mode = pdev->refspadchar.device_test_mode; 01349 pdata->VL53L1_p_009 = pdev->refspadchar.VL53L1_p_009; 01350 pdata->timeout_us = pdev->refspadchar.timeout_us; 01351 pdata->target_count_rate_mcps = 01352 pdev->refspadchar.target_count_rate_mcps; 01353 pdata->min_count_rate_limit_mcps = 01354 pdev->refspadchar.min_count_rate_limit_mcps; 01355 pdata->max_count_rate_limit_mcps = 01356 pdev->refspadchar.max_count_rate_limit_mcps; 01357 01358 LOG_FUNCTION_END(status); 01359 01360 return status; 01361 } 01362 01363 01364 01365 VL53L1_Error VL53L1_set_range_ignore_threshold( 01366 VL53L1_DEV Dev, 01367 uint8_t range_ignore_thresh_mult, 01368 uint16_t range_ignore_threshold_mcps) 01369 { 01370 01371 01372 VL53L1_Error status = VL53L1_ERROR_NONE; 01373 VL53L1_LLDriverData_t *pdev = 01374 VL53L1DevStructGetLLDriverHandle(Dev); 01375 01376 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps = 01377 range_ignore_threshold_mcps; 01378 01379 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult = 01380 range_ignore_thresh_mult; 01381 01382 return status; 01383 01384 } 01385 01386 VL53L1_Error VL53L1_get_range_ignore_threshold( 01387 VL53L1_DEV Dev, 01388 uint8_t *prange_ignore_thresh_mult, 01389 uint16_t *prange_ignore_threshold_mcps_internal, 01390 uint16_t *prange_ignore_threshold_mcps_current) 01391 { 01392 01393 01394 VL53L1_Error status = VL53L1_ERROR_NONE; 01395 VL53L1_LLDriverData_t *pdev = 01396 VL53L1DevStructGetLLDriverHandle(Dev); 01397 01398 *prange_ignore_thresh_mult = 01399 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult; 01400 01401 *prange_ignore_threshold_mcps_current = 01402 pdev->stat_cfg.algo__range_ignore_threshold_mcps; 01403 01404 *prange_ignore_threshold_mcps_internal = 01405 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps; 01406 01407 return status; 01408 01409 } 01410 01411 01412 01413 VL53L1_Error VL53L1_get_interrupt_polarity( 01414 VL53L1_DEV Dev, 01415 VL53L1_DeviceInterruptPolarity *pinterrupt_polarity) 01416 { 01417 01418 01419 VL53L1_Error status = VL53L1_ERROR_NONE; 01420 VL53L1_LLDriverData_t *pdev = 01421 VL53L1DevStructGetLLDriverHandle(Dev); 01422 01423 *pinterrupt_polarity = 01424 pdev->stat_cfg.gpio_hv_mux__ctrl & 01425 VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK; 01426 01427 return status; 01428 01429 } 01430 01431 01432 VL53L1_Error VL53L1_set_user_zone( 01433 VL53L1_DEV Dev, 01434 VL53L1_user_zone_t *puser_zone) 01435 { 01436 01437 01438 VL53L1_Error status = VL53L1_ERROR_NONE; 01439 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01440 01441 LOG_FUNCTION_START(""); 01442 01443 01444 VL53L1_encode_row_col( 01445 puser_zone->y_centre, 01446 puser_zone->x_centre, 01447 &(pdev->dyn_cfg.roi_config__user_roi_centre_spad)); 01448 01449 01450 VL53L1_encode_zone_size( 01451 puser_zone->width, 01452 puser_zone->height, 01453 &(pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size)); 01454 01455 01456 01457 LOG_FUNCTION_END(status); 01458 01459 return status; 01460 } 01461 01462 01463 VL53L1_Error VL53L1_get_user_zone( 01464 VL53L1_DEV Dev, 01465 VL53L1_user_zone_t *puser_zone) 01466 { 01467 01468 01469 VL53L1_Error status = VL53L1_ERROR_NONE; 01470 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01471 01472 LOG_FUNCTION_START(""); 01473 01474 01475 VL53L1_decode_row_col( 01476 pdev->dyn_cfg.roi_config__user_roi_centre_spad, 01477 &(puser_zone->y_centre), 01478 &(puser_zone->x_centre)); 01479 01480 01481 VL53L1_decode_zone_size( 01482 pdev->dyn_cfg.roi_config__user_roi_requested_global_xy_size, 01483 &(puser_zone->width), 01484 &(puser_zone->height)); 01485 01486 LOG_FUNCTION_END(status); 01487 01488 return status; 01489 } 01490 01491 01492 01493 VL53L1_Error VL53L1_get_mode_mitigation_roi( 01494 VL53L1_DEV Dev, 01495 VL53L1_user_zone_t *pmm_roi) 01496 { 01497 01498 01499 VL53L1_Error status = VL53L1_ERROR_NONE; 01500 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01501 01502 uint8_t x = 0; 01503 uint8_t y = 0; 01504 uint8_t xy_size = 0; 01505 01506 LOG_FUNCTION_START(""); 01507 01508 01509 VL53L1_decode_row_col( 01510 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad, 01511 &y, 01512 &x); 01513 01514 pmm_roi->x_centre = x; 01515 pmm_roi->y_centre = y; 01516 01517 01518 xy_size = pdev->nvm_copy_data.roi_config__mode_roi_xy_size; 01519 01520 pmm_roi->height = xy_size >> 4; 01521 pmm_roi->width = xy_size & 0x0F; 01522 01523 LOG_FUNCTION_END(status); 01524 01525 return status; 01526 } 01527 01528 01529 VL53L1_Error VL53L1_set_zone_config( 01530 VL53L1_DEV Dev, 01531 VL53L1_zone_config_t *pzone_cfg) 01532 { 01533 01534 01535 01536 VL53L1_Error status = VL53L1_ERROR_NONE; 01537 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01538 01539 LOG_FUNCTION_START(""); 01540 01541 01542 memcpy(&(pdev->zone_cfg.user_zones), &(pzone_cfg->user_zones), 01543 sizeof(pdev->zone_cfg.user_zones)); 01544 01545 01546 pdev->zone_cfg.max_zones = pzone_cfg->max_zones; 01547 pdev->zone_cfg.active_zones = pzone_cfg->active_zones; 01548 01549 status = VL53L1_init_zone_config_histogram_bins(&pdev->zone_cfg); 01550 01551 01552 01553 if (pzone_cfg->active_zones == 0) 01554 pdev->gen_cfg.global_config__stream_divider = 0; 01555 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES) 01556 pdev->gen_cfg.global_config__stream_divider = 01557 pzone_cfg->active_zones + 1; 01558 else 01559 pdev->gen_cfg.global_config__stream_divider = 01560 VL53L1_MAX_USER_ZONES + 1; 01561 01562 LOG_FUNCTION_END(status); 01563 01564 return status; 01565 01566 } 01567 01568 01569 VL53L1_Error VL53L1_get_zone_config( 01570 VL53L1_DEV Dev, 01571 VL53L1_zone_config_t *pzone_cfg) 01572 { 01573 01574 01575 VL53L1_Error status = VL53L1_ERROR_NONE; 01576 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01577 01578 LOG_FUNCTION_START(""); 01579 01580 01581 memcpy(pzone_cfg, &(pdev->zone_cfg), sizeof(VL53L1_zone_config_t)); 01582 01583 LOG_FUNCTION_END(status); 01584 01585 return status; 01586 } 01587 01588 VL53L1_Error VL53L1_get_preset_mode_timing_cfg( 01589 VL53L1_DEV Dev, 01590 VL53L1_DevicePresetModes device_preset_mode, 01591 uint16_t *pdss_config__target_total_rate_mcps, 01592 uint32_t *pphasecal_config_timeout_us, 01593 uint32_t *pmm_config_timeout_us, 01594 uint32_t *prange_config_timeout_us) 01595 { 01596 VL53L1_Error status = VL53L1_ERROR_NONE; 01597 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 01598 01599 LOG_FUNCTION_START(""); 01600 01601 01602 switch (device_preset_mode) { 01603 01604 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING: 01605 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE: 01606 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE: 01607 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL: 01608 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL: 01609 case VL53L1_DEVICEPRESETMODE_OLT: 01610 *pdss_config__target_total_rate_mcps = 01611 pdev->tuning_parms.tp_dss_target_lite_mcps; 01612 *pphasecal_config_timeout_us = 01613 pdev->tuning_parms.tp_phasecal_timeout_lite_us; 01614 *pmm_config_timeout_us = 01615 pdev->tuning_parms.tp_mm_timeout_lite_us; 01616 *prange_config_timeout_us = 01617 pdev->tuning_parms.tp_range_timeout_lite_us; 01618 break; 01619 01620 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING: 01621 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE: 01622 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE: 01623 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING: 01624 *pdss_config__target_total_rate_mcps = 01625 pdev->tuning_parms.tp_dss_target_timed_mcps; 01626 *pphasecal_config_timeout_us = 01627 pdev->tuning_parms.tp_phasecal_timeout_timed_us; 01628 *pmm_config_timeout_us = 01629 pdev->tuning_parms.tp_mm_timeout_timed_us; 01630 *prange_config_timeout_us = 01631 pdev->tuning_parms.tp_range_timeout_timed_us; 01632 break; 01633 01634 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE: 01635 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE: 01636 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE: 01637 *pdss_config__target_total_rate_mcps = 01638 pdev->tuning_parms.tp_dss_target_timed_mcps; 01639 *pphasecal_config_timeout_us = 01640 pdev->tuning_parms.tp_phasecal_timeout_timed_us; 01641 *pmm_config_timeout_us = 01642 pdev->tuning_parms.tp_mm_timeout_lpa_us; 01643 *prange_config_timeout_us = 01644 pdev->tuning_parms.tp_range_timeout_lpa_us; 01645 break; 01646 01647 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING: 01648 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1: 01649 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2: 01650 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL: 01651 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL: 01652 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY: 01653 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE: 01654 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1: 01655 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2: 01656 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION: 01657 *pdss_config__target_total_rate_mcps = 01658 pdev->tuning_parms.tp_dss_target_histo_mcps; 01659 *pphasecal_config_timeout_us = 01660 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us; 01661 *pmm_config_timeout_us = 01662 pdev->tuning_parms.tp_mm_timeout_histo_us; 01663 *prange_config_timeout_us = 01664 pdev->tuning_parms.tp_range_timeout_histo_us; 01665 01666 break; 01667 01668 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE: 01669 *pdss_config__target_total_rate_mcps = 01670 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 01671 *pphasecal_config_timeout_us = 01672 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us; 01673 *pmm_config_timeout_us = 01674 pdev->tuning_parms.tp_mm_timeout_mz_us; 01675 *prange_config_timeout_us = 01676 pdev->tuning_parms.tp_range_timeout_mz_us; 01677 break; 01678 01679 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE: 01680 *pdss_config__target_total_rate_mcps = 01681 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 01682 *pphasecal_config_timeout_us = 01683 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us; 01684 *pmm_config_timeout_us = 01685 pdev->tuning_parms.tp_mm_timeout_mz_us; 01686 *prange_config_timeout_us = 01687 pdev->tuning_parms.tp_range_timeout_mz_us; 01688 break; 01689 01690 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE: 01691 *pdss_config__target_total_rate_mcps = 01692 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 01693 *pphasecal_config_timeout_us = 01694 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us; 01695 *pmm_config_timeout_us = 01696 pdev->tuning_parms.tp_mm_timeout_mz_us; 01697 *prange_config_timeout_us = 01698 pdev->tuning_parms.tp_range_timeout_mz_us; 01699 break; 01700 01701 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING: 01702 *pdss_config__target_total_rate_mcps = 01703 pdev->tuning_parms.tp_dss_target_histo_mcps; 01704 *pphasecal_config_timeout_us = 01705 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 01706 *pmm_config_timeout_us = 01707 pdev->tuning_parms.tp_mm_timeout_histo_us; 01708 *prange_config_timeout_us = 01709 pdev->tuning_parms.tp_range_timeout_histo_us; 01710 break; 01711 01712 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE: 01713 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1: 01714 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2: 01715 *pdss_config__target_total_rate_mcps = 01716 pdev->tuning_parms.tp_dss_target_histo_mcps; 01717 *pphasecal_config_timeout_us = 01718 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us; 01719 *pmm_config_timeout_us = 01720 pdev->tuning_parms.tp_mm_timeout_histo_us; 01721 *prange_config_timeout_us = 01722 pdev->tuning_parms.tp_range_timeout_histo_us; 01723 break; 01724 01725 01726 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE: 01727 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1: 01728 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2: 01729 *pdss_config__target_total_rate_mcps = 01730 pdev->tuning_parms.tp_dss_target_histo_mcps; 01731 *pphasecal_config_timeout_us = 01732 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 01733 *pmm_config_timeout_us = 01734 pdev->tuning_parms.tp_mm_timeout_histo_us; 01735 *prange_config_timeout_us = 01736 pdev->tuning_parms.tp_range_timeout_histo_us; 01737 break; 01738 01739 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE: 01740 *pdss_config__target_total_rate_mcps = 01741 pdev->tuning_parms.tp_dss_target_very_short_mcps; 01742 *pphasecal_config_timeout_us = 01743 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 01744 *pmm_config_timeout_us = 01745 pdev->tuning_parms.tp_mm_timeout_histo_us; 01746 *prange_config_timeout_us = 01747 pdev->tuning_parms.tp_range_timeout_histo_us; 01748 break; 01749 01750 default: 01751 status = VL53L1_ERROR_INVALID_PARAMS; 01752 break; 01753 01754 } 01755 01756 LOG_FUNCTION_END(status); 01757 01758 return status; 01759 } 01760 01761 01762 VL53L1_Error VL53L1_set_preset_mode( 01763 VL53L1_DEV Dev, 01764 VL53L1_DevicePresetModes device_preset_mode, 01765 uint16_t dss_config__target_total_rate_mcps, 01766 uint32_t phasecal_config_timeout_us, 01767 uint32_t mm_config_timeout_us, 01768 uint32_t range_config_timeout_us, 01769 uint32_t inter_measurement_period_ms) 01770 { 01771 01772 01773 VL53L1_Error status = VL53L1_ERROR_NONE; 01774 VL53L1_LLDriverData_t *pdev = 01775 VL53L1DevStructGetLLDriverHandle(Dev); 01776 VL53L1_LLDriverResults_t *pres = 01777 VL53L1DevStructGetLLResultsHandle(Dev); 01778 01779 VL53L1_hist_post_process_config_t *phistpostprocess = 01780 &(pdev->histpostprocess); 01781 01782 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg); 01783 VL53L1_histogram_config_t *phistogram = &(pdev->hist_cfg); 01784 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg); 01785 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg); 01786 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg); 01787 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl); 01788 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg); 01789 VL53L1_tuning_parm_storage_t *ptuning_parms = &(pdev->tuning_parms); 01790 VL53L1_low_power_auto_data_t *plpadata = 01791 &(pdev->low_power_auto_data); 01792 01793 LOG_FUNCTION_START(""); 01794 01795 01796 pdev->preset_mode = device_preset_mode; 01797 pdev->mm_config_timeout_us = mm_config_timeout_us; 01798 pdev->range_config_timeout_us = range_config_timeout_us; 01799 pdev->inter_measurement_period_ms = inter_measurement_period_ms; 01800 01801 01802 01803 VL53L1_init_ll_driver_state( 01804 Dev, 01805 VL53L1_DEVICESTATE_SW_STANDBY); 01806 01807 01808 01809 switch (device_preset_mode) { 01810 01811 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING: 01812 status = VL53L1_preset_mode_standard_ranging( 01813 pstatic, 01814 phistogram, 01815 pgeneral, 01816 ptiming, 01817 pdynamic, 01818 psystem, 01819 ptuning_parms, 01820 pzone_cfg); 01821 break; 01822 01823 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE: 01824 status = VL53L1_preset_mode_standard_ranging_short_range( 01825 pstatic, 01826 phistogram, 01827 pgeneral, 01828 ptiming, 01829 pdynamic, 01830 psystem, 01831 ptuning_parms, 01832 pzone_cfg); 01833 break; 01834 01835 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE: 01836 status = VL53L1_preset_mode_standard_ranging_long_range( 01837 pstatic, 01838 phistogram, 01839 pgeneral, 01840 ptiming, 01841 pdynamic, 01842 psystem, 01843 ptuning_parms, 01844 pzone_cfg); 01845 break; 01846 01847 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL: 01848 status = VL53L1_preset_mode_standard_ranging_mm1_cal( 01849 pstatic, 01850 phistogram, 01851 pgeneral, 01852 ptiming, 01853 pdynamic, 01854 psystem, 01855 ptuning_parms, 01856 pzone_cfg); 01857 break; 01858 01859 case VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL: 01860 status = VL53L1_preset_mode_standard_ranging_mm2_cal( 01861 pstatic, 01862 phistogram, 01863 pgeneral, 01864 ptiming, 01865 pdynamic, 01866 psystem, 01867 ptuning_parms, 01868 pzone_cfg); 01869 break; 01870 01871 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING: 01872 status = VL53L1_preset_mode_timed_ranging( 01873 pstatic, 01874 phistogram, 01875 pgeneral, 01876 ptiming, 01877 pdynamic, 01878 psystem, 01879 ptuning_parms, 01880 pzone_cfg); 01881 break; 01882 01883 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE: 01884 status = VL53L1_preset_mode_timed_ranging_short_range( 01885 pstatic, 01886 phistogram, 01887 pgeneral, 01888 ptiming, 01889 pdynamic, 01890 psystem, 01891 ptuning_parms, 01892 pzone_cfg); 01893 break; 01894 01895 case VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE: 01896 status = VL53L1_preset_mode_timed_ranging_long_range( 01897 pstatic, 01898 phistogram, 01899 pgeneral, 01900 ptiming, 01901 pdynamic, 01902 psystem, 01903 ptuning_parms, 01904 pzone_cfg); 01905 break; 01906 01907 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING: 01908 status = VL53L1_preset_mode_histogram_ranging( 01909 phistpostprocess, 01910 pstatic, 01911 phistogram, 01912 pgeneral, 01913 ptiming, 01914 pdynamic, 01915 psystem, 01916 ptuning_parms, 01917 pzone_cfg); 01918 break; 01919 01920 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM1: 01921 status = VL53L1_preset_mode_histogram_ranging_with_mm1( 01922 phistpostprocess, 01923 pstatic, 01924 phistogram, 01925 pgeneral, 01926 ptiming, 01927 pdynamic, 01928 psystem, 01929 ptuning_parms, 01930 pzone_cfg); 01931 break; 01932 01933 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_WITH_MM2: 01934 status = VL53L1_preset_mode_histogram_ranging_with_mm2( 01935 phistpostprocess, 01936 pstatic, 01937 phistogram, 01938 pgeneral, 01939 ptiming, 01940 pdynamic, 01941 psystem, 01942 ptuning_parms, 01943 pzone_cfg); 01944 break; 01945 01946 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM1_CAL: 01947 status = VL53L1_preset_mode_histogram_ranging_mm1_cal( 01948 phistpostprocess, 01949 pstatic, 01950 phistogram, 01951 pgeneral, 01952 ptiming, 01953 pdynamic, 01954 psystem, 01955 ptuning_parms, 01956 pzone_cfg); 01957 break; 01958 01959 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_MM2_CAL: 01960 status = VL53L1_preset_mode_histogram_ranging_mm2_cal( 01961 phistpostprocess, 01962 pstatic, 01963 phistogram, 01964 pgeneral, 01965 ptiming, 01966 pdynamic, 01967 psystem, 01968 ptuning_parms, 01969 pzone_cfg); 01970 break; 01971 01972 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE: 01973 status = VL53L1_preset_mode_histogram_multizone( 01974 phistpostprocess, 01975 pstatic, 01976 phistogram, 01977 pgeneral, 01978 ptiming, 01979 pdynamic, 01980 psystem, 01981 ptuning_parms, 01982 pzone_cfg); 01983 break; 01984 01985 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_SHORT_RANGE: 01986 status = VL53L1_preset_mode_histogram_multizone_short_range( 01987 phistpostprocess, 01988 pstatic, 01989 phistogram, 01990 pgeneral, 01991 ptiming, 01992 pdynamic, 01993 psystem, 01994 ptuning_parms, 01995 pzone_cfg); 01996 break; 01997 01998 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MULTIZONE_LONG_RANGE: 01999 status = VL53L1_preset_mode_histogram_multizone_long_range( 02000 phistpostprocess, 02001 pstatic, 02002 phistogram, 02003 pgeneral, 02004 ptiming, 02005 pdynamic, 02006 psystem, 02007 ptuning_parms, 02008 pzone_cfg); 02009 break; 02010 02011 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_REF_ARRAY: 02012 status = VL53L1_preset_mode_histogram_ranging_ref( 02013 phistpostprocess, 02014 pstatic, 02015 phistogram, 02016 pgeneral, 02017 ptiming, 02018 pdynamic, 02019 psystem, 02020 ptuning_parms, 02021 pzone_cfg); 02022 break; 02023 02024 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_RANGING_SHORT_TIMING: 02025 status = VL53L1_preset_mode_histogram_ranging_short_timing( 02026 phistpostprocess, 02027 pstatic, 02028 phistogram, 02029 pgeneral, 02030 ptiming, 02031 pdynamic, 02032 psystem, 02033 ptuning_parms, 02034 pzone_cfg); 02035 break; 02036 02037 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE: 02038 status = VL53L1_preset_mode_histogram_long_range( 02039 phistpostprocess, 02040 pstatic, 02041 phistogram, 02042 pgeneral, 02043 ptiming, 02044 pdynamic, 02045 psystem, 02046 ptuning_parms, 02047 pzone_cfg); 02048 break; 02049 02050 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM1: 02051 status = VL53L1_preset_mode_histogram_long_range_mm1( 02052 phistpostprocess, 02053 pstatic, 02054 phistogram, 02055 pgeneral, 02056 ptiming, 02057 pdynamic, 02058 psystem, 02059 ptuning_parms, 02060 pzone_cfg); 02061 break; 02062 02063 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_LONG_RANGE_MM2: 02064 status = VL53L1_preset_mode_histogram_long_range_mm2( 02065 phistpostprocess, 02066 pstatic, 02067 phistogram, 02068 pgeneral, 02069 ptiming, 02070 pdynamic, 02071 psystem, 02072 ptuning_parms, 02073 pzone_cfg); 02074 break; 02075 02076 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE: 02077 status = VL53L1_preset_mode_histogram_medium_range( 02078 phistpostprocess, 02079 pstatic, 02080 phistogram, 02081 pgeneral, 02082 ptiming, 02083 pdynamic, 02084 psystem, 02085 ptuning_parms, 02086 pzone_cfg); 02087 break; 02088 02089 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM1: 02090 status = VL53L1_preset_mode_histogram_medium_range_mm1( 02091 phistpostprocess, 02092 pstatic, 02093 phistogram, 02094 pgeneral, 02095 ptiming, 02096 pdynamic, 02097 psystem, 02098 ptuning_parms, 02099 pzone_cfg); 02100 break; 02101 02102 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_MEDIUM_RANGE_MM2: 02103 status = VL53L1_preset_mode_histogram_medium_range_mm2( 02104 phistpostprocess, 02105 pstatic, 02106 phistogram, 02107 pgeneral, 02108 ptiming, 02109 pdynamic, 02110 psystem, 02111 ptuning_parms, 02112 pzone_cfg); 02113 break; 02114 02115 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE: 02116 status = VL53L1_preset_mode_histogram_short_range( 02117 phistpostprocess, 02118 pstatic, 02119 phistogram, 02120 pgeneral, 02121 ptiming, 02122 pdynamic, 02123 psystem, 02124 ptuning_parms, 02125 pzone_cfg); 02126 break; 02127 02128 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM1: 02129 status = VL53L1_preset_mode_histogram_short_range_mm1( 02130 phistpostprocess, 02131 pstatic, 02132 phistogram, 02133 pgeneral, 02134 ptiming, 02135 pdynamic, 02136 psystem, 02137 ptuning_parms, 02138 pzone_cfg); 02139 break; 02140 02141 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_SHORT_RANGE_MM2: 02142 status = VL53L1_preset_mode_histogram_short_range_mm2( 02143 phistpostprocess, 02144 pstatic, 02145 phistogram, 02146 pgeneral, 02147 ptiming, 02148 pdynamic, 02149 psystem, 02150 ptuning_parms, 02151 pzone_cfg); 02152 break; 02153 02154 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_CHARACTERISATION: 02155 status = VL53L1_preset_mode_histogram_characterisation( 02156 phistpostprocess, 02157 pstatic, 02158 phistogram, 02159 pgeneral, 02160 ptiming, 02161 pdynamic, 02162 psystem, 02163 ptuning_parms, 02164 pzone_cfg); 02165 break; 02166 02167 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_PLANAR: 02168 status = VL53L1_preset_mode_histogram_xtalk_planar( 02169 phistpostprocess, 02170 pstatic, 02171 phistogram, 02172 pgeneral, 02173 ptiming, 02174 pdynamic, 02175 psystem, 02176 ptuning_parms, 02177 pzone_cfg); 02178 break; 02179 02180 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM1: 02181 status = VL53L1_preset_mode_histogram_xtalk_mm1( 02182 phistpostprocess, 02183 pstatic, 02184 phistogram, 02185 pgeneral, 02186 ptiming, 02187 pdynamic, 02188 psystem, 02189 ptuning_parms, 02190 pzone_cfg); 02191 break; 02192 02193 case VL53L1_DEVICEPRESETMODE_HISTOGRAM_XTALK_MM2: 02194 status = VL53L1_preset_mode_histogram_xtalk_mm2( 02195 phistpostprocess, 02196 pstatic, 02197 phistogram, 02198 pgeneral, 02199 ptiming, 02200 pdynamic, 02201 psystem, 02202 ptuning_parms, 02203 pzone_cfg); 02204 break; 02205 02206 case VL53L1_DEVICEPRESETMODE_OLT: 02207 status = VL53L1_preset_mode_olt( 02208 pstatic, 02209 phistogram, 02210 pgeneral, 02211 ptiming, 02212 pdynamic, 02213 psystem, 02214 ptuning_parms, 02215 pzone_cfg); 02216 break; 02217 02218 case VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING: 02219 status = VL53L1_preset_mode_singleshot_ranging( 02220 pstatic, 02221 phistogram, 02222 pgeneral, 02223 ptiming, 02224 pdynamic, 02225 psystem, 02226 ptuning_parms, 02227 pzone_cfg); 02228 break; 02229 02230 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE: 02231 status = VL53L1_preset_mode_low_power_auto_short_ranging( 02232 pstatic, 02233 phistogram, 02234 pgeneral, 02235 ptiming, 02236 pdynamic, 02237 psystem, 02238 ptuning_parms, 02239 pzone_cfg, 02240 plpadata); 02241 break; 02242 02243 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE: 02244 status = VL53L1_preset_mode_low_power_auto_ranging( 02245 pstatic, 02246 phistogram, 02247 pgeneral, 02248 ptiming, 02249 pdynamic, 02250 psystem, 02251 ptuning_parms, 02252 pzone_cfg, 02253 plpadata); 02254 break; 02255 02256 case VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE: 02257 status = VL53L1_preset_mode_low_power_auto_long_ranging( 02258 pstatic, 02259 phistogram, 02260 pgeneral, 02261 ptiming, 02262 pdynamic, 02263 psystem, 02264 ptuning_parms, 02265 pzone_cfg, 02266 plpadata); 02267 break; 02268 02269 02270 case VL53L1_DEVICEPRESETMODE_SPECIAL_HISTOGRAM_SHORT_RANGE: 02271 status = VL53L1_preset_mode_special_histogram_short_range( 02272 phistpostprocess, 02273 pstatic, 02274 phistogram, 02275 pgeneral, 02276 ptiming, 02277 pdynamic, 02278 psystem, 02279 ptuning_parms, 02280 pzone_cfg); 02281 break; 02282 02283 default: 02284 status = VL53L1_ERROR_INVALID_PARAMS; 02285 break; 02286 02287 } 02288 02289 02290 02291 if (status == VL53L1_ERROR_NONE) { 02292 02293 pstatic->dss_config__target_total_rate_mcps = 02294 dss_config__target_total_rate_mcps; 02295 pdev->dss_config__target_total_rate_mcps = 02296 dss_config__target_total_rate_mcps; 02297 02298 } 02299 02300 02301 02302 if (status == VL53L1_ERROR_NONE) 02303 status = 02304 VL53L1_set_timeouts_us( 02305 Dev, 02306 phasecal_config_timeout_us, 02307 mm_config_timeout_us, 02308 range_config_timeout_us); 02309 02310 if (status == VL53L1_ERROR_NONE) 02311 status = 02312 VL53L1_set_inter_measurement_period_ms( 02313 Dev, 02314 inter_measurement_period_ms); 02315 02316 02317 02318 V53L1_init_zone_results_structure( 02319 pdev->zone_cfg.active_zones+1, 02320 &(pres->zone_results)); 02321 02322 LOG_FUNCTION_END(status); 02323 02324 return status; 02325 } 02326 02327 02328 VL53L1_Error VL53L1_set_zone_preset( 02329 VL53L1_DEV Dev, 02330 VL53L1_DeviceZonePreset zone_preset) 02331 { 02332 02333 02334 VL53L1_Error status = VL53L1_ERROR_NONE; 02335 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02336 02337 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg); 02338 VL53L1_zone_config_t *pzone_cfg = &(pdev->zone_cfg); 02339 02340 LOG_FUNCTION_START(""); 02341 02342 02343 pdev->zone_preset = zone_preset; 02344 02345 02346 02347 switch (zone_preset) { 02348 02349 case VL53L1_DEVICEZONEPRESET_XTALK_PLANAR: 02350 status = 02351 VL53L1_zone_preset_xtalk_planar( 02352 pgeneral, 02353 pzone_cfg); 02354 break; 02355 02356 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_16X16: 02357 status = 02358 VL53L1_init_zone_config_structure( 02359 8, 1, 1, 02360 8, 1, 1, 02361 15, 15, 02362 pzone_cfg); 02363 break; 02364 02365 case VL53L1_DEVICEZONEPRESET_1X2_SIZE_16X8: 02366 status = 02367 VL53L1_init_zone_config_structure( 02368 8, 1, 1, 02369 4, 8, 2, 02370 15, 7, 02371 pzone_cfg); 02372 break; 02373 02374 case VL53L1_DEVICEZONEPRESET_2X1_SIZE_8X16: 02375 status = 02376 VL53L1_init_zone_config_structure( 02377 4, 8, 2, 02378 8, 1, 1, 02379 7, 15, 02380 pzone_cfg); 02381 break; 02382 02383 case VL53L1_DEVICEZONEPRESET_2X2_SIZE_8X8: 02384 status = 02385 VL53L1_init_zone_config_structure( 02386 4, 8, 2, 02387 4, 8, 2, 02388 7, 7, 02389 pzone_cfg); 02390 break; 02391 02392 case VL53L1_DEVICEZONEPRESET_3X3_SIZE_5X5: 02393 status = 02394 VL53L1_init_zone_config_structure( 02395 2, 5, 3, 02396 2, 5, 3, 02397 4, 4, 02398 pzone_cfg); 02399 break; 02400 02401 case VL53L1_DEVICEZONEPRESET_4X4_SIZE_4X4: 02402 status = 02403 VL53L1_init_zone_config_structure( 02404 2, 4, 4, 02405 2, 4, 4, 02406 3, 3, 02407 pzone_cfg); 02408 break; 02409 02410 case VL53L1_DEVICEZONEPRESET_5X5_SIZE_4X4: 02411 status = 02412 VL53L1_init_zone_config_structure( 02413 2, 3, 5, 02414 2, 3, 5, 02415 3, 3, 02416 pzone_cfg); 02417 break; 02418 02419 case VL53L1_DEVICEZONEPRESET_11X11_SIZE_5X5: 02420 status = 02421 VL53L1_init_zone_config_structure( 02422 3, 1, 11, 02423 3, 1, 11, 02424 4, 4, 02425 pzone_cfg); 02426 break; 02427 02428 case VL53L1_DEVICEZONEPRESET_13X13_SIZE_4X4: 02429 status = 02430 VL53L1_init_zone_config_structure( 02431 2, 1, 13, 02432 2, 1, 13, 02433 3, 3, 02434 pzone_cfg); 02435 02436 break; 02437 02438 case VL53L1_DEVICEZONEPRESET_1X1_SIZE_4X4_POS_8X8: 02439 status = 02440 VL53L1_init_zone_config_structure( 02441 8, 1, 1, 02442 8, 1, 1, 02443 3, 3, 02444 pzone_cfg); 02445 break; 02446 02447 } 02448 02449 02450 02451 if (pzone_cfg->active_zones == 0) 02452 pdev->gen_cfg.global_config__stream_divider = 0; 02453 else if (pzone_cfg->active_zones < VL53L1_MAX_USER_ZONES) 02454 pdev->gen_cfg.global_config__stream_divider = 02455 pzone_cfg->active_zones + 1; 02456 else 02457 pdev->gen_cfg.global_config__stream_divider = 02458 VL53L1_MAX_USER_ZONES + 1; 02459 02460 LOG_FUNCTION_END(status); 02461 02462 return status; 02463 } 02464 02465 02466 VL53L1_Error VL53L1_enable_xtalk_compensation( 02467 VL53L1_DEV Dev) 02468 { 02469 02470 02471 VL53L1_Error status = VL53L1_ERROR_NONE; 02472 uint32_t tempu32; 02473 02474 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02475 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 02476 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 02477 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 02478 02479 LOG_FUNCTION_START(""); 02480 02481 02482 tempu32 = VL53L1_calc_crosstalk_plane_offset_with_margin( 02483 pC->algo__crosstalk_compensation_plane_offset_kcps, 02484 pC->lite_mode_crosstalk_margin_kcps); 02485 if (tempu32 > 0xFFFF) 02486 tempu32 = 0xFFFF; 02487 02488 pN->algo__crosstalk_compensation_plane_offset_kcps = 02489 (uint16_t)tempu32; 02490 02491 pN->algo__crosstalk_compensation_x_plane_gradient_kcps = 02492 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 02493 02494 pN->algo__crosstalk_compensation_y_plane_gradient_kcps = 02495 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 02496 02497 02498 pHP->algo__crosstalk_compensation_plane_offset_kcps = 02499 VL53L1_calc_crosstalk_plane_offset_with_margin( 02500 pC->algo__crosstalk_compensation_plane_offset_kcps, 02501 pC->histogram_mode_crosstalk_margin_kcps); 02502 02503 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps 02504 = pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 02505 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps 02506 = pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 02507 02508 02509 02510 pC->global_crosstalk_compensation_enable = 0x01; 02511 02512 pHP->algo__crosstalk_compensation_enable = 02513 pC->global_crosstalk_compensation_enable; 02514 02515 02516 02517 02518 if (status == VL53L1_ERROR_NONE) { 02519 pC->crosstalk_range_ignore_threshold_rate_mcps = 02520 VL53L1_calc_range_ignore_threshold( 02521 pC->algo__crosstalk_compensation_plane_offset_kcps, 02522 pC->algo__crosstalk_compensation_x_plane_gradient_kcps, 02523 pC->algo__crosstalk_compensation_y_plane_gradient_kcps, 02524 pC->crosstalk_range_ignore_threshold_mult); 02525 } 02526 02527 02528 02529 if (status == VL53L1_ERROR_NONE) 02530 status = 02531 VL53L1_set_customer_nvm_managed( 02532 Dev, 02533 &(pdev->customer)); 02534 02535 LOG_FUNCTION_END(status); 02536 02537 return status; 02538 02539 } 02540 02541 void VL53L1_get_xtalk_compensation_enable( 02542 VL53L1_DEV Dev, 02543 uint8_t *pcrosstalk_compensation_enable) 02544 { 02545 02546 02547 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02548 02549 LOG_FUNCTION_START(""); 02550 02551 02552 02553 *pcrosstalk_compensation_enable = 02554 pdev->xtalk_cfg.global_crosstalk_compensation_enable; 02555 02556 } 02557 02558 02559 VL53L1_Error VL53L1_get_lite_xtalk_margin_kcps( 02560 VL53L1_DEV Dev, 02561 int16_t *pxtalk_margin) 02562 { 02563 02564 02565 02566 VL53L1_Error status = VL53L1_ERROR_NONE; 02567 02568 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02569 02570 LOG_FUNCTION_START(""); 02571 02572 *pxtalk_margin = pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps; 02573 02574 LOG_FUNCTION_END(status); 02575 02576 return status; 02577 02578 } 02579 02580 VL53L1_Error VL53L1_set_lite_xtalk_margin_kcps( 02581 VL53L1_DEV Dev, 02582 int16_t xtalk_margin) 02583 { 02584 02585 02586 02587 VL53L1_Error status = VL53L1_ERROR_NONE; 02588 02589 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02590 02591 LOG_FUNCTION_START(""); 02592 02593 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = xtalk_margin; 02594 02595 LOG_FUNCTION_END(status); 02596 02597 return status; 02598 } 02599 02600 02601 VL53L1_Error VL53L1_get_histogram_xtalk_margin_kcps( 02602 VL53L1_DEV Dev, 02603 int16_t *pxtalk_margin) 02604 { 02605 02606 02607 02608 VL53L1_Error status = VL53L1_ERROR_NONE; 02609 02610 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02611 02612 LOG_FUNCTION_START(""); 02613 02614 *pxtalk_margin = pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps; 02615 02616 LOG_FUNCTION_END(status); 02617 02618 return status; 02619 02620 } 02621 02622 VL53L1_Error VL53L1_set_histogram_xtalk_margin_kcps( 02623 VL53L1_DEV Dev, 02624 int16_t xtalk_margin) 02625 { 02626 02627 02628 02629 VL53L1_Error status = VL53L1_ERROR_NONE; 02630 02631 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02632 02633 LOG_FUNCTION_START(""); 02634 02635 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = xtalk_margin; 02636 02637 LOG_FUNCTION_END(status); 02638 02639 return status; 02640 } 02641 02642 VL53L1_Error VL53L1_restore_xtalk_nvm_default( 02643 VL53L1_DEV Dev) 02644 { 02645 02646 02647 02648 VL53L1_Error status = VL53L1_ERROR_NONE; 02649 02650 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02651 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 02652 02653 LOG_FUNCTION_START(""); 02654 02655 pC->algo__crosstalk_compensation_plane_offset_kcps = 02656 pC->nvm_default__crosstalk_compensation_plane_offset_kcps; 02657 pC->algo__crosstalk_compensation_x_plane_gradient_kcps = 02658 pC->nvm_default__crosstalk_compensation_x_plane_gradient_kcps; 02659 pC->algo__crosstalk_compensation_y_plane_gradient_kcps = 02660 pC->nvm_default__crosstalk_compensation_y_plane_gradient_kcps; 02661 02662 LOG_FUNCTION_END(status); 02663 02664 return status; 02665 } 02666 02667 VL53L1_Error VL53L1_disable_xtalk_compensation( 02668 VL53L1_DEV Dev) 02669 { 02670 02671 02672 VL53L1_Error status = VL53L1_ERROR_NONE; 02673 02674 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02675 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 02676 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 02677 02678 LOG_FUNCTION_START(""); 02679 02680 02681 pN->algo__crosstalk_compensation_plane_offset_kcps = 02682 0x00; 02683 02684 pN->algo__crosstalk_compensation_x_plane_gradient_kcps = 02685 0x00; 02686 02687 pN->algo__crosstalk_compensation_y_plane_gradient_kcps = 02688 0x00; 02689 02690 02691 02692 pdev->xtalk_cfg.global_crosstalk_compensation_enable = 0x00; 02693 02694 pHP->algo__crosstalk_compensation_enable = 02695 pdev->xtalk_cfg.global_crosstalk_compensation_enable; 02696 02697 02698 02699 if (status == VL53L1_ERROR_NONE) { 02700 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps = 02701 0x0000; 02702 } 02703 02704 02705 02706 if (status == VL53L1_ERROR_NONE) { 02707 status = 02708 VL53L1_set_customer_nvm_managed( 02709 Dev, 02710 &(pdev->customer)); 02711 } 02712 LOG_FUNCTION_END(status); 02713 02714 return status; 02715 02716 } 02717 02718 02719 VL53L1_Error VL53L1_get_histogram_phase_consistency( 02720 VL53L1_DEV Dev, 02721 uint8_t *pphase_consistency) 02722 { 02723 02724 02725 02726 VL53L1_Error status = VL53L1_ERROR_NONE; 02727 02728 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02729 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 02730 02731 LOG_FUNCTION_START(""); 02732 02733 *pphase_consistency = 02734 pHP->algo__consistency_check__phase_tolerance; 02735 02736 LOG_FUNCTION_END(status); 02737 02738 return status; 02739 02740 } 02741 02742 VL53L1_Error VL53L1_set_histogram_phase_consistency( 02743 VL53L1_DEV Dev, 02744 uint8_t phase_consistency) 02745 { 02746 02747 02748 02749 VL53L1_Error status = VL53L1_ERROR_NONE; 02750 02751 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02752 02753 LOG_FUNCTION_START(""); 02754 02755 pdev->histpostprocess.algo__consistency_check__phase_tolerance = 02756 phase_consistency; 02757 02758 LOG_FUNCTION_END(status); 02759 02760 return status; 02761 02762 } 02763 02764 VL53L1_Error VL53L1_get_histogram_event_consistency( 02765 VL53L1_DEV Dev, 02766 uint8_t *pevent_consistency) 02767 { 02768 02769 02770 02771 VL53L1_Error status = VL53L1_ERROR_NONE; 02772 02773 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02774 02775 LOG_FUNCTION_START(""); 02776 02777 *pevent_consistency = 02778 pdev->histpostprocess.algo__consistency_check__event_sigma; 02779 02780 LOG_FUNCTION_END(status); 02781 02782 return status; 02783 02784 } 02785 02786 VL53L1_Error VL53L1_set_histogram_event_consistency( 02787 VL53L1_DEV Dev, 02788 uint8_t event_consistency) 02789 { 02790 02791 02792 02793 VL53L1_Error status = VL53L1_ERROR_NONE; 02794 02795 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02796 02797 LOG_FUNCTION_START(""); 02798 02799 pdev->histpostprocess.algo__consistency_check__event_sigma = 02800 event_consistency; 02801 02802 LOG_FUNCTION_END(status); 02803 02804 return status; 02805 02806 } 02807 02808 VL53L1_Error VL53L1_get_histogram_ambient_threshold_sigma( 02809 VL53L1_DEV Dev, 02810 uint8_t *pamb_thresh_sigma) 02811 { 02812 02813 02814 02815 VL53L1_Error status = VL53L1_ERROR_NONE; 02816 02817 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02818 02819 LOG_FUNCTION_START(""); 02820 02821 *pamb_thresh_sigma = 02822 pdev->histpostprocess.ambient_thresh_sigma1; 02823 02824 LOG_FUNCTION_END(status); 02825 02826 return status; 02827 02828 } 02829 02830 VL53L1_Error VL53L1_set_histogram_ambient_threshold_sigma( 02831 VL53L1_DEV Dev, 02832 uint8_t amb_thresh_sigma) 02833 { 02834 02835 02836 02837 VL53L1_Error status = VL53L1_ERROR_NONE; 02838 02839 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02840 02841 LOG_FUNCTION_START(""); 02842 02843 pdev->histpostprocess.ambient_thresh_sigma1 = 02844 amb_thresh_sigma; 02845 02846 LOG_FUNCTION_END(status); 02847 02848 return status; 02849 02850 } 02851 02852 VL53L1_Error VL53L1_get_lite_sigma_threshold( 02853 VL53L1_DEV Dev, 02854 uint16_t *plite_sigma) 02855 { 02856 02857 02858 02859 VL53L1_Error status = VL53L1_ERROR_NONE; 02860 02861 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02862 02863 LOG_FUNCTION_START(""); 02864 02865 *plite_sigma = 02866 pdev->tim_cfg.range_config__sigma_thresh; 02867 02868 LOG_FUNCTION_END(status); 02869 02870 return status; 02871 02872 } 02873 02874 VL53L1_Error VL53L1_set_lite_sigma_threshold( 02875 VL53L1_DEV Dev, 02876 uint16_t lite_sigma) 02877 { 02878 02879 02880 02881 VL53L1_Error status = VL53L1_ERROR_NONE; 02882 02883 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02884 02885 LOG_FUNCTION_START(""); 02886 02887 pdev->tim_cfg.range_config__sigma_thresh = lite_sigma; 02888 02889 LOG_FUNCTION_END(status); 02890 02891 return status; 02892 02893 } 02894 02895 VL53L1_Error VL53L1_get_lite_min_count_rate( 02896 VL53L1_DEV Dev, 02897 uint16_t *plite_mincountrate) 02898 { 02899 02900 02901 02902 VL53L1_Error status = VL53L1_ERROR_NONE; 02903 02904 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02905 02906 LOG_FUNCTION_START(""); 02907 02908 *plite_mincountrate = 02909 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps; 02910 02911 LOG_FUNCTION_END(status); 02912 02913 return status; 02914 02915 } 02916 02917 VL53L1_Error VL53L1_set_lite_min_count_rate( 02918 VL53L1_DEV Dev, 02919 uint16_t lite_mincountrate) 02920 { 02921 02922 02923 02924 VL53L1_Error status = VL53L1_ERROR_NONE; 02925 02926 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02927 02928 LOG_FUNCTION_START(""); 02929 02930 pdev->tim_cfg.range_config__min_count_rate_rtn_limit_mcps = 02931 lite_mincountrate; 02932 02933 LOG_FUNCTION_END(status); 02934 02935 return status; 02936 02937 } 02938 02939 02940 VL53L1_Error VL53L1_get_xtalk_detect_config( 02941 VL53L1_DEV Dev, 02942 int16_t *pmax_valid_range_mm, 02943 int16_t *pmin_valid_range_mm, 02944 uint16_t *pmax_valid_rate_kcps, 02945 uint16_t *pmax_sigma_mm) 02946 { 02947 02948 02949 02950 VL53L1_Error status = VL53L1_ERROR_NONE; 02951 02952 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02953 02954 LOG_FUNCTION_START(""); 02955 02956 *pmax_valid_range_mm = 02957 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm; 02958 *pmin_valid_range_mm = 02959 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm; 02960 *pmax_valid_rate_kcps = 02961 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps; 02962 *pmax_sigma_mm = 02963 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm; 02964 02965 LOG_FUNCTION_END(status); 02966 02967 return status; 02968 02969 } 02970 02971 VL53L1_Error VL53L1_set_xtalk_detect_config( 02972 VL53L1_DEV Dev, 02973 int16_t max_valid_range_mm, 02974 int16_t min_valid_range_mm, 02975 uint16_t max_valid_rate_kcps, 02976 uint16_t max_sigma_mm) 02977 { 02978 02979 02980 02981 VL53L1_Error status = VL53L1_ERROR_NONE; 02982 02983 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 02984 02985 LOG_FUNCTION_START(""); 02986 02987 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm = 02988 max_valid_range_mm; 02989 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm = 02990 min_valid_range_mm; 02991 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps = 02992 max_valid_rate_kcps; 02993 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm = 02994 max_sigma_mm; 02995 02996 LOG_FUNCTION_END(status); 02997 02998 return status; 02999 03000 } 03001 03002 VL53L1_Error VL53L1_get_target_order_mode( 03003 VL53L1_DEV Dev, 03004 VL53L1_HistTargetOrder *phist_target_order) 03005 { 03006 03007 03008 03009 VL53L1_Error status = VL53L1_ERROR_NONE; 03010 03011 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03012 03013 LOG_FUNCTION_START(""); 03014 03015 *phist_target_order = 03016 pdev->histpostprocess.hist_target_order; 03017 03018 LOG_FUNCTION_END(status); 03019 03020 return status; 03021 03022 } 03023 03024 VL53L1_Error VL53L1_set_target_order_mode( 03025 VL53L1_DEV Dev, 03026 VL53L1_HistTargetOrder hist_target_order) 03027 { 03028 03029 03030 03031 VL53L1_Error status = VL53L1_ERROR_NONE; 03032 03033 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03034 03035 LOG_FUNCTION_START(""); 03036 03037 pdev->histpostprocess.hist_target_order = hist_target_order; 03038 03039 LOG_FUNCTION_END(status); 03040 03041 return status; 03042 03043 } 03044 03045 03046 VL53L1_Error VL53L1_get_dmax_reflectance_values( 03047 VL53L1_DEV Dev, 03048 VL53L1_dmax_reflectance_array_t *pdmax_reflectances) 03049 { 03050 03051 VL53L1_Error status = VL53L1_ERROR_NONE; 03052 03053 uint8_t i = 0; 03054 03055 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03056 03057 LOG_FUNCTION_START(""); 03058 03059 03060 03061 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) { 03062 pdmax_reflectances->target_reflectance_for_dmax[i] = 03063 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i]; 03064 } 03065 03066 LOG_FUNCTION_END(status); 03067 03068 return status; 03069 03070 } 03071 03072 VL53L1_Error VL53L1_set_dmax_reflectance_values( 03073 VL53L1_DEV Dev, 03074 VL53L1_dmax_reflectance_array_t *pdmax_reflectances) 03075 { 03076 03077 VL53L1_Error status = VL53L1_ERROR_NONE; 03078 03079 uint8_t i = 0; 03080 03081 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03082 03083 LOG_FUNCTION_START(""); 03084 03085 03086 03087 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) { 03088 pdev->dmax_cfg.target_reflectance_for_dmax_calc[i] = 03089 pdmax_reflectances->target_reflectance_for_dmax[i]; 03090 } 03091 03092 LOG_FUNCTION_END(status); 03093 03094 return status; 03095 03096 } 03097 03098 VL53L1_Error VL53L1_get_vhv_loopbound( 03099 VL53L1_DEV Dev, 03100 uint8_t *pvhv_loopbound) 03101 { 03102 03103 03104 03105 VL53L1_Error status = VL53L1_ERROR_NONE; 03106 03107 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03108 03109 LOG_FUNCTION_START(""); 03110 03111 *pvhv_loopbound = 03112 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound / 4; 03113 03114 LOG_FUNCTION_END(status); 03115 03116 return status; 03117 03118 } 03119 03120 03121 03122 VL53L1_Error VL53L1_set_vhv_loopbound( 03123 VL53L1_DEV Dev, 03124 uint8_t vhv_loopbound) 03125 { 03126 03127 03128 03129 VL53L1_Error status = VL53L1_ERROR_NONE; 03130 03131 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03132 03133 LOG_FUNCTION_START(""); 03134 03135 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound = 03136 (pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound & 0x03) + 03137 (vhv_loopbound * 4); 03138 03139 LOG_FUNCTION_END(status); 03140 03141 return status; 03142 03143 } 03144 03145 03146 03147 VL53L1_Error VL53L1_get_vhv_config( 03148 VL53L1_DEV Dev, 03149 uint8_t *pvhv_init_en, 03150 uint8_t *pvhv_init_value) 03151 { 03152 03153 03154 03155 03156 03157 VL53L1_Error status = VL53L1_ERROR_NONE; 03158 03159 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03160 03161 LOG_FUNCTION_START(""); 03162 03163 *pvhv_init_en = (pdev->stat_nvm.vhv_config__init & 0x80) >> 7; 03164 *pvhv_init_value = 03165 (pdev->stat_nvm.vhv_config__init & 0x7F); 03166 03167 LOG_FUNCTION_END(status); 03168 03169 return status; 03170 03171 } 03172 03173 03174 03175 VL53L1_Error VL53L1_set_vhv_config( 03176 VL53L1_DEV Dev, 03177 uint8_t vhv_init_en, 03178 uint8_t vhv_init_value) 03179 { 03180 03181 03182 03183 VL53L1_Error status = VL53L1_ERROR_NONE; 03184 03185 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03186 03187 LOG_FUNCTION_START(""); 03188 03189 pdev->stat_nvm.vhv_config__init = 03190 ((vhv_init_en & 0x01) << 7) + 03191 (vhv_init_value & 0x7F); 03192 03193 LOG_FUNCTION_END(status); 03194 03195 return status; 03196 03197 } 03198 03199 03200 03201 VL53L1_Error VL53L1_init_and_start_range( 03202 VL53L1_DEV Dev, 03203 uint8_t measurement_mode, 03204 VL53L1_DeviceConfigLevel device_config_level) 03205 { 03206 03207 03208 VL53L1_Error status = VL53L1_ERROR_NONE; 03209 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03210 VL53L1_LLDriverResults_t *pres = 03211 VL53L1DevStructGetLLResultsHandle(Dev); 03212 03213 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE]; 03214 03215 VL53L1_static_nvm_managed_t *pstatic_nvm = &(pdev->stat_nvm); 03216 VL53L1_customer_nvm_managed_t *pcustomer_nvm = &(pdev->customer); 03217 VL53L1_static_config_t *pstatic = &(pdev->stat_cfg); 03218 VL53L1_general_config_t *pgeneral = &(pdev->gen_cfg); 03219 VL53L1_timing_config_t *ptiming = &(pdev->tim_cfg); 03220 VL53L1_dynamic_config_t *pdynamic = &(pdev->dyn_cfg); 03221 VL53L1_system_control_t *psystem = &(pdev->sys_ctrl); 03222 03223 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state); 03224 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 03225 03226 uint8_t *pbuffer = &buffer[0]; 03227 uint16_t i = 0; 03228 uint16_t i2c_index = 0; 03229 uint16_t i2c_buffer_offset_bytes = 0; 03230 uint16_t i2c_buffer_size_bytes = 0; 03231 03232 LOG_FUNCTION_START(""); 03233 03234 03235 pdev->measurement_mode = measurement_mode; 03236 03237 03238 03239 psystem->system__mode_start = 03240 (psystem->system__mode_start & 03241 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) | 03242 measurement_mode; 03243 03244 03245 03246 status = 03247 VL53L1_set_user_zone( 03248 Dev, 03249 &(pdev->zone_cfg.user_zones[pdev->ll_state.cfg_zone_id])); 03250 03251 03252 if (pdev->zone_cfg.active_zones > 0) { 03253 status = 03254 VL53L1_set_zone_dss_config( 03255 Dev, 03256 &(pres->zone_dyn_cfgs.VL53L1_p_002[pdev->ll_state.cfg_zone_id]) 03257 ); 03258 } 03259 03260 03261 03262 03263 if (((pdev->sys_ctrl.system__mode_start & 03264 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) == 0x00) && 03265 (pdev->xtalk_cfg.global_crosstalk_compensation_enable 03266 == 0x01)) { 03267 pdev->stat_cfg.algo__range_ignore_threshold_mcps = 03268 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_rate_mcps; 03269 } 03270 03271 03272 03273 03274 03275 if (pdev->low_power_auto_data.low_power_auto_range_count == 0xFF) 03276 pdev->low_power_auto_data.low_power_auto_range_count = 0x0; 03277 03278 03279 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) && 03280 (pdev->low_power_auto_data.low_power_auto_range_count == 0)) { 03281 03282 pdev->low_power_auto_data.saved_interrupt_config = 03283 pdev->gen_cfg.system__interrupt_config_gpio; 03284 03285 pdev->gen_cfg.system__interrupt_config_gpio = 1 << 5; 03286 03287 if ((pdev->dyn_cfg.system__sequence_config & ( 03288 VL53L1_SEQUENCE_MM1_EN | VL53L1_SEQUENCE_MM2_EN)) == 03289 0x0) { 03290 pN->algo__part_to_part_range_offset_mm = 03291 (pN->mm_config__outer_offset_mm << 2); 03292 } else { 03293 pN->algo__part_to_part_range_offset_mm = 0x0; 03294 } 03295 03296 03297 if (device_config_level < 03298 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS) { 03299 device_config_level = 03300 VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS; 03301 } 03302 } 03303 03304 if ((pdev->low_power_auto_data.is_low_power_auto_mode == 1) && 03305 (pdev->low_power_auto_data.low_power_auto_range_count == 1)) { 03306 03307 pdev->gen_cfg.system__interrupt_config_gpio = 03308 pdev->low_power_auto_data.saved_interrupt_config; 03309 03310 03311 device_config_level = VL53L1_DEVICECONFIGLEVEL_FULL; 03312 } 03313 03314 03315 03316 03317 03318 if (status == VL53L1_ERROR_NONE) 03319 status = VL53L1_save_cfg_data(Dev); 03320 03321 03322 03323 switch (device_config_level) { 03324 case VL53L1_DEVICECONFIGLEVEL_FULL: 03325 i2c_index = VL53L1_STATIC_NVM_MANAGED_I2C_INDEX; 03326 break; 03327 case VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS: 03328 i2c_index = VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX; 03329 break; 03330 case VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS: 03331 i2c_index = VL53L1_STATIC_CONFIG_I2C_INDEX; 03332 break; 03333 case VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS: 03334 i2c_index = VL53L1_GENERAL_CONFIG_I2C_INDEX; 03335 break; 03336 case VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS: 03337 i2c_index = VL53L1_TIMING_CONFIG_I2C_INDEX; 03338 break; 03339 case VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS: 03340 i2c_index = VL53L1_DYNAMIC_CONFIG_I2C_INDEX; 03341 break; 03342 default: 03343 i2c_index = VL53L1_SYSTEM_CONTROL_I2C_INDEX; 03344 break; 03345 } 03346 03347 03348 03349 i2c_buffer_size_bytes = 03350 (VL53L1_SYSTEM_CONTROL_I2C_INDEX + 03351 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES) - 03352 i2c_index; 03353 03354 03355 03356 pbuffer = &buffer[0]; 03357 for (i = 0; i < i2c_buffer_size_bytes; i++) 03358 *pbuffer++ = 0; 03359 03360 03361 03362 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_FULL && 03363 status == VL53L1_ERROR_NONE) { 03364 03365 i2c_buffer_offset_bytes = 03366 VL53L1_STATIC_NVM_MANAGED_I2C_INDEX - i2c_index; 03367 03368 status = 03369 VL53L1_i2c_encode_static_nvm_managed( 03370 pstatic_nvm, 03371 VL53L1_STATIC_NVM_MANAGED_I2C_SIZE_BYTES, 03372 &buffer[i2c_buffer_offset_bytes]); 03373 } 03374 03375 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS && 03376 status == VL53L1_ERROR_NONE) { 03377 03378 i2c_buffer_offset_bytes = 03379 VL53L1_CUSTOMER_NVM_MANAGED_I2C_INDEX - i2c_index; 03380 03381 status = 03382 VL53L1_i2c_encode_customer_nvm_managed( 03383 pcustomer_nvm, 03384 VL53L1_CUSTOMER_NVM_MANAGED_I2C_SIZE_BYTES, 03385 &buffer[i2c_buffer_offset_bytes]); 03386 } 03387 03388 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS && 03389 status == VL53L1_ERROR_NONE) { 03390 03391 i2c_buffer_offset_bytes = 03392 VL53L1_STATIC_CONFIG_I2C_INDEX - i2c_index; 03393 03394 status = 03395 VL53L1_i2c_encode_static_config( 03396 pstatic, 03397 VL53L1_STATIC_CONFIG_I2C_SIZE_BYTES, 03398 &buffer[i2c_buffer_offset_bytes]); 03399 } 03400 03401 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS && 03402 status == VL53L1_ERROR_NONE) { 03403 03404 i2c_buffer_offset_bytes = 03405 VL53L1_GENERAL_CONFIG_I2C_INDEX - i2c_index; 03406 03407 status = 03408 VL53L1_i2c_encode_general_config( 03409 pgeneral, 03410 VL53L1_GENERAL_CONFIG_I2C_SIZE_BYTES, 03411 &buffer[i2c_buffer_offset_bytes]); 03412 } 03413 03414 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS && 03415 status == VL53L1_ERROR_NONE) { 03416 03417 i2c_buffer_offset_bytes = 03418 VL53L1_TIMING_CONFIG_I2C_INDEX - i2c_index; 03419 03420 status = 03421 VL53L1_i2c_encode_timing_config( 03422 ptiming, 03423 VL53L1_TIMING_CONFIG_I2C_SIZE_BYTES, 03424 &buffer[i2c_buffer_offset_bytes]); 03425 } 03426 03427 if (device_config_level >= VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS && 03428 status == VL53L1_ERROR_NONE) { 03429 03430 i2c_buffer_offset_bytes = 03431 VL53L1_DYNAMIC_CONFIG_I2C_INDEX - i2c_index; 03432 03433 03434 if ((psystem->system__mode_start & 03435 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) == 03436 VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK) { 03437 pdynamic->system__grouped_parameter_hold_0 = 03438 pstate->cfg_gph_id | 0x01; 03439 pdynamic->system__grouped_parameter_hold_1 = 03440 pstate->cfg_gph_id | 0x01; 03441 pdynamic->system__grouped_parameter_hold = 03442 pstate->cfg_gph_id; 03443 } 03444 status = 03445 VL53L1_i2c_encode_dynamic_config( 03446 pdynamic, 03447 VL53L1_DYNAMIC_CONFIG_I2C_SIZE_BYTES, 03448 &buffer[i2c_buffer_offset_bytes]); 03449 } 03450 03451 if (status == VL53L1_ERROR_NONE) { 03452 03453 i2c_buffer_offset_bytes = 03454 VL53L1_SYSTEM_CONTROL_I2C_INDEX - i2c_index; 03455 03456 status = 03457 VL53L1_i2c_encode_system_control( 03458 psystem, 03459 VL53L1_SYSTEM_CONTROL_I2C_SIZE_BYTES, 03460 &buffer[i2c_buffer_offset_bytes]); 03461 } 03462 03463 03464 03465 if (status == VL53L1_ERROR_NONE) { 03466 status = 03467 VL53L1_WriteMulti( 03468 Dev, 03469 i2c_index, 03470 buffer, 03471 (uint32_t)i2c_buffer_size_bytes); 03472 } 03473 03474 03475 if (status == VL53L1_ERROR_NONE) 03476 status = VL53L1_update_ll_driver_rd_state(Dev); 03477 03478 if (status == VL53L1_ERROR_NONE) 03479 status = VL53L1_update_ll_driver_cfg_state(Dev); 03480 03481 LOG_FUNCTION_END(status); 03482 03483 return status; 03484 } 03485 03486 03487 VL53L1_Error VL53L1_stop_range( 03488 VL53L1_DEV Dev) 03489 { 03490 03491 03492 VL53L1_Error status = VL53L1_ERROR_NONE; 03493 03494 VL53L1_LLDriverData_t *pdev = 03495 VL53L1DevStructGetLLDriverHandle(Dev); 03496 VL53L1_LLDriverResults_t *pres = 03497 VL53L1DevStructGetLLResultsHandle(Dev); 03498 03499 03500 03501 pdev->sys_ctrl.system__mode_start = 03502 (pdev->sys_ctrl.system__mode_start & 03503 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK) | 03504 VL53L1_DEVICEMEASUREMENTMODE_ABORT; 03505 03506 status = VL53L1_set_system_control( 03507 Dev, 03508 &pdev->sys_ctrl); 03509 03510 03511 pdev->sys_ctrl.system__mode_start = 03512 (pdev->sys_ctrl.system__mode_start & 03513 VL53L1_DEVICEMEASUREMENTMODE_STOP_MASK); 03514 03515 03516 VL53L1_init_ll_driver_state( 03517 Dev, 03518 VL53L1_DEVICESTATE_SW_STANDBY); 03519 03520 03521 V53L1_init_zone_results_structure( 03522 pdev->zone_cfg.active_zones+1, 03523 &(pres->zone_results)); 03524 03525 03526 V53L1_init_zone_dss_configs(Dev); 03527 03528 03529 if (pdev->low_power_auto_data.is_low_power_auto_mode == 1) 03530 VL53L1_low_power_auto_data_stop_range(Dev); 03531 03532 return status; 03533 } 03534 03535 03536 VL53L1_Error VL53L1_get_measurement_results( 03537 VL53L1_DEV Dev, 03538 VL53L1_DeviceResultsLevel device_results_level) 03539 { 03540 03541 03542 VL53L1_Error status = VL53L1_ERROR_NONE; 03543 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 03544 03545 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE]; 03546 03547 VL53L1_system_results_t *psystem_results = &(pdev->sys_results); 03548 VL53L1_core_results_t *pcore_results = &(pdev->core_results); 03549 VL53L1_debug_results_t *pdebug_results = &(pdev->dbg_results); 03550 03551 uint16_t i2c_index = VL53L1_SYSTEM_RESULTS_I2C_INDEX; 03552 uint16_t i2c_buffer_offset_bytes = 0; 03553 uint16_t i2c_buffer_size_bytes = 0; 03554 03555 LOG_FUNCTION_START(""); 03556 03557 03558 03559 switch (device_results_level) { 03560 case VL53L1_DEVICERESULTSLEVEL_FULL: 03561 i2c_buffer_size_bytes = 03562 (VL53L1_DEBUG_RESULTS_I2C_INDEX + 03563 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES) - 03564 i2c_index; 03565 break; 03566 case VL53L1_DEVICERESULTSLEVEL_UPTO_CORE: 03567 i2c_buffer_size_bytes = 03568 (VL53L1_CORE_RESULTS_I2C_INDEX + 03569 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES) - 03570 i2c_index; 03571 break; 03572 default: 03573 i2c_buffer_size_bytes = 03574 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES; 03575 break; 03576 } 03577 03578 03579 03580 if (status == VL53L1_ERROR_NONE) 03581 status = 03582 VL53L1_ReadMulti( 03583 Dev, 03584 i2c_index, 03585 buffer, 03586 (uint32_t)i2c_buffer_size_bytes); 03587 03588 03589 03590 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_FULL && 03591 status == VL53L1_ERROR_NONE) { 03592 03593 i2c_buffer_offset_bytes = 03594 VL53L1_DEBUG_RESULTS_I2C_INDEX - i2c_index; 03595 03596 status = 03597 VL53L1_i2c_decode_debug_results( 03598 VL53L1_DEBUG_RESULTS_I2C_SIZE_BYTES, 03599 &buffer[i2c_buffer_offset_bytes], 03600 pdebug_results); 03601 } 03602 03603 if (device_results_level >= VL53L1_DEVICERESULTSLEVEL_UPTO_CORE && 03604 status == VL53L1_ERROR_NONE) { 03605 03606 i2c_buffer_offset_bytes = 03607 VL53L1_CORE_RESULTS_I2C_INDEX - i2c_index; 03608 03609 status = 03610 VL53L1_i2c_decode_core_results( 03611 VL53L1_CORE_RESULTS_I2C_SIZE_BYTES, 03612 &buffer[i2c_buffer_offset_bytes], 03613 pcore_results); 03614 } 03615 03616 if (status == VL53L1_ERROR_NONE) { 03617 03618 i2c_buffer_offset_bytes = 0; 03619 status = 03620 VL53L1_i2c_decode_system_results( 03621 VL53L1_SYSTEM_RESULTS_I2C_SIZE_BYTES, 03622 &buffer[i2c_buffer_offset_bytes], 03623 psystem_results); 03624 } 03625 03626 LOG_FUNCTION_END(status); 03627 03628 return status; 03629 } 03630 03631 03632 VL53L1_Error VL53L1_get_device_results( 03633 VL53L1_DEV Dev, 03634 VL53L1_DeviceResultsLevel device_results_level, 03635 VL53L1_range_results_t *prange_results) 03636 { 03637 03638 03639 VL53L1_Error status = VL53L1_ERROR_NONE; 03640 03641 VL53L1_LLDriverData_t *pdev = 03642 VL53L1DevStructGetLLDriverHandle(Dev); 03643 VL53L1_LLDriverResults_t *pres = 03644 VL53L1DevStructGetLLResultsHandle(Dev); 03645 03646 VL53L1_range_results_t *presults = 03647 &(pres->range_results); 03648 VL53L1_zone_objects_t *pobjects = 03649 &(pres->zone_results.VL53L1_p_002[0]); 03650 VL53L1_ll_driver_state_t *pstate = 03651 &(pdev->ll_state); 03652 VL53L1_zone_config_t *pzone_cfg = 03653 &(pdev->zone_cfg); 03654 VL53L1_zone_hist_info_t *phist_info = 03655 &(pres->zone_hists.VL53L1_p_002[0]); 03656 03657 VL53L1_dmax_calibration_data_t dmax_cal; 03658 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal; 03659 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 03660 VL53L1_xtalk_config_t *pC = &(pdev->xtalk_cfg); 03661 VL53L1_low_power_auto_data_t *pL = &(pdev->low_power_auto_data); 03662 VL53L1_histogram_bin_data_t *pHD = &(pdev->hist_data); 03663 VL53L1_customer_nvm_managed_t *pN = &(pdev->customer); 03664 VL53L1_zone_histograms_t *pZH = &(pres->zone_hists); 03665 VL53L1_xtalk_calibration_results_t *pXCR = &(pdev->xtalk_cal); 03666 uint8_t tmp8; 03667 uint8_t zid; 03668 uint8_t i; 03669 uint8_t histo_merge_nb, idx; 03670 uint8_t merge_enabled; 03671 VL53L1_range_data_t *pdata; 03672 03673 LOG_FUNCTION_START(""); 03674 03675 merge_enabled = (pdev->tuning_parms.tp_hist_merge == 1) && 03676 (VL53L1DevDataGet(Dev, CurrentParameters.PresetMode) == 03677 VL53L1_PRESETMODE_RANGING); 03678 03679 03680 if ((pdev->sys_ctrl.system__mode_start & 03681 VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) 03682 == VL53L1_DEVICESCHEDULERMODE_HISTOGRAM) { 03683 03684 03685 03686 status = VL53L1_get_histogram_bin_data( 03687 Dev, 03688 &(pdev->hist_data)); 03689 03690 03691 03692 03693 if (status == VL53L1_ERROR_NONE && 03694 pHD->number_of_ambient_bins == 0) { 03695 zid = pdev->ll_state.rd_zone_id; 03696 status = VL53L1_hist_copy_and_scale_ambient_info( 03697 &(pZH->VL53L1_p_002[zid]), 03698 &(pdev->hist_data)); 03699 } 03700 03701 03702 if (status != VL53L1_ERROR_NONE) 03703 goto UPDATE_DYNAMIC_CONFIG; 03704 03705 VL53L1_compute_histo_merge_nb(Dev, &histo_merge_nb); 03706 if (histo_merge_nb == 0) 03707 histo_merge_nb = 1; 03708 idx = histo_merge_nb - 1; 03709 if (merge_enabled) 03710 pC->algo__crosstalk_compensation_plane_offset_kcps = 03711 pXCR->algo__xtalk_cpo_HistoMerge_kcps[idx]; 03712 03713 pHP->gain_factor = 03714 pdev->gain_cal.histogram_ranging_gain_factor; 03715 03716 pHP->algo__crosstalk_compensation_plane_offset_kcps = 03717 VL53L1_calc_crosstalk_plane_offset_with_margin( 03718 pC->algo__crosstalk_compensation_plane_offset_kcps, 03719 pC->histogram_mode_crosstalk_margin_kcps); 03720 03721 pHP->algo__crosstalk_compensation_x_plane_gradient_kcps = 03722 pC->algo__crosstalk_compensation_x_plane_gradient_kcps; 03723 pHP->algo__crosstalk_compensation_y_plane_gradient_kcps = 03724 pC->algo__crosstalk_compensation_y_plane_gradient_kcps; 03725 03726 pdev->dmax_cfg.ambient_thresh_sigma = 03727 pHP->ambient_thresh_sigma1; 03728 pdev->dmax_cfg.min_ambient_thresh_events = 03729 pHP->min_ambient_thresh_events; 03730 pdev->dmax_cfg.signal_total_events_limit = 03731 pHP->signal_total_events_limit; 03732 pdev->dmax_cfg.dss_config__target_total_rate_mcps = 03733 pdev->stat_cfg.dss_config__target_total_rate_mcps; 03734 pdev->dmax_cfg.dss_config__aperture_attenuation = 03735 pdev->gen_cfg.dss_config__aperture_attenuation; 03736 03737 pHP->algo__crosstalk_detect_max_valid_range_mm = 03738 pC->algo__crosstalk_detect_max_valid_range_mm; 03739 pHP->algo__crosstalk_detect_min_valid_range_mm = 03740 pC->algo__crosstalk_detect_min_valid_range_mm; 03741 pHP->algo__crosstalk_detect_max_valid_rate_kcps = 03742 pC->algo__crosstalk_detect_max_valid_rate_kcps; 03743 pHP->algo__crosstalk_detect_max_sigma_mm = 03744 pC->algo__crosstalk_detect_max_sigma_mm; 03745 03746 03747 03748 VL53L1_copy_rtn_good_spads_to_buffer( 03749 &(pdev->nvm_copy_data), 03750 &(pdev->rtn_good_spads[0])); 03751 03752 03753 03754 switch (pdev->offset_correction_mode) { 03755 03756 case VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS: 03757 tmp8 = pdev->gen_cfg.dss_config__aperture_attenuation; 03758 03759 VL53L1_hist_combine_mm1_mm2_offsets( 03760 pN->mm_config__inner_offset_mm, 03761 pN->mm_config__outer_offset_mm, 03762 pdev->nvm_copy_data.roi_config__mode_roi_centre_spad, 03763 pdev->nvm_copy_data.roi_config__mode_roi_xy_size, 03764 pHD->roi_config__user_roi_centre_spad, 03765 pHD->roi_config__user_roi_requested_global_xy_size, 03766 &(pdev->add_off_cal_data), 03767 &(pdev->rtn_good_spads[0]), 03768 (uint16_t)tmp8, 03769 &(pHP->range_offset_mm)); 03770 break; 03771 case VL53L1_OFFSETCORRECTIONMODE__PER_ZONE_OFFSETS: 03772 zid = pdev->ll_state.rd_zone_id; 03773 pHP->range_offset_mm = (int16_t)( 03774 pres->zone_cal.VL53L1_p_002[zid].range_mm_offset); 03775 break; 03776 case VL53L1_OFFSETCORRECTIONMODE__PER_VCSEL_OFFSETS: 03777 select_offset_per_vcsel( 03778 pdev, 03779 &(pHP->range_offset_mm)); 03780 pHP->range_offset_mm *= 4; 03781 break; 03782 default: 03783 pHP->range_offset_mm = 0; 03784 break; 03785 03786 } 03787 03788 03789 03790 if (status != VL53L1_ERROR_NONE) 03791 goto UPDATE_DYNAMIC_CONFIG; 03792 03793 03794 VL53L1_calc_max_effective_spads( 03795 pHD->roi_config__user_roi_centre_spad, 03796 pHD->roi_config__user_roi_requested_global_xy_size, 03797 &(pdev->rtn_good_spads[0]), 03798 (uint16_t)pdev->gen_cfg.dss_config__aperture_attenuation, 03799 &(pdev->dmax_cfg.max_effective_spads)); 03800 03801 status = 03802 VL53L1_get_dmax_calibration_data( 03803 Dev, 03804 pdev->dmax_mode, 03805 pdev->ll_state.rd_zone_id, 03806 pdmax_cal); 03807 03808 03809 03810 if (status != VL53L1_ERROR_NONE) 03811 goto UPDATE_DYNAMIC_CONFIG; 03812 03813 status = VL53L1_ipp_hist_process_data( 03814 Dev, 03815 pdmax_cal, 03816 &(pdev->dmax_cfg), 03817 &(pdev->histpostprocess), 03818 &(pdev->hist_data), 03819 &(pdev->xtalk_shapes), 03820 pdev->wArea1, 03821 pdev->wArea2, 03822 &histo_merge_nb, 03823 presults); 03824 03825 if ((merge_enabled) && (histo_merge_nb > 1)) 03826 for (i = 0; i < VL53L1_MAX_RANGE_RESULTS; i++) { 03827 pdata = &(presults->VL53L1_p_002[i]); 03828 pdata->VL53L1_p_020 /= histo_merge_nb; 03829 pdata->VL53L1_p_021 /= histo_merge_nb; 03830 pdata->VL53L1_p_013 /= histo_merge_nb; 03831 pdata->peak_signal_count_rate_mcps /= histo_merge_nb; 03832 pdata->avg_signal_count_rate_mcps /= histo_merge_nb; 03833 pdata->ambient_count_rate_mcps /= histo_merge_nb; 03834 pdata->VL53L1_p_012 /= histo_merge_nb; 03835 } 03836 03837 03838 if (status != VL53L1_ERROR_NONE) 03839 goto UPDATE_DYNAMIC_CONFIG; 03840 03841 status = VL53L1_hist_wrap_dmax( 03842 &(pdev->histpostprocess), 03843 &(pdev->hist_data), 03844 &(presults->wrap_dmax_mm)); 03845 03846 03847 if (status != VL53L1_ERROR_NONE) 03848 goto UPDATE_DYNAMIC_CONFIG; 03849 03850 zid = pdev->ll_state.rd_zone_id; 03851 status = VL53L1_hist_phase_consistency_check( 03852 Dev, 03853 &(pZH->VL53L1_p_002[zid]), 03854 &(pres->zone_results.VL53L1_p_002[zid]), 03855 presults); 03856 03857 03858 if (status != VL53L1_ERROR_NONE) 03859 goto UPDATE_DYNAMIC_CONFIG; 03860 03861 zid = pdev->ll_state.rd_zone_id; 03862 status = VL53L1_hist_xmonitor_consistency_check( 03863 Dev, 03864 &(pZH->VL53L1_p_002[zid]), 03865 &(pres->zone_results.VL53L1_p_002[zid]), 03866 &(presults->xmonitor)); 03867 03868 03869 if (status != VL53L1_ERROR_NONE) 03870 goto UPDATE_DYNAMIC_CONFIG; 03871 03872 03873 zid = pdev->ll_state.rd_zone_id; 03874 pZH->max_zones = VL53L1_MAX_USER_ZONES; 03875 pZH->active_zones = 03876 pdev->zone_cfg.active_zones+1; 03877 pHD->zone_id = zid; 03878 03879 if (zid < 03880 pres->zone_results.max_zones) { 03881 03882 phist_info = 03883 &(pZH->VL53L1_p_002[zid]); 03884 03885 phist_info->rd_device_state = 03886 pHD->rd_device_state; 03887 03888 phist_info->number_of_ambient_bins = 03889 pHD->number_of_ambient_bins; 03890 03891 phist_info->result__dss_actual_effective_spads = 03892 pHD->result__dss_actual_effective_spads; 03893 03894 phist_info->VL53L1_p_009 = 03895 pHD->VL53L1_p_009; 03896 03897 phist_info->total_periods_elapsed = 03898 pHD->total_periods_elapsed; 03899 03900 phist_info->ambient_events_sum = 03901 pHD->ambient_events_sum; 03902 } 03903 03904 03905 03906 if (status != VL53L1_ERROR_NONE) 03907 goto UPDATE_DYNAMIC_CONFIG; 03908 03909 VL53L1_hist_copy_results_to_sys_and_core( 03910 &(pdev->hist_data), 03911 presults, 03912 &(pdev->sys_results), 03913 &(pdev->core_results)); 03914 03915 03916 UPDATE_DYNAMIC_CONFIG: 03917 if (pzone_cfg->active_zones > 0) { 03918 if (pstate->rd_device_state != 03919 VL53L1_DEVICESTATE_RANGING_WAIT_GPH_SYNC) { 03920 if (status == VL53L1_ERROR_NONE) { 03921 status = VL53L1_dynamic_zone_update( 03922 Dev, presults); 03923 } 03924 } 03925 03926 03927 for (i = 0; i < VL53L1_MAX_USER_ZONES; i++) { 03928 pzone_cfg->bin_config[i] = 03929 ((pdev->ll_state.cfg_internal_stream_count) 03930 & 0x01) ? 03931 VL53L1_ZONECONFIG_BINCONFIG__HIGHAMB : 03932 VL53L1_ZONECONFIG_BINCONFIG__LOWAMB; 03933 } 03934 03935 if (status == VL53L1_ERROR_NONE) 03936 status = VL53L1_multizone_hist_bins_update(Dev); 03937 03938 } 03939 03940 03941 03942 if (status == VL53L1_ERROR_NONE) 03943 status = VL53L1_dynamic_xtalk_correction_corrector(Dev); 03944 03945 #ifdef VL53L1_LOG_ENABLE 03946 if (status == VL53L1_ERROR_NONE) 03947 VL53L1_print_histogram_bin_data( 03948 &(pdev->hist_data), 03949 "get_device_results():pdev->lldata.hist_data.", 03950 VL53L1_TRACE_MODULE_HISTOGRAM_DATA); 03951 #endif 03952 03953 if (merge_enabled) 03954 pC->algo__crosstalk_compensation_plane_offset_kcps = 03955 pXCR->algo__xtalk_cpo_HistoMerge_kcps[0]; 03956 } else { 03957 03958 if (status == VL53L1_ERROR_NONE) 03959 status = VL53L1_get_measurement_results( 03960 Dev, 03961 device_results_level); 03962 03963 if (status == VL53L1_ERROR_NONE) 03964 VL53L1_copy_sys_and_core_results_to_range_results( 03965 (int32_t)pdev->gain_cal.standard_ranging_gain_factor, 03966 &(pdev->sys_results), 03967 &(pdev->core_results), 03968 presults); 03969 03970 03971 03972 if (pL->is_low_power_auto_mode == 1) { 03973 03974 if ((status == VL53L1_ERROR_NONE) && 03975 (pL->low_power_auto_range_count == 0)) { 03976 03977 status = 03978 VL53L1_low_power_auto_setup_manual_calibration( 03979 Dev); 03980 pL->low_power_auto_range_count = 1; 03981 } else if ((status == VL53L1_ERROR_NONE) && 03982 (pL->low_power_auto_range_count == 1)) { 03983 pL->low_power_auto_range_count = 2; 03984 } 03985 03986 03987 if ((pL->low_power_auto_range_count != 0xFF) && 03988 (status == VL53L1_ERROR_NONE)) { 03989 status = VL53L1_low_power_auto_update_DSS( 03990 Dev); 03991 } 03992 } 03993 03994 } 03995 03996 03997 presults->cfg_device_state = pdev->ll_state.cfg_device_state; 03998 presults->rd_device_state = pdev->ll_state.rd_device_state; 03999 presults->zone_id = pdev->ll_state.rd_zone_id; 04000 04001 if (status == VL53L1_ERROR_NONE) { 04002 04003 04004 pres->zone_results.max_zones = VL53L1_MAX_USER_ZONES; 04005 pres->zone_results.active_zones = pdev->zone_cfg.active_zones+1; 04006 zid = pdev->ll_state.rd_zone_id; 04007 04008 if (zid < pres->zone_results.max_zones) { 04009 04010 pobjects = 04011 &(pres->zone_results.VL53L1_p_002[zid]); 04012 04013 pobjects->cfg_device_state = 04014 presults->cfg_device_state; 04015 pobjects->rd_device_state = presults->rd_device_state; 04016 pobjects->zone_id = presults->zone_id; 04017 pobjects->stream_count = presults->stream_count; 04018 04019 04020 04021 pobjects->xmonitor.VL53L1_p_020 = 04022 presults->xmonitor.VL53L1_p_020; 04023 pobjects->xmonitor.VL53L1_p_021 = 04024 presults->xmonitor.VL53L1_p_021; 04025 pobjects->xmonitor.VL53L1_p_014 = 04026 presults->xmonitor.VL53L1_p_014; 04027 pobjects->xmonitor.range_status = 04028 presults->xmonitor.range_status; 04029 04030 pobjects->max_objects = presults->max_results; 04031 pobjects->active_objects = presults->active_results; 04032 04033 for (i = 0; i < presults->active_results; i++) { 04034 pobjects->VL53L1_p_002[i].VL53L1_p_020 = 04035 presults->VL53L1_p_002[i].VL53L1_p_020; 04036 pobjects->VL53L1_p_002[i].VL53L1_p_021 = 04037 presults->VL53L1_p_002[i].VL53L1_p_021; 04038 pobjects->VL53L1_p_002[i].VL53L1_p_014 = 04039 presults->VL53L1_p_002[i].VL53L1_p_014; 04040 pobjects->VL53L1_p_002[i].range_status = 04041 presults->VL53L1_p_002[i].range_status; 04042 } 04043 04044 04045 } 04046 } 04047 04048 04049 04050 memcpy( 04051 prange_results, 04052 presults, 04053 sizeof(VL53L1_range_results_t)); 04054 04055 04056 04057 if (status == VL53L1_ERROR_NONE) 04058 status = VL53L1_check_ll_driver_rd_state(Dev); 04059 04060 #ifdef VL53L1_LOG_ENABLE 04061 if (status == VL53L1_ERROR_NONE) 04062 VL53L1_print_range_results( 04063 presults, 04064 "get_device_results():pdev->llresults.range_results.", 04065 VL53L1_TRACE_MODULE_RANGE_RESULTS_DATA); 04066 #endif 04067 04068 LOG_FUNCTION_END(status); 04069 04070 return status; 04071 } 04072 04073 04074 VL53L1_Error VL53L1_clear_interrupt_and_enable_next_range( 04075 VL53L1_DEV Dev, 04076 uint8_t measurement_mode) 04077 { 04078 04079 04080 04081 VL53L1_Error status = VL53L1_ERROR_NONE; 04082 04083 LOG_FUNCTION_START(""); 04084 04085 04086 04087 04088 04089 04090 04091 04092 04093 04094 if (status == VL53L1_ERROR_NONE) 04095 status = VL53L1_init_and_start_range( 04096 Dev, 04097 measurement_mode, 04098 VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS); 04099 04100 LOG_FUNCTION_END(status); 04101 04102 return status; 04103 } 04104 04105 04106 VL53L1_Error VL53L1_get_histogram_bin_data( 04107 VL53L1_DEV Dev, 04108 VL53L1_histogram_bin_data_t *pdata) 04109 { 04110 04111 04112 VL53L1_Error status = VL53L1_ERROR_NONE; 04113 VL53L1_LLDriverData_t *pdev = 04114 VL53L1DevStructGetLLDriverHandle(Dev); 04115 VL53L1_LLDriverResults_t *pres = 04116 VL53L1DevStructGetLLResultsHandle(Dev); 04117 04118 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg; 04119 04120 VL53L1_static_nvm_managed_t *pstat_nvm = &(pdev->stat_nvm); 04121 VL53L1_static_config_t *pstat_cfg = &(pdev->stat_cfg); 04122 VL53L1_general_config_t *pgen_cfg = &(pdev->gen_cfg); 04123 VL53L1_timing_config_t *ptim_cfg = &(pdev->tim_cfg); 04124 VL53L1_range_results_t *presults = &(pres->range_results); 04125 04126 uint8_t buffer[VL53L1_MAX_I2C_XFER_SIZE]; 04127 uint8_t *pbuffer = &buffer[0]; 04128 uint8_t bin_23_0 = 0x00; 04129 uint16_t bin = 0; 04130 uint16_t i2c_buffer_offset_bytes = 0; 04131 uint16_t encoded_timeout = 0; 04132 uint32_t pll_period_us = 0; 04133 uint32_t periods_elapsed_tmp = 0; 04134 uint8_t i = 0; 04135 int32_t hist_merge = 0; 04136 04137 LOG_FUNCTION_START(""); 04138 04139 04140 04141 if (status == VL53L1_ERROR_NONE) 04142 status = VL53L1_ReadMulti( 04143 Dev, 04144 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX, 04145 pbuffer, 04146 VL53L1_HISTOGRAM_BIN_DATA_I2C_SIZE_BYTES); 04147 04148 04149 04150 pdata->result__interrupt_status = *(pbuffer + 0); 04151 pdata->result__range_status = *(pbuffer + 1); 04152 pdata->result__report_status = *(pbuffer + 2); 04153 pdata->result__stream_count = *(pbuffer + 3); 04154 pdata->result__dss_actual_effective_spads = 04155 VL53L1_i2c_decode_uint16_t(2, pbuffer + 4); 04156 04157 04158 04159 i2c_buffer_offset_bytes = 04160 VL53L1_PHASECAL_RESULT__REFERENCE_PHASE - 04161 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04162 04163 pbuffer = &buffer[i2c_buffer_offset_bytes]; 04164 04165 pdata->phasecal_result__reference_phase = 04166 VL53L1_i2c_decode_uint16_t(2, pbuffer); 04167 04168 i2c_buffer_offset_bytes = 04169 VL53L1_PHASECAL_RESULT__VCSEL_START - 04170 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04171 04172 pdata->phasecal_result__vcsel_start = buffer[i2c_buffer_offset_bytes]; 04173 04174 04175 04176 pdev->dbg_results.phasecal_result__reference_phase = 04177 pdata->phasecal_result__reference_phase; 04178 pdev->dbg_results.phasecal_result__vcsel_start = 04179 pdata->phasecal_result__vcsel_start; 04180 04181 04182 04183 i2c_buffer_offset_bytes = 04184 VL53L1_RESULT__HISTOGRAM_BIN_23_0_MSB - 04185 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04186 04187 bin_23_0 = buffer[i2c_buffer_offset_bytes] << 2; 04188 04189 i2c_buffer_offset_bytes = 04190 VL53L1_RESULT__HISTOGRAM_BIN_23_0_LSB - 04191 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04192 04193 bin_23_0 += buffer[i2c_buffer_offset_bytes]; 04194 04195 i2c_buffer_offset_bytes = 04196 VL53L1_RESULT__HISTOGRAM_BIN_23_0 - 04197 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04198 04199 buffer[i2c_buffer_offset_bytes] = bin_23_0; 04200 04201 04202 04203 i2c_buffer_offset_bytes = 04204 VL53L1_RESULT__HISTOGRAM_BIN_0_2 - 04205 VL53L1_HISTOGRAM_BIN_DATA_I2C_INDEX; 04206 04207 pbuffer = &buffer[i2c_buffer_offset_bytes]; 04208 for (bin = 0; bin < VL53L1_HISTOGRAM_BUFFER_SIZE; bin++) { 04209 pdata->bin_data[bin] = 04210 (int32_t)VL53L1_i2c_decode_uint32_t(3, pbuffer); 04211 pbuffer += 3; 04212 } 04213 04214 VL53L1_get_tuning_parm(Dev, VL53L1_TUNINGPARM_HIST_MERGE, 04215 &hist_merge); 04216 04217 if (pdata->result__stream_count == 0) { 04218 04219 memset(pdev->multi_bins_rec, 0, sizeof(pdev->multi_bins_rec)); 04220 pdev->bin_rec_pos = 0; 04221 pdev->pos_before_next_recom = 0; 04222 } 04223 04224 if (hist_merge == 1) 04225 vl53l1_histo_merge(Dev, pdata); 04226 04227 04228 pdata->zone_id = pdev->ll_state.rd_zone_id; 04229 pdata->VL53L1_p_022 = 0; 04230 pdata->VL53L1_p_023 = VL53L1_HISTOGRAM_BUFFER_SIZE; 04231 pdata->VL53L1_p_024 = VL53L1_HISTOGRAM_BUFFER_SIZE; 04232 04233 pdata->cal_config__vcsel_start = pgen_cfg->cal_config__vcsel_start; 04234 04235 04236 04237 pdata->vcsel_width = 04238 ((uint16_t)pgen_cfg->global_config__vcsel_width) << 4; 04239 pdata->vcsel_width += 04240 (uint16_t)pstat_cfg->ana_config__vcsel_pulse_width_offset; 04241 04242 04243 pdata->VL53L1_p_019 = 04244 pstat_nvm->osc_measured__fast_osc__frequency; 04245 04246 04247 04248 VL53L1_hist_get_bin_sequence_config(Dev, pdata); 04249 04250 04251 04252 if (pdev->ll_state.rd_timing_status == 0) { 04253 04254 encoded_timeout = 04255 (ptim_cfg->range_config__timeout_macrop_a_hi << 8) 04256 + ptim_cfg->range_config__timeout_macrop_a_lo; 04257 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_a; 04258 } else { 04259 04260 encoded_timeout = 04261 (ptim_cfg->range_config__timeout_macrop_b_hi << 8) 04262 + ptim_cfg->range_config__timeout_macrop_b_lo; 04263 pdata->VL53L1_p_009 = ptim_cfg->range_config__vcsel_period_b; 04264 } 04265 04266 04267 04268 pdata->number_of_ambient_bins = 0; 04269 04270 for (i = 0; i < 6; i++) { 04271 if ((pdata->bin_seq[i] & 0x07) == 0x07) 04272 pdata->number_of_ambient_bins = 04273 pdata->number_of_ambient_bins + 0x04; 04274 } 04275 04276 pdata->total_periods_elapsed = 04277 VL53L1_decode_timeout(encoded_timeout); 04278 04279 04280 04281 04282 pll_period_us = 04283 VL53L1_calc_pll_period_us(pdata->VL53L1_p_019); 04284 04285 04286 04287 periods_elapsed_tmp = pdata->total_periods_elapsed + 1; 04288 04289 04290 04291 pdata->peak_duration_us = 04292 VL53L1_duration_maths( 04293 pll_period_us, 04294 (uint32_t)pdata->vcsel_width, 04295 VL53L1_RANGING_WINDOW_VCSEL_PERIODS, 04296 periods_elapsed_tmp); 04297 04298 pdata->woi_duration_us = 0; 04299 04300 04301 04302 VL53L1_hist_calc_zero_distance_phase(pdata); 04303 04304 04305 04306 VL53L1_hist_estimate_ambient_from_ambient_bins(pdata); 04307 04308 04309 04310 pdata->cfg_device_state = pdev->ll_state.cfg_device_state; 04311 pdata->rd_device_state = pdev->ll_state.rd_device_state; 04312 04313 04314 04315 pzone_dyn_cfg = &(pres->zone_dyn_cfgs.VL53L1_p_002[pdata->zone_id]); 04316 04317 pdata->roi_config__user_roi_centre_spad = 04318 pzone_dyn_cfg->roi_config__user_roi_centre_spad; 04319 pdata->roi_config__user_roi_requested_global_xy_size = 04320 pzone_dyn_cfg->roi_config__user_roi_requested_global_xy_size; 04321 04322 04323 04324 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE; 04325 04326 04327 04328 switch (pdata->result__range_status & 04329 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) { 04330 04331 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE: 04332 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE: 04333 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND: 04334 case VL53L1_DEVICEERROR_USERROICLIP: 04335 case VL53L1_DEVICEERROR_MULTCLIPFAIL: 04336 04337 presults->device_status = (pdata->result__range_status & 04338 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK); 04339 04340 status = VL53L1_ERROR_RANGE_ERROR; 04341 04342 break; 04343 04344 } 04345 04346 LOG_FUNCTION_END(status); 04347 04348 return status; 04349 } 04350 04351 04352 void VL53L1_copy_sys_and_core_results_to_range_results( 04353 int32_t gain_factor, 04354 VL53L1_system_results_t *psys, 04355 VL53L1_core_results_t *pcore, 04356 VL53L1_range_results_t *presults) 04357 { 04358 uint8_t i = 0; 04359 04360 VL53L1_range_data_t *pdata; 04361 int32_t range_mm = 0; 04362 uint32_t tmpu32 = 0; 04363 uint16_t rpscr_crosstalk_corrected_mcps_sd0; 04364 uint16_t rmmo_effective_spads_sd0; 04365 uint16_t rmmi_effective_spads_sd0; 04366 04367 LOG_FUNCTION_START(""); 04368 04369 04370 04371 presults->zone_id = 0; 04372 presults->stream_count = psys->result__stream_count; 04373 presults->wrap_dmax_mm = 0; 04374 presults->max_results = VL53L1_MAX_RANGE_RESULTS; 04375 presults->active_results = 1; 04376 rpscr_crosstalk_corrected_mcps_sd0 = 04377 psys->result__peak_signal_count_rate_crosstalk_corrected_mcps_sd0; 04378 rmmo_effective_spads_sd0 = 04379 psys->result__mm_outer_actual_effective_spads_sd0; 04380 rmmi_effective_spads_sd0 = 04381 psys->result__mm_inner_actual_effective_spads_sd0; 04382 04383 04384 for (i = 0; i < VL53L1_MAX_AMBIENT_DMAX_VALUES; i++) 04385 presults->VL53L1_p_007[i] = 0; 04386 04387 pdata = &(presults->VL53L1_p_002[0]); 04388 04389 for (i = 0; i < 2; i++) { 04390 04391 pdata->range_id = i; 04392 pdata->time_stamp = 0; 04393 04394 if ((psys->result__stream_count == 0) && 04395 ((psys->result__range_status & 04396 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) == 04397 VL53L1_DEVICEERROR_RANGECOMPLETE)) { 04398 pdata->range_status = 04399 VL53L1_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK; 04400 } else { 04401 pdata->range_status = 04402 psys->result__range_status & 04403 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK; 04404 } 04405 04406 pdata->VL53L1_p_015 = 0; 04407 pdata->VL53L1_p_022 = 0; 04408 pdata->VL53L1_p_025 = 0; 04409 pdata->VL53L1_p_026 = 0; 04410 pdata->VL53L1_p_016 = 0; 04411 pdata->VL53L1_p_027 = 0; 04412 04413 switch (i) { 04414 04415 case 0: 04416 if (psys->result__report_status == 04417 VL53L1_DEVICEREPORTSTATUS_MM1) 04418 pdata->VL53L1_p_006 = 04419 rmmi_effective_spads_sd0; 04420 else if (psys->result__report_status == 04421 VL53L1_DEVICEREPORTSTATUS_MM2) 04422 pdata->VL53L1_p_006 = 04423 rmmo_effective_spads_sd0; 04424 else 04425 pdata->VL53L1_p_006 = 04426 psys->result__dss_actual_effective_spads_sd0; 04427 04428 pdata->peak_signal_count_rate_mcps = 04429 rpscr_crosstalk_corrected_mcps_sd0; 04430 pdata->avg_signal_count_rate_mcps = 04431 psys->result__avg_signal_count_rate_mcps_sd0; 04432 pdata->ambient_count_rate_mcps = 04433 psys->result__ambient_count_rate_mcps_sd0; 04434 04435 04436 04437 04438 tmpu32 = ((uint32_t)psys->result__sigma_sd0 << 5); 04439 if (tmpu32 > 0xFFFF) 04440 tmpu32 = 0xFFFF; 04441 04442 pdata->VL53L1_p_005 = (uint16_t)tmpu32; 04443 04444 04445 04446 pdata->VL53L1_p_014 = 04447 psys->result__phase_sd0; 04448 04449 range_mm = (int32_t)( 04450 psys->result__final_crosstalk_corrected_range_mm_sd0); 04451 04452 04453 range_mm *= gain_factor; 04454 range_mm += 0x0400; 04455 range_mm /= 0x0800; 04456 04457 pdata->median_range_mm = (int16_t)range_mm; 04458 04459 pdata->VL53L1_p_021 = 04460 pcore->result_core__ranging_total_events_sd0; 04461 pdata->VL53L1_p_013 = 04462 pcore->result_core__signal_total_events_sd0; 04463 pdata->total_periods_elapsed = 04464 pcore->result_core__total_periods_elapsed_sd0; 04465 pdata->VL53L1_p_020 = 04466 pcore->result_core__ambient_window_events_sd0; 04467 04468 break; 04469 case 1: 04470 04471 pdata->VL53L1_p_006 = 04472 psys->result__dss_actual_effective_spads_sd1; 04473 pdata->peak_signal_count_rate_mcps = 04474 psys->result__peak_signal_count_rate_mcps_sd1; 04475 pdata->avg_signal_count_rate_mcps = 04476 0xFFFF; 04477 pdata->ambient_count_rate_mcps = 04478 psys->result__ambient_count_rate_mcps_sd1; 04479 04480 04481 04482 04483 tmpu32 = ((uint32_t)psys->result__sigma_sd1 << 5); 04484 if (tmpu32 > 0xFFFF) 04485 tmpu32 = 0xFFFF; 04486 04487 pdata->VL53L1_p_005 = (uint16_t)tmpu32; 04488 04489 04490 04491 pdata->VL53L1_p_014 = 04492 psys->result__phase_sd1; 04493 04494 range_mm = (int32_t)( 04495 psys->result__final_crosstalk_corrected_range_mm_sd1); 04496 04497 04498 range_mm *= gain_factor; 04499 range_mm += 0x0400; 04500 range_mm /= 0x0800; 04501 04502 pdata->median_range_mm = (int16_t)range_mm; 04503 04504 pdata->VL53L1_p_021 = 04505 pcore->result_core__ranging_total_events_sd1; 04506 pdata->VL53L1_p_013 = 04507 pcore->result_core__signal_total_events_sd1; 04508 pdata->total_periods_elapsed = 04509 pcore->result_core__total_periods_elapsed_sd1; 04510 pdata->VL53L1_p_020 = 04511 pcore->result_core__ambient_window_events_sd1; 04512 04513 break; 04514 } 04515 04516 04517 pdata->VL53L1_p_028 = pdata->VL53L1_p_014; 04518 pdata->VL53L1_p_029 = pdata->VL53L1_p_014; 04519 pdata->min_range_mm = pdata->median_range_mm; 04520 pdata->max_range_mm = pdata->median_range_mm; 04521 04522 pdata++; 04523 } 04524 04525 04526 04527 presults->device_status = VL53L1_DEVICEERROR_NOUPDATE; 04528 04529 04530 04531 switch (psys->result__range_status & 04532 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK) { 04533 04534 case VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE: 04535 case VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE: 04536 case VL53L1_DEVICEERROR_NOVHVVALUEFOUND: 04537 case VL53L1_DEVICEERROR_USERROICLIP: 04538 case VL53L1_DEVICEERROR_MULTCLIPFAIL: 04539 04540 presults->device_status = (psys->result__range_status & 04541 VL53L1_RANGE_STATUS__RANGE_STATUS_MASK); 04542 04543 presults->VL53L1_p_002[0].range_status = 04544 VL53L1_DEVICEERROR_NOUPDATE; 04545 break; 04546 04547 } 04548 04549 LOG_FUNCTION_END(0); 04550 } 04551 04552 04553 VL53L1_Error VL53L1_set_zone_dss_config( 04554 VL53L1_DEV Dev, 04555 VL53L1_zone_private_dyn_cfg_t *pzone_dyn_cfg) 04556 { 04557 04558 04559 04560 VL53L1_Error status = VL53L1_ERROR_NONE; 04561 04562 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04563 VL53L1_ll_driver_state_t *pstate = &(pdev->ll_state); 04564 04565 LOG_FUNCTION_START(""); 04566 04567 if (pstate->cfg_device_state == 04568 VL53L1_DEVICESTATE_RANGING_DSS_MANUAL) { 04569 pdev->gen_cfg.dss_config__roi_mode_control = 04570 VL53L1_DSS_CONTROL__MODE_EFFSPADS; 04571 pdev->gen_cfg.dss_config__manual_effective_spads_select = 04572 pzone_dyn_cfg->dss_requested_effective_spad_count; 04573 } else { 04574 pdev->gen_cfg.dss_config__roi_mode_control = 04575 VL53L1_DSS_CONTROL__MODE_TARGET_RATE; 04576 } 04577 04578 LOG_FUNCTION_END(status); 04579 return status; 04580 } 04581 04582 04583 VL53L1_Error VL53L1_calc_ambient_dmax( 04584 VL53L1_DEV Dev, 04585 uint16_t target_reflectance, 04586 int16_t *pambient_dmax_mm) 04587 { 04588 VL53L1_Error status = VL53L1_ERROR_NONE; 04589 04590 VL53L1_LLDriverData_t *pdev = 04591 VL53L1DevStructGetLLDriverHandle(Dev); 04592 04593 VL53L1_dmax_calibration_data_t dmax_cal; 04594 VL53L1_dmax_calibration_data_t *pdmax_cal = &dmax_cal; 04595 04596 LOG_FUNCTION_START(""); 04597 04598 04599 04600 status = 04601 VL53L1_get_dmax_calibration_data( 04602 Dev, 04603 pdev->debug_mode, 04604 pdev->ll_state.rd_zone_id, 04605 pdmax_cal); 04606 04607 04608 04609 if (status == VL53L1_ERROR_NONE) 04610 status = 04611 VL53L1_ipp_hist_ambient_dmax( 04612 Dev, 04613 target_reflectance, 04614 &(pdev->fmt_dmax_cal), 04615 &(pdev->dmax_cfg), 04616 &(pdev->hist_data), 04617 pambient_dmax_mm); 04618 04619 LOG_FUNCTION_END(status); 04620 04621 return status; 04622 } 04623 04624 04625 04626 VL53L1_Error VL53L1_set_GPIO_interrupt_config( 04627 VL53L1_DEV Dev, 04628 VL53L1_GPIO_Interrupt_Mode intr_mode_distance, 04629 VL53L1_GPIO_Interrupt_Mode intr_mode_rate, 04630 uint8_t intr_new_measure_ready, 04631 uint8_t intr_no_target, 04632 uint8_t intr_combined_mode, 04633 uint16_t thresh_distance_high, 04634 uint16_t thresh_distance_low, 04635 uint16_t thresh_rate_high, 04636 uint16_t thresh_rate_low 04637 ) 04638 { 04639 VL53L1_Error status = VL53L1_ERROR_NONE; 04640 04641 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04642 VL53L1_GPIO_interrupt_config_t *pintconf = 04643 &(pdev->gpio_interrupt_config); 04644 04645 LOG_FUNCTION_START(""); 04646 04647 04648 pintconf->intr_mode_distance = intr_mode_distance; 04649 pintconf->intr_mode_rate = intr_mode_rate; 04650 pintconf->intr_new_measure_ready = intr_new_measure_ready; 04651 pintconf->intr_no_target = intr_no_target; 04652 pintconf->intr_combined_mode = intr_combined_mode; 04653 pintconf->threshold_distance_high = thresh_distance_high; 04654 pintconf->threshold_distance_low = thresh_distance_low; 04655 pintconf->threshold_rate_high = thresh_rate_high; 04656 pintconf->threshold_rate_low = thresh_rate_low; 04657 04658 04659 pdev->gen_cfg.system__interrupt_config_gpio = 04660 VL53L1_encode_GPIO_interrupt_config(pintconf); 04661 04662 04663 04664 status = VL53L1_set_GPIO_thresholds_from_struct( 04665 Dev, 04666 pintconf); 04667 04668 LOG_FUNCTION_END(status); 04669 return status; 04670 } 04671 04672 04673 04674 VL53L1_Error VL53L1_set_GPIO_interrupt_config_struct( 04675 VL53L1_DEV Dev, 04676 VL53L1_GPIO_interrupt_config_t intconf) 04677 { 04678 VL53L1_Error status = VL53L1_ERROR_NONE; 04679 04680 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04681 VL53L1_GPIO_interrupt_config_t *pintconf = 04682 &(pdev->gpio_interrupt_config); 04683 04684 LOG_FUNCTION_START(""); 04685 04686 04687 memcpy(pintconf, &(intconf), sizeof(VL53L1_GPIO_interrupt_config_t)); 04688 04689 04690 pdev->gen_cfg.system__interrupt_config_gpio = 04691 VL53L1_encode_GPIO_interrupt_config(pintconf); 04692 04693 04694 status = VL53L1_set_GPIO_thresholds_from_struct( 04695 Dev, 04696 pintconf); 04697 04698 LOG_FUNCTION_END(status); 04699 return status; 04700 } 04701 04702 04703 04704 VL53L1_Error VL53L1_get_GPIO_interrupt_config( 04705 VL53L1_DEV Dev, 04706 VL53L1_GPIO_interrupt_config_t *pintconf) 04707 { 04708 VL53L1_Error status = VL53L1_ERROR_NONE; 04709 04710 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04711 04712 LOG_FUNCTION_START(""); 04713 04714 04715 pdev->gpio_interrupt_config = VL53L1_decode_GPIO_interrupt_config( 04716 pdev->gen_cfg.system__interrupt_config_gpio); 04717 04718 04719 pdev->gpio_interrupt_config.threshold_distance_high = 04720 pdev->dyn_cfg.system__thresh_high; 04721 pdev->gpio_interrupt_config.threshold_distance_low = 04722 pdev->dyn_cfg.system__thresh_low; 04723 04724 pdev->gpio_interrupt_config.threshold_rate_high = 04725 pdev->gen_cfg.system__thresh_rate_high; 04726 pdev->gpio_interrupt_config.threshold_rate_low = 04727 pdev->gen_cfg.system__thresh_rate_low; 04728 04729 if (pintconf == &(pdev->gpio_interrupt_config)) { 04730 04731 } else { 04732 04733 04734 memcpy(pintconf, &(pdev->gpio_interrupt_config), 04735 sizeof(VL53L1_GPIO_interrupt_config_t)); 04736 } 04737 04738 LOG_FUNCTION_END(status); 04739 return status; 04740 } 04741 04742 04743 VL53L1_Error VL53L1_set_dmax_mode( 04744 VL53L1_DEV Dev, 04745 VL53L1_DeviceDmaxMode dmax_mode) 04746 { 04747 04748 04749 VL53L1_Error status = VL53L1_ERROR_NONE; 04750 04751 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04752 04753 LOG_FUNCTION_START(""); 04754 04755 pdev->dmax_mode = dmax_mode; 04756 04757 LOG_FUNCTION_END(status); 04758 04759 return status; 04760 } 04761 04762 04763 VL53L1_Error VL53L1_get_dmax_mode( 04764 VL53L1_DEV Dev, 04765 VL53L1_DeviceDmaxMode *pdmax_mode) 04766 { 04767 04768 04769 VL53L1_Error status = VL53L1_ERROR_NONE; 04770 04771 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04772 04773 LOG_FUNCTION_START(""); 04774 04775 *pdmax_mode = pdev->dmax_mode; 04776 04777 LOG_FUNCTION_END(status); 04778 04779 return status; 04780 } 04781 04782 04783 VL53L1_Error VL53L1_get_dmax_calibration_data( 04784 VL53L1_DEV Dev, 04785 VL53L1_DeviceDmaxMode dmax_mode, 04786 uint8_t zone_id, 04787 VL53L1_dmax_calibration_data_t *pdmax_cal) 04788 { 04789 04790 04791 VL53L1_Error status = VL53L1_ERROR_NONE; 04792 04793 VL53L1_LLDriverData_t *pdev = 04794 VL53L1DevStructGetLLDriverHandle(Dev); 04795 VL53L1_LLDriverResults_t *pres = 04796 VL53L1DevStructGetLLResultsHandle(Dev); 04797 04798 LOG_FUNCTION_START(""); 04799 04800 switch (dmax_mode) { 04801 04802 case VL53L1_DEVICEDMAXMODE__PER_ZONE_CAL_DATA: 04803 pdmax_cal->ref__actual_effective_spads = 04804 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].effective_spads; 04805 pdmax_cal->ref__peak_signal_count_rate_mcps = 04806 (uint16_t)pres->zone_cal.VL53L1_p_002[zone_id].peak_rate_mcps; 04807 pdmax_cal->ref__distance_mm = 04808 pres->zone_cal.cal_distance_mm; 04809 pdmax_cal->ref_reflectance_pc = 04810 pres->zone_cal.cal_reflectance_pc; 04811 pdmax_cal->coverglass_transmission = 0x0100; 04812 break; 04813 04814 case VL53L1_DEVICEDMAXMODE__CUST_CAL_DATA: 04815 memcpy( 04816 pdmax_cal, 04817 &(pdev->cust_dmax_cal), 04818 sizeof(VL53L1_dmax_calibration_data_t)); 04819 break; 04820 04821 case VL53L1_DEVICEDMAXMODE__FMT_CAL_DATA: 04822 memcpy( 04823 pdmax_cal, 04824 &(pdev->fmt_dmax_cal), 04825 sizeof(VL53L1_dmax_calibration_data_t)); 04826 break; 04827 04828 default: 04829 status = VL53L1_ERROR_INVALID_PARAMS; 04830 break; 04831 04832 } 04833 04834 LOG_FUNCTION_END(status); 04835 04836 return status; 04837 } 04838 04839 04840 VL53L1_Error VL53L1_set_hist_dmax_config( 04841 VL53L1_DEV Dev, 04842 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg) 04843 { 04844 04845 04846 04847 VL53L1_Error status = VL53L1_ERROR_NONE; 04848 04849 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04850 04851 LOG_FUNCTION_START(""); 04852 04853 04854 memcpy( 04855 &(pdev->dmax_cfg), 04856 pdmax_cfg, 04857 sizeof(VL53L1_hist_gen3_dmax_config_t)); 04858 04859 LOG_FUNCTION_END(status); 04860 04861 return status; 04862 } 04863 04864 04865 VL53L1_Error VL53L1_get_hist_dmax_config( 04866 VL53L1_DEV Dev, 04867 VL53L1_hist_gen3_dmax_config_t *pdmax_cfg) 04868 { 04869 04870 04871 04872 VL53L1_Error status = VL53L1_ERROR_NONE; 04873 04874 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04875 04876 LOG_FUNCTION_START(""); 04877 04878 04879 memcpy( 04880 pdmax_cfg, 04881 &(pdev->dmax_cfg), 04882 sizeof(VL53L1_hist_gen3_dmax_config_t)); 04883 04884 LOG_FUNCTION_END(status); 04885 04886 return status; 04887 } 04888 04889 04890 VL53L1_Error VL53L1_set_offset_calibration_mode( 04891 VL53L1_DEV Dev, 04892 VL53L1_OffsetCalibrationMode offset_cal_mode) 04893 { 04894 04895 04896 04897 VL53L1_Error status = VL53L1_ERROR_NONE; 04898 04899 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04900 04901 LOG_FUNCTION_START(""); 04902 04903 pdev->offset_calibration_mode = offset_cal_mode; 04904 04905 LOG_FUNCTION_END(status); 04906 04907 return status; 04908 } 04909 04910 04911 VL53L1_Error VL53L1_get_offset_calibration_mode( 04912 VL53L1_DEV Dev, 04913 VL53L1_OffsetCalibrationMode *poffset_cal_mode) 04914 { 04915 04916 04917 04918 VL53L1_Error status = VL53L1_ERROR_NONE; 04919 04920 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04921 04922 LOG_FUNCTION_START(""); 04923 04924 *poffset_cal_mode = pdev->offset_calibration_mode; 04925 04926 LOG_FUNCTION_END(status); 04927 04928 return status; 04929 } 04930 04931 04932 VL53L1_Error VL53L1_set_offset_correction_mode( 04933 VL53L1_DEV Dev, 04934 VL53L1_OffsetCorrectionMode offset_cor_mode) 04935 { 04936 04937 04938 04939 VL53L1_Error status = VL53L1_ERROR_NONE; 04940 04941 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04942 04943 LOG_FUNCTION_START(""); 04944 04945 pdev->offset_correction_mode = offset_cor_mode; 04946 04947 LOG_FUNCTION_END(status); 04948 04949 return status; 04950 } 04951 04952 04953 VL53L1_Error VL53L1_get_offset_correction_mode( 04954 VL53L1_DEV Dev, 04955 VL53L1_OffsetCorrectionMode *poffset_cor_mode) 04956 { 04957 04958 04959 04960 VL53L1_Error status = VL53L1_ERROR_NONE; 04961 04962 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 04963 04964 LOG_FUNCTION_START(""); 04965 04966 *poffset_cor_mode = pdev->offset_correction_mode; 04967 04968 LOG_FUNCTION_END(status); 04969 04970 return status; 04971 } 04972 04973 04974 04975 04976 VL53L1_Error VL53L1_set_zone_calibration_data( 04977 VL53L1_DEV Dev, 04978 VL53L1_zone_calibration_results_t *pzone_cal) 04979 { 04980 04981 04982 04983 VL53L1_Error status = VL53L1_ERROR_NONE; 04984 04985 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev); 04986 04987 LOG_FUNCTION_START(""); 04988 04989 if (pzone_cal->struct_version != 04990 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION) 04991 status = VL53L1_ERROR_INVALID_PARAMS; 04992 04993 04994 if (status == VL53L1_ERROR_NONE) 04995 04996 memcpy( 04997 &(pres->zone_cal), 04998 pzone_cal, 04999 sizeof(VL53L1_zone_calibration_results_t)); 05000 05001 LOG_FUNCTION_END(status); 05002 05003 return status; 05004 } 05005 05006 05007 VL53L1_Error VL53L1_get_zone_calibration_data( 05008 VL53L1_DEV Dev, 05009 VL53L1_zone_calibration_results_t *pzone_cal) 05010 { 05011 05012 05013 05014 VL53L1_Error status = VL53L1_ERROR_NONE; 05015 05016 VL53L1_LLDriverResults_t *pres = VL53L1DevStructGetLLResultsHandle(Dev); 05017 05018 LOG_FUNCTION_START(""); 05019 05020 05021 memcpy( 05022 pzone_cal, 05023 &(pres->zone_cal), 05024 sizeof(VL53L1_zone_calibration_results_t)); 05025 05026 pzone_cal->struct_version = 05027 VL53L1_LL_ZONE_CALIBRATION_DATA_STRUCT_VERSION; 05028 05029 LOG_FUNCTION_END(status); 05030 05031 return status; 05032 } 05033 05034 05035 VL53L1_Error VL53L1_get_tuning_debug_data( 05036 VL53L1_DEV Dev, 05037 VL53L1_tuning_parameters_t *ptun_data) 05038 { 05039 05040 05041 VL53L1_Error status = VL53L1_ERROR_NONE; 05042 05043 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 05044 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 05045 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg); 05046 05047 LOG_FUNCTION_START(""); 05048 05049 ptun_data->vl53l1_tuningparm_version = 05050 pdev->tuning_parms.tp_tuning_parm_version; 05051 05052 ptun_data->vl53l1_tuningparm_key_table_version = 05053 pdev->tuning_parms.tp_tuning_parm_key_table_version; 05054 05055 05056 ptun_data->vl53l1_tuningparm_lld_version = 05057 pdev->tuning_parms.tp_tuning_parm_lld_version; 05058 05059 ptun_data->vl53l1_tuningparm_hist_algo_select = 05060 pHP->hist_algo_select; 05061 05062 ptun_data->vl53l1_tuningparm_hist_target_order = 05063 pHP->hist_target_order; 05064 05065 ptun_data->vl53l1_tuningparm_hist_filter_woi_0 = 05066 pHP->filter_woi0; 05067 05068 ptun_data->vl53l1_tuningparm_hist_filter_woi_1 = 05069 pHP->filter_woi1; 05070 05071 ptun_data->vl53l1_tuningparm_hist_amb_est_method = 05072 pHP->hist_amb_est_method; 05073 05074 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_0 = 05075 pHP->ambient_thresh_sigma0; 05076 05077 ptun_data->vl53l1_tuningparm_hist_amb_thresh_sigma_1 = 05078 pHP->ambient_thresh_sigma1; 05079 05080 ptun_data->vl53l1_tuningparm_hist_min_amb_thresh_events = 05081 pHP->min_ambient_thresh_events; 05082 05083 ptun_data->vl53l1_tuningparm_hist_amb_events_scaler = 05084 pHP->ambient_thresh_events_scaler; 05085 05086 ptun_data->vl53l1_tuningparm_hist_noise_threshold = 05087 pHP->noise_threshold; 05088 05089 ptun_data->vl53l1_tuningparm_hist_signal_total_events_limit = 05090 pHP->signal_total_events_limit; 05091 05092 ptun_data->vl53l1_tuningparm_hist_sigma_est_ref_mm = 05093 pHP->sigma_estimator__sigma_ref_mm; 05094 05095 ptun_data->vl53l1_tuningparm_hist_sigma_thresh_mm = 05096 pHP->sigma_thresh; 05097 05098 ptun_data->vl53l1_tuningparm_hist_gain_factor = 05099 pdev->gain_cal.histogram_ranging_gain_factor; 05100 05101 ptun_data->vl53l1_tuningparm_consistency_hist_phase_tolerance = 05102 pHP->algo__consistency_check__phase_tolerance; 05103 05104 ptun_data->vl53l1_tuningparm_consistency_hist_min_max_tolerance_mm = 05105 pHP->algo__consistency_check__min_max_tolerance; 05106 05107 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma = 05108 pHP->algo__consistency_check__event_sigma; 05109 05110 ptun_data->vl53l1_tuningparm_consistency_hist_event_sigma_min_spad_limit 05111 = pHP->algo__consistency_check__event_min_spad_count; 05112 05113 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_long_range = 05114 pdev->tuning_parms.tp_init_phase_rtn_hist_long; 05115 05116 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_med_range = 05117 pdev->tuning_parms.tp_init_phase_rtn_hist_med; 05118 05119 ptun_data->vl53l1_tuningparm_initial_phase_rtn_histo_short_range = 05120 pdev->tuning_parms.tp_init_phase_rtn_hist_short; 05121 05122 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_long_range = 05123 pdev->tuning_parms.tp_init_phase_ref_hist_long; 05124 05125 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_med_range = 05126 pdev->tuning_parms.tp_init_phase_ref_hist_med; 05127 05128 ptun_data->vl53l1_tuningparm_initial_phase_ref_histo_short_range = 05129 pdev->tuning_parms.tp_init_phase_ref_hist_short; 05130 05131 ptun_data->vl53l1_tuningparm_xtalk_detect_min_valid_range_mm = 05132 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm; 05133 05134 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_range_mm = 05135 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm; 05136 05137 ptun_data->vl53l1_tuningparm_xtalk_detect_max_sigma_mm = 05138 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm; 05139 05140 ptun_data->vl53l1_tuningparm_xtalk_detect_min_max_tolerance = 05141 pHP->algo__crosstalk_detect_min_max_tolerance; 05142 05143 ptun_data->vl53l1_tuningparm_xtalk_detect_max_valid_rate_kcps = 05144 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps; 05145 05146 ptun_data->vl53l1_tuningparm_xtalk_detect_event_sigma = 05147 pHP->algo__crosstalk_detect_event_sigma; 05148 05149 ptun_data->vl53l1_tuningparm_hist_xtalk_margin_kcps = 05150 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps; 05151 05152 ptun_data->vl53l1_tuningparm_consistency_lite_phase_tolerance = 05153 pdev->tuning_parms.tp_consistency_lite_phase_tolerance; 05154 05155 ptun_data->vl53l1_tuningparm_phasecal_target = 05156 pdev->tuning_parms.tp_phasecal_target; 05157 05158 ptun_data->vl53l1_tuningparm_lite_cal_repeat_rate = 05159 pdev->tuning_parms.tp_cal_repeat_rate; 05160 05161 ptun_data->vl53l1_tuningparm_lite_ranging_gain_factor = 05162 pdev->gain_cal.standard_ranging_gain_factor; 05163 05164 ptun_data->vl53l1_tuningparm_lite_min_clip_mm = 05165 pdev->tuning_parms.tp_lite_min_clip; 05166 05167 ptun_data->vl53l1_tuningparm_lite_long_sigma_thresh_mm = 05168 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm; 05169 05170 ptun_data->vl53l1_tuningparm_lite_med_sigma_thresh_mm = 05171 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm; 05172 05173 ptun_data->vl53l1_tuningparm_lite_short_sigma_thresh_mm = 05174 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm; 05175 05176 ptun_data->vl53l1_tuningparm_lite_long_min_count_rate_rtn_mcps = 05177 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps; 05178 05179 ptun_data->vl53l1_tuningparm_lite_med_min_count_rate_rtn_mcps = 05180 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps; 05181 05182 ptun_data->vl53l1_tuningparm_lite_short_min_count_rate_rtn_mcps = 05183 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps; 05184 05185 ptun_data->vl53l1_tuningparm_lite_sigma_est_pulse_width = 05186 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns; 05187 05188 ptun_data->vl53l1_tuningparm_lite_sigma_est_amb_width_ns = 05189 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns; 05190 05191 ptun_data->vl53l1_tuningparm_lite_sigma_ref_mm = 05192 pdev->tuning_parms.tp_lite_sigma_ref_mm; 05193 05194 ptun_data->vl53l1_tuningparm_lite_rit_mult = 05195 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult; 05196 05197 ptun_data->vl53l1_tuningparm_lite_seed_config = 05198 pdev->tuning_parms.tp_lite_seed_cfg; 05199 05200 ptun_data->vl53l1_tuningparm_lite_quantifier = 05201 pdev->tuning_parms.tp_lite_quantifier; 05202 05203 ptun_data->vl53l1_tuningparm_lite_first_order_select = 05204 pdev->tuning_parms.tp_lite_first_order_select; 05205 05206 ptun_data->vl53l1_tuningparm_lite_xtalk_margin_kcps = 05207 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps; 05208 05209 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_long_range = 05210 pdev->tuning_parms.tp_init_phase_rtn_lite_long; 05211 05212 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_med_range = 05213 pdev->tuning_parms.tp_init_phase_rtn_lite_med; 05214 05215 ptun_data->vl53l1_tuningparm_initial_phase_rtn_lite_short_range = 05216 pdev->tuning_parms.tp_init_phase_rtn_lite_short; 05217 05218 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_long_range = 05219 pdev->tuning_parms.tp_init_phase_ref_lite_long; 05220 05221 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_med_range = 05222 pdev->tuning_parms.tp_init_phase_ref_lite_med; 05223 05224 ptun_data->vl53l1_tuningparm_initial_phase_ref_lite_short_range = 05225 pdev->tuning_parms.tp_init_phase_ref_lite_short; 05226 05227 ptun_data->vl53l1_tuningparm_timed_seed_config = 05228 pdev->tuning_parms.tp_timed_seed_cfg; 05229 05230 ptun_data->vl53l1_tuningparm_dmax_cfg_signal_thresh_sigma = 05231 pdev->dmax_cfg.signal_thresh_sigma; 05232 05233 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_0 = 05234 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0]; 05235 05236 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_1 = 05237 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1]; 05238 05239 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_2 = 05240 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2]; 05241 05242 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_3 = 05243 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3]; 05244 05245 ptun_data->vl53l1_tuningparm_dmax_cfg_reflectance_array_4 = 05246 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4]; 05247 05248 ptun_data->vl53l1_tuningparm_vhv_loopbound = 05249 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound; 05250 05251 ptun_data->vl53l1_tuningparm_refspadchar_device_test_mode = 05252 pdev->refspadchar.device_test_mode; 05253 05254 ptun_data->vl53l1_tuningparm_refspadchar_vcsel_period = 05255 pdev->refspadchar.VL53L1_p_009; 05256 05257 ptun_data->vl53l1_tuningparm_refspadchar_phasecal_timeout_us = 05258 pdev->refspadchar.timeout_us; 05259 05260 ptun_data->vl53l1_tuningparm_refspadchar_target_count_rate_mcps = 05261 pdev->refspadchar.target_count_rate_mcps; 05262 05263 ptun_data->vl53l1_tuningparm_refspadchar_min_countrate_limit_mcps = 05264 pdev->refspadchar.min_count_rate_limit_mcps; 05265 05266 ptun_data->vl53l1_tuningparm_refspadchar_max_countrate_limit_mcps = 05267 pdev->refspadchar.max_count_rate_limit_mcps; 05268 05269 ptun_data->vl53l1_tuningparm_xtalk_extract_num_of_samples = 05270 pXC->num_of_samples; 05271 05272 ptun_data->vl53l1_tuningparm_xtalk_extract_min_filter_thresh_mm = 05273 pXC->algo__crosstalk_extract_min_valid_range_mm; 05274 05275 ptun_data->vl53l1_tuningparm_xtalk_extract_max_filter_thresh_mm = 05276 pXC->algo__crosstalk_extract_max_valid_range_mm; 05277 05278 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_rate_mcps = 05279 pXC->dss_config__target_total_rate_mcps; 05280 05281 ptun_data->vl53l1_tuningparm_xtalk_extract_phasecal_timeout_us = 05282 pXC->phasecal_config_timeout_us; 05283 05284 ptun_data->vl53l1_tuningparm_xtalk_extract_max_valid_rate_kcps = 05285 pXC->algo__crosstalk_extract_max_valid_rate_kcps; 05286 05287 ptun_data->vl53l1_tuningparm_xtalk_extract_sigma_threshold_mm = 05288 pXC->algo__crosstalk_extract_max_sigma_mm; 05289 05290 ptun_data->vl53l1_tuningparm_xtalk_extract_dss_timeout_us = 05291 pXC->mm_config_timeout_us; 05292 05293 ptun_data->vl53l1_tuningparm_xtalk_extract_bin_timeout_us = 05294 pXC->range_config_timeout_us; 05295 05296 ptun_data->vl53l1_tuningparm_offset_cal_dss_rate_mcps = 05297 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps; 05298 05299 ptun_data->vl53l1_tuningparm_offset_cal_phasecal_timeout_us = 05300 pdev->offsetcal_cfg.phasecal_config_timeout_us; 05301 05302 ptun_data->vl53l1_tuningparm_offset_cal_mm_timeout_us = 05303 pdev->offsetcal_cfg.mm_config_timeout_us; 05304 05305 ptun_data->vl53l1_tuningparm_offset_cal_range_timeout_us = 05306 pdev->offsetcal_cfg.range_config_timeout_us; 05307 05308 ptun_data->vl53l1_tuningparm_offset_cal_pre_samples = 05309 pdev->offsetcal_cfg.pre_num_of_samples; 05310 05311 ptun_data->vl53l1_tuningparm_offset_cal_mm1_samples = 05312 pdev->offsetcal_cfg.mm1_num_of_samples; 05313 05314 ptun_data->vl53l1_tuningparm_offset_cal_mm2_samples = 05315 pdev->offsetcal_cfg.mm2_num_of_samples; 05316 05317 ptun_data->vl53l1_tuningparm_zone_cal_dss_rate_mcps = 05318 pdev->zonecal_cfg.dss_config__target_total_rate_mcps; 05319 05320 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_timeout_us = 05321 pdev->zonecal_cfg.phasecal_config_timeout_us; 05322 05323 ptun_data->vl53l1_tuningparm_zone_cal_dss_timeout_us = 05324 pdev->zonecal_cfg.mm_config_timeout_us; 05325 05326 ptun_data->vl53l1_tuningparm_zone_cal_phasecal_num_samples = 05327 pdev->zonecal_cfg.phasecal_num_of_samples; 05328 05329 ptun_data->vl53l1_tuningparm_zone_cal_range_timeout_us = 05330 pdev->zonecal_cfg.range_config_timeout_us; 05331 05332 ptun_data->vl53l1_tuningparm_zone_cal_zone_num_samples = 05333 pdev->zonecal_cfg.zone_num_of_samples; 05334 05335 ptun_data->vl53l1_tuningparm_spadmap_vcsel_period = 05336 pdev->ssc_cfg.VL53L1_p_009; 05337 05338 ptun_data->vl53l1_tuningparm_spadmap_vcsel_start = 05339 pdev->ssc_cfg.vcsel_start; 05340 05341 ptun_data->vl53l1_tuningparm_spadmap_rate_limit_mcps = 05342 pdev->ssc_cfg.rate_limit_mcps; 05343 05344 ptun_data->vl53l1_tuningparm_lite_dss_config_target_total_rate_mcps = 05345 pdev->tuning_parms.tp_dss_target_lite_mcps; 05346 05347 ptun_data->vl53l1_tuningparm_ranging_dss_config_target_total_rate_mcps = 05348 pdev->tuning_parms.tp_dss_target_histo_mcps; 05349 05350 ptun_data->vl53l1_tuningparm_mz_dss_config_target_total_rate_mcps = 05351 pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 05352 05353 ptun_data->vl53l1_tuningparm_timed_dss_config_target_total_rate_mcps = 05354 pdev->tuning_parms.tp_dss_target_timed_mcps; 05355 05356 ptun_data->vl53l1_tuningparm_lite_phasecal_config_timeout_us = 05357 pdev->tuning_parms.tp_phasecal_timeout_lite_us; 05358 05359 ptun_data->vl53l1_tuningparm_ranging_long_phasecal_config_timeout_us = 05360 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us; 05361 05362 ptun_data->vl53l1_tuningparm_ranging_med_phasecal_config_timeout_us = 05363 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us; 05364 05365 ptun_data->vl53l1_tuningparm_ranging_short_phasecal_config_timeout_us = 05366 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 05367 05368 ptun_data->vl53l1_tuningparm_mz_long_phasecal_config_timeout_us = 05369 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us; 05370 05371 ptun_data->vl53l1_tuningparm_mz_med_phasecal_config_timeout_us = 05372 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us; 05373 05374 ptun_data->vl53l1_tuningparm_mz_short_phasecal_config_timeout_us = 05375 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us; 05376 05377 ptun_data->vl53l1_tuningparm_timed_phasecal_config_timeout_us = 05378 pdev->tuning_parms.tp_phasecal_timeout_timed_us; 05379 05380 ptun_data->vl53l1_tuningparm_lite_mm_config_timeout_us = 05381 pdev->tuning_parms.tp_mm_timeout_lite_us; 05382 05383 ptun_data->vl53l1_tuningparm_ranging_mm_config_timeout_us = 05384 pdev->tuning_parms.tp_mm_timeout_histo_us; 05385 05386 ptun_data->vl53l1_tuningparm_mz_mm_config_timeout_us = 05387 pdev->tuning_parms.tp_mm_timeout_mz_us; 05388 05389 ptun_data->vl53l1_tuningparm_timed_mm_config_timeout_us = 05390 pdev->tuning_parms.tp_mm_timeout_timed_us; 05391 05392 ptun_data->vl53l1_tuningparm_lite_range_config_timeout_us = 05393 pdev->tuning_parms.tp_range_timeout_lite_us; 05394 05395 ptun_data->vl53l1_tuningparm_ranging_range_config_timeout_us = 05396 pdev->tuning_parms.tp_range_timeout_histo_us; 05397 05398 ptun_data->vl53l1_tuningparm_mz_range_config_timeout_us = 05399 pdev->tuning_parms.tp_range_timeout_mz_us; 05400 05401 ptun_data->vl53l1_tuningparm_timed_range_config_timeout_us = 05402 pdev->tuning_parms.tp_range_timeout_timed_us; 05403 05404 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_margin = 05405 pdev->smudge_correct_config.smudge_margin; 05406 05407 ptun_data->vl53l1_tuningparm_dynxtalk_noise_margin = 05408 pdev->smudge_correct_config.noise_margin; 05409 05410 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit = 05411 pdev->smudge_correct_config.user_xtalk_offset_limit; 05412 05413 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_offset_limit_hi = 05414 pdev->smudge_correct_config.user_xtalk_offset_limit_hi; 05415 05416 ptun_data->vl53l1_tuningparm_dynxtalk_sample_limit = 05417 pdev->smudge_correct_config.sample_limit; 05418 05419 ptun_data->vl53l1_tuningparm_dynxtalk_single_xtalk_delta = 05420 pdev->smudge_correct_config.single_xtalk_delta; 05421 05422 ptun_data->vl53l1_tuningparm_dynxtalk_averaged_xtalk_delta = 05423 pdev->smudge_correct_config.averaged_xtalk_delta; 05424 05425 ptun_data->vl53l1_tuningparm_dynxtalk_clip_limit = 05426 pdev->smudge_correct_config.smudge_corr_clip_limit; 05427 05428 ptun_data->vl53l1_tuningparm_dynxtalk_scaler_calc_method = 05429 pdev->smudge_correct_config.scaler_calc_method; 05430 05431 ptun_data->vl53l1_tuningparm_dynxtalk_xgradient_scaler = 05432 pdev->smudge_correct_config.x_gradient_scaler; 05433 05434 ptun_data->vl53l1_tuningparm_dynxtalk_ygradient_scaler = 05435 pdev->smudge_correct_config.y_gradient_scaler; 05436 05437 ptun_data->vl53l1_tuningparm_dynxtalk_user_scaler_set = 05438 pdev->smudge_correct_config.user_scaler_set; 05439 05440 ptun_data->vl53l1_tuningparm_dynxtalk_smudge_cor_single_apply = 05441 pdev->smudge_correct_config.smudge_corr_single_apply; 05442 05443 ptun_data->vl53l1_tuningparm_dynxtalk_xtalk_amb_threshold = 05444 pdev->smudge_correct_config.smudge_corr_ambient_threshold; 05445 05446 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_amb_threshold_kcps = 05447 pdev->smudge_correct_config.nodetect_ambient_threshold; 05448 05449 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_sample_limit = 05450 pdev->smudge_correct_config.nodetect_sample_limit; 05451 05452 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_xtalk_offset_kcps = 05453 pdev->smudge_correct_config.nodetect_xtalk_offset; 05454 05455 ptun_data->vl53l1_tuningparm_dynxtalk_nodetect_min_range_mm = 05456 pdev->smudge_correct_config.nodetect_min_range_mm; 05457 05458 ptun_data->vl53l1_tuningparm_lowpowerauto_vhv_loop_bound = 05459 pdev->low_power_auto_data.vhv_loop_bound; 05460 05461 ptun_data->vl53l1_tuningparm_lowpowerauto_mm_config_timeout_us = 05462 pdev->tuning_parms.tp_mm_timeout_lpa_us; 05463 05464 ptun_data->vl53l1_tuningparm_lowpowerauto_range_config_timeout_us = 05465 pdev->tuning_parms.tp_range_timeout_lpa_us; 05466 05467 ptun_data->vl53l1_tuningparm_very_short_dss_rate_mcps = 05468 pdev->tuning_parms.tp_dss_target_very_short_mcps; 05469 05470 ptun_data->vl53l1_tuningparm_phasecal_patch_power = 05471 pdev->tuning_parms.tp_phasecal_patch_power; 05472 05473 LOG_FUNCTION_END(status); 05474 05475 return status; 05476 } 05477 05478 05479 05480 05481 05482 VL53L1_Error VL53L1_get_tuning_parm( 05483 VL53L1_DEV Dev, 05484 VL53L1_TuningParms tuning_parm_key, 05485 int32_t *ptuning_parm_value) 05486 { 05487 05488 05489 05490 VL53L1_Error status = VL53L1_ERROR_NONE; 05491 05492 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 05493 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 05494 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg); 05495 05496 LOG_FUNCTION_START(""); 05497 05498 switch (tuning_parm_key) { 05499 05500 case VL53L1_TUNINGPARM_VERSION: 05501 *ptuning_parm_value = 05502 (int32_t)pdev->tuning_parms.tp_tuning_parm_version; 05503 break; 05504 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION: 05505 *ptuning_parm_value = 05506 (int32_t)pdev->tuning_parms.tp_tuning_parm_key_table_version; 05507 break; 05508 case VL53L1_TUNINGPARM_LLD_VERSION: 05509 *ptuning_parm_value = 05510 (int32_t)pdev->tuning_parms.tp_tuning_parm_lld_version; 05511 break; 05512 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT: 05513 *ptuning_parm_value = 05514 (int32_t)pHP->hist_algo_select; 05515 break; 05516 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER: 05517 *ptuning_parm_value = 05518 (int32_t)pHP->hist_target_order; 05519 break; 05520 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0: 05521 *ptuning_parm_value = 05522 (int32_t)pHP->filter_woi0; 05523 break; 05524 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1: 05525 *ptuning_parm_value = 05526 (int32_t)pHP->filter_woi1; 05527 break; 05528 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD: 05529 *ptuning_parm_value = 05530 (int32_t)pHP->hist_amb_est_method; 05531 break; 05532 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0: 05533 *ptuning_parm_value = 05534 (int32_t)pHP->ambient_thresh_sigma0; 05535 break; 05536 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1: 05537 *ptuning_parm_value = 05538 (int32_t)pHP->ambient_thresh_sigma1; 05539 break; 05540 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS: 05541 *ptuning_parm_value = 05542 (int32_t)pHP->min_ambient_thresh_events; 05543 break; 05544 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER: 05545 *ptuning_parm_value = 05546 (int32_t)pHP->ambient_thresh_events_scaler; 05547 break; 05548 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD: 05549 *ptuning_parm_value = 05550 (int32_t)pHP->noise_threshold; 05551 break; 05552 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT: 05553 *ptuning_parm_value = 05554 (int32_t)pHP->signal_total_events_limit; 05555 break; 05556 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM: 05557 *ptuning_parm_value = 05558 (int32_t)pHP->sigma_estimator__sigma_ref_mm; 05559 break; 05560 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM: 05561 *ptuning_parm_value = 05562 (int32_t)pHP->sigma_thresh; 05563 break; 05564 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR: 05565 *ptuning_parm_value = 05566 (int32_t)pdev->gain_cal.histogram_ranging_gain_factor; 05567 break; 05568 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE: 05569 *ptuning_parm_value = 05570 (int32_t)pHP->algo__consistency_check__phase_tolerance; 05571 break; 05572 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM: 05573 *ptuning_parm_value = 05574 (int32_t)pHP->algo__consistency_check__min_max_tolerance; 05575 break; 05576 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA: 05577 *ptuning_parm_value = 05578 (int32_t)pHP->algo__consistency_check__event_sigma; 05579 break; 05580 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT: 05581 *ptuning_parm_value = 05582 (int32_t)pHP->algo__consistency_check__event_min_spad_count; 05583 break; 05584 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE: 05585 *ptuning_parm_value = 05586 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_long; 05587 break; 05588 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE: 05589 *ptuning_parm_value = 05590 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_med; 05591 break; 05592 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE: 05593 *ptuning_parm_value = 05594 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_hist_short; 05595 break; 05596 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE: 05597 *ptuning_parm_value = 05598 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_long; 05599 break; 05600 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE: 05601 *ptuning_parm_value = 05602 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_med; 05603 break; 05604 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE: 05605 *ptuning_parm_value = 05606 (int32_t)pdev->tuning_parms.tp_init_phase_ref_hist_short; 05607 break; 05608 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM: 05609 *ptuning_parm_value = (int32_t)( 05610 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm); 05611 break; 05612 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM: 05613 *ptuning_parm_value = (int32_t)( 05614 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm); 05615 break; 05616 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM: 05617 *ptuning_parm_value = 05618 (int32_t)pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm; 05619 break; 05620 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE: 05621 *ptuning_parm_value = 05622 (int32_t)pHP->algo__crosstalk_detect_min_max_tolerance; 05623 break; 05624 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS: 05625 *ptuning_parm_value = (int32_t)( 05626 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps); 05627 break; 05628 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA: 05629 *ptuning_parm_value = 05630 (int32_t)pHP->algo__crosstalk_detect_event_sigma; 05631 break; 05632 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS: 05633 *ptuning_parm_value = 05634 (int32_t)pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps; 05635 break; 05636 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE: 05637 *ptuning_parm_value = 05638 (int32_t)pdev->tuning_parms.tp_consistency_lite_phase_tolerance; 05639 break; 05640 case VL53L1_TUNINGPARM_PHASECAL_TARGET: 05641 *ptuning_parm_value = 05642 (int32_t)pdev->tuning_parms.tp_phasecal_target; 05643 break; 05644 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE: 05645 *ptuning_parm_value = 05646 (int32_t)pdev->tuning_parms.tp_cal_repeat_rate; 05647 break; 05648 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR: 05649 *ptuning_parm_value = 05650 (int32_t)pdev->gain_cal.standard_ranging_gain_factor; 05651 break; 05652 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM: 05653 *ptuning_parm_value = 05654 (int32_t)pdev->tuning_parms.tp_lite_min_clip; 05655 break; 05656 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM: 05657 *ptuning_parm_value = 05658 (int32_t)pdev->tuning_parms.tp_lite_long_sigma_thresh_mm; 05659 break; 05660 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM: 05661 *ptuning_parm_value = 05662 (int32_t)pdev->tuning_parms.tp_lite_med_sigma_thresh_mm; 05663 break; 05664 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM: 05665 *ptuning_parm_value = 05666 (int32_t)pdev->tuning_parms.tp_lite_short_sigma_thresh_mm; 05667 break; 05668 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS: 05669 *ptuning_parm_value = (int32_t)( 05670 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps); 05671 break; 05672 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS: 05673 *ptuning_parm_value = 05674 (int32_t)pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps; 05675 break; 05676 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS: 05677 *ptuning_parm_value = (int32_t)( 05678 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps); 05679 break; 05680 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH: 05681 *ptuning_parm_value = 05682 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns; 05683 break; 05684 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS: 05685 *ptuning_parm_value = 05686 (int32_t)pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns; 05687 break; 05688 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM: 05689 *ptuning_parm_value = 05690 (int32_t)pdev->tuning_parms.tp_lite_sigma_ref_mm; 05691 break; 05692 case VL53L1_TUNINGPARM_LITE_RIT_MULT: 05693 *ptuning_parm_value = 05694 (int32_t)pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult; 05695 break; 05696 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG: 05697 *ptuning_parm_value = 05698 (int32_t)pdev->tuning_parms.tp_lite_seed_cfg; 05699 break; 05700 case VL53L1_TUNINGPARM_LITE_QUANTIFIER: 05701 *ptuning_parm_value = 05702 (int32_t)pdev->tuning_parms.tp_lite_quantifier; 05703 break; 05704 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT: 05705 *ptuning_parm_value = 05706 (int32_t)pdev->tuning_parms.tp_lite_first_order_select; 05707 break; 05708 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS: 05709 *ptuning_parm_value = 05710 (int32_t)pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps; 05711 break; 05712 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE: 05713 *ptuning_parm_value = 05714 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_long; 05715 break; 05716 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE: 05717 *ptuning_parm_value = 05718 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_med; 05719 break; 05720 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE: 05721 *ptuning_parm_value = 05722 (int32_t)pdev->tuning_parms.tp_init_phase_rtn_lite_short; 05723 break; 05724 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE: 05725 *ptuning_parm_value = 05726 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_long; 05727 break; 05728 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE: 05729 *ptuning_parm_value = 05730 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_med; 05731 break; 05732 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE: 05733 *ptuning_parm_value = 05734 (int32_t)pdev->tuning_parms.tp_init_phase_ref_lite_short; 05735 break; 05736 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG: 05737 *ptuning_parm_value = 05738 (int32_t)pdev->tuning_parms.tp_timed_seed_cfg; 05739 break; 05740 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA: 05741 *ptuning_parm_value = 05742 (int32_t)pdev->dmax_cfg.signal_thresh_sigma; 05743 break; 05744 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0: 05745 *ptuning_parm_value = 05746 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[0]; 05747 break; 05748 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1: 05749 *ptuning_parm_value = 05750 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[1]; 05751 break; 05752 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2: 05753 *ptuning_parm_value = 05754 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[2]; 05755 break; 05756 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3: 05757 *ptuning_parm_value = 05758 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[3]; 05759 break; 05760 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4: 05761 *ptuning_parm_value = 05762 (int32_t)pdev->dmax_cfg.target_reflectance_for_dmax_calc[4]; 05763 break; 05764 case VL53L1_TUNINGPARM_VHV_LOOPBOUND: 05765 *ptuning_parm_value = 05766 (int32_t)pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound; 05767 break; 05768 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE: 05769 *ptuning_parm_value = 05770 (int32_t)pdev->refspadchar.device_test_mode; 05771 break; 05772 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD: 05773 *ptuning_parm_value = 05774 (int32_t)pdev->refspadchar.VL53L1_p_009; 05775 break; 05776 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US: 05777 *ptuning_parm_value = 05778 (int32_t)pdev->refspadchar.timeout_us; 05779 break; 05780 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS: 05781 *ptuning_parm_value = 05782 (int32_t)pdev->refspadchar.target_count_rate_mcps; 05783 break; 05784 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS: 05785 *ptuning_parm_value = 05786 (int32_t)pdev->refspadchar.min_count_rate_limit_mcps; 05787 break; 05788 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS: 05789 *ptuning_parm_value = 05790 (int32_t)pdev->refspadchar.max_count_rate_limit_mcps; 05791 break; 05792 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES: 05793 *ptuning_parm_value = 05794 (int32_t)pXC->num_of_samples; 05795 break; 05796 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM: 05797 *ptuning_parm_value = 05798 (int32_t)pXC->algo__crosstalk_extract_min_valid_range_mm; 05799 break; 05800 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM: 05801 *ptuning_parm_value = 05802 (int32_t)pXC->algo__crosstalk_extract_max_valid_range_mm; 05803 break; 05804 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS: 05805 *ptuning_parm_value = 05806 (int32_t)pXC->dss_config__target_total_rate_mcps; 05807 break; 05808 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US: 05809 *ptuning_parm_value = 05810 (int32_t)pXC->phasecal_config_timeout_us; 05811 break; 05812 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS: 05813 *ptuning_parm_value = 05814 (int32_t)pXC->algo__crosstalk_extract_max_valid_rate_kcps; 05815 break; 05816 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM: 05817 *ptuning_parm_value = 05818 (int32_t)pXC->algo__crosstalk_extract_max_sigma_mm; 05819 break; 05820 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US: 05821 *ptuning_parm_value = 05822 (int32_t)pXC->mm_config_timeout_us; 05823 break; 05824 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US: 05825 *ptuning_parm_value = 05826 (int32_t)pXC->range_config_timeout_us; 05827 break; 05828 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS: 05829 *ptuning_parm_value = 05830 (int32_t)pdev->offsetcal_cfg.dss_config__target_total_rate_mcps; 05831 break; 05832 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US: 05833 *ptuning_parm_value = 05834 (int32_t)pdev->offsetcal_cfg.phasecal_config_timeout_us; 05835 break; 05836 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US: 05837 *ptuning_parm_value = 05838 (int32_t)pdev->offsetcal_cfg.mm_config_timeout_us; 05839 break; 05840 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US: 05841 *ptuning_parm_value = 05842 (int32_t)pdev->offsetcal_cfg.range_config_timeout_us; 05843 break; 05844 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES: 05845 *ptuning_parm_value = 05846 (int32_t)pdev->offsetcal_cfg.pre_num_of_samples; 05847 break; 05848 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES: 05849 *ptuning_parm_value = 05850 (int32_t)pdev->offsetcal_cfg.mm1_num_of_samples; 05851 break; 05852 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES: 05853 *ptuning_parm_value = 05854 (int32_t)pdev->offsetcal_cfg.mm2_num_of_samples; 05855 break; 05856 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS: 05857 *ptuning_parm_value = 05858 (int32_t)pdev->zonecal_cfg.dss_config__target_total_rate_mcps; 05859 break; 05860 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US: 05861 *ptuning_parm_value = 05862 (int32_t)pdev->zonecal_cfg.phasecal_config_timeout_us; 05863 break; 05864 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US: 05865 *ptuning_parm_value = 05866 (int32_t)pdev->zonecal_cfg.mm_config_timeout_us; 05867 break; 05868 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES: 05869 *ptuning_parm_value = 05870 (int32_t)pdev->zonecal_cfg.phasecal_num_of_samples; 05871 break; 05872 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US: 05873 *ptuning_parm_value = 05874 (int32_t)pdev->zonecal_cfg.range_config_timeout_us; 05875 break; 05876 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES: 05877 *ptuning_parm_value = 05878 (int32_t)pdev->zonecal_cfg.zone_num_of_samples; 05879 break; 05880 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD: 05881 *ptuning_parm_value = 05882 (int32_t)pdev->ssc_cfg.VL53L1_p_009; 05883 break; 05884 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START: 05885 *ptuning_parm_value = 05886 (int32_t)pdev->ssc_cfg.vcsel_start; 05887 break; 05888 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS: 05889 *ptuning_parm_value = 05890 (int32_t)pdev->ssc_cfg.rate_limit_mcps; 05891 break; 05892 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05893 *ptuning_parm_value = 05894 (int32_t)pdev->tuning_parms.tp_dss_target_lite_mcps; 05895 break; 05896 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05897 *ptuning_parm_value = 05898 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mcps; 05899 break; 05900 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05901 *ptuning_parm_value = 05902 (int32_t)pdev->tuning_parms.tp_dss_target_histo_mz_mcps; 05903 break; 05904 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 05905 *ptuning_parm_value = 05906 (int32_t)pdev->tuning_parms.tp_dss_target_timed_mcps; 05907 break; 05908 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US: 05909 *ptuning_parm_value = 05910 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_lite_us; 05911 break; 05912 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US: 05913 *ptuning_parm_value = 05914 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_long_us; 05915 break; 05916 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US: 05917 *ptuning_parm_value = 05918 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_med_us; 05919 break; 05920 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 05921 *ptuning_parm_value = 05922 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_hist_short_us; 05923 break; 05924 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US: 05925 *ptuning_parm_value = 05926 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_long_us; 05927 break; 05928 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US: 05929 *ptuning_parm_value = 05930 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_med_us; 05931 break; 05932 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 05933 *ptuning_parm_value = 05934 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_mz_short_us; 05935 break; 05936 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US: 05937 *ptuning_parm_value = 05938 (int32_t)pdev->tuning_parms.tp_phasecal_timeout_timed_us; 05939 break; 05940 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US: 05941 *ptuning_parm_value = 05942 (int32_t)pdev->tuning_parms.tp_mm_timeout_lite_us; 05943 break; 05944 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US: 05945 *ptuning_parm_value = 05946 (int32_t)pdev->tuning_parms.tp_mm_timeout_histo_us; 05947 break; 05948 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US: 05949 *ptuning_parm_value = 05950 (int32_t)pdev->tuning_parms.tp_mm_timeout_mz_us; 05951 break; 05952 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US: 05953 *ptuning_parm_value = 05954 (int32_t)pdev->tuning_parms.tp_mm_timeout_timed_us; 05955 break; 05956 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US: 05957 *ptuning_parm_value = 05958 (int32_t)pdev->tuning_parms.tp_range_timeout_lite_us; 05959 break; 05960 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US: 05961 *ptuning_parm_value = 05962 (int32_t)pdev->tuning_parms.tp_range_timeout_histo_us; 05963 break; 05964 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US: 05965 *ptuning_parm_value = 05966 (int32_t)pdev->tuning_parms.tp_range_timeout_mz_us; 05967 break; 05968 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US: 05969 *ptuning_parm_value = 05970 (int32_t)pdev->tuning_parms.tp_range_timeout_timed_us; 05971 break; 05972 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN: 05973 *ptuning_parm_value = 05974 (int32_t)pdev->smudge_correct_config.smudge_margin; 05975 break; 05976 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN: 05977 *ptuning_parm_value = 05978 (int32_t)pdev->smudge_correct_config.noise_margin; 05979 break; 05980 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT: 05981 *ptuning_parm_value = 05982 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit; 05983 break; 05984 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI: 05985 *ptuning_parm_value = 05986 (int32_t)pdev->smudge_correct_config.user_xtalk_offset_limit_hi; 05987 break; 05988 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT: 05989 *ptuning_parm_value = 05990 (int32_t)pdev->smudge_correct_config.sample_limit; 05991 break; 05992 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA: 05993 *ptuning_parm_value = 05994 (int32_t)pdev->smudge_correct_config.single_xtalk_delta; 05995 break; 05996 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA: 05997 *ptuning_parm_value = 05998 (int32_t)pdev->smudge_correct_config.averaged_xtalk_delta; 05999 break; 06000 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT: 06001 *ptuning_parm_value = 06002 (int32_t)pdev->smudge_correct_config.smudge_corr_clip_limit; 06003 break; 06004 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD: 06005 *ptuning_parm_value = 06006 (int32_t)pdev->smudge_correct_config.scaler_calc_method; 06007 break; 06008 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER: 06009 *ptuning_parm_value = 06010 (int32_t)pdev->smudge_correct_config.x_gradient_scaler; 06011 break; 06012 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER: 06013 *ptuning_parm_value = 06014 (int32_t)pdev->smudge_correct_config.y_gradient_scaler; 06015 break; 06016 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET: 06017 *ptuning_parm_value = 06018 (int32_t)pdev->smudge_correct_config.user_scaler_set; 06019 break; 06020 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY: 06021 *ptuning_parm_value = 06022 (int32_t)pdev->smudge_correct_config.smudge_corr_single_apply; 06023 break; 06024 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD: 06025 *ptuning_parm_value = (int32_t)( 06026 pdev->smudge_correct_config.smudge_corr_ambient_threshold); 06027 break; 06028 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS: 06029 *ptuning_parm_value = 06030 (int32_t)pdev->smudge_correct_config.nodetect_ambient_threshold; 06031 break; 06032 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT: 06033 *ptuning_parm_value = 06034 (int32_t)pdev->smudge_correct_config.nodetect_sample_limit; 06035 break; 06036 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS: 06037 *ptuning_parm_value = 06038 (int32_t)pdev->smudge_correct_config.nodetect_xtalk_offset; 06039 break; 06040 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM: 06041 *ptuning_parm_value = 06042 (int32_t)pdev->smudge_correct_config.nodetect_min_range_mm; 06043 break; 06044 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND: 06045 *ptuning_parm_value = 06046 (int32_t)pdev->low_power_auto_data.vhv_loop_bound; 06047 break; 06048 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US: 06049 *ptuning_parm_value = 06050 (int32_t)pdev->tuning_parms.tp_mm_timeout_lpa_us; 06051 break; 06052 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US: 06053 *ptuning_parm_value = 06054 (int32_t)pdev->tuning_parms.tp_range_timeout_lpa_us; 06055 break; 06056 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS: 06057 *ptuning_parm_value = 06058 (int32_t)pdev->tuning_parms.tp_dss_target_very_short_mcps; 06059 break; 06060 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER: 06061 *ptuning_parm_value = 06062 (int32_t) pdev->tuning_parms.tp_phasecal_patch_power; 06063 break; 06064 case VL53L1_TUNINGPARM_HIST_MERGE: 06065 *ptuning_parm_value = 06066 (int32_t) pdev->tuning_parms.tp_hist_merge; 06067 break; 06068 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD: 06069 *ptuning_parm_value = 06070 (int32_t) pdev->tuning_parms.tp_reset_merge_threshold; 06071 break; 06072 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE: 06073 *ptuning_parm_value = 06074 (int32_t) pdev->tuning_parms.tp_hist_merge_max_size; 06075 break; 06076 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR: 06077 *ptuning_parm_value = 06078 pdev->smudge_correct_config.max_smudge_factor; 06079 break; 06080 06081 case VL53L1_TUNINGPARM_UWR_ENABLE: 06082 *ptuning_parm_value = 06083 pdev->tuning_parms.tp_uwr_enable; 06084 break; 06085 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN: 06086 *ptuning_parm_value = 06087 pdev->tuning_parms.tp_uwr_med_z_1_min; 06088 break; 06089 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX: 06090 *ptuning_parm_value = 06091 pdev->tuning_parms.tp_uwr_med_z_1_max; 06092 break; 06093 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN: 06094 *ptuning_parm_value = 06095 pdev->tuning_parms.tp_uwr_med_z_2_min; 06096 break; 06097 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX: 06098 *ptuning_parm_value = 06099 pdev->tuning_parms.tp_uwr_med_z_2_max; 06100 break; 06101 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN: 06102 *ptuning_parm_value = 06103 pdev->tuning_parms.tp_uwr_med_z_3_min; 06104 break; 06105 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX: 06106 *ptuning_parm_value = 06107 pdev->tuning_parms.tp_uwr_med_z_3_max; 06108 break; 06109 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN: 06110 *ptuning_parm_value = 06111 pdev->tuning_parms.tp_uwr_med_z_4_min; 06112 break; 06113 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX: 06114 *ptuning_parm_value = 06115 pdev->tuning_parms.tp_uwr_med_z_4_max; 06116 break; 06117 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN: 06118 *ptuning_parm_value = 06119 pdev->tuning_parms.tp_uwr_med_z_5_min; 06120 break; 06121 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX: 06122 *ptuning_parm_value = 06123 pdev->tuning_parms.tp_uwr_med_z_5_max; 06124 break; 06125 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN: 06126 *ptuning_parm_value = 06127 pdev->tuning_parms.tp_uwr_med_z_6_min; 06128 break; 06129 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX: 06130 *ptuning_parm_value = 06131 pdev->tuning_parms.tp_uwr_med_z_6_max; 06132 break; 06133 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA: 06134 *ptuning_parm_value = 06135 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea; 06136 break; 06137 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB: 06138 *ptuning_parm_value = 06139 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb; 06140 break; 06141 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA: 06142 *ptuning_parm_value = 06143 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea; 06144 break; 06145 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB: 06146 *ptuning_parm_value = 06147 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb; 06148 break; 06149 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA: 06150 *ptuning_parm_value = 06151 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea; 06152 break; 06153 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB: 06154 *ptuning_parm_value = 06155 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb; 06156 break; 06157 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA: 06158 *ptuning_parm_value = 06159 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea; 06160 break; 06161 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB: 06162 *ptuning_parm_value = 06163 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb; 06164 break; 06165 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA: 06166 *ptuning_parm_value = 06167 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea; 06168 break; 06169 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB: 06170 *ptuning_parm_value = 06171 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb; 06172 break; 06173 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA: 06174 *ptuning_parm_value = 06175 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea; 06176 break; 06177 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB: 06178 *ptuning_parm_value = 06179 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb; 06180 break; 06181 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN: 06182 *ptuning_parm_value = 06183 pdev->tuning_parms.tp_uwr_lng_z_1_min; 06184 break; 06185 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX: 06186 *ptuning_parm_value = 06187 pdev->tuning_parms.tp_uwr_lng_z_1_max; 06188 break; 06189 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN: 06190 *ptuning_parm_value = 06191 pdev->tuning_parms.tp_uwr_lng_z_2_min; 06192 break; 06193 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX: 06194 *ptuning_parm_value = 06195 pdev->tuning_parms.tp_uwr_lng_z_2_max; 06196 break; 06197 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN: 06198 *ptuning_parm_value = 06199 pdev->tuning_parms.tp_uwr_lng_z_3_min; 06200 break; 06201 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX: 06202 *ptuning_parm_value = 06203 pdev->tuning_parms.tp_uwr_lng_z_3_max; 06204 break; 06205 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN: 06206 *ptuning_parm_value = 06207 pdev->tuning_parms.tp_uwr_lng_z_4_min; 06208 break; 06209 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX: 06210 *ptuning_parm_value = 06211 pdev->tuning_parms.tp_uwr_lng_z_4_max; 06212 break; 06213 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN: 06214 *ptuning_parm_value = 06215 pdev->tuning_parms.tp_uwr_lng_z_5_min; 06216 break; 06217 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX: 06218 *ptuning_parm_value = 06219 pdev->tuning_parms.tp_uwr_lng_z_5_max; 06220 break; 06221 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA: 06222 *ptuning_parm_value = 06223 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea; 06224 break; 06225 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB: 06226 *ptuning_parm_value = 06227 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb; 06228 break; 06229 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA: 06230 *ptuning_parm_value = 06231 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea; 06232 break; 06233 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB: 06234 *ptuning_parm_value = 06235 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb; 06236 break; 06237 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA: 06238 *ptuning_parm_value = 06239 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea; 06240 break; 06241 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB: 06242 *ptuning_parm_value = 06243 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb; 06244 break; 06245 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA: 06246 *ptuning_parm_value = 06247 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea; 06248 break; 06249 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB: 06250 *ptuning_parm_value = 06251 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb; 06252 break; 06253 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA: 06254 *ptuning_parm_value = 06255 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea; 06256 break; 06257 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB: 06258 *ptuning_parm_value = 06259 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb; 06260 break; 06261 06262 default: 06263 *ptuning_parm_value = 0x7FFFFFFF; 06264 status = VL53L1_ERROR_INVALID_PARAMS; 06265 break; 06266 06267 } 06268 06269 LOG_FUNCTION_END(status); 06270 06271 return status; 06272 } 06273 06274 VL53L1_Error VL53L1_set_tuning_parm( 06275 VL53L1_DEV Dev, 06276 VL53L1_TuningParms tuning_parm_key, 06277 int32_t tuning_parm_value) 06278 { 06279 06280 06281 06282 VL53L1_Error status = VL53L1_ERROR_NONE; 06283 06284 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 06285 VL53L1_hist_post_process_config_t *pHP = &(pdev->histpostprocess); 06286 VL53L1_xtalkextract_config_t *pXC = &(pdev->xtalk_extract_cfg); 06287 06288 LOG_FUNCTION_START(""); 06289 06290 switch (tuning_parm_key) { 06291 06292 case VL53L1_TUNINGPARM_VERSION: 06293 pdev->tuning_parms.tp_tuning_parm_version = 06294 (uint16_t)tuning_parm_value; 06295 break; 06296 case VL53L1_TUNINGPARM_KEY_TABLE_VERSION: 06297 pdev->tuning_parms.tp_tuning_parm_key_table_version = 06298 (uint16_t)tuning_parm_value; 06299 06300 06301 06302 if ((uint16_t)tuning_parm_value 06303 != VL53L1_TUNINGPARM_KEY_TABLE_VERSION_DEFAULT) 06304 status = VL53L1_ERROR_TUNING_PARM_KEY_MISMATCH; 06305 06306 break; 06307 case VL53L1_TUNINGPARM_LLD_VERSION: 06308 pdev->tuning_parms.tp_tuning_parm_lld_version = 06309 (uint16_t)tuning_parm_value; 06310 break; 06311 case VL53L1_TUNINGPARM_HIST_ALGO_SELECT: 06312 pHP->hist_algo_select = 06313 (VL53L1_HistAlgoSelect)tuning_parm_value; 06314 break; 06315 case VL53L1_TUNINGPARM_HIST_TARGET_ORDER: 06316 pHP->hist_target_order = 06317 (VL53L1_HistTargetOrder)tuning_parm_value; 06318 break; 06319 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_0: 06320 pHP->filter_woi0 = 06321 (uint8_t)tuning_parm_value; 06322 break; 06323 case VL53L1_TUNINGPARM_HIST_FILTER_WOI_1: 06324 pHP->filter_woi1 = 06325 (uint8_t)tuning_parm_value; 06326 break; 06327 case VL53L1_TUNINGPARM_HIST_AMB_EST_METHOD: 06328 pHP->hist_amb_est_method = 06329 (VL53L1_HistAmbEstMethod)tuning_parm_value; 06330 break; 06331 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_0: 06332 pHP->ambient_thresh_sigma0 = 06333 (uint8_t)tuning_parm_value; 06334 break; 06335 case VL53L1_TUNINGPARM_HIST_AMB_THRESH_SIGMA_1: 06336 pHP->ambient_thresh_sigma1 = 06337 (uint8_t)tuning_parm_value; 06338 break; 06339 case VL53L1_TUNINGPARM_HIST_MIN_AMB_THRESH_EVENTS: 06340 pHP->min_ambient_thresh_events = 06341 (int32_t)tuning_parm_value; 06342 break; 06343 case VL53L1_TUNINGPARM_HIST_AMB_EVENTS_SCALER: 06344 pHP->ambient_thresh_events_scaler = 06345 (uint16_t)tuning_parm_value; 06346 break; 06347 case VL53L1_TUNINGPARM_HIST_NOISE_THRESHOLD: 06348 pHP->noise_threshold = 06349 (uint16_t)tuning_parm_value; 06350 break; 06351 case VL53L1_TUNINGPARM_HIST_SIGNAL_TOTAL_EVENTS_LIMIT: 06352 pHP->signal_total_events_limit = 06353 (int32_t)tuning_parm_value; 06354 break; 06355 case VL53L1_TUNINGPARM_HIST_SIGMA_EST_REF_MM: 06356 pHP->sigma_estimator__sigma_ref_mm = 06357 (uint8_t)tuning_parm_value; 06358 break; 06359 case VL53L1_TUNINGPARM_HIST_SIGMA_THRESH_MM: 06360 pHP->sigma_thresh = 06361 (uint16_t)tuning_parm_value; 06362 break; 06363 case VL53L1_TUNINGPARM_HIST_GAIN_FACTOR: 06364 pdev->gain_cal.histogram_ranging_gain_factor = 06365 (uint16_t)tuning_parm_value; 06366 break; 06367 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_PHASE_TOLERANCE: 06368 pHP->algo__consistency_check__phase_tolerance = 06369 (uint8_t)tuning_parm_value; 06370 break; 06371 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_MIN_MAX_TOLERANCE_MM: 06372 pHP->algo__consistency_check__min_max_tolerance = 06373 (uint16_t)tuning_parm_value; 06374 break; 06375 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA: 06376 pHP->algo__consistency_check__event_sigma = 06377 (uint8_t)tuning_parm_value; 06378 break; 06379 case VL53L1_TUNINGPARM_CONSISTENCY_HIST_EVENT_SIGMA_MIN_SPAD_LIMIT: 06380 pHP->algo__consistency_check__event_min_spad_count = 06381 (uint16_t)tuning_parm_value; 06382 break; 06383 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_LONG_RANGE: 06384 pdev->tuning_parms.tp_init_phase_rtn_hist_long = 06385 (uint8_t)tuning_parm_value; 06386 break; 06387 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_MED_RANGE: 06388 pdev->tuning_parms.tp_init_phase_rtn_hist_med = 06389 (uint8_t)tuning_parm_value; 06390 break; 06391 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_HISTO_SHORT_RANGE: 06392 pdev->tuning_parms.tp_init_phase_rtn_hist_short = 06393 (uint8_t)tuning_parm_value; 06394 break; 06395 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_LONG_RANGE: 06396 pdev->tuning_parms.tp_init_phase_ref_hist_long = 06397 (uint8_t)tuning_parm_value; 06398 break; 06399 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_MED_RANGE: 06400 pdev->tuning_parms.tp_init_phase_ref_hist_med = 06401 (uint8_t)tuning_parm_value; 06402 break; 06403 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_HISTO_SHORT_RANGE: 06404 pdev->tuning_parms.tp_init_phase_ref_hist_short = 06405 (uint8_t)tuning_parm_value; 06406 break; 06407 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_VALID_RANGE_MM: 06408 pdev->xtalk_cfg.algo__crosstalk_detect_min_valid_range_mm = 06409 (int16_t)tuning_parm_value; 06410 break; 06411 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RANGE_MM: 06412 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_range_mm = 06413 (int16_t)tuning_parm_value; 06414 break; 06415 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_SIGMA_MM: 06416 pdev->xtalk_cfg.algo__crosstalk_detect_max_sigma_mm = 06417 (uint16_t)tuning_parm_value; 06418 break; 06419 case VL53L1_TUNINGPARM_XTALK_DETECT_MIN_MAX_TOLERANCE: 06420 pHP->algo__crosstalk_detect_min_max_tolerance = 06421 (uint16_t)tuning_parm_value; 06422 break; 06423 case VL53L1_TUNINGPARM_XTALK_DETECT_MAX_VALID_RATE_KCPS: 06424 pdev->xtalk_cfg.algo__crosstalk_detect_max_valid_rate_kcps = 06425 (uint16_t)tuning_parm_value; 06426 break; 06427 case VL53L1_TUNINGPARM_XTALK_DETECT_EVENT_SIGMA: 06428 pHP->algo__crosstalk_detect_event_sigma = 06429 (uint8_t)tuning_parm_value; 06430 break; 06431 case VL53L1_TUNINGPARM_HIST_XTALK_MARGIN_KCPS: 06432 pdev->xtalk_cfg.histogram_mode_crosstalk_margin_kcps = 06433 (int16_t)tuning_parm_value; 06434 break; 06435 case VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE: 06436 pdev->tuning_parms.tp_consistency_lite_phase_tolerance = 06437 (uint8_t)tuning_parm_value; 06438 break; 06439 case VL53L1_TUNINGPARM_PHASECAL_TARGET: 06440 pdev->tuning_parms.tp_phasecal_target = 06441 (uint8_t)tuning_parm_value; 06442 break; 06443 case VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE: 06444 pdev->tuning_parms.tp_cal_repeat_rate = 06445 (uint16_t)tuning_parm_value; 06446 break; 06447 case VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR: 06448 pdev->gain_cal.standard_ranging_gain_factor = 06449 (uint16_t)tuning_parm_value; 06450 break; 06451 case VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM: 06452 pdev->tuning_parms.tp_lite_min_clip = 06453 (uint8_t)tuning_parm_value; 06454 break; 06455 case VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM: 06456 pdev->tuning_parms.tp_lite_long_sigma_thresh_mm = 06457 (uint16_t)tuning_parm_value; 06458 break; 06459 case VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM: 06460 pdev->tuning_parms.tp_lite_med_sigma_thresh_mm = 06461 (uint16_t)tuning_parm_value; 06462 break; 06463 case VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM: 06464 pdev->tuning_parms.tp_lite_short_sigma_thresh_mm = 06465 (uint16_t)tuning_parm_value; 06466 break; 06467 case VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS: 06468 pdev->tuning_parms.tp_lite_long_min_count_rate_rtn_mcps = 06469 (uint16_t)tuning_parm_value; 06470 break; 06471 case VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS: 06472 pdev->tuning_parms.tp_lite_med_min_count_rate_rtn_mcps = 06473 (uint16_t)tuning_parm_value; 06474 break; 06475 case VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS: 06476 pdev->tuning_parms.tp_lite_short_min_count_rate_rtn_mcps = 06477 (uint16_t)tuning_parm_value; 06478 break; 06479 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH: 06480 pdev->tuning_parms.tp_lite_sigma_est_pulse_width_ns = 06481 (uint8_t)tuning_parm_value; 06482 break; 06483 case VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS: 06484 pdev->tuning_parms.tp_lite_sigma_est_amb_width_ns = 06485 (uint8_t)tuning_parm_value; 06486 break; 06487 case VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM: 06488 pdev->tuning_parms.tp_lite_sigma_ref_mm = 06489 (uint8_t)tuning_parm_value; 06490 break; 06491 case VL53L1_TUNINGPARM_LITE_RIT_MULT: 06492 pdev->xtalk_cfg.crosstalk_range_ignore_threshold_mult = 06493 (uint8_t)tuning_parm_value; 06494 break; 06495 case VL53L1_TUNINGPARM_LITE_SEED_CONFIG: 06496 pdev->tuning_parms.tp_lite_seed_cfg = 06497 (uint8_t)tuning_parm_value; 06498 break; 06499 case VL53L1_TUNINGPARM_LITE_QUANTIFIER: 06500 pdev->tuning_parms.tp_lite_quantifier = 06501 (uint8_t)tuning_parm_value; 06502 break; 06503 case VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT: 06504 pdev->tuning_parms.tp_lite_first_order_select = 06505 (uint8_t)tuning_parm_value; 06506 break; 06507 case VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS: 06508 pdev->xtalk_cfg.lite_mode_crosstalk_margin_kcps = 06509 (int16_t)tuning_parm_value; 06510 break; 06511 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE: 06512 pdev->tuning_parms.tp_init_phase_rtn_lite_long = 06513 (uint8_t)tuning_parm_value; 06514 break; 06515 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE: 06516 pdev->tuning_parms.tp_init_phase_rtn_lite_med = 06517 (uint8_t)tuning_parm_value; 06518 break; 06519 case VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE: 06520 pdev->tuning_parms.tp_init_phase_rtn_lite_short = 06521 (uint8_t)tuning_parm_value; 06522 break; 06523 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE: 06524 pdev->tuning_parms.tp_init_phase_ref_lite_long = 06525 (uint8_t)tuning_parm_value; 06526 break; 06527 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE: 06528 pdev->tuning_parms.tp_init_phase_ref_lite_med = 06529 (uint8_t)tuning_parm_value; 06530 break; 06531 case VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE: 06532 pdev->tuning_parms.tp_init_phase_ref_lite_short = 06533 (uint8_t)tuning_parm_value; 06534 break; 06535 case VL53L1_TUNINGPARM_TIMED_SEED_CONFIG: 06536 pdev->tuning_parms.tp_timed_seed_cfg = 06537 (uint8_t)tuning_parm_value; 06538 break; 06539 case VL53L1_TUNINGPARM_DMAX_CFG_SIGNAL_THRESH_SIGMA: 06540 pdev->dmax_cfg.signal_thresh_sigma = 06541 (uint8_t)tuning_parm_value; 06542 break; 06543 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_0: 06544 pdev->dmax_cfg.target_reflectance_for_dmax_calc[0] = 06545 (uint16_t)tuning_parm_value; 06546 break; 06547 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_1: 06548 pdev->dmax_cfg.target_reflectance_for_dmax_calc[1] = 06549 (uint16_t)tuning_parm_value; 06550 break; 06551 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_2: 06552 pdev->dmax_cfg.target_reflectance_for_dmax_calc[2] = 06553 (uint16_t)tuning_parm_value; 06554 break; 06555 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_3: 06556 pdev->dmax_cfg.target_reflectance_for_dmax_calc[3] = 06557 (uint16_t)tuning_parm_value; 06558 break; 06559 case VL53L1_TUNINGPARM_DMAX_CFG_REFLECTANCE_ARRAY_4: 06560 pdev->dmax_cfg.target_reflectance_for_dmax_calc[4] = 06561 (uint16_t)tuning_parm_value; 06562 break; 06563 case VL53L1_TUNINGPARM_VHV_LOOPBOUND: 06564 pdev->stat_nvm.vhv_config__timeout_macrop_loop_bound = 06565 (uint8_t)tuning_parm_value; 06566 break; 06567 case VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE: 06568 pdev->refspadchar.device_test_mode = 06569 (uint8_t)tuning_parm_value; 06570 break; 06571 case VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD: 06572 pdev->refspadchar.VL53L1_p_009 = 06573 (uint8_t)tuning_parm_value; 06574 break; 06575 case VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US: 06576 pdev->refspadchar.timeout_us = 06577 (uint32_t)tuning_parm_value; 06578 break; 06579 case VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS: 06580 pdev->refspadchar.target_count_rate_mcps = 06581 (uint16_t)tuning_parm_value; 06582 break; 06583 case VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS: 06584 pdev->refspadchar.min_count_rate_limit_mcps = 06585 (uint16_t)tuning_parm_value; 06586 break; 06587 case VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS: 06588 pdev->refspadchar.max_count_rate_limit_mcps = 06589 (uint16_t)tuning_parm_value; 06590 break; 06591 case VL53L1_TUNINGPARM_XTALK_EXTRACT_NUM_OF_SAMPLES: 06592 pXC->num_of_samples = 06593 (uint8_t)tuning_parm_value; 06594 break; 06595 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MIN_FILTER_THRESH_MM: 06596 pXC->algo__crosstalk_extract_min_valid_range_mm = 06597 (int16_t)tuning_parm_value; 06598 break; 06599 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_FILTER_THRESH_MM: 06600 pXC->algo__crosstalk_extract_max_valid_range_mm = 06601 (int16_t)tuning_parm_value; 06602 break; 06603 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_RATE_MCPS: 06604 pXC->dss_config__target_total_rate_mcps = 06605 (uint16_t)tuning_parm_value; 06606 break; 06607 case VL53L1_TUNINGPARM_XTALK_EXTRACT_PHASECAL_TIMEOUT_US: 06608 pXC->phasecal_config_timeout_us = 06609 (uint32_t)tuning_parm_value; 06610 break; 06611 case VL53L1_TUNINGPARM_XTALK_EXTRACT_MAX_VALID_RATE_KCPS: 06612 pXC->algo__crosstalk_extract_max_valid_rate_kcps = 06613 (uint16_t)tuning_parm_value; 06614 break; 06615 case VL53L1_TUNINGPARM_XTALK_EXTRACT_SIGMA_THRESHOLD_MM: 06616 pXC->algo__crosstalk_extract_max_sigma_mm = 06617 (uint16_t)tuning_parm_value; 06618 break; 06619 case VL53L1_TUNINGPARM_XTALK_EXTRACT_DSS_TIMEOUT_US: 06620 pXC->mm_config_timeout_us = 06621 (uint32_t)tuning_parm_value; 06622 break; 06623 case VL53L1_TUNINGPARM_XTALK_EXTRACT_BIN_TIMEOUT_US: 06624 pXC->range_config_timeout_us = 06625 (uint32_t)tuning_parm_value; 06626 break; 06627 case VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS: 06628 pdev->offsetcal_cfg.dss_config__target_total_rate_mcps = 06629 (uint16_t)tuning_parm_value; 06630 break; 06631 case VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US: 06632 pdev->offsetcal_cfg.phasecal_config_timeout_us = 06633 (uint32_t)tuning_parm_value; 06634 break; 06635 case VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US: 06636 pdev->offsetcal_cfg.mm_config_timeout_us = 06637 (uint32_t)tuning_parm_value; 06638 break; 06639 case VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US: 06640 pdev->offsetcal_cfg.range_config_timeout_us = 06641 (uint32_t)tuning_parm_value; 06642 break; 06643 case VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES: 06644 pdev->offsetcal_cfg.pre_num_of_samples = 06645 (uint8_t)tuning_parm_value; 06646 break; 06647 case VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES: 06648 pdev->offsetcal_cfg.mm1_num_of_samples = 06649 (uint8_t)tuning_parm_value; 06650 break; 06651 case VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES: 06652 pdev->offsetcal_cfg.mm2_num_of_samples = 06653 (uint8_t)tuning_parm_value; 06654 break; 06655 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_RATE_MCPS: 06656 pdev->zonecal_cfg.dss_config__target_total_rate_mcps = 06657 (uint16_t)tuning_parm_value; 06658 break; 06659 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_TIMEOUT_US: 06660 pdev->zonecal_cfg.phasecal_config_timeout_us = 06661 (uint32_t)tuning_parm_value; 06662 break; 06663 case VL53L1_TUNINGPARM_ZONE_CAL_DSS_TIMEOUT_US: 06664 pdev->zonecal_cfg.mm_config_timeout_us = 06665 (uint32_t)tuning_parm_value; 06666 break; 06667 case VL53L1_TUNINGPARM_ZONE_CAL_PHASECAL_NUM_SAMPLES: 06668 pdev->zonecal_cfg.phasecal_num_of_samples = 06669 (uint16_t)tuning_parm_value; 06670 break; 06671 case VL53L1_TUNINGPARM_ZONE_CAL_RANGE_TIMEOUT_US: 06672 pdev->zonecal_cfg.range_config_timeout_us = 06673 (uint32_t)tuning_parm_value; 06674 break; 06675 case VL53L1_TUNINGPARM_ZONE_CAL_ZONE_NUM_SAMPLES: 06676 pdev->zonecal_cfg.zone_num_of_samples = 06677 (uint16_t)tuning_parm_value; 06678 break; 06679 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD: 06680 pdev->ssc_cfg.VL53L1_p_009 = 06681 (uint8_t)tuning_parm_value; 06682 break; 06683 case VL53L1_TUNINGPARM_SPADMAP_VCSEL_START: 06684 pdev->ssc_cfg.vcsel_start = 06685 (uint8_t)tuning_parm_value; 06686 break; 06687 case VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS: 06688 pdev->ssc_cfg.rate_limit_mcps = 06689 (uint16_t)tuning_parm_value; 06690 break; 06691 case VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06692 pdev->tuning_parms.tp_dss_target_lite_mcps = 06693 (uint16_t)tuning_parm_value; 06694 break; 06695 case VL53L1_TUNINGPARM_RANGING_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06696 pdev->tuning_parms.tp_dss_target_histo_mcps = 06697 (uint16_t)tuning_parm_value; 06698 break; 06699 case VL53L1_TUNINGPARM_MZ_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06700 pdev->tuning_parms.tp_dss_target_histo_mz_mcps = 06701 (uint16_t)tuning_parm_value; 06702 break; 06703 case VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS: 06704 pdev->tuning_parms.tp_dss_target_timed_mcps = 06705 (uint16_t)tuning_parm_value; 06706 break; 06707 case VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US: 06708 pdev->tuning_parms.tp_phasecal_timeout_lite_us = 06709 (uint32_t)tuning_parm_value; 06710 break; 06711 case VL53L1_TUNINGPARM_RANGING_LONG_PHASECAL_CONFIG_TIMEOUT_US: 06712 pdev->tuning_parms.tp_phasecal_timeout_hist_long_us = 06713 (uint32_t)tuning_parm_value; 06714 break; 06715 case VL53L1_TUNINGPARM_RANGING_MED_PHASECAL_CONFIG_TIMEOUT_US: 06716 pdev->tuning_parms.tp_phasecal_timeout_hist_med_us = 06717 (uint32_t)tuning_parm_value; 06718 break; 06719 case VL53L1_TUNINGPARM_RANGING_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 06720 pdev->tuning_parms.tp_phasecal_timeout_hist_short_us = 06721 (uint32_t)tuning_parm_value; 06722 break; 06723 case VL53L1_TUNINGPARM_MZ_LONG_PHASECAL_CONFIG_TIMEOUT_US: 06724 pdev->tuning_parms.tp_phasecal_timeout_mz_long_us = 06725 (uint32_t)tuning_parm_value; 06726 break; 06727 case VL53L1_TUNINGPARM_MZ_MED_PHASECAL_CONFIG_TIMEOUT_US: 06728 pdev->tuning_parms.tp_phasecal_timeout_mz_med_us = 06729 (uint32_t)tuning_parm_value; 06730 break; 06731 case VL53L1_TUNINGPARM_MZ_SHORT_PHASECAL_CONFIG_TIMEOUT_US: 06732 pdev->tuning_parms.tp_phasecal_timeout_mz_short_us = 06733 (uint32_t)tuning_parm_value; 06734 break; 06735 case VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US: 06736 pdev->tuning_parms.tp_phasecal_timeout_timed_us = 06737 (uint32_t)tuning_parm_value; 06738 break; 06739 case VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US: 06740 pdev->tuning_parms.tp_mm_timeout_lite_us = 06741 (uint32_t)tuning_parm_value; 06742 break; 06743 case VL53L1_TUNINGPARM_RANGING_MM_CONFIG_TIMEOUT_US: 06744 pdev->tuning_parms.tp_mm_timeout_histo_us = 06745 (uint32_t)tuning_parm_value; 06746 break; 06747 case VL53L1_TUNINGPARM_MZ_MM_CONFIG_TIMEOUT_US: 06748 pdev->tuning_parms.tp_mm_timeout_mz_us = 06749 (uint32_t)tuning_parm_value; 06750 break; 06751 case VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US: 06752 pdev->tuning_parms.tp_mm_timeout_timed_us = 06753 (uint32_t)tuning_parm_value; 06754 break; 06755 case VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US: 06756 pdev->tuning_parms.tp_range_timeout_lite_us = 06757 (uint32_t)tuning_parm_value; 06758 break; 06759 case VL53L1_TUNINGPARM_RANGING_RANGE_CONFIG_TIMEOUT_US: 06760 pdev->tuning_parms.tp_range_timeout_histo_us = 06761 (uint32_t)tuning_parm_value; 06762 break; 06763 case VL53L1_TUNINGPARM_MZ_RANGE_CONFIG_TIMEOUT_US: 06764 pdev->tuning_parms.tp_range_timeout_mz_us = 06765 (uint32_t)tuning_parm_value; 06766 break; 06767 case VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US: 06768 pdev->tuning_parms.tp_range_timeout_timed_us = 06769 (uint32_t)tuning_parm_value; 06770 break; 06771 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_MARGIN: 06772 pdev->smudge_correct_config.smudge_margin = 06773 (uint16_t)tuning_parm_value; 06774 break; 06775 case VL53L1_TUNINGPARM_DYNXTALK_NOISE_MARGIN: 06776 pdev->smudge_correct_config.noise_margin = 06777 (uint32_t)tuning_parm_value; 06778 break; 06779 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT: 06780 pdev->smudge_correct_config.user_xtalk_offset_limit = 06781 (uint32_t)tuning_parm_value; 06782 break; 06783 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_OFFSET_LIMIT_HI: 06784 pdev->smudge_correct_config.user_xtalk_offset_limit_hi = 06785 (uint8_t)tuning_parm_value; 06786 break; 06787 case VL53L1_TUNINGPARM_DYNXTALK_SAMPLE_LIMIT: 06788 pdev->smudge_correct_config.sample_limit = 06789 (uint32_t)tuning_parm_value; 06790 break; 06791 case VL53L1_TUNINGPARM_DYNXTALK_SINGLE_XTALK_DELTA: 06792 pdev->smudge_correct_config.single_xtalk_delta = 06793 (uint32_t)tuning_parm_value; 06794 break; 06795 case VL53L1_TUNINGPARM_DYNXTALK_AVERAGED_XTALK_DELTA: 06796 pdev->smudge_correct_config.averaged_xtalk_delta = 06797 (uint32_t)tuning_parm_value; 06798 break; 06799 case VL53L1_TUNINGPARM_DYNXTALK_CLIP_LIMIT: 06800 pdev->smudge_correct_config.smudge_corr_clip_limit = 06801 (uint32_t)tuning_parm_value; 06802 break; 06803 case VL53L1_TUNINGPARM_DYNXTALK_SCALER_CALC_METHOD: 06804 pdev->smudge_correct_config.scaler_calc_method = 06805 (uint8_t)tuning_parm_value; 06806 break; 06807 case VL53L1_TUNINGPARM_DYNXTALK_XGRADIENT_SCALER: 06808 pdev->smudge_correct_config.x_gradient_scaler = 06809 (int16_t)tuning_parm_value; 06810 break; 06811 case VL53L1_TUNINGPARM_DYNXTALK_YGRADIENT_SCALER: 06812 pdev->smudge_correct_config.y_gradient_scaler = 06813 (int16_t)tuning_parm_value; 06814 break; 06815 case VL53L1_TUNINGPARM_DYNXTALK_USER_SCALER_SET: 06816 pdev->smudge_correct_config.user_scaler_set = 06817 (uint8_t)tuning_parm_value; 06818 break; 06819 06820 case VL53L1_TUNINGPARM_DYNXTALK_SMUDGE_COR_SINGLE_APPLY: 06821 pdev->smudge_correct_config.smudge_corr_single_apply = 06822 (uint8_t)tuning_parm_value; 06823 break; 06824 case VL53L1_TUNINGPARM_DYNXTALK_XTALK_AMB_THRESHOLD: 06825 pdev->smudge_correct_config.smudge_corr_ambient_threshold = 06826 (uint32_t)tuning_parm_value; 06827 break; 06828 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_AMB_THRESHOLD_KCPS: 06829 pdev->smudge_correct_config.nodetect_ambient_threshold = 06830 (uint32_t)tuning_parm_value; 06831 break; 06832 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_SAMPLE_LIMIT: 06833 pdev->smudge_correct_config.nodetect_sample_limit = 06834 (uint32_t)tuning_parm_value; 06835 break; 06836 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_XTALK_OFFSET_KCPS: 06837 pdev->smudge_correct_config.nodetect_xtalk_offset = 06838 (uint32_t)tuning_parm_value; 06839 break; 06840 case VL53L1_TUNINGPARM_DYNXTALK_NODETECT_MIN_RANGE_MM: 06841 pdev->smudge_correct_config.nodetect_min_range_mm = 06842 (uint16_t)tuning_parm_value; 06843 break; 06844 case VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND: 06845 pdev->low_power_auto_data.vhv_loop_bound = 06846 (uint8_t)tuning_parm_value; 06847 break; 06848 case VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US: 06849 pdev->tuning_parms.tp_mm_timeout_lpa_us = 06850 (uint32_t)tuning_parm_value; 06851 break; 06852 case VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US: 06853 pdev->tuning_parms.tp_range_timeout_lpa_us = 06854 (uint32_t)tuning_parm_value; 06855 break; 06856 case VL53L1_TUNINGPARM_VERY_SHORT_DSS_RATE_MCPS: 06857 pdev->tuning_parms.tp_dss_target_very_short_mcps = 06858 (uint16_t)tuning_parm_value; 06859 break; 06860 case VL53L1_TUNINGPARM_PHASECAL_PATCH_POWER: 06861 pdev->tuning_parms.tp_phasecal_patch_power = 06862 (uint16_t) tuning_parm_value; 06863 break; 06864 case VL53L1_TUNINGPARM_HIST_MERGE: 06865 pdev->tuning_parms.tp_hist_merge = 06866 (uint16_t) tuning_parm_value; 06867 break; 06868 case VL53L1_TUNINGPARM_RESET_MERGE_THRESHOLD: 06869 pdev->tuning_parms.tp_reset_merge_threshold = 06870 (uint16_t) tuning_parm_value; 06871 break; 06872 case VL53L1_TUNINGPARM_HIST_MERGE_MAX_SIZE: 06873 pdev->tuning_parms.tp_hist_merge_max_size = 06874 (uint16_t) tuning_parm_value; 06875 break; 06876 case VL53L1_TUNINGPARM_DYNXTALK_MAX_SMUDGE_FACTOR: 06877 pdev->smudge_correct_config.max_smudge_factor = 06878 (uint32_t)tuning_parm_value; 06879 break; 06880 06881 case VL53L1_TUNINGPARM_UWR_ENABLE: 06882 pdev->tuning_parms.tp_uwr_enable = 06883 (uint8_t)tuning_parm_value; 06884 break; 06885 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MIN: 06886 pdev->tuning_parms.tp_uwr_med_z_1_min = 06887 (int16_t)tuning_parm_value; 06888 break; 06889 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_1_MAX: 06890 pdev->tuning_parms.tp_uwr_med_z_1_max = 06891 (int16_t)tuning_parm_value; 06892 break; 06893 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MIN: 06894 pdev->tuning_parms.tp_uwr_med_z_2_min = 06895 (int16_t)tuning_parm_value; 06896 break; 06897 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_2_MAX: 06898 pdev->tuning_parms.tp_uwr_med_z_2_max = 06899 (int16_t)tuning_parm_value; 06900 break; 06901 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MIN: 06902 pdev->tuning_parms.tp_uwr_med_z_3_min = 06903 (int16_t)tuning_parm_value; 06904 break; 06905 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_3_MAX: 06906 pdev->tuning_parms.tp_uwr_med_z_3_max = 06907 (int16_t)tuning_parm_value; 06908 break; 06909 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MIN: 06910 pdev->tuning_parms.tp_uwr_med_z_4_min = 06911 (int16_t)tuning_parm_value; 06912 break; 06913 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_4_MAX: 06914 pdev->tuning_parms.tp_uwr_med_z_4_max = 06915 (int16_t)tuning_parm_value; 06916 break; 06917 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MIN: 06918 pdev->tuning_parms.tp_uwr_med_z_5_min = 06919 (int16_t)tuning_parm_value; 06920 break; 06921 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_5_MAX: 06922 pdev->tuning_parms.tp_uwr_med_z_5_max = 06923 (int16_t)tuning_parm_value; 06924 break; 06925 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MIN: 06926 pdev->tuning_parms.tp_uwr_med_z_6_min = 06927 (int16_t)tuning_parm_value; 06928 break; 06929 case VL53L1_TUNINGPARM_UWR_MEDIUM_ZONE_6_MAX: 06930 pdev->tuning_parms.tp_uwr_med_z_6_max = 06931 (int16_t)tuning_parm_value; 06932 break; 06933 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEA: 06934 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangea = 06935 (int16_t)tuning_parm_value; 06936 break; 06937 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_1_RANGEB: 06938 pdev->tuning_parms.tp_uwr_med_corr_z_1_rangeb = 06939 (int16_t)tuning_parm_value; 06940 break; 06941 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEA: 06942 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangea = 06943 (int16_t)tuning_parm_value; 06944 break; 06945 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_2_RANGEB: 06946 pdev->tuning_parms.tp_uwr_med_corr_z_2_rangeb = 06947 (int16_t)tuning_parm_value; 06948 break; 06949 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEA: 06950 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangea = 06951 (int16_t)tuning_parm_value; 06952 break; 06953 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_3_RANGEB: 06954 pdev->tuning_parms.tp_uwr_med_corr_z_3_rangeb = 06955 (int16_t)tuning_parm_value; 06956 break; 06957 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEA: 06958 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangea = 06959 (int16_t)tuning_parm_value; 06960 break; 06961 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_4_RANGEB: 06962 pdev->tuning_parms.tp_uwr_med_corr_z_4_rangeb = 06963 (int16_t)tuning_parm_value; 06964 break; 06965 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEA: 06966 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangea = 06967 (int16_t)tuning_parm_value; 06968 break; 06969 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_5_RANGEB: 06970 pdev->tuning_parms.tp_uwr_med_corr_z_5_rangeb = 06971 (int16_t)tuning_parm_value; 06972 break; 06973 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEA: 06974 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangea = 06975 (int16_t)tuning_parm_value; 06976 break; 06977 case VL53L1_TUNINGPARM_UWR_MEDIUM_CORRECTION_ZONE_6_RANGEB: 06978 pdev->tuning_parms.tp_uwr_med_corr_z_6_rangeb = 06979 (int16_t)tuning_parm_value; 06980 break; 06981 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MIN: 06982 pdev->tuning_parms.tp_uwr_lng_z_1_min = 06983 (int16_t)tuning_parm_value; 06984 break; 06985 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_1_MAX: 06986 pdev->tuning_parms.tp_uwr_lng_z_1_max = 06987 (int16_t)tuning_parm_value; 06988 break; 06989 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MIN: 06990 pdev->tuning_parms.tp_uwr_lng_z_2_min = 06991 (int16_t)tuning_parm_value; 06992 break; 06993 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_2_MAX: 06994 pdev->tuning_parms.tp_uwr_lng_z_2_max = 06995 (int16_t)tuning_parm_value; 06996 break; 06997 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MIN: 06998 pdev->tuning_parms.tp_uwr_lng_z_3_min = 06999 (int16_t)tuning_parm_value; 07000 break; 07001 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_3_MAX: 07002 pdev->tuning_parms.tp_uwr_lng_z_3_max = 07003 (int16_t)tuning_parm_value; 07004 break; 07005 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MIN: 07006 pdev->tuning_parms.tp_uwr_lng_z_4_min = 07007 (int16_t)tuning_parm_value; 07008 break; 07009 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_4_MAX: 07010 pdev->tuning_parms.tp_uwr_lng_z_4_max = 07011 (int16_t)tuning_parm_value; 07012 break; 07013 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MIN: 07014 pdev->tuning_parms.tp_uwr_lng_z_5_min = 07015 (int16_t)tuning_parm_value; 07016 break; 07017 case VL53L1_TUNINGPARM_UWR_LONG_ZONE_5_MAX: 07018 pdev->tuning_parms.tp_uwr_lng_z_5_max = 07019 (int16_t)tuning_parm_value; 07020 break; 07021 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEA: 07022 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangea = 07023 (int16_t)tuning_parm_value; 07024 break; 07025 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_1_RANGEB: 07026 pdev->tuning_parms.tp_uwr_lng_corr_z_1_rangeb = 07027 (int16_t)tuning_parm_value; 07028 break; 07029 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEA: 07030 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangea = 07031 (int16_t)tuning_parm_value; 07032 break; 07033 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_2_RANGEB: 07034 pdev->tuning_parms.tp_uwr_lng_corr_z_2_rangeb = 07035 (int16_t)tuning_parm_value; 07036 break; 07037 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEA: 07038 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangea = 07039 (int16_t)tuning_parm_value; 07040 break; 07041 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_3_RANGEB: 07042 pdev->tuning_parms.tp_uwr_lng_corr_z_3_rangeb = 07043 (int16_t)tuning_parm_value; 07044 break; 07045 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEA: 07046 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangea = 07047 (int16_t)tuning_parm_value; 07048 break; 07049 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_4_RANGEB: 07050 pdev->tuning_parms.tp_uwr_lng_corr_z_4_rangeb = 07051 (int16_t)tuning_parm_value; 07052 break; 07053 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEA: 07054 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangea = 07055 (int16_t)tuning_parm_value; 07056 break; 07057 case VL53L1_TUNINGPARM_UWR_LONG_CORRECTION_ZONE_5_RANGEB: 07058 pdev->tuning_parms.tp_uwr_lng_corr_z_5_rangeb = 07059 (int16_t)tuning_parm_value; 07060 break; 07061 07062 07063 default: 07064 status = VL53L1_ERROR_INVALID_PARAMS; 07065 break; 07066 07067 } 07068 07069 LOG_FUNCTION_END(status); 07070 07071 return status; 07072 } 07073 07074 07075 07076 07077 07078 VL53L1_Error VL53L1_dynamic_xtalk_correction_enable( 07079 VL53L1_DEV Dev 07080 ) 07081 { 07082 07083 07084 07085 VL53L1_Error status = VL53L1_ERROR_NONE; 07086 07087 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07088 07089 LOG_FUNCTION_START(""); 07090 07091 pdev->smudge_correct_config.smudge_corr_enabled = 1; 07092 07093 LOG_FUNCTION_END(status); 07094 07095 return status; 07096 } 07097 07098 VL53L1_Error VL53L1_dynamic_xtalk_correction_disable( 07099 VL53L1_DEV Dev 07100 ) 07101 { 07102 07103 07104 07105 VL53L1_Error status = VL53L1_ERROR_NONE; 07106 07107 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07108 07109 LOG_FUNCTION_START(""); 07110 07111 pdev->smudge_correct_config.smudge_corr_enabled = 0; 07112 07113 LOG_FUNCTION_END(status); 07114 07115 return status; 07116 } 07117 07118 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_enable( 07119 VL53L1_DEV Dev 07120 ) 07121 { 07122 07123 07124 07125 VL53L1_Error status = VL53L1_ERROR_NONE; 07126 07127 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07128 07129 LOG_FUNCTION_START(""); 07130 07131 pdev->smudge_correct_config.smudge_corr_apply_enabled = 1; 07132 07133 LOG_FUNCTION_END(status); 07134 07135 return status; 07136 } 07137 07138 VL53L1_Error VL53L1_dynamic_xtalk_correction_apply_disable( 07139 VL53L1_DEV Dev 07140 ) 07141 { 07142 07143 07144 07145 VL53L1_Error status = VL53L1_ERROR_NONE; 07146 07147 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07148 07149 LOG_FUNCTION_START(""); 07150 07151 pdev->smudge_correct_config.smudge_corr_apply_enabled = 0; 07152 07153 LOG_FUNCTION_END(status); 07154 07155 return status; 07156 } 07157 07158 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_enable( 07159 VL53L1_DEV Dev 07160 ) 07161 { 07162 07163 07164 07165 VL53L1_Error status = VL53L1_ERROR_NONE; 07166 07167 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07168 07169 LOG_FUNCTION_START(""); 07170 07171 pdev->smudge_correct_config.smudge_corr_single_apply = 1; 07172 07173 LOG_FUNCTION_END(status); 07174 07175 return status; 07176 } 07177 07178 VL53L1_Error VL53L1_dynamic_xtalk_correction_single_apply_disable( 07179 VL53L1_DEV Dev 07180 ) 07181 { 07182 07183 07184 07185 VL53L1_Error status = VL53L1_ERROR_NONE; 07186 07187 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07188 07189 LOG_FUNCTION_START(""); 07190 07191 pdev->smudge_correct_config.smudge_corr_single_apply = 0; 07192 07193 LOG_FUNCTION_END(status); 07194 07195 return status; 07196 } 07197 07198 07199 VL53L1_Error VL53L1_dynamic_xtalk_correction_set_scalers( 07200 VL53L1_DEV Dev, 07201 int16_t x_scaler_in, 07202 int16_t y_scaler_in, 07203 uint8_t user_scaler_set_in 07204 ) 07205 { 07206 07207 07208 07209 VL53L1_Error status = VL53L1_ERROR_NONE; 07210 07211 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07212 07213 LOG_FUNCTION_START(""); 07214 07215 pdev->smudge_correct_config.x_gradient_scaler = x_scaler_in; 07216 pdev->smudge_correct_config.y_gradient_scaler = y_scaler_in; 07217 pdev->smudge_correct_config.user_scaler_set = user_scaler_set_in; 07218 07219 LOG_FUNCTION_END(status); 07220 07221 return status; 07222 } 07223 07224 07225 07226 07227 07228 07229 VL53L1_Error VL53L1_get_current_xtalk_settings( 07230 VL53L1_DEV Dev, 07231 VL53L1_xtalk_calibration_results_t *pxtalk 07232 ) 07233 { 07234 07235 07236 VL53L1_Error status = VL53L1_ERROR_NONE; 07237 uint8_t i; 07238 07239 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07240 07241 LOG_FUNCTION_START(""); 07242 07243 pxtalk->algo__crosstalk_compensation_plane_offset_kcps = 07244 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps; 07245 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps = 07246 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps; 07247 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps = 07248 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps; 07249 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++) 07250 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i] = 07251 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i]; 07252 07253 LOG_FUNCTION_END(status); 07254 07255 return status; 07256 07257 } 07258 07259 07260 07261 07262 07263 VL53L1_Error VL53L1_set_current_xtalk_settings( 07264 VL53L1_DEV Dev, 07265 VL53L1_xtalk_calibration_results_t *pxtalk 07266 ) 07267 { 07268 07269 07270 VL53L1_Error status = VL53L1_ERROR_NONE; 07271 uint8_t i; 07272 07273 VL53L1_LLDriverData_t *pdev = VL53L1DevStructGetLLDriverHandle(Dev); 07274 07275 LOG_FUNCTION_START(""); 07276 07277 pdev->xtalk_cfg.algo__crosstalk_compensation_plane_offset_kcps = 07278 pxtalk->algo__crosstalk_compensation_plane_offset_kcps; 07279 pdev->xtalk_cfg.algo__crosstalk_compensation_x_plane_gradient_kcps = 07280 pxtalk->algo__crosstalk_compensation_x_plane_gradient_kcps; 07281 pdev->xtalk_cfg.algo__crosstalk_compensation_y_plane_gradient_kcps = 07282 pxtalk->algo__crosstalk_compensation_y_plane_gradient_kcps; 07283 for (i = 0; i < VL53L1_BIN_REC_SIZE; i++) 07284 pdev->xtalk_cal.algo__xtalk_cpo_HistoMerge_kcps[i] = 07285 pxtalk->algo__xtalk_cpo_HistoMerge_kcps[i]; 07286 07287 LOG_FUNCTION_END(status); 07288 07289 return status; 07290 07291 } 07292 07293 07294
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