ST Expansion SW Team / VL53L1

Fork, renaming of VL53L1CB-2

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_53L1CB

inc/vl53l1_register_map.h@13:3f1b341901dd, 2021-06-11 (annotated)

Committer:
Charles MacNeill
Date:
Fri Jun 11 17:08:27 2021 +0100
Revision:
13:3f1b341901dd
Parent:
7:1add29d51e72 
changing case of vl53l1cb.* so it works in linux

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
Charles MacNeill 7:1add29d51e72 2 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
Charles MacNeill 7:1add29d51e72 3 /******************************************************************************
charlesmn 0:3ac96e360672 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 5
Charles MacNeill 7:1add29d51e72 6 This file is part of VL53L1 and is dual licensed,
Charles MacNeill 7:1add29d51e72 7 either GPL-2.0+
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 7:1add29d51e72 9 ******************************************************************************
Charles MacNeill 7:1add29d51e72 10 */
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14
charlesmn 0:3ac96e360672 15 #ifndef _VL53L1_REGISTER_MAP_H_
charlesmn 0:3ac96e360672 16 #define _VL53L1_REGISTER_MAP_H_
charlesmn 0:3ac96e360672 17
charlesmn 0:3ac96e360672 18
charlesmn 0:3ac96e360672 19
charlesmn 0:3ac96e360672 20 #define VL53L1_SOFT_RESET 0x0000
charlesmn 0:3ac96e360672 21
charlesmn 0:3ac96e360672 22 #define VL53L1_I2C_SLAVE__DEVICE_ADDRESS 0x0001
charlesmn 0:3ac96e360672 23
charlesmn 0:3ac96e360672 24 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VDDPIX 0x0002
charlesmn 0:3ac96e360672 25
charlesmn 0:3ac96e360672 26 #define VL53L1_ANA_CONFIG__VHV_REF_SEL_VQUENCH 0x0003
charlesmn 0:3ac96e360672 27
charlesmn 0:3ac96e360672 28 #define VL53L1_ANA_CONFIG__REG_AVDD1V2_SEL 0x0004
charlesmn 0:3ac96e360672 29
charlesmn 0:3ac96e360672 30 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM 0x0005
charlesmn 0:3ac96e360672 31
charlesmn 0:3ac96e360672 32 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY 0x0006
charlesmn 0:3ac96e360672 33
charlesmn 0:3ac96e360672 34 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_HI 0x0006
charlesmn 0:3ac96e360672 35
charlesmn 0:3ac96e360672 36 #define VL53L1_OSC_MEASURED__FAST_OSC__FREQUENCY_LO 0x0007
charlesmn 0:3ac96e360672 37
charlesmn 0:3ac96e360672 38 #define VL53L1_VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x0008
charlesmn 0:3ac96e360672 39
charlesmn 0:3ac96e360672 40 #define VL53L1_VHV_CONFIG__COUNT_THRESH 0x0009
charlesmn 0:3ac96e360672 41
charlesmn 0:3ac96e360672 42 #define VL53L1_VHV_CONFIG__OFFSET 0x000A
charlesmn 0:3ac96e360672 43
charlesmn 0:3ac96e360672 44 #define VL53L1_VHV_CONFIG__INIT 0x000B
charlesmn 0:3ac96e360672 45
charlesmn 0:3ac96e360672 46 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_0 0x000D
charlesmn 0:3ac96e360672 47
charlesmn 0:3ac96e360672 48 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_1 0x000E
charlesmn 0:3ac96e360672 49
charlesmn 0:3ac96e360672 50 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_2 0x000F
charlesmn 0:3ac96e360672 51
charlesmn 0:3ac96e360672 52 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_3 0x0010
charlesmn 0:3ac96e360672 53
charlesmn 0:3ac96e360672 54 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_4 0x0011
charlesmn 0:3ac96e360672 55
charlesmn 0:3ac96e360672 56 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_REF_5 0x0012
charlesmn 0:3ac96e360672 57
charlesmn 0:3ac96e360672 58 #define VL53L1_GLOBAL_CONFIG__REF_EN_START_SELECT 0x0013
charlesmn 0:3ac96e360672 59
charlesmn 0:3ac96e360672 60 #define VL53L1_REF_SPAD_MAN__NUM_REQUESTED_REF_SPADS 0x0014
charlesmn 0:3ac96e360672 61
charlesmn 0:3ac96e360672 62 #define VL53L1_REF_SPAD_MAN__REF_LOCATION 0x0015
charlesmn 0:3ac96e360672 63
charlesmn 0:3ac96e360672 64 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x0016
charlesmn 0:3ac96e360672 65
charlesmn 0:3ac96e360672 66 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_HI 0x0016
charlesmn 0:3ac96e360672 67
charlesmn 0:3ac96e360672 68 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS_LO 0x0017
charlesmn 0:3ac96e360672 69
charlesmn 0:3ac96e360672 70 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x0018
charlesmn 0:3ac96e360672 71
charlesmn 0:3ac96e360672 72 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_HI 0x0018
charlesmn 0:3ac96e360672 73
charlesmn 0:3ac96e360672 74 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS_LO 0x0019
charlesmn 0:3ac96e360672 75
charlesmn 0:3ac96e360672 76 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x001A
charlesmn 0:3ac96e360672 77
charlesmn 0:3ac96e360672 78 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_HI 0x001A
charlesmn 0:3ac96e360672 79
charlesmn 0:3ac96e360672 80 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS_LO 0x001B
charlesmn 0:3ac96e360672 81
charlesmn 0:3ac96e360672 82 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS 0x001C
charlesmn 0:3ac96e360672 83
charlesmn 0:3ac96e360672 84 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_HI 0x001C
charlesmn 0:3ac96e360672 85
charlesmn 0:3ac96e360672 86 #define VL53L1_REF_SPAD_CHAR__TOTAL_RATE_TARGET_MCPS_LO 0x001D
charlesmn 0:3ac96e360672 87
charlesmn 0:3ac96e360672 88 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x001E
charlesmn 0:3ac96e360672 89
charlesmn 0:3ac96e360672 90 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_HI 0x001E
charlesmn 0:3ac96e360672 91
charlesmn 0:3ac96e360672 92 #define VL53L1_ALGO__PART_TO_PART_RANGE_OFFSET_MM_LO 0x001F
charlesmn 0:3ac96e360672 93
charlesmn 0:3ac96e360672 94 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM 0x0020
charlesmn 0:3ac96e360672 95
charlesmn 0:3ac96e360672 96 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_HI 0x0020
charlesmn 0:3ac96e360672 97
charlesmn 0:3ac96e360672 98 #define VL53L1_MM_CONFIG__INNER_OFFSET_MM_LO 0x0021
charlesmn 0:3ac96e360672 99
charlesmn 0:3ac96e360672 100 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM 0x0022
charlesmn 0:3ac96e360672 101
charlesmn 0:3ac96e360672 102 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_HI 0x0022
charlesmn 0:3ac96e360672 103
charlesmn 0:3ac96e360672 104 #define VL53L1_MM_CONFIG__OUTER_OFFSET_MM_LO 0x0023
charlesmn 0:3ac96e360672 105
charlesmn 0:3ac96e360672 106 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS 0x0024
charlesmn 0:3ac96e360672 107
charlesmn 0:3ac96e360672 108 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_HI 0x0024
charlesmn 0:3ac96e360672 109
charlesmn 0:3ac96e360672 110 #define VL53L1_DSS_CONFIG__TARGET_TOTAL_RATE_MCPS_LO 0x0025
charlesmn 0:3ac96e360672 111
charlesmn 0:3ac96e360672 112 #define VL53L1_DEBUG__CTRL 0x0026
charlesmn 0:3ac96e360672 113
charlesmn 0:3ac96e360672 114 #define VL53L1_TEST_MODE__CTRL 0x0027
charlesmn 0:3ac96e360672 115
charlesmn 0:3ac96e360672 116 #define VL53L1_CLK_GATING__CTRL 0x0028
charlesmn 0:3ac96e360672 117
charlesmn 0:3ac96e360672 118 #define VL53L1_NVM_BIST__CTRL 0x0029
charlesmn 0:3ac96e360672 119
charlesmn 0:3ac96e360672 120 #define VL53L1_NVM_BIST__NUM_NVM_WORDS 0x002A
charlesmn 0:3ac96e360672 121
charlesmn 0:3ac96e360672 122 #define VL53L1_NVM_BIST__START_ADDRESS 0x002B
charlesmn 0:3ac96e360672 123
charlesmn 0:3ac96e360672 124 #define VL53L1_HOST_IF__STATUS 0x002C
charlesmn 0:3ac96e360672 125
charlesmn 0:3ac96e360672 126 #define VL53L1_PAD_I2C_HV__CONFIG 0x002D
charlesmn 0:3ac96e360672 127
charlesmn 0:3ac96e360672 128 #define VL53L1_PAD_I2C_HV__EXTSUP_CONFIG 0x002E
charlesmn 0:3ac96e360672 129
charlesmn 0:3ac96e360672 130 #define VL53L1_GPIO_HV_PAD__CTRL 0x002F
charlesmn 0:3ac96e360672 131
charlesmn 0:3ac96e360672 132 #define VL53L1_GPIO_HV_MUX__CTRL 0x0030
charlesmn 0:3ac96e360672 133
charlesmn 0:3ac96e360672 134 #define VL53L1_GPIO__TIO_HV_STATUS 0x0031
charlesmn 0:3ac96e360672 135
charlesmn 0:3ac96e360672 136 #define VL53L1_GPIO__FIO_HV_STATUS 0x0032
charlesmn 0:3ac96e360672 137
charlesmn 0:3ac96e360672 138 #define VL53L1_ANA_CONFIG__SPAD_SEL_PSWIDTH 0x0033
charlesmn 0:3ac96e360672 139
charlesmn 0:3ac96e360672 140 #define VL53L1_ANA_CONFIG__VCSEL_PULSE_WIDTH_OFFSET 0x0034
charlesmn 0:3ac96e360672 141
charlesmn 0:3ac96e360672 142 #define VL53L1_ANA_CONFIG__FAST_OSC__CONFIG_CTRL 0x0035
charlesmn 0:3ac96e360672 143
charlesmn 0:3ac96e360672 144 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_PULSE_WIDTH_NS 0x0036
charlesmn 0:3ac96e360672 145
charlesmn 0:3ac96e360672 146 #define VL53L1_SIGMA_ESTIMATOR__EFFECTIVE_AMBIENT_WIDTH_NS 0x0037
charlesmn 0:3ac96e360672 147
charlesmn 0:3ac96e360672 148 #define VL53L1_SIGMA_ESTIMATOR__SIGMA_REF_MM 0x0038
charlesmn 0:3ac96e360672 149
charlesmn 0:3ac96e360672 150 #define VL53L1_ALGO__CROSSTALK_COMPENSATION_VALID_HEIGHT_MM 0x0039
charlesmn 0:3ac96e360672 151
charlesmn 0:3ac96e360672 152 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_0 0x003A
charlesmn 0:3ac96e360672 153
charlesmn 0:3ac96e360672 154 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_1 0x003B
charlesmn 0:3ac96e360672 155
charlesmn 0:3ac96e360672 156 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS 0x003C
charlesmn 0:3ac96e360672 157
charlesmn 0:3ac96e360672 158 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_HI 0x003C
charlesmn 0:3ac96e360672 159
charlesmn 0:3ac96e360672 160 #define VL53L1_ALGO__RANGE_IGNORE_THRESHOLD_MCPS_LO 0x003D
charlesmn 0:3ac96e360672 161
charlesmn 0:3ac96e360672 162 #define VL53L1_ALGO__RANGE_IGNORE_VALID_HEIGHT_MM 0x003E
charlesmn 0:3ac96e360672 163
charlesmn 0:3ac96e360672 164 #define VL53L1_ALGO__RANGE_MIN_CLIP 0x003F
charlesmn 0:3ac96e360672 165
charlesmn 0:3ac96e360672 166 #define VL53L1_ALGO__CONSISTENCY_CHECK__TOLERANCE 0x0040
charlesmn 0:3ac96e360672 167
charlesmn 0:3ac96e360672 168 #define VL53L1_SPARE_HOST_CONFIG__STATIC_CONFIG_SPARE_2 0x0041
charlesmn 0:3ac96e360672 169
charlesmn 0:3ac96e360672 170 #define VL53L1_SD_CONFIG__RESET_STAGES_MSB 0x0042
charlesmn 0:3ac96e360672 171
charlesmn 0:3ac96e360672 172 #define VL53L1_SD_CONFIG__RESET_STAGES_LSB 0x0043
charlesmn 0:3ac96e360672 173
charlesmn 0:3ac96e360672 174 #define VL53L1_GPH_CONFIG__STREAM_COUNT_UPDATE_VALUE 0x0044
charlesmn 0:3ac96e360672 175
charlesmn 0:3ac96e360672 176 #define VL53L1_GLOBAL_CONFIG__STREAM_DIVIDER 0x0045
charlesmn 0:3ac96e360672 177
charlesmn 0:3ac96e360672 178 #define VL53L1_SYSTEM__INTERRUPT_CONFIG_GPIO 0x0046
charlesmn 0:3ac96e360672 179
charlesmn 0:3ac96e360672 180 #define VL53L1_CAL_CONFIG__VCSEL_START 0x0047
charlesmn 0:3ac96e360672 181
charlesmn 0:3ac96e360672 182 #define VL53L1_CAL_CONFIG__REPEAT_RATE 0x0048
charlesmn 0:3ac96e360672 183
charlesmn 0:3ac96e360672 184 #define VL53L1_CAL_CONFIG__REPEAT_RATE_HI 0x0048
charlesmn 0:3ac96e360672 185
charlesmn 0:3ac96e360672 186 #define VL53L1_CAL_CONFIG__REPEAT_RATE_LO 0x0049
charlesmn 0:3ac96e360672 187
charlesmn 0:3ac96e360672 188 #define VL53L1_GLOBAL_CONFIG__VCSEL_WIDTH 0x004A
charlesmn 0:3ac96e360672 189
charlesmn 0:3ac96e360672 190 #define VL53L1_PHASECAL_CONFIG__TIMEOUT_MACROP 0x004B
charlesmn 0:3ac96e360672 191
charlesmn 0:3ac96e360672 192 #define VL53L1_PHASECAL_CONFIG__TARGET 0x004C
charlesmn 0:3ac96e360672 193
charlesmn 0:3ac96e360672 194 #define VL53L1_PHASECAL_CONFIG__OVERRIDE 0x004D
charlesmn 0:3ac96e360672 195
charlesmn 0:3ac96e360672 196 #define VL53L1_DSS_CONFIG__ROI_MODE_CONTROL 0x004F
charlesmn 0:3ac96e360672 197
charlesmn 0:3ac96e360672 198 #define VL53L1_SYSTEM__THRESH_RATE_HIGH 0x0050
charlesmn 0:3ac96e360672 199
charlesmn 0:3ac96e360672 200 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_HI 0x0050
charlesmn 0:3ac96e360672 201
charlesmn 0:3ac96e360672 202 #define VL53L1_SYSTEM__THRESH_RATE_HIGH_LO 0x0051
charlesmn 0:3ac96e360672 203
charlesmn 0:3ac96e360672 204 #define VL53L1_SYSTEM__THRESH_RATE_LOW 0x0052
charlesmn 0:3ac96e360672 205
charlesmn 0:3ac96e360672 206 #define VL53L1_SYSTEM__THRESH_RATE_LOW_HI 0x0052
charlesmn 0:3ac96e360672 207
charlesmn 0:3ac96e360672 208 #define VL53L1_SYSTEM__THRESH_RATE_LOW_LO 0x0053
charlesmn 0:3ac96e360672 209
charlesmn 0:3ac96e360672 210 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0054
charlesmn 0:3ac96e360672 211
charlesmn 0:3ac96e360672 212 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0054
charlesmn 0:3ac96e360672 213
charlesmn 0:3ac96e360672 214 #define VL53L1_DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0055
charlesmn 0:3ac96e360672 215
charlesmn 0:3ac96e360672 216 #define VL53L1_DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0056
charlesmn 0:3ac96e360672 217
charlesmn 0:3ac96e360672 218 #define VL53L1_DSS_CONFIG__APERTURE_ATTENUATION 0x0057
charlesmn 0:3ac96e360672 219
charlesmn 0:3ac96e360672 220 #define VL53L1_DSS_CONFIG__MAX_SPADS_LIMIT 0x0058
charlesmn 0:3ac96e360672 221
charlesmn 0:3ac96e360672 222 #define VL53L1_DSS_CONFIG__MIN_SPADS_LIMIT 0x0059
charlesmn 0:3ac96e360672 223
charlesmn 0:3ac96e360672 224 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_HI 0x005A
charlesmn 0:3ac96e360672 225
charlesmn 0:3ac96e360672 226 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_A_LO 0x005B
charlesmn 0:3ac96e360672 227
charlesmn 0:3ac96e360672 228 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_HI 0x005C
charlesmn 0:3ac96e360672 229
charlesmn 0:3ac96e360672 230 #define VL53L1_MM_CONFIG__TIMEOUT_MACROP_B_LO 0x005D
charlesmn 0:3ac96e360672 231
charlesmn 0:3ac96e360672 232 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x005E
charlesmn 0:3ac96e360672 233
charlesmn 0:3ac96e360672 234 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x005F
charlesmn 0:3ac96e360672 235
charlesmn 0:3ac96e360672 236 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_A 0x0060
charlesmn 0:3ac96e360672 237
charlesmn 0:3ac96e360672 238 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0061
charlesmn 0:3ac96e360672 239
charlesmn 0:3ac96e360672 240 #define VL53L1_RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0062
charlesmn 0:3ac96e360672 241
charlesmn 0:3ac96e360672 242 #define VL53L1_RANGE_CONFIG__VCSEL_PERIOD_B 0x0063
charlesmn 0:3ac96e360672 243
charlesmn 0:3ac96e360672 244 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH 0x0064
charlesmn 0:3ac96e360672 245
charlesmn 0:3ac96e360672 246 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_HI 0x0064
charlesmn 0:3ac96e360672 247
charlesmn 0:3ac96e360672 248 #define VL53L1_RANGE_CONFIG__SIGMA_THRESH_LO 0x0065
charlesmn 0:3ac96e360672 249
charlesmn 0:3ac96e360672 250 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0066
charlesmn 0:3ac96e360672 251
charlesmn 0:3ac96e360672 252 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0066
charlesmn 0:3ac96e360672 253
charlesmn 0:3ac96e360672 254 #define VL53L1_RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0067
charlesmn 0:3ac96e360672 255
charlesmn 0:3ac96e360672 256 #define VL53L1_RANGE_CONFIG__VALID_PHASE_LOW 0x0068
charlesmn 0:3ac96e360672 257
charlesmn 0:3ac96e360672 258 #define VL53L1_RANGE_CONFIG__VALID_PHASE_HIGH 0x0069
charlesmn 0:3ac96e360672 259
charlesmn 0:3ac96e360672 260 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD 0x006C
charlesmn 0:3ac96e360672 261
charlesmn 0:3ac96e360672 262 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_3 0x006C
charlesmn 0:3ac96e360672 263
charlesmn 0:3ac96e360672 264 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_2 0x006D
charlesmn 0:3ac96e360672 265
charlesmn 0:3ac96e360672 266 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_1 0x006E
charlesmn 0:3ac96e360672 267
charlesmn 0:3ac96e360672 268 #define VL53L1_SYSTEM__INTERMEASUREMENT_PERIOD_0 0x006F
charlesmn 0:3ac96e360672 269
charlesmn 0:3ac96e360672 270 #define VL53L1_SYSTEM__FRACTIONAL_ENABLE 0x0070
charlesmn 0:3ac96e360672 271
charlesmn 0:3ac96e360672 272 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_0 0x0071
charlesmn 0:3ac96e360672 273
charlesmn 0:3ac96e360672 274 #define VL53L1_SYSTEM__THRESH_HIGH 0x0072
charlesmn 0:3ac96e360672 275
charlesmn 0:3ac96e360672 276 #define VL53L1_SYSTEM__THRESH_HIGH_HI 0x0072
charlesmn 0:3ac96e360672 277
charlesmn 0:3ac96e360672 278 #define VL53L1_SYSTEM__THRESH_HIGH_LO 0x0073
charlesmn 0:3ac96e360672 279
charlesmn 0:3ac96e360672 280 #define VL53L1_SYSTEM__THRESH_LOW 0x0074
charlesmn 0:3ac96e360672 281
charlesmn 0:3ac96e360672 282 #define VL53L1_SYSTEM__THRESH_LOW_HI 0x0074
charlesmn 0:3ac96e360672 283
charlesmn 0:3ac96e360672 284 #define VL53L1_SYSTEM__THRESH_LOW_LO 0x0075
charlesmn 0:3ac96e360672 285
charlesmn 0:3ac96e360672 286 #define VL53L1_SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x0076
charlesmn 0:3ac96e360672 287
charlesmn 0:3ac96e360672 288 #define VL53L1_SYSTEM__SEED_CONFIG 0x0077
charlesmn 0:3ac96e360672 289
charlesmn 0:3ac96e360672 290 #define VL53L1_SD_CONFIG__WOI_SD0 0x0078
charlesmn 0:3ac96e360672 291
charlesmn 0:3ac96e360672 292 #define VL53L1_SD_CONFIG__WOI_SD1 0x0079
charlesmn 0:3ac96e360672 293
charlesmn 0:3ac96e360672 294 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD0 0x007A
charlesmn 0:3ac96e360672 295
charlesmn 0:3ac96e360672 296 #define VL53L1_SD_CONFIG__INITIAL_PHASE_SD1 0x007B
charlesmn 0:3ac96e360672 297
charlesmn 0:3ac96e360672 298 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD_1 0x007C
charlesmn 0:3ac96e360672 299
charlesmn 0:3ac96e360672 300 #define VL53L1_SD_CONFIG__FIRST_ORDER_SELECT 0x007D
charlesmn 0:3ac96e360672 301
charlesmn 0:3ac96e360672 302 #define VL53L1_SD_CONFIG__QUANTIFIER 0x007E
charlesmn 0:3ac96e360672 303
charlesmn 0:3ac96e360672 304 #define VL53L1_ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x007F
charlesmn 0:3ac96e360672 305
charlesmn 0:3ac96e360672 306 #define VL53L1_ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x0080
charlesmn 0:3ac96e360672 307
charlesmn 0:3ac96e360672 308 #define VL53L1_SYSTEM__SEQUENCE_CONFIG 0x0081
charlesmn 0:3ac96e360672 309
charlesmn 0:3ac96e360672 310 #define VL53L1_SYSTEM__GROUPED_PARAMETER_HOLD 0x0082
charlesmn 0:3ac96e360672 311
charlesmn 0:3ac96e360672 312 #define VL53L1_POWER_MANAGEMENT__GO1_POWER_FORCE 0x0083
charlesmn 0:3ac96e360672 313
charlesmn 0:3ac96e360672 314 #define VL53L1_SYSTEM__STREAM_COUNT_CTRL 0x0084
charlesmn 0:3ac96e360672 315
charlesmn 0:3ac96e360672 316 #define VL53L1_FIRMWARE__ENABLE 0x0085
charlesmn 0:3ac96e360672 317
charlesmn 0:3ac96e360672 318 #define VL53L1_SYSTEM__INTERRUPT_CLEAR 0x0086
charlesmn 0:3ac96e360672 319
charlesmn 0:3ac96e360672 320 #define VL53L1_SYSTEM__MODE_START 0x0087
charlesmn 0:3ac96e360672 321
charlesmn 0:3ac96e360672 322 #define VL53L1_RESULT__INTERRUPT_STATUS 0x0088
charlesmn 0:3ac96e360672 323
charlesmn 0:3ac96e360672 324 #define VL53L1_RESULT__RANGE_STATUS 0x0089
charlesmn 0:3ac96e360672 325
charlesmn 0:3ac96e360672 326 #define VL53L1_RESULT__REPORT_STATUS 0x008A
charlesmn 0:3ac96e360672 327
charlesmn 0:3ac96e360672 328 #define VL53L1_RESULT__STREAM_COUNT 0x008B
charlesmn 0:3ac96e360672 329
charlesmn 0:3ac96e360672 330 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x008C
charlesmn 0:3ac96e360672 331
charlesmn 0:3ac96e360672 332 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x008C
charlesmn 0:3ac96e360672 333
charlesmn 0:3ac96e360672 334 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x008D
charlesmn 0:3ac96e360672 335
charlesmn 0:3ac96e360672 336 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x008E
charlesmn 0:3ac96e360672 337
charlesmn 0:3ac96e360672 338 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x008E
charlesmn 0:3ac96e360672 339
charlesmn 0:3ac96e360672 340 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x008F
charlesmn 0:3ac96e360672 341
charlesmn 0:3ac96e360672 342 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0090
charlesmn 0:3ac96e360672 343
charlesmn 0:3ac96e360672 344 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0090
charlesmn 0:3ac96e360672 345
charlesmn 0:3ac96e360672 346 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0091
charlesmn 0:3ac96e360672 347
charlesmn 0:3ac96e360672 348 #define VL53L1_RESULT__SIGMA_SD0 0x0092
charlesmn 0:3ac96e360672 349
charlesmn 0:3ac96e360672 350 #define VL53L1_RESULT__SIGMA_SD0_HI 0x0092
charlesmn 0:3ac96e360672 351
charlesmn 0:3ac96e360672 352 #define VL53L1_RESULT__SIGMA_SD0_LO 0x0093
charlesmn 0:3ac96e360672 353
charlesmn 0:3ac96e360672 354 #define VL53L1_RESULT__PHASE_SD0 0x0094
charlesmn 0:3ac96e360672 355
charlesmn 0:3ac96e360672 356 #define VL53L1_RESULT__PHASE_SD0_HI 0x0094
charlesmn 0:3ac96e360672 357
charlesmn 0:3ac96e360672 358 #define VL53L1_RESULT__PHASE_SD0_LO 0x0095
charlesmn 0:3ac96e360672 359
charlesmn 0:3ac96e360672 360 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0096
charlesmn 0:3ac96e360672 361
charlesmn 0:3ac96e360672 362 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0096
charlesmn 0:3ac96e360672 363
charlesmn 0:3ac96e360672 364 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0097
charlesmn 0:3ac96e360672 365
charlesmn 0:3ac96e360672 366 #define VL53L1_PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0098
charlesmn 0:3ac96e360672 367
charlesmn 0:3ac96e360672 368 #define VL53L1__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0098
charlesmn 0:3ac96e360672 369
charlesmn 0:3ac96e360672 370 #define VL53L1___PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0099
charlesmn 0:3ac96e360672 371
charlesmn 0:3ac96e360672 372 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009A
charlesmn 0:3ac96e360672 373
charlesmn 0:3ac96e360672 374 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009A
charlesmn 0:3ac96e360672 375
charlesmn 0:3ac96e360672 376 #define VL53L1_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009B
charlesmn 0:3ac96e360672 377
charlesmn 0:3ac96e360672 378 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x009C
charlesmn 0:3ac96e360672 379
charlesmn 0:3ac96e360672 380 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x009C
charlesmn 0:3ac96e360672 381
charlesmn 0:3ac96e360672 382 #define VL53L1_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x009D
charlesmn 0:3ac96e360672 383
charlesmn 0:3ac96e360672 384 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x009E
charlesmn 0:3ac96e360672 385
charlesmn 0:3ac96e360672 386 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x009E
charlesmn 0:3ac96e360672 387
charlesmn 0:3ac96e360672 388 #define VL53L1_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x009F
charlesmn 0:3ac96e360672 389
charlesmn 0:3ac96e360672 390 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x00A0
charlesmn 0:3ac96e360672 391
charlesmn 0:3ac96e360672 392 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x00A0
charlesmn 0:3ac96e360672 393
charlesmn 0:3ac96e360672 394 #define VL53L1_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x00A1
charlesmn 0:3ac96e360672 395
charlesmn 0:3ac96e360672 396 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x00A2
charlesmn 0:3ac96e360672 397
charlesmn 0:3ac96e360672 398 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x00A2
charlesmn 0:3ac96e360672 399
charlesmn 0:3ac96e360672 400 #define VL53L1_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x00A3
charlesmn 0:3ac96e360672 401
charlesmn 0:3ac96e360672 402 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x00A4
charlesmn 0:3ac96e360672 403
charlesmn 0:3ac96e360672 404 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x00A4
charlesmn 0:3ac96e360672 405
charlesmn 0:3ac96e360672 406 #define VL53L1_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x00A5
charlesmn 0:3ac96e360672 407
charlesmn 0:3ac96e360672 408 #define VL53L1_RESULT__SIGMA_SD1 0x00A6
charlesmn 0:3ac96e360672 409
charlesmn 0:3ac96e360672 410 #define VL53L1_RESULT__SIGMA_SD1_HI 0x00A6
charlesmn 0:3ac96e360672 411
charlesmn 0:3ac96e360672 412 #define VL53L1_RESULT__SIGMA_SD1_LO 0x00A7
charlesmn 0:3ac96e360672 413
charlesmn 0:3ac96e360672 414 #define VL53L1_RESULT__PHASE_SD1 0x00A8
charlesmn 0:3ac96e360672 415
charlesmn 0:3ac96e360672 416 #define VL53L1_RESULT__PHASE_SD1_HI 0x00A8
charlesmn 0:3ac96e360672 417
charlesmn 0:3ac96e360672 418 #define VL53L1_RESULT__PHASE_SD1_LO 0x00A9
charlesmn 0:3ac96e360672 419
charlesmn 0:3ac96e360672 420 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x00AA
charlesmn 0:3ac96e360672 421
charlesmn 0:3ac96e360672 422 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x00AA
charlesmn 0:3ac96e360672 423
charlesmn 0:3ac96e360672 424 #define VL53L1_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x00AB
charlesmn 0:3ac96e360672 425
charlesmn 0:3ac96e360672 426 #define VL53L1_RESULT__SPARE_0_SD1 0x00AC
charlesmn 0:3ac96e360672 427
charlesmn 0:3ac96e360672 428 #define VL53L1_RESULT__SPARE_0_SD1_HI 0x00AC
charlesmn 0:3ac96e360672 429
charlesmn 0:3ac96e360672 430 #define VL53L1_RESULT__SPARE_0_SD1_LO 0x00AD
charlesmn 0:3ac96e360672 431
charlesmn 0:3ac96e360672 432 #define VL53L1_RESULT__SPARE_1_SD1 0x00AE
charlesmn 0:3ac96e360672 433
charlesmn 0:3ac96e360672 434 #define VL53L1_RESULT__SPARE_1_SD1_HI 0x00AE
charlesmn 0:3ac96e360672 435
charlesmn 0:3ac96e360672 436 #define VL53L1_RESULT__SPARE_1_SD1_LO 0x00AF
charlesmn 0:3ac96e360672 437
charlesmn 0:3ac96e360672 438 #define VL53L1_RESULT__SPARE_2_SD1 0x00B0
charlesmn 0:3ac96e360672 439
charlesmn 0:3ac96e360672 440 #define VL53L1_RESULT__SPARE_2_SD1_HI 0x00B0
charlesmn 0:3ac96e360672 441
charlesmn 0:3ac96e360672 442 #define VL53L1_RESULT__SPARE_2_SD1_LO 0x00B1
charlesmn 0:3ac96e360672 443
charlesmn 0:3ac96e360672 444 #define VL53L1_RESULT__SPARE_3_SD1 0x00B2
charlesmn 0:3ac96e360672 445
charlesmn 0:3ac96e360672 446 #define VL53L1_RESULT__THRESH_INFO 0x00B3
charlesmn 0:3ac96e360672 447
charlesmn 0:3ac96e360672 448 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x00B4
charlesmn 0:3ac96e360672 449
charlesmn 0:3ac96e360672 450 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x00B4
charlesmn 0:3ac96e360672 451
charlesmn 0:3ac96e360672 452 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x00B5
charlesmn 0:3ac96e360672 453
charlesmn 0:3ac96e360672 454 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x00B6
charlesmn 0:3ac96e360672 455
charlesmn 0:3ac96e360672 456 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x00B7
charlesmn 0:3ac96e360672 457
charlesmn 0:3ac96e360672 458 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x00B8
charlesmn 0:3ac96e360672 459
charlesmn 0:3ac96e360672 460 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x00B8
charlesmn 0:3ac96e360672 461
charlesmn 0:3ac96e360672 462 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x00B9
charlesmn 0:3ac96e360672 463
charlesmn 0:3ac96e360672 464 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x00BA
charlesmn 0:3ac96e360672 465
charlesmn 0:3ac96e360672 466 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x00BB
charlesmn 0:3ac96e360672 467
charlesmn 0:3ac96e360672 468 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x00BC
charlesmn 0:3ac96e360672 469
charlesmn 0:3ac96e360672 470 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x00BC
charlesmn 0:3ac96e360672 471
charlesmn 0:3ac96e360672 472 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x00BD
charlesmn 0:3ac96e360672 473
charlesmn 0:3ac96e360672 474 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x00BE
charlesmn 0:3ac96e360672 475
charlesmn 0:3ac96e360672 476 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x00BF
charlesmn 0:3ac96e360672 477
charlesmn 0:3ac96e360672 478 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x00C0
charlesmn 0:3ac96e360672 479
charlesmn 0:3ac96e360672 480 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x00C0
charlesmn 0:3ac96e360672 481
charlesmn 0:3ac96e360672 482 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x00C1
charlesmn 0:3ac96e360672 483
charlesmn 0:3ac96e360672 484 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x00C2
charlesmn 0:3ac96e360672 485
charlesmn 0:3ac96e360672 486 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x00C3
charlesmn 0:3ac96e360672 487
charlesmn 0:3ac96e360672 488 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x00C4
charlesmn 0:3ac96e360672 489
charlesmn 0:3ac96e360672 490 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x00C4
charlesmn 0:3ac96e360672 491
charlesmn 0:3ac96e360672 492 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x00C5
charlesmn 0:3ac96e360672 493
charlesmn 0:3ac96e360672 494 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x00C6
charlesmn 0:3ac96e360672 495
charlesmn 0:3ac96e360672 496 #define VL53L1_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x00C7
charlesmn 0:3ac96e360672 497
charlesmn 0:3ac96e360672 498 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x00C8
charlesmn 0:3ac96e360672 499
charlesmn 0:3ac96e360672 500 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x00C8
charlesmn 0:3ac96e360672 501
charlesmn 0:3ac96e360672 502 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x00C9
charlesmn 0:3ac96e360672 503
charlesmn 0:3ac96e360672 504 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x00CA
charlesmn 0:3ac96e360672 505
charlesmn 0:3ac96e360672 506 #define VL53L1_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x00CB
charlesmn 0:3ac96e360672 507
charlesmn 0:3ac96e360672 508 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x00CC
charlesmn 0:3ac96e360672 509
charlesmn 0:3ac96e360672 510 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x00CC
charlesmn 0:3ac96e360672 511
charlesmn 0:3ac96e360672 512 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x00CD
charlesmn 0:3ac96e360672 513
charlesmn 0:3ac96e360672 514 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x00CE
charlesmn 0:3ac96e360672 515
charlesmn 0:3ac96e360672 516 #define VL53L1_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x00CF
charlesmn 0:3ac96e360672 517
charlesmn 0:3ac96e360672 518 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x00D0
charlesmn 0:3ac96e360672 519
charlesmn 0:3ac96e360672 520 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x00D0
charlesmn 0:3ac96e360672 521
charlesmn 0:3ac96e360672 522 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x00D1
charlesmn 0:3ac96e360672 523
charlesmn 0:3ac96e360672 524 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x00D2
charlesmn 0:3ac96e360672 525
charlesmn 0:3ac96e360672 526 #define VL53L1_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x00D3
charlesmn 0:3ac96e360672 527
charlesmn 0:3ac96e360672 528 #define VL53L1_RESULT_CORE__SPARE_0 0x00D4
charlesmn 0:3ac96e360672 529
charlesmn 0:3ac96e360672 530 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE 0x00D6
charlesmn 0:3ac96e360672 531
charlesmn 0:3ac96e360672 532 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x00D6
charlesmn 0:3ac96e360672 533
charlesmn 0:3ac96e360672 534 #define VL53L1_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x00D7
charlesmn 0:3ac96e360672 535
charlesmn 0:3ac96e360672 536 #define VL53L1_PHASECAL_RESULT__VCSEL_START 0x00D8
charlesmn 0:3ac96e360672 537
charlesmn 0:3ac96e360672 538 #define VL53L1_REF_SPAD_CHAR_RESULT__NUM_ACTUAL_REF_SPADS 0x00D9
charlesmn 0:3ac96e360672 539
charlesmn 0:3ac96e360672 540 #define VL53L1_REF_SPAD_CHAR_RESULT__REF_LOCATION 0x00DA
charlesmn 0:3ac96e360672 541
charlesmn 0:3ac96e360672 542 #define VL53L1_VHV_RESULT__COLDBOOT_STATUS 0x00DB
charlesmn 0:3ac96e360672 543
charlesmn 0:3ac96e360672 544 #define VL53L1_VHV_RESULT__SEARCH_RESULT 0x00DC
charlesmn 0:3ac96e360672 545
charlesmn 0:3ac96e360672 546 #define VL53L1_VHV_RESULT__LATEST_SETTING 0x00DD
charlesmn 0:3ac96e360672 547
charlesmn 0:3ac96e360672 548 #define VL53L1_RESULT__OSC_CALIBRATE_VAL 0x00DE
charlesmn 0:3ac96e360672 549
charlesmn 0:3ac96e360672 550 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_HI 0x00DE
charlesmn 0:3ac96e360672 551
charlesmn 0:3ac96e360672 552 #define VL53L1_RESULT__OSC_CALIBRATE_VAL_LO 0x00DF
charlesmn 0:3ac96e360672 553
charlesmn 0:3ac96e360672 554 #define VL53L1_ANA_CONFIG__POWERDOWN_GO1 0x00E0
charlesmn 0:3ac96e360672 555
charlesmn 0:3ac96e360672 556 #define VL53L1_ANA_CONFIG__REF_BG_CTRL 0x00E1
charlesmn 0:3ac96e360672 557
charlesmn 0:3ac96e360672 558 #define VL53L1_ANA_CONFIG__REGDVDD1V2_CTRL 0x00E2
charlesmn 0:3ac96e360672 559
charlesmn 0:3ac96e360672 560 #define VL53L1_ANA_CONFIG__OSC_SLOW_CTRL 0x00E3
charlesmn 0:3ac96e360672 561
charlesmn 0:3ac96e360672 562 #define VL53L1_TEST_MODE__STATUS 0x00E4
charlesmn 0:3ac96e360672 563
charlesmn 0:3ac96e360672 564 #define VL53L1_FIRMWARE__SYSTEM_STATUS 0x00E5
charlesmn 0:3ac96e360672 565
charlesmn 0:3ac96e360672 566 #define VL53L1_FIRMWARE__MODE_STATUS 0x00E6
charlesmn 0:3ac96e360672 567
charlesmn 0:3ac96e360672 568 #define VL53L1_FIRMWARE__SECONDARY_MODE_STATUS 0x00E7
charlesmn 0:3ac96e360672 569
charlesmn 0:3ac96e360672 570 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER 0x00E8
charlesmn 0:3ac96e360672 571
charlesmn 0:3ac96e360672 572 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_HI 0x00E8
charlesmn 0:3ac96e360672 573
charlesmn 0:3ac96e360672 574 #define VL53L1_FIRMWARE__CAL_REPEAT_RATE_COUNTER_LO 0x00E9
charlesmn 0:3ac96e360672 575
charlesmn 0:3ac96e360672 576 #define VL53L1_FIRMWARE__HISTOGRAM_BIN 0x00EA
charlesmn 0:3ac96e360672 577
charlesmn 0:3ac96e360672 578 #define VL53L1_GPH__SYSTEM__THRESH_HIGH 0x00EC
charlesmn 0:3ac96e360672 579
charlesmn 0:3ac96e360672 580 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_HI 0x00EC
charlesmn 0:3ac96e360672 581
charlesmn 0:3ac96e360672 582 #define VL53L1_GPH__SYSTEM__THRESH_HIGH_LO 0x00ED
charlesmn 0:3ac96e360672 583
charlesmn 0:3ac96e360672 584 #define VL53L1_GPH__SYSTEM__THRESH_LOW 0x00EE
charlesmn 0:3ac96e360672 585
charlesmn 0:3ac96e360672 586 #define VL53L1_GPH__SYSTEM__THRESH_LOW_HI 0x00EE
charlesmn 0:3ac96e360672 587
charlesmn 0:3ac96e360672 588 #define VL53L1_GPH__SYSTEM__THRESH_LOW_LO 0x00EF
charlesmn 0:3ac96e360672 589
charlesmn 0:3ac96e360672 590 #define VL53L1_GPH__SYSTEM__ENABLE_XTALK_PER_QUADRANT 0x00F0
charlesmn 0:3ac96e360672 591
charlesmn 0:3ac96e360672 592 #define VL53L1_GPH__SPARE_0 0x00F1
charlesmn 0:3ac96e360672 593
charlesmn 0:3ac96e360672 594 #define VL53L1_GPH__SD_CONFIG__WOI_SD0 0x00F2
charlesmn 0:3ac96e360672 595
charlesmn 0:3ac96e360672 596 #define VL53L1_GPH__SD_CONFIG__WOI_SD1 0x00F3
charlesmn 0:3ac96e360672 597
charlesmn 0:3ac96e360672 598 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD0 0x00F4
charlesmn 0:3ac96e360672 599
charlesmn 0:3ac96e360672 600 #define VL53L1_GPH__SD_CONFIG__INITIAL_PHASE_SD1 0x00F5
charlesmn 0:3ac96e360672 601
charlesmn 0:3ac96e360672 602 #define VL53L1_GPH__SD_CONFIG__FIRST_ORDER_SELECT 0x00F6
charlesmn 0:3ac96e360672 603
charlesmn 0:3ac96e360672 604 #define VL53L1_GPH__SD_CONFIG__QUANTIFIER 0x00F7
charlesmn 0:3ac96e360672 605
charlesmn 0:3ac96e360672 606 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_CENTRE_SPAD 0x00F8
charlesmn 0:3ac96e360672 607
charlesmn 0:3ac96e360672 608 #define VL53L1_GPH__ROI_CONFIG__USER_ROI_REQUESTED_GLOBAL_XY_SIZE 0x00F9
charlesmn 0:3ac96e360672 609
charlesmn 0:3ac96e360672 610 #define VL53L1_GPH__SYSTEM__SEQUENCE_CONFIG 0x00FA
charlesmn 0:3ac96e360672 611
charlesmn 0:3ac96e360672 612 #define VL53L1_GPH__GPH_ID 0x00FB
charlesmn 0:3ac96e360672 613
charlesmn 0:3ac96e360672 614 #define VL53L1_SYSTEM__INTERRUPT_SET 0x00FC
charlesmn 0:3ac96e360672 615
charlesmn 0:3ac96e360672 616 #define VL53L1_INTERRUPT_MANAGER__ENABLES 0x00FD
charlesmn 0:3ac96e360672 617
charlesmn 0:3ac96e360672 618 #define VL53L1_INTERRUPT_MANAGER__CLEAR 0x00FE
charlesmn 0:3ac96e360672 619
charlesmn 0:3ac96e360672 620 #define VL53L1_INTERRUPT_MANAGER__STATUS 0x00FF
charlesmn 0:3ac96e360672 621
charlesmn 0:3ac96e360672 622 #define VL53L1_MCU_TO_HOST_BANK__WR_ACCESS_EN 0x0100
charlesmn 0:3ac96e360672 623
charlesmn 0:3ac96e360672 624 #define VL53L1_POWER_MANAGEMENT__GO1_RESET_STATUS 0x0101
charlesmn 0:3ac96e360672 625
charlesmn 0:3ac96e360672 626 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO 0x0102
charlesmn 0:3ac96e360672 627
charlesmn 0:3ac96e360672 628 #define VL53L1_PAD_STARTUP_MODE__VALUE_CTRL 0x0103
charlesmn 0:3ac96e360672 629
charlesmn 0:3ac96e360672 630 #define VL53L1_PLL_PERIOD_US 0x0104
charlesmn 0:3ac96e360672 631
charlesmn 0:3ac96e360672 632 #define VL53L1_PLL_PERIOD_US_3 0x0104
charlesmn 0:3ac96e360672 633
charlesmn 0:3ac96e360672 634 #define VL53L1_PLL_PERIOD_US_2 0x0105
charlesmn 0:3ac96e360672 635
charlesmn 0:3ac96e360672 636 #define VL53L1_PLL_PERIOD_US_1 0x0106
charlesmn 0:3ac96e360672 637
charlesmn 0:3ac96e360672 638 #define VL53L1_PLL_PERIOD_US_0 0x0107
charlesmn 0:3ac96e360672 639
charlesmn 0:3ac96e360672 640 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT 0x0108
charlesmn 0:3ac96e360672 641
charlesmn 0:3ac96e360672 642 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_3 0x0108
charlesmn 0:3ac96e360672 643
charlesmn 0:3ac96e360672 644 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_2 0x0109
charlesmn 0:3ac96e360672 645
charlesmn 0:3ac96e360672 646 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_1 0x010A
charlesmn 0:3ac96e360672 647
charlesmn 0:3ac96e360672 648 #define VL53L1_INTERRUPT_SCHEDULER__DATA_OUT_0 0x010B
charlesmn 0:3ac96e360672 649
charlesmn 0:3ac96e360672 650 #define VL53L1_NVM_BIST__COMPLETE 0x010C
charlesmn 0:3ac96e360672 651
charlesmn 0:3ac96e360672 652 #define VL53L1_NVM_BIST__STATUS 0x010D
charlesmn 0:3ac96e360672 653
charlesmn 0:3ac96e360672 654 #define VL53L1_IDENTIFICATION__MODEL_ID 0x010F
charlesmn 0:3ac96e360672 655
charlesmn 0:3ac96e360672 656 #define VL53L1_IDENTIFICATION__MODULE_TYPE 0x0110
charlesmn 0:3ac96e360672 657
charlesmn 0:3ac96e360672 658 #define VL53L1_IDENTIFICATION__REVISION_ID 0x0111
charlesmn 0:3ac96e360672 659
charlesmn 0:3ac96e360672 660 #define VL53L1_IDENTIFICATION__MODULE_ID 0x0112
charlesmn 0:3ac96e360672 661
charlesmn 0:3ac96e360672 662 #define VL53L1_IDENTIFICATION__MODULE_ID_HI 0x0112
charlesmn 0:3ac96e360672 663
charlesmn 0:3ac96e360672 664 #define VL53L1_IDENTIFICATION__MODULE_ID_LO 0x0113
charlesmn 0:3ac96e360672 665
charlesmn 0:3ac96e360672 666 #define VL53L1_ANA_CONFIG__FAST_OSC__TRIM_MAX 0x0114
charlesmn 0:3ac96e360672 667
charlesmn 0:3ac96e360672 668 #define VL53L1_ANA_CONFIG__FAST_OSC__FREQ_SET 0x0115
charlesmn 0:3ac96e360672 669
charlesmn 0:3ac96e360672 670 #define VL53L1_ANA_CONFIG__VCSEL_TRIM 0x0116
charlesmn 0:3ac96e360672 671
charlesmn 0:3ac96e360672 672 #define VL53L1_ANA_CONFIG__VCSEL_SELION 0x0117
charlesmn 0:3ac96e360672 673
charlesmn 0:3ac96e360672 674 #define VL53L1_ANA_CONFIG__VCSEL_SELION_MAX 0x0118
charlesmn 0:3ac96e360672 675
charlesmn 0:3ac96e360672 676 #define VL53L1_PROTECTED_LASER_SAFETY__LOCK_BIT 0x0119
charlesmn 0:3ac96e360672 677
charlesmn 0:3ac96e360672 678 #define VL53L1_LASER_SAFETY__KEY 0x011A
charlesmn 0:3ac96e360672 679
charlesmn 0:3ac96e360672 680 #define VL53L1_LASER_SAFETY__KEY_RO 0x011B
charlesmn 0:3ac96e360672 681
charlesmn 0:3ac96e360672 682 #define VL53L1_LASER_SAFETY__CLIP 0x011C
charlesmn 0:3ac96e360672 683
charlesmn 0:3ac96e360672 684 #define VL53L1_LASER_SAFETY__MULT 0x011D
charlesmn 0:3ac96e360672 685
charlesmn 0:3ac96e360672 686 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_0 0x011E
charlesmn 0:3ac96e360672 687
charlesmn 0:3ac96e360672 688 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_1 0x011F
charlesmn 0:3ac96e360672 689
charlesmn 0:3ac96e360672 690 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_2 0x0120
charlesmn 0:3ac96e360672 691
charlesmn 0:3ac96e360672 692 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_3 0x0121
charlesmn 0:3ac96e360672 693
charlesmn 0:3ac96e360672 694 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_4 0x0122
charlesmn 0:3ac96e360672 695
charlesmn 0:3ac96e360672 696 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_5 0x0123
charlesmn 0:3ac96e360672 697
charlesmn 0:3ac96e360672 698 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_6 0x0124
charlesmn 0:3ac96e360672 699
charlesmn 0:3ac96e360672 700 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_7 0x0125
charlesmn 0:3ac96e360672 701
charlesmn 0:3ac96e360672 702 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_8 0x0126
charlesmn 0:3ac96e360672 703
charlesmn 0:3ac96e360672 704 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_9 0x0127
charlesmn 0:3ac96e360672 705
charlesmn 0:3ac96e360672 706 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_10 0x0128
charlesmn 0:3ac96e360672 707
charlesmn 0:3ac96e360672 708 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_11 0x0129
charlesmn 0:3ac96e360672 709
charlesmn 0:3ac96e360672 710 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_12 0x012A
charlesmn 0:3ac96e360672 711
charlesmn 0:3ac96e360672 712 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_13 0x012B
charlesmn 0:3ac96e360672 713
charlesmn 0:3ac96e360672 714 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_14 0x012C
charlesmn 0:3ac96e360672 715
charlesmn 0:3ac96e360672 716 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_15 0x012D
charlesmn 0:3ac96e360672 717
charlesmn 0:3ac96e360672 718 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_16 0x012E
charlesmn 0:3ac96e360672 719
charlesmn 0:3ac96e360672 720 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_17 0x012F
charlesmn 0:3ac96e360672 721
charlesmn 0:3ac96e360672 722 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_18 0x0130
charlesmn 0:3ac96e360672 723
charlesmn 0:3ac96e360672 724 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_19 0x0131
charlesmn 0:3ac96e360672 725
charlesmn 0:3ac96e360672 726 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_20 0x0132
charlesmn 0:3ac96e360672 727
charlesmn 0:3ac96e360672 728 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_21 0x0133
charlesmn 0:3ac96e360672 729
charlesmn 0:3ac96e360672 730 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_22 0x0134
charlesmn 0:3ac96e360672 731
charlesmn 0:3ac96e360672 732 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_23 0x0135
charlesmn 0:3ac96e360672 733
charlesmn 0:3ac96e360672 734 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_24 0x0136
charlesmn 0:3ac96e360672 735
charlesmn 0:3ac96e360672 736 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_25 0x0137
charlesmn 0:3ac96e360672 737
charlesmn 0:3ac96e360672 738 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_26 0x0138
charlesmn 0:3ac96e360672 739
charlesmn 0:3ac96e360672 740 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_27 0x0139
charlesmn 0:3ac96e360672 741
charlesmn 0:3ac96e360672 742 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_28 0x013A
charlesmn 0:3ac96e360672 743
charlesmn 0:3ac96e360672 744 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_29 0x013B
charlesmn 0:3ac96e360672 745
charlesmn 0:3ac96e360672 746 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_30 0x013C
charlesmn 0:3ac96e360672 747
charlesmn 0:3ac96e360672 748 #define VL53L1_GLOBAL_CONFIG__SPAD_ENABLES_RTN_31 0x013D
charlesmn 0:3ac96e360672 749
charlesmn 0:3ac96e360672 750 #define VL53L1_ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x013E
charlesmn 0:3ac96e360672 751
charlesmn 0:3ac96e360672 752 #define VL53L1_ROI_CONFIG__MODE_ROI_XY_SIZE 0x013F
charlesmn 0:3ac96e360672 753
charlesmn 0:3ac96e360672 754 #define VL53L1_GO2_HOST_BANK_ACCESS__OVERRIDE 0x0300
charlesmn 0:3ac96e360672 755
charlesmn 0:3ac96e360672 756 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND 0x0400
charlesmn 0:3ac96e360672 757
charlesmn 0:3ac96e360672 758 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_3 0x0400
charlesmn 0:3ac96e360672 759
charlesmn 0:3ac96e360672 760 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_2 0x0401
charlesmn 0:3ac96e360672 761
charlesmn 0:3ac96e360672 762 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_1 0x0402
charlesmn 0:3ac96e360672 763
charlesmn 0:3ac96e360672 764 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLICAND_0 0x0403
charlesmn 0:3ac96e360672 765
charlesmn 0:3ac96e360672 766 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER 0x0404
charlesmn 0:3ac96e360672 767
charlesmn 0:3ac96e360672 768 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_3 0x0404
charlesmn 0:3ac96e360672 769
charlesmn 0:3ac96e360672 770 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_2 0x0405
charlesmn 0:3ac96e360672 771
charlesmn 0:3ac96e360672 772 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_1 0x0406
charlesmn 0:3ac96e360672 773
charlesmn 0:3ac96e360672 774 #define VL53L1_MCU_UTIL_MULTIPLIER__MULTIPLIER_0 0x0407
charlesmn 0:3ac96e360672 775
charlesmn 0:3ac96e360672 776 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI 0x0408
charlesmn 0:3ac96e360672 777
charlesmn 0:3ac96e360672 778 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_3 0x0408
charlesmn 0:3ac96e360672 779
charlesmn 0:3ac96e360672 780 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_2 0x0409
charlesmn 0:3ac96e360672 781
charlesmn 0:3ac96e360672 782 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_1 0x040A
charlesmn 0:3ac96e360672 783
charlesmn 0:3ac96e360672 784 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_HI_0 0x040B
charlesmn 0:3ac96e360672 785
charlesmn 0:3ac96e360672 786 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO 0x040C
charlesmn 0:3ac96e360672 787
charlesmn 0:3ac96e360672 788 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_3 0x040C
charlesmn 0:3ac96e360672 789
charlesmn 0:3ac96e360672 790 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_2 0x040D
charlesmn 0:3ac96e360672 791
charlesmn 0:3ac96e360672 792 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_1 0x040E
charlesmn 0:3ac96e360672 793
charlesmn 0:3ac96e360672 794 #define VL53L1_MCU_UTIL_MULTIPLIER__PRODUCT_LO_0 0x040F
charlesmn 0:3ac96e360672 795
charlesmn 0:3ac96e360672 796 #define VL53L1_MCU_UTIL_MULTIPLIER__START 0x0410
charlesmn 0:3ac96e360672 797
charlesmn 0:3ac96e360672 798 #define VL53L1_MCU_UTIL_MULTIPLIER__STATUS 0x0411
charlesmn 0:3ac96e360672 799
charlesmn 0:3ac96e360672 800 #define VL53L1_MCU_UTIL_DIVIDER__START 0x0412
charlesmn 0:3ac96e360672 801
charlesmn 0:3ac96e360672 802 #define VL53L1_MCU_UTIL_DIVIDER__STATUS 0x0413
charlesmn 0:3ac96e360672 803
charlesmn 0:3ac96e360672 804 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND 0x0414
charlesmn 0:3ac96e360672 805
charlesmn 0:3ac96e360672 806 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_3 0x0414
charlesmn 0:3ac96e360672 807
charlesmn 0:3ac96e360672 808 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_2 0x0415
charlesmn 0:3ac96e360672 809
charlesmn 0:3ac96e360672 810 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_1 0x0416
charlesmn 0:3ac96e360672 811
charlesmn 0:3ac96e360672 812 #define VL53L1_MCU_UTIL_DIVIDER__DIVIDEND_0 0x0417
charlesmn 0:3ac96e360672 813
charlesmn 0:3ac96e360672 814 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR 0x0418
charlesmn 0:3ac96e360672 815
charlesmn 0:3ac96e360672 816 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_3 0x0418
charlesmn 0:3ac96e360672 817
charlesmn 0:3ac96e360672 818 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_2 0x0419
charlesmn 0:3ac96e360672 819
charlesmn 0:3ac96e360672 820 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_1 0x041A
charlesmn 0:3ac96e360672 821
charlesmn 0:3ac96e360672 822 #define VL53L1_MCU_UTIL_DIVIDER__DIVISOR_0 0x041B
charlesmn 0:3ac96e360672 823
charlesmn 0:3ac96e360672 824 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT 0x041C
charlesmn 0:3ac96e360672 825
charlesmn 0:3ac96e360672 826 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_3 0x041C
charlesmn 0:3ac96e360672 827
charlesmn 0:3ac96e360672 828 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_2 0x041D
charlesmn 0:3ac96e360672 829
charlesmn 0:3ac96e360672 830 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_1 0x041E
charlesmn 0:3ac96e360672 831
charlesmn 0:3ac96e360672 832 #define VL53L1_MCU_UTIL_DIVIDER__QUOTIENT_0 0x041F
charlesmn 0:3ac96e360672 833
charlesmn 0:3ac96e360672 834 #define VL53L1_TIMER0__VALUE_IN 0x0420
charlesmn 0:3ac96e360672 835
charlesmn 0:3ac96e360672 836 #define VL53L1_TIMER0__VALUE_IN_3 0x0420
charlesmn 0:3ac96e360672 837
charlesmn 0:3ac96e360672 838 #define VL53L1_TIMER0__VALUE_IN_2 0x0421
charlesmn 0:3ac96e360672 839
charlesmn 0:3ac96e360672 840 #define VL53L1_TIMER0__VALUE_IN_1 0x0422
charlesmn 0:3ac96e360672 841
charlesmn 0:3ac96e360672 842 #define VL53L1_TIMER0__VALUE_IN_0 0x0423
charlesmn 0:3ac96e360672 843
charlesmn 0:3ac96e360672 844 #define VL53L1_TIMER1__VALUE_IN 0x0424
charlesmn 0:3ac96e360672 845
charlesmn 0:3ac96e360672 846 #define VL53L1_TIMER1__VALUE_IN_3 0x0424
charlesmn 0:3ac96e360672 847
charlesmn 0:3ac96e360672 848 #define VL53L1_TIMER1__VALUE_IN_2 0x0425
charlesmn 0:3ac96e360672 849
charlesmn 0:3ac96e360672 850 #define VL53L1_TIMER1__VALUE_IN_1 0x0426
charlesmn 0:3ac96e360672 851
charlesmn 0:3ac96e360672 852 #define VL53L1_TIMER1__VALUE_IN_0 0x0427
charlesmn 0:3ac96e360672 853
charlesmn 0:3ac96e360672 854 #define VL53L1_TIMER0__CTRL 0x0428
charlesmn 0:3ac96e360672 855
charlesmn 0:3ac96e360672 856 #define VL53L1_TIMER1__CTRL 0x0429
charlesmn 0:3ac96e360672 857
charlesmn 0:3ac96e360672 858 #define VL53L1_MCU_GENERAL_PURPOSE__GP_0 0x042C
charlesmn 0:3ac96e360672 859
charlesmn 0:3ac96e360672 860 #define VL53L1_MCU_GENERAL_PURPOSE__GP_1 0x042D
charlesmn 0:3ac96e360672 861
charlesmn 0:3ac96e360672 862 #define VL53L1_MCU_GENERAL_PURPOSE__GP_2 0x042E
charlesmn 0:3ac96e360672 863
charlesmn 0:3ac96e360672 864 #define VL53L1_MCU_GENERAL_PURPOSE__GP_3 0x042F
charlesmn 0:3ac96e360672 865
charlesmn 0:3ac96e360672 866 #define VL53L1_MCU_RANGE_CALC__CONFIG 0x0430
charlesmn 0:3ac96e360672 867
charlesmn 0:3ac96e360672 868 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE 0x0432
charlesmn 0:3ac96e360672 869
charlesmn 0:3ac96e360672 870 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_HI 0x0432
charlesmn 0:3ac96e360672 871
charlesmn 0:3ac96e360672 872 #define VL53L1_MCU_RANGE_CALC__OFFSET_CORRECTED_RANGE_LO 0x0433
charlesmn 0:3ac96e360672 873
charlesmn 0:3ac96e360672 874 #define VL53L1_MCU_RANGE_CALC__SPARE_4 0x0434
charlesmn 0:3ac96e360672 875
charlesmn 0:3ac96e360672 876 #define VL53L1_MCU_RANGE_CALC__SPARE_4_3 0x0434
charlesmn 0:3ac96e360672 877
charlesmn 0:3ac96e360672 878 #define VL53L1_MCU_RANGE_CALC__SPARE_4_2 0x0435
charlesmn 0:3ac96e360672 879
charlesmn 0:3ac96e360672 880 #define VL53L1_MCU_RANGE_CALC__SPARE_4_1 0x0436
charlesmn 0:3ac96e360672 881
charlesmn 0:3ac96e360672 882 #define VL53L1_MCU_RANGE_CALC__SPARE_4_0 0x0437
charlesmn 0:3ac96e360672 883
charlesmn 0:3ac96e360672 884 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC 0x0438
charlesmn 0:3ac96e360672 885
charlesmn 0:3ac96e360672 886 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_HI 0x0438
charlesmn 0:3ac96e360672 887
charlesmn 0:3ac96e360672 888 #define VL53L1_MCU_RANGE_CALC__AMBIENT_DURATION_PRE_CALC_LO 0x0439
charlesmn 0:3ac96e360672 889
charlesmn 0:3ac96e360672 890 #define VL53L1_MCU_RANGE_CALC__ALGO_VCSEL_PERIOD 0x043C
charlesmn 0:3ac96e360672 891
charlesmn 0:3ac96e360672 892 #define VL53L1_MCU_RANGE_CALC__SPARE_5 0x043D
charlesmn 0:3ac96e360672 893
charlesmn 0:3ac96e360672 894 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS 0x043E
charlesmn 0:3ac96e360672 895
charlesmn 0:3ac96e360672 896 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_HI 0x043E
charlesmn 0:3ac96e360672 897
charlesmn 0:3ac96e360672 898 #define VL53L1_MCU_RANGE_CALC__ALGO_TOTAL_PERIODS_LO 0x043F
charlesmn 0:3ac96e360672 899
charlesmn 0:3ac96e360672 900 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE 0x0440
charlesmn 0:3ac96e360672 901
charlesmn 0:3ac96e360672 902 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_3 0x0440
charlesmn 0:3ac96e360672 903
charlesmn 0:3ac96e360672 904 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_2 0x0441
charlesmn 0:3ac96e360672 905
charlesmn 0:3ac96e360672 906 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_1 0x0442
charlesmn 0:3ac96e360672 907
charlesmn 0:3ac96e360672 908 #define VL53L1_MCU_RANGE_CALC__ALGO_ACCUM_PHASE_0 0x0443
charlesmn 0:3ac96e360672 909
charlesmn 0:3ac96e360672 910 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS 0x0444
charlesmn 0:3ac96e360672 911
charlesmn 0:3ac96e360672 912 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_3 0x0444
charlesmn 0:3ac96e360672 913
charlesmn 0:3ac96e360672 914 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_2 0x0445
charlesmn 0:3ac96e360672 915
charlesmn 0:3ac96e360672 916 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_1 0x0446
charlesmn 0:3ac96e360672 917
charlesmn 0:3ac96e360672 918 #define VL53L1_MCU_RANGE_CALC__ALGO_SIGNAL_EVENTS_0 0x0447
charlesmn 0:3ac96e360672 919
charlesmn 0:3ac96e360672 920 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS 0x0448
charlesmn 0:3ac96e360672 921
charlesmn 0:3ac96e360672 922 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_3 0x0448
charlesmn 0:3ac96e360672 923
charlesmn 0:3ac96e360672 924 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_2 0x0449
charlesmn 0:3ac96e360672 925
charlesmn 0:3ac96e360672 926 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_1 0x044A
charlesmn 0:3ac96e360672 927
charlesmn 0:3ac96e360672 928 #define VL53L1_MCU_RANGE_CALC__ALGO_AMBIENT_EVENTS_0 0x044B
charlesmn 0:3ac96e360672 929
charlesmn 0:3ac96e360672 930 #define VL53L1_MCU_RANGE_CALC__SPARE_6 0x044C
charlesmn 0:3ac96e360672 931
charlesmn 0:3ac96e360672 932 #define VL53L1_MCU_RANGE_CALC__SPARE_6_HI 0x044C
charlesmn 0:3ac96e360672 933
charlesmn 0:3ac96e360672 934 #define VL53L1_MCU_RANGE_CALC__SPARE_6_LO 0x044D
charlesmn 0:3ac96e360672 935
charlesmn 0:3ac96e360672 936 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD 0x044E
charlesmn 0:3ac96e360672 937
charlesmn 0:3ac96e360672 938 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_HI 0x044E
charlesmn 0:3ac96e360672 939
charlesmn 0:3ac96e360672 940 #define VL53L1_MCU_RANGE_CALC__ALGO_ADJUST_VCSEL_PERIOD_LO 0x044F
charlesmn 0:3ac96e360672 941
charlesmn 0:3ac96e360672 942 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS 0x0450
charlesmn 0:3ac96e360672 943
charlesmn 0:3ac96e360672 944 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_HI 0x0450
charlesmn 0:3ac96e360672 945
charlesmn 0:3ac96e360672 946 #define VL53L1_MCU_RANGE_CALC__NUM_SPADS_LO 0x0451
charlesmn 0:3ac96e360672 947
charlesmn 0:3ac96e360672 948 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT 0x0452
charlesmn 0:3ac96e360672 949
charlesmn 0:3ac96e360672 950 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_HI 0x0452
charlesmn 0:3ac96e360672 951
charlesmn 0:3ac96e360672 952 #define VL53L1_MCU_RANGE_CALC__PHASE_OUTPUT_LO 0x0453
charlesmn 0:3ac96e360672 953
charlesmn 0:3ac96e360672 954 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS 0x0454
charlesmn 0:3ac96e360672 955
charlesmn 0:3ac96e360672 956 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_3 0x0454
charlesmn 0:3ac96e360672 957
charlesmn 0:3ac96e360672 958 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_2 0x0455
charlesmn 0:3ac96e360672 959
charlesmn 0:3ac96e360672 960 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_1 0x0456
charlesmn 0:3ac96e360672 961
charlesmn 0:3ac96e360672 962 #define VL53L1_MCU_RANGE_CALC__RATE_PER_SPAD_MCPS_0 0x0457
charlesmn 0:3ac96e360672 963
charlesmn 0:3ac96e360672 964 #define VL53L1_MCU_RANGE_CALC__SPARE_7 0x0458
charlesmn 0:3ac96e360672 965
charlesmn 0:3ac96e360672 966 #define VL53L1_MCU_RANGE_CALC__SPARE_8 0x0459
charlesmn 0:3ac96e360672 967
charlesmn 0:3ac96e360672 968 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS 0x045A
charlesmn 0:3ac96e360672 969
charlesmn 0:3ac96e360672 970 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_HI 0x045A
charlesmn 0:3ac96e360672 971
charlesmn 0:3ac96e360672 972 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_MCPS_LO 0x045B
charlesmn 0:3ac96e360672 973
charlesmn 0:3ac96e360672 974 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS 0x045C
charlesmn 0:3ac96e360672 975
charlesmn 0:3ac96e360672 976 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_HI 0x045C
charlesmn 0:3ac96e360672 977
charlesmn 0:3ac96e360672 978 #define VL53L1_MCU_RANGE_CALC__AVG_SIGNAL_RATE_MCPS_LO 0x045D
charlesmn 0:3ac96e360672 979
charlesmn 0:3ac96e360672 980 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS 0x045E
charlesmn 0:3ac96e360672 981
charlesmn 0:3ac96e360672 982 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_HI 0x045E
charlesmn 0:3ac96e360672 983
charlesmn 0:3ac96e360672 984 #define VL53L1_MCU_RANGE_CALC__AMBIENT_RATE_MCPS_LO 0x045F
charlesmn 0:3ac96e360672 985
charlesmn 0:3ac96e360672 986 #define VL53L1_MCU_RANGE_CALC__XTALK 0x0460
charlesmn 0:3ac96e360672 987
charlesmn 0:3ac96e360672 988 #define VL53L1_MCU_RANGE_CALC__XTALK_HI 0x0460
charlesmn 0:3ac96e360672 989
charlesmn 0:3ac96e360672 990 #define VL53L1_MCU_RANGE_CALC__XTALK_LO 0x0461
charlesmn 0:3ac96e360672 991
charlesmn 0:3ac96e360672 992 #define VL53L1_MCU_RANGE_CALC__CALC_STATUS 0x0462
charlesmn 0:3ac96e360672 993
charlesmn 0:3ac96e360672 994 #define VL53L1_MCU_RANGE_CALC__DEBUG 0x0463
charlesmn 0:3ac96e360672 995
charlesmn 0:3ac96e360672 996 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS 0x0464
charlesmn 0:3ac96e360672 997
charlesmn 0:3ac96e360672 998 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_HI 0x0464
charlesmn 0:3ac96e360672 999
charlesmn 0:3ac96e360672 1000 #define VL53L1_MCU_RANGE_CALC__PEAK_SIGNAL_RATE_XTALK_CORR_MCPS_LO 0x0465
charlesmn 0:3ac96e360672 1001
charlesmn 0:3ac96e360672 1002 #define VL53L1_MCU_RANGE_CALC__SPARE_0 0x0468
charlesmn 0:3ac96e360672 1003
charlesmn 0:3ac96e360672 1004 #define VL53L1_MCU_RANGE_CALC__SPARE_1 0x0469
charlesmn 0:3ac96e360672 1005
charlesmn 0:3ac96e360672 1006 #define VL53L1_MCU_RANGE_CALC__SPARE_2 0x046A
charlesmn 0:3ac96e360672 1007
charlesmn 0:3ac96e360672 1008 #define VL53L1_MCU_RANGE_CALC__SPARE_3 0x046B
charlesmn 0:3ac96e360672 1009
charlesmn 0:3ac96e360672 1010 #define VL53L1_PATCH__CTRL 0x0470
charlesmn 0:3ac96e360672 1011
charlesmn 0:3ac96e360672 1012 #define VL53L1_PATCH__JMP_ENABLES 0x0472
charlesmn 0:3ac96e360672 1013
charlesmn 0:3ac96e360672 1014 #define VL53L1_PATCH__JMP_ENABLES_HI 0x0472
charlesmn 0:3ac96e360672 1015
charlesmn 0:3ac96e360672 1016 #define VL53L1_PATCH__JMP_ENABLES_LO 0x0473
charlesmn 0:3ac96e360672 1017
charlesmn 0:3ac96e360672 1018 #define VL53L1_PATCH__DATA_ENABLES 0x0474
charlesmn 0:3ac96e360672 1019
charlesmn 0:3ac96e360672 1020 #define VL53L1_PATCH__DATA_ENABLES_HI 0x0474
charlesmn 0:3ac96e360672 1021
charlesmn 0:3ac96e360672 1022 #define VL53L1_PATCH__DATA_ENABLES_LO 0x0475
charlesmn 0:3ac96e360672 1023
charlesmn 0:3ac96e360672 1024 #define VL53L1_PATCH__OFFSET_0 0x0476
charlesmn 0:3ac96e360672 1025
charlesmn 0:3ac96e360672 1026 #define VL53L1_PATCH__OFFSET_0_HI 0x0476
charlesmn 0:3ac96e360672 1027
charlesmn 0:3ac96e360672 1028 #define VL53L1_PATCH__OFFSET_0_LO 0x0477
charlesmn 0:3ac96e360672 1029
charlesmn 0:3ac96e360672 1030 #define VL53L1_PATCH__OFFSET_1 0x0478
charlesmn 0:3ac96e360672 1031
charlesmn 0:3ac96e360672 1032 #define VL53L1_PATCH__OFFSET_1_HI 0x0478
charlesmn 0:3ac96e360672 1033
charlesmn 0:3ac96e360672 1034 #define VL53L1_PATCH__OFFSET_1_LO 0x0479
charlesmn 0:3ac96e360672 1035
charlesmn 0:3ac96e360672 1036 #define VL53L1_PATCH__OFFSET_2 0x047A
charlesmn 0:3ac96e360672 1037
charlesmn 0:3ac96e360672 1038 #define VL53L1_PATCH__OFFSET_2_HI 0x047A
charlesmn 0:3ac96e360672 1039
charlesmn 0:3ac96e360672 1040 #define VL53L1_PATCH__OFFSET_2_LO 0x047B
charlesmn 0:3ac96e360672 1041
charlesmn 0:3ac96e360672 1042 #define VL53L1_PATCH__OFFSET_3 0x047C
charlesmn 0:3ac96e360672 1043
charlesmn 0:3ac96e360672 1044 #define VL53L1_PATCH__OFFSET_3_HI 0x047C
charlesmn 0:3ac96e360672 1045
charlesmn 0:3ac96e360672 1046 #define VL53L1_PATCH__OFFSET_3_LO 0x047D
charlesmn 0:3ac96e360672 1047
charlesmn 0:3ac96e360672 1048 #define VL53L1_PATCH__OFFSET_4 0x047E
charlesmn 0:3ac96e360672 1049
charlesmn 0:3ac96e360672 1050 #define VL53L1_PATCH__OFFSET_4_HI 0x047E
charlesmn 0:3ac96e360672 1051
charlesmn 0:3ac96e360672 1052 #define VL53L1_PATCH__OFFSET_4_LO 0x047F
charlesmn 0:3ac96e360672 1053
charlesmn 0:3ac96e360672 1054 #define VL53L1_PATCH__OFFSET_5 0x0480
charlesmn 0:3ac96e360672 1055
charlesmn 0:3ac96e360672 1056 #define VL53L1_PATCH__OFFSET_5_HI 0x0480
charlesmn 0:3ac96e360672 1057
charlesmn 0:3ac96e360672 1058 #define VL53L1_PATCH__OFFSET_5_LO 0x0481
charlesmn 0:3ac96e360672 1059
charlesmn 0:3ac96e360672 1060 #define VL53L1_PATCH__OFFSET_6 0x0482
charlesmn 0:3ac96e360672 1061
charlesmn 0:3ac96e360672 1062 #define VL53L1_PATCH__OFFSET_6_HI 0x0482
charlesmn 0:3ac96e360672 1063
charlesmn 0:3ac96e360672 1064 #define VL53L1_PATCH__OFFSET_6_LO 0x0483
charlesmn 0:3ac96e360672 1065
charlesmn 0:3ac96e360672 1066 #define VL53L1_PATCH__OFFSET_7 0x0484
charlesmn 0:3ac96e360672 1067
charlesmn 0:3ac96e360672 1068 #define VL53L1_PATCH__OFFSET_7_HI 0x0484
charlesmn 0:3ac96e360672 1069
charlesmn 0:3ac96e360672 1070 #define VL53L1_PATCH__OFFSET_7_LO 0x0485
charlesmn 0:3ac96e360672 1071
charlesmn 0:3ac96e360672 1072 #define VL53L1_PATCH__OFFSET_8 0x0486
charlesmn 0:3ac96e360672 1073
charlesmn 0:3ac96e360672 1074 #define VL53L1_PATCH__OFFSET_8_HI 0x0486
charlesmn 0:3ac96e360672 1075
charlesmn 0:3ac96e360672 1076 #define VL53L1_PATCH__OFFSET_8_LO 0x0487
charlesmn 0:3ac96e360672 1077
charlesmn 0:3ac96e360672 1078 #define VL53L1_PATCH__OFFSET_9 0x0488
charlesmn 0:3ac96e360672 1079
charlesmn 0:3ac96e360672 1080 #define VL53L1_PATCH__OFFSET_9_HI 0x0488
charlesmn 0:3ac96e360672 1081
charlesmn 0:3ac96e360672 1082 #define VL53L1_PATCH__OFFSET_9_LO 0x0489
charlesmn 0:3ac96e360672 1083
charlesmn 0:3ac96e360672 1084 #define VL53L1_PATCH__OFFSET_10 0x048A
charlesmn 0:3ac96e360672 1085
charlesmn 0:3ac96e360672 1086 #define VL53L1_PATCH__OFFSET_10_HI 0x048A
charlesmn 0:3ac96e360672 1087
charlesmn 0:3ac96e360672 1088 #define VL53L1_PATCH__OFFSET_10_LO 0x048B
charlesmn 0:3ac96e360672 1089
charlesmn 0:3ac96e360672 1090 #define VL53L1_PATCH__OFFSET_11 0x048C
charlesmn 0:3ac96e360672 1091
charlesmn 0:3ac96e360672 1092 #define VL53L1_PATCH__OFFSET_11_HI 0x048C
charlesmn 0:3ac96e360672 1093
charlesmn 0:3ac96e360672 1094 #define VL53L1_PATCH__OFFSET_11_LO 0x048D
charlesmn 0:3ac96e360672 1095
charlesmn 0:3ac96e360672 1096 #define VL53L1_PATCH__OFFSET_12 0x048E
charlesmn 0:3ac96e360672 1097
charlesmn 0:3ac96e360672 1098 #define VL53L1_PATCH__OFFSET_12_HI 0x048E
charlesmn 0:3ac96e360672 1099
charlesmn 0:3ac96e360672 1100 #define VL53L1_PATCH__OFFSET_12_LO 0x048F
charlesmn 0:3ac96e360672 1101
charlesmn 0:3ac96e360672 1102 #define VL53L1_PATCH__OFFSET_13 0x0490
charlesmn 0:3ac96e360672 1103
charlesmn 0:3ac96e360672 1104 #define VL53L1_PATCH__OFFSET_13_HI 0x0490
charlesmn 0:3ac96e360672 1105
charlesmn 0:3ac96e360672 1106 #define VL53L1_PATCH__OFFSET_13_LO 0x0491
charlesmn 0:3ac96e360672 1107
charlesmn 0:3ac96e360672 1108 #define VL53L1_PATCH__OFFSET_14 0x0492
charlesmn 0:3ac96e360672 1109
charlesmn 0:3ac96e360672 1110 #define VL53L1_PATCH__OFFSET_14_HI 0x0492
charlesmn 0:3ac96e360672 1111
charlesmn 0:3ac96e360672 1112 #define VL53L1_PATCH__OFFSET_14_LO 0x0493
charlesmn 0:3ac96e360672 1113
charlesmn 0:3ac96e360672 1114 #define VL53L1_PATCH__OFFSET_15 0x0494
charlesmn 0:3ac96e360672 1115
charlesmn 0:3ac96e360672 1116 #define VL53L1_PATCH__OFFSET_15_HI 0x0494
charlesmn 0:3ac96e360672 1117
charlesmn 0:3ac96e360672 1118 #define VL53L1_PATCH__OFFSET_15_LO 0x0495
charlesmn 0:3ac96e360672 1119
charlesmn 0:3ac96e360672 1120 #define VL53L1_PATCH__ADDRESS_0 0x0496
charlesmn 0:3ac96e360672 1121
charlesmn 0:3ac96e360672 1122 #define VL53L1_PATCH__ADDRESS_0_HI 0x0496
charlesmn 0:3ac96e360672 1123
charlesmn 0:3ac96e360672 1124 #define VL53L1_PATCH__ADDRESS_0_LO 0x0497
charlesmn 0:3ac96e360672 1125
charlesmn 0:3ac96e360672 1126 #define VL53L1_PATCH__ADDRESS_1 0x0498
charlesmn 0:3ac96e360672 1127
charlesmn 0:3ac96e360672 1128 #define VL53L1_PATCH__ADDRESS_1_HI 0x0498
charlesmn 0:3ac96e360672 1129
charlesmn 0:3ac96e360672 1130 #define VL53L1_PATCH__ADDRESS_1_LO 0x0499
charlesmn 0:3ac96e360672 1131
charlesmn 0:3ac96e360672 1132 #define VL53L1_PATCH__ADDRESS_2 0x049A
charlesmn 0:3ac96e360672 1133
charlesmn 0:3ac96e360672 1134 #define VL53L1_PATCH__ADDRESS_2_HI 0x049A
charlesmn 0:3ac96e360672 1135
charlesmn 0:3ac96e360672 1136 #define VL53L1_PATCH__ADDRESS_2_LO 0x049B
charlesmn 0:3ac96e360672 1137
charlesmn 0:3ac96e360672 1138 #define VL53L1_PATCH__ADDRESS_3 0x049C
charlesmn 0:3ac96e360672 1139
charlesmn 0:3ac96e360672 1140 #define VL53L1_PATCH__ADDRESS_3_HI 0x049C
charlesmn 0:3ac96e360672 1141
charlesmn 0:3ac96e360672 1142 #define VL53L1_PATCH__ADDRESS_3_LO 0x049D
charlesmn 0:3ac96e360672 1143
charlesmn 0:3ac96e360672 1144 #define VL53L1_PATCH__ADDRESS_4 0x049E
charlesmn 0:3ac96e360672 1145
charlesmn 0:3ac96e360672 1146 #define VL53L1_PATCH__ADDRESS_4_HI 0x049E
charlesmn 0:3ac96e360672 1147
charlesmn 0:3ac96e360672 1148 #define VL53L1_PATCH__ADDRESS_4_LO 0x049F
charlesmn 0:3ac96e360672 1149
charlesmn 0:3ac96e360672 1150 #define VL53L1_PATCH__ADDRESS_5 0x04A0
charlesmn 0:3ac96e360672 1151
charlesmn 0:3ac96e360672 1152 #define VL53L1_PATCH__ADDRESS_5_HI 0x04A0
charlesmn 0:3ac96e360672 1153
charlesmn 0:3ac96e360672 1154 #define VL53L1_PATCH__ADDRESS_5_LO 0x04A1
charlesmn 0:3ac96e360672 1155
charlesmn 0:3ac96e360672 1156 #define VL53L1_PATCH__ADDRESS_6 0x04A2
charlesmn 0:3ac96e360672 1157
charlesmn 0:3ac96e360672 1158 #define VL53L1_PATCH__ADDRESS_6_HI 0x04A2
charlesmn 0:3ac96e360672 1159
charlesmn 0:3ac96e360672 1160 #define VL53L1_PATCH__ADDRESS_6_LO 0x04A3
charlesmn 0:3ac96e360672 1161
charlesmn 0:3ac96e360672 1162 #define VL53L1_PATCH__ADDRESS_7 0x04A4
charlesmn 0:3ac96e360672 1163
charlesmn 0:3ac96e360672 1164 #define VL53L1_PATCH__ADDRESS_7_HI 0x04A4
charlesmn 0:3ac96e360672 1165
charlesmn 0:3ac96e360672 1166 #define VL53L1_PATCH__ADDRESS_7_LO 0x04A5
charlesmn 0:3ac96e360672 1167
charlesmn 0:3ac96e360672 1168 #define VL53L1_PATCH__ADDRESS_8 0x04A6
charlesmn 0:3ac96e360672 1169
charlesmn 0:3ac96e360672 1170 #define VL53L1_PATCH__ADDRESS_8_HI 0x04A6
charlesmn 0:3ac96e360672 1171
charlesmn 0:3ac96e360672 1172 #define VL53L1_PATCH__ADDRESS_8_LO 0x04A7
charlesmn 0:3ac96e360672 1173
charlesmn 0:3ac96e360672 1174 #define VL53L1_PATCH__ADDRESS_9 0x04A8
charlesmn 0:3ac96e360672 1175
charlesmn 0:3ac96e360672 1176 #define VL53L1_PATCH__ADDRESS_9_HI 0x04A8
charlesmn 0:3ac96e360672 1177
charlesmn 0:3ac96e360672 1178 #define VL53L1_PATCH__ADDRESS_9_LO 0x04A9
charlesmn 0:3ac96e360672 1179
charlesmn 0:3ac96e360672 1180 #define VL53L1_PATCH__ADDRESS_10 0x04AA
charlesmn 0:3ac96e360672 1181
charlesmn 0:3ac96e360672 1182 #define VL53L1_PATCH__ADDRESS_10_HI 0x04AA
charlesmn 0:3ac96e360672 1183
charlesmn 0:3ac96e360672 1184 #define VL53L1_PATCH__ADDRESS_10_LO 0x04AB
charlesmn 0:3ac96e360672 1185
charlesmn 0:3ac96e360672 1186 #define VL53L1_PATCH__ADDRESS_11 0x04AC
charlesmn 0:3ac96e360672 1187
charlesmn 0:3ac96e360672 1188 #define VL53L1_PATCH__ADDRESS_11_HI 0x04AC
charlesmn 0:3ac96e360672 1189
charlesmn 0:3ac96e360672 1190 #define VL53L1_PATCH__ADDRESS_11_LO 0x04AD
charlesmn 0:3ac96e360672 1191
charlesmn 0:3ac96e360672 1192 #define VL53L1_PATCH__ADDRESS_12 0x04AE
charlesmn 0:3ac96e360672 1193
charlesmn 0:3ac96e360672 1194 #define VL53L1_PATCH__ADDRESS_12_HI 0x04AE
charlesmn 0:3ac96e360672 1195
charlesmn 0:3ac96e360672 1196 #define VL53L1_PATCH__ADDRESS_12_LO 0x04AF
charlesmn 0:3ac96e360672 1197
charlesmn 0:3ac96e360672 1198 #define VL53L1_PATCH__ADDRESS_13 0x04B0
charlesmn 0:3ac96e360672 1199
charlesmn 0:3ac96e360672 1200 #define VL53L1_PATCH__ADDRESS_13_HI 0x04B0
charlesmn 0:3ac96e360672 1201
charlesmn 0:3ac96e360672 1202 #define VL53L1_PATCH__ADDRESS_13_LO 0x04B1
charlesmn 0:3ac96e360672 1203
charlesmn 0:3ac96e360672 1204 #define VL53L1_PATCH__ADDRESS_14 0x04B2
charlesmn 0:3ac96e360672 1205
charlesmn 0:3ac96e360672 1206 #define VL53L1_PATCH__ADDRESS_14_HI 0x04B2
charlesmn 0:3ac96e360672 1207
charlesmn 0:3ac96e360672 1208 #define VL53L1_PATCH__ADDRESS_14_LO 0x04B3
charlesmn 0:3ac96e360672 1209
charlesmn 0:3ac96e360672 1210 #define VL53L1_PATCH__ADDRESS_15 0x04B4
charlesmn 0:3ac96e360672 1211
charlesmn 0:3ac96e360672 1212 #define VL53L1_PATCH__ADDRESS_15_HI 0x04B4
charlesmn 0:3ac96e360672 1213
charlesmn 0:3ac96e360672 1214 #define VL53L1_PATCH__ADDRESS_15_LO 0x04B5
charlesmn 0:3ac96e360672 1215
charlesmn 0:3ac96e360672 1216 #define VL53L1_SPI_ASYNC_MUX__CTRL 0x04C0
charlesmn 0:3ac96e360672 1217
charlesmn 0:3ac96e360672 1218 #define VL53L1_CLK__CONFIG 0x04C4
charlesmn 0:3ac96e360672 1219
charlesmn 0:3ac96e360672 1220 #define VL53L1_GPIO_LV_MUX__CTRL 0x04CC
charlesmn 0:3ac96e360672 1221
charlesmn 0:3ac96e360672 1222 #define VL53L1_GPIO_LV_PAD__CTRL 0x04CD
charlesmn 0:3ac96e360672 1223
charlesmn 0:3ac96e360672 1224 #define VL53L1_PAD_I2C_LV__CONFIG 0x04D0
charlesmn 0:3ac96e360672 1225
charlesmn 0:3ac96e360672 1226 #define VL53L1_PAD_STARTUP_MODE__VALUE_RO_GO1 0x04D4
charlesmn 0:3ac96e360672 1227
charlesmn 0:3ac96e360672 1228 #define VL53L1_HOST_IF__STATUS_GO1 0x04D5
charlesmn 0:3ac96e360672 1229
charlesmn 0:3ac96e360672 1230 #define VL53L1_MCU_CLK_GATING__CTRL 0x04D8
charlesmn 0:3ac96e360672 1231
charlesmn 0:3ac96e360672 1232 #define VL53L1_TEST__BIST_ROM_CTRL 0x04E0
charlesmn 0:3ac96e360672 1233
charlesmn 0:3ac96e360672 1234 #define VL53L1_TEST__BIST_ROM_RESULT 0x04E1
charlesmn 0:3ac96e360672 1235
charlesmn 0:3ac96e360672 1236 #define VL53L1_TEST__BIST_ROM_MCU_SIG 0x04E2
charlesmn 0:3ac96e360672 1237
charlesmn 0:3ac96e360672 1238 #define VL53L1_TEST__BIST_ROM_MCU_SIG_HI 0x04E2
charlesmn 0:3ac96e360672 1239
charlesmn 0:3ac96e360672 1240 #define VL53L1_TEST__BIST_ROM_MCU_SIG_LO 0x04E3
charlesmn 0:3ac96e360672 1241
charlesmn 0:3ac96e360672 1242 #define VL53L1_TEST__BIST_RAM_CTRL 0x04E4
charlesmn 0:3ac96e360672 1243
charlesmn 0:3ac96e360672 1244 #define VL53L1_TEST__BIST_RAM_RESULT 0x04E5
charlesmn 0:3ac96e360672 1245
charlesmn 0:3ac96e360672 1246 #define VL53L1_TEST__TMC 0x04E8
charlesmn 0:3ac96e360672 1247
charlesmn 0:3ac96e360672 1248 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD 0x04F0
charlesmn 0:3ac96e360672 1249
charlesmn 0:3ac96e360672 1250 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_HI 0x04F0
charlesmn 0:3ac96e360672 1251
charlesmn 0:3ac96e360672 1252 #define VL53L1_TEST__PLL_BIST_MIN_THRESHOLD_LO 0x04F1
charlesmn 0:3ac96e360672 1253
charlesmn 0:3ac96e360672 1254 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD 0x04F2
charlesmn 0:3ac96e360672 1255
charlesmn 0:3ac96e360672 1256 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_HI 0x04F2
charlesmn 0:3ac96e360672 1257
charlesmn 0:3ac96e360672 1258 #define VL53L1_TEST__PLL_BIST_MAX_THRESHOLD_LO 0x04F3
charlesmn 0:3ac96e360672 1259
charlesmn 0:3ac96e360672 1260 #define VL53L1_TEST__PLL_BIST_COUNT_OUT 0x04F4
charlesmn 0:3ac96e360672 1261
charlesmn 0:3ac96e360672 1262 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_HI 0x04F4
charlesmn 0:3ac96e360672 1263
charlesmn 0:3ac96e360672 1264 #define VL53L1_TEST__PLL_BIST_COUNT_OUT_LO 0x04F5
charlesmn 0:3ac96e360672 1265
charlesmn 0:3ac96e360672 1266 #define VL53L1_TEST__PLL_BIST_GONOGO 0x04F6
charlesmn 0:3ac96e360672 1267
charlesmn 0:3ac96e360672 1268 #define VL53L1_TEST__PLL_BIST_CTRL 0x04F7
charlesmn 0:3ac96e360672 1269
charlesmn 0:3ac96e360672 1270 #define VL53L1_RANGING_CORE__DEVICE_ID 0x0680
charlesmn 0:3ac96e360672 1271
charlesmn 0:3ac96e360672 1272 #define VL53L1_RANGING_CORE__REVISION_ID 0x0681
charlesmn 0:3ac96e360672 1273
charlesmn 0:3ac96e360672 1274 #define VL53L1_RANGING_CORE__CLK_CTRL1 0x0683
charlesmn 0:3ac96e360672 1275
charlesmn 0:3ac96e360672 1276 #define VL53L1_RANGING_CORE__CLK_CTRL2 0x0684
charlesmn 0:3ac96e360672 1277
charlesmn 0:3ac96e360672 1278 #define VL53L1_RANGING_CORE__WOI_1 0x0685
charlesmn 0:3ac96e360672 1279
charlesmn 0:3ac96e360672 1280 #define VL53L1_RANGING_CORE__WOI_REF_1 0x0686
charlesmn 0:3ac96e360672 1281
charlesmn 0:3ac96e360672 1282 #define VL53L1_RANGING_CORE__START_RANGING 0x0687
charlesmn 0:3ac96e360672 1283
charlesmn 0:3ac96e360672 1284 #define VL53L1_RANGING_CORE__LOW_LIMIT_1 0x0690
charlesmn 0:3ac96e360672 1285
charlesmn 0:3ac96e360672 1286 #define VL53L1_RANGING_CORE__HIGH_LIMIT_1 0x0691
charlesmn 0:3ac96e360672 1287
charlesmn 0:3ac96e360672 1288 #define VL53L1_RANGING_CORE__LOW_LIMIT_REF_1 0x0692
charlesmn 0:3ac96e360672 1289
charlesmn 0:3ac96e360672 1290 #define VL53L1_RANGING_CORE__HIGH_LIMIT_REF_1 0x0693
charlesmn 0:3ac96e360672 1291
charlesmn 0:3ac96e360672 1292 #define VL53L1_RANGING_CORE__QUANTIFIER_1_MSB 0x0694
charlesmn 0:3ac96e360672 1293
charlesmn 0:3ac96e360672 1294 #define VL53L1_RANGING_CORE__QUANTIFIER_1_LSB 0x0695
charlesmn 0:3ac96e360672 1295
charlesmn 0:3ac96e360672 1296 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_MSB 0x0696
charlesmn 0:3ac96e360672 1297
charlesmn 0:3ac96e360672 1298 #define VL53L1_RANGING_CORE__QUANTIFIER_REF_1_LSB 0x0697
charlesmn 0:3ac96e360672 1299
charlesmn 0:3ac96e360672 1300 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_MSB 0x0698
charlesmn 0:3ac96e360672 1301
charlesmn 0:3ac96e360672 1302 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_1_LSB 0x0699
charlesmn 0:3ac96e360672 1303
charlesmn 0:3ac96e360672 1304 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_MSB 0x069A
charlesmn 0:3ac96e360672 1305
charlesmn 0:3ac96e360672 1306 #define VL53L1_RANGING_CORE__AMBIENT_OFFSET_REF_1_LSB 0x069B
charlesmn 0:3ac96e360672 1307
charlesmn 0:3ac96e360672 1308 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_1 0x069C
charlesmn 0:3ac96e360672 1309
charlesmn 0:3ac96e360672 1310 #define VL53L1_RANGING_CORE__FILTER_STRENGTH_REF_1 0x069D
charlesmn 0:3ac96e360672 1311
charlesmn 0:3ac96e360672 1312 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_MSB 0x069E
charlesmn 0:3ac96e360672 1313
charlesmn 0:3ac96e360672 1314 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_1_LSB 0x069F
charlesmn 0:3ac96e360672 1315
charlesmn 0:3ac96e360672 1316 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_MSB 0x06A0
charlesmn 0:3ac96e360672 1317
charlesmn 0:3ac96e360672 1318 #define VL53L1_RANGING_CORE__SIGNAL_EVENT_LIMIT_REF_1_LSB 0x06A1
charlesmn 0:3ac96e360672 1319
charlesmn 0:3ac96e360672 1320 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_MSB 0x06A4
charlesmn 0:3ac96e360672 1321
charlesmn 0:3ac96e360672 1322 #define VL53L1_RANGING_CORE__TIMEOUT_OVERALL_PERIODS_LSB 0x06A5
charlesmn 0:3ac96e360672 1323
charlesmn 0:3ac96e360672 1324 #define VL53L1_RANGING_CORE__INVERT_HW 0x06A6
charlesmn 0:3ac96e360672 1325
charlesmn 0:3ac96e360672 1326 #define VL53L1_RANGING_CORE__FORCE_HW 0x06A7
charlesmn 0:3ac96e360672 1327
charlesmn 0:3ac96e360672 1328 #define VL53L1_RANGING_CORE__STATIC_HW_VALUE 0x06A8
charlesmn 0:3ac96e360672 1329
charlesmn 0:3ac96e360672 1330 #define VL53L1_RANGING_CORE__FORCE_CONTINUOUS_AMBIENT 0x06A9
charlesmn 0:3ac96e360672 1331
charlesmn 0:3ac96e360672 1332 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_FILTER 0x06AA
charlesmn 0:3ac96e360672 1333
charlesmn 0:3ac96e360672 1334 #define VL53L1_RANGING_CORE__TEST_PHASE_SELECT_TO_TIMING_GEN 0x06AB
charlesmn 0:3ac96e360672 1335
charlesmn 0:3ac96e360672 1336 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_1 0x06AC
charlesmn 0:3ac96e360672 1337
charlesmn 0:3ac96e360672 1338 #define VL53L1_RANGING_CORE__INITIAL_PHASE_VALUE_REF_1 0x06AD
charlesmn 0:3ac96e360672 1339
charlesmn 0:3ac96e360672 1340 #define VL53L1_RANGING_CORE__FORCE_UP_IN 0x06AE
charlesmn 0:3ac96e360672 1341
charlesmn 0:3ac96e360672 1342 #define VL53L1_RANGING_CORE__FORCE_DN_IN 0x06AF
charlesmn 0:3ac96e360672 1343
charlesmn 0:3ac96e360672 1344 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_1 0x06B0
charlesmn 0:3ac96e360672 1345
charlesmn 0:3ac96e360672 1346 #define VL53L1_RANGING_CORE__STATIC_UP_VALUE_REF_1 0x06B1
charlesmn 0:3ac96e360672 1347
charlesmn 0:3ac96e360672 1348 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_1 0x06B2
charlesmn 0:3ac96e360672 1349
charlesmn 0:3ac96e360672 1350 #define VL53L1_RANGING_CORE__STATIC_DN_VALUE_REF_1 0x06B3
charlesmn 0:3ac96e360672 1351
charlesmn 0:3ac96e360672 1352 #define VL53L1_RANGING_CORE__MONITOR_UP_DN 0x06B4
charlesmn 0:3ac96e360672 1353
charlesmn 0:3ac96e360672 1354 #define VL53L1_RANGING_CORE__INVERT_UP_DN 0x06B5
charlesmn 0:3ac96e360672 1355
charlesmn 0:3ac96e360672 1356 #define VL53L1_RANGING_CORE__CPUMP_1 0x06B6
charlesmn 0:3ac96e360672 1357
charlesmn 0:3ac96e360672 1358 #define VL53L1_RANGING_CORE__CPUMP_2 0x06B7
charlesmn 0:3ac96e360672 1359
charlesmn 0:3ac96e360672 1360 #define VL53L1_RANGING_CORE__CPUMP_3 0x06B8
charlesmn 0:3ac96e360672 1361
charlesmn 0:3ac96e360672 1362 #define VL53L1_RANGING_CORE__OSC_1 0x06B9
charlesmn 0:3ac96e360672 1363
charlesmn 0:3ac96e360672 1364 #define VL53L1_RANGING_CORE__PLL_1 0x06BB
charlesmn 0:3ac96e360672 1365
charlesmn 0:3ac96e360672 1366 #define VL53L1_RANGING_CORE__PLL_2 0x06BC
charlesmn 0:3ac96e360672 1367
charlesmn 0:3ac96e360672 1368 #define VL53L1_RANGING_CORE__REFERENCE_1 0x06BD
charlesmn 0:3ac96e360672 1369
charlesmn 0:3ac96e360672 1370 #define VL53L1_RANGING_CORE__REFERENCE_3 0x06BF
charlesmn 0:3ac96e360672 1371
charlesmn 0:3ac96e360672 1372 #define VL53L1_RANGING_CORE__REFERENCE_4 0x06C0
charlesmn 0:3ac96e360672 1373
charlesmn 0:3ac96e360672 1374 #define VL53L1_RANGING_CORE__REFERENCE_5 0x06C1
charlesmn 0:3ac96e360672 1375
charlesmn 0:3ac96e360672 1376 #define VL53L1_RANGING_CORE__REGAVDD1V2 0x06C3
charlesmn 0:3ac96e360672 1377
charlesmn 0:3ac96e360672 1378 #define VL53L1_RANGING_CORE__CALIB_1 0x06C4
charlesmn 0:3ac96e360672 1379
charlesmn 0:3ac96e360672 1380 #define VL53L1_RANGING_CORE__CALIB_2 0x06C5
charlesmn 0:3ac96e360672 1381
charlesmn 0:3ac96e360672 1382 #define VL53L1_RANGING_CORE__CALIB_3 0x06C6
charlesmn 0:3ac96e360672 1383
charlesmn 0:3ac96e360672 1384 #define VL53L1_RANGING_CORE__TST_MUX_SEL1 0x06C9
charlesmn 0:3ac96e360672 1385
charlesmn 0:3ac96e360672 1386 #define VL53L1_RANGING_CORE__TST_MUX_SEL2 0x06CA
charlesmn 0:3ac96e360672 1387
charlesmn 0:3ac96e360672 1388 #define VL53L1_RANGING_CORE__TST_MUX 0x06CB
charlesmn 0:3ac96e360672 1389
charlesmn 0:3ac96e360672 1390 #define VL53L1_RANGING_CORE__GPIO_OUT_TESTMUX 0x06CC
charlesmn 0:3ac96e360672 1391
charlesmn 0:3ac96e360672 1392 #define VL53L1_RANGING_CORE__CUSTOM_FE 0x06CD
charlesmn 0:3ac96e360672 1393
charlesmn 0:3ac96e360672 1394 #define VL53L1_RANGING_CORE__CUSTOM_FE_2 0x06CE
charlesmn 0:3ac96e360672 1395
charlesmn 0:3ac96e360672 1396 #define VL53L1_RANGING_CORE__SPAD_READOUT 0x06CF
charlesmn 0:3ac96e360672 1397
charlesmn 0:3ac96e360672 1398 #define VL53L1_RANGING_CORE__SPAD_READOUT_1 0x06D0
charlesmn 0:3ac96e360672 1399
charlesmn 0:3ac96e360672 1400 #define VL53L1_RANGING_CORE__SPAD_READOUT_2 0x06D1
charlesmn 0:3ac96e360672 1401
charlesmn 0:3ac96e360672 1402 #define VL53L1_RANGING_CORE__SPAD_PS 0x06D2
charlesmn 0:3ac96e360672 1403
charlesmn 0:3ac96e360672 1404 #define VL53L1_RANGING_CORE__LASER_SAFETY_2 0x06D4
charlesmn 0:3ac96e360672 1405
charlesmn 0:3ac96e360672 1406 #define VL53L1_RANGING_CORE__NVM_CTRL__MODE 0x0780
charlesmn 0:3ac96e360672 1407
charlesmn 0:3ac96e360672 1408 #define VL53L1_RANGING_CORE__NVM_CTRL__PDN 0x0781
charlesmn 0:3ac96e360672 1409
charlesmn 0:3ac96e360672 1410 #define VL53L1_RANGING_CORE__NVM_CTRL__PROGN 0x0782
charlesmn 0:3ac96e360672 1411
charlesmn 0:3ac96e360672 1412 #define VL53L1_RANGING_CORE__NVM_CTRL__READN 0x0783
charlesmn 0:3ac96e360672 1413
charlesmn 0:3ac96e360672 1414 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_MSB 0x0784
charlesmn 0:3ac96e360672 1415
charlesmn 0:3ac96e360672 1416 #define VL53L1_RANGING_CORE__NVM_CTRL__PULSE_WIDTH_LSB 0x0785
charlesmn 0:3ac96e360672 1417
charlesmn 0:3ac96e360672 1418 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_MSB 0x0786
charlesmn 0:3ac96e360672 1419
charlesmn 0:3ac96e360672 1420 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_RISE_LSB 0x0787
charlesmn 0:3ac96e360672 1421
charlesmn 0:3ac96e360672 1422 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_MSB 0x0788
charlesmn 0:3ac96e360672 1423
charlesmn 0:3ac96e360672 1424 #define VL53L1_RANGING_CORE__NVM_CTRL__HV_FALL_LSB 0x0789
charlesmn 0:3ac96e360672 1425
charlesmn 0:3ac96e360672 1426 #define VL53L1_RANGING_CORE__NVM_CTRL__TST 0x078A
charlesmn 0:3ac96e360672 1427
charlesmn 0:3ac96e360672 1428 #define VL53L1_RANGING_CORE__NVM_CTRL__TESTREAD 0x078B
charlesmn 0:3ac96e360672 1429
charlesmn 0:3ac96e360672 1430 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_MMM 0x078C
charlesmn 0:3ac96e360672 1431
charlesmn 0:3ac96e360672 1432 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LMM 0x078D
charlesmn 0:3ac96e360672 1433
charlesmn 0:3ac96e360672 1434 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLM 0x078E
charlesmn 0:3ac96e360672 1435
charlesmn 0:3ac96e360672 1436 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAIN_LLL 0x078F
charlesmn 0:3ac96e360672 1437
charlesmn 0:3ac96e360672 1438 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_MMM 0x0790
charlesmn 0:3ac96e360672 1439
charlesmn 0:3ac96e360672 1440 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LMM 0x0791
charlesmn 0:3ac96e360672 1441
charlesmn 0:3ac96e360672 1442 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLM 0x0792
charlesmn 0:3ac96e360672 1443
charlesmn 0:3ac96e360672 1444 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_LLL 0x0793
charlesmn 0:3ac96e360672 1445
charlesmn 0:3ac96e360672 1446 #define VL53L1_RANGING_CORE__NVM_CTRL__ADDR 0x0794
charlesmn 0:3ac96e360672 1447
charlesmn 0:3ac96e360672 1448 #define VL53L1_RANGING_CORE__NVM_CTRL__DATAOUT_ECC 0x0795
charlesmn 0:3ac96e360672 1449
charlesmn 0:3ac96e360672 1450 #define VL53L1_RANGING_CORE__RET_SPAD_EN_0 0x0796
charlesmn 0:3ac96e360672 1451
charlesmn 0:3ac96e360672 1452 #define VL53L1_RANGING_CORE__RET_SPAD_EN_1 0x0797
charlesmn 0:3ac96e360672 1453
charlesmn 0:3ac96e360672 1454 #define VL53L1_RANGING_CORE__RET_SPAD_EN_2 0x0798
charlesmn 0:3ac96e360672 1455
charlesmn 0:3ac96e360672 1456 #define VL53L1_RANGING_CORE__RET_SPAD_EN_3 0x0799
charlesmn 0:3ac96e360672 1457
charlesmn 0:3ac96e360672 1458 #define VL53L1_RANGING_CORE__RET_SPAD_EN_4 0x079A
charlesmn 0:3ac96e360672 1459
charlesmn 0:3ac96e360672 1460 #define VL53L1_RANGING_CORE__RET_SPAD_EN_5 0x079B
charlesmn 0:3ac96e360672 1461
charlesmn 0:3ac96e360672 1462 #define VL53L1_RANGING_CORE__RET_SPAD_EN_6 0x079C
charlesmn 0:3ac96e360672 1463
charlesmn 0:3ac96e360672 1464 #define VL53L1_RANGING_CORE__RET_SPAD_EN_7 0x079D
charlesmn 0:3ac96e360672 1465
charlesmn 0:3ac96e360672 1466 #define VL53L1_RANGING_CORE__RET_SPAD_EN_8 0x079E
charlesmn 0:3ac96e360672 1467
charlesmn 0:3ac96e360672 1468 #define VL53L1_RANGING_CORE__RET_SPAD_EN_9 0x079F
charlesmn 0:3ac96e360672 1469
charlesmn 0:3ac96e360672 1470 #define VL53L1_RANGING_CORE__RET_SPAD_EN_10 0x07A0
charlesmn 0:3ac96e360672 1471
charlesmn 0:3ac96e360672 1472 #define VL53L1_RANGING_CORE__RET_SPAD_EN_11 0x07A1
charlesmn 0:3ac96e360672 1473
charlesmn 0:3ac96e360672 1474 #define VL53L1_RANGING_CORE__RET_SPAD_EN_12 0x07A2
charlesmn 0:3ac96e360672 1475
charlesmn 0:3ac96e360672 1476 #define VL53L1_RANGING_CORE__RET_SPAD_EN_13 0x07A3
charlesmn 0:3ac96e360672 1477
charlesmn 0:3ac96e360672 1478 #define VL53L1_RANGING_CORE__RET_SPAD_EN_14 0x07A4
charlesmn 0:3ac96e360672 1479
charlesmn 0:3ac96e360672 1480 #define VL53L1_RANGING_CORE__RET_SPAD_EN_15 0x07A5
charlesmn 0:3ac96e360672 1481
charlesmn 0:3ac96e360672 1482 #define VL53L1_RANGING_CORE__RET_SPAD_EN_16 0x07A6
charlesmn 0:3ac96e360672 1483
charlesmn 0:3ac96e360672 1484 #define VL53L1_RANGING_CORE__RET_SPAD_EN_17 0x07A7
charlesmn 0:3ac96e360672 1485
charlesmn 0:3ac96e360672 1486 #define VL53L1_RANGING_CORE__SPAD_SHIFT_EN 0x07BA
charlesmn 0:3ac96e360672 1487
charlesmn 0:3ac96e360672 1488 #define VL53L1_RANGING_CORE__SPAD_DISABLE_CTRL 0x07BB
charlesmn 0:3ac96e360672 1489
charlesmn 0:3ac96e360672 1490 #define VL53L1_RANGING_CORE__SPAD_EN_SHIFT_OUT_DEBUG 0x07BC
charlesmn 0:3ac96e360672 1491
charlesmn 0:3ac96e360672 1492 #define VL53L1_RANGING_CORE__SPI_MODE 0x07BD
charlesmn 0:3ac96e360672 1493
charlesmn 0:3ac96e360672 1494 #define VL53L1_RANGING_CORE__GPIO_DIR 0x07BE
charlesmn 0:3ac96e360672 1495
charlesmn 0:3ac96e360672 1496 #define VL53L1_RANGING_CORE__VCSEL_PERIOD 0x0880
charlesmn 0:3ac96e360672 1497
charlesmn 0:3ac96e360672 1498 #define VL53L1_RANGING_CORE__VCSEL_START 0x0881
charlesmn 0:3ac96e360672 1499
charlesmn 0:3ac96e360672 1500 #define VL53L1_RANGING_CORE__VCSEL_STOP 0x0882
charlesmn 0:3ac96e360672 1501
charlesmn 0:3ac96e360672 1502 #define VL53L1_RANGING_CORE__VCSEL_1 0x0885
charlesmn 0:3ac96e360672 1503
charlesmn 0:3ac96e360672 1504 #define VL53L1_RANGING_CORE__VCSEL_STATUS 0x088D
charlesmn 0:3ac96e360672 1505
charlesmn 0:3ac96e360672 1506 #define VL53L1_RANGING_CORE__STATUS 0x0980
charlesmn 0:3ac96e360672 1507
charlesmn 0:3ac96e360672 1508 #define VL53L1_RANGING_CORE__LASER_CONTINUITY_STATE 0x0981
charlesmn 0:3ac96e360672 1509
charlesmn 0:3ac96e360672 1510 #define VL53L1_RANGING_CORE__RANGE_1_MMM 0x0982
charlesmn 0:3ac96e360672 1511
charlesmn 0:3ac96e360672 1512 #define VL53L1_RANGING_CORE__RANGE_1_LMM 0x0983
charlesmn 0:3ac96e360672 1513
charlesmn 0:3ac96e360672 1514 #define VL53L1_RANGING_CORE__RANGE_1_LLM 0x0984
charlesmn 0:3ac96e360672 1515
charlesmn 0:3ac96e360672 1516 #define VL53L1_RANGING_CORE__RANGE_1_LLL 0x0985
charlesmn 0:3ac96e360672 1517
charlesmn 0:3ac96e360672 1518 #define VL53L1_RANGING_CORE__RANGE_REF_1_MMM 0x0986
charlesmn 0:3ac96e360672 1519
charlesmn 0:3ac96e360672 1520 #define VL53L1_RANGING_CORE__RANGE_REF_1_LMM 0x0987
charlesmn 0:3ac96e360672 1521
charlesmn 0:3ac96e360672 1522 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLM 0x0988
charlesmn 0:3ac96e360672 1523
charlesmn 0:3ac96e360672 1524 #define VL53L1_RANGING_CORE__RANGE_REF_1_LLL 0x0989
charlesmn 0:3ac96e360672 1525
charlesmn 0:3ac96e360672 1526 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_MMM 0x098A
charlesmn 0:3ac96e360672 1527
charlesmn 0:3ac96e360672 1528 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LMM 0x098B
charlesmn 0:3ac96e360672 1529
charlesmn 0:3ac96e360672 1530 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLM 0x098C
charlesmn 0:3ac96e360672 1531
charlesmn 0:3ac96e360672 1532 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_1_LLL 0x098D
charlesmn 0:3ac96e360672 1533
charlesmn 0:3ac96e360672 1534 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_MMM 0x098E
charlesmn 0:3ac96e360672 1535
charlesmn 0:3ac96e360672 1536 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LMM 0x098F
charlesmn 0:3ac96e360672 1537
charlesmn 0:3ac96e360672 1538 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLM 0x0990
charlesmn 0:3ac96e360672 1539
charlesmn 0:3ac96e360672 1540 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_1_LLL 0x0991
charlesmn 0:3ac96e360672 1541
charlesmn 0:3ac96e360672 1542 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_MMM 0x0992
charlesmn 0:3ac96e360672 1543
charlesmn 0:3ac96e360672 1544 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LMM 0x0993
charlesmn 0:3ac96e360672 1545
charlesmn 0:3ac96e360672 1546 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLM 0x0994
charlesmn 0:3ac96e360672 1547
charlesmn 0:3ac96e360672 1548 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_1_LLL 0x0995
charlesmn 0:3ac96e360672 1549
charlesmn 0:3ac96e360672 1550 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_MM 0x0996
charlesmn 0:3ac96e360672 1551
charlesmn 0:3ac96e360672 1552 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LM 0x0997
charlesmn 0:3ac96e360672 1553
charlesmn 0:3ac96e360672 1554 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_1_LL 0x0998
charlesmn 0:3ac96e360672 1555
charlesmn 0:3ac96e360672 1556 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_MM 0x0999
charlesmn 0:3ac96e360672 1557
charlesmn 0:3ac96e360672 1558 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LM 0x099A
charlesmn 0:3ac96e360672 1559
charlesmn 0:3ac96e360672 1560 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_LL 0x099B
charlesmn 0:3ac96e360672 1561
charlesmn 0:3ac96e360672 1562 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_MMM 0x099C
charlesmn 0:3ac96e360672 1563
charlesmn 0:3ac96e360672 1564 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LMM 0x099D
charlesmn 0:3ac96e360672 1565
charlesmn 0:3ac96e360672 1566 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLM 0x099E
charlesmn 0:3ac96e360672 1567
charlesmn 0:3ac96e360672 1568 #define VL53L1_RANGING_CORE__AMBIENT_WINDOW_EVENTS_REF_1_LLL 0x099F
charlesmn 0:3ac96e360672 1569
charlesmn 0:3ac96e360672 1570 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_MMM 0x09A0
charlesmn 0:3ac96e360672 1571
charlesmn 0:3ac96e360672 1572 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LMM 0x09A1
charlesmn 0:3ac96e360672 1573
charlesmn 0:3ac96e360672 1574 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLM 0x09A2
charlesmn 0:3ac96e360672 1575
charlesmn 0:3ac96e360672 1576 #define VL53L1_RANGING_CORE__RANGING_TOTAL_EVENTS_REF_1_LLL 0x09A3
charlesmn 0:3ac96e360672 1577
charlesmn 0:3ac96e360672 1578 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_MMM 0x09A4
charlesmn 0:3ac96e360672 1579
charlesmn 0:3ac96e360672 1580 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LMM 0x09A5
charlesmn 0:3ac96e360672 1581
charlesmn 0:3ac96e360672 1582 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLM 0x09A6
charlesmn 0:3ac96e360672 1583
charlesmn 0:3ac96e360672 1584 #define VL53L1_RANGING_CORE__SIGNAL_TOTAL_EVENTS_REF_1_LLL 0x09A7
charlesmn 0:3ac96e360672 1585
charlesmn 0:3ac96e360672 1586 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_MM 0x09A8
charlesmn 0:3ac96e360672 1587
charlesmn 0:3ac96e360672 1588 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LM 0x09A9
charlesmn 0:3ac96e360672 1589
charlesmn 0:3ac96e360672 1590 #define VL53L1_RANGING_CORE__TOTAL_PERIODS_ELAPSED_REF_1_LL 0x09AA
charlesmn 0:3ac96e360672 1591
charlesmn 0:3ac96e360672 1592 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_MM 0x09AB
charlesmn 0:3ac96e360672 1593
charlesmn 0:3ac96e360672 1594 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LM 0x09AC
charlesmn 0:3ac96e360672 1595
charlesmn 0:3ac96e360672 1596 #define VL53L1_RANGING_CORE__AMBIENT_MISMATCH_REF_LL 0x09AD
charlesmn 0:3ac96e360672 1597
charlesmn 0:3ac96e360672 1598 #define VL53L1_RANGING_CORE__GPIO_CONFIG__A0 0x0A00
charlesmn 0:3ac96e360672 1599
charlesmn 0:3ac96e360672 1600 #define VL53L1_RANGING_CORE__RESET_CONTROL__A0 0x0A01
charlesmn 0:3ac96e360672 1601
charlesmn 0:3ac96e360672 1602 #define VL53L1_RANGING_CORE__INTR_MANAGER__A0 0x0A02
charlesmn 0:3ac96e360672 1603
charlesmn 0:3ac96e360672 1604 #define VL53L1_RANGING_CORE__POWER_FSM_TIME_OSC__A0 0x0A06
charlesmn 0:3ac96e360672 1605
charlesmn 0:3ac96e360672 1606 #define VL53L1_RANGING_CORE__VCSEL_ATEST__A0 0x0A07
charlesmn 0:3ac96e360672 1607
charlesmn 0:3ac96e360672 1608 #define VL53L1_RANGING_CORE__VCSEL_PERIOD_CLIPPED__A0 0x0A08
charlesmn 0:3ac96e360672 1609
charlesmn 0:3ac96e360672 1610 #define VL53L1_RANGING_CORE__VCSEL_STOP_CLIPPED__A0 0x0A09
charlesmn 0:3ac96e360672 1611
charlesmn 0:3ac96e360672 1612 #define VL53L1_RANGING_CORE__CALIB_2__A0 0x0A0A
charlesmn 0:3ac96e360672 1613
charlesmn 0:3ac96e360672 1614 #define VL53L1_RANGING_CORE__STOP_CONDITION__A0 0x0A0B
charlesmn 0:3ac96e360672 1615
charlesmn 0:3ac96e360672 1616 #define VL53L1_RANGING_CORE__STATUS_RESET__A0 0x0A0C
charlesmn 0:3ac96e360672 1617
charlesmn 0:3ac96e360672 1618 #define VL53L1_RANGING_CORE__READOUT_CFG__A0 0x0A0D
charlesmn 0:3ac96e360672 1619
charlesmn 0:3ac96e360672 1620 #define VL53L1_RANGING_CORE__WINDOW_SETTING__A0 0x0A0E
charlesmn 0:3ac96e360672 1621
charlesmn 0:3ac96e360672 1622 #define VL53L1_RANGING_CORE__VCSEL_DELAY__A0 0x0A1A
charlesmn 0:3ac96e360672 1623
charlesmn 0:3ac96e360672 1624 #define VL53L1_RANGING_CORE__REFERENCE_2__A0 0x0A1B
charlesmn 0:3ac96e360672 1625
charlesmn 0:3ac96e360672 1626 #define VL53L1_RANGING_CORE__REGAVDD1V2__A0 0x0A1D
charlesmn 0:3ac96e360672 1627
charlesmn 0:3ac96e360672 1628 #define VL53L1_RANGING_CORE__TST_MUX__A0 0x0A1F
charlesmn 0:3ac96e360672 1629
charlesmn 0:3ac96e360672 1630 #define VL53L1_RANGING_CORE__CUSTOM_FE_2__A0 0x0A20
charlesmn 0:3ac96e360672 1631
charlesmn 0:3ac96e360672 1632 #define VL53L1_RANGING_CORE__SPAD_READOUT__A0 0x0A21
charlesmn 0:3ac96e360672 1633
charlesmn 0:3ac96e360672 1634 #define VL53L1_RANGING_CORE__CPUMP_1__A0 0x0A22
charlesmn 0:3ac96e360672 1635
charlesmn 0:3ac96e360672 1636 #define VL53L1_RANGING_CORE__SPARE_REGISTER__A0 0x0A23
charlesmn 0:3ac96e360672 1637
charlesmn 0:3ac96e360672 1638 #define VL53L1_RANGING_CORE__VCSEL_CONT_STAGE5_BYPASS__A0 0x0A24
charlesmn 0:3ac96e360672 1639
charlesmn 0:3ac96e360672 1640 #define VL53L1_RANGING_CORE__RET_SPAD_EN_18 0x0A25
charlesmn 0:3ac96e360672 1641
charlesmn 0:3ac96e360672 1642 #define VL53L1_RANGING_CORE__RET_SPAD_EN_19 0x0A26
charlesmn 0:3ac96e360672 1643
charlesmn 0:3ac96e360672 1644 #define VL53L1_RANGING_CORE__RET_SPAD_EN_20 0x0A27
charlesmn 0:3ac96e360672 1645
charlesmn 0:3ac96e360672 1646 #define VL53L1_RANGING_CORE__RET_SPAD_EN_21 0x0A28
charlesmn 0:3ac96e360672 1647
charlesmn 0:3ac96e360672 1648 #define VL53L1_RANGING_CORE__RET_SPAD_EN_22 0x0A29
charlesmn 0:3ac96e360672 1649
charlesmn 0:3ac96e360672 1650 #define VL53L1_RANGING_CORE__RET_SPAD_EN_23 0x0A2A
charlesmn 0:3ac96e360672 1651
charlesmn 0:3ac96e360672 1652 #define VL53L1_RANGING_CORE__RET_SPAD_EN_24 0x0A2B
charlesmn 0:3ac96e360672 1653
charlesmn 0:3ac96e360672 1654 #define VL53L1_RANGING_CORE__RET_SPAD_EN_25 0x0A2C
charlesmn 0:3ac96e360672 1655
charlesmn 0:3ac96e360672 1656 #define VL53L1_RANGING_CORE__RET_SPAD_EN_26 0x0A2D
charlesmn 0:3ac96e360672 1657
charlesmn 0:3ac96e360672 1658 #define VL53L1_RANGING_CORE__RET_SPAD_EN_27 0x0A2E
charlesmn 0:3ac96e360672 1659
charlesmn 0:3ac96e360672 1660 #define VL53L1_RANGING_CORE__RET_SPAD_EN_28 0x0A2F
charlesmn 0:3ac96e360672 1661
charlesmn 0:3ac96e360672 1662 #define VL53L1_RANGING_CORE__RET_SPAD_EN_29 0x0A30
charlesmn 0:3ac96e360672 1663
charlesmn 0:3ac96e360672 1664 #define VL53L1_RANGING_CORE__RET_SPAD_EN_30 0x0A31
charlesmn 0:3ac96e360672 1665
charlesmn 0:3ac96e360672 1666 #define VL53L1_RANGING_CORE__RET_SPAD_EN_31 0x0A32
charlesmn 0:3ac96e360672 1667
charlesmn 0:3ac96e360672 1668 #define VL53L1_RANGING_CORE__REF_SPAD_EN_0__EWOK 0x0A33
charlesmn 0:3ac96e360672 1669
charlesmn 0:3ac96e360672 1670 #define VL53L1_RANGING_CORE__REF_SPAD_EN_1__EWOK 0x0A34
charlesmn 0:3ac96e360672 1671
charlesmn 0:3ac96e360672 1672 #define VL53L1_RANGING_CORE__REF_SPAD_EN_2__EWOK 0x0A35
charlesmn 0:3ac96e360672 1673
charlesmn 0:3ac96e360672 1674 #define VL53L1_RANGING_CORE__REF_SPAD_EN_3__EWOK 0x0A36
charlesmn 0:3ac96e360672 1675
charlesmn 0:3ac96e360672 1676 #define VL53L1_RANGING_CORE__REF_SPAD_EN_4__EWOK 0x0A37
charlesmn 0:3ac96e360672 1677
charlesmn 0:3ac96e360672 1678 #define VL53L1_RANGING_CORE__REF_SPAD_EN_5__EWOK 0x0A38
charlesmn 0:3ac96e360672 1679
charlesmn 0:3ac96e360672 1680 #define VL53L1_RANGING_CORE__REF_EN_START_SELECT 0x0A39
charlesmn 0:3ac96e360672 1681
charlesmn 0:3ac96e360672 1682 #define VL53L1_RANGING_CORE__REGDVDD1V2_ATEST__EWOK 0x0A41
charlesmn 0:3ac96e360672 1683
charlesmn 0:3ac96e360672 1684 #define VL53L1_SOFT_RESET_GO1 0x0B00
charlesmn 0:3ac96e360672 1685
charlesmn 0:3ac96e360672 1686 #define VL53L1_PRIVATE__PATCH_BASE_ADDR_RSLV 0x0E00
charlesmn 0:3ac96e360672 1687
charlesmn 0:3ac96e360672 1688 #define VL53L1_PREV_SHADOW_RESULT__INTERRUPT_STATUS 0x0ED0
charlesmn 0:3ac96e360672 1689
charlesmn 0:3ac96e360672 1690 #define VL53L1_PREV_SHADOW_RESULT__RANGE_STATUS 0x0ED1
charlesmn 0:3ac96e360672 1691
charlesmn 0:3ac96e360672 1692 #define VL53L1_PREV_SHADOW_RESULT__REPORT_STATUS 0x0ED2
charlesmn 0:3ac96e360672 1693
charlesmn 0:3ac96e360672 1694 #define VL53L1_PREV_SHADOW_RESULT__STREAM_COUNT 0x0ED3
charlesmn 0:3ac96e360672 1695
charlesmn 0:3ac96e360672 1696 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0ED4
charlesmn 0:3ac96e360672 1697
charlesmn 0:3ac96e360672 1698 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0ED4
charlesmn 0:3ac96e360672 1699
charlesmn 0:3ac96e360672 1700 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0ED5
charlesmn 0:3ac96e360672 1701
charlesmn 0:3ac96e360672 1702 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0ED6
charlesmn 0:3ac96e360672 1703
charlesmn 0:3ac96e360672 1704 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0ED6
charlesmn 0:3ac96e360672 1705
charlesmn 0:3ac96e360672 1706 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0ED7
charlesmn 0:3ac96e360672 1707
charlesmn 0:3ac96e360672 1708 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0ED8
charlesmn 0:3ac96e360672 1709
charlesmn 0:3ac96e360672 1710 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0ED8
charlesmn 0:3ac96e360672 1711
charlesmn 0:3ac96e360672 1712 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0ED9
charlesmn 0:3ac96e360672 1713
charlesmn 0:3ac96e360672 1714 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0 0x0EDA
charlesmn 0:3ac96e360672 1715
charlesmn 0:3ac96e360672 1716 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_HI 0x0EDA
charlesmn 0:3ac96e360672 1717
charlesmn 0:3ac96e360672 1718 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD0_LO 0x0EDB
charlesmn 0:3ac96e360672 1719
charlesmn 0:3ac96e360672 1720 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0 0x0EDC
charlesmn 0:3ac96e360672 1721
charlesmn 0:3ac96e360672 1722 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_HI 0x0EDC
charlesmn 0:3ac96e360672 1723
charlesmn 0:3ac96e360672 1724 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD0_LO 0x0EDD
charlesmn 0:3ac96e360672 1725
charlesmn 0:3ac96e360672 1726 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0EDE
charlesmn 0:3ac96e360672 1727
charlesmn 0:3ac96e360672 1728 #define VL53L1_PREV__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0EDE
charlesmn 0:3ac96e360672 1729
charlesmn 0:3ac96e360672 1730 #define VL53L1_PREV__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0EDF
charlesmn 0:3ac96e360672 1731
charlesmn 0:3ac96e360672 1732 #define VL53L1_PREV__PEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0EE0
charlesmn 0:3ac96e360672 1733
charlesmn 0:3ac96e360672 1734 #define VL53L1_PPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0EE0
charlesmn 0:3ac96e360672 1735
charlesmn 0:3ac96e360672 1736 #define VL53L1_PPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0EE1
charlesmn 0:3ac96e360672 1737
charlesmn 0:3ac96e360672 1738 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE2
charlesmn 0:3ac96e360672 1739
charlesmn 0:3ac96e360672 1740 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE2
charlesmn 0:3ac96e360672 1741
charlesmn 0:3ac96e360672 1742 #define VL53L1_PREV_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE3
charlesmn 0:3ac96e360672 1743
charlesmn 0:3ac96e360672 1744 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0EE4
charlesmn 0:3ac96e360672 1745
charlesmn 0:3ac96e360672 1746 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0EE4
charlesmn 0:3ac96e360672 1747
charlesmn 0:3ac96e360672 1748 #define VL53L1_PREV_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0EE5
charlesmn 0:3ac96e360672 1749
charlesmn 0:3ac96e360672 1750 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0EE6
charlesmn 0:3ac96e360672 1751
charlesmn 0:3ac96e360672 1752 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0EE6
charlesmn 0:3ac96e360672 1753
charlesmn 0:3ac96e360672 1754 #define VL53L1_PREV_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0EE7
charlesmn 0:3ac96e360672 1755
charlesmn 0:3ac96e360672 1756 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0EE8
charlesmn 0:3ac96e360672 1757
charlesmn 0:3ac96e360672 1758 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0EE8
charlesmn 0:3ac96e360672 1759
charlesmn 0:3ac96e360672 1760 #define VL53L1_PREV_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0EE9
charlesmn 0:3ac96e360672 1761
charlesmn 0:3ac96e360672 1762 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0EEA
charlesmn 0:3ac96e360672 1763
charlesmn 0:3ac96e360672 1764 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0EEA
charlesmn 0:3ac96e360672 1765
charlesmn 0:3ac96e360672 1766 #define VL53L1_PREV_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0EEB
charlesmn 0:3ac96e360672 1767
charlesmn 0:3ac96e360672 1768 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0EEC
charlesmn 0:3ac96e360672 1769
charlesmn 0:3ac96e360672 1770 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0EEC
charlesmn 0:3ac96e360672 1771
charlesmn 0:3ac96e360672 1772 #define VL53L1_PREV_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0EED
charlesmn 0:3ac96e360672 1773
charlesmn 0:3ac96e360672 1774 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1 0x0EEE
charlesmn 0:3ac96e360672 1775
charlesmn 0:3ac96e360672 1776 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_HI 0x0EEE
charlesmn 0:3ac96e360672 1777
charlesmn 0:3ac96e360672 1778 #define VL53L1_PREV_SHADOW_RESULT__SIGMA_SD1_LO 0x0EEF
charlesmn 0:3ac96e360672 1779
charlesmn 0:3ac96e360672 1780 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1 0x0EF0
charlesmn 0:3ac96e360672 1781
charlesmn 0:3ac96e360672 1782 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_HI 0x0EF0
charlesmn 0:3ac96e360672 1783
charlesmn 0:3ac96e360672 1784 #define VL53L1_PREV_SHADOW_RESULT__PHASE_SD1_LO 0x0EF1
charlesmn 0:3ac96e360672 1785
charlesmn 0:3ac96e360672 1786 #define VL53L1_PREV_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0EF2
charlesmn 0:3ac96e360672 1787
charlesmn 0:3ac96e360672 1788 #define VL53L1_PFINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0EF2
charlesmn 0:3ac96e360672 1789
charlesmn 0:3ac96e360672 1790 #define VL53L1_PFINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0EF3
charlesmn 0:3ac96e360672 1791
charlesmn 0:3ac96e360672 1792 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1 0x0EF4
charlesmn 0:3ac96e360672 1793
charlesmn 0:3ac96e360672 1794 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_HI 0x0EF4
charlesmn 0:3ac96e360672 1795
charlesmn 0:3ac96e360672 1796 #define VL53L1_PREV_SHADOW_RESULT__SPARE_0_SD1_LO 0x0EF5
charlesmn 0:3ac96e360672 1797
charlesmn 0:3ac96e360672 1798 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1 0x0EF6
charlesmn 0:3ac96e360672 1799
charlesmn 0:3ac96e360672 1800 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_HI 0x0EF6
charlesmn 0:3ac96e360672 1801
charlesmn 0:3ac96e360672 1802 #define VL53L1_PREV_SHADOW_RESULT__SPARE_1_SD1_LO 0x0EF7
charlesmn 0:3ac96e360672 1803
charlesmn 0:3ac96e360672 1804 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1 0x0EF8
charlesmn 0:3ac96e360672 1805
charlesmn 0:3ac96e360672 1806 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_HI 0x0EF8
charlesmn 0:3ac96e360672 1807
charlesmn 0:3ac96e360672 1808 #define VL53L1_PREV_SHADOW_RESULT__SPARE_2_SD1_LO 0x0EF9
charlesmn 0:3ac96e360672 1809
charlesmn 0:3ac96e360672 1810 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1 0x0EFA
charlesmn 0:3ac96e360672 1811
charlesmn 0:3ac96e360672 1812 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_HI 0x0EFA
charlesmn 0:3ac96e360672 1813
charlesmn 0:3ac96e360672 1814 #define VL53L1_PREV_SHADOW_RESULT__SPARE_3_SD1_LO 0x0EFB
charlesmn 0:3ac96e360672 1815
charlesmn 0:3ac96e360672 1816 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0EFC
charlesmn 0:3ac96e360672 1817
charlesmn 0:3ac96e360672 1818 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0EFC
charlesmn 0:3ac96e360672 1819
charlesmn 0:3ac96e360672 1820 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0EFD
charlesmn 0:3ac96e360672 1821
charlesmn 0:3ac96e360672 1822 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0EFE
charlesmn 0:3ac96e360672 1823
charlesmn 0:3ac96e360672 1824 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0EFF
charlesmn 0:3ac96e360672 1825
charlesmn 0:3ac96e360672 1826 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0F00
charlesmn 0:3ac96e360672 1827
charlesmn 0:3ac96e360672 1828 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0F00
charlesmn 0:3ac96e360672 1829
charlesmn 0:3ac96e360672 1830 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0F01
charlesmn 0:3ac96e360672 1831
charlesmn 0:3ac96e360672 1832 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0F02
charlesmn 0:3ac96e360672 1833
charlesmn 0:3ac96e360672 1834 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0F03
charlesmn 0:3ac96e360672 1835
charlesmn 0:3ac96e360672 1836 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0F04
charlesmn 0:3ac96e360672 1837
charlesmn 0:3ac96e360672 1838 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0F04
charlesmn 0:3ac96e360672 1839
charlesmn 0:3ac96e360672 1840 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0F05
charlesmn 0:3ac96e360672 1841
charlesmn 0:3ac96e360672 1842 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0F06
charlesmn 0:3ac96e360672 1843
charlesmn 0:3ac96e360672 1844 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0F07
charlesmn 0:3ac96e360672 1845
charlesmn 0:3ac96e360672 1846 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0F08
charlesmn 0:3ac96e360672 1847
charlesmn 0:3ac96e360672 1848 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0F08
charlesmn 0:3ac96e360672 1849
charlesmn 0:3ac96e360672 1850 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0F09
charlesmn 0:3ac96e360672 1851
charlesmn 0:3ac96e360672 1852 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0F0A
charlesmn 0:3ac96e360672 1853
charlesmn 0:3ac96e360672 1854 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0F0B
charlesmn 0:3ac96e360672 1855
charlesmn 0:3ac96e360672 1856 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0F0C
charlesmn 0:3ac96e360672 1857
charlesmn 0:3ac96e360672 1858 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0F0C
charlesmn 0:3ac96e360672 1859
charlesmn 0:3ac96e360672 1860 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0F0D
charlesmn 0:3ac96e360672 1861
charlesmn 0:3ac96e360672 1862 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0F0E
charlesmn 0:3ac96e360672 1863
charlesmn 0:3ac96e360672 1864 #define VL53L1_PREV_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0F0F
charlesmn 0:3ac96e360672 1865
charlesmn 0:3ac96e360672 1866 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0F10
charlesmn 0:3ac96e360672 1867
charlesmn 0:3ac96e360672 1868 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0F10
charlesmn 0:3ac96e360672 1869
charlesmn 0:3ac96e360672 1870 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0F11
charlesmn 0:3ac96e360672 1871
charlesmn 0:3ac96e360672 1872 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0F12
charlesmn 0:3ac96e360672 1873
charlesmn 0:3ac96e360672 1874 #define VL53L1_PREV_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0F13
charlesmn 0:3ac96e360672 1875
charlesmn 0:3ac96e360672 1876 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0F14
charlesmn 0:3ac96e360672 1877
charlesmn 0:3ac96e360672 1878 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0F14
charlesmn 0:3ac96e360672 1879
charlesmn 0:3ac96e360672 1880 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0F15
charlesmn 0:3ac96e360672 1881
charlesmn 0:3ac96e360672 1882 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0F16
charlesmn 0:3ac96e360672 1883
charlesmn 0:3ac96e360672 1884 #define VL53L1_PREV_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0F17
charlesmn 0:3ac96e360672 1885
charlesmn 0:3ac96e360672 1886 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0F18
charlesmn 0:3ac96e360672 1887
charlesmn 0:3ac96e360672 1888 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0F18
charlesmn 0:3ac96e360672 1889
charlesmn 0:3ac96e360672 1890 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0F19
charlesmn 0:3ac96e360672 1891
charlesmn 0:3ac96e360672 1892 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0F1A
charlesmn 0:3ac96e360672 1893
charlesmn 0:3ac96e360672 1894 #define VL53L1_PREV_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0F1B
charlesmn 0:3ac96e360672 1895
charlesmn 0:3ac96e360672 1896 #define VL53L1_PREV_SHADOW_RESULT_CORE__SPARE_0 0x0F1C
charlesmn 0:3ac96e360672 1897
charlesmn 0:3ac96e360672 1898 #define VL53L1_RESULT__DEBUG_STATUS 0x0F20
charlesmn 0:3ac96e360672 1899
charlesmn 0:3ac96e360672 1900 #define VL53L1_RESULT__DEBUG_STAGE 0x0F21
charlesmn 0:3ac96e360672 1901
charlesmn 0:3ac96e360672 1902 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH 0x0F24
charlesmn 0:3ac96e360672 1903
charlesmn 0:3ac96e360672 1904 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_HI 0x0F24
charlesmn 0:3ac96e360672 1905
charlesmn 0:3ac96e360672 1906 #define VL53L1_GPH__SYSTEM__THRESH_RATE_HIGH_LO 0x0F25
charlesmn 0:3ac96e360672 1907
charlesmn 0:3ac96e360672 1908 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW 0x0F26
charlesmn 0:3ac96e360672 1909
charlesmn 0:3ac96e360672 1910 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_HI 0x0F26
charlesmn 0:3ac96e360672 1911
charlesmn 0:3ac96e360672 1912 #define VL53L1_GPH__SYSTEM__THRESH_RATE_LOW_LO 0x0F27
charlesmn 0:3ac96e360672 1913
charlesmn 0:3ac96e360672 1914 #define VL53L1_GPH__SYSTEM__INTERRUPT_CONFIG_GPIO 0x0F28
charlesmn 0:3ac96e360672 1915
charlesmn 0:3ac96e360672 1916 #define VL53L1_GPH__DSS_CONFIG__ROI_MODE_CONTROL 0x0F2F
charlesmn 0:3ac96e360672 1917
charlesmn 0:3ac96e360672 1918 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT 0x0F30
charlesmn 0:3ac96e360672 1919
charlesmn 0:3ac96e360672 1920 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_HI 0x0F30
charlesmn 0:3ac96e360672 1921
charlesmn 0:3ac96e360672 1922 #define VL53L1_GPH__DSS_CONFIG__MANUAL_EFFECTIVE_SPADS_SELECT_LO 0x0F31
charlesmn 0:3ac96e360672 1923
charlesmn 0:3ac96e360672 1924 #define VL53L1_GPH__DSS_CONFIG__MANUAL_BLOCK_SELECT 0x0F32
charlesmn 0:3ac96e360672 1925
charlesmn 0:3ac96e360672 1926 #define VL53L1_GPH__DSS_CONFIG__MAX_SPADS_LIMIT 0x0F33
charlesmn 0:3ac96e360672 1927
charlesmn 0:3ac96e360672 1928 #define VL53L1_GPH__DSS_CONFIG__MIN_SPADS_LIMIT 0x0F34
charlesmn 0:3ac96e360672 1929
charlesmn 0:3ac96e360672 1930 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_HI 0x0F36
charlesmn 0:3ac96e360672 1931
charlesmn 0:3ac96e360672 1932 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_A_LO 0x0F37
charlesmn 0:3ac96e360672 1933
charlesmn 0:3ac96e360672 1934 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_HI 0x0F38
charlesmn 0:3ac96e360672 1935
charlesmn 0:3ac96e360672 1936 #define VL53L1_GPH__MM_CONFIG__TIMEOUT_MACROP_B_LO 0x0F39
charlesmn 0:3ac96e360672 1937
charlesmn 0:3ac96e360672 1938 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_HI 0x0F3A
charlesmn 0:3ac96e360672 1939
charlesmn 0:3ac96e360672 1940 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_A_LO 0x0F3B
charlesmn 0:3ac96e360672 1941
charlesmn 0:3ac96e360672 1942 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_A 0x0F3C
charlesmn 0:3ac96e360672 1943
charlesmn 0:3ac96e360672 1944 #define VL53L1_GPH__RANGE_CONFIG__VCSEL_PERIOD_B 0x0F3D
charlesmn 0:3ac96e360672 1945
charlesmn 0:3ac96e360672 1946 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_HI 0x0F3E
charlesmn 0:3ac96e360672 1947
charlesmn 0:3ac96e360672 1948 #define VL53L1_GPH__RANGE_CONFIG__TIMEOUT_MACROP_B_LO 0x0F3F
charlesmn 0:3ac96e360672 1949
charlesmn 0:3ac96e360672 1950 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH 0x0F40
charlesmn 0:3ac96e360672 1951
charlesmn 0:3ac96e360672 1952 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_HI 0x0F40
charlesmn 0:3ac96e360672 1953
charlesmn 0:3ac96e360672 1954 #define VL53L1_GPH__RANGE_CONFIG__SIGMA_THRESH_LO 0x0F41
charlesmn 0:3ac96e360672 1955
charlesmn 0:3ac96e360672 1956 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS 0x0F42
charlesmn 0:3ac96e360672 1957
charlesmn 0:3ac96e360672 1958 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_HI 0x0F42
charlesmn 0:3ac96e360672 1959
charlesmn 0:3ac96e360672 1960 #define VL53L1_GPH__RANGE_CONFIG__MIN_COUNT_RATE_RTN_LIMIT_MCPS_LO 0x0F43
charlesmn 0:3ac96e360672 1961
charlesmn 0:3ac96e360672 1962 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_LOW 0x0F44
charlesmn 0:3ac96e360672 1963
charlesmn 0:3ac96e360672 1964 #define VL53L1_GPH__RANGE_CONFIG__VALID_PHASE_HIGH 0x0F45
charlesmn 0:3ac96e360672 1965
charlesmn 0:3ac96e360672 1966 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNT_DIV 0x0F46
charlesmn 0:3ac96e360672 1967
charlesmn 0:3ac96e360672 1968 #define VL53L1_FIRMWARE__INTERNAL_STREAM_COUNTER_VAL 0x0F47
charlesmn 0:3ac96e360672 1969
charlesmn 0:3ac96e360672 1970 #define VL53L1_DSS_CALC__ROI_CTRL 0x0F54
charlesmn 0:3ac96e360672 1971
charlesmn 0:3ac96e360672 1972 #define VL53L1_DSS_CALC__SPARE_1 0x0F55
charlesmn 0:3ac96e360672 1973
charlesmn 0:3ac96e360672 1974 #define VL53L1_DSS_CALC__SPARE_2 0x0F56
charlesmn 0:3ac96e360672 1975
charlesmn 0:3ac96e360672 1976 #define VL53L1_DSS_CALC__SPARE_3 0x0F57
charlesmn 0:3ac96e360672 1977
charlesmn 0:3ac96e360672 1978 #define VL53L1_DSS_CALC__SPARE_4 0x0F58
charlesmn 0:3ac96e360672 1979
charlesmn 0:3ac96e360672 1980 #define VL53L1_DSS_CALC__SPARE_5 0x0F59
charlesmn 0:3ac96e360672 1981
charlesmn 0:3ac96e360672 1982 #define VL53L1_DSS_CALC__SPARE_6 0x0F5A
charlesmn 0:3ac96e360672 1983
charlesmn 0:3ac96e360672 1984 #define VL53L1_DSS_CALC__SPARE_7 0x0F5B
charlesmn 0:3ac96e360672 1985
charlesmn 0:3ac96e360672 1986 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_0 0x0F5C
charlesmn 0:3ac96e360672 1987
charlesmn 0:3ac96e360672 1988 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_1 0x0F5D
charlesmn 0:3ac96e360672 1989
charlesmn 0:3ac96e360672 1990 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_2 0x0F5E
charlesmn 0:3ac96e360672 1991
charlesmn 0:3ac96e360672 1992 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_3 0x0F5F
charlesmn 0:3ac96e360672 1993
charlesmn 0:3ac96e360672 1994 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_4 0x0F60
charlesmn 0:3ac96e360672 1995
charlesmn 0:3ac96e360672 1996 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_5 0x0F61
charlesmn 0:3ac96e360672 1997
charlesmn 0:3ac96e360672 1998 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_6 0x0F62
charlesmn 0:3ac96e360672 1999
charlesmn 0:3ac96e360672 2000 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_7 0x0F63
charlesmn 0:3ac96e360672 2001
charlesmn 0:3ac96e360672 2002 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_8 0x0F64
charlesmn 0:3ac96e360672 2003
charlesmn 0:3ac96e360672 2004 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_9 0x0F65
charlesmn 0:3ac96e360672 2005
charlesmn 0:3ac96e360672 2006 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_10 0x0F66
charlesmn 0:3ac96e360672 2007
charlesmn 0:3ac96e360672 2008 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_11 0x0F67
charlesmn 0:3ac96e360672 2009
charlesmn 0:3ac96e360672 2010 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_12 0x0F68
charlesmn 0:3ac96e360672 2011
charlesmn 0:3ac96e360672 2012 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_13 0x0F69
charlesmn 0:3ac96e360672 2013
charlesmn 0:3ac96e360672 2014 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_14 0x0F6A
charlesmn 0:3ac96e360672 2015
charlesmn 0:3ac96e360672 2016 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_15 0x0F6B
charlesmn 0:3ac96e360672 2017
charlesmn 0:3ac96e360672 2018 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_16 0x0F6C
charlesmn 0:3ac96e360672 2019
charlesmn 0:3ac96e360672 2020 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_17 0x0F6D
charlesmn 0:3ac96e360672 2021
charlesmn 0:3ac96e360672 2022 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_18 0x0F6E
charlesmn 0:3ac96e360672 2023
charlesmn 0:3ac96e360672 2024 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_19 0x0F6F
charlesmn 0:3ac96e360672 2025
charlesmn 0:3ac96e360672 2026 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_20 0x0F70
charlesmn 0:3ac96e360672 2027
charlesmn 0:3ac96e360672 2028 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_21 0x0F71
charlesmn 0:3ac96e360672 2029
charlesmn 0:3ac96e360672 2030 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_22 0x0F72
charlesmn 0:3ac96e360672 2031
charlesmn 0:3ac96e360672 2032 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_23 0x0F73
charlesmn 0:3ac96e360672 2033
charlesmn 0:3ac96e360672 2034 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_24 0x0F74
charlesmn 0:3ac96e360672 2035
charlesmn 0:3ac96e360672 2036 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_25 0x0F75
charlesmn 0:3ac96e360672 2037
charlesmn 0:3ac96e360672 2038 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_26 0x0F76
charlesmn 0:3ac96e360672 2039
charlesmn 0:3ac96e360672 2040 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_27 0x0F77
charlesmn 0:3ac96e360672 2041
charlesmn 0:3ac96e360672 2042 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_28 0x0F78
charlesmn 0:3ac96e360672 2043
charlesmn 0:3ac96e360672 2044 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_29 0x0F79
charlesmn 0:3ac96e360672 2045
charlesmn 0:3ac96e360672 2046 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_30 0x0F7A
charlesmn 0:3ac96e360672 2047
charlesmn 0:3ac96e360672 2048 #define VL53L1_DSS_CALC__USER_ROI_SPAD_EN_31 0x0F7B
charlesmn 0:3ac96e360672 2049
charlesmn 0:3ac96e360672 2050 #define VL53L1_DSS_CALC__USER_ROI_0 0x0F7C
charlesmn 0:3ac96e360672 2051
charlesmn 0:3ac96e360672 2052 #define VL53L1_DSS_CALC__USER_ROI_1 0x0F7D
charlesmn 0:3ac96e360672 2053
charlesmn 0:3ac96e360672 2054 #define VL53L1_DSS_CALC__MODE_ROI_0 0x0F7E
charlesmn 0:3ac96e360672 2055
charlesmn 0:3ac96e360672 2056 #define VL53L1_DSS_CALC__MODE_ROI_1 0x0F7F
charlesmn 0:3ac96e360672 2057
charlesmn 0:3ac96e360672 2058 #define VL53L1_SIGMA_ESTIMATOR_CALC__SPARE_0 0x0F80
charlesmn 0:3ac96e360672 2059
charlesmn 0:3ac96e360672 2060 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS 0x0F82
charlesmn 0:3ac96e360672 2061
charlesmn 0:3ac96e360672 2062 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_HI 0x0F82
charlesmn 0:3ac96e360672 2063
charlesmn 0:3ac96e360672 2064 #define VL53L1_VHV_RESULT__PEAK_SIGNAL_RATE_MCPS_LO 0x0F83
charlesmn 0:3ac96e360672 2065
charlesmn 0:3ac96e360672 2066 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF 0x0F84
charlesmn 0:3ac96e360672 2067
charlesmn 0:3ac96e360672 2068 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_3 0x0F84
charlesmn 0:3ac96e360672 2069
charlesmn 0:3ac96e360672 2070 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_2 0x0F85
charlesmn 0:3ac96e360672 2071
charlesmn 0:3ac96e360672 2072 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_1 0x0F86
charlesmn 0:3ac96e360672 2073
charlesmn 0:3ac96e360672 2074 #define VL53L1_VHV_RESULT__SIGNAL_TOTAL_EVENTS_REF_0 0x0F87
charlesmn 0:3ac96e360672 2075
charlesmn 0:3ac96e360672 2076 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF 0x0F88
charlesmn 0:3ac96e360672 2077
charlesmn 0:3ac96e360672 2078 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_HI 0x0F88
charlesmn 0:3ac96e360672 2079
charlesmn 0:3ac96e360672 2080 #define VL53L1_PHASECAL_RESULT__PHASE_OUTPUT_REF_LO 0x0F89
charlesmn 0:3ac96e360672 2081
charlesmn 0:3ac96e360672 2082 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD 0x0F8A
charlesmn 0:3ac96e360672 2083
charlesmn 0:3ac96e360672 2084 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_HI 0x0F8A
charlesmn 0:3ac96e360672 2085
charlesmn 0:3ac96e360672 2086 #define VL53L1_DSS_RESULT__TOTAL_RATE_PER_SPAD_LO 0x0F8B
charlesmn 0:3ac96e360672 2087
charlesmn 0:3ac96e360672 2088 #define VL53L1_DSS_RESULT__ENABLED_BLOCKS 0x0F8C
charlesmn 0:3ac96e360672 2089
charlesmn 0:3ac96e360672 2090 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS 0x0F8E
charlesmn 0:3ac96e360672 2091
charlesmn 0:3ac96e360672 2092 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_HI 0x0F8E
charlesmn 0:3ac96e360672 2093
charlesmn 0:3ac96e360672 2094 #define VL53L1_DSS_RESULT__NUM_REQUESTED_SPADS_LO 0x0F8F
charlesmn 0:3ac96e360672 2095
charlesmn 0:3ac96e360672 2096 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE 0x0F92
charlesmn 0:3ac96e360672 2097
charlesmn 0:3ac96e360672 2098 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_HI 0x0F92
charlesmn 0:3ac96e360672 2099
charlesmn 0:3ac96e360672 2100 #define VL53L1_MM_RESULT__INNER_INTERSECTION_RATE_LO 0x0F93
charlesmn 0:3ac96e360672 2101
charlesmn 0:3ac96e360672 2102 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE 0x0F94
charlesmn 0:3ac96e360672 2103
charlesmn 0:3ac96e360672 2104 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_HI 0x0F94
charlesmn 0:3ac96e360672 2105
charlesmn 0:3ac96e360672 2106 #define VL53L1_MM_RESULT__OUTER_COMPLEMENT_RATE_LO 0x0F95
charlesmn 0:3ac96e360672 2107
charlesmn 0:3ac96e360672 2108 #define VL53L1_MM_RESULT__TOTAL_OFFSET 0x0F96
charlesmn 0:3ac96e360672 2109
charlesmn 0:3ac96e360672 2110 #define VL53L1_MM_RESULT__TOTAL_OFFSET_HI 0x0F96
charlesmn 0:3ac96e360672 2111
charlesmn 0:3ac96e360672 2112 #define VL53L1_MM_RESULT__TOTAL_OFFSET_LO 0x0F97
charlesmn 0:3ac96e360672 2113
charlesmn 0:3ac96e360672 2114 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS 0x0F98
charlesmn 0:3ac96e360672 2115
charlesmn 0:3ac96e360672 2116 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_3 0x0F98
charlesmn 0:3ac96e360672 2117
charlesmn 0:3ac96e360672 2118 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_2 0x0F99
charlesmn 0:3ac96e360672 2119
charlesmn 0:3ac96e360672 2120 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_1 0x0F9A
charlesmn 0:3ac96e360672 2121
charlesmn 0:3ac96e360672 2122 #define VL53L1_XTALK_CALC__XTALK_FOR_ENABLED_SPADS_0 0x0F9B
charlesmn 0:3ac96e360672 2123
charlesmn 0:3ac96e360672 2124 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS 0x0F9C
charlesmn 0:3ac96e360672 2125
charlesmn 0:3ac96e360672 2126 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_3 0x0F9C
charlesmn 0:3ac96e360672 2127
charlesmn 0:3ac96e360672 2128 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_2 0x0F9D
charlesmn 0:3ac96e360672 2129
charlesmn 0:3ac96e360672 2130 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_1 0x0F9E
charlesmn 0:3ac96e360672 2131
charlesmn 0:3ac96e360672 2132 #define VL53L1_XTALK_RESULT__AVG_XTALK_USER_ROI_KCPS_0 0x0F9F
charlesmn 0:3ac96e360672 2133
charlesmn 0:3ac96e360672 2134 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS 0x0FA0
charlesmn 0:3ac96e360672 2135
charlesmn 0:3ac96e360672 2136 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_3 0x0FA0
charlesmn 0:3ac96e360672 2137
charlesmn 0:3ac96e360672 2138 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_2 0x0FA1
charlesmn 0:3ac96e360672 2139
charlesmn 0:3ac96e360672 2140 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_1 0x0FA2
charlesmn 0:3ac96e360672 2141
charlesmn 0:3ac96e360672 2142 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_INNER_ROI_KCPS_0 0x0FA3
charlesmn 0:3ac96e360672 2143
charlesmn 0:3ac96e360672 2144 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS 0x0FA4
charlesmn 0:3ac96e360672 2145
charlesmn 0:3ac96e360672 2146 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_3 0x0FA4
charlesmn 0:3ac96e360672 2147
charlesmn 0:3ac96e360672 2148 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_2 0x0FA5
charlesmn 0:3ac96e360672 2149
charlesmn 0:3ac96e360672 2150 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_1 0x0FA6
charlesmn 0:3ac96e360672 2151
charlesmn 0:3ac96e360672 2152 #define VL53L1_XTALK_RESULT__AVG_XTALK_MM_OUTER_ROI_KCPS_0 0x0FA7
charlesmn 0:3ac96e360672 2153
charlesmn 0:3ac96e360672 2154 #define VL53L1_RANGE_RESULT__ACCUM_PHASE 0x0FA8
charlesmn 0:3ac96e360672 2155
charlesmn 0:3ac96e360672 2156 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_3 0x0FA8
charlesmn 0:3ac96e360672 2157
charlesmn 0:3ac96e360672 2158 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_2 0x0FA9
charlesmn 0:3ac96e360672 2159
charlesmn 0:3ac96e360672 2160 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_1 0x0FAA
charlesmn 0:3ac96e360672 2161
charlesmn 0:3ac96e360672 2162 #define VL53L1_RANGE_RESULT__ACCUM_PHASE_0 0x0FAB
charlesmn 0:3ac96e360672 2163
charlesmn 0:3ac96e360672 2164 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE 0x0FAC
charlesmn 0:3ac96e360672 2165
charlesmn 0:3ac96e360672 2166 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_HI 0x0FAC
charlesmn 0:3ac96e360672 2167
charlesmn 0:3ac96e360672 2168 #define VL53L1_RANGE_RESULT__OFFSET_CORRECTED_RANGE_LO 0x0FAD
charlesmn 0:3ac96e360672 2169
charlesmn 0:3ac96e360672 2170 #define VL53L1_SHADOW_PHASECAL_RESULT__VCSEL_START 0x0FAE
charlesmn 0:3ac96e360672 2171
charlesmn 0:3ac96e360672 2172 #define VL53L1_SHADOW_RESULT__INTERRUPT_STATUS 0x0FB0
charlesmn 0:3ac96e360672 2173
charlesmn 0:3ac96e360672 2174 #define VL53L1_SHADOW_RESULT__RANGE_STATUS 0x0FB1
charlesmn 0:3ac96e360672 2175
charlesmn 0:3ac96e360672 2176 #define VL53L1_SHADOW_RESULT__REPORT_STATUS 0x0FB2
charlesmn 0:3ac96e360672 2177
charlesmn 0:3ac96e360672 2178 #define VL53L1_SHADOW_RESULT__STREAM_COUNT 0x0FB3
charlesmn 0:3ac96e360672 2179
charlesmn 0:3ac96e360672 2180 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FB4
charlesmn 0:3ac96e360672 2181
charlesmn 0:3ac96e360672 2182 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FB4
charlesmn 0:3ac96e360672 2183
charlesmn 0:3ac96e360672 2184 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FB5
charlesmn 0:3ac96e360672 2185
charlesmn 0:3ac96e360672 2186 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FB6
charlesmn 0:3ac96e360672 2187
charlesmn 0:3ac96e360672 2188 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FB6
charlesmn 0:3ac96e360672 2189
charlesmn 0:3ac96e360672 2190 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FB7
charlesmn 0:3ac96e360672 2191
charlesmn 0:3ac96e360672 2192 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0 0x0FB8
charlesmn 0:3ac96e360672 2193
charlesmn 0:3ac96e360672 2194 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_HI 0x0FB8
charlesmn 0:3ac96e360672 2195
charlesmn 0:3ac96e360672 2196 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD0_LO 0x0FB9
charlesmn 0:3ac96e360672 2197
charlesmn 0:3ac96e360672 2198 #define VL53L1_SHADOW_RESULT__SIGMA_SD0 0x0FBA
charlesmn 0:3ac96e360672 2199
charlesmn 0:3ac96e360672 2200 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_HI 0x0FBA
charlesmn 0:3ac96e360672 2201
charlesmn 0:3ac96e360672 2202 #define VL53L1_SHADOW_RESULT__SIGMA_SD0_LO 0x0FBB
charlesmn 0:3ac96e360672 2203
charlesmn 0:3ac96e360672 2204 #define VL53L1_SHADOW_RESULT__PHASE_SD0 0x0FBC
charlesmn 0:3ac96e360672 2205
charlesmn 0:3ac96e360672 2206 #define VL53L1_SHADOW_RESULT__PHASE_SD0_HI 0x0FBC
charlesmn 0:3ac96e360672 2207
charlesmn 0:3ac96e360672 2208 #define VL53L1_SHADOW_RESULT__PHASE_SD0_LO 0x0FBD
charlesmn 0:3ac96e360672 2209
charlesmn 0:3ac96e360672 2210 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0 0x0FBE
charlesmn 0:3ac96e360672 2211
charlesmn 0:3ac96e360672 2212 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_HI 0x0FBE
charlesmn 0:3ac96e360672 2213
charlesmn 0:3ac96e360672 2214 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD0_LO 0x0FBF
charlesmn 0:3ac96e360672 2215
charlesmn 0:3ac96e360672 2216 #define VL53L1_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0 0x0FC0
charlesmn 0:3ac96e360672 2217
charlesmn 0:3ac96e360672 2218 #define VL53L1_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_HI 0x0FC0
charlesmn 0:3ac96e360672 2219
charlesmn 0:3ac96e360672 2220 #define VL53L1_SHPEAK_SIGNAL_COUNT_RATE_CROSSTALK_CORRECTED_MCPS_SD0_LO 0x0FC1
charlesmn 0:3ac96e360672 2221
charlesmn 0:3ac96e360672 2222 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC2
charlesmn 0:3ac96e360672 2223
charlesmn 0:3ac96e360672 2224 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC2
charlesmn 0:3ac96e360672 2225
charlesmn 0:3ac96e360672 2226 #define VL53L1_SHADOW_RESULT__MM_INNER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC3
charlesmn 0:3ac96e360672 2227
charlesmn 0:3ac96e360672 2228 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0 0x0FC4
charlesmn 0:3ac96e360672 2229
charlesmn 0:3ac96e360672 2230 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_HI 0x0FC4
charlesmn 0:3ac96e360672 2231
charlesmn 0:3ac96e360672 2232 #define VL53L1_SHADOW_RESULT__MM_OUTER_ACTUAL_EFFECTIVE_SPADS_SD0_LO 0x0FC5
charlesmn 0:3ac96e360672 2233
charlesmn 0:3ac96e360672 2234 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0 0x0FC6
charlesmn 0:3ac96e360672 2235
charlesmn 0:3ac96e360672 2236 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_HI 0x0FC6
charlesmn 0:3ac96e360672 2237
charlesmn 0:3ac96e360672 2238 #define VL53L1_SHADOW_RESULT__AVG_SIGNAL_COUNT_RATE_MCPS_SD0_LO 0x0FC7
charlesmn 0:3ac96e360672 2239
charlesmn 0:3ac96e360672 2240 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1 0x0FC8
charlesmn 0:3ac96e360672 2241
charlesmn 0:3ac96e360672 2242 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_HI 0x0FC8
charlesmn 0:3ac96e360672 2243
charlesmn 0:3ac96e360672 2244 #define VL53L1_SHADOW_RESULT__DSS_ACTUAL_EFFECTIVE_SPADS_SD1_LO 0x0FC9
charlesmn 0:3ac96e360672 2245
charlesmn 0:3ac96e360672 2246 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1 0x0FCA
charlesmn 0:3ac96e360672 2247
charlesmn 0:3ac96e360672 2248 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_HI 0x0FCA
charlesmn 0:3ac96e360672 2249
charlesmn 0:3ac96e360672 2250 #define VL53L1_SHADOW_RESULT__PEAK_SIGNAL_COUNT_RATE_MCPS_SD1_LO 0x0FCB
charlesmn 0:3ac96e360672 2251
charlesmn 0:3ac96e360672 2252 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1 0x0FCC
charlesmn 0:3ac96e360672 2253
charlesmn 0:3ac96e360672 2254 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_HI 0x0FCC
charlesmn 0:3ac96e360672 2255
charlesmn 0:3ac96e360672 2256 #define VL53L1_SHADOW_RESULT__AMBIENT_COUNT_RATE_MCPS_SD1_LO 0x0FCD
charlesmn 0:3ac96e360672 2257
charlesmn 0:3ac96e360672 2258 #define VL53L1_SHADOW_RESULT__SIGMA_SD1 0x0FCE
charlesmn 0:3ac96e360672 2259
charlesmn 0:3ac96e360672 2260 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_HI 0x0FCE
charlesmn 0:3ac96e360672 2261
charlesmn 0:3ac96e360672 2262 #define VL53L1_SHADOW_RESULT__SIGMA_SD1_LO 0x0FCF
charlesmn 0:3ac96e360672 2263
charlesmn 0:3ac96e360672 2264 #define VL53L1_SHADOW_RESULT__PHASE_SD1 0x0FD0
charlesmn 0:3ac96e360672 2265
charlesmn 0:3ac96e360672 2266 #define VL53L1_SHADOW_RESULT__PHASE_SD1_HI 0x0FD0
charlesmn 0:3ac96e360672 2267
charlesmn 0:3ac96e360672 2268 #define VL53L1_SHADOW_RESULT__PHASE_SD1_LO 0x0FD1
charlesmn 0:3ac96e360672 2269
charlesmn 0:3ac96e360672 2270 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1 0x0FD2
charlesmn 0:3ac96e360672 2271
charlesmn 0:3ac96e360672 2272 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_HI 0x0FD2
charlesmn 0:3ac96e360672 2273
charlesmn 0:3ac96e360672 2274 #define VL53L1_SHADOW_RESULT__FINAL_CROSSTALK_CORRECTED_RANGE_MM_SD1_LO 0x0FD3
charlesmn 0:3ac96e360672 2275
charlesmn 0:3ac96e360672 2276 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1 0x0FD4
charlesmn 0:3ac96e360672 2277
charlesmn 0:3ac96e360672 2278 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_HI 0x0FD4
charlesmn 0:3ac96e360672 2279
charlesmn 0:3ac96e360672 2280 #define VL53L1_SHADOW_RESULT__SPARE_0_SD1_LO 0x0FD5
charlesmn 0:3ac96e360672 2281
charlesmn 0:3ac96e360672 2282 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1 0x0FD6
charlesmn 0:3ac96e360672 2283
charlesmn 0:3ac96e360672 2284 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_HI 0x0FD6
charlesmn 0:3ac96e360672 2285
charlesmn 0:3ac96e360672 2286 #define VL53L1_SHADOW_RESULT__SPARE_1_SD1_LO 0x0FD7
charlesmn 0:3ac96e360672 2287
charlesmn 0:3ac96e360672 2288 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1 0x0FD8
charlesmn 0:3ac96e360672 2289
charlesmn 0:3ac96e360672 2290 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_HI 0x0FD8
charlesmn 0:3ac96e360672 2291
charlesmn 0:3ac96e360672 2292 #define VL53L1_SHADOW_RESULT__SPARE_2_SD1_LO 0x0FD9
charlesmn 0:3ac96e360672 2293
charlesmn 0:3ac96e360672 2294 #define VL53L1_SHADOW_RESULT__SPARE_3_SD1 0x0FDA
charlesmn 0:3ac96e360672 2295
charlesmn 0:3ac96e360672 2296 #define VL53L1_SHADOW_RESULT__THRESH_INFO 0x0FDB
charlesmn 0:3ac96e360672 2297
charlesmn 0:3ac96e360672 2298 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0 0x0FDC
charlesmn 0:3ac96e360672 2299
charlesmn 0:3ac96e360672 2300 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_3 0x0FDC
charlesmn 0:3ac96e360672 2301
charlesmn 0:3ac96e360672 2302 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_2 0x0FDD
charlesmn 0:3ac96e360672 2303
charlesmn 0:3ac96e360672 2304 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_1 0x0FDE
charlesmn 0:3ac96e360672 2305
charlesmn 0:3ac96e360672 2306 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD0_0 0x0FDF
charlesmn 0:3ac96e360672 2307
charlesmn 0:3ac96e360672 2308 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0 0x0FE0
charlesmn 0:3ac96e360672 2309
charlesmn 0:3ac96e360672 2310 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_3 0x0FE0
charlesmn 0:3ac96e360672 2311
charlesmn 0:3ac96e360672 2312 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_2 0x0FE1
charlesmn 0:3ac96e360672 2313
charlesmn 0:3ac96e360672 2314 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_1 0x0FE2
charlesmn 0:3ac96e360672 2315
charlesmn 0:3ac96e360672 2316 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD0_0 0x0FE3
charlesmn 0:3ac96e360672 2317
charlesmn 0:3ac96e360672 2318 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0 0x0FE4
charlesmn 0:3ac96e360672 2319
charlesmn 0:3ac96e360672 2320 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_3 0x0FE4
charlesmn 0:3ac96e360672 2321
charlesmn 0:3ac96e360672 2322 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_2 0x0FE5
charlesmn 0:3ac96e360672 2323
charlesmn 0:3ac96e360672 2324 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_1 0x0FE6
charlesmn 0:3ac96e360672 2325
charlesmn 0:3ac96e360672 2326 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD0_0 0x0FE7
charlesmn 0:3ac96e360672 2327
charlesmn 0:3ac96e360672 2328 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0 0x0FE8
charlesmn 0:3ac96e360672 2329
charlesmn 0:3ac96e360672 2330 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_3 0x0FE8
charlesmn 0:3ac96e360672 2331
charlesmn 0:3ac96e360672 2332 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_2 0x0FE9
charlesmn 0:3ac96e360672 2333
charlesmn 0:3ac96e360672 2334 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_1 0x0FEA
charlesmn 0:3ac96e360672 2335
charlesmn 0:3ac96e360672 2336 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD0_0 0x0FEB
charlesmn 0:3ac96e360672 2337
charlesmn 0:3ac96e360672 2338 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1 0x0FEC
charlesmn 0:3ac96e360672 2339
charlesmn 0:3ac96e360672 2340 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_3 0x0FEC
charlesmn 0:3ac96e360672 2341
charlesmn 0:3ac96e360672 2342 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_2 0x0FED
charlesmn 0:3ac96e360672 2343
charlesmn 0:3ac96e360672 2344 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_1 0x0FEE
charlesmn 0:3ac96e360672 2345
charlesmn 0:3ac96e360672 2346 #define VL53L1_SHADOW_RESULT_CORE__AMBIENT_WINDOW_EVENTS_SD1_0 0x0FEF
charlesmn 0:3ac96e360672 2347
charlesmn 0:3ac96e360672 2348 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1 0x0FF0
charlesmn 0:3ac96e360672 2349
charlesmn 0:3ac96e360672 2350 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_3 0x0FF0
charlesmn 0:3ac96e360672 2351
charlesmn 0:3ac96e360672 2352 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_2 0x0FF1
charlesmn 0:3ac96e360672 2353
charlesmn 0:3ac96e360672 2354 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_1 0x0FF2
charlesmn 0:3ac96e360672 2355
charlesmn 0:3ac96e360672 2356 #define VL53L1_SHADOW_RESULT_CORE__RANGING_TOTAL_EVENTS_SD1_0 0x0FF3
charlesmn 0:3ac96e360672 2357
charlesmn 0:3ac96e360672 2358 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1 0x0FF4
charlesmn 0:3ac96e360672 2359
charlesmn 0:3ac96e360672 2360 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_3 0x0FF4
charlesmn 0:3ac96e360672 2361
charlesmn 0:3ac96e360672 2362 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_2 0x0FF5
charlesmn 0:3ac96e360672 2363
charlesmn 0:3ac96e360672 2364 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_1 0x0FF6
charlesmn 0:3ac96e360672 2365
charlesmn 0:3ac96e360672 2366 #define VL53L1_SHADOW_RESULT_CORE__SIGNAL_TOTAL_EVENTS_SD1_0 0x0FF7
charlesmn 0:3ac96e360672 2367
charlesmn 0:3ac96e360672 2368 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1 0x0FF8
charlesmn 0:3ac96e360672 2369
charlesmn 0:3ac96e360672 2370 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_3 0x0FF8
charlesmn 0:3ac96e360672 2371
charlesmn 0:3ac96e360672 2372 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_2 0x0FF9
charlesmn 0:3ac96e360672 2373
charlesmn 0:3ac96e360672 2374 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_1 0x0FFA
charlesmn 0:3ac96e360672 2375
charlesmn 0:3ac96e360672 2376 #define VL53L1_SHADOW_RESULT_CORE__TOTAL_PERIODS_ELAPSED_SD1_0 0x0FFB
charlesmn 0:3ac96e360672 2377
charlesmn 0:3ac96e360672 2378 #define VL53L1_SHADOW_RESULT_CORE__SPARE_0 0x0FFC
charlesmn 0:3ac96e360672 2379
charlesmn 0:3ac96e360672 2380 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_HI 0x0FFE
charlesmn 0:3ac96e360672 2381
charlesmn 0:3ac96e360672 2382 #define VL53L1_SHADOW_PHASECAL_RESULT__REFERENCE_PHASE_LO 0x0FFF
charlesmn 0:3ac96e360672 2383
charlesmn 0:3ac96e360672 2384
charlesmn 0:3ac96e360672 2385
charlesmn 0:3ac96e360672 2386
charlesmn 0:3ac96e360672 2387
charlesmn 0:3ac96e360672 2388 #endif
charlesmn 0:3ac96e360672 2389
charlesmn 0:3ac96e360672 2390