ST Expansion SW Team / VL53L1

Fork, renaming of VL53L1CB-2

Dependencies:   X_NUCLEO_COMMON ST_INTERFACES

Dependents:   X_NUCLEO_53L1CB

inc/vl53l1_nvm_structs.h@13:3f1b341901dd, 2021-06-11 (annotated)

Committer:
Charles MacNeill
Date:
Fri Jun 11 17:08:27 2021 +0100
Revision:
13:3f1b341901dd
Parent:
7:1add29d51e72 
changing case of vl53l1cb.* so it works in linux

Who changed what in which revision?

UserRevisionLine numberNew contents of line
charlesmn 0:3ac96e360672 1
Charles MacNeill 7:1add29d51e72 2 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
Charles MacNeill 7:1add29d51e72 3 /******************************************************************************
charlesmn 0:3ac96e360672 4 * Copyright (c) 2020, STMicroelectronics - All Rights Reserved
charlesmn 0:3ac96e360672 5
Charles MacNeill 7:1add29d51e72 6 This file is part of VL53L1 and is dual licensed,
Charles MacNeill 7:1add29d51e72 7 either GPL-2.0+
charlesmn 0:3ac96e360672 8 or 'BSD 3-clause "New" or "Revised" License' , at your option.
Charles MacNeill 7:1add29d51e72 9 ******************************************************************************
Charles MacNeill 7:1add29d51e72 10 */
charlesmn 0:3ac96e360672 11
charlesmn 0:3ac96e360672 12
charlesmn 0:3ac96e360672 13
charlesmn 0:3ac96e360672 14
charlesmn 0:3ac96e360672 15
charlesmn 0:3ac96e360672 16
charlesmn 0:3ac96e360672 17
charlesmn 0:3ac96e360672 18 #ifndef _VL53L1_NVM_STRUCTS_H_
charlesmn 0:3ac96e360672 19 #define _VL53L1_NVM_STRUCTS_H_
charlesmn 0:3ac96e360672 20
charlesmn 0:3ac96e360672 21
charlesmn 0:3ac96e360672 22 #ifdef __cplusplus
charlesmn 0:3ac96e360672 23 extern "C"
charlesmn 0:3ac96e360672 24 {
charlesmn 0:3ac96e360672 25 #endif
charlesmn 0:3ac96e360672 26
charlesmn 0:3ac96e360672 27 #include "vl53l1_platform.h"
charlesmn 0:3ac96e360672 28 #include "vl53l1_ll_def.h"
charlesmn 0:3ac96e360672 29
charlesmn 0:3ac96e360672 30
charlesmn 0:3ac96e360672 31
charlesmn 0:3ac96e360672 32
charlesmn 0:3ac96e360672 33 typedef struct {
charlesmn 0:3ac96e360672 34
charlesmn 0:3ac96e360672 35 uint16_t result__actual_effective_rtn_spads;
charlesmn 0:3ac96e360672 36
charlesmn 0:3ac96e360672 37 uint8_t ref_spad_array__num_requested_ref_spads;
charlesmn 0:3ac96e360672 38
charlesmn 0:3ac96e360672 39 uint8_t ref_spad_array__ref_location;
charlesmn 0:3ac96e360672 40
charlesmn 0:3ac96e360672 41 uint16_t result__peak_signal_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 42
charlesmn 0:3ac96e360672 43 uint16_t result__ambient_count_rate_rtn_mcps;
charlesmn 0:3ac96e360672 44
charlesmn 0:3ac96e360672 45 uint16_t result__peak_signal_count_rate_ref_mcps;
charlesmn 0:3ac96e360672 46
charlesmn 0:3ac96e360672 47 uint16_t result__ambient_count_rate_ref_mcps;
charlesmn 0:3ac96e360672 48
charlesmn 0:3ac96e360672 49 uint16_t measured_distance_mm;
charlesmn 0:3ac96e360672 50
charlesmn 0:3ac96e360672 51 uint16_t measured_distance_stdev_mm;
charlesmn 0:3ac96e360672 52
charlesmn 0:3ac96e360672 53
charlesmn 0:3ac96e360672 54 } VL53L1_decoded_nvm_fmt_range_data_t;
charlesmn 0:3ac96e360672 55
charlesmn 0:3ac96e360672 56
charlesmn 0:3ac96e360672 57
charlesmn 0:3ac96e360672 58
charlesmn 0:3ac96e360672 59 typedef struct {
charlesmn 0:3ac96e360672 60
charlesmn 0:3ac96e360672 61 char nvm__fmt__fgc[19];
charlesmn 0:3ac96e360672 62
charlesmn 0:3ac96e360672 63 uint8_t nvm__fmt__test_program_major;
charlesmn 0:3ac96e360672 64
charlesmn 0:3ac96e360672 65 uint8_t nvm__fmt__test_program_minor;
charlesmn 0:3ac96e360672 66
charlesmn 0:3ac96e360672 67 uint8_t nvm__fmt__map_major;
charlesmn 0:3ac96e360672 68
charlesmn 0:3ac96e360672 69 uint8_t nvm__fmt__map_minor;
charlesmn 0:3ac96e360672 70
charlesmn 0:3ac96e360672 71 uint8_t nvm__fmt__year;
charlesmn 0:3ac96e360672 72
charlesmn 0:3ac96e360672 73 uint8_t nvm__fmt__month;
charlesmn 0:3ac96e360672 74
charlesmn 0:3ac96e360672 75 uint8_t nvm__fmt__day;
charlesmn 0:3ac96e360672 76
charlesmn 0:3ac96e360672 77 uint8_t nvm__fmt__module_date_phase;
charlesmn 0:3ac96e360672 78
charlesmn 0:3ac96e360672 79 uint16_t nvm__fmt__time;
charlesmn 0:3ac96e360672 80
charlesmn 0:3ac96e360672 81 uint8_t nvm__fmt__tester_id;
charlesmn 0:3ac96e360672 82
charlesmn 0:3ac96e360672 83 uint8_t nvm__fmt__site_id;
charlesmn 0:3ac96e360672 84
charlesmn 0:3ac96e360672 85 uint8_t nvm__ews__test_program_major;
charlesmn 0:3ac96e360672 86
charlesmn 0:3ac96e360672 87 uint8_t nvm__ews__test_program_minor;
charlesmn 0:3ac96e360672 88
charlesmn 0:3ac96e360672 89 uint8_t nvm__ews__probe_card_major;
charlesmn 0:3ac96e360672 90
charlesmn 0:3ac96e360672 91 uint8_t nvm__ews__probe_card_minor;
charlesmn 0:3ac96e360672 92
charlesmn 0:3ac96e360672 93 uint8_t nvm__ews__tester_id;
charlesmn 0:3ac96e360672 94
charlesmn 0:3ac96e360672 95
charlesmn 0:3ac96e360672 96 char nvm__ews__lot[8];
charlesmn 0:3ac96e360672 97
charlesmn 0:3ac96e360672 98 uint8_t nvm__ews__wafer;
charlesmn 0:3ac96e360672 99
charlesmn 0:3ac96e360672 100 uint8_t nvm__ews__xcoord;
charlesmn 0:3ac96e360672 101
charlesmn 0:3ac96e360672 102 uint8_t nvm__ews__ycoord;
charlesmn 0:3ac96e360672 103
charlesmn 0:3ac96e360672 104 } VL53L1_decoded_nvm_fmt_info_t;
charlesmn 0:3ac96e360672 105
charlesmn 0:3ac96e360672 106
charlesmn 0:3ac96e360672 107
charlesmn 0:3ac96e360672 108
charlesmn 0:3ac96e360672 109 typedef struct {
charlesmn 0:3ac96e360672 110
charlesmn 0:3ac96e360672 111 uint8_t nvm__ews__test_program_major;
charlesmn 0:3ac96e360672 112
charlesmn 0:3ac96e360672 113 uint8_t nvm__ews__test_program_minor;
charlesmn 0:3ac96e360672 114
charlesmn 0:3ac96e360672 115 uint8_t nvm__ews__probe_card_major;
charlesmn 0:3ac96e360672 116
charlesmn 0:3ac96e360672 117 uint8_t nvm__ews__probe_card_minor;
charlesmn 0:3ac96e360672 118
charlesmn 0:3ac96e360672 119 uint8_t nvm__ews__tester_id;
charlesmn 0:3ac96e360672 120
charlesmn 0:3ac96e360672 121
charlesmn 0:3ac96e360672 122 char nvm__ews__lot[8];
charlesmn 0:3ac96e360672 123
charlesmn 0:3ac96e360672 124 uint8_t nvm__ews__wafer;
charlesmn 0:3ac96e360672 125
charlesmn 0:3ac96e360672 126 uint8_t nvm__ews__xcoord;
charlesmn 0:3ac96e360672 127
charlesmn 0:3ac96e360672 128 uint8_t nvm__ews__ycoord;
charlesmn 0:3ac96e360672 129
charlesmn 0:3ac96e360672 130
charlesmn 0:3ac96e360672 131 } VL53L1_decoded_nvm_ews_info_t;
charlesmn 0:3ac96e360672 132
charlesmn 0:3ac96e360672 133
charlesmn 0:3ac96e360672 134
charlesmn 0:3ac96e360672 135
charlesmn 0:3ac96e360672 136 typedef struct {
charlesmn 0:3ac96e360672 137 uint8_t nvm__identification_model_id;
charlesmn 0:3ac96e360672 138
charlesmn 0:3ac96e360672 139 uint8_t nvm__identification_module_type;
charlesmn 0:3ac96e360672 140
charlesmn 0:3ac96e360672 141 uint8_t nvm__identification_revision_id;
charlesmn 0:3ac96e360672 142
charlesmn 0:3ac96e360672 143 uint16_t nvm__identification_module_id;
charlesmn 0:3ac96e360672 144
charlesmn 0:3ac96e360672 145 uint8_t nvm__i2c_valid;
charlesmn 0:3ac96e360672 146
charlesmn 0:3ac96e360672 147 uint8_t nvm__i2c_device_address_ews;
charlesmn 0:3ac96e360672 148
charlesmn 0:3ac96e360672 149 uint16_t nvm__ews__fast_osc_frequency;
charlesmn 0:3ac96e360672 150
charlesmn 0:3ac96e360672 151 uint8_t nvm__ews__fast_osc_trim_max;
charlesmn 0:3ac96e360672 152
charlesmn 0:3ac96e360672 153 uint8_t nvm__ews__fast_osc_freq_set;
charlesmn 0:3ac96e360672 154
charlesmn 0:3ac96e360672 155 uint16_t nvm__ews__slow_osc_calibration;
charlesmn 0:3ac96e360672 156
charlesmn 0:3ac96e360672 157 uint16_t nvm__fmt__fast_osc_frequency;
charlesmn 0:3ac96e360672 158
charlesmn 0:3ac96e360672 159 uint8_t nvm__fmt__fast_osc_trim_max;
charlesmn 0:3ac96e360672 160
charlesmn 0:3ac96e360672 161 uint8_t nvm__fmt__fast_osc_freq_set;
charlesmn 0:3ac96e360672 162
charlesmn 0:3ac96e360672 163 uint16_t nvm__fmt__slow_osc_calibration;
charlesmn 0:3ac96e360672 164
charlesmn 0:3ac96e360672 165 uint8_t nvm__vhv_config_unlock;
charlesmn 0:3ac96e360672 166
charlesmn 0:3ac96e360672 167 uint8_t nvm__ref_selvddpix;
charlesmn 0:3ac96e360672 168
charlesmn 0:3ac96e360672 169 uint8_t nvm__ref_selvquench;
charlesmn 0:3ac96e360672 170
charlesmn 0:3ac96e360672 171 uint8_t nvm__regavdd1v2_sel;
charlesmn 0:3ac96e360672 172
charlesmn 0:3ac96e360672 173 uint8_t nvm__regdvdd1v2_sel;
charlesmn 0:3ac96e360672 174
charlesmn 0:3ac96e360672 175 uint8_t nvm__vhv_timeout__macrop;
charlesmn 0:3ac96e360672 176
charlesmn 0:3ac96e360672 177 uint8_t nvm__vhv_loop_bound;
charlesmn 0:3ac96e360672 178
charlesmn 0:3ac96e360672 179 uint8_t nvm__vhv_count_threshold;
charlesmn 0:3ac96e360672 180
charlesmn 0:3ac96e360672 181 uint8_t nvm__vhv_offset;
charlesmn 0:3ac96e360672 182
charlesmn 0:3ac96e360672 183 uint8_t nvm__vhv_init_enable;
charlesmn 0:3ac96e360672 184
charlesmn 0:3ac96e360672 185 uint8_t nvm__vhv_init_value;
charlesmn 0:3ac96e360672 186
charlesmn 0:3ac96e360672 187 uint8_t nvm__laser_safety_vcsel_trim_ll;
charlesmn 0:3ac96e360672 188
charlesmn 0:3ac96e360672 189 uint8_t nvm__laser_safety_vcsel_selion_ll;
charlesmn 0:3ac96e360672 190
charlesmn 0:3ac96e360672 191 uint8_t nvm__laser_safety_vcsel_selion_max_ll;
charlesmn 0:3ac96e360672 192
charlesmn 0:3ac96e360672 193 uint8_t nvm__laser_safety_mult_ll;
charlesmn 0:3ac96e360672 194
charlesmn 0:3ac96e360672 195 uint8_t nvm__laser_safety_clip_ll;
charlesmn 0:3ac96e360672 196
charlesmn 0:3ac96e360672 197 uint8_t nvm__laser_safety_vcsel_trim_ld;
charlesmn 0:3ac96e360672 198
charlesmn 0:3ac96e360672 199 uint8_t nvm__laser_safety_vcsel_selion_ld;
charlesmn 0:3ac96e360672 200
charlesmn 0:3ac96e360672 201 uint8_t nvm__laser_safety_vcsel_selion_max_ld;
charlesmn 0:3ac96e360672 202
charlesmn 0:3ac96e360672 203 uint8_t nvm__laser_safety_mult_ld;
charlesmn 0:3ac96e360672 204
charlesmn 0:3ac96e360672 205 uint8_t nvm__laser_safety_clip_ld;
charlesmn 0:3ac96e360672 206
charlesmn 0:3ac96e360672 207 uint8_t nvm__laser_safety_lock_byte;
charlesmn 0:3ac96e360672 208
charlesmn 0:3ac96e360672 209 uint8_t nvm__laser_safety_unlock_byte;
charlesmn 0:3ac96e360672 210
charlesmn 0:3ac96e360672 211 uint8_t nvm__ews__spad_enables_rtn[VL53L1_RTN_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 212
charlesmn 0:3ac96e360672 213 uint8_t nvm__ews__spad_enables_ref__loc1[VL53L1_REF_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 214
charlesmn 0:3ac96e360672 215 uint8_t nvm__ews__spad_enables_ref__loc2[VL53L1_REF_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 216
charlesmn 0:3ac96e360672 217 uint8_t nvm__ews__spad_enables_ref__loc3[VL53L1_REF_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 218
charlesmn 0:3ac96e360672 219 uint8_t nvm__fmt__spad_enables_rtn[VL53L1_RTN_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 220
charlesmn 0:3ac96e360672 221 uint8_t nvm__fmt__spad_enables_ref__loc1[VL53L1_REF_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 222
charlesmn 0:3ac96e360672 223 uint8_t nvm__fmt__spad_enables_ref__loc2[VL53L1_REF_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 224
charlesmn 0:3ac96e360672 225 uint8_t nvm__fmt__spad_enables_ref__loc3[VL53L1_REF_SPAD_BUFFER_SIZE];
charlesmn 0:3ac96e360672 226
charlesmn 0:3ac96e360672 227 uint8_t nvm__fmt__roi_config__mode_roi_centre_spad;
charlesmn 0:3ac96e360672 228
charlesmn 0:3ac96e360672 229 uint8_t nvm__fmt__roi_config__mode_roi_x_size;
charlesmn 0:3ac96e360672 230
charlesmn 0:3ac96e360672 231 uint8_t nvm__fmt__roi_config__mode_roi_y_size;
charlesmn 0:3ac96e360672 232
charlesmn 0:3ac96e360672 233 uint8_t nvm__fmt__ref_spad_apply__num_requested_ref_spad;
charlesmn 0:3ac96e360672 234
charlesmn 0:3ac96e360672 235 uint8_t nvm__fmt__ref_spad_man__ref_location;
charlesmn 0:3ac96e360672 236
charlesmn 0:3ac96e360672 237 uint16_t nvm__fmt__mm_config__inner_offset_mm;
charlesmn 0:3ac96e360672 238
charlesmn 0:3ac96e360672 239 uint16_t nvm__fmt__mm_config__outer_offset_mm;
charlesmn 0:3ac96e360672 240
charlesmn 0:3ac96e360672 241 uint16_t nvm__fmt__algo_part_to_part_range_offset_mm;
charlesmn 0:3ac96e360672 242
charlesmn 0:3ac96e360672 243 uint16_t nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 244
charlesmn 0:3ac96e360672 245 uint16_t nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 246
charlesmn 0:3ac96e360672 247 uint16_t nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 248
charlesmn 0:3ac96e360672 249 uint8_t nvm__fmt__spare__host_config__nvm_config_spare_0;
charlesmn 0:3ac96e360672 250
charlesmn 0:3ac96e360672 251 uint8_t nvm__fmt__spare__host_config__nvm_config_spare_1;
charlesmn 0:3ac96e360672 252
charlesmn 0:3ac96e360672 253 uint8_t nvm__customer_space_programmed;
charlesmn 0:3ac96e360672 254
charlesmn 0:3ac96e360672 255 uint8_t nvm__cust__i2c_device_address;
charlesmn 0:3ac96e360672 256
charlesmn 0:3ac96e360672 257 uint8_t nvm__cust__ref_spad_apply__num_requested_ref_spad;
charlesmn 0:3ac96e360672 258
charlesmn 0:3ac96e360672 259 uint8_t nvm__cust__ref_spad_man__ref_location;
charlesmn 0:3ac96e360672 260
charlesmn 0:3ac96e360672 261 uint16_t nvm__cust__mm_config__inner_offset_mm;
charlesmn 0:3ac96e360672 262
charlesmn 0:3ac96e360672 263 uint16_t nvm__cust__mm_config__outer_offset_mm;
charlesmn 0:3ac96e360672 264
charlesmn 0:3ac96e360672 265 uint16_t nvm__cust__algo_part_to_part_range_offset_mm;
charlesmn 0:3ac96e360672 266
charlesmn 0:3ac96e360672 267 uint16_t nvm__cust__algo__crosstalk_compensation_plane_offset_kcps;
charlesmn 0:3ac96e360672 268
charlesmn 0:3ac96e360672 269 uint16_t nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps;
charlesmn 0:3ac96e360672 270
charlesmn 0:3ac96e360672 271 uint16_t nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps;
charlesmn 0:3ac96e360672 272
charlesmn 0:3ac96e360672 273 uint8_t nvm__cust__spare__host_config__nvm_config_spare_0;
charlesmn 0:3ac96e360672 274
charlesmn 0:3ac96e360672 275 uint8_t nvm__cust__spare__host_config__nvm_config_spare_1;
charlesmn 0:3ac96e360672 276
charlesmn 0:3ac96e360672 277
charlesmn 0:3ac96e360672 278 VL53L1_optical_centre_t fmt_optical_centre;
charlesmn 0:3ac96e360672 279 VL53L1_cal_peak_rate_map_t fmt_peak_rate_map;
charlesmn 0:3ac96e360672 280 VL53L1_additional_offset_cal_data_t fmt_add_offset_data;
charlesmn 0:3ac96e360672 281
charlesmn 0:3ac96e360672 282 VL53L1_decoded_nvm_fmt_range_data_t
charlesmn 0:3ac96e360672 283 fmt_range_data[VL53L1_NVM_MAX_FMT_RANGE_DATA];
charlesmn 0:3ac96e360672 284
charlesmn 0:3ac96e360672 285 VL53L1_decoded_nvm_fmt_info_t fmt_info;
charlesmn 0:3ac96e360672 286 VL53L1_decoded_nvm_ews_info_t ews_info;
charlesmn 0:3ac96e360672 287
charlesmn 0:3ac96e360672 288 } VL53L1_decoded_nvm_data_t;
charlesmn 0:3ac96e360672 289
charlesmn 0:3ac96e360672 290
charlesmn 0:3ac96e360672 291
charlesmn 0:3ac96e360672 292 #ifdef __cplusplus
charlesmn 0:3ac96e360672 293 }
charlesmn 0:3ac96e360672 294 #endif
charlesmn 0:3ac96e360672 295
charlesmn 0:3ac96e360672 296 #endif
charlesmn 0:3ac96e360672 297