SDG+USBHost(Mouse) Sample

Dependencies:   Sound_Generator USBHost_custom

Fork of SDG_Mouse_Sample by GR-PEACH_producer_meeting

Information

Japanese version is available in lower part of this page.
このページの後半に日本語版が用意されています.

What is this?

This program is a demonstration that sounds the sound by mouse operation by using USBHost(Mouse) and Sound Generator.

Settings

Close JP3 of GR-PEACH.
/media/uploads/RyoheiHagimoto/sdg-mouse.jpg

Operation

operationeffect
Right clickSounds
Left clickReset to base tone (C)
Moves the mouse to the rightLower the sound
Moves the mouse to the leftHigher the sound
Center cursorAdjust the sensitivity.
Reset the reference value in the click.

Others

The default setting of serial communication (baud rate etc.) in mbed is shown the following link.
Please refer to the link and change the settings of your PC terminal software.
The default value of baud rate in mbed is 9600, and this application uses baud rate 9600.
https://developer.mbed.org/teams/Renesas/wiki/GR-PEACH-Getting-Started#install-the-usb-serial-communication


概要

このプログラムは、USBHost(Mouse) + Sound Generatorで、マウス操作による擬似笛デモです。

設定

GR-PEACHのJP3をショートする必要があります。
/media/uploads/RyoheiHagimoto/sdg-mouse.jpg

操作方法

操作内容
右クリック音出力開始
左クリック基準音(ド)にリセット
マウス右移動高音になります
マウス左移動低音になります
センターカーソル音高低の変化量調整(クリックで基準値にリセット)

Others

mbedのシリアル通信(ボーレート等)のデフォルト設定は以下のリンクに示しています。
リンクを参考に、お使いのPCターミナルソフトの設定を変更して下さい。
mbedでのボーレートのデフォルト値は9600で、このサンプルではボーレート9600を使います。
https://developer.mbed.org/teams/Renesas/wiki/GR-PEACH-Getting-Started#install-the-usb-serial-communication

Committer:
samux
Date:
Tue Mar 12 17:23:37 2013 +0000
Revision:
4:b320d68e98e7
Parent:
0:a554658735bf
Child:
8:93da8ea2708b
bug fixes - support composite device

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 0:a554658735bf 1 /* Copyright (c) 2010-2012 mbed.org, MIT License
mbed_official 0:a554658735bf 2 *
mbed_official 0:a554658735bf 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
mbed_official 0:a554658735bf 4 * and associated documentation files (the "Software"), to deal in the Software without
mbed_official 0:a554658735bf 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
mbed_official 0:a554658735bf 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
mbed_official 0:a554658735bf 7 * Software is furnished to do so, subject to the following conditions:
mbed_official 0:a554658735bf 8 *
mbed_official 0:a554658735bf 9 * The above copyright notice and this permission notice shall be included in all copies or
mbed_official 0:a554658735bf 10 * substantial portions of the Software.
mbed_official 0:a554658735bf 11 *
mbed_official 0:a554658735bf 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
mbed_official 0:a554658735bf 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
mbed_official 0:a554658735bf 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
mbed_official 0:a554658735bf 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mbed_official 0:a554658735bf 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
mbed_official 0:a554658735bf 17 */
mbed_official 0:a554658735bf 18
mbed_official 0:a554658735bf 19 #include "mbed.h"
mbed_official 0:a554658735bf 20 #include "USBHALHost.h"
mbed_official 0:a554658735bf 21 #include "dbg.h"
mbed_official 0:a554658735bf 22
mbed_official 0:a554658735bf 23 // bits of the USB/OTG clock control register
mbed_official 0:a554658735bf 24 #define HOST_CLK_EN (1<<0)
mbed_official 0:a554658735bf 25 #define DEV_CLK_EN (1<<1)
mbed_official 0:a554658735bf 26 #define PORTSEL_CLK_EN (1<<3)
mbed_official 0:a554658735bf 27 #define AHB_CLK_EN (1<<4)
mbed_official 0:a554658735bf 28
mbed_official 0:a554658735bf 29 // bits of the USB/OTG clock status register
mbed_official 0:a554658735bf 30 #define HOST_CLK_ON (1<<0)
mbed_official 0:a554658735bf 31 #define DEV_CLK_ON (1<<1)
mbed_official 0:a554658735bf 32 #define PORTSEL_CLK_ON (1<<3)
mbed_official 0:a554658735bf 33 #define AHB_CLK_ON (1<<4)
mbed_official 0:a554658735bf 34
mbed_official 0:a554658735bf 35 // we need host clock, OTG/portsel clock and AHB clock
mbed_official 0:a554658735bf 36 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
mbed_official 0:a554658735bf 37
mbed_official 0:a554658735bf 38 #define HCCA_SIZE sizeof(HCCA)
mbed_official 0:a554658735bf 39 #define ED_SIZE sizeof(HCED)
mbed_official 0:a554658735bf 40 #define TD_SIZE sizeof(HCTD)
mbed_official 0:a554658735bf 41
mbed_official 0:a554658735bf 42 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
mbed_official 0:a554658735bf 43
mbed_official 0:a554658735bf 44 static volatile __align(256) uint8_t usb_buf[TOTAL_SIZE] __attribute((section("AHBSRAM1"),aligned)); //256 bytes aligned!
mbed_official 0:a554658735bf 45
mbed_official 0:a554658735bf 46 USBHALHost * USBHALHost::instHost;
mbed_official 0:a554658735bf 47
mbed_official 0:a554658735bf 48 USBHALHost::USBHALHost() {
mbed_official 0:a554658735bf 49 instHost = this;
mbed_official 0:a554658735bf 50 memInit();
mbed_official 0:a554658735bf 51 memset((void*)usb_hcca, 0, HCCA_SIZE);
mbed_official 0:a554658735bf 52 for (int i = 0; i < MAX_ENDPOINT; i++) {
mbed_official 0:a554658735bf 53 edBufAlloc[i] = false;
mbed_official 0:a554658735bf 54 }
mbed_official 0:a554658735bf 55 for (int i = 0; i < MAX_TD; i++) {
mbed_official 0:a554658735bf 56 tdBufAlloc[i] = false;
mbed_official 0:a554658735bf 57 }
mbed_official 0:a554658735bf 58 }
mbed_official 0:a554658735bf 59
mbed_official 0:a554658735bf 60 void USBHALHost::init() {
mbed_official 0:a554658735bf 61 NVIC_DisableIRQ(USB_IRQn);
mbed_official 0:a554658735bf 62
mbed_official 0:a554658735bf 63 //Cut power
mbed_official 0:a554658735bf 64 LPC_SC->PCONP &= ~(1UL<<31);
mbed_official 0:a554658735bf 65 wait_ms(100);
mbed_official 0:a554658735bf 66
mbed_official 0:a554658735bf 67 // turn on power for USB
mbed_official 0:a554658735bf 68 LPC_SC->PCONP |= (1UL<<31);
mbed_official 0:a554658735bf 69
mbed_official 0:a554658735bf 70 // Enable USB host clock, port selection and AHB clock
mbed_official 0:a554658735bf 71 LPC_USB->USBClkCtrl |= CLOCK_MASK;
mbed_official 0:a554658735bf 72
mbed_official 0:a554658735bf 73 // Wait for clocks to become available
mbed_official 0:a554658735bf 74 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK);
mbed_official 0:a554658735bf 75
mbed_official 0:a554658735bf 76 // it seems the bits[0:1] mean the following
mbed_official 0:a554658735bf 77 // 0: U1=device, U2=host
mbed_official 0:a554658735bf 78 // 1: U1=host, U2=host
mbed_official 0:a554658735bf 79 // 2: reserved
mbed_official 0:a554658735bf 80 // 3: U1=host, U2=device
mbed_official 0:a554658735bf 81 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
mbed_official 0:a554658735bf 82 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
mbed_official 0:a554658735bf 83 LPC_USB->OTGStCtrl |= 1;
mbed_official 0:a554658735bf 84
mbed_official 0:a554658735bf 85 // now that we've configured the ports, we can turn off the portsel clock
mbed_official 0:a554658735bf 86 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
mbed_official 0:a554658735bf 87
mbed_official 0:a554658735bf 88 // configure USB D+/D- pins
mbed_official 0:a554658735bf 89 // P0[29] = USB_D+, 01
mbed_official 0:a554658735bf 90 // P0[30] = USB_D-, 01
mbed_official 0:a554658735bf 91 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
mbed_official 0:a554658735bf 92 LPC_PINCON->PINSEL1 |= ((1<<26) | (1<<28));
mbed_official 0:a554658735bf 93
mbed_official 0:a554658735bf 94 LPC_USB->HcControl = 0; // HARDWARE RESET
mbed_official 0:a554658735bf 95 LPC_USB->HcControlHeadED = 0; // Initialize Control list head to Zero
mbed_official 0:a554658735bf 96 LPC_USB->HcBulkHeadED = 0; // Initialize Bulk list head to Zero
mbed_official 0:a554658735bf 97
mbed_official 0:a554658735bf 98 // Wait 100 ms before apply reset
mbed_official 0:a554658735bf 99 wait_ms(100);
mbed_official 0:a554658735bf 100
mbed_official 0:a554658735bf 101 // software reset
mbed_official 0:a554658735bf 102 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
mbed_official 0:a554658735bf 103
mbed_official 0:a554658735bf 104 // Write Fm Interval and Largest Data Packet Counter
mbed_official 0:a554658735bf 105 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL;
mbed_official 0:a554658735bf 106 LPC_USB->HcPeriodicStart = FI * 90 / 100;
mbed_official 0:a554658735bf 107
mbed_official 0:a554658735bf 108 // Put HC in operational state
mbed_official 0:a554658735bf 109 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
mbed_official 0:a554658735bf 110 // Set Global Power
mbed_official 0:a554658735bf 111 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC;
mbed_official 0:a554658735bf 112
mbed_official 0:a554658735bf 113 LPC_USB->HcHCCA = (uint32_t)(usb_hcca);
mbed_official 0:a554658735bf 114
mbed_official 0:a554658735bf 115 // Clear Interrrupt Status
mbed_official 0:a554658735bf 116 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus;
mbed_official 0:a554658735bf 117
mbed_official 0:a554658735bf 118 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
mbed_official 0:a554658735bf 119
mbed_official 0:a554658735bf 120 // Enable the USB Interrupt
mbed_official 0:a554658735bf 121 NVIC_SetVector(USB_IRQn, (uint32_t)(_usbisr));
mbed_official 0:a554658735bf 122 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
mbed_official 0:a554658735bf 123 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
mbed_official 0:a554658735bf 124
mbed_official 0:a554658735bf 125 NVIC_EnableIRQ(USB_IRQn);
mbed_official 0:a554658735bf 126
mbed_official 0:a554658735bf 127 // Check for any connected devices
mbed_official 0:a554658735bf 128 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
mbed_official 0:a554658735bf 129 //Device connected
samux 4:b320d68e98e7 130 wait_ms(150);
mbed_official 0:a554658735bf 131 USB_DBG("Device connected (%08x)\n\r", LPC_USB->HcRhPortStatus1);
mbed_official 0:a554658735bf 132 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
mbed_official 0:a554658735bf 133 }
mbed_official 0:a554658735bf 134 }
mbed_official 0:a554658735bf 135
mbed_official 0:a554658735bf 136 uint32_t USBHALHost::controlHeadED() {
mbed_official 0:a554658735bf 137 return LPC_USB->HcControlHeadED;
mbed_official 0:a554658735bf 138 }
mbed_official 0:a554658735bf 139
mbed_official 0:a554658735bf 140 uint32_t USBHALHost::bulkHeadED() {
mbed_official 0:a554658735bf 141 return LPC_USB->HcBulkHeadED;
mbed_official 0:a554658735bf 142 }
mbed_official 0:a554658735bf 143
mbed_official 0:a554658735bf 144 uint32_t USBHALHost::interruptHeadED() {
mbed_official 0:a554658735bf 145 return usb_hcca->IntTable[0];
mbed_official 0:a554658735bf 146 }
mbed_official 0:a554658735bf 147
mbed_official 0:a554658735bf 148 void USBHALHost::updateBulkHeadED(uint32_t addr) {
mbed_official 0:a554658735bf 149 LPC_USB->HcBulkHeadED = addr;
mbed_official 0:a554658735bf 150 }
mbed_official 0:a554658735bf 151
mbed_official 0:a554658735bf 152
mbed_official 0:a554658735bf 153 void USBHALHost::updateControlHeadED(uint32_t addr) {
mbed_official 0:a554658735bf 154 LPC_USB->HcControlHeadED = addr;
mbed_official 0:a554658735bf 155 }
mbed_official 0:a554658735bf 156
mbed_official 0:a554658735bf 157 void USBHALHost::updateInterruptHeadED(uint32_t addr) {
mbed_official 0:a554658735bf 158 usb_hcca->IntTable[0] = addr;
mbed_official 0:a554658735bf 159 }
mbed_official 0:a554658735bf 160
mbed_official 0:a554658735bf 161
mbed_official 0:a554658735bf 162 void USBHALHost::enableList(ENDPOINT_TYPE type) {
mbed_official 0:a554658735bf 163 switch(type) {
mbed_official 0:a554658735bf 164 case CONTROL_ENDPOINT:
mbed_official 0:a554658735bf 165 LPC_USB->HcCommandStatus = OR_CMD_STATUS_CLF;
mbed_official 0:a554658735bf 166 LPC_USB->HcControl |= OR_CONTROL_CLE;
mbed_official 0:a554658735bf 167 break;
mbed_official 0:a554658735bf 168 case ISOCHRONOUS_ENDPOINT:
mbed_official 0:a554658735bf 169 break;
mbed_official 0:a554658735bf 170 case BULK_ENDPOINT:
mbed_official 0:a554658735bf 171 LPC_USB->HcCommandStatus = OR_CMD_STATUS_BLF;
mbed_official 0:a554658735bf 172 LPC_USB->HcControl |= OR_CONTROL_BLE;
mbed_official 0:a554658735bf 173 break;
mbed_official 0:a554658735bf 174 case INTERRUPT_ENDPOINT:
mbed_official 0:a554658735bf 175 LPC_USB->HcControl |= OR_CONTROL_PLE;
mbed_official 0:a554658735bf 176 break;
mbed_official 0:a554658735bf 177 }
mbed_official 0:a554658735bf 178 }
mbed_official 0:a554658735bf 179
mbed_official 0:a554658735bf 180
mbed_official 0:a554658735bf 181 bool USBHALHost::disableList(ENDPOINT_TYPE type) {
mbed_official 0:a554658735bf 182 switch(type) {
mbed_official 0:a554658735bf 183 case CONTROL_ENDPOINT:
mbed_official 0:a554658735bf 184 if(LPC_USB->HcControl & OR_CONTROL_CLE) {
mbed_official 0:a554658735bf 185 LPC_USB->HcControl &= ~OR_CONTROL_CLE;
mbed_official 0:a554658735bf 186 return true;
mbed_official 0:a554658735bf 187 }
mbed_official 0:a554658735bf 188 return false;
mbed_official 0:a554658735bf 189 case ISOCHRONOUS_ENDPOINT:
mbed_official 0:a554658735bf 190 return false;
mbed_official 0:a554658735bf 191 case BULK_ENDPOINT:
mbed_official 0:a554658735bf 192 if(LPC_USB->HcControl & OR_CONTROL_BLE){
mbed_official 0:a554658735bf 193 LPC_USB->HcControl &= ~OR_CONTROL_BLE;
mbed_official 0:a554658735bf 194 return true;
mbed_official 0:a554658735bf 195 }
mbed_official 0:a554658735bf 196 return false;
mbed_official 0:a554658735bf 197 case INTERRUPT_ENDPOINT:
mbed_official 0:a554658735bf 198 if(LPC_USB->HcControl & OR_CONTROL_PLE) {
mbed_official 0:a554658735bf 199 LPC_USB->HcControl &= ~OR_CONTROL_PLE;
mbed_official 0:a554658735bf 200 return true;
mbed_official 0:a554658735bf 201 }
mbed_official 0:a554658735bf 202 return false;
mbed_official 0:a554658735bf 203 }
mbed_official 0:a554658735bf 204 return false;
mbed_official 0:a554658735bf 205 }
mbed_official 0:a554658735bf 206
mbed_official 0:a554658735bf 207
mbed_official 0:a554658735bf 208 void USBHALHost::memInit() {
mbed_official 0:a554658735bf 209 usb_hcca = (volatile HCCA *)usb_buf;
mbed_official 0:a554658735bf 210 usb_edBuf = usb_buf + HCCA_SIZE;
mbed_official 0:a554658735bf 211 usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
mbed_official 0:a554658735bf 212 }
mbed_official 0:a554658735bf 213
mbed_official 0:a554658735bf 214 volatile uint8_t * USBHALHost::getED() {
mbed_official 0:a554658735bf 215 for (int i = 0; i < MAX_ENDPOINT; i++) {
mbed_official 0:a554658735bf 216 if ( !edBufAlloc[i] ) {
mbed_official 0:a554658735bf 217 edBufAlloc[i] = true;
mbed_official 0:a554658735bf 218 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
mbed_official 0:a554658735bf 219 }
mbed_official 0:a554658735bf 220 }
mbed_official 0:a554658735bf 221 perror("Could not allocate ED\r\n");
mbed_official 0:a554658735bf 222 return NULL; //Could not alloc ED
mbed_official 0:a554658735bf 223 }
mbed_official 0:a554658735bf 224
mbed_official 0:a554658735bf 225 volatile uint8_t * USBHALHost::getTD() {
mbed_official 0:a554658735bf 226 int i;
mbed_official 0:a554658735bf 227 for (i = 0; i < MAX_TD; i++) {
mbed_official 0:a554658735bf 228 if ( !tdBufAlloc[i] ) {
mbed_official 0:a554658735bf 229 tdBufAlloc[i] = true;
mbed_official 0:a554658735bf 230 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
mbed_official 0:a554658735bf 231 }
mbed_official 0:a554658735bf 232 }
mbed_official 0:a554658735bf 233 perror("Could not allocate TD\r\n");
mbed_official 0:a554658735bf 234 return NULL; //Could not alloc TD
mbed_official 0:a554658735bf 235 }
mbed_official 0:a554658735bf 236
mbed_official 0:a554658735bf 237
mbed_official 0:a554658735bf 238 void USBHALHost::freeED(volatile uint8_t * ed) {
mbed_official 0:a554658735bf 239 int i;
mbed_official 0:a554658735bf 240 i = (ed - usb_edBuf) / ED_SIZE;
mbed_official 0:a554658735bf 241 edBufAlloc[i] = false;
mbed_official 0:a554658735bf 242 }
mbed_official 0:a554658735bf 243
mbed_official 0:a554658735bf 244 void USBHALHost::freeTD(volatile uint8_t * td) {
mbed_official 0:a554658735bf 245 int i;
mbed_official 0:a554658735bf 246 i = (td - usb_tdBuf) / TD_SIZE;
mbed_official 0:a554658735bf 247 tdBufAlloc[i] = false;
mbed_official 0:a554658735bf 248 }
mbed_official 0:a554658735bf 249
mbed_official 0:a554658735bf 250
mbed_official 0:a554658735bf 251 void USBHALHost::resetRootHub() {
mbed_official 0:a554658735bf 252 // Initiate port reset
samux 4:b320d68e98e7 253 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS;
mbed_official 0:a554658735bf 254
mbed_official 0:a554658735bf 255 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS);
mbed_official 0:a554658735bf 256
mbed_official 0:a554658735bf 257 // ...and clear port reset signal
mbed_official 0:a554658735bf 258 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
mbed_official 0:a554658735bf 259 }
mbed_official 0:a554658735bf 260
mbed_official 0:a554658735bf 261
mbed_official 0:a554658735bf 262 void USBHALHost::_usbisr(void) {
mbed_official 0:a554658735bf 263 if (instHost) {
mbed_official 0:a554658735bf 264 instHost->UsbIrqhandler();
mbed_official 0:a554658735bf 265 }
mbed_official 0:a554658735bf 266 }
mbed_official 0:a554658735bf 267
mbed_official 0:a554658735bf 268 void USBHALHost::UsbIrqhandler() {
mbed_official 0:a554658735bf 269 if( LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable ) //Is there something to actually process?
mbed_official 0:a554658735bf 270 {
mbed_official 0:a554658735bf 271
mbed_official 0:a554658735bf 272 uint32_t int_status = LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable;
mbed_official 0:a554658735bf 273
mbed_official 0:a554658735bf 274 // Root hub status change interrupt
mbed_official 0:a554658735bf 275 if (int_status & OR_INTR_STATUS_RHSC) {
mbed_official 0:a554658735bf 276 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
mbed_official 0:a554658735bf 277 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
mbed_official 0:a554658735bf 278 // When DRWE is on, Connect Status Change
mbed_official 0:a554658735bf 279 // means a remote wakeup event.
mbed_official 0:a554658735bf 280 } else {
mbed_official 0:a554658735bf 281
mbed_official 0:a554658735bf 282 //Root device connected
mbed_official 0:a554658735bf 283 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
mbed_official 0:a554658735bf 284
samux 4:b320d68e98e7 285 // wait 150ms to avoid bounce
samux 4:b320d68e98e7 286 wait_ms(150);
mbed_official 0:a554658735bf 287
mbed_official 0:a554658735bf 288 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
mbed_official 0:a554658735bf 289 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
mbed_official 0:a554658735bf 290 }
mbed_official 0:a554658735bf 291
mbed_official 0:a554658735bf 292 //Root device disconnected
mbed_official 0:a554658735bf 293 else {
mbed_official 0:a554658735bf 294
mbed_official 0:a554658735bf 295 if (!(int_status & OR_INTR_STATUS_WDH)) {
mbed_official 0:a554658735bf 296 usb_hcca->DoneHead = 0;
mbed_official 0:a554658735bf 297 }
mbed_official 0:a554658735bf 298
samux 4:b320d68e98e7 299 // wait 200ms to avoid bounce
samux 4:b320d68e98e7 300 wait_ms(200);
mbed_official 0:a554658735bf 301
mbed_official 0:a554658735bf 302 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
mbed_official 0:a554658735bf 303
mbed_official 0:a554658735bf 304 if (int_status & OR_INTR_STATUS_WDH) {
mbed_official 0:a554658735bf 305 usb_hcca->DoneHead = 0;
mbed_official 0:a554658735bf 306 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
mbed_official 0:a554658735bf 307 }
mbed_official 0:a554658735bf 308 }
mbed_official 0:a554658735bf 309 }
mbed_official 0:a554658735bf 310 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
mbed_official 0:a554658735bf 311 }
mbed_official 0:a554658735bf 312 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
mbed_official 0:a554658735bf 313 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
mbed_official 0:a554658735bf 314 }
mbed_official 0:a554658735bf 315 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_RHSC;
mbed_official 0:a554658735bf 316 }
mbed_official 0:a554658735bf 317
mbed_official 0:a554658735bf 318 // Writeback Done Head interrupt
mbed_official 0:a554658735bf 319 if (int_status & OR_INTR_STATUS_WDH) {
mbed_official 0:a554658735bf 320 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
mbed_official 0:a554658735bf 321 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
mbed_official 0:a554658735bf 322 }
mbed_official 0:a554658735bf 323 }
mbed_official 0:a554658735bf 324 }