SDG+USBHost(Mouse) Sample
Dependencies: Sound_Generator USBHost_custom
Fork of SDG_Mouse_Sample by
Information
Japanese version is available in lower part of this page.
このページの後半に日本語版が用意されています.
What is this?
This program is a demonstration that sounds the sound by mouse operation by using USBHost(Mouse) and Sound Generator.
Settings
Close JP3 of GR-PEACH.
Operation
| operation | effect |
|---|---|
| Right click | Sounds |
| Left click | Reset to base tone (C) |
| Moves the mouse to the right | Lower the sound |
| Moves the mouse to the left | Higher the sound |
| Center cursor | Adjust the sensitivity. Reset the reference value in the click. |
Others
The default setting of serial communication (baud rate etc.) in mbed is shown the following link.
Please refer to the link and change the settings of your PC terminal software.
The default value of baud rate in mbed is 9600, and this application uses baud rate 9600.
https://developer.mbed.org/teams/Renesas/wiki/GR-PEACH-Getting-Started#install-the-usb-serial-communication
概要
このプログラムは、USBHost(Mouse) + Sound Generatorで、マウス操作による擬似笛デモです。
設定
GR-PEACHのJP3をショートする必要があります。
操作方法
| 操作 | 内容 |
|---|---|
| 右クリック | 音出力開始 |
| 左クリック | 基準音(ド)にリセット |
| マウス右移動 | 高音になります |
| マウス左移動 | 低音になります |
| センターカーソル | 音高低の変化量調整(クリックで基準値にリセット) |
Others
mbedのシリアル通信(ボーレート等)のデフォルト設定は以下のリンクに示しています。
リンクを参考に、お使いのPCターミナルソフトの設定を変更して下さい。
mbedでのボーレートのデフォルト値は9600で、このサンプルではボーレート9600を使います。
https://developer.mbed.org/teams/Renesas/wiki/GR-PEACH-Getting-Started#install-the-usb-serial-communication
USBHost/TARGET_RENESAS/TARGET_RZ_A1H/ohci_wrapp_RZ_A1.c@27:4206883f4cb7, 2015-01-19 (annotated)
- Committer:
- mbed_official
- Date:
- Mon Jan 19 14:30:37 2015 +0000
- Revision:
- 27:4206883f4cb7
Synchronized with git revision 0ab8d2e6b3d884137dcb5c62d29a07abe132bac7
Full URL: https://github.com/mbedmicro/mbed/commit/0ab8d2e6b3d884137dcb5c62d29a07abe132bac7/
RZ_A1H - Implement some USB functions and fix some bugs about USBHost common codes.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 27:4206883f4cb7 | 1 | /* Copyright (c) 2010-2011 mbed.org, MIT License |
| mbed_official | 27:4206883f4cb7 | 2 | * |
| mbed_official | 27:4206883f4cb7 | 3 | * Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
| mbed_official | 27:4206883f4cb7 | 4 | * and associated documentation files (the "Software"), to deal in the Software without |
| mbed_official | 27:4206883f4cb7 | 5 | * restriction, including without limitation the rights to use, copy, modify, merge, publish, |
| mbed_official | 27:4206883f4cb7 | 6 | * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
| mbed_official | 27:4206883f4cb7 | 7 | * Software is furnished to do so, subject to the following conditions: |
| mbed_official | 27:4206883f4cb7 | 8 | * |
| mbed_official | 27:4206883f4cb7 | 9 | * The above copyright notice and this permission notice shall be included in all copies or |
| mbed_official | 27:4206883f4cb7 | 10 | * substantial portions of the Software. |
| mbed_official | 27:4206883f4cb7 | 11 | * |
| mbed_official | 27:4206883f4cb7 | 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
| mbed_official | 27:4206883f4cb7 | 13 | * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| mbed_official | 27:4206883f4cb7 | 14 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
| mbed_official | 27:4206883f4cb7 | 15 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| mbed_official | 27:4206883f4cb7 | 16 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| mbed_official | 27:4206883f4cb7 | 17 | */ |
| mbed_official | 27:4206883f4cb7 | 18 | |
| mbed_official | 27:4206883f4cb7 | 19 | #include <string.h> |
| mbed_official | 27:4206883f4cb7 | 20 | #include "cmsis.h" |
| mbed_official | 27:4206883f4cb7 | 21 | #include "cmsis_os.h" |
| mbed_official | 27:4206883f4cb7 | 22 | #include "ohci_wrapp_RZ_A1.h" |
| mbed_official | 27:4206883f4cb7 | 23 | #include "ohci_wrapp_RZ_A1_local.h" |
| mbed_official | 27:4206883f4cb7 | 24 | |
| mbed_official | 27:4206883f4cb7 | 25 | #include "rza_io_regrw.h" |
| mbed_official | 27:4206883f4cb7 | 26 | #include "usb0_host.h" |
| mbed_official | 27:4206883f4cb7 | 27 | |
| mbed_official | 27:4206883f4cb7 | 28 | /* ------------------ HcControl Register --------------------- */ |
| mbed_official | 27:4206883f4cb7 | 29 | #define OR_CONTROL_PLE (0x00000004) |
| mbed_official | 27:4206883f4cb7 | 30 | #define OR_CONTROL_CLE (0x00000010) |
| mbed_official | 27:4206883f4cb7 | 31 | #define OR_CONTROL_BLE (0x00000020) |
| mbed_official | 27:4206883f4cb7 | 32 | /* ----------------- HcCommandStatus Register ----------------- */ |
| mbed_official | 27:4206883f4cb7 | 33 | #define OR_CMD_STATUS_HCR (0x00000001) |
| mbed_official | 27:4206883f4cb7 | 34 | #define OR_CMD_STATUS_CLF (0x00000002) |
| mbed_official | 27:4206883f4cb7 | 35 | #define OR_CMD_STATUS_BLF (0x00000004) |
| mbed_official | 27:4206883f4cb7 | 36 | #define OR_CMD_STATUS_OCR (0x00000008) |
| mbed_official | 27:4206883f4cb7 | 37 | /* --------------- HcInterruptStatus Register ----------------- */ |
| mbed_official | 27:4206883f4cb7 | 38 | #define OR_INTR_STATUS_WDH (0x00000002) |
| mbed_official | 27:4206883f4cb7 | 39 | #define OR_INTR_STATUS_RHSC (0x00000040) |
| mbed_official | 27:4206883f4cb7 | 40 | /* --------------- HcInterruptEnable Register ----------------- */ |
| mbed_official | 27:4206883f4cb7 | 41 | #define OR_INTR_ENABLE_WDH (0x00000002) |
| mbed_official | 27:4206883f4cb7 | 42 | #define OR_INTR_ENABLE_RHSC (0x00000040) |
| mbed_official | 27:4206883f4cb7 | 43 | /* -------------- HcRhPortStatus[1:NDP] Register -------------- */ |
| mbed_official | 27:4206883f4cb7 | 44 | #define OR_RH_PORT_CSC (0x00010000) |
| mbed_official | 27:4206883f4cb7 | 45 | #define OR_RH_PORT_LSDA (0x00000200) |
| mbed_official | 27:4206883f4cb7 | 46 | #define OR_RH_PORT_PRS (0x00000010) |
| mbed_official | 27:4206883f4cb7 | 47 | #define OR_RH_PORT_POCI (0x00000008) |
| mbed_official | 27:4206883f4cb7 | 48 | #define OR_RH_PORT_CCS (0x00000001) |
| mbed_official | 27:4206883f4cb7 | 49 | |
| mbed_official | 27:4206883f4cb7 | 50 | #define ED_SKIP (0x00004000) /* Skip this ep in queue */ |
| mbed_official | 27:4206883f4cb7 | 51 | #define ED_TOGLE_CARRY (0x00000002) |
| mbed_official | 27:4206883f4cb7 | 52 | #define ED_HALTED (0x00000001) |
| mbed_official | 27:4206883f4cb7 | 53 | |
| mbed_official | 27:4206883f4cb7 | 54 | #define TD_SETUP (0x00000000) /* Direction of Setup Packet */ |
| mbed_official | 27:4206883f4cb7 | 55 | #define TD_OUT (0x00080000) /* Direction Out */ |
| mbed_official | 27:4206883f4cb7 | 56 | #define TD_TOGGLE_0 (0x02000000) /* Toggle 0 */ |
| mbed_official | 27:4206883f4cb7 | 57 | #define TD_TOGGLE_1 (0x03000000) /* Toggle 1 */ |
| mbed_official | 27:4206883f4cb7 | 58 | |
| mbed_official | 27:4206883f4cb7 | 59 | /* -------------- USB Standard Requests -------------- */ |
| mbed_official | 27:4206883f4cb7 | 60 | #define GET_STATUS (0x00) |
| mbed_official | 27:4206883f4cb7 | 61 | #define SET_FEATURE (0x03) |
| mbed_official | 27:4206883f4cb7 | 62 | #define SET_ADDRESS (0x05) |
| mbed_official | 27:4206883f4cb7 | 63 | |
| mbed_official | 27:4206883f4cb7 | 64 | #define TD_CTL_MSK_DP (0x00180000) |
| mbed_official | 27:4206883f4cb7 | 65 | #define TD_CTL_MSK_T (0x03000000) |
| mbed_official | 27:4206883f4cb7 | 66 | #define TD_CTL_MSK_CC (0xF0000000) |
| mbed_official | 27:4206883f4cb7 | 67 | #define TD_CTL_MSK_EC (0x0C000000) |
| mbed_official | 27:4206883f4cb7 | 68 | #define TD_CTL_SHFT_CC (28) |
| mbed_official | 27:4206883f4cb7 | 69 | #define TD_CTL_SHFT_EC (26) |
| mbed_official | 27:4206883f4cb7 | 70 | #define TD_CTL_SHFT_T (24) |
| mbed_official | 27:4206883f4cb7 | 71 | #define ED_SHFT_TOGLE_CARRY (1) |
| mbed_official | 27:4206883f4cb7 | 72 | #define SIG_GEN_LIST_REQ (1) |
| mbed_official | 27:4206883f4cb7 | 73 | |
| mbed_official | 27:4206883f4cb7 | 74 | #define CTL_TRANS_TIMEOUT (1000) |
| mbed_official | 27:4206883f4cb7 | 75 | #define BLK_TRANS_TIMEOUT (5) |
| mbed_official | 27:4206883f4cb7 | 76 | #define INT_TRANS_MAX_NUM (4) /* min:1 max:4 */ |
| mbed_official | 27:4206883f4cb7 | 77 | #define TOTAL_SEM_NUM (5 + (2 * INT_TRANS_MAX_NUM)) |
| mbed_official | 27:4206883f4cb7 | 78 | |
| mbed_official | 27:4206883f4cb7 | 79 | #define PORT_LOW_SPEED (0x00000200) |
| mbed_official | 27:4206883f4cb7 | 80 | #define PORT_HIGH_SPEED (0x00000400) |
| mbed_official | 27:4206883f4cb7 | 81 | #define PORT_NUM (16 + 1) /* num + root(1) */ |
| mbed_official | 27:4206883f4cb7 | 82 | |
| mbed_official | 27:4206883f4cb7 | 83 | typedef struct tag_hctd { |
| mbed_official | 27:4206883f4cb7 | 84 | uint32_t control; /* Transfer descriptor control */ |
| mbed_official | 27:4206883f4cb7 | 85 | uint8_t *currBufPtr; /* Physical address of current buffer pointer */ |
| mbed_official | 27:4206883f4cb7 | 86 | struct tag_hctd *nextTD; /* Physical pointer to next Transfer Descriptor */ |
| mbed_official | 27:4206883f4cb7 | 87 | uint8_t *bufEnd; /* Physical address of end of buffer */ |
| mbed_official | 27:4206883f4cb7 | 88 | } hctd_t; |
| mbed_official | 27:4206883f4cb7 | 89 | |
| mbed_official | 27:4206883f4cb7 | 90 | typedef struct tag_hced { |
| mbed_official | 27:4206883f4cb7 | 91 | uint32_t control; /* Endpoint descriptor control */ |
| mbed_official | 27:4206883f4cb7 | 92 | hctd_t *tailTD; /* Physical address of tail in Transfer descriptor list */ |
| mbed_official | 27:4206883f4cb7 | 93 | hctd_t *headTD; /* Physcial address of head in Transfer descriptor list */ |
| mbed_official | 27:4206883f4cb7 | 94 | struct tag_hced *nextED; /* Physical address of next Endpoint descriptor */ |
| mbed_official | 27:4206883f4cb7 | 95 | } hced_t; |
| mbed_official | 27:4206883f4cb7 | 96 | |
| mbed_official | 27:4206883f4cb7 | 97 | typedef struct tag_hcca { |
| mbed_official | 27:4206883f4cb7 | 98 | uint32_t IntTable[32]; /* Interrupt Table */ |
| mbed_official | 27:4206883f4cb7 | 99 | uint32_t FrameNumber; /* Frame Number */ |
| mbed_official | 27:4206883f4cb7 | 100 | uint32_t DoneHead; /* Done Head */ |
| mbed_official | 27:4206883f4cb7 | 101 | volatile uint8_t Reserved[116]; /* Reserved for future use */ |
| mbed_official | 27:4206883f4cb7 | 102 | volatile uint8_t Unknown[4]; /* Unused */ |
| mbed_official | 27:4206883f4cb7 | 103 | } hcca_t; |
| mbed_official | 27:4206883f4cb7 | 104 | |
| mbed_official | 27:4206883f4cb7 | 105 | typedef struct tag_usb_ohci_reg { |
| mbed_official | 27:4206883f4cb7 | 106 | volatile uint32_t HcRevision; |
| mbed_official | 27:4206883f4cb7 | 107 | volatile uint32_t HcControl; |
| mbed_official | 27:4206883f4cb7 | 108 | volatile uint32_t HcCommandStatus; |
| mbed_official | 27:4206883f4cb7 | 109 | volatile uint32_t HcInterruptStatus; |
| mbed_official | 27:4206883f4cb7 | 110 | volatile uint32_t HcInterruptEnable; |
| mbed_official | 27:4206883f4cb7 | 111 | volatile uint32_t HcInterruptDisable; |
| mbed_official | 27:4206883f4cb7 | 112 | volatile uint32_t HcHCCA; |
| mbed_official | 27:4206883f4cb7 | 113 | volatile uint32_t HcPeriodCurrentED; |
| mbed_official | 27:4206883f4cb7 | 114 | volatile uint32_t HcControlHeadED; |
| mbed_official | 27:4206883f4cb7 | 115 | volatile uint32_t HcControlCurrentED; |
| mbed_official | 27:4206883f4cb7 | 116 | volatile uint32_t HcBulkHeadED; |
| mbed_official | 27:4206883f4cb7 | 117 | volatile uint32_t HcBulkCurrentED; |
| mbed_official | 27:4206883f4cb7 | 118 | volatile uint32_t HcDoneHead; |
| mbed_official | 27:4206883f4cb7 | 119 | volatile uint32_t HcFmInterval; |
| mbed_official | 27:4206883f4cb7 | 120 | volatile uint32_t HcFmRemaining; |
| mbed_official | 27:4206883f4cb7 | 121 | volatile uint32_t HcFmNumber; |
| mbed_official | 27:4206883f4cb7 | 122 | volatile uint32_t HcPeriodicStart; |
| mbed_official | 27:4206883f4cb7 | 123 | volatile uint32_t HcLSThreshold; |
| mbed_official | 27:4206883f4cb7 | 124 | volatile uint32_t HcRhDescriptorA; |
| mbed_official | 27:4206883f4cb7 | 125 | volatile uint32_t HcRhDescriptorB; |
| mbed_official | 27:4206883f4cb7 | 126 | volatile uint32_t HcRhStatus; |
| mbed_official | 27:4206883f4cb7 | 127 | volatile uint32_t HcRhPortStatus1; |
| mbed_official | 27:4206883f4cb7 | 128 | } usb_ohci_reg_t; |
| mbed_official | 27:4206883f4cb7 | 129 | |
| mbed_official | 27:4206883f4cb7 | 130 | typedef struct tag_genelal_ed { |
| mbed_official | 27:4206883f4cb7 | 131 | osThreadId tskid; |
| mbed_official | 27:4206883f4cb7 | 132 | osSemaphoreId semid_wait; |
| mbed_official | 27:4206883f4cb7 | 133 | osSemaphoreId semid_list; |
| mbed_official | 27:4206883f4cb7 | 134 | hctd_t *p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 135 | hced_t *p_curr_ed; |
| mbed_official | 27:4206883f4cb7 | 136 | uint32_t pipe_no; |
| mbed_official | 27:4206883f4cb7 | 137 | uint32_t trans_wait; |
| mbed_official | 27:4206883f4cb7 | 138 | uint32_t cycle_time; |
| mbed_official | 27:4206883f4cb7 | 139 | uint8_t *p_start_buf; |
| mbed_official | 27:4206883f4cb7 | 140 | } genelal_ed_t; |
| mbed_official | 27:4206883f4cb7 | 141 | |
| mbed_official | 27:4206883f4cb7 | 142 | typedef struct tag_tdinfo { |
| mbed_official | 27:4206883f4cb7 | 143 | uint32_t count; |
| mbed_official | 27:4206883f4cb7 | 144 | uint32_t direction; |
| mbed_official | 27:4206883f4cb7 | 145 | uint32_t msp; |
| mbed_official | 27:4206883f4cb7 | 146 | uint16_t devadr; |
| mbed_official | 27:4206883f4cb7 | 147 | uint16_t speed; /* 1:Speed = Low */ |
| mbed_official | 27:4206883f4cb7 | 148 | uint8_t endpoint_no; |
| mbed_official | 27:4206883f4cb7 | 149 | } tdinfo_t; |
| mbed_official | 27:4206883f4cb7 | 150 | |
| mbed_official | 27:4206883f4cb7 | 151 | typedef struct tag_split_trans { |
| mbed_official | 27:4206883f4cb7 | 152 | uint16_t root_devadr; |
| mbed_official | 27:4206883f4cb7 | 153 | uint16_t get_port; |
| mbed_official | 27:4206883f4cb7 | 154 | uint16_t port_speed; |
| mbed_official | 27:4206883f4cb7 | 155 | uint16_t reset_port; |
| mbed_official | 27:4206883f4cb7 | 156 | uint32_t seq_cnt; |
| mbed_official | 27:4206883f4cb7 | 157 | uint32_t port_sts_bits[PORT_NUM]; |
| mbed_official | 27:4206883f4cb7 | 158 | } split_trans_t; |
| mbed_official | 27:4206883f4cb7 | 159 | |
| mbed_official | 27:4206883f4cb7 | 160 | static void callback_task(void const * argument); |
| mbed_official | 27:4206883f4cb7 | 161 | static void control_ed_task(void const * argument); |
| mbed_official | 27:4206883f4cb7 | 162 | static void bulk_ed_task(void const * argument); |
| mbed_official | 27:4206883f4cb7 | 163 | static void int_ed_task(void const * argument); |
| mbed_official | 27:4206883f4cb7 | 164 | static int32_t int_trans_doing(hced_t *p_ed, uint32_t index); |
| mbed_official | 27:4206883f4cb7 | 165 | static int32_t chk_genelal_ed(genelal_ed_t *p_g_ed); |
| mbed_official | 27:4206883f4cb7 | 166 | static void chk_td_done(genelal_ed_t *p_g_ed); |
| mbed_official | 27:4206883f4cb7 | 167 | static void chk_split_trans_setting(genelal_ed_t *p_g_ed); |
| mbed_official | 27:4206883f4cb7 | 168 | static void set_split_trans_setting(void); |
| mbed_official | 27:4206883f4cb7 | 169 | static void control_trans(genelal_ed_t *p_g_ed); |
| mbed_official | 27:4206883f4cb7 | 170 | static void bulk_trans(genelal_ed_t *p_g_ed); |
| mbed_official | 27:4206883f4cb7 | 171 | static void int_trans_setting(genelal_ed_t *p_g_ed, uint32_t index); |
| mbed_official | 27:4206883f4cb7 | 172 | static uint32_t chk_cycle(hced_t *p_ed); |
| mbed_official | 27:4206883f4cb7 | 173 | static void int_trans(genelal_ed_t *p_g_ed); |
| mbed_official | 27:4206883f4cb7 | 174 | static void get_td_info(genelal_ed_t *p_g_ed, tdinfo_t *p_td_info); |
| mbed_official | 27:4206883f4cb7 | 175 | static void set_togle(uint32_t pipe, hctd_t *p_td, hced_t *p_ed); |
| mbed_official | 27:4206883f4cb7 | 176 | static void connect_check(void); |
| mbed_official | 27:4206883f4cb7 | 177 | |
| mbed_official | 27:4206883f4cb7 | 178 | extern USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[]; |
| mbed_official | 27:4206883f4cb7 | 179 | extern USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[]; |
| mbed_official | 27:4206883f4cb7 | 180 | |
| mbed_official | 27:4206883f4cb7 | 181 | static usb_ohci_reg_t usb_reg; |
| mbed_official | 27:4206883f4cb7 | 182 | static usb_ohci_reg_t *p_usb_reg = &usb_reg; |
| mbed_official | 27:4206883f4cb7 | 183 | static usbisr_fnc_t *p_usbisr_cb = NULL; |
| mbed_official | 27:4206883f4cb7 | 184 | static osSemaphoreId semid_cb = NULL; |
| mbed_official | 27:4206883f4cb7 | 185 | static uint32_t connect_change = 0xFFFFFFFF; |
| mbed_official | 27:4206883f4cb7 | 186 | static uint32_t init_end = 0; |
| mbed_official | 27:4206883f4cb7 | 187 | static genelal_ed_t ctl_ed; |
| mbed_official | 27:4206883f4cb7 | 188 | static genelal_ed_t blk_ed; |
| mbed_official | 27:4206883f4cb7 | 189 | static genelal_ed_t int_ed[INT_TRANS_MAX_NUM]; |
| mbed_official | 27:4206883f4cb7 | 190 | static split_trans_t split_ctl; |
| mbed_official | 27:4206883f4cb7 | 191 | |
| mbed_official | 27:4206883f4cb7 | 192 | osSemaphoreDef(ohciwrapp_sem_01); |
| mbed_official | 27:4206883f4cb7 | 193 | osSemaphoreDef(ohciwrapp_sem_02); |
| mbed_official | 27:4206883f4cb7 | 194 | osSemaphoreDef(ohciwrapp_sem_03); |
| mbed_official | 27:4206883f4cb7 | 195 | osSemaphoreDef(ohciwrapp_sem_04); |
| mbed_official | 27:4206883f4cb7 | 196 | osSemaphoreDef(ohciwrapp_sem_05); |
| mbed_official | 27:4206883f4cb7 | 197 | osSemaphoreDef(ohciwrapp_sem_06); |
| mbed_official | 27:4206883f4cb7 | 198 | osSemaphoreDef(ohciwrapp_sem_07); |
| mbed_official | 27:4206883f4cb7 | 199 | #if (INT_TRANS_MAX_NUM >= 2) |
| mbed_official | 27:4206883f4cb7 | 200 | osSemaphoreDef(ohciwrapp_sem_08); |
| mbed_official | 27:4206883f4cb7 | 201 | osSemaphoreDef(ohciwrapp_sem_09); |
| mbed_official | 27:4206883f4cb7 | 202 | #endif |
| mbed_official | 27:4206883f4cb7 | 203 | #if (INT_TRANS_MAX_NUM >= 3) |
| mbed_official | 27:4206883f4cb7 | 204 | osSemaphoreDef(ohciwrapp_sem_10); |
| mbed_official | 27:4206883f4cb7 | 205 | osSemaphoreDef(ohciwrapp_sem_11); |
| mbed_official | 27:4206883f4cb7 | 206 | #endif |
| mbed_official | 27:4206883f4cb7 | 207 | #if (INT_TRANS_MAX_NUM >= 4) |
| mbed_official | 27:4206883f4cb7 | 208 | osSemaphoreDef(ohciwrapp_sem_12); |
| mbed_official | 27:4206883f4cb7 | 209 | osSemaphoreDef(ohciwrapp_sem_13); |
| mbed_official | 27:4206883f4cb7 | 210 | #endif |
| mbed_official | 27:4206883f4cb7 | 211 | |
| mbed_official | 27:4206883f4cb7 | 212 | osThreadDef(callback_task, osPriorityHigh, 512); |
| mbed_official | 27:4206883f4cb7 | 213 | osThreadDef(control_ed_task, osPriorityNormal, 512); |
| mbed_official | 27:4206883f4cb7 | 214 | osThreadDef(bulk_ed_task, osPriorityNormal, 512); |
| mbed_official | 27:4206883f4cb7 | 215 | osThreadDef(int_ed_task, osPriorityAboveNormal, 512); |
| mbed_official | 27:4206883f4cb7 | 216 | |
| mbed_official | 27:4206883f4cb7 | 217 | void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc, uint32_t hi_speed) { |
| mbed_official | 27:4206883f4cb7 | 218 | static const osSemaphoreDef_t * const sem_def_tbl[TOTAL_SEM_NUM] = { |
| mbed_official | 27:4206883f4cb7 | 219 | osSemaphore(ohciwrapp_sem_01), osSemaphore(ohciwrapp_sem_02), osSemaphore(ohciwrapp_sem_03) |
| mbed_official | 27:4206883f4cb7 | 220 | , osSemaphore(ohciwrapp_sem_04), osSemaphore(ohciwrapp_sem_05), osSemaphore(ohciwrapp_sem_06) |
| mbed_official | 27:4206883f4cb7 | 221 | , osSemaphore(ohciwrapp_sem_07) |
| mbed_official | 27:4206883f4cb7 | 222 | #if (INT_TRANS_MAX_NUM >= 2) |
| mbed_official | 27:4206883f4cb7 | 223 | , osSemaphore(ohciwrapp_sem_08), osSemaphore(ohciwrapp_sem_09) |
| mbed_official | 27:4206883f4cb7 | 224 | #endif |
| mbed_official | 27:4206883f4cb7 | 225 | #if (INT_TRANS_MAX_NUM >= 3) |
| mbed_official | 27:4206883f4cb7 | 226 | , osSemaphore(ohciwrapp_sem_10), osSemaphore(ohciwrapp_sem_11) |
| mbed_official | 27:4206883f4cb7 | 227 | #endif |
| mbed_official | 27:4206883f4cb7 | 228 | #if (INT_TRANS_MAX_NUM >= 4) |
| mbed_official | 27:4206883f4cb7 | 229 | , osSemaphore(ohciwrapp_sem_12), osSemaphore(ohciwrapp_sem_13) |
| mbed_official | 27:4206883f4cb7 | 230 | #endif |
| mbed_official | 27:4206883f4cb7 | 231 | }; |
| mbed_official | 27:4206883f4cb7 | 232 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 233 | uint32_t index = 0; |
| mbed_official | 27:4206883f4cb7 | 234 | |
| mbed_official | 27:4206883f4cb7 | 235 | /* Disables interrupt for usb */ |
| mbed_official | 27:4206883f4cb7 | 236 | GIC_DisableIRQ(USBI0_IRQn); |
| mbed_official | 27:4206883f4cb7 | 237 | |
| mbed_official | 27:4206883f4cb7 | 238 | /* P4_1(USB0_EN) */ |
| mbed_official | 27:4206883f4cb7 | 239 | GPIOP4 &= ~0x0002; /* Outputs low level */ |
| mbed_official | 27:4206883f4cb7 | 240 | GPIOPMC4 &= ~0x0002; /* Port mode */ |
| mbed_official | 27:4206883f4cb7 | 241 | GPIOPM4 &= ~0x0002; /* Output mode */ |
| mbed_official | 27:4206883f4cb7 | 242 | |
| mbed_official | 27:4206883f4cb7 | 243 | p_usbisr_cb = p_usbisr_fnc; |
| mbed_official | 27:4206883f4cb7 | 244 | if (hi_speed == 0) { |
| mbed_official | 27:4206883f4cb7 | 245 | g_usb0_host_SupportUsbDeviceSpeed = USB_HOST_FULL_SPEED; |
| mbed_official | 27:4206883f4cb7 | 246 | } else { |
| mbed_official | 27:4206883f4cb7 | 247 | g_usb0_host_SupportUsbDeviceSpeed = USB_HOST_HIGH_SPEED; |
| mbed_official | 27:4206883f4cb7 | 248 | } |
| mbed_official | 27:4206883f4cb7 | 249 | p_usb_reg->HcRevision = 0x00000010; |
| mbed_official | 27:4206883f4cb7 | 250 | p_usb_reg->HcControl = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 251 | p_usb_reg->HcCommandStatus = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 252 | p_usb_reg->HcInterruptStatus = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 253 | p_usb_reg->HcInterruptEnable = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 254 | p_usb_reg->HcInterruptDisable = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 255 | p_usb_reg->HcHCCA = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 256 | p_usb_reg->HcPeriodCurrentED = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 257 | p_usb_reg->HcControlHeadED = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 258 | p_usb_reg->HcControlCurrentED = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 259 | p_usb_reg->HcBulkHeadED = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 260 | p_usb_reg->HcBulkCurrentED = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 261 | p_usb_reg->HcDoneHead = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 262 | p_usb_reg->HcFmInterval = 0x00002EDF; |
| mbed_official | 27:4206883f4cb7 | 263 | p_usb_reg->HcFmRemaining = 0x00002EDF; |
| mbed_official | 27:4206883f4cb7 | 264 | p_usb_reg->HcFmNumber = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 265 | p_usb_reg->HcPeriodicStart = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 266 | p_usb_reg->HcLSThreshold = 0x00000628; |
| mbed_official | 27:4206883f4cb7 | 267 | p_usb_reg->HcRhDescriptorA = 0xFF000901; |
| mbed_official | 27:4206883f4cb7 | 268 | p_usb_reg->HcRhDescriptorB = 0x00020000; |
| mbed_official | 27:4206883f4cb7 | 269 | p_usb_reg->HcRhStatus = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 270 | p_usb_reg->HcRhPortStatus1 = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 271 | |
| mbed_official | 27:4206883f4cb7 | 272 | GPIOP4 |= 0x0002; /* P4_1 Outputs high level */ |
| mbed_official | 27:4206883f4cb7 | 273 | osDelay(5); |
| mbed_official | 27:4206883f4cb7 | 274 | GPIOP4 &= ~0x0002; /* P4_1 Outputs low level */ |
| mbed_official | 27:4206883f4cb7 | 275 | osDelay(10); |
| mbed_official | 27:4206883f4cb7 | 276 | |
| mbed_official | 27:4206883f4cb7 | 277 | if (init_end == 0) { |
| mbed_official | 27:4206883f4cb7 | 278 | (void)memset(&ctl_ed, 0, sizeof(ctl_ed)); |
| mbed_official | 27:4206883f4cb7 | 279 | (void)memset(&blk_ed, 0, sizeof(blk_ed)); |
| mbed_official | 27:4206883f4cb7 | 280 | (void)memset(&int_ed[0], 0, sizeof(int_ed)); |
| mbed_official | 27:4206883f4cb7 | 281 | |
| mbed_official | 27:4206883f4cb7 | 282 | /* callback */ |
| mbed_official | 27:4206883f4cb7 | 283 | semid_cb = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 284 | index++; |
| mbed_official | 27:4206883f4cb7 | 285 | (void)osThreadCreate(osThread(callback_task), 0); |
| mbed_official | 27:4206883f4cb7 | 286 | |
| mbed_official | 27:4206883f4cb7 | 287 | /* control transfer */ |
| mbed_official | 27:4206883f4cb7 | 288 | ctl_ed.semid_wait = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 289 | index++; |
| mbed_official | 27:4206883f4cb7 | 290 | ctl_ed.semid_list = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 291 | index++; |
| mbed_official | 27:4206883f4cb7 | 292 | ctl_ed.tskid = osThreadCreate(osThread(control_ed_task), 0); |
| mbed_official | 27:4206883f4cb7 | 293 | |
| mbed_official | 27:4206883f4cb7 | 294 | /* bulk transfer */ |
| mbed_official | 27:4206883f4cb7 | 295 | blk_ed.semid_wait = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 296 | index++; |
| mbed_official | 27:4206883f4cb7 | 297 | blk_ed.semid_list = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 298 | index++; |
| mbed_official | 27:4206883f4cb7 | 299 | blk_ed.tskid = osThreadCreate(osThread(bulk_ed_task), 0); |
| mbed_official | 27:4206883f4cb7 | 300 | |
| mbed_official | 27:4206883f4cb7 | 301 | /* interrupt transfer */ |
| mbed_official | 27:4206883f4cb7 | 302 | for (cnt = 0; cnt < INT_TRANS_MAX_NUM; cnt++) { |
| mbed_official | 27:4206883f4cb7 | 303 | int_ed[cnt].semid_wait = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 304 | index++; |
| mbed_official | 27:4206883f4cb7 | 305 | int_ed[cnt].semid_list = osSemaphoreCreate(sem_def_tbl[index], 0); |
| mbed_official | 27:4206883f4cb7 | 306 | index++; |
| mbed_official | 27:4206883f4cb7 | 307 | int_ed[cnt].tskid = osThreadCreate(osThread(int_ed_task), (void *)cnt); |
| mbed_official | 27:4206883f4cb7 | 308 | } |
| mbed_official | 27:4206883f4cb7 | 309 | init_end = 1; |
| mbed_official | 27:4206883f4cb7 | 310 | } |
| mbed_official | 27:4206883f4cb7 | 311 | } |
| mbed_official | 27:4206883f4cb7 | 312 | |
| mbed_official | 27:4206883f4cb7 | 313 | uint32_t ohciwrapp_reg_r(uint32_t reg_ofs) { |
| mbed_official | 27:4206883f4cb7 | 314 | if (init_end == 0) { |
| mbed_official | 27:4206883f4cb7 | 315 | return 0; |
| mbed_official | 27:4206883f4cb7 | 316 | } |
| mbed_official | 27:4206883f4cb7 | 317 | |
| mbed_official | 27:4206883f4cb7 | 318 | return *(uint32_t *)((uint8_t *)p_usb_reg + reg_ofs); |
| mbed_official | 27:4206883f4cb7 | 319 | } |
| mbed_official | 27:4206883f4cb7 | 320 | |
| mbed_official | 27:4206883f4cb7 | 321 | void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data) { |
| mbed_official | 27:4206883f4cb7 | 322 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 323 | uint32_t last_data; |
| mbed_official | 27:4206883f4cb7 | 324 | hcca_t *p_hcca; |
| mbed_official | 27:4206883f4cb7 | 325 | |
| mbed_official | 27:4206883f4cb7 | 326 | if (init_end == 0) { |
| mbed_official | 27:4206883f4cb7 | 327 | return; |
| mbed_official | 27:4206883f4cb7 | 328 | } |
| mbed_official | 27:4206883f4cb7 | 329 | |
| mbed_official | 27:4206883f4cb7 | 330 | switch (reg_ofs) { |
| mbed_official | 27:4206883f4cb7 | 331 | case OHCI_REG_CONTROL: |
| mbed_official | 27:4206883f4cb7 | 332 | last_data = p_usb_reg->HcControl; |
| mbed_official | 27:4206883f4cb7 | 333 | p_usb_reg->HcControl = (set_data & 0x000007FF); |
| mbed_official | 27:4206883f4cb7 | 334 | if ((last_data & OR_CONTROL_CLE) != (set_data & OR_CONTROL_CLE)) { |
| mbed_official | 27:4206883f4cb7 | 335 | /* change CLE */ |
| mbed_official | 27:4206883f4cb7 | 336 | if ((set_data & OR_CONTROL_CLE) != 0) { |
| mbed_official | 27:4206883f4cb7 | 337 | (void)osSemaphoreRelease(ctl_ed.semid_list); |
| mbed_official | 27:4206883f4cb7 | 338 | } else { |
| mbed_official | 27:4206883f4cb7 | 339 | if (ctl_ed.trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 340 | ctl_ed.trans_wait = 0; |
| mbed_official | 27:4206883f4cb7 | 341 | (void)osSemaphoreRelease(ctl_ed.semid_wait); |
| mbed_official | 27:4206883f4cb7 | 342 | } |
| mbed_official | 27:4206883f4cb7 | 343 | (void)osSemaphoreWait(ctl_ed.semid_list, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 344 | } |
| mbed_official | 27:4206883f4cb7 | 345 | } |
| mbed_official | 27:4206883f4cb7 | 346 | if ((last_data & OR_CONTROL_BLE) != (set_data & OR_CONTROL_BLE)) { |
| mbed_official | 27:4206883f4cb7 | 347 | /* change BLE */ |
| mbed_official | 27:4206883f4cb7 | 348 | if ((set_data & OR_CONTROL_BLE) != 0) { |
| mbed_official | 27:4206883f4cb7 | 349 | (void)osSemaphoreRelease(blk_ed.semid_list); |
| mbed_official | 27:4206883f4cb7 | 350 | } else { |
| mbed_official | 27:4206883f4cb7 | 351 | if (blk_ed.trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 352 | blk_ed.trans_wait = 0; |
| mbed_official | 27:4206883f4cb7 | 353 | (void)osSemaphoreRelease(blk_ed.semid_wait); |
| mbed_official | 27:4206883f4cb7 | 354 | } |
| mbed_official | 27:4206883f4cb7 | 355 | (void)osSemaphoreWait(blk_ed.semid_list, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 356 | } |
| mbed_official | 27:4206883f4cb7 | 357 | } |
| mbed_official | 27:4206883f4cb7 | 358 | if ((last_data & OR_CONTROL_PLE) != (set_data & OR_CONTROL_PLE)) { |
| mbed_official | 27:4206883f4cb7 | 359 | /* change PLE */ |
| mbed_official | 27:4206883f4cb7 | 360 | for (cnt = 0; cnt < INT_TRANS_MAX_NUM; cnt++) { |
| mbed_official | 27:4206883f4cb7 | 361 | if ((set_data & OR_CONTROL_PLE) != 0) { |
| mbed_official | 27:4206883f4cb7 | 362 | (void)osSemaphoreRelease(int_ed[cnt].semid_list); |
| mbed_official | 27:4206883f4cb7 | 363 | } else { |
| mbed_official | 27:4206883f4cb7 | 364 | if (int_ed[cnt].trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 365 | int_ed[cnt].trans_wait = 0; |
| mbed_official | 27:4206883f4cb7 | 366 | (void)osSemaphoreRelease(int_ed[cnt].semid_wait); |
| mbed_official | 27:4206883f4cb7 | 367 | } |
| mbed_official | 27:4206883f4cb7 | 368 | (void)osSemaphoreWait(int_ed[cnt].semid_list, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 369 | } |
| mbed_official | 27:4206883f4cb7 | 370 | } |
| mbed_official | 27:4206883f4cb7 | 371 | } |
| mbed_official | 27:4206883f4cb7 | 372 | break; |
| mbed_official | 27:4206883f4cb7 | 373 | case OHCI_REG_COMMANDSTATUS: |
| mbed_official | 27:4206883f4cb7 | 374 | if ((set_data & OR_CMD_STATUS_HCR) != 0) { /* HostController Reset */ |
| mbed_official | 27:4206883f4cb7 | 375 | p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_HCR; |
| mbed_official | 27:4206883f4cb7 | 376 | if (usb0_api_host_init(16, g_usb0_host_SupportUsbDeviceSpeed, USBHCLOCK_X1_48MHZ) == USB_HOST_ATTACH) { |
| mbed_official | 27:4206883f4cb7 | 377 | ohciwrapp_loc_Connect(1); |
| mbed_official | 27:4206883f4cb7 | 378 | } |
| mbed_official | 27:4206883f4cb7 | 379 | p_usb_reg->HcCommandStatus &= ~OR_CMD_STATUS_HCR; |
| mbed_official | 27:4206883f4cb7 | 380 | } |
| mbed_official | 27:4206883f4cb7 | 381 | if ((set_data & OR_CMD_STATUS_CLF) != 0) { |
| mbed_official | 27:4206883f4cb7 | 382 | p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_CLF; |
| mbed_official | 27:4206883f4cb7 | 383 | osSignalSet(ctl_ed.tskid, SIG_GEN_LIST_REQ); |
| mbed_official | 27:4206883f4cb7 | 384 | } |
| mbed_official | 27:4206883f4cb7 | 385 | if ((set_data & OR_CMD_STATUS_BLF) != 0) { |
| mbed_official | 27:4206883f4cb7 | 386 | p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_BLF; |
| mbed_official | 27:4206883f4cb7 | 387 | osSignalSet(blk_ed.tskid, SIG_GEN_LIST_REQ); |
| mbed_official | 27:4206883f4cb7 | 388 | } |
| mbed_official | 27:4206883f4cb7 | 389 | if ((set_data & OR_CMD_STATUS_OCR) != 0) { |
| mbed_official | 27:4206883f4cb7 | 390 | p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_OCR; |
| mbed_official | 27:4206883f4cb7 | 391 | } else { |
| mbed_official | 27:4206883f4cb7 | 392 | p_usb_reg->HcCommandStatus &= ~OR_CMD_STATUS_OCR; |
| mbed_official | 27:4206883f4cb7 | 393 | } |
| mbed_official | 27:4206883f4cb7 | 394 | break; |
| mbed_official | 27:4206883f4cb7 | 395 | case OHCI_REG_INTERRUPTSTATUS: |
| mbed_official | 27:4206883f4cb7 | 396 | if (((p_usb_reg->HcInterruptStatus & OR_INTR_STATUS_WDH) != 0) |
| mbed_official | 27:4206883f4cb7 | 397 | && ((set_data & OR_INTR_STATUS_WDH) != 0)) { |
| mbed_official | 27:4206883f4cb7 | 398 | if (p_usb_reg->HcDoneHead != 0x00000000) { |
| mbed_official | 27:4206883f4cb7 | 399 | p_hcca = (hcca_t *)p_usb_reg->HcHCCA; |
| mbed_official | 27:4206883f4cb7 | 400 | p_hcca->DoneHead = p_usb_reg->HcDoneHead; |
| mbed_official | 27:4206883f4cb7 | 401 | p_usb_reg->HcDoneHead = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 402 | p_usb_reg->HcInterruptStatus |= OR_INTR_STATUS_WDH; |
| mbed_official | 27:4206883f4cb7 | 403 | (void)osSemaphoreRelease(semid_cb); |
| mbed_official | 27:4206883f4cb7 | 404 | } else { |
| mbed_official | 27:4206883f4cb7 | 405 | p_usb_reg->HcInterruptStatus &= ~OR_INTR_STATUS_WDH; |
| mbed_official | 27:4206883f4cb7 | 406 | } |
| mbed_official | 27:4206883f4cb7 | 407 | } |
| mbed_official | 27:4206883f4cb7 | 408 | if ((set_data & OR_INTR_STATUS_RHSC) != 0) { |
| mbed_official | 27:4206883f4cb7 | 409 | p_usb_reg->HcInterruptStatus &= ~OR_INTR_STATUS_RHSC; |
| mbed_official | 27:4206883f4cb7 | 410 | } |
| mbed_official | 27:4206883f4cb7 | 411 | break; |
| mbed_official | 27:4206883f4cb7 | 412 | case OHCI_REG_INTERRUPTENABLE: |
| mbed_official | 27:4206883f4cb7 | 413 | case OHCI_REG_INTERRUPTDISABLE: |
| mbed_official | 27:4206883f4cb7 | 414 | case OHCI_REG_HCCA: |
| mbed_official | 27:4206883f4cb7 | 415 | case OHCI_REG_CONTROLHEADED: |
| mbed_official | 27:4206883f4cb7 | 416 | case OHCI_REG_CONTROLCURRENTED: |
| mbed_official | 27:4206883f4cb7 | 417 | case OHCI_REG_BULKHEADED: |
| mbed_official | 27:4206883f4cb7 | 418 | case OHCI_REG_BULKCURRENTED: |
| mbed_official | 27:4206883f4cb7 | 419 | case OHCI_REG_FMINTERVAL: |
| mbed_official | 27:4206883f4cb7 | 420 | case OHCI_REG_FMREMAINING: |
| mbed_official | 27:4206883f4cb7 | 421 | case OHCI_REG_PERIODICSTART: |
| mbed_official | 27:4206883f4cb7 | 422 | case OHCI_REG_LSTHRESHOLD: |
| mbed_official | 27:4206883f4cb7 | 423 | case OHCI_REG_RHDESCRIPTORA: |
| mbed_official | 27:4206883f4cb7 | 424 | case OHCI_REG_RHDESCRIPTORB: |
| mbed_official | 27:4206883f4cb7 | 425 | case OHCI_REG_RHSTATUS: |
| mbed_official | 27:4206883f4cb7 | 426 | *(uint32_t *)((uint8_t *)p_usb_reg + reg_ofs) = set_data; |
| mbed_official | 27:4206883f4cb7 | 427 | break; |
| mbed_official | 27:4206883f4cb7 | 428 | case OHCI_REG_RHPORTSTATUS1: |
| mbed_official | 27:4206883f4cb7 | 429 | p_usb_reg->HcRhPortStatus1 &= ~(set_data & 0xFFFF0000); |
| mbed_official | 27:4206883f4cb7 | 430 | if ((set_data & OR_RH_PORT_PRS) != 0) { /* Set Port Reset */ |
| mbed_official | 27:4206883f4cb7 | 431 | p_usb_reg->HcRhPortStatus1 |= OR_RH_PORT_PRS; |
| mbed_official | 27:4206883f4cb7 | 432 | usb0_host_UsbBusReset(); |
| mbed_official | 27:4206883f4cb7 | 433 | p_usb_reg->HcRhPortStatus1 &= ~OR_RH_PORT_PRS; |
| mbed_official | 27:4206883f4cb7 | 434 | } |
| mbed_official | 27:4206883f4cb7 | 435 | break; |
| mbed_official | 27:4206883f4cb7 | 436 | case OHCI_REG_REVISION: |
| mbed_official | 27:4206883f4cb7 | 437 | case OHCI_REG_PERIODCURRENTED: |
| mbed_official | 27:4206883f4cb7 | 438 | case OHCI_REG_DONEHEADED: |
| mbed_official | 27:4206883f4cb7 | 439 | case OHCI_REG_FMNUMBER: |
| mbed_official | 27:4206883f4cb7 | 440 | default: |
| mbed_official | 27:4206883f4cb7 | 441 | /* Do Nothing */ |
| mbed_official | 27:4206883f4cb7 | 442 | break; |
| mbed_official | 27:4206883f4cb7 | 443 | } |
| mbed_official | 27:4206883f4cb7 | 444 | } |
| mbed_official | 27:4206883f4cb7 | 445 | |
| mbed_official | 27:4206883f4cb7 | 446 | static void callback_task(void const * argument) { |
| mbed_official | 27:4206883f4cb7 | 447 | usbisr_fnc_t *p_wk_cb = p_usbisr_cb; |
| mbed_official | 27:4206883f4cb7 | 448 | |
| mbed_official | 27:4206883f4cb7 | 449 | if (p_wk_cb == NULL) { |
| mbed_official | 27:4206883f4cb7 | 450 | return; |
| mbed_official | 27:4206883f4cb7 | 451 | } |
| mbed_official | 27:4206883f4cb7 | 452 | |
| mbed_official | 27:4206883f4cb7 | 453 | while (1) { |
| mbed_official | 27:4206883f4cb7 | 454 | osSemaphoreWait(semid_cb, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 455 | if (connect_change != 0xFFFFFFFF) { |
| mbed_official | 27:4206883f4cb7 | 456 | connect_change = 0xFFFFFFFF; |
| mbed_official | 27:4206883f4cb7 | 457 | connect_check(); |
| mbed_official | 27:4206883f4cb7 | 458 | } |
| mbed_official | 27:4206883f4cb7 | 459 | p_wk_cb(); |
| mbed_official | 27:4206883f4cb7 | 460 | } |
| mbed_official | 27:4206883f4cb7 | 461 | } |
| mbed_official | 27:4206883f4cb7 | 462 | |
| mbed_official | 27:4206883f4cb7 | 463 | static void control_ed_task(void const * argument) { |
| mbed_official | 27:4206883f4cb7 | 464 | while (1) { |
| mbed_official | 27:4206883f4cb7 | 465 | osSignalWait(SIG_GEN_LIST_REQ, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 466 | (void)osSemaphoreWait(ctl_ed.semid_list, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 467 | while ((p_usb_reg->HcControl & OR_CONTROL_CLE) != 0) { |
| mbed_official | 27:4206883f4cb7 | 468 | if ((p_usb_reg->HcControlCurrentED == 0) |
| mbed_official | 27:4206883f4cb7 | 469 | && ((p_usb_reg->HcCommandStatus & OR_CMD_STATUS_CLF) != 0)) { |
| mbed_official | 27:4206883f4cb7 | 470 | p_usb_reg->HcControlCurrentED = p_usb_reg->HcControlHeadED; |
| mbed_official | 27:4206883f4cb7 | 471 | p_usb_reg->HcCommandStatus &= ~OR_CMD_STATUS_CLF; |
| mbed_official | 27:4206883f4cb7 | 472 | } |
| mbed_official | 27:4206883f4cb7 | 473 | if (p_usb_reg->HcControlCurrentED != 0) { |
| mbed_official | 27:4206883f4cb7 | 474 | ctl_ed.p_curr_ed = (hced_t *)p_usb_reg->HcControlCurrentED; |
| mbed_official | 27:4206883f4cb7 | 475 | if (chk_genelal_ed(&ctl_ed) != 0) { |
| mbed_official | 27:4206883f4cb7 | 476 | control_trans(&ctl_ed); |
| mbed_official | 27:4206883f4cb7 | 477 | chk_split_trans_setting(&ctl_ed); |
| mbed_official | 27:4206883f4cb7 | 478 | p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_CLF; |
| mbed_official | 27:4206883f4cb7 | 479 | chk_td_done(&ctl_ed); |
| mbed_official | 27:4206883f4cb7 | 480 | } |
| mbed_official | 27:4206883f4cb7 | 481 | p_usb_reg->HcControlCurrentED = (uint32_t)ctl_ed.p_curr_ed->nextED; |
| mbed_official | 27:4206883f4cb7 | 482 | } else { |
| mbed_official | 27:4206883f4cb7 | 483 | break; |
| mbed_official | 27:4206883f4cb7 | 484 | } |
| mbed_official | 27:4206883f4cb7 | 485 | } |
| mbed_official | 27:4206883f4cb7 | 486 | if ((p_usb_reg->HcCommandStatus & OR_CMD_STATUS_CLF) != 0) { |
| mbed_official | 27:4206883f4cb7 | 487 | osSignalSet(ctl_ed.tskid, SIG_GEN_LIST_REQ); |
| mbed_official | 27:4206883f4cb7 | 488 | } |
| mbed_official | 27:4206883f4cb7 | 489 | (void)osSemaphoreRelease(ctl_ed.semid_list); |
| mbed_official | 27:4206883f4cb7 | 490 | } |
| mbed_official | 27:4206883f4cb7 | 491 | } |
| mbed_official | 27:4206883f4cb7 | 492 | |
| mbed_official | 27:4206883f4cb7 | 493 | static void bulk_ed_task(void const * argument) { |
| mbed_official | 27:4206883f4cb7 | 494 | while (1) { |
| mbed_official | 27:4206883f4cb7 | 495 | osSignalWait(SIG_GEN_LIST_REQ, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 496 | (void)osSemaphoreWait(blk_ed.semid_list, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 497 | while ((p_usb_reg->HcControl & OR_CONTROL_BLE) != 0) { |
| mbed_official | 27:4206883f4cb7 | 498 | if ((p_usb_reg->HcBulkCurrentED == 0) |
| mbed_official | 27:4206883f4cb7 | 499 | && ((p_usb_reg->HcCommandStatus & OR_CMD_STATUS_BLF) != 0)) { |
| mbed_official | 27:4206883f4cb7 | 500 | p_usb_reg->HcBulkCurrentED = p_usb_reg->HcBulkHeadED; |
| mbed_official | 27:4206883f4cb7 | 501 | p_usb_reg->HcCommandStatus &= ~OR_CMD_STATUS_BLF; |
| mbed_official | 27:4206883f4cb7 | 502 | } |
| mbed_official | 27:4206883f4cb7 | 503 | if (p_usb_reg->HcBulkCurrentED != 0) { |
| mbed_official | 27:4206883f4cb7 | 504 | blk_ed.p_curr_ed = (hced_t *)p_usb_reg->HcBulkCurrentED; |
| mbed_official | 27:4206883f4cb7 | 505 | if (chk_genelal_ed(&blk_ed) != 0) { |
| mbed_official | 27:4206883f4cb7 | 506 | bulk_trans(&blk_ed); |
| mbed_official | 27:4206883f4cb7 | 507 | p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_BLF; |
| mbed_official | 27:4206883f4cb7 | 508 | chk_td_done(&blk_ed); |
| mbed_official | 27:4206883f4cb7 | 509 | } |
| mbed_official | 27:4206883f4cb7 | 510 | p_usb_reg->HcBulkCurrentED = (uint32_t)blk_ed.p_curr_ed->nextED; |
| mbed_official | 27:4206883f4cb7 | 511 | } else { |
| mbed_official | 27:4206883f4cb7 | 512 | break; |
| mbed_official | 27:4206883f4cb7 | 513 | } |
| mbed_official | 27:4206883f4cb7 | 514 | } |
| mbed_official | 27:4206883f4cb7 | 515 | if ((p_usb_reg->HcCommandStatus & OR_CMD_STATUS_BLF) != 0) { |
| mbed_official | 27:4206883f4cb7 | 516 | osSignalSet(blk_ed.tskid, SIG_GEN_LIST_REQ); |
| mbed_official | 27:4206883f4cb7 | 517 | } |
| mbed_official | 27:4206883f4cb7 | 518 | (void)osSemaphoreRelease(blk_ed.semid_list); |
| mbed_official | 27:4206883f4cb7 | 519 | } |
| mbed_official | 27:4206883f4cb7 | 520 | } |
| mbed_official | 27:4206883f4cb7 | 521 | |
| mbed_official | 27:4206883f4cb7 | 522 | static void int_ed_task(void const * argument) { |
| mbed_official | 27:4206883f4cb7 | 523 | genelal_ed_t *p_int_ed = &int_ed[(uint32_t)argument]; |
| mbed_official | 27:4206883f4cb7 | 524 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 525 | uint32_t wait_cnt = 0; |
| mbed_official | 27:4206883f4cb7 | 526 | hcca_t *p_hcca; |
| mbed_official | 27:4206883f4cb7 | 527 | hced_t *p_ed; |
| mbed_official | 27:4206883f4cb7 | 528 | |
| mbed_official | 27:4206883f4cb7 | 529 | while (1) { |
| mbed_official | 27:4206883f4cb7 | 530 | (void)osSemaphoreWait(p_int_ed->semid_list, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 531 | if (p_int_ed->p_curr_ed == NULL) { |
| mbed_official | 27:4206883f4cb7 | 532 | for (cnt = 0; (cnt < 32) && ((p_usb_reg->HcControl & OR_CONTROL_PLE) != 0) |
| mbed_official | 27:4206883f4cb7 | 533 | && (p_int_ed->p_curr_ed == NULL); cnt++) { |
| mbed_official | 27:4206883f4cb7 | 534 | p_hcca = (hcca_t *)p_usb_reg->HcHCCA; |
| mbed_official | 27:4206883f4cb7 | 535 | p_ed = (hced_t *)p_hcca->IntTable[cnt]; |
| mbed_official | 27:4206883f4cb7 | 536 | while ((p_ed != NULL) && ((p_usb_reg->HcControl & OR_CONTROL_PLE) != 0) |
| mbed_official | 27:4206883f4cb7 | 537 | && (p_int_ed->p_curr_ed == NULL)) { |
| mbed_official | 27:4206883f4cb7 | 538 | if (int_trans_doing(p_ed, (uint32_t)argument) == 0) { |
| mbed_official | 27:4206883f4cb7 | 539 | p_int_ed->p_curr_ed = p_ed; |
| mbed_official | 27:4206883f4cb7 | 540 | if (chk_genelal_ed(p_int_ed) != 0) { |
| mbed_official | 27:4206883f4cb7 | 541 | int_trans_setting(p_int_ed, (uint32_t)argument); |
| mbed_official | 27:4206883f4cb7 | 542 | } else { |
| mbed_official | 27:4206883f4cb7 | 543 | p_int_ed->p_curr_ed = NULL; |
| mbed_official | 27:4206883f4cb7 | 544 | } |
| mbed_official | 27:4206883f4cb7 | 545 | } |
| mbed_official | 27:4206883f4cb7 | 546 | p_ed = p_ed->nextED; |
| mbed_official | 27:4206883f4cb7 | 547 | } |
| mbed_official | 27:4206883f4cb7 | 548 | } |
| mbed_official | 27:4206883f4cb7 | 549 | } |
| mbed_official | 27:4206883f4cb7 | 550 | if (p_int_ed->p_curr_ed != NULL) { |
| mbed_official | 27:4206883f4cb7 | 551 | while ((p_usb_reg->HcControl & OR_CONTROL_PLE) != 0) { |
| mbed_official | 27:4206883f4cb7 | 552 | if (chk_genelal_ed(p_int_ed) != 0) { |
| mbed_official | 27:4206883f4cb7 | 553 | int_trans(p_int_ed); |
| mbed_official | 27:4206883f4cb7 | 554 | chk_td_done(p_int_ed); |
| mbed_official | 27:4206883f4cb7 | 555 | wait_cnt = p_int_ed->cycle_time; |
| mbed_official | 27:4206883f4cb7 | 556 | } else { |
| mbed_official | 27:4206883f4cb7 | 557 | if (wait_cnt > 0) { |
| mbed_official | 27:4206883f4cb7 | 558 | wait_cnt--; |
| mbed_official | 27:4206883f4cb7 | 559 | } else { |
| mbed_official | 27:4206883f4cb7 | 560 | p_int_ed->p_curr_ed = NULL; |
| mbed_official | 27:4206883f4cb7 | 561 | } |
| mbed_official | 27:4206883f4cb7 | 562 | break; |
| mbed_official | 27:4206883f4cb7 | 563 | } |
| mbed_official | 27:4206883f4cb7 | 564 | } |
| mbed_official | 27:4206883f4cb7 | 565 | } |
| mbed_official | 27:4206883f4cb7 | 566 | (void)osSemaphoreRelease(p_int_ed->semid_list); |
| mbed_official | 27:4206883f4cb7 | 567 | if (p_int_ed->p_curr_ed == NULL) { |
| mbed_official | 27:4206883f4cb7 | 568 | osDelay(10); |
| mbed_official | 27:4206883f4cb7 | 569 | } else { |
| mbed_official | 27:4206883f4cb7 | 570 | osDelay(1); |
| mbed_official | 27:4206883f4cb7 | 571 | } |
| mbed_official | 27:4206883f4cb7 | 572 | } |
| mbed_official | 27:4206883f4cb7 | 573 | } |
| mbed_official | 27:4206883f4cb7 | 574 | |
| mbed_official | 27:4206883f4cb7 | 575 | static int32_t int_trans_doing(hced_t *p_ed, uint32_t index) { |
| mbed_official | 27:4206883f4cb7 | 576 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 577 | int32_t ret = 0; |
| mbed_official | 27:4206883f4cb7 | 578 | |
| mbed_official | 27:4206883f4cb7 | 579 | for (cnt = 0; cnt < INT_TRANS_MAX_NUM; cnt++) { |
| mbed_official | 27:4206883f4cb7 | 580 | if ((index != cnt) && (int_ed[cnt].p_curr_ed == p_ed)) { |
| mbed_official | 27:4206883f4cb7 | 581 | ret = 1; |
| mbed_official | 27:4206883f4cb7 | 582 | } |
| mbed_official | 27:4206883f4cb7 | 583 | } |
| mbed_official | 27:4206883f4cb7 | 584 | |
| mbed_official | 27:4206883f4cb7 | 585 | return ret; |
| mbed_official | 27:4206883f4cb7 | 586 | } |
| mbed_official | 27:4206883f4cb7 | 587 | |
| mbed_official | 27:4206883f4cb7 | 588 | static int32_t chk_genelal_ed(genelal_ed_t *p_g_ed){ |
| mbed_official | 27:4206883f4cb7 | 589 | int32_t ret = 0; |
| mbed_official | 27:4206883f4cb7 | 590 | hced_t *p_ed = p_g_ed->p_curr_ed; |
| mbed_official | 27:4206883f4cb7 | 591 | |
| mbed_official | 27:4206883f4cb7 | 592 | if (((p_ed->control & ED_SKIP) != 0) |
| mbed_official | 27:4206883f4cb7 | 593 | || (((uint32_t)p_ed->headTD & ED_HALTED) != 0) |
| mbed_official | 27:4206883f4cb7 | 594 | || (((uint32_t)p_ed->tailTD & 0xFFFFFFF0) == ((uint32_t)p_ed->headTD & 0xFFFFFFF0))) { |
| mbed_official | 27:4206883f4cb7 | 595 | /* Do Nothing */ |
| mbed_official | 27:4206883f4cb7 | 596 | } else if ((p_ed->control & 0x0000007F) > 10) { |
| mbed_official | 27:4206883f4cb7 | 597 | p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD | ED_HALTED); |
| mbed_official | 27:4206883f4cb7 | 598 | } else { |
| mbed_official | 27:4206883f4cb7 | 599 | p_g_ed->p_curr_td = (hctd_t *)((uint32_t)p_ed->headTD & 0xFFFFFFF0); |
| mbed_official | 27:4206883f4cb7 | 600 | if (p_g_ed->p_curr_td == NULL) { |
| mbed_official | 27:4206883f4cb7 | 601 | p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD | ED_HALTED); |
| mbed_official | 27:4206883f4cb7 | 602 | } else { |
| mbed_official | 27:4206883f4cb7 | 603 | p_g_ed->p_start_buf = p_g_ed->p_curr_td->currBufPtr; |
| mbed_official | 27:4206883f4cb7 | 604 | ret = 1; |
| mbed_official | 27:4206883f4cb7 | 605 | } |
| mbed_official | 27:4206883f4cb7 | 606 | } |
| mbed_official | 27:4206883f4cb7 | 607 | |
| mbed_official | 27:4206883f4cb7 | 608 | return ret; |
| mbed_official | 27:4206883f4cb7 | 609 | } |
| mbed_official | 27:4206883f4cb7 | 610 | |
| mbed_official | 27:4206883f4cb7 | 611 | static void chk_td_done(genelal_ed_t *p_g_ed) { |
| mbed_official | 27:4206883f4cb7 | 612 | hcca_t *p_hcca; |
| mbed_official | 27:4206883f4cb7 | 613 | uint32_t ConditionCode = RZA_IO_RegRead_32(&p_g_ed->p_curr_td->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC); |
| mbed_official | 27:4206883f4cb7 | 614 | |
| mbed_official | 27:4206883f4cb7 | 615 | if ((ConditionCode != TD_CC_NOT_ACCESSED_1) && (ConditionCode != TD_CC_NOT_ACCESSED_2)) { |
| mbed_official | 27:4206883f4cb7 | 616 | p_g_ed->p_curr_ed->headTD = (hctd_t *)(((uint32_t)p_g_ed->p_curr_td->nextTD & 0xFFFFFFF0) |
| mbed_official | 27:4206883f4cb7 | 617 | | ((uint32_t)p_g_ed->p_curr_ed->headTD & 0x0000000F)); |
| mbed_official | 27:4206883f4cb7 | 618 | p_g_ed->p_curr_td->nextTD = (hctd_t *)p_usb_reg->HcDoneHead; |
| mbed_official | 27:4206883f4cb7 | 619 | p_usb_reg->HcDoneHead = (uint32_t)p_g_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 620 | if ((p_usb_reg->HcInterruptStatus & OR_INTR_STATUS_WDH) == 0) { |
| mbed_official | 27:4206883f4cb7 | 621 | p_hcca = (hcca_t *)p_usb_reg->HcHCCA; |
| mbed_official | 27:4206883f4cb7 | 622 | p_hcca->DoneHead = p_usb_reg->HcDoneHead; |
| mbed_official | 27:4206883f4cb7 | 623 | p_usb_reg->HcDoneHead = 0x00000000; |
| mbed_official | 27:4206883f4cb7 | 624 | p_usb_reg->HcInterruptStatus |= OR_INTR_STATUS_WDH; |
| mbed_official | 27:4206883f4cb7 | 625 | (void)osSemaphoreRelease(semid_cb); |
| mbed_official | 27:4206883f4cb7 | 626 | } |
| mbed_official | 27:4206883f4cb7 | 627 | } |
| mbed_official | 27:4206883f4cb7 | 628 | } |
| mbed_official | 27:4206883f4cb7 | 629 | |
| mbed_official | 27:4206883f4cb7 | 630 | static void chk_split_trans_setting(genelal_ed_t *p_g_ed) { |
| mbed_official | 27:4206883f4cb7 | 631 | uint8_t *p_buf; |
| mbed_official | 27:4206883f4cb7 | 632 | tdinfo_t td_info; |
| mbed_official | 27:4206883f4cb7 | 633 | |
| mbed_official | 27:4206883f4cb7 | 634 | /* Hi-Speed mode only */ |
| mbed_official | 27:4206883f4cb7 | 635 | if (g_usb0_host_UsbDeviceSpeed != USB_HOST_HIGH_SPEED) { |
| mbed_official | 27:4206883f4cb7 | 636 | return; |
| mbed_official | 27:4206883f4cb7 | 637 | } |
| mbed_official | 27:4206883f4cb7 | 638 | |
| mbed_official | 27:4206883f4cb7 | 639 | if (RZA_IO_RegRead_32(&p_g_ed->p_curr_td->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC) != TD_CC_NOERROR) { |
| mbed_official | 27:4206883f4cb7 | 640 | return; |
| mbed_official | 27:4206883f4cb7 | 641 | } |
| mbed_official | 27:4206883f4cb7 | 642 | |
| mbed_official | 27:4206883f4cb7 | 643 | get_td_info(p_g_ed, &td_info); |
| mbed_official | 27:4206883f4cb7 | 644 | p_buf = p_g_ed->p_start_buf; |
| mbed_official | 27:4206883f4cb7 | 645 | |
| mbed_official | 27:4206883f4cb7 | 646 | if (td_info.direction == 0) { |
| mbed_official | 27:4206883f4cb7 | 647 | uint8_t bRequest = p_buf[1]; |
| mbed_official | 27:4206883f4cb7 | 648 | uint16_t wValue = (p_buf[3] << 8) + p_buf[2]; |
| mbed_official | 27:4206883f4cb7 | 649 | uint16_t wIndx = (p_buf[5] << 8) + p_buf[4]; |
| mbed_official | 27:4206883f4cb7 | 650 | uint16_t devadd; |
| mbed_official | 27:4206883f4cb7 | 651 | |
| mbed_official | 27:4206883f4cb7 | 652 | if ((td_info.devadr == 0) && (bRequest == SET_ADDRESS)) { |
| mbed_official | 27:4206883f4cb7 | 653 | /* SET_ADDRESS */ |
| mbed_official | 27:4206883f4cb7 | 654 | usb0_host_get_devadd(USB_HOST_DEVICE_0, &devadd); |
| mbed_official | 27:4206883f4cb7 | 655 | usb0_host_set_devadd(wValue, &devadd); |
| mbed_official | 27:4206883f4cb7 | 656 | if (split_ctl.root_devadr == 0) { |
| mbed_official | 27:4206883f4cb7 | 657 | split_ctl.root_devadr = wValue; /* New Address */ |
| mbed_official | 27:4206883f4cb7 | 658 | } |
| mbed_official | 27:4206883f4cb7 | 659 | } else if ((td_info.devadr == split_ctl.root_devadr) && (bRequest == SET_FEATURE) |
| mbed_official | 27:4206883f4cb7 | 660 | && (wValue == 0x0004) && (split_ctl.root_devadr != 0)) { |
| mbed_official | 27:4206883f4cb7 | 661 | /* SET_FEATURE PORT_RESET */ |
| mbed_official | 27:4206883f4cb7 | 662 | split_ctl.reset_port = (wIndx & 0x00FF); |
| mbed_official | 27:4206883f4cb7 | 663 | } else if ((td_info.devadr == split_ctl.root_devadr) && (bRequest == GET_STATUS)) { |
| mbed_official | 27:4206883f4cb7 | 664 | /* GET_STATUS */ |
| mbed_official | 27:4206883f4cb7 | 665 | split_ctl.get_port = wIndx; |
| mbed_official | 27:4206883f4cb7 | 666 | split_ctl.seq_cnt = 1; |
| mbed_official | 27:4206883f4cb7 | 667 | } else { |
| mbed_official | 27:4206883f4cb7 | 668 | /* Do Nothing */ |
| mbed_official | 27:4206883f4cb7 | 669 | } |
| mbed_official | 27:4206883f4cb7 | 670 | } else if (td_info.direction == 2) { |
| mbed_official | 27:4206883f4cb7 | 671 | if ((td_info.devadr == split_ctl.root_devadr) && (split_ctl.seq_cnt == 1)) { |
| mbed_official | 27:4206883f4cb7 | 672 | if (split_ctl.get_port < PORT_NUM) { |
| mbed_official | 27:4206883f4cb7 | 673 | split_ctl.port_sts_bits[split_ctl.get_port] = (p_buf[1] << 8) + p_buf[0]; |
| mbed_official | 27:4206883f4cb7 | 674 | } |
| mbed_official | 27:4206883f4cb7 | 675 | split_ctl.seq_cnt = 0; |
| mbed_official | 27:4206883f4cb7 | 676 | } |
| mbed_official | 27:4206883f4cb7 | 677 | } else { |
| mbed_official | 27:4206883f4cb7 | 678 | /* Do Nothing */ |
| mbed_official | 27:4206883f4cb7 | 679 | } |
| mbed_official | 27:4206883f4cb7 | 680 | } |
| mbed_official | 27:4206883f4cb7 | 681 | |
| mbed_official | 27:4206883f4cb7 | 682 | static void set_split_trans_setting(void) { |
| mbed_official | 27:4206883f4cb7 | 683 | uint16_t port_speed; |
| mbed_official | 27:4206883f4cb7 | 684 | uint16_t devadd; |
| mbed_official | 27:4206883f4cb7 | 685 | |
| mbed_official | 27:4206883f4cb7 | 686 | if ((split_ctl.root_devadr != 0) && (split_ctl.reset_port != 0) && (split_ctl.reset_port < PORT_NUM)) { |
| mbed_official | 27:4206883f4cb7 | 687 | usb0_host_get_devadd(USB_HOST_DEVICE_0, &devadd); |
| mbed_official | 27:4206883f4cb7 | 688 | RZA_IO_RegWrite_16(&devadd, split_ctl.root_devadr, USB_DEVADDn_UPPHUB_SHIFT, USB_DEVADDn_UPPHUB); |
| mbed_official | 27:4206883f4cb7 | 689 | RZA_IO_RegWrite_16(&devadd, split_ctl.reset_port, USB_DEVADDn_HUBPORT_SHIFT, USB_DEVADDn_HUBPORT); |
| mbed_official | 27:4206883f4cb7 | 690 | if ((split_ctl.port_sts_bits[split_ctl.reset_port] & PORT_HIGH_SPEED) != 0) { |
| mbed_official | 27:4206883f4cb7 | 691 | port_speed = USB_HOST_HIGH_SPEED; |
| mbed_official | 27:4206883f4cb7 | 692 | } else if ((split_ctl.port_sts_bits[split_ctl.reset_port] & PORT_LOW_SPEED) != 0) { |
| mbed_official | 27:4206883f4cb7 | 693 | port_speed = USB_HOST_LOW_SPEED; |
| mbed_official | 27:4206883f4cb7 | 694 | } else { |
| mbed_official | 27:4206883f4cb7 | 695 | port_speed = USB_HOST_FULL_SPEED; |
| mbed_official | 27:4206883f4cb7 | 696 | } |
| mbed_official | 27:4206883f4cb7 | 697 | RZA_IO_RegWrite_16(&devadd, port_speed, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD); |
| mbed_official | 27:4206883f4cb7 | 698 | usb0_host_set_devadd(USB_HOST_DEVICE_0, &devadd); |
| mbed_official | 27:4206883f4cb7 | 699 | split_ctl.reset_port = 0; |
| mbed_official | 27:4206883f4cb7 | 700 | } |
| mbed_official | 27:4206883f4cb7 | 701 | } |
| mbed_official | 27:4206883f4cb7 | 702 | |
| mbed_official | 27:4206883f4cb7 | 703 | static void control_trans(genelal_ed_t *p_g_ed) { |
| mbed_official | 27:4206883f4cb7 | 704 | hctd_t *p_td = p_g_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 705 | tdinfo_t td_info; |
| mbed_official | 27:4206883f4cb7 | 706 | uint16_t devadd; |
| mbed_official | 27:4206883f4cb7 | 707 | |
| mbed_official | 27:4206883f4cb7 | 708 | get_td_info(p_g_ed, &td_info); |
| mbed_official | 27:4206883f4cb7 | 709 | |
| mbed_official | 27:4206883f4cb7 | 710 | if (g_usb0_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) { |
| mbed_official | 27:4206883f4cb7 | 711 | if (td_info.devadr == 0) { |
| mbed_official | 27:4206883f4cb7 | 712 | set_split_trans_setting(); |
| mbed_official | 27:4206883f4cb7 | 713 | } |
| mbed_official | 27:4206883f4cb7 | 714 | } else { |
| mbed_official | 27:4206883f4cb7 | 715 | /* When a non-Hi-Speed, the communication speed is determined from the TD. */ |
| mbed_official | 27:4206883f4cb7 | 716 | usb0_host_get_devadd(USB_HOST_DEVICE_0, &devadd); |
| mbed_official | 27:4206883f4cb7 | 717 | if (td_info.speed == 1) { |
| mbed_official | 27:4206883f4cb7 | 718 | RZA_IO_RegWrite_16(&devadd, USB_HOST_LOW_SPEED, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD); |
| mbed_official | 27:4206883f4cb7 | 719 | } else { |
| mbed_official | 27:4206883f4cb7 | 720 | RZA_IO_RegWrite_16(&devadd, USB_HOST_FULL_SPEED, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD); |
| mbed_official | 27:4206883f4cb7 | 721 | } |
| mbed_official | 27:4206883f4cb7 | 722 | usb0_host_set_devadd(td_info.devadr, &devadd); |
| mbed_official | 27:4206883f4cb7 | 723 | } |
| mbed_official | 27:4206883f4cb7 | 724 | |
| mbed_official | 27:4206883f4cb7 | 725 | USB200.DCPMAXP = (td_info.devadr << 12) + td_info.msp; |
| mbed_official | 27:4206883f4cb7 | 726 | if (td_info.direction == 0) { |
| mbed_official | 27:4206883f4cb7 | 727 | g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE); |
| mbed_official | 27:4206883f4cb7 | 728 | } else if (td_info.count != 0) { |
| mbed_official | 27:4206883f4cb7 | 729 | g_usb0_host_CmdStage = (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE); |
| mbed_official | 27:4206883f4cb7 | 730 | } else { |
| mbed_official | 27:4206883f4cb7 | 731 | g_usb0_host_CmdStage = (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE); |
| mbed_official | 27:4206883f4cb7 | 732 | } |
| mbed_official | 27:4206883f4cb7 | 733 | g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT; |
| mbed_official | 27:4206883f4cb7 | 734 | p_g_ed->pipe_no = USB_HOST_PIPE0; |
| mbed_official | 27:4206883f4cb7 | 735 | |
| mbed_official | 27:4206883f4cb7 | 736 | p_g_ed->trans_wait = 1; |
| mbed_official | 27:4206883f4cb7 | 737 | |
| mbed_official | 27:4206883f4cb7 | 738 | if (td_info.direction == 0) { |
| mbed_official | 27:4206883f4cb7 | 739 | uint16_t Req = (p_td->currBufPtr[1] << 8) + p_td->currBufPtr[0]; |
| mbed_official | 27:4206883f4cb7 | 740 | uint16_t Val = (p_td->currBufPtr[3] << 8) + p_td->currBufPtr[2]; |
| mbed_official | 27:4206883f4cb7 | 741 | uint16_t Indx = (p_td->currBufPtr[5] << 8) + p_td->currBufPtr[4]; |
| mbed_official | 27:4206883f4cb7 | 742 | uint16_t Len = (p_td->currBufPtr[7] << 8) + p_td->currBufPtr[6]; |
| mbed_official | 27:4206883f4cb7 | 743 | |
| mbed_official | 27:4206883f4cb7 | 744 | g_usb0_host_data_pointer[USB_HOST_PIPE0] = p_td->bufEnd; |
| mbed_official | 27:4206883f4cb7 | 745 | usb0_host_SetupStage(Req, Val, Indx, Len); |
| mbed_official | 27:4206883f4cb7 | 746 | } else if (td_info.direction == 1) { |
| mbed_official | 27:4206883f4cb7 | 747 | usb0_host_CtrlWriteStart(td_info.count, p_td->currBufPtr); |
| mbed_official | 27:4206883f4cb7 | 748 | } else { |
| mbed_official | 27:4206883f4cb7 | 749 | usb0_host_CtrlReadStart(td_info.count, p_td->currBufPtr); |
| mbed_official | 27:4206883f4cb7 | 750 | } |
| mbed_official | 27:4206883f4cb7 | 751 | |
| mbed_official | 27:4206883f4cb7 | 752 | (void)osSemaphoreWait(p_g_ed->semid_wait, CTL_TRANS_TIMEOUT); |
| mbed_official | 27:4206883f4cb7 | 753 | if (p_g_ed->trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 754 | p_g_ed->trans_wait = 0; |
| mbed_official | 27:4206883f4cb7 | 755 | RZA_IO_RegWrite_32(&p_td->control, TD_CC_DEVICENOTRESPONDING, TD_CTL_SHFT_CC, TD_CTL_MSK_CC); |
| mbed_official | 27:4206883f4cb7 | 756 | } |
| mbed_official | 27:4206883f4cb7 | 757 | |
| mbed_official | 27:4206883f4cb7 | 758 | g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD); |
| mbed_official | 27:4206883f4cb7 | 759 | g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE; |
| mbed_official | 27:4206883f4cb7 | 760 | g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE; |
| mbed_official | 27:4206883f4cb7 | 761 | } |
| mbed_official | 27:4206883f4cb7 | 762 | |
| mbed_official | 27:4206883f4cb7 | 763 | static void bulk_trans(genelal_ed_t *p_g_ed) { |
| mbed_official | 27:4206883f4cb7 | 764 | hctd_t *p_td = p_g_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 765 | hced_t *p_ed = p_g_ed->p_curr_ed; |
| mbed_official | 27:4206883f4cb7 | 766 | tdinfo_t td_info; |
| mbed_official | 27:4206883f4cb7 | 767 | USB_HOST_CFG_PIPETBL_t *user_table = &usb0_host_blk_ep_tbl1[0]; |
| mbed_official | 27:4206883f4cb7 | 768 | uint8_t wk_table[6]; |
| mbed_official | 27:4206883f4cb7 | 769 | |
| mbed_official | 27:4206883f4cb7 | 770 | get_td_info(p_g_ed, &td_info); |
| mbed_official | 27:4206883f4cb7 | 771 | |
| mbed_official | 27:4206883f4cb7 | 772 | wk_table[0] = 0; |
| mbed_official | 27:4206883f4cb7 | 773 | wk_table[1] = USB_HOST_ENDPOINT_DESC; |
| mbed_official | 27:4206883f4cb7 | 774 | wk_table[2] = td_info.endpoint_no; |
| mbed_official | 27:4206883f4cb7 | 775 | if (td_info.direction == 2) { |
| mbed_official | 27:4206883f4cb7 | 776 | wk_table[2] |= USB_HOST_EP_IN; |
| mbed_official | 27:4206883f4cb7 | 777 | } |
| mbed_official | 27:4206883f4cb7 | 778 | wk_table[3] = USB_HOST_EP_BULK; |
| mbed_official | 27:4206883f4cb7 | 779 | wk_table[4] = (uint8_t)td_info.msp; |
| mbed_official | 27:4206883f4cb7 | 780 | wk_table[5] = (uint8_t)(td_info.msp >> 8); |
| mbed_official | 27:4206883f4cb7 | 781 | p_g_ed->pipe_no = user_table->pipe_number; |
| mbed_official | 27:4206883f4cb7 | 782 | usb0_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table); |
| mbed_official | 27:4206883f4cb7 | 783 | |
| mbed_official | 27:4206883f4cb7 | 784 | set_togle(p_g_ed->pipe_no, p_td, p_ed); |
| mbed_official | 27:4206883f4cb7 | 785 | |
| mbed_official | 27:4206883f4cb7 | 786 | p_g_ed->trans_wait = 1; |
| mbed_official | 27:4206883f4cb7 | 787 | if (td_info.direction == 1) { |
| mbed_official | 27:4206883f4cb7 | 788 | usb0_host_start_send_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr); |
| mbed_official | 27:4206883f4cb7 | 789 | } else { |
| mbed_official | 27:4206883f4cb7 | 790 | usb0_host_start_receive_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr); |
| mbed_official | 27:4206883f4cb7 | 791 | } |
| mbed_official | 27:4206883f4cb7 | 792 | |
| mbed_official | 27:4206883f4cb7 | 793 | (void)osSemaphoreWait(p_g_ed->semid_wait, BLK_TRANS_TIMEOUT); |
| mbed_official | 27:4206883f4cb7 | 794 | usb0_host_stop_transfer(p_g_ed->pipe_no); |
| mbed_official | 27:4206883f4cb7 | 795 | } |
| mbed_official | 27:4206883f4cb7 | 796 | |
| mbed_official | 27:4206883f4cb7 | 797 | static void int_trans_setting(genelal_ed_t *p_g_ed, uint32_t index) { |
| mbed_official | 27:4206883f4cb7 | 798 | hctd_t *p_td = p_g_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 799 | hced_t *p_ed = p_g_ed->p_curr_ed; |
| mbed_official | 27:4206883f4cb7 | 800 | tdinfo_t td_info; |
| mbed_official | 27:4206883f4cb7 | 801 | USB_HOST_CFG_PIPETBL_t *user_table = &usb0_host_int_ep_tbl1[index]; |
| mbed_official | 27:4206883f4cb7 | 802 | uint8_t wk_table[6]; |
| mbed_official | 27:4206883f4cb7 | 803 | uint32_t cycle_time; |
| mbed_official | 27:4206883f4cb7 | 804 | uint16_t devadd; |
| mbed_official | 27:4206883f4cb7 | 805 | |
| mbed_official | 27:4206883f4cb7 | 806 | get_td_info(p_g_ed, &td_info); |
| mbed_official | 27:4206883f4cb7 | 807 | |
| mbed_official | 27:4206883f4cb7 | 808 | wk_table[0] = 0; |
| mbed_official | 27:4206883f4cb7 | 809 | wk_table[1] = USB_HOST_ENDPOINT_DESC; |
| mbed_official | 27:4206883f4cb7 | 810 | wk_table[2] = td_info.endpoint_no; |
| mbed_official | 27:4206883f4cb7 | 811 | if (td_info.direction == 2) { |
| mbed_official | 27:4206883f4cb7 | 812 | wk_table[2] |= USB_HOST_EP_IN; |
| mbed_official | 27:4206883f4cb7 | 813 | } |
| mbed_official | 27:4206883f4cb7 | 814 | wk_table[3] = USB_HOST_EP_INT; |
| mbed_official | 27:4206883f4cb7 | 815 | wk_table[4] = (uint8_t)td_info.msp; |
| mbed_official | 27:4206883f4cb7 | 816 | wk_table[5] = (uint8_t)(td_info.msp >> 8); |
| mbed_official | 27:4206883f4cb7 | 817 | cycle_time = chk_cycle(p_ed); |
| mbed_official | 27:4206883f4cb7 | 818 | p_g_ed->cycle_time = cycle_time; |
| mbed_official | 27:4206883f4cb7 | 819 | user_table->pipe_cycle = 0; |
| mbed_official | 27:4206883f4cb7 | 820 | while (cycle_time > 1) { |
| mbed_official | 27:4206883f4cb7 | 821 | cycle_time >>= 1; |
| mbed_official | 27:4206883f4cb7 | 822 | user_table->pipe_cycle++; |
| mbed_official | 27:4206883f4cb7 | 823 | } |
| mbed_official | 27:4206883f4cb7 | 824 | if (g_usb0_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) { |
| mbed_official | 27:4206883f4cb7 | 825 | usb0_host_get_devadd(td_info.devadr, &devadd); |
| mbed_official | 27:4206883f4cb7 | 826 | if (RZA_IO_RegRead_16(&devadd, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD) == USB_HOST_HIGH_SPEED) { |
| mbed_official | 27:4206883f4cb7 | 827 | user_table->pipe_cycle += 3; |
| mbed_official | 27:4206883f4cb7 | 828 | if (user_table->pipe_cycle > 7) { |
| mbed_official | 27:4206883f4cb7 | 829 | user_table->pipe_cycle = 7; |
| mbed_official | 27:4206883f4cb7 | 830 | } |
| mbed_official | 27:4206883f4cb7 | 831 | } |
| mbed_official | 27:4206883f4cb7 | 832 | } |
| mbed_official | 27:4206883f4cb7 | 833 | |
| mbed_official | 27:4206883f4cb7 | 834 | p_g_ed->pipe_no = user_table->pipe_number; |
| mbed_official | 27:4206883f4cb7 | 835 | usb0_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table); |
| mbed_official | 27:4206883f4cb7 | 836 | |
| mbed_official | 27:4206883f4cb7 | 837 | set_togle(p_g_ed->pipe_no, p_td, p_ed); |
| mbed_official | 27:4206883f4cb7 | 838 | } |
| mbed_official | 27:4206883f4cb7 | 839 | |
| mbed_official | 27:4206883f4cb7 | 840 | static uint32_t chk_cycle(hced_t *p_ed) { |
| mbed_official | 27:4206883f4cb7 | 841 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 842 | uint32_t hit_cnt = 0; |
| mbed_official | 27:4206883f4cb7 | 843 | uint32_t cycle_time = 1; |
| mbed_official | 27:4206883f4cb7 | 844 | hcca_t *p_hcca; |
| mbed_official | 27:4206883f4cb7 | 845 | hced_t *p_wk_ed; |
| mbed_official | 27:4206883f4cb7 | 846 | |
| mbed_official | 27:4206883f4cb7 | 847 | p_hcca = (hcca_t *)p_usb_reg->HcHCCA; |
| mbed_official | 27:4206883f4cb7 | 848 | |
| mbed_official | 27:4206883f4cb7 | 849 | for (cnt = 0; cnt < 32; cnt++) { |
| mbed_official | 27:4206883f4cb7 | 850 | p_wk_ed = (hced_t *)p_hcca->IntTable[cnt]; |
| mbed_official | 27:4206883f4cb7 | 851 | while (p_wk_ed != NULL) { |
| mbed_official | 27:4206883f4cb7 | 852 | if (p_wk_ed == p_ed) { |
| mbed_official | 27:4206883f4cb7 | 853 | hit_cnt++; |
| mbed_official | 27:4206883f4cb7 | 854 | break; |
| mbed_official | 27:4206883f4cb7 | 855 | } |
| mbed_official | 27:4206883f4cb7 | 856 | p_wk_ed = p_wk_ed->nextED; |
| mbed_official | 27:4206883f4cb7 | 857 | } |
| mbed_official | 27:4206883f4cb7 | 858 | } |
| mbed_official | 27:4206883f4cb7 | 859 | if (hit_cnt < 2) { |
| mbed_official | 27:4206883f4cb7 | 860 | cycle_time = 32; |
| mbed_official | 27:4206883f4cb7 | 861 | } else if (hit_cnt < 4) { |
| mbed_official | 27:4206883f4cb7 | 862 | cycle_time = 16; |
| mbed_official | 27:4206883f4cb7 | 863 | } else if (hit_cnt < 8) { |
| mbed_official | 27:4206883f4cb7 | 864 | cycle_time = 8; |
| mbed_official | 27:4206883f4cb7 | 865 | } else if (hit_cnt < 16) { |
| mbed_official | 27:4206883f4cb7 | 866 | cycle_time = 4; |
| mbed_official | 27:4206883f4cb7 | 867 | } else if (hit_cnt < 32) { |
| mbed_official | 27:4206883f4cb7 | 868 | cycle_time = 2; |
| mbed_official | 27:4206883f4cb7 | 869 | } else{ |
| mbed_official | 27:4206883f4cb7 | 870 | cycle_time = 1; |
| mbed_official | 27:4206883f4cb7 | 871 | } |
| mbed_official | 27:4206883f4cb7 | 872 | |
| mbed_official | 27:4206883f4cb7 | 873 | return cycle_time; |
| mbed_official | 27:4206883f4cb7 | 874 | } |
| mbed_official | 27:4206883f4cb7 | 875 | |
| mbed_official | 27:4206883f4cb7 | 876 | static void int_trans(genelal_ed_t *p_g_ed) { |
| mbed_official | 27:4206883f4cb7 | 877 | hctd_t *p_td = p_g_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 878 | tdinfo_t td_info; |
| mbed_official | 27:4206883f4cb7 | 879 | |
| mbed_official | 27:4206883f4cb7 | 880 | get_td_info(p_g_ed, &td_info); |
| mbed_official | 27:4206883f4cb7 | 881 | p_g_ed->trans_wait = 1; |
| mbed_official | 27:4206883f4cb7 | 882 | if (td_info.direction == 1) { |
| mbed_official | 27:4206883f4cb7 | 883 | usb0_host_start_send_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr); |
| mbed_official | 27:4206883f4cb7 | 884 | } else { |
| mbed_official | 27:4206883f4cb7 | 885 | usb0_host_start_receive_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr); |
| mbed_official | 27:4206883f4cb7 | 886 | } |
| mbed_official | 27:4206883f4cb7 | 887 | (void)osSemaphoreWait(p_g_ed->semid_wait, osWaitForever); |
| mbed_official | 27:4206883f4cb7 | 888 | usb0_host_stop_transfer(p_g_ed->pipe_no); |
| mbed_official | 27:4206883f4cb7 | 889 | } |
| mbed_official | 27:4206883f4cb7 | 890 | |
| mbed_official | 27:4206883f4cb7 | 891 | static void get_td_info(genelal_ed_t *p_g_ed, tdinfo_t *p_td_info) { |
| mbed_official | 27:4206883f4cb7 | 892 | hctd_t *p_td = p_g_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 893 | hced_t *p_ed = p_g_ed->p_curr_ed; |
| mbed_official | 27:4206883f4cb7 | 894 | |
| mbed_official | 27:4206883f4cb7 | 895 | p_td_info->endpoint_no = (uint8_t)((p_ed->control >> 7) & 0x0000000F); |
| mbed_official | 27:4206883f4cb7 | 896 | p_td_info->msp = (p_ed->control >> 16) & 0x000007FF; |
| mbed_official | 27:4206883f4cb7 | 897 | p_td_info->devadr = p_ed->control & 0x0000000F; |
| mbed_official | 27:4206883f4cb7 | 898 | p_td_info->speed = (p_ed->control >> 13) & 0x00000001; |
| mbed_official | 27:4206883f4cb7 | 899 | p_td_info->direction = (p_ed->control >> 11) & 0x00000003; |
| mbed_official | 27:4206883f4cb7 | 900 | if ((p_td_info->direction == 0) || (p_td_info->direction == 3)) { |
| mbed_official | 27:4206883f4cb7 | 901 | if ((p_td->control & TD_CTL_MSK_DP) == TD_SETUP) { |
| mbed_official | 27:4206883f4cb7 | 902 | p_td_info->direction = 0; |
| mbed_official | 27:4206883f4cb7 | 903 | } else if ((p_td->control & TD_CTL_MSK_DP) == TD_OUT) { |
| mbed_official | 27:4206883f4cb7 | 904 | p_td_info->direction = 1; |
| mbed_official | 27:4206883f4cb7 | 905 | } else { |
| mbed_official | 27:4206883f4cb7 | 906 | p_td_info->direction = 2; |
| mbed_official | 27:4206883f4cb7 | 907 | } |
| mbed_official | 27:4206883f4cb7 | 908 | } |
| mbed_official | 27:4206883f4cb7 | 909 | if (p_td->currBufPtr != NULL) { |
| mbed_official | 27:4206883f4cb7 | 910 | p_td_info->count = (uint32_t)p_td->bufEnd - (uint32_t)p_td->currBufPtr + 1; |
| mbed_official | 27:4206883f4cb7 | 911 | } else { |
| mbed_official | 27:4206883f4cb7 | 912 | p_td_info->count = 0; |
| mbed_official | 27:4206883f4cb7 | 913 | } |
| mbed_official | 27:4206883f4cb7 | 914 | } |
| mbed_official | 27:4206883f4cb7 | 915 | |
| mbed_official | 27:4206883f4cb7 | 916 | static void set_togle(uint32_t pipe, hctd_t *p_td, hced_t *p_ed) { |
| mbed_official | 27:4206883f4cb7 | 917 | if ((p_td->control & TD_CTL_MSK_T) == TD_TOGGLE_0) { |
| mbed_official | 27:4206883f4cb7 | 918 | usb0_host_set_sqclr(pipe); |
| mbed_official | 27:4206883f4cb7 | 919 | } else if ((p_td->control & TD_CTL_MSK_T) == TD_TOGGLE_1) { |
| mbed_official | 27:4206883f4cb7 | 920 | usb0_host_set_sqset(pipe); |
| mbed_official | 27:4206883f4cb7 | 921 | } else if (((uint32_t)p_ed->headTD & ED_TOGLE_CARRY) == 0) { |
| mbed_official | 27:4206883f4cb7 | 922 | usb0_host_set_sqclr(pipe); |
| mbed_official | 27:4206883f4cb7 | 923 | } else { |
| mbed_official | 27:4206883f4cb7 | 924 | usb0_host_set_sqset(pipe); |
| mbed_official | 27:4206883f4cb7 | 925 | } |
| mbed_official | 27:4206883f4cb7 | 926 | } |
| mbed_official | 27:4206883f4cb7 | 927 | |
| mbed_official | 27:4206883f4cb7 | 928 | static void connect_check(void) { |
| mbed_official | 27:4206883f4cb7 | 929 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 930 | uint32_t type = 0; |
| mbed_official | 27:4206883f4cb7 | 931 | uint16_t stat; |
| mbed_official | 27:4206883f4cb7 | 932 | uint16_t devadd = 0; |
| mbed_official | 27:4206883f4cb7 | 933 | uint32_t wk_HcRhPortStatus1 = p_usb_reg->HcRhPortStatus1; |
| mbed_official | 27:4206883f4cb7 | 934 | |
| mbed_official | 27:4206883f4cb7 | 935 | if (usb0_host_CheckAttach() == USB_HOST_ATTACH) { |
| mbed_official | 27:4206883f4cb7 | 936 | type = 1; |
| mbed_official | 27:4206883f4cb7 | 937 | } |
| mbed_official | 27:4206883f4cb7 | 938 | |
| mbed_official | 27:4206883f4cb7 | 939 | if ((((wk_HcRhPortStatus1 & OR_RH_PORT_CCS) == 0) && (type == 0)) |
| mbed_official | 27:4206883f4cb7 | 940 | || (((wk_HcRhPortStatus1 & OR_RH_PORT_CCS) != 0) && (type != 0))) { |
| mbed_official | 27:4206883f4cb7 | 941 | return; |
| mbed_official | 27:4206883f4cb7 | 942 | } |
| mbed_official | 27:4206883f4cb7 | 943 | |
| mbed_official | 27:4206883f4cb7 | 944 | if (type == 0) { |
| mbed_official | 27:4206883f4cb7 | 945 | usb0_host_UsbDetach(); |
| mbed_official | 27:4206883f4cb7 | 946 | wk_HcRhPortStatus1 &= ~OR_RH_PORT_CCS; |
| mbed_official | 27:4206883f4cb7 | 947 | } else { |
| mbed_official | 27:4206883f4cb7 | 948 | usb0_host_UsbAttach(); |
| mbed_official | 27:4206883f4cb7 | 949 | stat = usb0_host_UsbBusReset(); |
| mbed_official | 27:4206883f4cb7 | 950 | RZA_IO_RegWrite_16(&devadd, 0, USB_DEVADDn_UPPHUB_SHIFT, USB_DEVADDn_UPPHUB); |
| mbed_official | 27:4206883f4cb7 | 951 | RZA_IO_RegWrite_16(&devadd, 0, USB_DEVADDn_HUBPORT_SHIFT, USB_DEVADDn_HUBPORT); |
| mbed_official | 27:4206883f4cb7 | 952 | if (stat == USB_HOST_HSMODE) { |
| mbed_official | 27:4206883f4cb7 | 953 | wk_HcRhPortStatus1 &= ~OR_RH_PORT_LSDA; |
| mbed_official | 27:4206883f4cb7 | 954 | RZA_IO_RegWrite_16(&USB200.SOFCFG, 0, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL); |
| mbed_official | 27:4206883f4cb7 | 955 | g_usb0_host_UsbDeviceSpeed = USB_HOST_HIGH_SPEED; |
| mbed_official | 27:4206883f4cb7 | 956 | } else if (stat == USB_HOST_FSMODE) { |
| mbed_official | 27:4206883f4cb7 | 957 | wk_HcRhPortStatus1 &= ~OR_RH_PORT_LSDA; |
| mbed_official | 27:4206883f4cb7 | 958 | RZA_IO_RegWrite_16(&USB200.SOFCFG, 0, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL); |
| mbed_official | 27:4206883f4cb7 | 959 | g_usb0_host_UsbDeviceSpeed = USB_HOST_FULL_SPEED; |
| mbed_official | 27:4206883f4cb7 | 960 | } else { |
| mbed_official | 27:4206883f4cb7 | 961 | wk_HcRhPortStatus1 |= OR_RH_PORT_LSDA; |
| mbed_official | 27:4206883f4cb7 | 962 | RZA_IO_RegWrite_16(&USB200.SOFCFG, 1, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL); |
| mbed_official | 27:4206883f4cb7 | 963 | g_usb0_host_UsbDeviceSpeed = USB_HOST_LOW_SPEED; |
| mbed_official | 27:4206883f4cb7 | 964 | } |
| mbed_official | 27:4206883f4cb7 | 965 | RZA_IO_RegWrite_16(&devadd, g_usb0_host_UsbDeviceSpeed, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD); |
| mbed_official | 27:4206883f4cb7 | 966 | usb0_host_init_pipe_status(); |
| mbed_official | 27:4206883f4cb7 | 967 | usb0_host_set_devadd(USB_HOST_DEVICE_0, &devadd); |
| mbed_official | 27:4206883f4cb7 | 968 | wk_HcRhPortStatus1 |= OR_RH_PORT_CCS; |
| mbed_official | 27:4206883f4cb7 | 969 | } |
| mbed_official | 27:4206883f4cb7 | 970 | wk_HcRhPortStatus1 |= OR_RH_PORT_CSC; |
| mbed_official | 27:4206883f4cb7 | 971 | p_usb_reg->HcRhPortStatus1 = wk_HcRhPortStatus1; |
| mbed_official | 27:4206883f4cb7 | 972 | p_usb_reg->HcInterruptStatus |= OR_INTR_STATUS_RHSC; |
| mbed_official | 27:4206883f4cb7 | 973 | (void)memset(&split_ctl, 0, sizeof(split_ctl)); |
| mbed_official | 27:4206883f4cb7 | 974 | |
| mbed_official | 27:4206883f4cb7 | 975 | if (type == 0) { |
| mbed_official | 27:4206883f4cb7 | 976 | if (ctl_ed.trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 977 | ohciwrapp_loc_TransEnd(ctl_ed.pipe_no, TD_CC_DEVICENOTRESPONDING); |
| mbed_official | 27:4206883f4cb7 | 978 | } |
| mbed_official | 27:4206883f4cb7 | 979 | if (blk_ed.trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 980 | ohciwrapp_loc_TransEnd(blk_ed.pipe_no, TD_CC_DEVICENOTRESPONDING); |
| mbed_official | 27:4206883f4cb7 | 981 | } |
| mbed_official | 27:4206883f4cb7 | 982 | for (cnt = 0; cnt< INT_TRANS_MAX_NUM; cnt++) { |
| mbed_official | 27:4206883f4cb7 | 983 | if (int_ed[cnt].trans_wait == 1) { |
| mbed_official | 27:4206883f4cb7 | 984 | ohciwrapp_loc_TransEnd(int_ed[cnt].pipe_no, TD_CC_DEVICENOTRESPONDING); |
| mbed_official | 27:4206883f4cb7 | 985 | } |
| mbed_official | 27:4206883f4cb7 | 986 | } |
| mbed_official | 27:4206883f4cb7 | 987 | } |
| mbed_official | 27:4206883f4cb7 | 988 | } |
| mbed_official | 27:4206883f4cb7 | 989 | |
| mbed_official | 27:4206883f4cb7 | 990 | void ohciwrapp_loc_Connect(uint32_t type) { |
| mbed_official | 27:4206883f4cb7 | 991 | connect_change = type; |
| mbed_official | 27:4206883f4cb7 | 992 | (void)osSemaphoreRelease(semid_cb); |
| mbed_official | 27:4206883f4cb7 | 993 | } |
| mbed_official | 27:4206883f4cb7 | 994 | |
| mbed_official | 27:4206883f4cb7 | 995 | void ohciwrapp_loc_TransEnd(uint32_t pipe, uint32_t ConditionCode) { |
| mbed_official | 27:4206883f4cb7 | 996 | uint32_t cnt; |
| mbed_official | 27:4206883f4cb7 | 997 | uint32_t sqmon; |
| mbed_official | 27:4206883f4cb7 | 998 | hctd_t *p_td; |
| mbed_official | 27:4206883f4cb7 | 999 | hced_t *p_ed; |
| mbed_official | 27:4206883f4cb7 | 1000 | genelal_ed_t *p_wait_ed = NULL; |
| mbed_official | 27:4206883f4cb7 | 1001 | |
| mbed_official | 27:4206883f4cb7 | 1002 | if (ctl_ed.pipe_no == pipe) { |
| mbed_official | 27:4206883f4cb7 | 1003 | p_wait_ed = &ctl_ed; |
| mbed_official | 27:4206883f4cb7 | 1004 | } else if (blk_ed.pipe_no == pipe) { |
| mbed_official | 27:4206883f4cb7 | 1005 | p_wait_ed = &blk_ed; |
| mbed_official | 27:4206883f4cb7 | 1006 | } else { |
| mbed_official | 27:4206883f4cb7 | 1007 | for (cnt = 0; cnt< INT_TRANS_MAX_NUM; cnt++) { |
| mbed_official | 27:4206883f4cb7 | 1008 | if (int_ed[cnt].pipe_no == pipe) { |
| mbed_official | 27:4206883f4cb7 | 1009 | p_wait_ed = &int_ed[cnt]; |
| mbed_official | 27:4206883f4cb7 | 1010 | break; |
| mbed_official | 27:4206883f4cb7 | 1011 | } |
| mbed_official | 27:4206883f4cb7 | 1012 | } |
| mbed_official | 27:4206883f4cb7 | 1013 | } |
| mbed_official | 27:4206883f4cb7 | 1014 | if (p_wait_ed == NULL) { |
| mbed_official | 27:4206883f4cb7 | 1015 | return; |
| mbed_official | 27:4206883f4cb7 | 1016 | } |
| mbed_official | 27:4206883f4cb7 | 1017 | |
| mbed_official | 27:4206883f4cb7 | 1018 | p_td = p_wait_ed->p_curr_td; |
| mbed_official | 27:4206883f4cb7 | 1019 | p_ed = p_wait_ed->p_curr_ed; |
| mbed_official | 27:4206883f4cb7 | 1020 | if ((p_td == NULL) || (p_ed == NULL)) { |
| mbed_official | 27:4206883f4cb7 | 1021 | return; |
| mbed_official | 27:4206883f4cb7 | 1022 | } |
| mbed_official | 27:4206883f4cb7 | 1023 | |
| mbed_official | 27:4206883f4cb7 | 1024 | if (ConditionCode == TD_CC_NOERROR) { |
| mbed_official | 27:4206883f4cb7 | 1025 | /* ErrorCount */ |
| mbed_official | 27:4206883f4cb7 | 1026 | RZA_IO_RegWrite_32(&p_td->control, 0, TD_CTL_SHFT_EC, TD_CTL_MSK_EC); |
| mbed_official | 27:4206883f4cb7 | 1027 | |
| mbed_official | 27:4206883f4cb7 | 1028 | /* CurrentBufferPointer */ |
| mbed_official | 27:4206883f4cb7 | 1029 | p_td->currBufPtr += ((uint32_t)p_td->bufEnd - (uint32_t)p_td->currBufPtr + 1) - g_usb0_host_data_count[pipe]; |
| mbed_official | 27:4206883f4cb7 | 1030 | } else { |
| mbed_official | 27:4206883f4cb7 | 1031 | /* ErrorCount */ |
| mbed_official | 27:4206883f4cb7 | 1032 | RZA_IO_RegWrite_32(&p_td->control, 3, TD_CTL_SHFT_EC, TD_CTL_MSK_EC); |
| mbed_official | 27:4206883f4cb7 | 1033 | } |
| mbed_official | 27:4206883f4cb7 | 1034 | |
| mbed_official | 27:4206883f4cb7 | 1035 | /* DataToggle */ |
| mbed_official | 27:4206883f4cb7 | 1036 | sqmon = usb0_host_get_sqmon(pipe); |
| mbed_official | 27:4206883f4cb7 | 1037 | RZA_IO_RegWrite_32(&p_td->control, sqmon, TD_CTL_SHFT_T, TD_CTL_MSK_T); |
| mbed_official | 27:4206883f4cb7 | 1038 | if (sqmon == 0) { |
| mbed_official | 27:4206883f4cb7 | 1039 | p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD & ~ED_TOGLE_CARRY); |
| mbed_official | 27:4206883f4cb7 | 1040 | } else { |
| mbed_official | 27:4206883f4cb7 | 1041 | p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD | ED_TOGLE_CARRY); |
| mbed_official | 27:4206883f4cb7 | 1042 | } |
| mbed_official | 27:4206883f4cb7 | 1043 | |
| mbed_official | 27:4206883f4cb7 | 1044 | /* ConditionCode */ |
| mbed_official | 27:4206883f4cb7 | 1045 | RZA_IO_RegWrite_32(&p_td->control, ConditionCode, TD_CTL_SHFT_CC, TD_CTL_MSK_CC); |
| mbed_official | 27:4206883f4cb7 | 1046 | |
| mbed_official | 27:4206883f4cb7 | 1047 | p_wait_ed->trans_wait = 0; |
| mbed_official | 27:4206883f4cb7 | 1048 | |
| mbed_official | 27:4206883f4cb7 | 1049 | (void)osSemaphoreRelease(p_wait_ed->semid_wait); |
| mbed_official | 27:4206883f4cb7 | 1050 | } |
| mbed_official | 27:4206883f4cb7 | 1051 |
