Renesas / GR-PEACH_video

Video library for GR-PEACH

Dependents:   Trace_Program2 GR-PEACH_Camera_in_barcode GR-PEACH_LCD_sample GR-PEACH_LCD_4_3inch_sample ... more

Video ｌibrary for GR-PEACH.

Hello World!

Import programGR-PEACH_Camera_in

Camera in sample for GR-PEACH. This sample works on GR-LYCHEE besides GR-PEACH.

Last commit 28 Dec 2018 by Renesas

API

Import library
GR-PEACH_video - DisplayBase Class Reference

Data Structures

struct lcd_config_t
LCD configuration. More...
struct rect_t
The relative position within the graphics display area. More...
struct video_ext_in_config_t
Digital Video Input configuration. More...

Public Types

enum video_input_channel_t { VIDEO_INPUT_CHANNEL_0 = 0, VIDEO_INPUT_CHANNEL_1 }

Video input channel select.

More...
enum graphics_layer_t { GRAPHICS_LAYER_0 = 0, GRAPHICS_LAYER_1 , GRAPHICS_LAYER_2 , GRAPHICS_LAYER_3 }

Graphics layer select.

More...
enum graphics_error_t {
GRAPHICS_OK = 0, GRAPHICS_VDC5_ERR = -1, GRAPHICS_FORMA_ERR = -2, GRAPHICS_LAYER_ERR = -3,
GRAPHICS_CHANNLE_ERR = -4, GRAPHICS_VIDEO_NTSC_SIZE_ERR = -5, GRAPHICS_VIDEO_PAL_SIZE_ERR = -6, GRAPHICS_PARAM_RANGE_ERR = -7
}

Error codes.

More...
enum graphics_format_t { GRAPHICS_FORMAT_YCBCR422 = 0, GRAPHICS_FORMAT_RGB565 , GRAPHICS_FORMAT_RGB888 , GRAPHICS_FORMAT_ARGB8888 }

Graphics layer read format selects.

More...
enum video_format_t { VIDEO_FORMAT_YCBCR422 = 0, VIDEO_FORMAT_RGB565 , VIDEO_FORMAT_RGB888 }

Video writing format selects.

More...
enum wr_rd_swa_t {
WR_RD_WRSWA_NON = 0, WR_RD_WRSWA_8BIT , WR_RD_WRSWA_16BIT , WR_RD_WRSWA_16_8BIT ,
WR_RD_WRSWA_32BIT , WR_RD_WRSWA_32_8BIT , WR_RD_WRSWA_32_16BIT , WR_RD_WRSWA_32_16_8BIT
}

Frame buffer swap setting.

More...
enum lcd_tcon_pin_t { LCD_TCON_PIN_NON = -1, LCD_TCON_PIN_0 , LCD_TCON_PIN_1 , LCD_TCON_PIN_2 }

LCD tcon output pin selects.

More...
enum lcd_outformat_t { LCD_OUTFORMAT_RGB888 = 0, LCD_OUTFORMAT_RGB666 , LCD_OUTFORMAT_RGB565 }

LCD output format selects.

More...
enum edge_t { EDGE_RISING = 0, EDGE_FALLING = 1 }

Edge of a signal.

More...
enum lcd_type_t { LCD_TYPE_LVDS = 0, LCD_TYPE_PARALLEL_RGB }

LCD type.

More...
enum sig_pol_t { SIG_POL_NOT_INVERTED = 0, SIG_POL_INVERTED }

Polarity of a signal.

More...
enum int_type_t {
INT_TYPE_S0_VI_VSYNC = 0, INT_TYPE_S0_LO_VSYNC , INT_TYPE_S0_VSYNCERR , INT_TYPE_VLINE ,
INT_TYPE_S0_VFIELD , INT_TYPE_IV1_VBUFERR , INT_TYPE_IV3_VBUFERR , INT_TYPE_IV5_VBUFERR ,
INT_TYPE_IV6_VBUFERR , INT_TYPE_S0_WLINE , INT_TYPE_S1_VI_VSYNC , INT_TYPE_S1_LO_VSYNC ,
INT_TYPE_S1_VSYNCERR , INT_TYPE_S1_VFIELD , INT_TYPE_IV2_VBUFERR , INT_TYPE_IV4_VBUFERR ,
INT_TYPE_S1_WLINE , INT_TYPE_OIR_VI_VSYNC , INT_TYPE_OIR_LO_VSYNC , INT_TYPE_OIR_VLINE ,
INT_TYPE_OIR_VFIELD , INT_TYPE_IV7_VBUFERR , INT_TYPE_IV8_VBUFERR , INT_TYPE_NUM
}

Interrupt type.

More...
enum graphics_video_col_sys_t {
COL_SYS_NTSC_358 = 0, COL_SYS_NTSC_443 = 1, COL_SYS_PAL_443 = 2, COL_SYS_PAL_M = 3,
COL_SYS_PAL_N = 4, COL_SYS_SECAM = 5, COL_SYS_NTSC_443_60 = 6, COL_SYS_PAL_60 = 7
}

Video color system.

More...
enum video_input_sel_t { INPUT_SEL_VDEC = 0, INPUT_SEL_EXT = 1 }

External Input select.

More...
enum video_extin_format_t {
VIDEO_EXTIN_FORMAT_RGB888 = 0, VIDEO_EXTIN_FORMAT_RGB666 , VIDEO_EXTIN_FORMAT_RGB565 , VIDEO_EXTIN_FORMAT_BT656 ,
VIDEO_EXTIN_FORMAT_BT601 , VIDEO_EXTIN_FORMAT_YCBCR422 , VIDEO_EXTIN_FORMAT_YCBCR444
}

External input format select.

More...
enum onoff_t { OFF = 0, ON = 1 }

On/off.

More...
enum extin_input_line_t { EXTIN_LINE_525 = 0, EXTIN_LINE_625 = 1 }

Number of lines for BT.656 external input.

More...
enum extin_h_pos_t { EXTIN_H_POS_CBYCRY = 0, EXTIN_H_POS_YCRYCB , EXTIN_H_POS_CRYCBY , EXTIN_H_POS_YCBYCR }

Y/Cb/Y/Cr data string start timing.

More...

Public Member Functions

DisplayBase (void)
Constructor method of display base object.
graphics_error_t Graphics_init ( lcd_config_t *lcd_config)
Graphics initialization processing
If not using display, set NULL in parameter.
graphics_error_t Graphics_Video_init ( video_input_sel_t video_input_sel, video_ext_in_config_t *video_ext_in_config)
Graphics Video initialization processing
If setting INPUT_SEL_VDEC in video_input_sel parameter, set NULL in video_ext_in_config parameter.
graphics_error_t Graphics_Lcd_Port_Init (PinName *pin, unsigned int pin_count)
LCD output port initialization processing.
graphics_error_t Graphics_Lvds_Port_Init (PinName *pin, unsigned int pin_count)
LVDS output port initialization processing.
graphics_error_t Graphics_Dvinput_Port_Init (PinName *pin, unsigned int pin_count)
Digital video input port initialization processing.
graphics_error_t Graphics_Irq_Handler_Set ( int_type_t Graphics_Irq_Handler_Set, unsigned short num, void(*callback)( int_type_t ))
Interrupt callback setup This function performs the following processing:

  • Enables the interrupt when the pointer to the corresponding interrupt callback function is specified.

graphics_error_t Graphics_Start ( graphics_layer_t layer_id)
Start the graphics surface read process.
graphics_error_t Graphics_Stop ( graphics_layer_t layer_id)
Stop the graphics surface read process.
graphics_error_t Video_Start ( video_input_channel_t video_input_channel)
Start the video surface write process.
graphics_error_t Video_Stop ( video_input_channel_t video_input_channel)
Stop the video surface write process.
graphics_error_t Graphics_Read_Setting ( graphics_layer_t layer_id, void *framebuff, unsigned int fb_stride, graphics_format_t gr_format, wr_rd_swa_t wr_rd_swa, rect_t *gr_rect)
Graphics surface read process setting.
graphics_error_t Graphics_Read_Change ( graphics_layer_t layer_id, void *framebuff)
Graphics surface read buffer change process.
graphics_error_t Video_Write_Setting ( video_input_channel_t video_input_channel, graphics_video_col_sys_t col_sys, void *framebuff, unsigned int fb_stride, video_format_t video_format, wr_rd_swa_t wr_rd_swa, unsigned short video_write_buff_vw, unsigned short video_write_buff_hw)
Video surface write process setting.
graphics_error_t Video_Write_Change ( video_input_channel_t video_input_channel, void *framebuff, uint32_t fb_stride)
Video surface write buffer change process.

Interface

See the Pinout page for more details

DisplayBase.cpp@0:853f5b7408a7, 2015-06-26 (annotated)

Committer:
dkato
Date:
Fri Jun 26 02:17:53 2015 +0000
Revision:
0:853f5b7408a7
Child:
2:3149baf7925b
first commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:853f5b7408a7 1 /*******************************************************************************
dkato 0:853f5b7408a7 2 * DISCLAIMER
dkato 0:853f5b7408a7 3 * This software is supplied by Renesas Electronics Corporation and is only
dkato 0:853f5b7408a7 4 * intended for use with Renesas products. No other uses are authorized. This
dkato 0:853f5b7408a7 5 * software is owned by Renesas Electronics Corporation and is protected under
dkato 0:853f5b7408a7 6 * all applicable laws, including copyright laws.
dkato 0:853f5b7408a7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
dkato 0:853f5b7408a7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
dkato 0:853f5b7408a7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
dkato 0:853f5b7408a7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
dkato 0:853f5b7408a7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
dkato 0:853f5b7408a7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
dkato 0:853f5b7408a7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
dkato 0:853f5b7408a7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
dkato 0:853f5b7408a7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
dkato 0:853f5b7408a7 16 * Renesas reserves the right, without notice, to make changes to this software
dkato 0:853f5b7408a7 17 * and to discontinue the availability of this software. By using this software,
dkato 0:853f5b7408a7 18 * you agree to the additional terms and conditions found by accessing the
dkato 0:853f5b7408a7 19 * following link:
dkato 0:853f5b7408a7 20 * http://www.renesas.com/disclaimer
dkato 0:853f5b7408a7 21 * Copyright (C) 2012 - 2015 Renesas Electronics Corporation. All rights reserved.
dkato 0:853f5b7408a7 22 *******************************************************************************/
dkato 0:853f5b7408a7 23 #include <string.h>
dkato 0:853f5b7408a7 24 #include "DisplayBace.h"
dkato 0:853f5b7408a7 25 #include "gr_peach_vdc5.h"
dkato 0:853f5b7408a7 26
dkato 0:853f5b7408a7 27 /**************************************************************************//**
dkato 0:853f5b7408a7 28 * @brief Constructor of the DisplayBase class
dkato 0:853f5b7408a7 29 * @param[in] None
dkato 0:853f5b7408a7 30 * @retval None
dkato 0:853f5b7408a7 31 ******************************************************************************/
dkato 0:853f5b7408a7 32 DisplayBase::DisplayBase( void )
dkato 0:853f5b7408a7 33 {
dkato 0:853f5b7408a7 34 /* Lcd setting (default) */
dkato 0:853f5b7408a7 35 _lcd_config.lcd_type = LCD_TYPE_PARALLEL_RGB; /* LVDS or Pararel RGB */
dkato 0:853f5b7408a7 36 _lcd_config.intputClock = 66.67f; /* P1 clk [MHz] ex. 66.67 */
dkato 0:853f5b7408a7 37 _lcd_config.outputClock = 40.00f; /* LCD clk [MHz] ex. 33.33 */
dkato 0:853f5b7408a7 38
dkato 0:853f5b7408a7 39 _lcd_config.lcd_outformat = LCD_OUTFORMAT_RGB888; /* Output format select */
dkato 0:853f5b7408a7 40 _lcd_config.lcd_edge = EDGE_FALLING; /* Output phase control of LCD_DATA23 to LCD_DATA0 pin */
dkato 0:853f5b7408a7 41
dkato 0:853f5b7408a7 42 _lcd_config.h_toatal_period = (800u + 40u + 128u+ 88u); /* Free-running Hsync period */
dkato 0:853f5b7408a7 43 _lcd_config.v_toatal_period = (600u + 1u + 4u + 23u); /* Free-running Vsync period */
dkato 0:853f5b7408a7 44 _lcd_config.h_disp_widht = 800u; /* LCD display area size, horizontal width */
dkato 0:853f5b7408a7 45 _lcd_config.v_disp_widht = 600u; /* LCD display area size, vertical width */
dkato 0:853f5b7408a7 46 _lcd_config.h_back_porch = (128u+ 88u); /* LCD display horizontal back porch period */
dkato 0:853f5b7408a7 47 _lcd_config.v_back_porch = (4u + 23u); /* LCD display vertical back porch period */
dkato 0:853f5b7408a7 48
dkato 0:853f5b7408a7 49 _lcd_config.h_sync_port = LCD_TCON_PIN_0; /* TCONn or Not use(-1) */
dkato 0:853f5b7408a7 50 _lcd_config.h_sync_port_polarity = SIG_POL_NOT_INVERTED; /* Polarity inversion control of signal */
dkato 0:853f5b7408a7 51 _lcd_config.h_sync_width = 128u; /* Hsync width */
dkato 0:853f5b7408a7 52
dkato 0:853f5b7408a7 53 _lcd_config.v_sync_port = LCD_TCON_PIN_1; /* TCONn or Not use(-1) */
dkato 0:853f5b7408a7 54 _lcd_config.v_sync_port_polarity = SIG_POL_NOT_INVERTED; /* Polarity inversion control of signal */
dkato 0:853f5b7408a7 55 _lcd_config.v_sync_width = 4u; /* Vsync width */
dkato 0:853f5b7408a7 56
dkato 0:853f5b7408a7 57 _lcd_config.de_port = LCD_TCON_PIN_NON; /* TCONn or Not use(-1) */
dkato 0:853f5b7408a7 58 _lcd_config.de_port_polarity = SIG_POL_NOT_INVERTED; /* Polarity inversion control of signal */
dkato 0:853f5b7408a7 59
dkato 0:853f5b7408a7 60 /* Digital video input setting (default) */
dkato 0:853f5b7408a7 61 _video_input_sel = INPUT_SEL_VDEC; /* Video decoder output signals */
dkato 0:853f5b7408a7 62 _video_ext_in_config.inp_format = VIDEO_EXTIN_FORMAT_BT601;
dkato 0:853f5b7408a7 63 _video_ext_in_config.inp_pxd_edge = EDGE_RISING; /* Clock edge select for capturing data */
dkato 0:853f5b7408a7 64 _video_ext_in_config.inp_vs_edge = EDGE_RISING; /* Clock edge select for capturing Vsync signals */
dkato 0:853f5b7408a7 65 _video_ext_in_config.inp_hs_edge = EDGE_RISING; /* Clock edge select for capturing Hsync signals */
dkato 0:853f5b7408a7 66 _video_ext_in_config.inp_endian_on = OFF; /* External input bit endian change on/off */
dkato 0:853f5b7408a7 67 _video_ext_in_config.inp_swap_on = OFF; /* External input B/R signal swap on/off */
dkato 0:853f5b7408a7 68 _video_ext_in_config.inp_vs_inv = SIG_POL_NOT_INVERTED; /* External input DV_VSYNC inversion control */
dkato 0:853f5b7408a7 69 _video_ext_in_config.inp_hs_inv = SIG_POL_INVERTED; /* External input DV_HSYNC inversion control */
dkato 0:853f5b7408a7 70 _video_ext_in_config.inp_f525_625 = EXTIN_LINE_525; /* Number of lines for BT.656 external input */
dkato 0:853f5b7408a7 71 _video_ext_in_config.inp_h_pos = EXTIN_H_POS_CRYCBY; /* Y/Cb/Y/Cr data string start timing to Hsync reference */
dkato 0:853f5b7408a7 72 _video_ext_in_config.cap_vs_pos = 6u; /* Capture start position from Vsync */
dkato 0:853f5b7408a7 73 _video_ext_in_config.cap_hs_pos = 302u; /* Capture start position form Hsync */
dkato 0:853f5b7408a7 74 _video_ext_in_config.cap_width = 640u; /* Capture width */
dkato 0:853f5b7408a7 75 _video_ext_in_config.cap_height = 468u; /* Capture height should be a multiple of 4 */
dkato 0:853f5b7408a7 76 } /* End of constructor method () */
dkato 0:853f5b7408a7 77
dkato 0:853f5b7408a7 78 /**************************************************************************//**
dkato 0:853f5b7408a7 79 * @brief Graphics initialization processing
dkato 0:853f5b7408a7 80 * @param[in] lcd_config : LCD configuration
dkato 0:853f5b7408a7 81 * @retval error code
dkato 0:853f5b7408a7 82 ******************************************************************************/
dkato 0:853f5b7408a7 83 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 84 DisplayBase::Graphics_init( lcd_config_t * lcd_config )
dkato 0:853f5b7408a7 85 {
dkato 0:853f5b7408a7 86 if( lcd_config != NULL ) {
dkato 0:853f5b7408a7 87 _lcd_config.lcd_type = lcd_config->lcd_type; /* LVDS or Pararel RGB */
dkato 0:853f5b7408a7 88 _lcd_config.intputClock = lcd_config->intputClock; /* P1 clk [MHz] ex. 66.67 */
dkato 0:853f5b7408a7 89 _lcd_config.outputClock = lcd_config->outputClock; /* LCD clk [MHz] ex. 33.33 */
dkato 0:853f5b7408a7 90
dkato 0:853f5b7408a7 91 _lcd_config.lcd_outformat = lcd_config->lcd_outformat; /* Output format select */
dkato 0:853f5b7408a7 92 _lcd_config.lcd_edge = lcd_config->lcd_edge; /* Output phase control of LCD_DATA23 to LCD_DATA0 pin */
dkato 0:853f5b7408a7 93
dkato 0:853f5b7408a7 94 _lcd_config.h_toatal_period = lcd_config->h_toatal_period; /* Free-running Hsync period */
dkato 0:853f5b7408a7 95 _lcd_config.v_toatal_period = lcd_config->v_toatal_period; /* Free-running Vsync period */
dkato 0:853f5b7408a7 96 _lcd_config.h_disp_widht = lcd_config->h_disp_widht; /* LCD display area size, horizontal width */
dkato 0:853f5b7408a7 97 _lcd_config.v_disp_widht = lcd_config->v_disp_widht; /* LCD display area size, vertical width */
dkato 0:853f5b7408a7 98 _lcd_config.h_back_porch = lcd_config->h_back_porch; /* LCD display horizontal back porch period */
dkato 0:853f5b7408a7 99 _lcd_config.v_back_porch = lcd_config->v_back_porch; /* LCD display vertical back porch period */
dkato 0:853f5b7408a7 100
dkato 0:853f5b7408a7 101 _lcd_config.h_sync_port = lcd_config->h_sync_port; /* TCONn or Not use(-1) */
dkato 0:853f5b7408a7 102 _lcd_config.h_sync_port_polarity = lcd_config->h_sync_port_polarity;/* Polarity inversion control of signal */
dkato 0:853f5b7408a7 103 _lcd_config.h_sync_width = lcd_config->h_sync_width; /* Hsync width */
dkato 0:853f5b7408a7 104
dkato 0:853f5b7408a7 105 _lcd_config.v_sync_port = lcd_config->v_sync_port; /* TCONn or Not use(-1) */
dkato 0:853f5b7408a7 106 _lcd_config.v_sync_port_polarity = lcd_config->v_sync_port_polarity;/* Polarity inversion control of signal */
dkato 0:853f5b7408a7 107 _lcd_config.v_sync_width = lcd_config->v_sync_width; /* Vsync width */
dkato 0:853f5b7408a7 108
dkato 0:853f5b7408a7 109 _lcd_config.de_port = lcd_config->de_port; /* TCONn or Not use(-1) */
dkato 0:853f5b7408a7 110 _lcd_config.de_port_polarity = lcd_config->de_port_polarity; /* Polarity inversion control of signal */
dkato 0:853f5b7408a7 111 }
dkato 0:853f5b7408a7 112
dkato 0:853f5b7408a7 113 return (graphics_error_t)DRV_Graphics_Init( (drv_lcd_config_t *)&_lcd_config );
dkato 0:853f5b7408a7 114 } /* End of method Graphics_init() */
dkato 0:853f5b7408a7 115
dkato 0:853f5b7408a7 116 /**************************************************************************//**
dkato 0:853f5b7408a7 117 * @brief Graphics Video initialization processing
dkato 0:853f5b7408a7 118 * @param[in] video_input_sel : Input select
dkato 0:853f5b7408a7 119 * @param[in] video_ext_in_config : Digtal video input configuration
dkato 0:853f5b7408a7 120 * @retval error code
dkato 0:853f5b7408a7 121 ******************************************************************************/
dkato 0:853f5b7408a7 122 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 123 DisplayBase::Graphics_Video_init( video_input_sel_t video_input_sel, video_ext_in_config_t * video_ext_in_config )
dkato 0:853f5b7408a7 124 {
dkato 0:853f5b7408a7 125 graphics_error_t error = GRAPHICS_OK;
dkato 0:853f5b7408a7 126
dkato 0:853f5b7408a7 127 if( _video_input_sel == INPUT_SEL_VDEC || _video_input_sel == INPUT_SEL_EXT ) {
dkato 0:853f5b7408a7 128 _video_input_sel = video_input_sel;
dkato 0:853f5b7408a7 129 } else {
dkato 0:853f5b7408a7 130 error = GRAPHICS_PARAM_RANGE_ERR;
dkato 0:853f5b7408a7 131 }
dkato 0:853f5b7408a7 132
dkato 0:853f5b7408a7 133 if( error == GRAPHICS_OK ) {
dkato 0:853f5b7408a7 134 if( video_ext_in_config != NULL ) {
dkato 0:853f5b7408a7 135 /* Signals supplied via the external input pins */
dkato 0:853f5b7408a7 136 /* if using Video decoder output signals, not using value. */
dkato 0:853f5b7408a7 137 _video_ext_in_config.inp_format = video_ext_in_config->inp_format;
dkato 0:853f5b7408a7 138 _video_ext_in_config.inp_pxd_edge = video_ext_in_config->inp_pxd_edge;
dkato 0:853f5b7408a7 139 _video_ext_in_config.inp_vs_edge = video_ext_in_config->inp_vs_edge;
dkato 0:853f5b7408a7 140 _video_ext_in_config.inp_hs_edge = video_ext_in_config->inp_hs_edge;
dkato 0:853f5b7408a7 141 _video_ext_in_config.inp_endian_on = video_ext_in_config->inp_endian_on;
dkato 0:853f5b7408a7 142 _video_ext_in_config.inp_swap_on = video_ext_in_config->inp_swap_on;
dkato 0:853f5b7408a7 143 _video_ext_in_config.inp_vs_inv = video_ext_in_config->inp_vs_inv;
dkato 0:853f5b7408a7 144 _video_ext_in_config.inp_hs_inv = video_ext_in_config->inp_hs_inv;
dkato 0:853f5b7408a7 145 _video_ext_in_config.inp_f525_625 = video_ext_in_config->inp_f525_625;
dkato 0:853f5b7408a7 146 _video_ext_in_config.inp_h_pos = video_ext_in_config->inp_h_pos;
dkato 0:853f5b7408a7 147 _video_ext_in_config.cap_vs_pos = video_ext_in_config->cap_vs_pos;
dkato 0:853f5b7408a7 148 _video_ext_in_config.cap_hs_pos = video_ext_in_config->cap_hs_pos;
dkato 0:853f5b7408a7 149 _video_ext_in_config.cap_width = video_ext_in_config->cap_width;
dkato 0:853f5b7408a7 150 _video_ext_in_config.cap_height = video_ext_in_config->cap_height;
dkato 0:853f5b7408a7 151 }
dkato 0:853f5b7408a7 152 }
dkato 0:853f5b7408a7 153 return (graphics_error_t)DRV_Graphics_Video_init( (drv_video_input_sel_t)video_input_sel,
dkato 0:853f5b7408a7 154 (drv_video_ext_in_config_t *)&_video_ext_in_config );
dkato 0:853f5b7408a7 155 } /* End of method Graphics_Video_init() */
dkato 0:853f5b7408a7 156
dkato 0:853f5b7408a7 157 /**************************************************************************//**
dkato 0:853f5b7408a7 158 * @brief LCD I/O initialization processing
dkato 0:853f5b7408a7 159 * @param[in] pin : Pointer of the pin assignment
dkato 0:853f5b7408a7 160 * @param[in] pin_count : Total number of the pin assignment
dkato 0:853f5b7408a7 161 * @retval error code
dkato 0:853f5b7408a7 162 ******************************************************************************/
dkato 0:853f5b7408a7 163 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 164 DisplayBase::Graphics_Lcd_Port_Init( PinName *pin, unsigned int pin_count )
dkato 0:853f5b7408a7 165 {
dkato 0:853f5b7408a7 166 return (graphics_error_t)DRV_Graphics_Lcd_Port_Init( pin, pin_count );
dkato 0:853f5b7408a7 167 } /* End of method Graphics_Lcd_Port_Init() */
dkato 0:853f5b7408a7 168
dkato 0:853f5b7408a7 169 /**************************************************************************//**
dkato 0:853f5b7408a7 170 * @brief LVDS I/O port initialization processing
dkato 0:853f5b7408a7 171 * @param[in] pin : Pointer of the pin assignment
dkato 0:853f5b7408a7 172 * @param[in] pin_count : Total number of the pin assignment
dkato 0:853f5b7408a7 173 * @retval error code
dkato 0:853f5b7408a7 174 ******************************************************************************/
dkato 0:853f5b7408a7 175 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 176 DisplayBase::Graphics_Lvds_Port_Init( PinName *pin, unsigned int pin_count )
dkato 0:853f5b7408a7 177 {
dkato 0:853f5b7408a7 178 return (graphics_error_t)DRV_Graphics_Lvds_Port_Init( pin, pin_count );
dkato 0:853f5b7408a7 179 } /* End of method Graphics_Lvds_Port_Init() */
dkato 0:853f5b7408a7 180
dkato 0:853f5b7408a7 181 /**************************************************************************//**
dkato 0:853f5b7408a7 182 * @brief Digital video input I/O port initialization processing
dkato 0:853f5b7408a7 183 * @param[in] pin : Pointer of the pin assignment
dkato 0:853f5b7408a7 184 * @param[in] pin_count : Total number of the pin assignment
dkato 0:853f5b7408a7 185 * @retval error code
dkato 0:853f5b7408a7 186 ******************************************************************************/
dkato 0:853f5b7408a7 187 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 188 DisplayBase::Graphics_Dvinput_Port_Init( PinName *pin, unsigned int pin_count )
dkato 0:853f5b7408a7 189 {
dkato 0:853f5b7408a7 190 return (graphics_error_t)DRV_Graphics_Dvinput_Port_Init( pin, pin_count );
dkato 0:853f5b7408a7 191 } /* End of method Graphics_Dvinput_Port_Init() */
dkato 0:853f5b7408a7 192
dkato 0:853f5b7408a7 193 /**************************************************************************//**
dkato 0:853f5b7408a7 194 * @brief IRQ interrupt handler setting
dkato 0:853f5b7408a7 195 * @param[in] irq : VDC5 interrupt type
dkato 0:853f5b7408a7 196 * @param[in] num : Interrupt line number
dkato 0:853f5b7408a7 197 * @param[in] * callback : Interrupt callback function pointer
dkato 0:853f5b7408a7 198 * @retval error code
dkato 0:853f5b7408a7 199 ******************************************************************************/
dkato 0:853f5b7408a7 200 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 201 DisplayBase::Graphics_Irq_Handler_Set( int_type_t irq, unsigned short num, void (* callback)(int_type_t) )
dkato 0:853f5b7408a7 202 {
dkato 0:853f5b7408a7 203 return (graphics_error_t)DRV_Graphics_Irq_Handler_Set( (vdc5_int_type_t)irq, num, (void (*)(vdc5_int_type_t))callback );
dkato 0:853f5b7408a7 204 } /* End of method Graphics_Irq_Handler_Set() */
dkato 0:853f5b7408a7 205
dkato 0:853f5b7408a7 206 /**************************************************************************//**
dkato 0:853f5b7408a7 207 * @brief Graphics surface read start processing
dkato 0:853f5b7408a7 208 * @param[in] layer_id : Graphics layer ID
dkato 0:853f5b7408a7 209 * @retval error code
dkato 0:853f5b7408a7 210 ******************************************************************************/
dkato 0:853f5b7408a7 211 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 212 DisplayBase::Graphics_Start( graphics_layer_t layer_id )
dkato 0:853f5b7408a7 213 {
dkato 0:853f5b7408a7 214 return (graphics_error_t)DRV_Graphics_Start( (drv_graphics_layer_t)layer_id );
dkato 0:853f5b7408a7 215 } /* End of method Graphics_Start() */
dkato 0:853f5b7408a7 216
dkato 0:853f5b7408a7 217 /**************************************************************************//**
dkato 0:853f5b7408a7 218 * @brief Graphics surface read stop processing
dkato 0:853f5b7408a7 219 * @param[in] layer_id : Graphics layer ID
dkato 0:853f5b7408a7 220 * @retval error code
dkato 0:853f5b7408a7 221 ******************************************************************************/
dkato 0:853f5b7408a7 222 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 223 DisplayBase::Graphics_Stop( graphics_layer_t layer_id )
dkato 0:853f5b7408a7 224 {
dkato 0:853f5b7408a7 225 return (graphics_error_t)DRV_Graphics_Stop( (drv_graphics_layer_t)layer_id );
dkato 0:853f5b7408a7 226 } /* End of method Graphics_Stop() */
dkato 0:853f5b7408a7 227
dkato 0:853f5b7408a7 228 /**************************************************************************//**
dkato 0:853f5b7408a7 229 * @brief Video surface write start processing
dkato 0:853f5b7408a7 230 * @param[in] video_input_channel : Video input channel
dkato 0:853f5b7408a7 231 * @retval error code
dkato 0:853f5b7408a7 232 ******************************************************************************/
dkato 0:853f5b7408a7 233 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 234 DisplayBase::Video_Start( video_input_channel_t video_input_channel )
dkato 0:853f5b7408a7 235 {
dkato 0:853f5b7408a7 236 graphics_error_t error = GRAPHICS_OK;
dkato 0:853f5b7408a7 237
dkato 0:853f5b7408a7 238 /* Digital video inputs : supporting video_input_channel 0 only. */
dkato 0:853f5b7408a7 239 if( _video_input_sel == INPUT_SEL_EXT && video_input_channel == VIDEO_INPUT_CHANNEL_1 ) {
dkato 0:853f5b7408a7 240 error = GRAPHICS_PARAM_RANGE_ERR;
dkato 0:853f5b7408a7 241 }
dkato 0:853f5b7408a7 242
dkato 0:853f5b7408a7 243 if( error == GRAPHICS_OK ) {
dkato 0:853f5b7408a7 244 error = (graphics_error_t)DRV_Video_Start( (drv_video_input_channel_t)video_input_channel );
dkato 0:853f5b7408a7 245 }
dkato 0:853f5b7408a7 246 return error;
dkato 0:853f5b7408a7 247 } /* End of method Video_Start() */
dkato 0:853f5b7408a7 248
dkato 0:853f5b7408a7 249 /**************************************************************************//**
dkato 0:853f5b7408a7 250 * @brief Video surface write stop processing
dkato 0:853f5b7408a7 251 * @param[in] video_input_channel : Video input channel
dkato 0:853f5b7408a7 252 * @retval error code
dkato 0:853f5b7408a7 253 ******************************************************************************/
dkato 0:853f5b7408a7 254 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 255 DisplayBase::Video_Stop( video_input_channel_t video_input_channel )
dkato 0:853f5b7408a7 256 {
dkato 0:853f5b7408a7 257 graphics_error_t error = GRAPHICS_OK;
dkato 0:853f5b7408a7 258
dkato 0:853f5b7408a7 259 /* Digital video inputs : supporting video_input_channel 0 only. */
dkato 0:853f5b7408a7 260 if( _video_input_sel == INPUT_SEL_EXT && video_input_channel == VIDEO_INPUT_CHANNEL_1 ) {
dkato 0:853f5b7408a7 261 error = GRAPHICS_PARAM_RANGE_ERR;
dkato 0:853f5b7408a7 262 }
dkato 0:853f5b7408a7 263
dkato 0:853f5b7408a7 264 if( error == GRAPHICS_OK ) {
dkato 0:853f5b7408a7 265 error = (graphics_error_t)DRV_Video_Stop(
dkato 0:853f5b7408a7 266 (drv_video_input_channel_t)video_input_channel );
dkato 0:853f5b7408a7 267 }
dkato 0:853f5b7408a7 268 return error;
dkato 0:853f5b7408a7 269 } /* End of method Video_Stop() */
dkato 0:853f5b7408a7 270
dkato 0:853f5b7408a7 271 /**************************************************************************//**
dkato 0:853f5b7408a7 272 * @brief Graphics surface read process setting
dkato 0:853f5b7408a7 273 *
dkato 0:853f5b7408a7 274 * Description:<br>
dkato 0:853f5b7408a7 275 * This function supports the following 4 image format.
dkato 0:853f5b7408a7 276 * YCbCr422, RGB565, RGB888, ARGB8888
dkato 0:853f5b7408a7 277 * @param[in] layer_id : Graphics layer ID
dkato 0:853f5b7408a7 278 * @param[in] framebuff : Base address of the frame buffer
dkato 0:853f5b7408a7 279 * @param[in] fb_stride : Line offset address of the frame buffer
dkato 0:853f5b7408a7 280 * @param[in] gr_format : Format of the frame buffer read signal
dkato 0:853f5b7408a7 281 * @param[in] wr_rd_swa : frame buffer swap setting
dkato 0:853f5b7408a7 282 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8
dkato 0:853f5b7408a7 283 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7
dkato 0:853f5b7408a7 284 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6
dkato 0:853f5b7408a7 285 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5
dkato 0:853f5b7408a7 286 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4
dkato 0:853f5b7408a7 287 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3
dkato 0:853f5b7408a7 288 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2
dkato 0:853f5b7408a7 289 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1
dkato 0:853f5b7408a7 290 * @param[in] gr_rect : Graphics display area
dkato 0:853f5b7408a7 291 * @retval Error code
dkato 0:853f5b7408a7 292 ******************************************************************************/
dkato 0:853f5b7408a7 293 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 294 DisplayBase::Graphics_Read_Setting(
dkato 0:853f5b7408a7 295 graphics_layer_t layer_id,
dkato 0:853f5b7408a7 296 void * framebuff,
dkato 0:853f5b7408a7 297 unsigned int fb_stride,
dkato 0:853f5b7408a7 298 graphics_format_t gr_format,
dkato 0:853f5b7408a7 299 wr_rd_swa_t wr_rd_swa,
dkato 0:853f5b7408a7 300 rect_t * gr_rect )
dkato 0:853f5b7408a7 301 {
dkato 0:853f5b7408a7 302 rect_t rect;
dkato 0:853f5b7408a7 303
dkato 0:853f5b7408a7 304 rect.hs = gr_rect->hs + _lcd_config.h_back_porch;
dkato 0:853f5b7408a7 305 rect.vs = gr_rect->vs + _lcd_config.v_back_porch;
dkato 0:853f5b7408a7 306 rect.hw = gr_rect->hw;
dkato 0:853f5b7408a7 307 rect.vw = gr_rect->vw;
dkato 0:853f5b7408a7 308
dkato 0:853f5b7408a7 309 return (graphics_error_t)DRV_Graphics_Read_Setting(
dkato 0:853f5b7408a7 310 (drv_graphics_layer_t)layer_id,
dkato 0:853f5b7408a7 311 framebuff,
dkato 0:853f5b7408a7 312 fb_stride,
dkato 0:853f5b7408a7 313 (drv_graphics_format_t)gr_format,
dkato 0:853f5b7408a7 314 (drv_wr_rd_swa_t)wr_rd_swa,
dkato 0:853f5b7408a7 315 (drv_rect_t *)&rect );
dkato 0:853f5b7408a7 316 } /* End of method Graphics_Read_Setting() */
dkato 0:853f5b7408a7 317
dkato 0:853f5b7408a7 318 /**************************************************************************//**
dkato 0:853f5b7408a7 319 * @brief Graphics surface read process changing
dkato 0:853f5b7408a7 320 *
dkato 0:853f5b7408a7 321 * Description:<br>
dkato 0:853f5b7408a7 322 * This function is used to swap buffers.
dkato 0:853f5b7408a7 323 *
dkato 0:853f5b7408a7 324 * @param[in] layer_id : Graphics layer ID
dkato 0:853f5b7408a7 325 * @param[in] framebuff : Base address of the frame buffer
dkato 0:853f5b7408a7 326 * @retval Error code
dkato 0:853f5b7408a7 327 ******************************************************************************/
dkato 0:853f5b7408a7 328 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 329 DisplayBase::Graphics_Read_Change ( graphics_layer_t layer_id, void * framebuff)
dkato 0:853f5b7408a7 330 {
dkato 0:853f5b7408a7 331 return (graphics_error_t)DRV_Graphics_Read_Change(
dkato 0:853f5b7408a7 332 (drv_graphics_layer_t)layer_id, framebuff );
dkato 0:853f5b7408a7 333 } /* End of method Graphics_Read_Change() */
dkato 0:853f5b7408a7 334
dkato 0:853f5b7408a7 335 /**************************************************************************//**
dkato 0:853f5b7408a7 336 * @brief Video surface write process setting
dkato 0:853f5b7408a7 337 * This function set the video write process. Input form is weave
dkato 0:853f5b7408a7 338 * (progressive) mode fixed.
dkato 0:853f5b7408a7 339 * This function supports the following 3 image format.
dkato 0:853f5b7408a7 340 * YCbCr422, RGB565, RGB888
dkato 0:853f5b7408a7 341 * @param[in] video_input_ch : Video input channel
dkato 0:853f5b7408a7 342 * @param[in] col_sys : Analog video signal color system
dkato 0:853f5b7408a7 343 * @param[in] adc_vinsel : Video input pin
dkato 0:853f5b7408a7 344 * @param[in] framebuff : Base address of the frame buffer
dkato 0:853f5b7408a7 345 * @param[in] fb_stride [byte] : Line offset address of the frame buffer
dkato 0:853f5b7408a7 346 * @param[in] video_format : Frame buffer video-signal writing format
dkato 0:853f5b7408a7 347 * - VIDEO_FORMAT_YCBCR422 : YCBCR422 (2byte/px)
dkato 0:853f5b7408a7 348 * - VIDEO_FORMAT_RGB565 : RGB565 (2byte/px)
dkato 0:853f5b7408a7 349 * - VIDEO_FORMAT_RGB888 : RGB888 (4byte/px)
dkato 0:853f5b7408a7 350 * @param[in] wr_rd_swa : frame buffer swap setting
dkato 0:853f5b7408a7 351 * - WR_RD_WRSWA_NON : Not swapped: 1-2-3-4-5-6-7-8
dkato 0:853f5b7408a7 352 * - WR_RD_WRSWA_8BIT : Swapped in 8-bit units: 2-1-4-3-6-5-8-7
dkato 0:853f5b7408a7 353 * - WR_RD_WRSWA_16BIT : Swapped in 16-bit units: 3-4-1-2-7-8-5-6
dkato 0:853f5b7408a7 354 * - WR_RD_WRSWA_16_8BIT : Swapped in 16-bit units + 8-bit units: 4-3-2-1-8-7-6-5
dkato 0:853f5b7408a7 355 * - WR_RD_WRSWA_32BIT : Swapped in 32-bit units: 5-6-7-8-1-2-3-4
dkato 0:853f5b7408a7 356 * - WR_RD_WRSWA_32_8BIT : Swapped in 32-bit units + 8-bit units: 6-5-8-7-2-1-4-3
dkato 0:853f5b7408a7 357 * - WR_RD_WRSWA_32_16BIT : Swapped in 32-bit units + 16-bit units: 7-8-5-6-3-4-1-2
dkato 0:853f5b7408a7 358 * - WR_RD_WRSWA_32_16_8BIT : Swapped in 32-bit units + 16-bit units + 8-bit units: 8-7-6-5-4-3-2-1
dkato 0:853f5b7408a7 359 * @param[in] video_write_size_vw [px]: output v width
dkato 0:853f5b7408a7 360 * @param[in] video_write_size_hw [px]: output h width
dkato 0:853f5b7408a7 361 * @retval Error code
dkato 0:853f5b7408a7 362 ******************************************************************************/
dkato 0:853f5b7408a7 363 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 364 DisplayBase::Video_Write_Setting(
dkato 0:853f5b7408a7 365 video_input_channel_t video_input_channel,
dkato 0:853f5b7408a7 366 graphics_video_col_sys_t col_sys,
dkato 0:853f5b7408a7 367 void * framebuff,
dkato 0:853f5b7408a7 368 unsigned int fb_stride,
dkato 0:853f5b7408a7 369 video_format_t video_format,
dkato 0:853f5b7408a7 370 wr_rd_swa_t wr_rd_swa,
dkato 0:853f5b7408a7 371 unsigned short write_buff_vw,
dkato 0:853f5b7408a7 372 unsigned short write_buff_hw )
dkato 0:853f5b7408a7 373 {
dkato 0:853f5b7408a7 374 graphics_error_t error = GRAPHICS_OK;
dkato 0:853f5b7408a7 375
dkato 0:853f5b7408a7 376 if( _video_input_sel == INPUT_SEL_VDEC ) {
dkato 0:853f5b7408a7 377 if( col_sys == COL_SYS_NTSC_358 || col_sys == COL_SYS_NTSC_443 || col_sys == COL_SYS_NTSC_443_60 ) {
dkato 0:853f5b7408a7 378 if( (write_buff_vw / 2u) > 240u ) {
dkato 0:853f5b7408a7 379 error = GRAPHICS_VIDEO_NTSC_SIZE_ERR;
dkato 0:853f5b7408a7 380 }
dkato 0:853f5b7408a7 381 } else {
dkato 0:853f5b7408a7 382 if( (write_buff_vw / 2u) > 280u ) {
dkato 0:853f5b7408a7 383 error = GRAPHICS_VIDEO_PAL_SIZE_ERR;
dkato 0:853f5b7408a7 384 }
dkato 0:853f5b7408a7 385 }
dkato 0:853f5b7408a7 386
dkato 0:853f5b7408a7 387 if( write_buff_hw > 800u ) {
dkato 0:853f5b7408a7 388 error = GRAPHICS_PARAM_RANGE_ERR;
dkato 0:853f5b7408a7 389 }
dkato 0:853f5b7408a7 390 if( error == GRAPHICS_OK ) {
dkato 0:853f5b7408a7 391 error = (graphics_error_t)DRV_Video_Write_Setting(
dkato 0:853f5b7408a7 392 (drv_video_input_channel_t)video_input_channel,
dkato 0:853f5b7408a7 393 (drv_graphics_video_col_sys_t)col_sys,
dkato 0:853f5b7408a7 394 framebuff,
dkato 0:853f5b7408a7 395 fb_stride,
dkato 0:853f5b7408a7 396 (drv_video_format_t)video_format,
dkato 0:853f5b7408a7 397 (drv_wr_rd_swa_t)wr_rd_swa,
dkato 0:853f5b7408a7 398 write_buff_vw,
dkato 0:853f5b7408a7 399 write_buff_hw);
dkato 0:853f5b7408a7 400 }
dkato 0:853f5b7408a7 401 } else if( _video_input_sel == INPUT_SEL_EXT ) {
dkato 0:853f5b7408a7 402 rect_t cap_area;
dkato 0:853f5b7408a7 403
dkato 0:853f5b7408a7 404 cap_area.hs = _video_ext_in_config.cap_hs_pos * 2;
dkato 0:853f5b7408a7 405 cap_area.hw = _video_ext_in_config.cap_width * 2;
dkato 0:853f5b7408a7 406 cap_area.vs = _video_ext_in_config.cap_vs_pos;
dkato 0:853f5b7408a7 407 cap_area.vw = _video_ext_in_config.cap_height;
dkato 0:853f5b7408a7 408
dkato 0:853f5b7408a7 409 error = (graphics_error_t) DRV_Video_Write_Setting_Digital(
dkato 0:853f5b7408a7 410 framebuff,
dkato 0:853f5b7408a7 411 fb_stride,
dkato 0:853f5b7408a7 412 (drv_video_format_t)video_format,
dkato 0:853f5b7408a7 413 (drv_wr_rd_swa_t)wr_rd_swa,
dkato 0:853f5b7408a7 414 write_buff_vw,
dkato 0:853f5b7408a7 415 write_buff_hw,
dkato 0:853f5b7408a7 416 (drv_rect_t *)&cap_area );
dkato 0:853f5b7408a7 417 } else {
dkato 0:853f5b7408a7 418 error = GRAPHICS_PARAM_RANGE_ERR;
dkato 0:853f5b7408a7 419 }
dkato 0:853f5b7408a7 420 return error;
dkato 0:853f5b7408a7 421 } /* End of method Video_Write_Setting() */
dkato 0:853f5b7408a7 422
dkato 0:853f5b7408a7 423 /**************************************************************************//**
dkato 0:853f5b7408a7 424 * @brief Graphics surface write process changing
dkato 0:853f5b7408a7 425 * This function is used to swap buffers of the weave write processing.
dkato 0:853f5b7408a7 426 * @param[in] video_input_ch : Video input channle
dkato 0:853f5b7408a7 427 * @param[in] framebuff : Base address of the frame buffer
dkato 0:853f5b7408a7 428 * @param[in] fb_stride : Line offset address of the frame buffer
dkato 0:853f5b7408a7 429 * @retval Error code
dkato 0:853f5b7408a7 430 ******************************************************************************/
dkato 0:853f5b7408a7 431 DisplayBase::graphics_error_t
dkato 0:853f5b7408a7 432 DisplayBase::Video_Write_Change (
dkato 0:853f5b7408a7 433 video_input_channel_t video_input_channel, void * framebuff, uint32_t fb_stride )
dkato 0:853f5b7408a7 434 {
dkato 0:853f5b7408a7 435 return (graphics_error_t)DRV_Video_Write_Change(
dkato 0:853f5b7408a7 436 (drv_video_input_channel_t)video_input_channel, framebuff, fb_stride );
dkato 0:853f5b7408a7 437 } /* End of method Video_Write_Change() */
dkato 0:853f5b7408a7 438
dkato 0:853f5b7408a7 439 /* End of file */