The Code Repository for the REV0 Steering Wheel.
Dependencies: CANBuffer KS0108_fork mbed-rtos mbed CAN Addresses
Fork of REVO_Updated_Steering by
CAN_Filter_LUT.h
00001 /* 00002 Code by Parth Patel, Penn Electric Racing 2014, 9/23/2014 00003 00004 This library provides an easy to use, buffered, hardware-filtered CAN interface for 00005 high performance CAN applications. Provides automatic reception of messages via CAN RX interrupt 00006 into a rx ring buffer. Provides automatic transmission of messages via CAN TX interrupt. 00007 00008 @File CAN_Filter_LUT.h: Contains the formatted lookup tables to program the onboard CAN acceptance filters 00009 00010 */ 00011 #ifndef _FILE_CAN_FILTER_LUT_H 00012 #define _FILE_CAN_FILTER_LUT_H 00013 00014 #include "PCM_CAN_IDs.h" 00015 #include "AMS_CAN_IDs.h" 00016 #include "SYS_MGMT_CAN_IDs.h" 00017 00018 #define STDMASK 0x7FF 00019 #define EXTMASK 0x1FFFFFFF 00020 00021 // These arrays defines the CAN Controller Acceptance Filter Lookup Table. 00022 // Follow notes below or else the chip's behaviour will be undefined 00023 // MAX SIZE PERMITTED = 512 32bit ints total across all tables 00024 // Note that AF_LUT_SEI is 16bit, divide #entries by 2 for this one 00025 // Note that AF_LUT_EIR is 64bit, multipy #entries by 2 for this one 00026 00027 const uint16_t AF_LUT_SEI[] = { 00028 // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00) !! 00029 00030 // STANDARD EXPLICIT IDs - CAN CONTROLLER 1 00031 //( 0xID & STDMASK), 00032 00033 ( PCM_RPM_ID & STDMASK), // 0x211 00034 00035 ( PCM_MOTEMP_ID & STDMASK), // 0x212 00036 00037 ( PCM_AIRTEMP_ID & STDMASK), // 0x213 00038 00039 ( PCM_IGBTTEMP_ID & STDMASK), // 0x214 00040 00041 ( PCM_PEDALS_ID & STDMASK), // 0x220 00042 00043 ( PCM_FRPM_ID & STDMASK), // 0x222 00044 00045 ( PCM_TORQUERQ_ID & STDMASK), // 0x231 00046 00047 ( AMS_FAULTCODE_ID & STDMASK), // 0x300 00048 00049 ( AMS_MODE_ID & STDMASK), // 0x301 00050 00051 ( AMS_CURRENT_ID & STDMASK), // 0x306 00052 00053 ( AMS_CHARGECURR_ID & STDMASK), // 0x307 00054 00055 ( AMS_VOLTAGE_ID & STDMASK), // 0x308 00056 00057 ( AMS_SOC_ID & STDMASK), // 0x30B 00058 00059 ( AMS_BOARDTEMP_ID & STDMASK), // 0x30E 00060 00061 ( AMS_CELLV_MMA_ID_BASE & STDMASK), // 0x316 00062 00063 //( CELLV_MMA_ID_BASE2 & STDMASK), // 0x317 00064 00065 ( AMS_TEMP_MMA_ID_BASE & STDMASK), // 0x318 00066 00067 //( TEMP_MMA_TX_ID_BASE2 & STDMASK), // 0x319 00068 00069 ( SYS_MGMT_GLV_CURRENT_ID & STDMASK), // 0x510 00070 00071 ( SYS_MGMT_GLV_SOC_ID & STDMASK), // 0x513 00072 00073 ( SYS_MGMT_DCDC_STATUS_ID & STDMASK), // 0x521 00074 00075 ( SYS_MGMT_PWM_FAN_ID & STDMASK), // 0x530 00076 00077 ( SYS_MGMT_PWM_PUMP_ID & STDMASK), // 0x531 00078 00079 ( SYS_MGMT_IMD_RESIST_ID & STDMASK), // 0x541 00080 00081 ( SYS_MGMT_SWITCHES_ID & STDMASK) // 0x560 00082 00083 // STANDARD EXPLICIT IDs - CAN CONTROLLER 2 00084 //( 0xID & STDMASK), 00085 00086 }; 00087 00088 const uint32_t AF_LUT_SIR[] = { 00089 // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00), NO OVERLAPPING RANGES !! 00090 00091 // STANDARD ID RANGES - CAN CONTROLLER 1 00092 //( 0xLOWERBOUND & STDMASK) << 16 | ( 0xUPPERBOUND & STDMASK), lower/upperbounds are inclusive 00093 00094 // STANDARD ID RANGES - CAN CONTROLLER 2 00095 //( 0xLOWERBOUND & STDMASK | 1<<13) << 16 | ( 0xUPPERBOUND & STDMASK | 1<<13), lower/upperbounds are inclusive 00096 //( 0x400 & STDMASK | 1<<13) << 16 | ( 0x4FF & STDMASK | 1<<13), // Index1 00097 }; 00098 00099 const uint32_t AF_LUT_EEI[] = { 00100 // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00) !! 00101 00102 // EXTENDED EXPLICIT IDs - CAN CONTROLLER 1 00103 //( 0xID & EXTMASK), 00104 00105 // EXTENDED EXPLICIT IDs - CAN CONTROLLER 2 00106 //( 0xID & EXTMASK) | 1<<29, 00107 }; 00108 00109 const uint64_t AF_LUT_EIR[] = { 00110 // !! ID's MUST BE IN ASCENDING ORDER (starting at 0x00), NO OVERLAPPING RANGES !! 00111 00112 // EXTENDED ID RANGES - CAN CONTROLLER 1 00113 //( 0xLOWERBOUND & EXTMASK) << 32 | ( 0xUPPERBOUND & EXTMASK), lower/upperbounds are inclusive 00114 00115 // EXTENDED ID RANGES - CAN CONTROLLER 2 00116 //( 0xLOWERBOUND & EXTMASK | 1<<29) << 32 | ( 0xUPPERBOUND & EXTMASK | 1<<29), lower/upperbounds are inclusive 00117 00118 }; 00119 00120 #endif
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