init
Dependencies: aconno_I2C Lis2dh12 WatchdogTimer
Revision 4:8d8e9bfa82e4, committed 2018-11-11
- Comitter:
- pathfindr
- Date:
- Sun Nov 11 20:52:22 2018 +0000
- Parent:
- 3:e132590cc6be
- Child:
- 5:8f8951127724
- Commit message:
- udate
Changed in this revision
--- a/main.cpp Thu Nov 08 15:22:58 2018 +0000
+++ b/main.cpp Sun Nov 11 20:52:22 2018 +0000
@@ -2,6 +2,8 @@
#include "board.h"
#include "modes.h"
+#include "nrf_soc.h"
+
//#include "ATCommand.h"
//LowPowerTicker ticker; //no impact on power consumption
@@ -9,23 +11,30 @@
//------------------------------------------------------------------------------
//Function declarations- Local
//------------------------------------------------------------------------------
-static void setup(void);
-static void loop(void);
+static void mainStateEngine(void);
static void mode_mtu(void);
-static int selftest(void);
+static void selftest(void);
static void LEDon(void);
static void LEDoff(void);
//------------------------------------------------------------------------------
//Var declarations- Local
//------------------------------------------------------------------------------
-int mode = 0;
bool accel_healthy = false;
+bool firstBoot = false;
+bool requireSoftReset = false;
//------------------------------------------------------------------------------
-//Var declarations- RETAINED
+//Var declarations- RETAINED NOINIT RAM
//------------------------------------------------------------------------------
-int RET_mode = 0;
+#if defined ( __CC_ARM )
+/** THIS IS THE MBED ONLINE COMPILER TOOLCHAIN*/
+static uint8_t RET_mode __attribute__((section("noinit"),zero_init));
+static uint32_t RET_unixtime __attribute__((section("noinit"),zero_init));
+#elif defined ( __GNUC__ )
+#elif defined ( __ICCARM__ )
+#endif
+
char RET_pf_identifier[9]; //includes null byte at end
int RET_interval_setting = 720;
int RET_interval_hours_failsafe = 24;
@@ -63,22 +72,29 @@
DigitalOut led1(p11);
DigitalOut vreg_en(p29);
DigitalOut gsm_pwkey(p28);
+DigitalOut lis3dh_cs(p22);
//------------------------------------------------------------------------------
//Peripherals
//------------------------------------------------------------------------------
+//BLE myble;
+#if NEED_CONSOLE_OUTPUT
+Serial uart(p6, p8, 115200);
+#endif
+//ATSerial atserial(p6,p8,115200);
+WatchdogTimer watchdog(65.0); //Do not set to less than 4500ms or can cause issues with softdevice
-//LIS3DH accelerometer(p23, p19, p24, p22, LIS3DH_DR_NR_LP_25HZ, LIS3DH_FS_8G);
-//BLE myble;
-
-//Serial uart(p6, p8, 115200);
-//ATSerial atserial(p6,p8,115200);
-void gotosleep(long sleep_milliseconds) {
+void gotoSleep(long sleep_milliseconds) {
//accelerometer.configureForSleep();
- ThisThread::sleep_for(sleep_milliseconds);
- //system_reset();
+
+ if (requireSoftReset) { //dont need to clear this var as reset changes it back to false
+ RET_unixtime = time(NULL); //save unixtime for reset
+ //NVIC_SystemReset();
+ system_reset();
+ }
+ ThisThread::sleep_for(sleep_milliseconds);
}
void LED1on(long flash_milliseconds = 0) {
@@ -92,10 +108,44 @@
led1 = 1;
}
+void resetState() {
+ firstBoot = true;
+ RET_mode = 0;
+ RET_unixtime = 0;
+ set_time(RET_unixtime);
+}
+
int main() {
- setup();
+ led1 = 1;
+
+ //CHECK IF THIS IS RESET
+ //0x00000004 == soft reset //0x00000002 == watchdog //0x00000001 == button/hardreset
+ if (NRF_POWER->RESETREAS != 0xffffffff) {
+ switch(NRF_POWER->RESETREAS) {
+ case 0x00000001 :
+ DEBUG("reset_reason: 0x%08x. - Hard Reset\n",NRF_POWER->RESETREAS);
+ resetState();
+ break;
+ case 0x00000002 :
+ DEBUG("reset_reason: 0x%08x. - Watchdog\n",NRF_POWER->RESETREAS);
+ set_time(RET_unixtime);
+ break;
+ case 0x00000004 :
+ DEBUG("reset_reason: 0x%08x. - Soft reset\n",NRF_POWER->RESETREAS);
+ set_time(RET_unixtime);
+ break;
+ }
+ NRF_POWER->RESETREAS = 0xffffffff;
+ }
+
while(true) {
- loop();
+ //GOTO TO SLEEP
+ if (!firstBoot) gotoSleep(60000);
+ LED1on(50);
+ watchdog.kick();
+
+ //MAIN STATE ENGINE
+ mainStateEngine();
}
}
@@ -109,28 +159,29 @@
LED1on(1000);
}
-void setup() {
- led1 = 1;
- LED1on(50);
+
+void mainStateEngine() {
- set_time(1256729737);
- //accelerometer.configureForSleep();
+ //TEST AREA
+ LIS3DH accelerometer(p23, p19, p24, p22, LIS3DH_DR_NR_LP_25HZ, LIS3DH_FS_8G);
+ requireSoftReset = true;
+ if (accelerometer.selfTest()) {
+ LED1on(100);
+ }
+ accelerometer.configureForSleep();
ThisThread::sleep_for(10000);
- LIS3DH accelerometer(p23, p19, p24, p22, LIS3DH_DR_NR_LP_25HZ, LIS3DH_FS_8G);
- ThisThread::sleep_for(10000);
- system_reset();
-}
-
-void loop() {
- LED1on(50);
+
+
+
+
bool accel_awake;
- mode = MODE_SETUP;
+ RET_mode = MODE_SETUP;
- switch(mode) {
+ switch(RET_mode) {
case MODE_SETUP :
//selftest();
@@ -153,11 +204,9 @@
break;
default :
- mode = MODE_SETUP;
+ RET_mode = MODE_SETUP;
}
-
- gotosleep(10000);
}
@@ -274,4 +323,91 @@
return result;
}
-*/
\ No newline at end of file
+*/
+
+
+/*
+void readRegs(uint8_t addr, uint8_t * data, int len) {
+ lis3dh_cs = 0;
+ for (int i = 0 ; i < len ; i++ ) {
+ spi.write((addr+i)|0x80) ; // specify address to read
+ data[i] = spi.write((addr+i)|0x80) ;
+ }
+ spi.write(0x00) ; // to terminate read mode
+ lis3dh_cs = 1;
+}
+
+uint8_t read_reg(uint8_t addr)
+{
+ uint8_t data[1] ;
+ readRegs(addr, data, 1) ;
+ return( data[0] ) ;
+}
+*/
+
+
+
+
+
+
+
+
+
+
+
+
+/*
+//OPTION 1
+ // Switch on both RAM banks when in System OFF mode.
+ NRF_POWER->RAMON |= (POWER_RAMON_OFFRAM0_RAM0On << POWER_RAMON_OFFRAM0_Pos) |
+ (POWER_RAMON_OFFRAM1_RAM1On << POWER_RAMON_OFFRAM1_Pos);
+
+ // Enter System OFF and wait for wake up from GPIO detect signal.
+ NRF_POWER->SYSTEMOFF = 0x1;
+
+
+ //spi.close();
+
+ //delete spi;
+ //spi_disable();
+
+ //spi_free(spi);
+
+ //nrf_drv_spi_uninit(spi);
+ //nordic_nrf5_spi_initialized[instance] = false;
+ //HFCLKSTOP = 0x1;
+
+ NRF_SPI0->ENABLE = 0;
+ NRF_SPI1->ENABLE = 0;
+ NRF_SPI2->ENABLE = 0;
+ NRF_TWI0->ENABLE = 0;
+ NRF_TWI1->ENABLE = 0;
+
+ sd_clock_hfclk_release();
+ NRF_POWER->SYSTEMOFF=1;
+ //NRF_SPI0->POWER = 0;
+
+ //OPTION 3
+
+ *(volatile uint32_t *)0x40003FFC = 0;
+ *(volatile uint32_t *)0x40003FFC;
+ *(volatile uint32_t *)0x40003FFC = 1;
+
+ NRF_SPI0->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
+ NRF_SPI1->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
+
+
+ if (sleep_manager_can_deep_sleep()) {
+ ThisThread::sleep_for(10000);
+ } else {
+ led1 = 0;
+ wait(50.0);
+ }
+
+ //system_reset();
+*/
+
+
+ //time_t unixtime = time(NULL);
+ //DEBUG("got: %i, %d, %d \n", RET_mode, RET_unixtime, unixtime);
+
\ No newline at end of file
--- a/main.h Thu Nov 08 15:22:58 2018 +0000 +++ b/main.h Sun Nov 11 20:52:22 2018 +0000 @@ -19,6 +19,7 @@ //mbed Libraries //------------------------------------------------------------------------------ #include "mbed.h" +#include "WatchdogTimer.h" #include "ble/BLE.h" //#include "nvstore.h" //#include "ATCmdParser.h"
--- a/mbed_app.json Thu Nov 08 15:22:58 2018 +0000
+++ b/mbed_app.json Sun Nov 11 20:52:22 2018 +0000
@@ -3,6 +3,9 @@
"NDEBUG=1"
],
"target_overrides": {
+ "*": {
+ "platform.stdio-flush-at-exit": false
+ },
"NRF52_DK": {
"target.OUTPUT_EXT": "bin",
"target.uart_hwfc": 0,
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct Sun Nov 11 20:52:22 2018 +0000
@@ -0,0 +1,52 @@
+#! armcc -E
+
+/* Default to no softdevice */
+#if !defined(MBED_APP_START)
+#define MBED_APP_START 0x0
+#endif
+
+#if !defined(MBED_APP_SIZE)
+#define MBED_APP_SIZE 0x80000
+#endif
+
+/* Physical RAM */
+#define MBED_RAM_PHYSICAL_START 0x20000000
+#define MBED_RAM_PHYSICAL_SIZE 0x10000
+
+/* Reserved areas */
+#define MBED_RAM_SOFT_DEVICE_SIZE 0x31d0
+#define MBED_RAM_UNINIT_AREA_SIZE 1024
+
+/* If app_start is 0, do not set aside space for the softdevice */
+#if MBED_APP_START == 0
+#define MBED_RAM_START MBED_RAM_PHYSICAL_START
+#define MBED_RAM_SIZE MBED_RAM_PHYSICAL_SIZE
+#else
+#define MBED_RAM_START (MBED_RAM_PHYSICAL_START + MBED_RAM_SOFT_DEVICE_SIZE)
+#define MBED_RAM_SIZE (MBED_RAM_PHYSICAL_SIZE - MBED_RAM_SOFT_DEVICE_SIZE)
+#endif
+
+#define MBED_RAM0_START MBED_RAM_START
+#define MBED_RAM0_SIZE 0xE0
+#define MBED_RAM1_START (MBED_RAM0_START + MBED_RAM0_SIZE)
+#define MBED_RAM1_SIZE MBED_RAM_UNINIT_AREA_SIZE
+#define MBED_RAM2_START (MBED_RAM1_START + MBED_RAM1_SIZE)
+#define MBED_RAM2_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE - MBED_RAM1_SIZE)
+
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
+ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+*.o (RESET, +First)
+*(InRoot$$Sections)
+.ANY (+RO)
+}
+
+RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section
+*(*nvictable)
+}
+RW_IRAM1 MBED_RAM1_START UNINIT MBED_RAM1_SIZE { ;no init section
+*(*noinit)
+}
+RW_IRAM2 MBED_RAM2_START MBED_RAM2_SIZE {
+.ANY (+RW +ZI)
+}
+}