edge_reset_mgr.cpp

00001 #include "mbed.h"
00002 #include "edge_mgr.h"
00003 #include "edge_reset_mgr.h"
00004 
00005 /**
00006   * System Reset Status Register 0 (RCM_SRS0) 0x4007_F000
00007   *
00008   * bit[7] : POR         Power-On Reset
00009   * bit[6] : PIN         External Reset Pin
00010   * bit[5] : WDOG        Watchdog
00011   * bit[4] : (Reserved)
00012   * bit[3] : LOL         Loss-of-Lock Reset
00013   * bit[2] : LOC         Loss-of-Clock Reset
00014   * bit[1] : LVD         Low-Voltage Detect Reset
00015   * bit[0] : WAKEUP      Low Leakage Wakeup Reset
00016   */
00017 #define REG_RCM_SRS0    (uint8_t *)0x4007F000
00018 #define POR_RESET_BIT   0x80
00019 #define PIN_RESET_BIT   0x40
00020 #define WDG_RESET_BIT   0x20
00021 #define LOL_RESET_BIT   0x08
00022 #define LOC_RESET_BIT   0x04
00023 #define LVD_RESET_BIT   0x02
00024 #define WUP_RESET_BIT   0x01
00025 
00026   /**
00027    * System Reset Status Register 1 (RCM_SRS1) 0x4007_F001
00028    *
00029    * bit[7:6] (Reserved)
00030    * bit[5] : SACKERR     Stop Mode Acknowledge Error Reset
00031    * bit[4] : (Reserved)
00032    * bit[3] : MDM_AP      MDM-AP System Reset Request
00033    * bit[2] : SW          Software Reset
00034    * bit[1] : LOCKUP      Core Lockup
00035    * bit[0] : (Reserved)
00036    */
00037 #define REG_RCM_SRS1     (uint8_t *)0x4007F001
00038 #define SACK_RESET_BIT   0x20
00039 #define MDM_RESET_BIT    0x08
00040 #define SW_RESET_BIT     0x04
00041 #define LOCKUP_RESET_BIT 0x02
00042 
00043 #define IDX_POR_RESET    0
00044 #define IDX_PIN_RESET    1
00045 #define IDX_WDG_RESET    2
00046 #define IDX_LOL_RESET    3
00047 #define IDX_LOC_RESET    4
00048 #define IDX_LVD_RESET    5
00049 #define IDX_WUP_RESET    6
00050 #define IDX_SACK_RESET   7
00051 #define IDX_MDM_RESET    8
00052 #define IDX_SW_RESET     9
00053 #define IDX_LOCKUP_RESET 10 
00054 
00055 const char *reset_reason[] = {
00056     "Power On Reset",
00057     "Reset Pin Asserted",
00058     "Watch Dog Reset",
00059     "Loss of Lock Reset",
00060     "Loss of Clock Reset",
00061     "Low Voltage Detect Reset",
00062     "Low Leakage Wakeup Reset",
00063     "Stop Mode Acknowledge Error Reset",
00064     "MDM-AP System Reset Request",
00065     "Software Reset",
00066     "Core Lockup Reset",
00067     0
00068 } ;
00069 
00070 void print_reset_reason(void) 
00071 {
00072     extern char *reset_reason_str ;
00073     int idx = 0 ;
00074     uint8_t *data = REG_RCM_SRS0 ;
00075     if (*data & POR_RESET_BIT) {
00076         idx = IDX_POR_RESET ;
00077     }
00078     if (*data & PIN_RESET_BIT) {
00079         idx = IDX_PIN_RESET ; 
00080     }
00081     if (*data & WDG_RESET_BIT) {
00082         idx = IDX_WDG_RESET ; 
00083     }
00084     if (*data & LOL_RESET_BIT) {
00085         idx = IDX_LOL_RESET ;
00086     }
00087     if (*data & LVD_RESET_BIT) {
00088         idx = IDX_LVD_RESET ;
00089     }  
00090     if (*data & LOC_RESET_BIT) {
00091         idx = IDX_LOC_RESET ;
00092     }
00093     if (*data & WUP_RESET_BIT) {
00094         idx = IDX_WUP_RESET ;
00095     }
00096     data = REG_RCM_SRS1 ;
00097     if (*data & SACK_RESET_BIT) {
00098         idx = IDX_SACK_RESET ;
00099     }
00100     if (*data & MDM_RESET_BIT) {
00101         idx = IDX_MDM_RESET ;
00102     }
00103     if (*data & SW_RESET_BIT) {
00104         idx = IDX_SW_RESET ;
00105     }
00106     if (*data & LOCKUP_RESET_BIT) {
00107         idx = IDX_LOCKUP_RESET ;
00108     }
00109     tty->printf("%s\n", reset_reason[idx]) ;
00110     reset_reason_str = (char *)reset_reason[idx] ;
00111 }
00112 
00113 /**
00114  * Software Reset
00115  * 
00116  * From Cortex-M0 Devices Generic User Guide
00117  * 4.3.4 Application Interrupt and Reset Control Register
00118  *
00119  * Bit[31:16] : VECTCKEY
00120  * Bit[15]    : ENDIANESS
00121  * Bit[14:3]  : (Reserved)
00122  * Bit[2]     : SYSRESETREQ
00123  * Bit[1]     : VECTCLRACTIVE (reserved for debug use)
00124  * Bit[0]     : (Reserved)
00125  *
00126  * Note: To trigger software reset, both VECTKEY=0x05FA and SYSRESETREQ
00127  * must be written at once, therefore the value will be
00128  * 0x05FA0004
00129  */
00130  
00131 void software_reset(void)
00132 {
00133      SCB->AIRCR = 0x05FA0004 ; 
00134 }
00135 
00136 /**
00137  * reset_watch_dog
00138  * reset the watch dog counter
00139  * this function must be called within the limit (1sec)
00140  */
00141  
00142 void reset_watch_dog(void) 
00143 {
00144     SIM->SRVCOP = (uint32_t)0x55u;
00145     SIM->SRVCOP = (uint32_t)0xAAu;
00146 }