MBED driver for Max1471.
MAX1471.cpp@0:99e9397112f0, 2019-10-04 (annotated)
- Committer:
- Abdullah.Turan@IST-LT-37344.maxim-ic.internal
- Date:
- Fri Oct 04 15:15:06 2019 +0300
- Revision:
- 0:99e9397112f0
Initial Commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 1 | /* |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 2 | * MAX1471.cpp |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 3 | * |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 4 | * Created on: Dec 17, 2018 |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 5 | */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 6 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 7 | #include <limits.h> |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 8 | #include "spim.h" |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 9 | #include "max32630fthr.h" |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 10 | #include "MAX1471.h" |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 11 | #include "tmr.h" |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 12 | #include "gpio.h" |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 13 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 14 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 15 | #define GPIO_P3_IN (uint32_t)0x4000A18C |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 16 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 17 | using namespace std; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 18 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 19 | #define BITBAND(reg, bit) ((0xf0000000 & (uint32_t)(reg)) + 0x2000000 + \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 20 | (((uint32_t)(reg) & 0x0fffffff) << 5) + ((bit) << 2)) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 21 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 22 | #define MXC_CLRBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 0) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 23 | #define MXC_SETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit) = 1) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 24 | #define MXC_GETBIT(reg, bit) (*(volatile uint32_t *)BITBAND(reg, bit)) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 25 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 26 | #define SET_BIT_FIELD(address, reg_name, bit_field_name, value) { \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 27 | int ret; \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 28 | ret = read_register(address, (uint8_t *)&(reg_name), 1); \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 29 | if (ret) { \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 30 | return ret; \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 31 | } \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 32 | bit_field_name = value; \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 33 | ret = write_register(address, (uint8_t *)&(reg_name), 1); \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 34 | if (ret) { \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 35 | return ret; \ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 36 | }} |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 37 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 38 | //Constructors |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 39 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 40 | int MAX1471::ASKPeakDetectorEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 41 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 42 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.askpd_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 43 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 44 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 45 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 46 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 47 | int MAX1471::FSKPeakDetectorEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 48 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 49 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.fskpd_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 50 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 51 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 52 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 53 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 54 | int MAX1471::ASKBaseBandReceiverEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 55 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 56 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.askbb_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 57 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 58 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 59 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 60 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 61 | int MAX1471::FSKBaseBandReceiverEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 62 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 63 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.fskbb_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 64 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 65 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 66 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 67 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 68 | int MAX1471::RFMixerEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 69 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 70 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.mixer_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 71 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 72 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 73 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 74 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 75 | int MAX1471::AGCEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 76 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 77 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.agc_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 78 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 79 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 80 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 81 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 82 | int MAX1471::LNAEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 83 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 84 | SET_BIT_FIELD( PWR_CFG_ADDR, this -> reg->reg_pwr_cfg, this -> reg->reg_pwr_cfg.bits.lna_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 85 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 86 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 87 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 88 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 89 | int MAX1471::DRXEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 90 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 91 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this -> reg->reg_cfg.bits.drx_mode, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 92 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 93 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 94 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 95 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 96 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 97 | int MAX1471::SetFDATAasDOUTPin(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 98 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 99 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.dout_fsk, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 100 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 101 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 102 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 103 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 104 | int MAX1471::SetADATAasDOUTPin(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 105 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 106 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.dout_ask, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 107 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 108 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 109 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 110 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 111 | int MAX1471::LongerFSKCalibrationEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 112 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 113 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.fskcallsb, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 114 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 115 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 116 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 117 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 118 | int MAX1471::LNAGainState(bool isHighGain) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 119 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 120 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.gainset, isHighGain ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 121 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 122 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 123 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 124 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 125 | int MAX1471::FSKCalibrationDone(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 126 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 127 | SET_BIT_FIELD( CTRL_ADDR, this -> reg->reg_ctrl, this->reg->reg_ctrl.bits.fsk_cal_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 128 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 129 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 130 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 131 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 132 | int MAX1471::PollTimerCalibrationEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 133 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 134 | SET_BIT_FIELD( CTRL_ADDR, this -> reg->reg_ctrl, this->reg->reg_ctrl.bits.pol_cal_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 135 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 136 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 137 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 138 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 139 | int MAX1471::ASKPeakDetectorTrackEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 140 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 141 | SET_BIT_FIELD( CTRL_ADDR, this -> reg->reg_ctrl, this->reg->reg_ctrl.bits.asktrk_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 142 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 143 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 144 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 145 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 146 | int MAX1471::FSKPeakDetectorTrackEnable(bool enable) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 147 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 148 | SET_BIT_FIELD( CTRL_ADDR, this -> reg->reg_ctrl, this->reg->reg_ctrl.bits.fsktrk_en, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 149 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 150 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 151 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 152 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 153 | int MAX1471::LockAGCCurrentState() |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 154 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 155 | SET_BIT_FIELD( CTRL_ADDR, this -> reg->reg_ctrl, this->reg->reg_ctrl.bits.agclock, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 156 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 157 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 158 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 159 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 160 | int MAX1471::GetPollTimerCalibrationDoneStatus( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 161 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 162 | read_register( STAT_ADDR, &this -> reg->reg_stat.raw, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 163 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 164 | *valuePtr = this -> reg->reg_stat.bits.pol_cal_done; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 165 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 166 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 167 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 168 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 169 | int MAX1471::GetFSKCalibrationDoneStatus( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 170 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 171 | read_register( STAT_ADDR, &this -> reg->reg_stat.raw, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 172 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 173 | *valuePtr = this -> reg->reg_stat.bits.fsk_cal_done; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 174 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 175 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 176 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 177 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 178 | int MAX1471::GetClockAliveStatus( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 179 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 180 | read_register( STAT_ADDR, &this -> reg->reg_stat.raw, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 181 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 182 | *valuePtr = this -> reg->reg_stat.bits.clkalive; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 183 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 184 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 185 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 186 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 187 | int MAX1471::GetAGCStatus( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 188 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 189 | read_register( STAT_ADDR, &this -> reg->reg_stat.raw, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 190 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 191 | *valuePtr = this -> reg->reg_stat.bits.agcst; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 192 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 193 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 194 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 195 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 196 | int MAX1471::GetPLLLockStatus( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 197 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 198 | read_register( STAT_ADDR, &this -> reg->reg_stat.raw, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 199 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 200 | *valuePtr = this -> reg->reg_stat.bits.lockdet; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 201 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 202 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 203 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 204 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 205 | int MAX1471::GetOffTimerPrescale( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 206 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 207 | read_register( CFG_ADDR, &this -> reg->reg_cfg.raw, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 208 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 209 | *valuePtr = this->reg->reg_cfg.bits.toff_ps1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 210 | *valuePtr = ( *valuePtr << 1 ) | this->reg->reg_cfg.bits.toff_ps0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 211 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 212 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 213 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 214 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 215 | int MAX1471::SetOffTimerPrescale( unsigned char value ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 216 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 217 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.toff_ps0, value & 0x01 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 218 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.toff_ps1, !!( value & 0x02 ) ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 219 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 220 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 221 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 222 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 223 | int MAX1471::GetAGCDwellTimer( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 224 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 225 | return read_register( AGC_DWL_TMR_ADDR, valuePtr, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 226 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 227 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 228 | int MAX1471::SetAGCDwellTimer( unsigned char value ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 229 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 230 | return write_register( AGC_DWL_TMR_ADDR, value & 0x1F, 1); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 231 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 232 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 233 | int MAX1471::SetRFSettleTimer( unsigned short int value ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 234 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 235 | write_register( RF_ST_UP_ADDR, ( value >> 8 ), 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 236 | write_register( RF_ST_DWN_ADDR, ( value & 0x00FF ), 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 237 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 238 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 239 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 240 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 241 | int MAX1471::GetRFSettleTimer( unsigned short int *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 242 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 243 | unsigned char *valueUint8Ptr; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 244 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 245 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 246 | valueUint8Ptr = ( unsigned char * )valuePtr; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 247 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 248 | read_register( RF_ST_UP_ADDR, &valueUint8Ptr[1], 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 249 | read_register( RF_ST_DWN_ADDR, &valueUint8Ptr[0], 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 250 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 251 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 252 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 253 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 254 | int MAX1471::SetOFFTimer( unsigned short int value ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 255 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 256 | write_register( OFF_TMR_UP_ADDR, ( value >> 8 ), 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 257 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 258 | return write_register( OFF_TMR_DWN_ADDR, ( value & 0x00FF ), 1 );; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 259 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 260 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 261 | int MAX1471::GetOFFTimer( unsigned short int *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 262 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 263 | unsigned char *valueUint8Ptr; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 264 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 265 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 266 | valueUint8Ptr = ( unsigned char * )valuePtr; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 267 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 268 | read_register( OFF_TMR_UP_ADDR, &valueUint8Ptr[1], 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 269 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 270 | return read_register( OFF_TMR_DWN_ADDR, &valueUint8Ptr[0], 1 );; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 271 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 272 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 273 | int MAX1471::SetCPURecoveryTimer( unsigned char value ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 274 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 275 | return write_register( CPU_REC_ADDR, value, 1 );; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 276 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 277 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 278 | int MAX1471::GetCPURecoveryTimer( unsigned char *valuePtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 279 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 280 | return read_register( CPU_REC_ADDR, valuePtr, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 281 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 282 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 283 | int MAX1471::SetRFOscillatorFreq( float frequency ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 284 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 285 | if( frequency >= 9.0406 && frequency <= 13.7281 ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 286 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 287 | unsigned char regValue = ( unsigned char )( ( frequency * 10 ) + 0.5 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 288 | oscFrequency = frequency; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 289 | return write_register( OSC_FREQ_ADDR, regValue, 1 ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 290 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 291 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 292 | return -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 293 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 294 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 295 | int MAX1471::GetRFOscillatorFreq( float *freqPtr ) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 296 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 297 | *freqPtr = oscFrequency; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 298 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 299 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 300 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 301 | MAX1471::MAX1471(DigitalOut *cs) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 302 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 303 | modulation = ASK; /*!< Current modulation mode */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 304 | oscFrequency = 0; /*!< Extern oscillator frequency */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 305 | #if defined(TARGET_MAX32630FTHR) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 306 | this->spi_handler = new SPI(P5_1, P5_2, P5_0); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 307 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 308 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 309 | #if defined(TARGET_MAX32625PICO) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 310 | this->spi_handler = new SPI(P0_5, P0_6, P0_4); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 311 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 312 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 313 | this->spi_handler->format(8,0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 314 | this->spi_handler->frequency(100000); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 315 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 316 | this->ssel = cs; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 317 | *(this->ssel) = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 318 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 319 | this->spi_mode = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 320 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 321 | this->reg = new max1471_reg_map_t(); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 322 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 323 | this->set_spi_type(0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 324 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 325 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 326 | int MAX1471::read_register(uint8_t reg, uint8_t *value, uint8_t len) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 327 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 328 | int rtn_val = -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 329 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 330 | if (value == NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 331 | return -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 332 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 333 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 334 | if (this->reg == NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 335 | return -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 336 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 337 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 338 | #if defined(TARGET_MAX32630FTHR) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 339 | SPI *spi = new SPI(P5_1, P5_2, P5_0); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 340 | mxc_spim_regs_t *MAX1471_SPI = MXC_SPIM2; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 341 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 342 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 343 | #if defined(TARGET_MAX32625PICO) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 344 | SPI *spi = new SPI(P0_5, P0_6, P0_4); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 345 | mxc_spim_regs_t *MAX1471_SPI = MXC_SPIM0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 346 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 347 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 348 | spi->format(8,0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 349 | spi->frequency(400000); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 350 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 351 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 352 | *ssel = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 353 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 354 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 355 | spi->write((uint8_t)0x20 | reg); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 356 | spi->write(0x00); // dummy write command for waiting data read |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 357 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 358 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 359 | *ssel = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 360 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 361 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 362 | wait_us(1); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 363 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 364 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 365 | *ssel = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 366 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 367 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 368 | if (this->spi_mode == 0) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 369 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 370 | MAX1471_SPI->mstr_cfg |= MXC_F_SPIM_MSTR_CFG_THREE_WIRE_MODE; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 371 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 372 | // Disable SPI for General Control Configuration |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 373 | MAX1471_SPI->gen_ctrl = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 374 | MAX1471_SPI->gen_ctrl |= (MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN | MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN | MXC_F_SPIM_GEN_CTRL_ENABLE_SCK_FB_MODE | (1 << MXC_F_SPIM_GEN_CTRL_SIMPLE_MODE_POS)); // simple header |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 375 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 376 | MAX1471_SPI->simple_headers &= 0x0000FFFF; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 377 | MAX1471_SPI->simple_headers |= 0x2016<<16; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 378 | MAX1471_SPI->gen_ctrl |=MXC_F_SPIM_GEN_CTRL_START_RX_ONLY; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 379 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 380 | // Enable the SPI |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 381 | MAX1471_SPI->gen_ctrl |= MXC_F_SPIM_GEN_CTRL_SPI_MSTR_EN; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 382 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 383 | volatile mxc_spim_fifo_regs_t *fifo; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 384 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 385 | fifo = MXC_SPIM_GET_SPIM_FIFO(MXC_SPIM_GET_IDX(MAX1471_SPI)); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 386 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 387 | int avail = ((MAX1471_SPI->fifo_ctrl & MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED) >> MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED_POS); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 388 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 389 | Timer t; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 390 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 391 | t.start(); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 392 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 393 | while (avail < 1) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 394 | if (t.read_ms() > 1000) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 395 | break; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 396 | } else { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 397 | avail = ((MAX1471_SPI->fifo_ctrl & MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED) >> MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED_POS); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 398 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 399 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 400 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 401 | t.stop(); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 402 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 403 | for (int i = 0; i < avail; i++) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 404 | *(value++) = fifo->rslts_8[i]; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 405 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 406 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 407 | while (MAX1471_SPI->fifo_ctrl & MXC_F_SPIM_FIFO_CTRL_RX_FIFO_USED) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 408 | fifo->rslts_8[0]; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 409 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 410 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 411 | MAX1471_SPI->gen_ctrl = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 412 | MAX1471_SPI->gen_ctrl |= (MXC_F_SPIM_GEN_CTRL_TX_FIFO_EN | MXC_F_SPIM_GEN_CTRL_RX_FIFO_EN | MXC_F_SPIM_GEN_CTRL_ENABLE_SCK_FB_MODE | (0 << MXC_F_SPIM_GEN_CTRL_SIMPLE_MODE_POS)); // simple header |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 413 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 414 | MAX1471_SPI->gen_ctrl |= MXC_F_SPIM_GEN_CTRL_SPI_MSTR_EN; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 415 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 416 | } else { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 417 | MAX1471_SPI->mstr_cfg &= ~MXC_F_SPIM_MSTR_CFG_THREE_WIRE_MODE; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 418 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 419 | for (uint8_t i = 0; i < len; i++) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 420 | *(value++) = spi->write(0x00); // read back data bytes |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 421 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 422 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 423 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 424 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 425 | *ssel = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 426 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 427 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 428 | delete spi; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 429 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 430 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 431 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 432 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 433 | int MAX1471::write_register(uint8_t reg, const uint8_t *value, uint8_t len) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 434 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 435 | int rtn_val = -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 436 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 437 | if (value == NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 438 | return -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 439 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 440 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 441 | #if defined(TARGET_MAX32630FTHR) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 442 | SPI *spi = new SPI(P5_1, P5_2, P5_0); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 443 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 444 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 445 | #if defined(TARGET_MAX32625PICO) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 446 | SPI *spi = new SPI(P0_5, P0_6, P0_4); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 447 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 448 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 449 | spi->format(8,0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 450 | spi->frequency(100000); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 451 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 452 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 453 | *ssel = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 454 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 455 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 456 | rtn_val = spi->write(0x10 | reg); // write mode and adress send |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 457 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 458 | rtn_val = spi->write((int)*value); // write adress |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 459 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 460 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 461 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 462 | *ssel = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 463 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 464 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 465 | delete spi; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 466 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 467 | if (rtn_val != 0) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 468 | return rtn_val; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 469 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 470 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 471 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 472 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 473 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 474 | int MAX1471::write_register(uint8_t reg, const uint8_t value, uint8_t len) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 475 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 476 | int rtn_val = -1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 477 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 478 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 479 | #if defined(TARGET_MAX32630FTHR) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 480 | SPI *spi = new SPI(P5_1, P5_2, P5_0); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 481 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 482 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 483 | #if defined(TARGET_MAX32625PICO) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 484 | SPI *spi = new SPI(P0_5, P0_6, P0_4); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 485 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 486 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 487 | spi->format(8,0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 488 | spi->frequency(100000); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 489 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 490 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 491 | *ssel = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 492 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 493 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 494 | rtn_val = spi->write(0x10 | reg); // write mode and adress send |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 495 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 496 | rtn_val = spi->write((int)value); // write adress |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 497 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 498 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 499 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 500 | *ssel = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 501 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 502 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 503 | delete spi; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 504 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 505 | if (rtn_val != 0) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 506 | return rtn_val; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 507 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 508 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 509 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 510 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 511 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 512 | int MAX1471::set_spi_type(uint8_t type) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 513 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 514 | /* |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 515 | * 0 -> 3-Wire Default |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 516 | * 1 -> 4-Wire (DOUT_FSK) enabled |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 517 | * 2 -> 4-Wire (DOUT_ASK) enabled |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 518 | */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 519 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 520 | switch (type) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 521 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 522 | case 0: |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 523 | this->reg->reg_cfg.bits.dout_ask = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 524 | this->reg->reg_cfg.bits.dout_fsk = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 525 | break; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 526 | case 1: |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 527 | this->reg->reg_cfg.bits.dout_ask = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 528 | this->reg->reg_cfg.bits.dout_fsk = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 529 | break; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 530 | case 2: |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 531 | this->reg->reg_cfg.bits.dout_ask = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 532 | this->reg->reg_cfg.bits.dout_fsk = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 533 | break; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 534 | default: |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 535 | break; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 536 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 537 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 538 | if (this->write_register(CFG_ADDR, (uint8_t *)&this->reg->reg_cfg.raw, 1) == 0) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 539 | spi_mode = type; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 540 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 541 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 542 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 543 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 544 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 545 | int MAX1471::reset() |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 546 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 547 | #if defined(TARGET_MAX32630FTHR) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 548 | SPI *spi = new SPI(P5_1, P5_2, P5_0); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 549 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 550 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 551 | #if defined(TARGET_MAX32625PICO) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 552 | SPI *spi = new SPI(P0_5, P0_6, P0_4); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 553 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 554 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 555 | spi->format(8,0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 556 | spi->frequency(100000); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 557 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 558 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 559 | *ssel = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 560 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 561 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 562 | int rtrn = spi->write(0x30); // write mode and adress send |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 563 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 564 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 565 | *ssel = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 566 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 567 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 568 | delete spi; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 569 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 570 | return rtrn; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 571 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 572 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 573 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 574 | int MAX1471::nop() |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 575 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 576 | #if defined(TARGET_MAX32630FTHR) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 577 | SPI *spi = new SPI(P5_1, P5_2, P5_0); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 578 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 579 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 580 | #if defined(TARGET_MAX32625PICO) |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 581 | SPI *spi = new SPI(P0_5, P0_6, P0_4); /* mosi, miso, sclk */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 582 | #endif |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 583 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 584 | spi->format(8,0); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 585 | spi->frequency(100000); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 586 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 587 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 588 | *ssel = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 589 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 590 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 591 | int rtrn = spi->write(0x00); // write mode and adress send |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 592 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 593 | if (ssel != NULL) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 594 | *ssel = 1; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 595 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 596 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 597 | delete spi; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 598 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 599 | return rtrn; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 600 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 601 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 602 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 603 | int MAX1471::InitMAX1471() |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 604 | { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 605 | // Write 0x3000 to reset the part |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 606 | this->reset(); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 607 | // wait for 100ms |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 608 | Thread::wait(100); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 609 | // Write 0x10FE to enable all RF and baseband sections. |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 610 | uint8_t value = 0xF4; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 611 | this->write_register(PWR_CFG_ADDR, &value, 1); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 612 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 613 | // Write 0x135F to set the oscillator frequency register to work with a 315MHz crystal. |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 614 | // Write 0x1384 to set the oscillator frequency register to work with a 433.92MHz crystal. |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 615 | value = 0x84; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 616 | this->write_register(OSC_FREQ_ADDR, &value, 1); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 617 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 618 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 619 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 620 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 621 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 622 | int MAX1471::PrepMAX1471RX( modulation_type_t modType ) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 623 | uint8_t value = 0x20; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 624 | uint8_t *readValue = &value; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 625 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 626 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 627 | if( modType == ASK ){ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 628 | this->ASKBaseBandReceiverEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 629 | this->ASKPeakDetectorEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 630 | this->RFMixerEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 631 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 632 | this->LNAEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 633 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 634 | this->AGCEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 635 | this->LNAGainState(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 636 | this->AGCEnable(false); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 637 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 638 | else if( modType == FSK ){ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 639 | this->FSKBaseBandReceiverEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 640 | this->FSKPeakDetectorEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 641 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 642 | this->RFMixerEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 643 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 644 | this->LNAEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 645 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 646 | this->LongerFSKCalibrationEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 647 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 648 | this->AGCEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 649 | this->LNAGainState(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 650 | this->AGCEnable(false); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 651 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 652 | this->FSKCalibrationDone(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 653 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 654 | uint8_t *readValue = &value; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 655 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 656 | *readValue = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 657 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 658 | while (*readValue == 0) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 659 | this->GetFSKCalibrationDoneStatus( readValue ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 660 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 661 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 662 | else{ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 663 | this->PrepMAX1471RX(); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 664 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 665 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 666 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 667 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 668 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 669 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 670 | int MAX1471::PrepMAX1471RX() { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 671 | uint8_t value; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 672 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 673 | this->ASKBaseBandReceiverEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 674 | this->ASKPeakDetectorEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 675 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 676 | this->FSKBaseBandReceiverEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 677 | this->FSKPeakDetectorEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 678 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 679 | this->RFMixerEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 680 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 681 | this->LNAEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 682 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 683 | this->LongerFSKCalibrationEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 684 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 685 | this->AGCEnable(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 686 | this->LNAGainState(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 687 | this->AGCEnable(false); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 688 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 689 | this->FSKCalibrationDone(true); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 690 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 691 | uint8_t *readValue = &value; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 692 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 693 | *readValue = 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 694 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 695 | while (*readValue == 0) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 696 | this->GetFSKCalibrationDoneStatus( readValue ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 697 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 698 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 699 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 700 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 701 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 702 | int MAX1471::PrepMAX1471Sleep(bool enable) { |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 703 | /* This routine is used to prepare the MAX7032 for sleep mode */ |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 704 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 705 | SET_BIT_FIELD( CFG_ADDR, this -> reg->reg_cfg, this->reg->reg_cfg.bits.toff_ps0, enable ); |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 706 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 707 | return 0; |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 708 | } |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 709 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 710 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 711 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 712 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 713 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 714 | |
Abdullah.Turan@IST-LT-37344.maxim-ic.internal | 0:99e9397112f0 | 715 |