Maxim Integrated / Max1471_driver

MBED driver for Max1471.

MAX1471_regs.h@0:99e9397112f0, 2019-10-04 (annotated)

Committer:
Abdullah.Turan@IST-LT-37344.maxim-ic.internal
Date:
Fri Oct 04 15:15:06 2019 +0300
Revision:
0:99e9397112f0
Initial Commit

Who changed what in which revision?

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Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 1 /*
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 2 * Max1471_regs.h
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 3 *
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 4 * Created on: Dec 17, 2018
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 5 * Author: Erman.Komurcu
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 6 */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 7
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 8 #ifndef MAX1471_MAX1471_REGS_H_
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 9 #define MAX1471_MAX1471_REGS_H_
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 10
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 11 /**
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 12 * @brief PWR_CFG (0x00)
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 13 *
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 14 * @description Power Configuration Register
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 15 */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 16 typedef union {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 17 unsigned char raw;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 18 struct {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 19 unsigned char sleep : 1; /**< Sleep mode */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 20 unsigned char askpd_en : 1; /**< ASK peak detector enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 21 unsigned char askbb_en : 1; /**< ASK baseband enabled */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 22 unsigned char fskpd_en : 1; /**< FSK peak detector enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 23 unsigned char fskbb_en : 1; /**< FSK baseband enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 24 unsigned char mixer_en : 1; /**< Mixer enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 25 unsigned char agc_en : 1; /**< AGC enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 26 unsigned char lna_en : 1; /**< LNA enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 27 } bits;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 28 } max1471_reg_pwr_cfg_t;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 29
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 30 /**
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 31 * @brief CFG (0x01)
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 32 *
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 33 * @description Configuration Register
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 34 */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 35 typedef union {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 36 unsigned char raw;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 37 struct {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 38 unsigned char drx_mode : 1; /**< Receive mode */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 39 unsigned char toff_ps0 : 1; /**< Off-timer prescale */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 40 unsigned char toff_ps1 : 1; /**< Off-timer prescale */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 41 unsigned char dout_ask : 1; /**< ASKOUT enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 42 unsigned char dout_fsk : 1; /**< FSKOUT enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 43 unsigned char fskcallsb : 1; /**< FSK accurate calibration */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 44 unsigned char gainset : 1; /**< Gain set */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 45 unsigned char : 1; /**< Don"t care */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 46 } bits;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 47 } max1471_reg_cfg_t;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 48
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 49 /**
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 50 * @brief CTRL (0x02)
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 51 *
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 52 * @description Control Register
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 53 */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 54 typedef union {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 55 unsigned char raw;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 56 struct {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 57 unsigned char fsk_cal_en: 1; /**< FSK calibration enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 58 unsigned char pol_cal_en: 1; /**< Polling timer calibration enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 59 unsigned char asktrk_en : 1; /**< ASK peak detector track enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 60 unsigned char fsktrk_en : 1; /**< FSK peak detector track enable */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 61 unsigned char : 1; /**< Don't care */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 62 unsigned char agclock : 1; /**< AGC lock */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 63 unsigned char : 1; /**< Don"t care */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 64 } bits;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 65 } max1471_reg_ctrl_t;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 66
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 67 /**
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 68 * @brief STAT (0x09)
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 69 *
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 70 * @description Status Register
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 71 */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 72 typedef union {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 73 unsigned char raw;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 74 struct {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 75 unsigned char fsk_cal_done : 1; /**< FSK calibration done */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 76 unsigned char pol_cal_done : 1; /**< Polling timer calibration done */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 77 unsigned char : 3; /**< Don't care */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 78 unsigned char clkalive : 1; /**< Clock/crystal alive */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 79 unsigned char agcst : 1; /**< AGC state */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 80 unsigned char lockdet : 1; /**< Lock detect */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 81 } bits;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 82 } max1471_reg_stat_t;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 83 /**
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 84 * @brief Register Set
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 85 *
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 86 */
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 87 typedef struct {
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 88 max1471_reg_pwr_cfg_t reg_pwr_cfg;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 89 max1471_reg_cfg_t reg_cfg;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 90 max1471_reg_ctrl_t reg_ctrl;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 91 max1471_reg_stat_t reg_stat;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 92 } max1471_reg_map_t;
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 93
Abdullah.Turan@IST-LT-37344.maxim-ic.internal 0:99e9397112f0 94 #endif /* MAX1471_MAX1471_REGS_H_ */