Maxim Integrated / Mbed OS MAX11410BOB_Serial_Tester

Test program running on MAX32625MBED. Control through USB Serial commands using a terminal emulator such as teraterm or putty.

Dependencies:   MaximTinyTester MAX11410 CmdLine USBDevice

MAX11410.h@35:8aa5dffe523d, 2019-11-11 (annotated)

Committer:
whismanoid
Date:
Mon Nov 11 23:30:04 2019 +0000
Revision:
35:8aa5dffe523d
Parent:
25:a2afb91c605a 
WIP 0x11 raw bitstream, *regname?, *regname=0x123456 commands

Who changed what in which revision?

UserRevisionLine numberNew contents of line
whismanoid 35:8aa5dffe523d 1 // /*******************************************************************************
whismanoid 23:e0c36767f98b 2 // * Copyright (C) 2019 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid 23:e0c36767f98b 3 // *
whismanoid 23:e0c36767f98b 4 // * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid 23:e0c36767f98b 5 // * copy of this software and associated documentation files (the "Software"),
whismanoid 23:e0c36767f98b 6 // * to deal in the Software without restriction, including without limitation
whismanoid 23:e0c36767f98b 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid 23:e0c36767f98b 8 // * and/or sell copies of the Software, and to permit persons to whom the
whismanoid 23:e0c36767f98b 9 // * Software is furnished to do so, subject to the following conditions:
whismanoid 23:e0c36767f98b 10 // *
whismanoid 23:e0c36767f98b 11 // * The above copyright notice and this permission notice shall be included
whismanoid 23:e0c36767f98b 12 // * in all copies or substantial portions of the Software.
whismanoid 23:e0c36767f98b 13 // *
whismanoid 23:e0c36767f98b 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid 23:e0c36767f98b 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid 23:e0c36767f98b 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid 23:e0c36767f98b 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid 23:e0c36767f98b 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid 23:e0c36767f98b 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid 23:e0c36767f98b 20 // * OTHER DEALINGS IN THE SOFTWARE.
whismanoid 23:e0c36767f98b 21 // *
whismanoid 23:e0c36767f98b 22 // * Except as contained in this notice, the name of Maxim Integrated
whismanoid 23:e0c36767f98b 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid 23:e0c36767f98b 24 // * Products, Inc. Branding Policy.
whismanoid 23:e0c36767f98b 25 // *
whismanoid 23:e0c36767f98b 26 // * The mere transfer of this software does not imply any licenses
whismanoid 23:e0c36767f98b 27 // * of trade secrets, proprietary technology, copyrights, patents,
whismanoid 23:e0c36767f98b 28 // * trademarks, maskwork rights, or any other form of intellectual
whismanoid 23:e0c36767f98b 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid 23:e0c36767f98b 30 // * ownership rights.
whismanoid 23:e0c36767f98b 31 // *******************************************************************************
whismanoid 23:e0c36767f98b 32 // */
whismanoid 23:e0c36767f98b 33 // *********************************************************************
whismanoid 23:e0c36767f98b 34 // @file MAX11410.h
whismanoid 23:e0c36767f98b 35 // *********************************************************************
whismanoid 23:e0c36767f98b 36 // Header file
whismanoid 23:e0c36767f98b 37 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid 23:e0c36767f98b 38 // generated by XMLSystemOfDevicesToMBED.py
whismanoid 23:e0c36767f98b 39 // System Name = ExampleSystem
whismanoid 23:e0c36767f98b 40 // System Description = Device driver example
whismanoid 23:e0c36767f98b 41 // Device Name = MAX11410
whismanoid 23:e0c36767f98b 42 // Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid 35:8aa5dffe523d 43 // Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC
whismanoid 23:e0c36767f98b 44 // Device Manufacturer = Maxim Integrated
whismanoid 23:e0c36767f98b 45 // Device PartNumber = MAX11410ATI+
whismanoid 23:e0c36767f98b 46 // Device RegValue_Width = DataWidth16bit_HL
whismanoid 23:e0c36767f98b 47 //
whismanoid 35:8aa5dffe523d 48 // ADC MaxOutputDataRate = 1.9ksps
whismanoid 35:8aa5dffe523d 49 // ADC NumChannels = 10
whismanoid 35:8aa5dffe523d 50 // ADC ResolutionBits = 24
whismanoid 35:8aa5dffe523d 51 //
whismanoid 23:e0c36767f98b 52 // SPI CS = ActiveLow
whismanoid 23:e0c36767f98b 53 // SPI FrameStart = CS
whismanoid 23:e0c36767f98b 54 // SPI CPOL = 0
whismanoid 23:e0c36767f98b 55 // SPI CPHA = 0
whismanoid 23:e0c36767f98b 56 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 23:e0c36767f98b 57 // SPI SCLK Idle Low
whismanoid 23:e0c36767f98b 58 // SPI SCLKMaxMHz = 8
whismanoid 23:e0c36767f98b 59 // SPI SCLKMinMHz = 0
whismanoid 23:e0c36767f98b 60 //
whismanoid 23:e0c36767f98b 61
whismanoid 23:e0c36767f98b 62
whismanoid 23:e0c36767f98b 63 // Prevent multiple declaration
whismanoid 23:e0c36767f98b 64 #ifndef __MAX11410_H__
whismanoid 23:e0c36767f98b 65 #define __MAX11410_H__
whismanoid 23:e0c36767f98b 66
whismanoid 35:8aa5dffe523d 67 // standard include for target platform -- Platform_Include_Boilerplate
whismanoid 23:e0c36767f98b 68 #include "mbed.h"
whismanoid 35:8aa5dffe523d 69 // Platforms:
whismanoid 35:8aa5dffe523d 70 // - MAX32625MBED
whismanoid 35:8aa5dffe523d 71 // - supports mbed-os-5.11, requires USBDevice library
whismanoid 35:8aa5dffe523d 72 // - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid 35:8aa5dffe523d 73 // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 74 // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 75 // - MAX32600MBED
whismanoid 35:8aa5dffe523d 76 // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 77 // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 78 // - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid 35:8aa5dffe523d 79 // - NUCLEO_F446RE
whismanoid 35:8aa5dffe523d 80 // - remove USBDevice library
whismanoid 35:8aa5dffe523d 81 // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 82 // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 83 // - NUCLEO_F401RE
whismanoid 35:8aa5dffe523d 84 // - remove USBDevice library
whismanoid 35:8aa5dffe523d 85 // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 86 // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 87 // - MAX32630FTHR
whismanoid 35:8aa5dffe523d 88 // - #include "max32630fthr.h"
whismanoid 35:8aa5dffe523d 89 // - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid 35:8aa5dffe523d 90 // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 91 // - MAX32620FTHR
whismanoid 35:8aa5dffe523d 92 // - #include "MAX32620FTHR.h"
whismanoid 35:8aa5dffe523d 93 // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 94 // - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid 35:8aa5dffe523d 95 // - not tested yet
whismanoid 35:8aa5dffe523d 96 // - MAX32625PICO
whismanoid 35:8aa5dffe523d 97 // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 98 // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 99 // - not tested yet
whismanoid 35:8aa5dffe523d 100 //
whismanoid 35:8aa5dffe523d 101 // end Platform_Include_Boilerplate
whismanoid 23:e0c36767f98b 102
whismanoid 23:e0c36767f98b 103 // CODE GENERATOR: conditional defines
whismanoid 23:e0c36767f98b 104 // CODE GENERATOR: class declaration and docstrings
whismanoid 23:e0c36767f98b 105 /**
whismanoid 23:e0c36767f98b 106 * @brief MAX11410 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid 23:e0c36767f98b 107 *
whismanoid 23:e0c36767f98b 108 *
whismanoid 23:e0c36767f98b 109 *
whismanoid 23:e0c36767f98b 110 * Datasheet: https://www.maximintegrated.com/MAX11410
whismanoid 23:e0c36767f98b 111 *
whismanoid 23:e0c36767f98b 112 *
whismanoid 23:e0c36767f98b 113 *
whismanoid 23:e0c36767f98b 114 * //---------- CODE GENERATOR: helloCppCodeList
whismanoid 23:e0c36767f98b 115 * @code
whismanoid 23:e0c36767f98b 116 * // CODE GENERATOR: example code includes
whismanoid 35:8aa5dffe523d 117 *
whismanoid 23:e0c36767f98b 118 * // example code includes
whismanoid 35:8aa5dffe523d 119 * // standard include for target platform -- Platform_Include_Boilerplate
whismanoid 23:e0c36767f98b 120 * #include "mbed.h"
whismanoid 35:8aa5dffe523d 121 * // Platforms:
whismanoid 35:8aa5dffe523d 122 * // - MAX32625MBED
whismanoid 35:8aa5dffe523d 123 * // - supports mbed-os-5.11, requires USBDevice library
whismanoid 35:8aa5dffe523d 124 * // - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid 35:8aa5dffe523d 125 * // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 126 * // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 127 * // - MAX32600MBED
whismanoid 35:8aa5dffe523d 128 * // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 129 * // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 130 * // - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid 35:8aa5dffe523d 131 * // - NUCLEO_F446RE
whismanoid 35:8aa5dffe523d 132 * // - remove USBDevice library
whismanoid 35:8aa5dffe523d 133 * // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 134 * // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 135 * // - NUCLEO_F401RE
whismanoid 35:8aa5dffe523d 136 * // - remove USBDevice library
whismanoid 35:8aa5dffe523d 137 * // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 138 * // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 139 * // - MAX32630FTHR
whismanoid 35:8aa5dffe523d 140 * // - #include "max32630fthr.h"
whismanoid 35:8aa5dffe523d 141 * // - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid 35:8aa5dffe523d 142 * // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 143 * // - MAX32620FTHR
whismanoid 35:8aa5dffe523d 144 * // - #include "MAX32620FTHR.h"
whismanoid 35:8aa5dffe523d 145 * // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 146 * // - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid 35:8aa5dffe523d 147 * // - not tested yet
whismanoid 35:8aa5dffe523d 148 * // - MAX32625PICO
whismanoid 35:8aa5dffe523d 149 * // - remove max32630fthr library (if present)
whismanoid 35:8aa5dffe523d 150 * // - remove MAX32620FTHR library (if present)
whismanoid 35:8aa5dffe523d 151 * // - not tested yet
whismanoid 35:8aa5dffe523d 152 * //
whismanoid 35:8aa5dffe523d 153 * // end Platform_Include_Boilerplate
whismanoid 23:e0c36767f98b 154 * #include "MAX11410.h"
whismanoid 23:e0c36767f98b 155 *
whismanoid 23:e0c36767f98b 156 * // example code board support
whismanoid 23:e0c36767f98b 157 * //MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
whismanoid 23:e0c36767f98b 158 * //DigitalOut rLED(LED1);
whismanoid 23:e0c36767f98b 159 * //DigitalOut gLED(LED2);
whismanoid 23:e0c36767f98b 160 * //DigitalOut bLED(LED3);
whismanoid 23:e0c36767f98b 161 * //
whismanoid 23:e0c36767f98b 162 * // Arduino "shield" connector port definitions (MAX32625MBED shown)
whismanoid 23:e0c36767f98b 163 * #if defined(TARGET_MAX32625MBED)
whismanoid 23:e0c36767f98b 164 * #define A0 AIN_0
whismanoid 23:e0c36767f98b 165 * #define A1 AIN_1
whismanoid 23:e0c36767f98b 166 * #define A2 AIN_2
whismanoid 23:e0c36767f98b 167 * #define A3 AIN_3
whismanoid 23:e0c36767f98b 168 * #define D0 P0_0
whismanoid 23:e0c36767f98b 169 * #define D1 P0_1
whismanoid 23:e0c36767f98b 170 * #define D2 P0_2
whismanoid 23:e0c36767f98b 171 * #define D3 P0_3
whismanoid 23:e0c36767f98b 172 * #define D4 P0_4
whismanoid 23:e0c36767f98b 173 * #define D5 P0_5
whismanoid 23:e0c36767f98b 174 * #define D6 P0_6
whismanoid 23:e0c36767f98b 175 * #define D7 P0_7
whismanoid 23:e0c36767f98b 176 * #define D8 P1_4
whismanoid 23:e0c36767f98b 177 * #define D9 P1_5
whismanoid 23:e0c36767f98b 178 * #define D10 P1_3
whismanoid 23:e0c36767f98b 179 * #define D11 P1_1
whismanoid 23:e0c36767f98b 180 * #define D12 P1_2
whismanoid 23:e0c36767f98b 181 * #define D13 P1_0
whismanoid 23:e0c36767f98b 182 * #endif
whismanoid 23:e0c36767f98b 183 *
whismanoid 23:e0c36767f98b 184 * // example code declare SPI interface
whismanoid 23:e0c36767f98b 185 * #if defined(TARGET_MAX32625MBED)
whismanoid 23:e0c36767f98b 186 * SPI spi(SPI1_MOSI, SPI1_MISO, SPI1_SCK); // mosi, miso, sclk spi1 TARGET_MAX32625MBED: P1_1 P1_2 P1_0 Arduino 10-pin header D11 D12 D13
whismanoid 23:e0c36767f98b 187 * DigitalOut spi_cs(SPI1_SS); // TARGET_MAX32625MBED: P1_3 Arduino 10-pin header D10
whismanoid 23:e0c36767f98b 188 * #elif defined(TARGET_MAX32600MBED)
whismanoid 23:e0c36767f98b 189 * SPI spi(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid 23:e0c36767f98b 190 * DigitalOut spi_cs(SPI2_SS); // Generic: Arduino 10-pin header D10
whismanoid 23:e0c36767f98b 191 * #else
whismanoid 23:e0c36767f98b 192 * SPI spi(D11, D12, D13); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid 23:e0c36767f98b 193 * DigitalOut spi_cs(D10); // Generic: Arduino 10-pin header D10
whismanoid 23:e0c36767f98b 194 * #endif
whismanoid 23:e0c36767f98b 195 *
whismanoid 23:e0c36767f98b 196 * // example code declare GPIO interface pins
whismanoid 23:e0c36767f98b 197 * // example code declare device instance
whismanoid 23:e0c36767f98b 198 * MAX11410 g_MAX11410_device(spi, spi_cs, MAX11410::MAX11410_IC);
whismanoid 23:e0c36767f98b 199 *
whismanoid 35:8aa5dffe523d 200 * // CODE GENERATOR: example code for ADC: serial port declaration
whismanoid 35:8aa5dffe523d 201 * //--------------------------------------------------
whismanoid 35:8aa5dffe523d 202 * // Declare the Serial driver
whismanoid 35:8aa5dffe523d 203 * // default baud rate settings are 9600 8N1
whismanoid 35:8aa5dffe523d 204 * // install device driver from http://developer.mbed.org/media/downloads/drivers/mbedWinSerial_16466.exe
whismanoid 35:8aa5dffe523d 205 * // see docs https://docs.mbed.com/docs/mbed-os-handbook/en/5.5/getting_started/what_need/
whismanoid 35:8aa5dffe523d 206 * #if defined(TARGET_MAX32630)
whismanoid 35:8aa5dffe523d 207 * #include "USBSerial.h"
whismanoid 35:8aa5dffe523d 208 * // Hardware serial port over DAPLink
whismanoid 35:8aa5dffe523d 209 * // The default baud rate for the DapLink UART is 9600
whismanoid 35:8aa5dffe523d 210 * //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid 35:8aa5dffe523d 211 * // #define HAS_DAPLINK_SERIAL 1
whismanoid 35:8aa5dffe523d 212 * // Virtual serial port over USB
whismanoid 35:8aa5dffe523d 213 * // The baud rate does not affect the virtual USBSerial UART.
whismanoid 35:8aa5dffe523d 214 * USBSerial serial;
whismanoid 35:8aa5dffe523d 215 * //--------------------------------------------------
whismanoid 35:8aa5dffe523d 216 * #elif defined(TARGET_MAX32625MBED)
whismanoid 35:8aa5dffe523d 217 * #include "USBSerial.h"
whismanoid 35:8aa5dffe523d 218 * // Hardware serial port over DAPLink
whismanoid 35:8aa5dffe523d 219 * // The default baud rate for the DapLink UART is 9600
whismanoid 35:8aa5dffe523d 220 * //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid 35:8aa5dffe523d 221 * // #define HAS_DAPLINK_SERIAL 1
whismanoid 35:8aa5dffe523d 222 * // Virtual serial port over USB
whismanoid 35:8aa5dffe523d 223 * // The baud rate does not affect the virtual USBSerial UART.
whismanoid 35:8aa5dffe523d 224 * USBSerial serial;
whismanoid 35:8aa5dffe523d 225 * //--------------------------------------------------
whismanoid 35:8aa5dffe523d 226 * #elif defined(TARGET_MAX32600)
whismanoid 35:8aa5dffe523d 227 * #include "USBSerial.h"
whismanoid 35:8aa5dffe523d 228 * // Hardware serial port over DAPLink
whismanoid 35:8aa5dffe523d 229 * // The default baud rate for the DapLink UART is 9600
whismanoid 35:8aa5dffe523d 230 * Serial DAPLINKserial(P1_1, P1_0); // tx, rx
whismanoid 35:8aa5dffe523d 231 * #define HAS_DAPLINK_SERIAL 1
whismanoid 35:8aa5dffe523d 232 * // Virtual serial port over USB
whismanoid 35:8aa5dffe523d 233 * // The baud rate does not affect the virtual USBSerial UART.
whismanoid 35:8aa5dffe523d 234 * USBSerial serial;
whismanoid 35:8aa5dffe523d 235 * //--------------------------------------------------
whismanoid 35:8aa5dffe523d 236 * #elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_NUCLEO_F401RE)
whismanoid 35:8aa5dffe523d 237 * Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid 35:8aa5dffe523d 238 * //--------------------------------------------------
whismanoid 35:8aa5dffe523d 239 * #else
whismanoid 35:8aa5dffe523d 240 * #if defined(SERIAL_TX)
whismanoid 35:8aa5dffe523d 241 * #warning "target not previously tested; guess serial pins are SERIAL_TX, SERIAL_RX..."
whismanoid 35:8aa5dffe523d 242 * Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid 35:8aa5dffe523d 243 * #elif defined(USBTX)
whismanoid 35:8aa5dffe523d 244 * #warning "target not previously tested; guess serial pins are USBTX, USBRX..."
whismanoid 35:8aa5dffe523d 245 * Serial serial(USBTX, USBRX); // tx, rx
whismanoid 35:8aa5dffe523d 246 * #elif defined(UART_TX)
whismanoid 35:8aa5dffe523d 247 * #warning "target not previously tested; guess serial pins are UART_TX, UART_RX..."
whismanoid 35:8aa5dffe523d 248 * Serial serial(UART_TX, UART_RX); // tx, rx
whismanoid 35:8aa5dffe523d 249 * #else
whismanoid 35:8aa5dffe523d 250 * #warning "target not previously tested; need to define serial pins..."
whismanoid 35:8aa5dffe523d 251 * #endif
whismanoid 35:8aa5dffe523d 252 * #endif
whismanoid 35:8aa5dffe523d 253 * //
whismanoid 35:8aa5dffe523d 254 * #include "CmdLine.h"
whismanoid 35:8aa5dffe523d 255 * CmdLine cmdLine(serial, "serial");
whismanoid 35:8aa5dffe523d 256 *
whismanoid 23:e0c36767f98b 257 * // example code main function
whismanoid 23:e0c36767f98b 258 * int main()
whismanoid 23:e0c36767f98b 259 * {
whismanoid 35:8aa5dffe523d 260 * // CODE GENERATOR: example code: member function Init
whismanoid 35:8aa5dffe523d 261 * g_MAX11410_device.Init();
whismanoid 35:8aa5dffe523d 262 *
whismanoid 23:e0c36767f98b 263 * while (1)
whismanoid 23:e0c36767f98b 264 * {
whismanoid 35:8aa5dffe523d 265 * // CODE GENERATOR: example code: has no member function REF
whismanoid 35:8aa5dffe523d 266 * // CODE GENERATOR: example code for ADC: repeat-forever convert and print conversion result, one record per line
whismanoid 35:8aa5dffe523d 267 * // CODE GENERATOR: ResolutionBits = 24
whismanoid 35:8aa5dffe523d 268 * // CODE GENERATOR: FScode = None
whismanoid 35:8aa5dffe523d 269 * // CODE GENERATOR: NumChannels = 10
whismanoid 35:8aa5dffe523d 270 * while(1) { // this code repeats forever
whismanoid 35:8aa5dffe523d 271 * // this code repeats forever
whismanoid 35:8aa5dffe523d 272 * // CODE GENERATOR: example code: has no member function ScanStandardExternalClock
whismanoid 35:8aa5dffe523d 273 * // CODE GENERATOR: example code: has no member function ReadAINcode
whismanoid 35:8aa5dffe523d 274 * // CODE GENERATOR: example code: member function _TODO_MAX11410_Read_All_Voltages_
whismanoid 35:8aa5dffe523d 275 * // Measure ADC channels in sequence from AIN0 to channelNumber_0_9.
whismanoid 35:8aa5dffe523d 276 * // @param[in] g_MAX11410_device.channelNumber_0_15: AIN Channel Number
whismanoid 35:8aa5dffe523d 277 * // @param[in] g_MAX11410_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid 35:8aa5dffe523d 278 * // @param[in] g_MAX11410_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid 35:8aa5dffe523d 279 * int channelId_0_9 = 9;
whismanoid 35:8aa5dffe523d 280 * //g_MAX11410_device.channelNumber_0_15 = channelId_0_9;
whismanoid 35:8aa5dffe523d 281 * //g_MAX11410_device.PowerManagement_0_2 = 0;
whismanoid 35:8aa5dffe523d 282 * //g_MAX11410_device.chan_id_0_1 = 1;
whismanoid 35:8aa5dffe523d 283 * //g_MAX11410_device.NumWords = g_MAX11410_device._TODO_MAX11410_Read_All_Voltages_();
whismanoid 23:e0c36767f98b 284 *
whismanoid 35:8aa5dffe523d 285 * // wait(3.0);
whismanoid 35:8aa5dffe523d 286 * // CODE GENERATOR: print conversion result
whismanoid 35:8aa5dffe523d 287 * // Use Arduino Serial Plotter to view output: Tools | Serial Plotter
whismanoid 35:8aa5dffe523d 288 * cmdLine.serial().printf("%d", g_MAX11410_device.AINcode[0]);
whismanoid 35:8aa5dffe523d 289 * for (int index = 1; index <= channelId_0_9; index++) {
whismanoid 35:8aa5dffe523d 290 * cmdLine.serial().printf(",%d", g_MAX11410_device.AINcode[index]);
whismanoid 35:8aa5dffe523d 291 * }
whismanoid 35:8aa5dffe523d 292 * cmdLine.serial().printf("\r\n");
whismanoid 35:8aa5dffe523d 293 *
whismanoid 35:8aa5dffe523d 294 * } // this code repeats forever
whismanoid 23:e0c36767f98b 295 * }
whismanoid 23:e0c36767f98b 296 * }
whismanoid 23:e0c36767f98b 297 * @endcode
whismanoid 23:e0c36767f98b 298 * //---------- CODE GENERATOR: end helloCppCodeList
whismanoid 23:e0c36767f98b 299 */
whismanoid 23:e0c36767f98b 300 class MAX11410 {
whismanoid 23:e0c36767f98b 301 public:
whismanoid 23:e0c36767f98b 302 // CODE GENERATOR: TypedefEnum EnumItem declarations
whismanoid 23:e0c36767f98b 303 // CODE GENERATOR: TypedefEnum MAX11410_CMD_enum_t
whismanoid 23:e0c36767f98b 304 //----------------------------------------
whismanoid 23:e0c36767f98b 305 /// Register Addresses
whismanoid 23:e0c36767f98b 306 ///
whismanoid 23:e0c36767f98b 307 /// Naming convention is CMD_bitstream_FUNCTION_NAME
whismanoid 23:e0c36767f98b 308 /// - r = read/write bit (1=read, 0=write)
whismanoid 23:e0c36767f98b 309 /// - xaaa_aaaa = 7-bit register address field
whismanoid 23:e0c36767f98b 310 /// - dddd_dddd = 8-bit register data field
whismanoid 23:e0c36767f98b 311 /// - dddd_dddd_dddd_dddd = 16-bit register data field
whismanoid 23:e0c36767f98b 312 /// - dddd_dddd_dddd_dddd_dddd_dddd = 24-bit register data field
whismanoid 23:e0c36767f98b 313 /// - xxxx = don't care
whismanoid 23:e0c36767f98b 314 typedef enum MAX11410_CMD_enum_t {
whismanoid 23:e0c36767f98b 315 CMD_r000_0000_xxxx_xxdd_PD = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 316 CMD_r000_0001_xddd_xxdd_CONV_START = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 317 CMD_r000_0010_xddd_dddd_SEQ_START = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 318 CMD_r000_0011_xxxx_xddd_CAL_START = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 319 CMD_r000_0100_dddd_xddd_GP0_CTRL = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 320 CMD_r000_0101_dddd_xddd_GP1_CTRL = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 321 CMD_r000_0110_xddd_xxdd_GP_CONV = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 322 CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 323 CMD_r000_1000_x0dd_dddd_FILTER = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 324 CMD_r000_1001_dddd_dddd_CTRL = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 325 CMD_r000_1010_dddd_dddd_SOURCE = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 326 CMD_r000_1011_dddd_dddd_MUX_CTRL0 = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 327 CMD_r000_1100_dddd_dddd_MUX_CTRL1 = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 328 CMD_r000_1101_dddd_dddd_MUX_CTRL2 = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 329 CMD_r000_1110_xxdd_xddd_PGA = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 330 CMD_r000_1111_dddd_dddd_WAIT_EXT = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 331 CMD_r001_0000_xxxx_xxxx_WAIT_START = 0x10, //!< 8'b00010000
whismanoid 23:e0c36767f98b 332 CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID = 0x11, //!< 8'b00010001
whismanoid 23:e0c36767f98b 333 CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL = 0x12, //!< 8'b00010010
whismanoid 23:e0c36767f98b 334 CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A = 0x13, //!< 8'b00010011
whismanoid 23:e0c36767f98b 335 CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B = 0x14, //!< 8'b00010100
whismanoid 23:e0c36767f98b 336 CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A = 0x15, //!< 8'b00010101
whismanoid 23:e0c36767f98b 337 CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B = 0x16, //!< 8'b00010110
whismanoid 23:e0c36767f98b 338 CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF = 0x17, //!< 8'b00010111
whismanoid 23:e0c36767f98b 339 CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1 = 0x18, //!< 8'b00011000
whismanoid 23:e0c36767f98b 340 CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2 = 0x19, //!< 8'b00011001
whismanoid 23:e0c36767f98b 341 CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4 = 0x1a, //!< 8'b00011010
whismanoid 23:e0c36767f98b 342 CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8 = 0x1b, //!< 8'b00011011
whismanoid 23:e0c36767f98b 343 CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16 = 0x1c, //!< 8'b00011100
whismanoid 23:e0c36767f98b 344 CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32 = 0x1d, //!< 8'b00011101
whismanoid 23:e0c36767f98b 345 CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64 = 0x1e, //!< 8'b00011110
whismanoid 23:e0c36767f98b 346 CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128 = 0x1f, //!< 8'b00011111
whismanoid 23:e0c36767f98b 347 CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0 = 0x20, //!< 8'b00100000
whismanoid 23:e0c36767f98b 348 CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1 = 0x21, //!< 8'b00100001
whismanoid 23:e0c36767f98b 349 CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2 = 0x22, //!< 8'b00100010
whismanoid 23:e0c36767f98b 350 CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3 = 0x23, //!< 8'b00100011
whismanoid 23:e0c36767f98b 351 CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4 = 0x24, //!< 8'b00100100
whismanoid 23:e0c36767f98b 352 CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5 = 0x25, //!< 8'b00100101
whismanoid 23:e0c36767f98b 353 CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6 = 0x26, //!< 8'b00100110
whismanoid 23:e0c36767f98b 354 CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7 = 0x27, //!< 8'b00100111
whismanoid 23:e0c36767f98b 355 CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0 = 0x28, //!< 8'b00101000
whismanoid 23:e0c36767f98b 356 CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1 = 0x29, //!< 8'b00101001
whismanoid 23:e0c36767f98b 357 CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2 = 0x2a, //!< 8'b00101010
whismanoid 23:e0c36767f98b 358 CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3 = 0x2b, //!< 8'b00101011
whismanoid 23:e0c36767f98b 359 CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4 = 0x2c, //!< 8'b00101100
whismanoid 23:e0c36767f98b 360 CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5 = 0x2d, //!< 8'b00101101
whismanoid 23:e0c36767f98b 361 CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6 = 0x2e, //!< 8'b00101110
whismanoid 23:e0c36767f98b 362 CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7 = 0x2f, //!< 8'b00101111
whismanoid 23:e0c36767f98b 363 CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0 = 0x30, //!< 8'b00110000
whismanoid 23:e0c36767f98b 364 CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1 = 0x31, //!< 8'b00110001
whismanoid 23:e0c36767f98b 365 CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2 = 0x32, //!< 8'b00110010
whismanoid 23:e0c36767f98b 366 CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3 = 0x33, //!< 8'b00110011
whismanoid 23:e0c36767f98b 367 CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4 = 0x34, //!< 8'b00110100
whismanoid 23:e0c36767f98b 368 CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5 = 0x35, //!< 8'b00110101
whismanoid 23:e0c36767f98b 369 CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6 = 0x36, //!< 8'b00110110
whismanoid 23:e0c36767f98b 370 CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7 = 0x37, //!< 8'b00110111
whismanoid 23:e0c36767f98b 371 CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS = 0x38, //!< 8'b00111000
whismanoid 23:e0c36767f98b 372 CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE = 0x39, //!< 8'b00111001
whismanoid 23:e0c36767f98b 373 CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 8'b00111010
whismanoid 23:e0c36767f98b 374 CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 8'b00111011
whismanoid 23:e0c36767f98b 375 CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 8'b00111100
whismanoid 23:e0c36767f98b 376 CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 8'b00111101
whismanoid 23:e0c36767f98b 377 CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 8'b00111110
whismanoid 23:e0c36767f98b 378 CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 8'b00111111
whismanoid 23:e0c36767f98b 379 CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 8'b01000000
whismanoid 23:e0c36767f98b 380 CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 8'b01000001
whismanoid 23:e0c36767f98b 381 CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 8'b01000010
whismanoid 23:e0c36767f98b 382 CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 8'b01000011
whismanoid 23:e0c36767f98b 383 CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 8'b01000100
whismanoid 23:e0c36767f98b 384 CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 8'b01000101
whismanoid 23:e0c36767f98b 385 CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 8'b01000110
whismanoid 23:e0c36767f98b 386 CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 8'b01000111
whismanoid 23:e0c36767f98b 387 CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 8'b01001000
whismanoid 23:e0c36767f98b 388 CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 8'b01001001
whismanoid 23:e0c36767f98b 389 CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 8'b01001010
whismanoid 23:e0c36767f98b 390 CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 8'b01001011
whismanoid 23:e0c36767f98b 391 CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 8'b01001100
whismanoid 23:e0c36767f98b 392 CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 8'b01001101
whismanoid 23:e0c36767f98b 393 CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 8'b01001110
whismanoid 23:e0c36767f98b 394 CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 8'b01001111
whismanoid 23:e0c36767f98b 395 CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 8'b01010000
whismanoid 23:e0c36767f98b 396 CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 8'b01010001
whismanoid 23:e0c36767f98b 397 CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 8'b01010010
whismanoid 23:e0c36767f98b 398 CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 8'b01010011
whismanoid 23:e0c36767f98b 399 CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 8'b01010100
whismanoid 23:e0c36767f98b 400 CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 8'b01010101
whismanoid 23:e0c36767f98b 401 CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 8'b01010110
whismanoid 23:e0c36767f98b 402 CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 8'b01010111
whismanoid 23:e0c36767f98b 403 CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 8'b01011000
whismanoid 23:e0c36767f98b 404 CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 8'b01011001
whismanoid 23:e0c36767f98b 405 CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 8'b01011010
whismanoid 23:e0c36767f98b 406 CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 8'b01011011
whismanoid 23:e0c36767f98b 407 CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 8'b01011100
whismanoid 23:e0c36767f98b 408 CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 8'b01011101
whismanoid 23:e0c36767f98b 409 CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 8'b01011110
whismanoid 23:e0c36767f98b 410 CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 8'b01011111
whismanoid 23:e0c36767f98b 411 CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 8'b01100000
whismanoid 23:e0c36767f98b 412 CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 8'b01100001
whismanoid 23:e0c36767f98b 413 CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 8'b01100010
whismanoid 23:e0c36767f98b 414 CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 8'b01100011
whismanoid 23:e0c36767f98b 415 CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 8'b01100100
whismanoid 23:e0c36767f98b 416 CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 8'b01100101
whismanoid 23:e0c36767f98b 417 CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 8'b01100110
whismanoid 23:e0c36767f98b 418 CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 8'b01100111
whismanoid 23:e0c36767f98b 419 CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 8'b01101000
whismanoid 23:e0c36767f98b 420 CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 8'b01101001
whismanoid 23:e0c36767f98b 421 CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 8'b01101010
whismanoid 23:e0c36767f98b 422 CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 8'b01101011
whismanoid 23:e0c36767f98b 423 CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 8'b01101100
whismanoid 23:e0c36767f98b 424 CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 8'b01101101
whismanoid 23:e0c36767f98b 425 CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 8'b01101110
whismanoid 23:e0c36767f98b 426 CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR = 0x6f, //!< 8'b01101111
whismanoid 23:e0c36767f98b 427 CMD_1aaa_aaaa_REGISTER_READ = 0x80, //!< 8'b10000000
whismanoid 23:e0c36767f98b 428 } MAX11410_CMD_enum_t;
whismanoid 23:e0c36767f98b 429
whismanoid 23:e0c36767f98b 430 // CODE GENERATOR: TypedefEnum MAX11410_SEQ_ADDR_enum_t
whismanoid 23:e0c36767f98b 431 //----------------------------------------
whismanoid 23:e0c36767f98b 432 /// Microcode Sequencer Addresses.
whismanoid 23:e0c36767f98b 433 /// CMD_r000_0010_xddd_dddd_SEQ_START
whismanoid 23:e0c36767f98b 434 /// CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR
whismanoid 23:e0c36767f98b 435 ///
whismanoid 23:e0c36767f98b 436 /// Naming convention is CMD_bitstream_FUNCTION_NAME
whismanoid 23:e0c36767f98b 437 /// - xaaa_aaaa = 7-bit register address field
whismanoid 23:e0c36767f98b 438 /// - dddd_dddd = 8-bit register data field
whismanoid 23:e0c36767f98b 439 /// - xxxx = don't care
whismanoid 23:e0c36767f98b 440 typedef enum MAX11410_SEQ_ADDR_enum_t {
whismanoid 23:e0c36767f98b 441 SEQ_ADDR_r011_1010_xaaa_aaaa_dddd_dddd_UC_0 = 0x3a, //!< 8'b00111010
whismanoid 23:e0c36767f98b 442 SEQ_ADDR_r011_1011_xaaa_aaaa_dddd_dddd_UC_1 = 0x3b, //!< 8'b00111011
whismanoid 23:e0c36767f98b 443 SEQ_ADDR_r011_1100_xaaa_aaaa_dddd_dddd_UC_2 = 0x3c, //!< 8'b00111100
whismanoid 23:e0c36767f98b 444 SEQ_ADDR_r011_1101_xaaa_aaaa_dddd_dddd_UC_3 = 0x3d, //!< 8'b00111101
whismanoid 23:e0c36767f98b 445 SEQ_ADDR_r011_1110_xaaa_aaaa_dddd_dddd_UC_4 = 0x3e, //!< 8'b00111110
whismanoid 23:e0c36767f98b 446 SEQ_ADDR_r011_1111_xaaa_aaaa_dddd_dddd_UC_5 = 0x3f, //!< 8'b00111111
whismanoid 23:e0c36767f98b 447 SEQ_ADDR_r100_0000_xaaa_aaaa_dddd_dddd_UC_6 = 0x40, //!< 8'b01000000
whismanoid 23:e0c36767f98b 448 SEQ_ADDR_r100_0001_xaaa_aaaa_dddd_dddd_UC_7 = 0x41, //!< 8'b01000001
whismanoid 23:e0c36767f98b 449 SEQ_ADDR_r100_0010_xaaa_aaaa_dddd_dddd_UC_8 = 0x42, //!< 8'b01000010
whismanoid 23:e0c36767f98b 450 SEQ_ADDR_r100_0011_xaaa_aaaa_dddd_dddd_UC_9 = 0x43, //!< 8'b01000011
whismanoid 23:e0c36767f98b 451 SEQ_ADDR_r100_0100_xaaa_aaaa_dddd_dddd_UC_10 = 0x44, //!< 8'b01000100
whismanoid 23:e0c36767f98b 452 SEQ_ADDR_r100_0101_xaaa_aaaa_dddd_dddd_UC_11 = 0x45, //!< 8'b01000101
whismanoid 23:e0c36767f98b 453 SEQ_ADDR_r100_0110_xaaa_aaaa_dddd_dddd_UC_12 = 0x46, //!< 8'b01000110
whismanoid 23:e0c36767f98b 454 SEQ_ADDR_r100_0111_xaaa_aaaa_dddd_dddd_UC_13 = 0x47, //!< 8'b01000111
whismanoid 23:e0c36767f98b 455 SEQ_ADDR_r100_1000_xaaa_aaaa_dddd_dddd_UC_14 = 0x48, //!< 8'b01001000
whismanoid 23:e0c36767f98b 456 SEQ_ADDR_r100_1001_xaaa_aaaa_dddd_dddd_UC_15 = 0x49, //!< 8'b01001001
whismanoid 23:e0c36767f98b 457 SEQ_ADDR_r100_1010_xaaa_aaaa_dddd_dddd_UC_16 = 0x4a, //!< 8'b01001010
whismanoid 23:e0c36767f98b 458 SEQ_ADDR_r100_1011_xaaa_aaaa_dddd_dddd_UC_17 = 0x4b, //!< 8'b01001011
whismanoid 23:e0c36767f98b 459 SEQ_ADDR_r100_1100_xaaa_aaaa_dddd_dddd_UC_18 = 0x4c, //!< 8'b01001100
whismanoid 23:e0c36767f98b 460 SEQ_ADDR_r100_1101_xaaa_aaaa_dddd_dddd_UC_19 = 0x4d, //!< 8'b01001101
whismanoid 23:e0c36767f98b 461 SEQ_ADDR_r100_1110_xaaa_aaaa_dddd_dddd_UC_20 = 0x4e, //!< 8'b01001110
whismanoid 23:e0c36767f98b 462 SEQ_ADDR_r100_1111_xaaa_aaaa_dddd_dddd_UC_21 = 0x4f, //!< 8'b01001111
whismanoid 23:e0c36767f98b 463 SEQ_ADDR_r101_0000_xaaa_aaaa_dddd_dddd_UC_22 = 0x50, //!< 8'b01010000
whismanoid 23:e0c36767f98b 464 SEQ_ADDR_r101_0001_xaaa_aaaa_dddd_dddd_UC_23 = 0x51, //!< 8'b01010001
whismanoid 23:e0c36767f98b 465 SEQ_ADDR_r101_0010_xaaa_aaaa_dddd_dddd_UC_24 = 0x52, //!< 8'b01010010
whismanoid 23:e0c36767f98b 466 SEQ_ADDR_r101_0011_xaaa_aaaa_dddd_dddd_UC_25 = 0x53, //!< 8'b01010011
whismanoid 23:e0c36767f98b 467 SEQ_ADDR_r101_0100_xaaa_aaaa_dddd_dddd_UC_26 = 0x54, //!< 8'b01010100
whismanoid 23:e0c36767f98b 468 SEQ_ADDR_r101_0101_xaaa_aaaa_dddd_dddd_UC_27 = 0x55, //!< 8'b01010101
whismanoid 23:e0c36767f98b 469 SEQ_ADDR_r101_0110_xaaa_aaaa_dddd_dddd_UC_28 = 0x56, //!< 8'b01010110
whismanoid 23:e0c36767f98b 470 SEQ_ADDR_r101_0111_xaaa_aaaa_dddd_dddd_UC_29 = 0x57, //!< 8'b01010111
whismanoid 23:e0c36767f98b 471 SEQ_ADDR_r101_1000_xaaa_aaaa_dddd_dddd_UC_30 = 0x58, //!< 8'b01011000
whismanoid 23:e0c36767f98b 472 SEQ_ADDR_r101_1001_xaaa_aaaa_dddd_dddd_UC_31 = 0x59, //!< 8'b01011001
whismanoid 23:e0c36767f98b 473 SEQ_ADDR_r101_1010_xaaa_aaaa_dddd_dddd_UC_32 = 0x5a, //!< 8'b01011010
whismanoid 23:e0c36767f98b 474 SEQ_ADDR_r101_1011_xaaa_aaaa_dddd_dddd_UC_33 = 0x5b, //!< 8'b01011011
whismanoid 23:e0c36767f98b 475 SEQ_ADDR_r101_1100_xaaa_aaaa_dddd_dddd_UC_34 = 0x5c, //!< 8'b01011100
whismanoid 23:e0c36767f98b 476 SEQ_ADDR_r101_1101_xaaa_aaaa_dddd_dddd_UC_35 = 0x5d, //!< 8'b01011101
whismanoid 23:e0c36767f98b 477 SEQ_ADDR_r101_1110_xaaa_aaaa_dddd_dddd_UC_36 = 0x5e, //!< 8'b01011110
whismanoid 23:e0c36767f98b 478 SEQ_ADDR_r101_1111_xaaa_aaaa_dddd_dddd_UC_37 = 0x5f, //!< 8'b01011111
whismanoid 23:e0c36767f98b 479 SEQ_ADDR_r110_0000_xaaa_aaaa_dddd_dddd_UC_38 = 0x60, //!< 8'b01100000
whismanoid 23:e0c36767f98b 480 SEQ_ADDR_r110_0001_xaaa_aaaa_dddd_dddd_UC_39 = 0x61, //!< 8'b01100001
whismanoid 23:e0c36767f98b 481 SEQ_ADDR_r110_0010_xaaa_aaaa_dddd_dddd_UC_40 = 0x62, //!< 8'b01100010
whismanoid 23:e0c36767f98b 482 SEQ_ADDR_r110_0011_xaaa_aaaa_dddd_dddd_UC_41 = 0x63, //!< 8'b01100011
whismanoid 23:e0c36767f98b 483 SEQ_ADDR_r110_0100_xaaa_aaaa_dddd_dddd_UC_42 = 0x64, //!< 8'b01100100
whismanoid 23:e0c36767f98b 484 SEQ_ADDR_r110_0101_xaaa_aaaa_dddd_dddd_UC_43 = 0x65, //!< 8'b01100101
whismanoid 23:e0c36767f98b 485 SEQ_ADDR_r110_0110_xaaa_aaaa_dddd_dddd_UC_44 = 0x66, //!< 8'b01100110
whismanoid 23:e0c36767f98b 486 SEQ_ADDR_r110_0111_xaaa_aaaa_dddd_dddd_UC_45 = 0x67, //!< 8'b01100111
whismanoid 23:e0c36767f98b 487 SEQ_ADDR_r110_1000_xaaa_aaaa_dddd_dddd_UC_46 = 0x68, //!< 8'b01101000
whismanoid 23:e0c36767f98b 488 SEQ_ADDR_r110_1001_xaaa_aaaa_dddd_dddd_UC_47 = 0x69, //!< 8'b01101001
whismanoid 23:e0c36767f98b 489 SEQ_ADDR_r110_1010_xaaa_aaaa_dddd_dddd_UC_48 = 0x6a, //!< 8'b01101010
whismanoid 23:e0c36767f98b 490 SEQ_ADDR_r110_1011_xaaa_aaaa_dddd_dddd_UC_49 = 0x6b, //!< 8'b01101011
whismanoid 23:e0c36767f98b 491 SEQ_ADDR_r110_1100_xaaa_aaaa_dddd_dddd_UC_50 = 0x6c, //!< 8'b01101100
whismanoid 23:e0c36767f98b 492 SEQ_ADDR_r110_1101_xaaa_aaaa_dddd_dddd_UC_51 = 0x6d, //!< 8'b01101101
whismanoid 23:e0c36767f98b 493 SEQ_ADDR_r110_1110_xaaa_aaaa_dddd_dddd_UC_52 = 0x6e, //!< 8'b01101110
whismanoid 23:e0c36767f98b 494 } MAX11410_SEQ_ADDR_enum_t;
whismanoid 23:e0c36767f98b 495
whismanoid 23:e0c36767f98b 496 // CODE GENERATOR: TypedefEnum MAX11410_PD_enum_t
whismanoid 23:e0c36767f98b 497 //----------------------------------------
whismanoid 23:e0c36767f98b 498 /// Power-down state command
whismanoid 23:e0c36767f98b 499 /// CMD_r000_0000_xxxx_xxdd_PD PD[1:0] field
whismanoid 23:e0c36767f98b 500 ///
whismanoid 23:e0c36767f98b 501 /// - 00: Normal mode
whismanoid 23:e0c36767f98b 502 /// - 01: Standby mode -- Powers down all analog circuity, but not the internal voltage regulator
whismanoid 23:e0c36767f98b 503 /// - 10: Sleep mode -- Powers down all analog circuitry including the internal voltage regulator
whismanoid 23:e0c36767f98b 504 /// - 11: Reset -- all registers reset to POR state (Self Clearing to 01 Standby mode)
whismanoid 23:e0c36767f98b 505 typedef enum MAX11410_PD_enum_t {
whismanoid 23:e0c36767f98b 506 PD_00_Normal = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 507 PD_01_Standby = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 508 PD_10_Sleep = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 509 PD_11_Reset = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 510 } MAX11410_PD_enum_t;
whismanoid 23:e0c36767f98b 511
whismanoid 23:e0c36767f98b 512 // CODE GENERATOR: TypedefEnum MAX11410_DEST_enum_t
whismanoid 23:e0c36767f98b 513 //----------------------------------------
whismanoid 23:e0c36767f98b 514 /// Conversion / seqeuncer start command
whismanoid 23:e0c36767f98b 515 /// CMD_r000_0001_xddd_xxdd_CONV_START DEST[2:0] field.
whismanoid 23:e0c36767f98b 516 /// CMD_r000_0110_xddd_xxdd_GP_CONV GP_DEST[2:0] field.
whismanoid 23:e0c36767f98b 517 ///
whismanoid 23:e0c36767f98b 518 /// - 000: Store result in DATA0
whismanoid 23:e0c36767f98b 519 /// - 001: Store result in DATA1
whismanoid 23:e0c36767f98b 520 /// - 010: Store result in DATA2
whismanoid 23:e0c36767f98b 521 /// - 011: Store result in DATA3
whismanoid 23:e0c36767f98b 522 /// - 100: Store result in DATA4
whismanoid 23:e0c36767f98b 523 /// - 101: Store result in DATA5
whismanoid 23:e0c36767f98b 524 /// - 110: Store result in DATA6
whismanoid 23:e0c36767f98b 525 /// - 111: Store result in DATA7
whismanoid 23:e0c36767f98b 526 typedef enum MAX11410_DEST_enum_t {
whismanoid 23:e0c36767f98b 527 DEST_000_DATA0 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 528 DEST_001_DATA1 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 529 DEST_010_DATA2 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 530 DEST_011_DATA3 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 531 DEST_100_DATA4 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 532 DEST_101_DATA5 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 533 DEST_110_DATA6 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 534 DEST_111_DATA7 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 535 } MAX11410_DEST_enum_t;
whismanoid 23:e0c36767f98b 536
whismanoid 23:e0c36767f98b 537 // CODE GENERATOR: TypedefEnum MAX11410_CONV_TYPE_enum_t
whismanoid 23:e0c36767f98b 538 //----------------------------------------
whismanoid 23:e0c36767f98b 539 /// Conversion / seqeuncer start command
whismanoid 23:e0c36767f98b 540 /// CMD_r000_0001_xddd_xxdd_CONV_START CONV_TYPE[1:0] field.
whismanoid 23:e0c36767f98b 541 /// CMD_r000_0110_xddd_xxdd_GP_CONV GP_CONV_TYPE[2:0] field.
whismanoid 23:e0c36767f98b 542 ///
whismanoid 23:e0c36767f98b 543 /// - 00: Single conversion
whismanoid 23:e0c36767f98b 544 /// - 01: Continuous conversions
whismanoid 23:e0c36767f98b 545 /// - 10, 11: 1:4 Duty cycled conversions (modulator low-power mode)
whismanoid 23:e0c36767f98b 546 typedef enum MAX11410_CONV_TYPE_enum_t {
whismanoid 23:e0c36767f98b 547 CONV_TYPE_00_Single = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 548 CONV_TYPE_01_Continuous = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 549 CONV_TYPE_10_DutyCycle_1_4 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 550 CONV_TYPE_11_DutyCycle_1_4 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 551 } MAX11410_CONV_TYPE_enum_t;
whismanoid 23:e0c36767f98b 552
whismanoid 23:e0c36767f98b 553 // CODE GENERATOR: TypedefEnum MAX11410_CAL_TYPE_enum_t
whismanoid 23:e0c36767f98b 554 //----------------------------------------
whismanoid 23:e0c36767f98b 555 /// Calbration command
whismanoid 23:e0c36767f98b 556 /// CMD_r000_0011_xxxx_xddd_CAL_START CAL_TYPE[2:0] field
whismanoid 23:e0c36767f98b 557 ///
whismanoid 23:e0c36767f98b 558 /// - 000: Performs a self-calibration. Resulting offset calibration value is stored in the SELF_OFF register, and the 1x gain calibration value is stored in the SELF_GAIN_1 register.
whismanoid 23:e0c36767f98b 559 /// - 001: Performs a PGA gain calibration at the currently programmed PGA gain. A 'No Op' will result if PGA Gain calibration is executed with the PGA disabled via the SIG_PATH register, or with the GAIN register set to 1x.The resulting gain calibration value is stored in the SELF_GAIN_[2-128] register corresponding to the currently programmed PGA GAIN setting.
whismanoid 23:e0c36767f98b 560 /// - 010: Reserved
whismanoid 23:e0c36767f98b 561 /// - 011: Reserved
whismanoid 23:e0c36767f98b 562 /// - 100: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_A register.
whismanoid 23:e0c36767f98b 563 /// - 101: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_A register.
whismanoid 23:e0c36767f98b 564 /// - 110: Performs a system offset calibration. The resulting calibration value is stored in the SYS_OFF_B register.
whismanoid 23:e0c36767f98b 565 /// - 111: Performs a system gain calibration. The resulting calibration value is stored in the SYS_GAIN_B register.
whismanoid 23:e0c36767f98b 566 typedef enum MAX11410_CAL_TYPE_enum_t {
whismanoid 23:e0c36767f98b 567 CAL_TYPE_000_SELF_CAL = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 568 CAL_TYPE_001_PGA_GAIN = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 569 CAL_TYPE_010_reserved = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 570 CAL_TYPE_011_reserved = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 571 CAL_TYPE_100_SYS_OFF_A = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 572 CAL_TYPE_101_SYS_GAIN_A = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 573 CAL_TYPE_110_SYS_OFF_B = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 574 CAL_TYPE_111_SYS_GAIN_B = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 575 } MAX11410_CAL_TYPE_enum_t;
whismanoid 23:e0c36767f98b 576
whismanoid 23:e0c36767f98b 577 // CODE GENERATOR: TypedefEnum MAX11410_GP0_DIR_enum_t
whismanoid 23:e0c36767f98b 578 //----------------------------------------
whismanoid 23:e0c36767f98b 579 /// GPIO0 pin command
whismanoid 23:e0c36767f98b 580 /// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_DIR[1:0] field
whismanoid 23:e0c36767f98b 581 ///
whismanoid 23:e0c36767f98b 582 /// - 00: Input mode, reference to VDDIO (default)
whismanoid 23:e0c36767f98b 583 /// - 01: Reserved
whismanoid 23:e0c36767f98b 584 /// - 10: Output mode, open-drain output
whismanoid 23:e0c36767f98b 585 /// - 11: Output mode, CMOS output
whismanoid 23:e0c36767f98b 586 typedef enum MAX11410_GP0_DIR_enum_t {
whismanoid 23:e0c36767f98b 587 GP0_DIR_000_Input = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 588 GP0_DIR_001_reserved = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 589 GP0_DIR_010_OutputOpenDrain = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 590 GP0_DIR_011_Output = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 591 } MAX11410_GP0_DIR_enum_t;
whismanoid 23:e0c36767f98b 592
whismanoid 23:e0c36767f98b 593 // CODE GENERATOR: TypedefEnum MAX11410_GP0_ISEL_enum_t
whismanoid 23:e0c36767f98b 594 //----------------------------------------
whismanoid 23:e0c36767f98b 595 /// GPIO0 pin command
whismanoid 23:e0c36767f98b 596 /// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_ISEL[1:0] field
whismanoid 23:e0c36767f98b 597 ///
whismanoid 23:e0c36767f98b 598 /// - 00: GPIO_0 input disabled (default)
whismanoid 23:e0c36767f98b 599 /// - 01: GPIO_0 input configured as rising-edge-triggered conversion start
whismanoid 23:e0c36767f98b 600 /// - 10: GPIO_0 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
whismanoid 23:e0c36767f98b 601 /// - 11: Reserved
whismanoid 23:e0c36767f98b 602 typedef enum MAX11410_GP0_ISEL_enum_t {
whismanoid 23:e0c36767f98b 603 GP0_ISEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 604 GP0_ISEL_001_TRIGGER_CONV_START = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 605 GP0_ISEL_010_TRIGGER_SEQ_START = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 606 GP0_ISEL_011_reserved = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 607 } MAX11410_GP0_ISEL_enum_t;
whismanoid 23:e0c36767f98b 608
whismanoid 23:e0c36767f98b 609 // CODE GENERATOR: TypedefEnum MAX11410_GP0_OSEL_enum_t
whismanoid 23:e0c36767f98b 610 //----------------------------------------
whismanoid 23:e0c36767f98b 611 /// GPIO0 pin command
whismanoid 23:e0c36767f98b 612 /// CMD_r000_0100_dddd_xddd_GP0_CTRL GP0_OSEL[2:0] field
whismanoid 23:e0c36767f98b 613 ///
whismanoid 23:e0c36767f98b 614 /// - 000: GPIO_0 output disabled, high Z (default)
whismanoid 23:e0c36767f98b 615 /// - 001: GPIO_0 output is configured as INTRB (active low)
whismanoid 23:e0c36767f98b 616 /// - 010: GPIO_0 output is configured as INTR (active high)
whismanoid 23:e0c36767f98b 617 /// - 011: GPIO_0 output is configured as state Logic 0
whismanoid 23:e0c36767f98b 618 /// - 100: GPIO_0 output is configured as state Logic 1
whismanoid 23:e0c36767f98b 619 /// - 101: GPIO_0 output is configured as automatic low-side switch operation (CMOS output mode overridden)
whismanoid 23:e0c36767f98b 620 /// - 110: GPIO_0 output is configured as modulator active status
whismanoid 23:e0c36767f98b 621 /// - 111: GPIO_0 output is configured as system clock (2.456Mhz Nominal)
whismanoid 23:e0c36767f98b 622 typedef enum MAX11410_GP0_OSEL_enum_t {
whismanoid 23:e0c36767f98b 623 GP0_OSEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 624 GP0_OSEL_001_INTRB = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 625 GP0_OSEL_010_INTR = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 626 GP0_OSEL_011_LOGIC_0 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 627 GP0_OSEL_100_LOGIC_1 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 628 GP0_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 629 GP0_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 630 GP0_OSEL_111_CLOCK_2M456 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 631 } MAX11410_GP0_OSEL_enum_t;
whismanoid 23:e0c36767f98b 632
whismanoid 23:e0c36767f98b 633 // CODE GENERATOR: TypedefEnum MAX11410_GP1_DIR_enum_t
whismanoid 23:e0c36767f98b 634 //----------------------------------------
whismanoid 23:e0c36767f98b 635 /// GPIO1 pin command
whismanoid 23:e0c36767f98b 636 /// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_DIR[1:0] field
whismanoid 23:e0c36767f98b 637 ///
whismanoid 23:e0c36767f98b 638 /// - 00: Input mode, reference to VDDIO (default)
whismanoid 23:e0c36767f98b 639 /// - 01: Reserved
whismanoid 23:e0c36767f98b 640 /// - 10: Output mode, open-drain output
whismanoid 23:e0c36767f98b 641 /// - 11: Output mode, CMOS output
whismanoid 23:e0c36767f98b 642 typedef enum MAX11410_GP1_DIR_enum_t {
whismanoid 23:e0c36767f98b 643 GP1_DIR_000_Input = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 644 GP1_DIR_001_reserved = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 645 GP1_DIR_010_OutputOpenDrain = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 646 GP1_DIR_011_Output = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 647 } MAX11410_GP1_DIR_enum_t;
whismanoid 23:e0c36767f98b 648
whismanoid 23:e0c36767f98b 649 // CODE GENERATOR: TypedefEnum MAX11410_GP1_ISEL_enum_t
whismanoid 23:e0c36767f98b 650 //----------------------------------------
whismanoid 23:e0c36767f98b 651 /// GPIO1 pin command
whismanoid 23:e0c36767f98b 652 /// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_ISEL[1:0] field
whismanoid 23:e0c36767f98b 653 ///
whismanoid 23:e0c36767f98b 654 /// - 00: GPIO_1 input disabled (default)
whismanoid 23:e0c36767f98b 655 /// - 01: GPIO_1 input configured as rising-edge-triggered conversion start
whismanoid 23:e0c36767f98b 656 /// - 10: GPIO_1 input configured as rising-edge-triggered sequence start from GP_SEQ_ADDR
whismanoid 23:e0c36767f98b 657 /// - 11: Reserved
whismanoid 23:e0c36767f98b 658 typedef enum MAX11410_GP1_ISEL_enum_t {
whismanoid 23:e0c36767f98b 659 GP1_ISEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 660 GP1_ISEL_001_TRIGGER_CONV_START = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 661 GP1_ISEL_010_TRIGGER_SEQ_START = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 662 GP1_ISEL_011_reserved = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 663 } MAX11410_GP1_ISEL_enum_t;
whismanoid 23:e0c36767f98b 664
whismanoid 23:e0c36767f98b 665 // CODE GENERATOR: TypedefEnum MAX11410_GP1_OSEL_enum_t
whismanoid 23:e0c36767f98b 666 //----------------------------------------
whismanoid 23:e0c36767f98b 667 /// GPIO1 pin command
whismanoid 23:e0c36767f98b 668 /// CMD_r000_0101_dddd_xddd_GP1_CTRL GP1_OSEL[2:0] field
whismanoid 23:e0c36767f98b 669 ///
whismanoid 23:e0c36767f98b 670 /// - 000: GPIO_1 output disabled, high Z (default)
whismanoid 23:e0c36767f98b 671 /// - 001: GPIO_1 output is configured as INTRB (active low)
whismanoid 23:e0c36767f98b 672 /// - 010: GPIO_1 output is configured as INTR (active high)
whismanoid 23:e0c36767f98b 673 /// - 011: GPIO_1 output is configured as state Logic 0
whismanoid 23:e0c36767f98b 674 /// - 100: GPIO_1 output is configured as state Logic 1
whismanoid 23:e0c36767f98b 675 /// - 101: GPIO_1 output is configured as system clock (2.456Mhz Nominal)
whismanoid 23:e0c36767f98b 676 /// - 110: GPIO_1 output is configured as modulator active status
whismanoid 23:e0c36767f98b 677 /// - 111: GPIO_1 output is configured as automatic low-side switch operation (CMOS output mode overridden)
whismanoid 23:e0c36767f98b 678 typedef enum MAX11410_GP1_OSEL_enum_t {
whismanoid 23:e0c36767f98b 679 GP1_OSEL_000_disabled = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 680 GP1_OSEL_001_INTRB = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 681 GP1_OSEL_010_INTR = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 682 GP1_OSEL_011_LOGIC_0 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 683 GP1_OSEL_100_LOGIC_1 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 684 GP1_OSEL_101_AUTO_LOWSIDE_SWITCH = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 685 GP1_OSEL_110_MODULATOR_ACTIVE_STATUS = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 686 GP1_OSEL_111_CLOCK_2M456 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 687 } MAX11410_GP1_OSEL_enum_t;
whismanoid 23:e0c36767f98b 688
whismanoid 23:e0c36767f98b 689 // CODE GENERATOR: TypedefEnum MAX11410_LINEF_enum_t
whismanoid 23:e0c36767f98b 690 //----------------------------------------
whismanoid 23:e0c36767f98b 691 /// Filter command
whismanoid 23:e0c36767f98b 692 /// CMD_r000_1000_x0dd_dddd_FILTER LINEF[1:0] field
whismanoid 23:e0c36767f98b 693 ///
whismanoid 23:e0c36767f98b 694 /// - 00: Simultaneous 50/60Hz FIR rejection (default)
whismanoid 23:e0c36767f98b 695 /// - 01: 50Hz FIR rejection
whismanoid 23:e0c36767f98b 696 /// - 10: 60Hz FIR rejection
whismanoid 23:e0c36767f98b 697 /// - 11: SINC4
whismanoid 23:e0c36767f98b 698 typedef enum MAX11410_LINEF_enum_t {
whismanoid 23:e0c36767f98b 699 LINEF_00_50Hz_60Hz_FIR = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 700 LINEF_01_50Hz_FIR = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 701 LINEF_10_60Hz_FIR = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 702 LINEF_11_SINC4 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 703 } MAX11410_LINEF_enum_t;
whismanoid 23:e0c36767f98b 704
whismanoid 23:e0c36767f98b 705 // CODE GENERATOR: TypedefEnum MAX11410_RATE_enum_t
whismanoid 23:e0c36767f98b 706 //----------------------------------------
whismanoid 23:e0c36767f98b 707 /// Filter command
whismanoid 23:e0c36767f98b 708 /// CMD_r000_1000_x0dd_dddd_FILTER RATE[3:0] field
whismanoid 23:e0c36767f98b 709 ///
whismanoid 23:e0c36767f98b 710 /// Sets conversion rate based on LINEF value. See Table 9a through Table 9d for details.
whismanoid 23:e0c36767f98b 711 ///
whismanoid 23:e0c36767f98b 712 /// Table 9a. LINEF = 00 Data Rate and Filter Rejection Settings
whismanoid 23:e0c36767f98b 713 ///
whismanoid 23:e0c36767f98b 714 /// Rate | LINEF | CONV_TYPE | Rate
whismanoid 23:e0c36767f98b 715 /// -----------|------------------------|----------------------------|----------
whismanoid 23:e0c36767f98b 716 /// RATE_0000 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single | 1.0SPS
whismanoid 23:e0c36767f98b 717 /// RATE_0001 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single | 2.0SPS
whismanoid 23:e0c36767f98b 718 /// RATE_0010 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single | 4.0SPS
whismanoid 23:e0c36767f98b 719 /// RATE_0011 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single | 8.0SPS
whismanoid 23:e0c36767f98b 720 /// RATE_0100 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_00_Single | 16.0SPS
whismanoid 23:e0c36767f98b 721 /// RATE_0000 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous | 1.1SPS
whismanoid 23:e0c36767f98b 722 /// RATE_0001 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous | 2.1SPS
whismanoid 23:e0c36767f98b 723 /// RATE_0010 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous | 4.2SPS
whismanoid 23:e0c36767f98b 724 /// RATE_0011 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous | 8.4SPS
whismanoid 23:e0c36767f98b 725 /// RATE_0100 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_01_Continuous | 16.8SPS
whismanoid 23:e0c36767f98b 726 /// RATE_0000 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 0.3SPS
whismanoid 23:e0c36767f98b 727 /// RATE_0001 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 0.5SPS
whismanoid 23:e0c36767f98b 728 /// RATE_0010 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 1.1SPS
whismanoid 23:e0c36767f98b 729 /// RATE_0011 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 2.1SPS
whismanoid 23:e0c36767f98b 730 /// RATE_0100 | LINEF_00_50Hz_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 4.2SPS
whismanoid 23:e0c36767f98b 731 ///
whismanoid 23:e0c36767f98b 732 /// Table 9b. LINEF = 01 Data Rate and Filter Rejection Settings
whismanoid 23:e0c36767f98b 733 ///
whismanoid 23:e0c36767f98b 734 /// Rate | LINEF | CONV_TYPE | Rate
whismanoid 23:e0c36767f98b 735 /// ----------|------------------------|----------------------------|----------
whismanoid 23:e0c36767f98b 736 /// RATE_0000 | LINEF_01_50Hz_FIR | CONV_TYPE_00_Single | 1.3SPS
whismanoid 23:e0c36767f98b 737 /// RATE_0001 | LINEF_01_50Hz_FIR | CONV_TYPE_00_Single | 2.5SPS
whismanoid 23:e0c36767f98b 738 /// RATE_0010 | LINEF_01_50Hz_FIR | CONV_TYPE_00_Single | 5.0SPS
whismanoid 23:e0c36767f98b 739 /// RATE_0011 | LINEF_01_50Hz_FIR | CONV_TYPE_00_Single | 10.0SPS
whismanoid 23:e0c36767f98b 740 /// RATE_0100 | LINEF_01_50Hz_FIR | CONV_TYPE_00_Single | 20.0SPS
whismanoid 23:e0c36767f98b 741 /// RATE_0101 | LINEF_01_50Hz_FIR | CONV_TYPE_00_Single | 35.6SPS
whismanoid 23:e0c36767f98b 742 /// RATE_0000 | LINEF_01_50Hz_FIR | CONV_TYPE_01_Continuous | 1.3SPS
whismanoid 23:e0c36767f98b 743 /// RATE_0001 | LINEF_01_50Hz_FIR | CONV_TYPE_01_Continuous | 2.7SPS
whismanoid 23:e0c36767f98b 744 /// RATE_0010 | LINEF_01_50Hz_FIR | CONV_TYPE_01_Continuous | 5.3SPS
whismanoid 23:e0c36767f98b 745 /// RATE_0011 | LINEF_01_50Hz_FIR | CONV_TYPE_01_Continuous | 10.7SPS
whismanoid 23:e0c36767f98b 746 /// RATE_0100 | LINEF_01_50Hz_FIR | CONV_TYPE_01_Continuous | 21.3SPS
whismanoid 23:e0c36767f98b 747 /// RATE_0101 | LINEF_01_50Hz_FIR | CONV_TYPE_01_Continuous | 40.0SPS
whismanoid 23:e0c36767f98b 748 /// RATE_0000 | LINEF_01_50Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 0.3SPS
whismanoid 23:e0c36767f98b 749 /// RATE_0001 | LINEF_01_50Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 0.7SPS
whismanoid 23:e0c36767f98b 750 /// RATE_0010 | LINEF_01_50Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 1.3SPS
whismanoid 23:e0c36767f98b 751 /// RATE_0011 | LINEF_01_50Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 2.7SPS
whismanoid 23:e0c36767f98b 752 /// RATE_0100 | LINEF_01_50Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 5.3SPS
whismanoid 23:e0c36767f98b 753 /// RATE_0101 | LINEF_01_50Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 10.0SPS
whismanoid 23:e0c36767f98b 754 ///
whismanoid 23:e0c36767f98b 755 /// Table 9c. LINEF = 10 Data Rate and Filter Rejection Settings
whismanoid 23:e0c36767f98b 756 ///
whismanoid 23:e0c36767f98b 757 /// Rate | LINEF | CONV_TYPE | Rate
whismanoid 23:e0c36767f98b 758 /// ----------|------------------------|----------------------------|----------
whismanoid 23:e0c36767f98b 759 /// RATE_0000 | LINEF_10_60Hz_FIR | CONV_TYPE_00_Single | 1.3SPS
whismanoid 23:e0c36767f98b 760 /// RATE_0001 | LINEF_10_60Hz_FIR | CONV_TYPE_00_Single | 2.5SPS
whismanoid 23:e0c36767f98b 761 /// RATE_0010 | LINEF_10_60Hz_FIR | CONV_TYPE_00_Single | 5.0SPS
whismanoid 23:e0c36767f98b 762 /// RATE_0011 | LINEF_10_60Hz_FIR | CONV_TYPE_00_Single | 10.0SPS
whismanoid 23:e0c36767f98b 763 /// RATE_0100 | LINEF_10_60Hz_FIR | CONV_TYPE_00_Single | 20.0SPS
whismanoid 23:e0c36767f98b 764 /// RATE_0101 | LINEF_10_60Hz_FIR | CONV_TYPE_00_Single | 35.6SPS
whismanoid 23:e0c36767f98b 765 /// RATE_0000 | LINEF_10_60Hz_FIR | CONV_TYPE_01_Continuous | 1.3SPS
whismanoid 23:e0c36767f98b 766 /// RATE_0001 | LINEF_10_60Hz_FIR | CONV_TYPE_01_Continuous | 2.7SPS
whismanoid 23:e0c36767f98b 767 /// RATE_0010 | LINEF_10_60Hz_FIR | CONV_TYPE_01_Continuous | 5.3SPS
whismanoid 23:e0c36767f98b 768 /// RATE_0011 | LINEF_10_60Hz_FIR | CONV_TYPE_01_Continuous | 10.7SPS
whismanoid 23:e0c36767f98b 769 /// RATE_0100 | LINEF_10_60Hz_FIR | CONV_TYPE_01_Continuous | 21.3SPS
whismanoid 23:e0c36767f98b 770 /// RATE_0101 | LINEF_10_60Hz_FIR | CONV_TYPE_01_Continuous | 40.0SPS
whismanoid 23:e0c36767f98b 771 /// RATE_0000 | LINEF_10_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 0.3SPS
whismanoid 23:e0c36767f98b 772 /// RATE_0001 | LINEF_10_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 0.7SPS
whismanoid 23:e0c36767f98b 773 /// RATE_0010 | LINEF_10_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 1.3SPS
whismanoid 23:e0c36767f98b 774 /// RATE_0011 | LINEF_10_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 2.7SPS
whismanoid 23:e0c36767f98b 775 /// RATE_0100 | LINEF_10_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 5.3SPS
whismanoid 23:e0c36767f98b 776 /// RATE_0101 | LINEF_10_60Hz_FIR | CONV_TYPE_10_DutyCycle_1_4 | 10.0SPS
whismanoid 23:e0c36767f98b 777 ///
whismanoid 23:e0c36767f98b 778 /// Table 9d. LINEF = 11 Data Rate and Filter Rejection Settings
whismanoid 23:e0c36767f98b 779 ///
whismanoid 23:e0c36767f98b 780 /// Rate | LINEF | CONV_TYPE | Rate
whismanoid 23:e0c36767f98b 781 /// ----------|------------------------|----------------------------|----------
whismanoid 23:e0c36767f98b 782 /// RATE_0000 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 1SPS
whismanoid 23:e0c36767f98b 783 /// RATE_0001 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 2.5SPS
whismanoid 23:e0c36767f98b 784 /// RATE_0010 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 5SPS
whismanoid 23:e0c36767f98b 785 /// RATE_0011 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 10SPS
whismanoid 23:e0c36767f98b 786 /// RATE_0100 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 15SPS
whismanoid 23:e0c36767f98b 787 /// RATE_0101 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 30SPS
whismanoid 23:e0c36767f98b 788 /// RATE_0110 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 60SPS
whismanoid 23:e0c36767f98b 789 /// RATE_0111 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 120SPS
whismanoid 23:e0c36767f98b 790 /// RATE_1000 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 240SPS
whismanoid 23:e0c36767f98b 791 /// RATE_1001 | LINEF_11_SINC4 | CONV_TYPE_00_Single | 480SPS
whismanoid 23:e0c36767f98b 792 /// RATE_0000 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 4SPS
whismanoid 23:e0c36767f98b 793 /// RATE_0001 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 10SPS
whismanoid 23:e0c36767f98b 794 /// RATE_0010 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 20SPS
whismanoid 23:e0c36767f98b 795 /// RATE_0011 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 40SPS
whismanoid 23:e0c36767f98b 796 /// RATE_0100 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 60SPS
whismanoid 23:e0c36767f98b 797 /// RATE_0101 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 120SPS
whismanoid 23:e0c36767f98b 798 /// RATE_0110 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 240SPS
whismanoid 23:e0c36767f98b 799 /// RATE_0111 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 480SPS
whismanoid 23:e0c36767f98b 800 /// RATE_1000 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 960SPS
whismanoid 23:e0c36767f98b 801 /// RATE_1001 | LINEF_11_SINC4 | CONV_TYPE_01_Continuous | 1920SPS
whismanoid 23:e0c36767f98b 802 /// RATE_0000 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 1SPS
whismanoid 23:e0c36767f98b 803 /// RATE_0001 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 2.5SPS
whismanoid 23:e0c36767f98b 804 /// RATE_0010 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 5SPS
whismanoid 23:e0c36767f98b 805 /// RATE_0011 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 10SPS
whismanoid 23:e0c36767f98b 806 /// RATE_0100 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 15SPS
whismanoid 23:e0c36767f98b 807 /// RATE_0101 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 30SPS
whismanoid 23:e0c36767f98b 808 /// RATE_0110 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 60SPS
whismanoid 23:e0c36767f98b 809 /// RATE_0111 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 120SPS
whismanoid 23:e0c36767f98b 810 /// RATE_1000 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 240SPS
whismanoid 23:e0c36767f98b 811 /// RATE_1001 | LINEF_11_SINC4 | CONV_TYPE_10_DutyCycle_1_4 | 480SPS
whismanoid 23:e0c36767f98b 812 ///
whismanoid 23:e0c36767f98b 813 typedef enum MAX11410_RATE_enum_t {
whismanoid 23:e0c36767f98b 814 RATE_0000 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 815 RATE_0001 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 816 RATE_0010 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 817 RATE_0011 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 818 RATE_0100 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 819 RATE_0101 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 820 RATE_0110 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 821 RATE_0111 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 822 RATE_1000 = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 823 RATE_1001 = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 824 RATE_1010 = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 825 RATE_1011 = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 826 RATE_1100 = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 827 RATE_1101 = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 828 RATE_1110 = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 829 RATE_1111 = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 830 } MAX11410_RATE_enum_t;
whismanoid 23:e0c36767f98b 831
whismanoid 23:e0c36767f98b 832 // CODE GENERATOR: TypedefEnum MAX11410_REF_SEL_enum_t
whismanoid 23:e0c36767f98b 833 //----------------------------------------
whismanoid 23:e0c36767f98b 834 /// Filter command
whismanoid 23:e0c36767f98b 835 /// CMD_r000_1001_dddd_dddd_CTRL REF_SEL[2:0] field
whismanoid 23:e0c36767f98b 836 ///
whismanoid 23:e0c36767f98b 837 /// - 000: AIN0(REF0P)/AIN1(REF0N)
whismanoid 23:e0c36767f98b 838 /// - 001: REF1P/REF1N (default)
whismanoid 23:e0c36767f98b 839 /// - 010: REF2P/REF2N
whismanoid 23:e0c36767f98b 840 /// - 011: AVDD/AGND
whismanoid 23:e0c36767f98b 841 /// - 100: AIN0(REF0P)/AGND (single-ended mode)
whismanoid 23:e0c36767f98b 842 /// - 101: REF1P/AGND (single-ended mode)
whismanoid 23:e0c36767f98b 843 /// - 110: REF2P/AGND (single-ended mode)
whismanoid 23:e0c36767f98b 844 /// - 111: AVDD/AGND
whismanoid 23:e0c36767f98b 845 typedef enum MAX11410_REF_SEL_enum_t {
whismanoid 23:e0c36767f98b 846 REF_SEL_000_AIN0_AIN1 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 847 REF_SEL_001_REF1P_REF1N = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 848 REF_SEL_010_REF2P_REF2N = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 849 REF_SEL_011_AVDD_AGND = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 850 REF_SEL_100_AIN0_AGND = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 851 REF_SEL_101_REF1P_AGND = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 852 REF_SEL_110_REF2P_AGND = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 853 REF_SEL_111_AVDD_AGND = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 854 } MAX11410_REF_SEL_enum_t;
whismanoid 23:e0c36767f98b 855
whismanoid 23:e0c36767f98b 856 // CODE GENERATOR: TypedefEnum MAX11410_VBIAS_MODE_enum_t
whismanoid 23:e0c36767f98b 857 //----------------------------------------
whismanoid 23:e0c36767f98b 858 /// Source command
whismanoid 23:e0c36767f98b 859 /// CMD_r000_1010_dddd_dddd_SOURCE VBIAS_MODE[1:0] field
whismanoid 23:e0c36767f98b 860 ///
whismanoid 23:e0c36767f98b 861 /// - 00: Active mode (default)
whismanoid 23:e0c36767f98b 862 /// - 01: High impedance; 125kOhm output impedance
whismanoid 23:e0c36767f98b 863 /// - 10: Low impedance; 20kOhm output impedance
whismanoid 23:e0c36767f98b 864 /// - 11: Low impedance; 20kOhm output impedance
whismanoid 23:e0c36767f98b 865 typedef enum MAX11410_VBIAS_MODE_enum_t {
whismanoid 23:e0c36767f98b 866 VBIAS_MODE_00_Active = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 867 VBIAS_MODE_01_125kOhm = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 868 VBIAS_MODE_10_20kOhm = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 869 VBIAS_MODE_11_20kOhm = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 870 } MAX11410_VBIAS_MODE_enum_t;
whismanoid 23:e0c36767f98b 871
whismanoid 23:e0c36767f98b 872 // CODE GENERATOR: TypedefEnum MAX11410_BRN_MODE_enum_t
whismanoid 23:e0c36767f98b 873 //----------------------------------------
whismanoid 23:e0c36767f98b 874 /// Source command
whismanoid 23:e0c36767f98b 875 /// CMD_r000_1010_dddd_dddd_SOURCE BRN_MODE[1:0] field
whismanoid 23:e0c36767f98b 876 ///
whismanoid 23:e0c36767f98b 877 /// - 00: Powered down, burnout sources disabled (default)
whismanoid 23:e0c36767f98b 878 /// - 01: 0.5uA burnout current sources enabled
whismanoid 23:e0c36767f98b 879 /// - 10: 1uA burnout current sources enabled
whismanoid 23:e0c36767f98b 880 /// - 11: 10uA burnout current sources enabled
whismanoid 23:e0c36767f98b 881 typedef enum MAX11410_BRN_MODE_enum_t {
whismanoid 23:e0c36767f98b 882 BRN_MODE_00_disabled = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 883 BRN_MODE_01_0u5A = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 884 BRN_MODE_10_1uA = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 885 BRN_MODE_11_10uA = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 886 } MAX11410_BRN_MODE_enum_t;
whismanoid 23:e0c36767f98b 887
whismanoid 23:e0c36767f98b 888 // CODE GENERATOR: TypedefEnum MAX11410_IDAC_MODE_enum_t
whismanoid 23:e0c36767f98b 889 //----------------------------------------
whismanoid 23:e0c36767f98b 890 /// Source command
whismanoid 23:e0c36767f98b 891 /// CMD_r000_1010_dddd_dddd_SOURCE IDAC_MODE[3:0] field
whismanoid 23:e0c36767f98b 892 ///
whismanoid 23:e0c36767f98b 893 /// - 0000: 10uA (default)
whismanoid 23:e0c36767f98b 894 /// - 0001: 50uA
whismanoid 23:e0c36767f98b 895 /// - 0010: 75uA
whismanoid 23:e0c36767f98b 896 /// - 0011: 100uA
whismanoid 23:e0c36767f98b 897 /// - 0100: 125uA
whismanoid 23:e0c36767f98b 898 /// - 0101: 150uA
whismanoid 23:e0c36767f98b 899 /// - 0110: 175uA
whismanoid 23:e0c36767f98b 900 /// - 0111: 200uA
whismanoid 23:e0c36767f98b 901 /// - 1000: 225uA
whismanoid 23:e0c36767f98b 902 /// - 1001: 250uA
whismanoid 23:e0c36767f98b 903 /// - 1010: 300uA
whismanoid 23:e0c36767f98b 904 /// - 1011: 400uA
whismanoid 23:e0c36767f98b 905 /// - 1100: 600uA
whismanoid 23:e0c36767f98b 906 /// - 1101: 800uA
whismanoid 23:e0c36767f98b 907 /// - 1110: 1200uA
whismanoid 23:e0c36767f98b 908 /// - 1111: 1600uA
whismanoid 23:e0c36767f98b 909 typedef enum MAX11410_IDAC_MODE_enum_t {
whismanoid 23:e0c36767f98b 910 IDAC_MODE_0000_10uA = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 911 IDAC_MODE_0001_50uA = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 912 IDAC_MODE_0010_75uA = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 913 IDAC_MODE_0011_100uA = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 914 IDAC_MODE_0100_125uA = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 915 IDAC_MODE_0101_150uA = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 916 IDAC_MODE_0110_175uA = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 917 IDAC_MODE_0111_200uA = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 918 IDAC_MODE_1000_225uA = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 919 IDAC_MODE_1001_250uA = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 920 IDAC_MODE_1010_300uA = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 921 IDAC_MODE_1011_400uA = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 922 IDAC_MODE_1100_600uA = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 923 IDAC_MODE_1101_800uA = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 924 IDAC_MODE_1110_1200uA = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 925 IDAC_MODE_1111_1600uA = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 926 } MAX11410_IDAC_MODE_enum_t;
whismanoid 23:e0c36767f98b 927
whismanoid 23:e0c36767f98b 928 // CODE GENERATOR: TypedefEnum MAX11410_AINP_SEL_enum_t
whismanoid 23:e0c36767f98b 929 //----------------------------------------
whismanoid 23:e0c36767f98b 930 /// Input multiplexer channel selection
whismanoid 23:e0c36767f98b 931 /// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINP_SEL[3:0]
whismanoid 23:e0c36767f98b 932 ///
whismanoid 23:e0c36767f98b 933 /// - 0000: AINP = AIN0
whismanoid 23:e0c36767f98b 934 /// - 0001: AINP = AIN1
whismanoid 23:e0c36767f98b 935 /// - 0010: AINP = AIN2
whismanoid 23:e0c36767f98b 936 /// - 0011: AINP = AIN3
whismanoid 23:e0c36767f98b 937 /// - 0100: AINP = AIN4
whismanoid 23:e0c36767f98b 938 /// - 0101: AINP = AIN5
whismanoid 23:e0c36767f98b 939 /// - 0110: AINP = AIN6
whismanoid 23:e0c36767f98b 940 /// - 0111: AINP = AIN7
whismanoid 23:e0c36767f98b 941 /// - 1000: AINP = AIN8
whismanoid 23:e0c36767f98b 942 /// - 1001: AINP = AIN9
whismanoid 23:e0c36767f98b 943 /// - 1010: AINP = AVDD
whismanoid 23:e0c36767f98b 944 /// - 1011: AINN = Unconnected
whismanoid 23:e0c36767f98b 945 /// - 1100: AINN = Unconnected
whismanoid 23:e0c36767f98b 946 /// - 1101: AINN = Unconnected
whismanoid 23:e0c36767f98b 947 /// - 1110: AINN = Unconnected
whismanoid 23:e0c36767f98b 948 /// - 1111: AINN = Unconnected (default)
whismanoid 23:e0c36767f98b 949 typedef enum MAX11410_AINP_SEL_enum_t {
whismanoid 23:e0c36767f98b 950 AINP_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 951 AINP_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 952 AINP_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 953 AINP_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 954 AINP_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 955 AINP_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 956 AINP_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 957 AINP_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 958 AINP_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 959 AINP_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 960 AINP_SEL_1010_AVDD = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 961 AINP_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 962 AINP_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 963 AINP_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 964 AINP_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 965 AINP_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 966 } MAX11410_AINP_SEL_enum_t;
whismanoid 23:e0c36767f98b 967
whismanoid 23:e0c36767f98b 968 // CODE GENERATOR: TypedefEnum MAX11410_AINN_SEL_enum_t
whismanoid 23:e0c36767f98b 969 //----------------------------------------
whismanoid 23:e0c36767f98b 970 /// Input multiplexer channel selection
whismanoid 23:e0c36767f98b 971 /// CMD_r000_1011_dddd_dddd_MUX_CTRL0 field AINP_SEL[3:0]
whismanoid 23:e0c36767f98b 972 ///
whismanoid 23:e0c36767f98b 973 /// - 0000: AINN = AIN0
whismanoid 23:e0c36767f98b 974 /// - 0001: AINN = AIN1
whismanoid 23:e0c36767f98b 975 /// - 0010: AINN = AIN2
whismanoid 23:e0c36767f98b 976 /// - 0011: AINN = AIN3
whismanoid 23:e0c36767f98b 977 /// - 0100: AINN = AIN4
whismanoid 23:e0c36767f98b 978 /// - 0101: AINN = AIN5
whismanoid 23:e0c36767f98b 979 /// - 0110: AINN = AIN6
whismanoid 23:e0c36767f98b 980 /// - 0111: AINN = AIN7
whismanoid 23:e0c36767f98b 981 /// - 1000: AINN = AIN8
whismanoid 23:e0c36767f98b 982 /// - 1001: AINN = AIN9
whismanoid 23:e0c36767f98b 983 /// - 1010: AINN = GND
whismanoid 23:e0c36767f98b 984 /// - 1011: AINN = Unconnected
whismanoid 23:e0c36767f98b 985 /// - 1100: AINN = Unconnected
whismanoid 23:e0c36767f98b 986 /// - 1101: AINN = Unconnected
whismanoid 23:e0c36767f98b 987 /// - 1110: AINN = Unconnected
whismanoid 23:e0c36767f98b 988 /// - 1111: AINN = Unconnected (default)
whismanoid 23:e0c36767f98b 989 typedef enum MAX11410_AINN_SEL_enum_t {
whismanoid 23:e0c36767f98b 990 AINN_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 991 AINN_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 992 AINN_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 993 AINN_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 994 AINN_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 995 AINN_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 996 AINN_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 997 AINN_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 998 AINN_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 999 AINN_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 1000 AINN_SEL_1010_GND = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 1001 AINN_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 1002 AINN_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 1003 AINN_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 1004 AINN_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 1005 AINN_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 1006 } MAX11410_AINN_SEL_enum_t;
whismanoid 23:e0c36767f98b 1007
whismanoid 23:e0c36767f98b 1008 // CODE GENERATOR: TypedefEnum MAX11410_IDAC1_SEL_enum_t
whismanoid 23:e0c36767f98b 1009 //----------------------------------------
whismanoid 23:e0c36767f98b 1010 /// Input multiplexer channel selection
whismanoid 23:e0c36767f98b 1011 /// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC1_SEL[3:0]
whismanoid 23:e0c36767f98b 1012 ///
whismanoid 23:e0c36767f98b 1013 /// - 0000: AIN0
whismanoid 23:e0c36767f98b 1014 /// - 0001: AIN1
whismanoid 23:e0c36767f98b 1015 /// - 0010: AIN2
whismanoid 23:e0c36767f98b 1016 /// - 0011: AIN3
whismanoid 23:e0c36767f98b 1017 /// - 0100: AIN4
whismanoid 23:e0c36767f98b 1018 /// - 0101: AIN5
whismanoid 23:e0c36767f98b 1019 /// - 0110: AIN6
whismanoid 23:e0c36767f98b 1020 /// - 0111: AIN7
whismanoid 23:e0c36767f98b 1021 /// - 1000: AIN8
whismanoid 23:e0c36767f98b 1022 /// - 1001: AIN9
whismanoid 23:e0c36767f98b 1023 /// - 1010: Unconnected; IDAC1 powered down.
whismanoid 23:e0c36767f98b 1024 /// - 1011: Unconnected; IDAC1 powered down.
whismanoid 23:e0c36767f98b 1025 /// - 1100: Unconnected; IDAC1 powered down.
whismanoid 23:e0c36767f98b 1026 /// - 1101: Unconnected; IDAC1 powered down.
whismanoid 23:e0c36767f98b 1027 /// - 1110: Unconnected; IDAC1 powered down.
whismanoid 23:e0c36767f98b 1028 /// - 1111: Unconnected; IDAC1 powered down.(Default)
whismanoid 23:e0c36767f98b 1029 typedef enum MAX11410_IDAC1_SEL_enum_t {
whismanoid 23:e0c36767f98b 1030 IDAC1_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 1031 IDAC1_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 1032 IDAC1_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 1033 IDAC1_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 1034 IDAC1_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 1035 IDAC1_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 1036 IDAC1_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 1037 IDAC1_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 1038 IDAC1_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 1039 IDAC1_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 1040 IDAC1_SEL_1010_unconnected = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 1041 IDAC1_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 1042 IDAC1_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 1043 IDAC1_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 1044 IDAC1_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 1045 IDAC1_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 1046 } MAX11410_IDAC1_SEL_enum_t;
whismanoid 23:e0c36767f98b 1047
whismanoid 23:e0c36767f98b 1048 // CODE GENERATOR: TypedefEnum MAX11410_IDAC0_SEL_enum_t
whismanoid 23:e0c36767f98b 1049 //----------------------------------------
whismanoid 23:e0c36767f98b 1050 /// Input multiplexer channel selection
whismanoid 23:e0c36767f98b 1051 /// CMD_r000_1100_dddd_dddd_MUX_CTRL1 field IDAC0_SEL[3:0]
whismanoid 23:e0c36767f98b 1052 ///
whismanoid 23:e0c36767f98b 1053 /// - 0000: AIN0
whismanoid 23:e0c36767f98b 1054 /// - 0001: AIN1
whismanoid 23:e0c36767f98b 1055 /// - 0010: AIN2
whismanoid 23:e0c36767f98b 1056 /// - 0011: AIN3
whismanoid 23:e0c36767f98b 1057 /// - 0100: AIN4
whismanoid 23:e0c36767f98b 1058 /// - 0101: AIN5
whismanoid 23:e0c36767f98b 1059 /// - 0110: AIN6
whismanoid 23:e0c36767f98b 1060 /// - 0111: AIN7
whismanoid 23:e0c36767f98b 1061 /// - 1000: AIN8
whismanoid 23:e0c36767f98b 1062 /// - 1001: AIN9
whismanoid 23:e0c36767f98b 1063 /// - 1010: Unconnected; IDAC0 powered down.
whismanoid 23:e0c36767f98b 1064 /// - 1011: Unconnected; IDAC0 powered down.
whismanoid 23:e0c36767f98b 1065 /// - 1100: Unconnected; IDAC0 powered down.
whismanoid 23:e0c36767f98b 1066 /// - 1101: Unconnected; IDAC0 powered down.
whismanoid 23:e0c36767f98b 1067 /// - 1110: Unconnected; IDAC0 powered down.
whismanoid 23:e0c36767f98b 1068 /// - 1111: Unconnected; IDAC0 powered down.(Default)
whismanoid 23:e0c36767f98b 1069 typedef enum MAX11410_IDAC0_SEL_enum_t {
whismanoid 23:e0c36767f98b 1070 IDAC0_SEL_0000_AIN0 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 1071 IDAC0_SEL_0001_AIN1 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 1072 IDAC0_SEL_0010_AIN2 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 1073 IDAC0_SEL_0011_AIN3 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 1074 IDAC0_SEL_0100_AIN4 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 1075 IDAC0_SEL_0101_AIN5 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 1076 IDAC0_SEL_0110_AIN6 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 1077 IDAC0_SEL_0111_AIN7 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 1078 IDAC0_SEL_1000_AIN8 = 0x08, //!< 8'b00001000
whismanoid 23:e0c36767f98b 1079 IDAC0_SEL_1001_AIN9 = 0x09, //!< 8'b00001001
whismanoid 23:e0c36767f98b 1080 IDAC0_SEL_1010_unconnected = 0x0a, //!< 8'b00001010
whismanoid 23:e0c36767f98b 1081 IDAC0_SEL_1011_unconnected = 0x0b, //!< 8'b00001011
whismanoid 23:e0c36767f98b 1082 IDAC0_SEL_1100_unconnected = 0x0c, //!< 8'b00001100
whismanoid 23:e0c36767f98b 1083 IDAC0_SEL_1101_unconnected = 0x0d, //!< 8'b00001101
whismanoid 23:e0c36767f98b 1084 IDAC0_SEL_1110_unconnected = 0x0e, //!< 8'b00001110
whismanoid 23:e0c36767f98b 1085 IDAC0_SEL_1111_unconnected = 0x0f, //!< 8'b00001111
whismanoid 23:e0c36767f98b 1086 } MAX11410_IDAC0_SEL_enum_t;
whismanoid 23:e0c36767f98b 1087
whismanoid 23:e0c36767f98b 1088 // CODE GENERATOR: TypedefEnum MAX11410_SIG_PATH_enum_t
whismanoid 23:e0c36767f98b 1089 //----------------------------------------
whismanoid 23:e0c36767f98b 1090 /// Input multiplexer channel selection
whismanoid 23:e0c36767f98b 1091 /// CMD_r000_1110_xxdd_xddd_PGA field SIG_PATH[1:0]
whismanoid 23:e0c36767f98b 1092 ///
whismanoid 23:e0c36767f98b 1093 /// - 00: Buffered, low-power, unity-gain path (PGA disabled, digital gain) [default]
whismanoid 23:e0c36767f98b 1094 /// - 01: Bypass path (signal buffer disabled,PGA disabled, digital gain)
whismanoid 23:e0c36767f98b 1095 /// - 10: PGA path (signal buffer disabled, analog gain)
whismanoid 23:e0c36767f98b 1096 /// - 11: Reserved
whismanoid 23:e0c36767f98b 1097 typedef enum MAX11410_SIG_PATH_enum_t {
whismanoid 23:e0c36767f98b 1098 SIG_PATH_00_BUFFERED = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 1099 SIG_PATH_01_BYPASS = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 1100 SIG_PATH_10_PGA = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 1101 SIG_PATH_11_reserved = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 1102 } MAX11410_SIG_PATH_enum_t;
whismanoid 23:e0c36767f98b 1103
whismanoid 23:e0c36767f98b 1104 // CODE GENERATOR: TypedefEnum MAX11410_GAIN_enum_t
whismanoid 23:e0c36767f98b 1105 //----------------------------------------
whismanoid 23:e0c36767f98b 1106 /// Input multiplexer channel selection
whismanoid 23:e0c36767f98b 1107 /// CMD_r000_1110_xxdd_xddd_PGA field GAIN[2:0]
whismanoid 23:e0c36767f98b 1108 ///
whismanoid 23:e0c36767f98b 1109 /// - 000: 1 (default)
whismanoid 23:e0c36767f98b 1110 /// - 001: 2
whismanoid 23:e0c36767f98b 1111 /// - 010: 4
whismanoid 23:e0c36767f98b 1112 /// - 011: 8
whismanoid 23:e0c36767f98b 1113 /// - 100: 16
whismanoid 23:e0c36767f98b 1114 /// - 101: 32
whismanoid 23:e0c36767f98b 1115 /// - 110: 64
whismanoid 23:e0c36767f98b 1116 /// - 111: 128
whismanoid 23:e0c36767f98b 1117 typedef enum MAX11410_GAIN_enum_t {
whismanoid 23:e0c36767f98b 1118 GAIN_000_1 = 0x00, //!< 8'b00000000
whismanoid 23:e0c36767f98b 1119 GAIN_001_2 = 0x01, //!< 8'b00000001
whismanoid 23:e0c36767f98b 1120 GAIN_010_4 = 0x02, //!< 8'b00000010
whismanoid 23:e0c36767f98b 1121 GAIN_011_8 = 0x03, //!< 8'b00000011
whismanoid 23:e0c36767f98b 1122 GAIN_100_16 = 0x04, //!< 8'b00000100
whismanoid 23:e0c36767f98b 1123 GAIN_101_32 = 0x05, //!< 8'b00000101
whismanoid 23:e0c36767f98b 1124 GAIN_110_64 = 0x06, //!< 8'b00000110
whismanoid 23:e0c36767f98b 1125 GAIN_111_128 = 0x07, //!< 8'b00000111
whismanoid 23:e0c36767f98b 1126 } MAX11410_GAIN_enum_t;
whismanoid 23:e0c36767f98b 1127
whismanoid 23:e0c36767f98b 1128 // TODO1: CODE GENERATOR: ic_variant -- IC's supported with this driver
whismanoid 23:e0c36767f98b 1129 /**
whismanoid 23:e0c36767f98b 1130 * @brief IC's supported with this driver
whismanoid 23:e0c36767f98b 1131 * @details MAX11410
whismanoid 23:e0c36767f98b 1132 */
whismanoid 23:e0c36767f98b 1133 typedef enum
whismanoid 23:e0c36767f98b 1134 {
whismanoid 23:e0c36767f98b 1135 MAX11410_IC = 0,
whismanoid 23:e0c36767f98b 1136 //MAX11410_IC = 1
whismanoid 23:e0c36767f98b 1137 } MAX11410_ic_t;
whismanoid 23:e0c36767f98b 1138
whismanoid 23:e0c36767f98b 1139 // TODO1: CODE GENERATOR: class constructor declaration
whismanoid 23:e0c36767f98b 1140 /**********************************************************//**
whismanoid 23:e0c36767f98b 1141 * @brief Constructor for MAX11410 Class.
whismanoid 23:e0c36767f98b 1142 *
whismanoid 23:e0c36767f98b 1143 * @details Requires an existing SPI object as well as a DigitalOut object.
whismanoid 23:e0c36767f98b 1144 * The DigitalOut object is used for a chip enable signal
whismanoid 23:e0c36767f98b 1145 *
whismanoid 23:e0c36767f98b 1146 * On Entry:
whismanoid 23:e0c36767f98b 1147 * @param[in] spi - pointer to existing SPI object
whismanoid 23:e0c36767f98b 1148 * @param[in] cs_pin - pointer to a DigitalOut pin object
whismanoid 23:e0c36767f98b 1149 * CODE GENERATOR: class constructor docstrings gpio InputPin pins
whismanoid 23:e0c36767f98b 1150 * CODE GENERATOR: class constructor docstrings gpio OutputPin pins
whismanoid 23:e0c36767f98b 1151 * @param[in] ic_variant - which type of MAX11410 is used
whismanoid 23:e0c36767f98b 1152 *
whismanoid 23:e0c36767f98b 1153 * On Exit:
whismanoid 23:e0c36767f98b 1154 *
whismanoid 23:e0c36767f98b 1155 * @return None
whismanoid 23:e0c36767f98b 1156 **************************************************************/
whismanoid 23:e0c36767f98b 1157 MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid 23:e0c36767f98b 1158 // CODE GENERATOR: class constructor declaration gpio InputPin pins
whismanoid 23:e0c36767f98b 1159 // CODE GENERATOR: class constructor declaration gpio OutputPin pins
whismanoid 23:e0c36767f98b 1160 MAX11410_ic_t ic_variant);
whismanoid 23:e0c36767f98b 1161
whismanoid 23:e0c36767f98b 1162 // CODE GENERATOR: class destructor declaration
whismanoid 23:e0c36767f98b 1163 /************************************************************
whismanoid 23:e0c36767f98b 1164 * @brief Default destructor for MAX11410 Class.
whismanoid 23:e0c36767f98b 1165 *
whismanoid 23:e0c36767f98b 1166 * @details Destroys SPI object if owner
whismanoid 23:e0c36767f98b 1167 *
whismanoid 23:e0c36767f98b 1168 * On Entry:
whismanoid 23:e0c36767f98b 1169 *
whismanoid 23:e0c36767f98b 1170 * On Exit:
whismanoid 23:e0c36767f98b 1171 *
whismanoid 23:e0c36767f98b 1172 * @return None
whismanoid 23:e0c36767f98b 1173 **************************************************************/
whismanoid 23:e0c36767f98b 1174 ~MAX11410();
whismanoid 23:e0c36767f98b 1175
whismanoid 35:8aa5dffe523d 1176 // CODE GENERATOR: Declare SPI diagnostic function pointer void onSPIprint()
whismanoid 35:8aa5dffe523d 1177 /// Function pointer void f(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid 35:8aa5dffe523d 1178 Callback<void(size_t, uint8_t*, uint8_t*)> onSPIprint; //!< optional @ref onSPIprint SPI diagnostic function
whismanoid 35:8aa5dffe523d 1179
whismanoid 23:e0c36767f98b 1180 // CODE GENERATOR: spi_frequency setter declaration
whismanoid 23:e0c36767f98b 1181 /// set SPI SCLK frequency
whismanoid 23:e0c36767f98b 1182 void spi_frequency(int spi_sclk_Hz);
whismanoid 23:e0c36767f98b 1183
whismanoid 23:e0c36767f98b 1184 //----------------------------------------
whismanoid 23:e0c36767f98b 1185 // CODE GENERATOR: omit typedef enum MAX11410_device_t, class members instead of global device object
whismanoid 23:e0c36767f98b 1186 public:
whismanoid 23:e0c36767f98b 1187
whismanoid 23:e0c36767f98b 1188 /// reference voltage, in Volts
whismanoid 23:e0c36767f98b 1189 double VRef;
whismanoid 23:e0c36767f98b 1190
whismanoid 35:8aa5dffe523d 1191 /// shadow of register status CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS
whismanoid 25:a2afb91c605a 1192 uint32_t status;
whismanoid 25:a2afb91c605a 1193
whismanoid 35:8aa5dffe523d 1194 /// shadow of register data0 CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0
whismanoid 25:a2afb91c605a 1195 uint32_t data0;
whismanoid 25:a2afb91c605a 1196
whismanoid 23:e0c36767f98b 1197 // CODE GENERATOR: omit global g_MAX11410_device
whismanoid 23:e0c36767f98b 1198
whismanoid 23:e0c36767f98b 1199 // CODE GENERATOR: extern function declarations
whismanoid 23:e0c36767f98b 1200 // CODE GENERATOR: extern function declaration SPIoutputCS
whismanoid 23:e0c36767f98b 1201 //----------------------------------------
whismanoid 23:e0c36767f98b 1202 // Assert SPI Chip Select
whismanoid 23:e0c36767f98b 1203 // SPI chip-select for MAX11410
whismanoid 23:e0c36767f98b 1204 //
whismanoid 23:e0c36767f98b 1205 void SPIoutputCS(int isLogicHigh);
whismanoid 23:e0c36767f98b 1206
whismanoid 23:e0c36767f98b 1207 // CODE GENERATOR: extern function declaration SPIwrite16bits
whismanoid 23:e0c36767f98b 1208 //----------------------------------------
whismanoid 23:e0c36767f98b 1209 // SPI write 16 bits
whismanoid 23:e0c36767f98b 1210 // SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
whismanoid 23:e0c36767f98b 1211 //
whismanoid 23:e0c36767f98b 1212 void SPIwrite16bits(int16_t mosiData16);
whismanoid 23:e0c36767f98b 1213
whismanoid 25:a2afb91c605a 1214 // CODE GENERATOR: extern function declaration SPIreadWrite16bits
whismanoid 25:a2afb91c605a 1215 //----------------------------------------
whismanoid 25:a2afb91c605a 1216 // SPI read and write 16 bits
whismanoid 25:a2afb91c605a 1217 // SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN
whismanoid 25:a2afb91c605a 1218 // while simultaneously capturing 16 bits miso data from MAX11410 DOUT
whismanoid 25:a2afb91c605a 1219 //
whismanoid 25:a2afb91c605a 1220 int16_t SPIreadWrite16bits(int16_t mosiData16);
whismanoid 25:a2afb91c605a 1221
whismanoid 25:a2afb91c605a 1222 // CODE GENERATOR: extern function declaration SPIreadWrite32bits
whismanoid 25:a2afb91c605a 1223 //----------------------------------------
whismanoid 25:a2afb91c605a 1224 // SPI read and write 32 bits
whismanoid 25:a2afb91c605a 1225 // SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN
whismanoid 25:a2afb91c605a 1226 // while simultaneously capturing 32 bits miso data from MAX11410 DOUT
whismanoid 25:a2afb91c605a 1227 //
whismanoid 25:a2afb91c605a 1228 int32_t SPIreadWrite32bits(int32_t mosiData32);
whismanoid 25:a2afb91c605a 1229
whismanoid 23:e0c36767f98b 1230 // CODE GENERATOR: class member data
whismanoid 23:e0c36767f98b 1231 private:
whismanoid 23:e0c36767f98b 1232 // CODE GENERATOR: class member data for SPI interface
whismanoid 23:e0c36767f98b 1233 // SPI object
whismanoid 23:e0c36767f98b 1234 SPI &m_spi;
whismanoid 23:e0c36767f98b 1235 int m_SPI_SCLK_Hz;
whismanoid 23:e0c36767f98b 1236 int m_SPI_dataMode;
whismanoid 23:e0c36767f98b 1237 int m_SPI_cs_state;
whismanoid 23:e0c36767f98b 1238
whismanoid 23:e0c36767f98b 1239 // Selector pin object
whismanoid 23:e0c36767f98b 1240 DigitalOut &m_cs_pin;
whismanoid 23:e0c36767f98b 1241
whismanoid 23:e0c36767f98b 1242 // CODE GENERATOR: class member data for gpio InputPin pins
whismanoid 23:e0c36767f98b 1243 // CODE GENERATOR: class member data for gpio OutputPin pins
whismanoid 23:e0c36767f98b 1244
whismanoid 23:e0c36767f98b 1245 // Identifies which IC variant is being used
whismanoid 23:e0c36767f98b 1246 MAX11410_ic_t m_ic_variant;
whismanoid 23:e0c36767f98b 1247
whismanoid 23:e0c36767f98b 1248 public:
whismanoid 23:e0c36767f98b 1249
whismanoid 23:e0c36767f98b 1250 // CODE GENERATOR: class member function declarations
whismanoid 23:e0c36767f98b 1251 //----------------------------------------
whismanoid 35:8aa5dffe523d 1252 /// Menu item '!'
whismanoid 23:e0c36767f98b 1253 /// Initialize device
whismanoid 23:e0c36767f98b 1254 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1255 uint8_t Init(void);
whismanoid 23:e0c36767f98b 1256
whismanoid 23:e0c36767f98b 1257 //----------------------------------------
whismanoid 23:e0c36767f98b 1258 /// Return the physical voltage corresponding to DAC register.
whismanoid 23:e0c36767f98b 1259 /// Does not perform any offset or gain correction.
whismanoid 23:e0c36767f98b 1260 ///
whismanoid 23:e0c36767f98b 1261 /// @pre g_MAX11410_device.VRef = Voltage of REF input, in Volts
whismanoid 23:e0c36767f98b 1262 /// @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 23:e0c36767f98b 1263 /// @return physical voltage corresponding to MAX11410 code.
whismanoid 23:e0c36767f98b 1264 double VoltageOfCode(uint16_t value_u24);
whismanoid 23:e0c36767f98b 1265
whismanoid 35:8aa5dffe523d 1266 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid 35:8aa5dffe523d 1267 // CODE GENERATOR: looks like this is a 'write' register access function
whismanoid 35:8aa5dffe523d 1268 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid 35:8aa5dffe523d 1269 // CODE GENERATOR: looks like this is a 'write' register access function: omit this function from test menu
whismanoid 23:e0c36767f98b 1270 //----------------------------------------
whismanoid 35:8aa5dffe523d 1271 /// Write a MAX11410 register.
whismanoid 35:8aa5dffe523d 1272 ///
whismanoid 35:8aa5dffe523d 1273 /// CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0 indicating a write operation.
whismanoid 35:8aa5dffe523d 1274 ///
whismanoid 35:8aa5dffe523d 1275 /// MAX11410 register length can be determined by function RegSize.
whismanoid 23:e0c36767f98b 1276 ///
whismanoid 35:8aa5dffe523d 1277 /// For 8-bit register size:
whismanoid 35:8aa5dffe523d 1278 ///
whismanoid 35:8aa5dffe523d 1279 /// SPI 16-bit transfer
whismanoid 35:8aa5dffe523d 1280 ///
whismanoid 35:8aa5dffe523d 1281 /// SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 23:e0c36767f98b 1282 ///
whismanoid 35:8aa5dffe523d 1283 /// SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 35:8aa5dffe523d 1284 ///
whismanoid 35:8aa5dffe523d 1285 /// For 16-bit register size:
whismanoid 35:8aa5dffe523d 1286 ///
whismanoid 35:8aa5dffe523d 1287 /// SPI 24-bit or 32-bit transfer
whismanoid 35:8aa5dffe523d 1288 ///
whismanoid 35:8aa5dffe523d 1289 /// SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 23:e0c36767f98b 1290 ///
whismanoid 35:8aa5dffe523d 1291 /// SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 35:8aa5dffe523d 1292 ///
whismanoid 35:8aa5dffe523d 1293 /// For 24-bit register size:
whismanoid 23:e0c36767f98b 1294 ///
whismanoid 35:8aa5dffe523d 1295 /// SPI 32-bit transfer
whismanoid 35:8aa5dffe523d 1296 ///
whismanoid 35:8aa5dffe523d 1297 /// SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 1298 ///
whismanoid 35:8aa5dffe523d 1299 /// SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 23:e0c36767f98b 1300 ///
whismanoid 23:e0c36767f98b 1301 /// @return 1 on success; 0 on failure
whismanoid 35:8aa5dffe523d 1302 uint8_t RegWrite(MAX11410_CMD_enum_t regAddress, uint32_t regData);
whismanoid 23:e0c36767f98b 1303
whismanoid 35:8aa5dffe523d 1304 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid 35:8aa5dffe523d 1305 // CODE GENERATOR: looks like this is a 'read' register access function
whismanoid 35:8aa5dffe523d 1306 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid 35:8aa5dffe523d 1307 // CODE GENERATOR: looks like this is a 'read' register access function: omit this function from test menu
whismanoid 23:e0c36767f98b 1308 //----------------------------------------
whismanoid 23:e0c36767f98b 1309 /// Read an 8-bit MAX11410 register
whismanoid 23:e0c36767f98b 1310 ///
whismanoid 35:8aa5dffe523d 1311 /// CMD_1aaa_aaaa_REGISTER_READ bit is set 1 indicating a read operation.
whismanoid 23:e0c36767f98b 1312 ///
whismanoid 35:8aa5dffe523d 1313 /// MAX11410 register length can be determined by function RegSize.
whismanoid 35:8aa5dffe523d 1314 ///
whismanoid 35:8aa5dffe523d 1315 /// For 8-bit register size:
whismanoid 23:e0c36767f98b 1316 ///
whismanoid 35:8aa5dffe523d 1317 /// SPI 16-bit transfer
whismanoid 35:8aa5dffe523d 1318 ///
whismanoid 35:8aa5dffe523d 1319 /// SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 23:e0c36767f98b 1320 ///
whismanoid 35:8aa5dffe523d 1321 /// SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 35:8aa5dffe523d 1322 ///
whismanoid 35:8aa5dffe523d 1323 /// For 16-bit register size:
whismanoid 23:e0c36767f98b 1324 ///
whismanoid 35:8aa5dffe523d 1325 /// SPI 24-bit or 32-bit transfer
whismanoid 35:8aa5dffe523d 1326 ///
whismanoid 35:8aa5dffe523d 1327 /// SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 35:8aa5dffe523d 1328 ///
whismanoid 35:8aa5dffe523d 1329 /// SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 23:e0c36767f98b 1330 ///
whismanoid 35:8aa5dffe523d 1331 /// For 24-bit register size:
whismanoid 23:e0c36767f98b 1332 ///
whismanoid 35:8aa5dffe523d 1333 /// SPI 32-bit transfer
whismanoid 23:e0c36767f98b 1334 ///
whismanoid 35:8aa5dffe523d 1335 /// SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 23:e0c36767f98b 1336 ///
whismanoid 35:8aa5dffe523d 1337 /// SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 1338 ///
whismanoid 23:e0c36767f98b 1339 ///
whismanoid 23:e0c36767f98b 1340 /// @return 1 on success; 0 on failure
whismanoid 35:8aa5dffe523d 1341 uint8_t RegRead(MAX11410_CMD_enum_t regAddress, uint32_t* ptrRegData);
whismanoid 23:e0c36767f98b 1342
whismanoid 35:8aa5dffe523d 1343 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid 35:8aa5dffe523d 1344 // CODE GENERATOR: looks like this is a 'size' register access function
whismanoid 23:e0c36767f98b 1345 //----------------------------------------
whismanoid 35:8aa5dffe523d 1346 /// Return the size of a MAX11410 register
whismanoid 23:e0c36767f98b 1347 ///
whismanoid 35:8aa5dffe523d 1348 /// @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid 35:8aa5dffe523d 1349 uint8_t RegSize(MAX11410_CMD_enum_t regAddress);
whismanoid 23:e0c36767f98b 1350
whismanoid 35:8aa5dffe523d 1351 // CODE GENERATOR: looks like this is a register access function because 'regAdd'
whismanoid 35:8aa5dffe523d 1352 // CODE GENERATOR: looks like this is a 'name' register access function
whismanoid 23:e0c36767f98b 1353 //----------------------------------------
whismanoid 35:8aa5dffe523d 1354 /// Return the name of a MAX11410 register
whismanoid 23:e0c36767f98b 1355 ///
whismanoid 35:8aa5dffe523d 1356 /// @return null-terminated constant C string containing register name or empty string
whismanoid 35:8aa5dffe523d 1357 const char* RegName(MAX11410_CMD_enum_t regAddress);
whismanoid 23:e0c36767f98b 1358
whismanoid 23:e0c36767f98b 1359 //----------------------------------------
whismanoid 23:e0c36767f98b 1360 /// Configure Measurement for voltage input.
whismanoid 23:e0c36767f98b 1361 ///
whismanoid 23:e0c36767f98b 1362 /// Example code for typical voltage measurement.
whismanoid 23:e0c36767f98b 1363 ///
whismanoid 23:e0c36767f98b 1364 /// SPI register write sequence test AIN0-AGND voltage input using REF2=2.5V
whismanoid 23:e0c36767f98b 1365 /// write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 23:e0c36767f98b 1366 /// write8 0x00 PD = 0x00 (NOP)
whismanoid 23:e0c36767f98b 1367 /// write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous )
whismanoid 23:e0c36767f98b 1368 /// write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 23:e0c36767f98b 1369 /// write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid 23:e0c36767f98b 1370 /// write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid 23:e0c36767f98b 1371 /// write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 23:e0c36767f98b 1372 /// read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 23:e0c36767f98b 1373 /// read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 23:e0c36767f98b 1374 ///
whismanoid 23:e0c36767f98b 1375 /// @param[in] channel_hi = channel high side
whismanoid 23:e0c36767f98b 1376 /// @param[in] channel_lo = channel low side
whismanoid 23:e0c36767f98b 1377 ///
whismanoid 23:e0c36767f98b 1378 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1379 uint8_t Configure_Voltage(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo);
whismanoid 23:e0c36767f98b 1380
whismanoid 23:e0c36767f98b 1381 //----------------------------------------
whismanoid 35:8aa5dffe523d 1382 /// Measure ADC channels in sequence from AIN0 to channelNumber_0_9.
whismanoid 35:8aa5dffe523d 1383 /// @param[in] channel_hi = channel high side
whismanoid 35:8aa5dffe523d 1384 /// @param[in] channel_lo = channel low side
whismanoid 35:8aa5dffe523d 1385 /// @post AINcode[index]: measurement
whismanoid 35:8aa5dffe523d 1386 ///
whismanoid 35:8aa5dffe523d 1387 /// @return 1 on success; 0 on failure
whismanoid 35:8aa5dffe523d 1388 uint8_t _TODO_MAX11410_Read_All_Voltages_(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo);
whismanoid 35:8aa5dffe523d 1389
whismanoid 35:8aa5dffe523d 1390 //----------------------------------------
whismanoid 23:e0c36767f98b 1391 /// Trigger Measurement for voltage input.
whismanoid 23:e0c36767f98b 1392 ///
whismanoid 23:e0c36767f98b 1393 /// Example code for typical voltage measurement.
whismanoid 23:e0c36767f98b 1394 ///
whismanoid 23:e0c36767f98b 1395 /// @param[in] channel_hi = channel high side
whismanoid 23:e0c36767f98b 1396 /// @param[in] channel_lo = channel low side
whismanoid 23:e0c36767f98b 1397 /// @post TODO: where does the measurement go? struct member?
whismanoid 23:e0c36767f98b 1398 ///
whismanoid 23:e0c36767f98b 1399 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1400 uint8_t Measure_Voltage(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo);
whismanoid 23:e0c36767f98b 1401
whismanoid 23:e0c36767f98b 1402 //----------------------------------------
whismanoid 23:e0c36767f98b 1403 /// Configure Measurement for Resistive Temperature Device (RTD).
whismanoid 23:e0c36767f98b 1404 ///
whismanoid 23:e0c36767f98b 1405 /// Example code for typical RTD measurement.
whismanoid 23:e0c36767f98b 1406 ///
whismanoid 23:e0c36767f98b 1407 /// @param[in] channel_RTD_Force = channel RTD high side force
whismanoid 23:e0c36767f98b 1408 /// @param[in] channel_RTD_Hi = channel RTD high side sense
whismanoid 23:e0c36767f98b 1409 /// @param[in] channel_RTD_Lo = channel RTD low side
whismanoid 23:e0c36767f98b 1410 ///
whismanoid 23:e0c36767f98b 1411 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1412 uint8_t Configure_RTD(MAX11410_AINP_SEL_enum_t channel_RTD_Force, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINN_SEL_enum_t channel_RTD_Lo);
whismanoid 23:e0c36767f98b 1413
whismanoid 23:e0c36767f98b 1414 //----------------------------------------
whismanoid 23:e0c36767f98b 1415 /// Trigger Measurement for Resistive Temperature Device (RTD).
whismanoid 23:e0c36767f98b 1416 ///
whismanoid 23:e0c36767f98b 1417 /// Example code for typical RTD measurement.
whismanoid 23:e0c36767f98b 1418 ///
whismanoid 23:e0c36767f98b 1419 /// @param[in] channel_RTD_Force = channel RTD high side force
whismanoid 23:e0c36767f98b 1420 /// @param[in] channel_RTD_Hi = channel RTD high side sense
whismanoid 23:e0c36767f98b 1421 /// @param[in] channel_RTD_Lo = channel RTD low side
whismanoid 23:e0c36767f98b 1422 /// @post TODO: where does the measurement go? struct member?
whismanoid 23:e0c36767f98b 1423 ///
whismanoid 23:e0c36767f98b 1424 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1425 uint8_t Measure_RTD(MAX11410_AINP_SEL_enum_t channel_RTD_Force, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINN_SEL_enum_t channel_RTD_Lo);
whismanoid 23:e0c36767f98b 1426
whismanoid 23:e0c36767f98b 1427 //----------------------------------------
whismanoid 23:e0c36767f98b 1428 /// Configure Measurement for Thermocouple
whismanoid 23:e0c36767f98b 1429 ///
whismanoid 23:e0c36767f98b 1430 /// Example code for typical Thermocouple measurement.
whismanoid 23:e0c36767f98b 1431 ///
whismanoid 23:e0c36767f98b 1432 /// @param[in] channel_TC_Hi = channel of Thermocouple high side
whismanoid 23:e0c36767f98b 1433 /// @param[in] channel_TC_Lo = channel of Thermocouple low side
whismanoid 23:e0c36767f98b 1434 /// @param[in] channel_RTD_Hi = channel of cold junction RTD high side
whismanoid 23:e0c36767f98b 1435 /// @param[in] channel_RTD_Lo = channel of cold junction RTD low side
whismanoid 23:e0c36767f98b 1436 ///
whismanoid 23:e0c36767f98b 1437 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1438 uint8_t Configure_Thermocouple(MAX11410_AINP_SEL_enum_t channel_TC_Hi, MAX11410_AINN_SEL_enum_t channel_TC_Lo, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINP_SEL_enum_t channel_RTD_Lo);
whismanoid 23:e0c36767f98b 1439
whismanoid 23:e0c36767f98b 1440 //----------------------------------------
whismanoid 23:e0c36767f98b 1441 /// Trigger Measurement for Thermocouple
whismanoid 23:e0c36767f98b 1442 ///
whismanoid 23:e0c36767f98b 1443 /// Example code for typical Thermocouple measurement.
whismanoid 23:e0c36767f98b 1444 ///
whismanoid 23:e0c36767f98b 1445 /// @param[in] channel_TC_Hi = channel of Thermocouple high side
whismanoid 23:e0c36767f98b 1446 /// @param[in] channel_TC_Lo = channel of Thermocouple low side
whismanoid 23:e0c36767f98b 1447 /// @param[in] channel_RTD_Hi = channel of cold junction RTD high side
whismanoid 23:e0c36767f98b 1448 /// @param[in] channel_RTD_Lo = channel of cold junction RTD low side
whismanoid 23:e0c36767f98b 1449 /// @post TODO: where does the measurement go? struct member?
whismanoid 23:e0c36767f98b 1450 ///
whismanoid 23:e0c36767f98b 1451 /// @return 1 on success; 0 on failure
whismanoid 23:e0c36767f98b 1452 uint8_t Measure_Thermocouple(MAX11410_AINP_SEL_enum_t channel_TC_Hi, MAX11410_AINN_SEL_enum_t channel_TC_Lo, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINP_SEL_enum_t channel_RTD_Lo);
whismanoid 23:e0c36767f98b 1453
whismanoid 23:e0c36767f98b 1454 }; // end of class MAX11410
whismanoid 23:e0c36767f98b 1455
whismanoid 23:e0c36767f98b 1456 #endif // __MAX11410_H__
whismanoid 23:e0c36767f98b 1457
whismanoid 23:e0c36767f98b 1458 // End of file