Maxim Integrated / Mbed OS MAX11410BOB_Serial_Tester

Test program running on MAX32625MBED. Control through USB Serial commands using a terminal emulator such as teraterm or putty.

Dependencies:   MaximTinyTester MAX11410 CmdLine USBDevice

MAX11410.cpp@35:8aa5dffe523d, 2019-11-11 (annotated)

Committer:
whismanoid
Date:
Mon Nov 11 23:30:04 2019 +0000
Revision:
35:8aa5dffe523d
Parent:
25:a2afb91c605a 
WIP 0x11 raw bitstream, *regname?, *regname=0x123456 commands

Who changed what in which revision?

UserRevisionLine numberNew contents of line
whismanoid 35:8aa5dffe523d 1 // /*******************************************************************************
whismanoid 19:8f951e448ab1 2 // * Copyright (C) 2019 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid 19:8f951e448ab1 3 // *
whismanoid 19:8f951e448ab1 4 // * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid 19:8f951e448ab1 5 // * copy of this software and associated documentation files (the "Software"),
whismanoid 19:8f951e448ab1 6 // * to deal in the Software without restriction, including without limitation
whismanoid 19:8f951e448ab1 7 // * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid 19:8f951e448ab1 8 // * and/or sell copies of the Software, and to permit persons to whom the
whismanoid 19:8f951e448ab1 9 // * Software is furnished to do so, subject to the following conditions:
whismanoid 19:8f951e448ab1 10 // *
whismanoid 19:8f951e448ab1 11 // * The above copyright notice and this permission notice shall be included
whismanoid 19:8f951e448ab1 12 // * in all copies or substantial portions of the Software.
whismanoid 19:8f951e448ab1 13 // *
whismanoid 19:8f951e448ab1 14 // * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid 19:8f951e448ab1 15 // * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid 19:8f951e448ab1 16 // * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid 19:8f951e448ab1 17 // * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid 19:8f951e448ab1 18 // * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid 19:8f951e448ab1 19 // * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid 19:8f951e448ab1 20 // * OTHER DEALINGS IN THE SOFTWARE.
whismanoid 19:8f951e448ab1 21 // *
whismanoid 19:8f951e448ab1 22 // * Except as contained in this notice, the name of Maxim Integrated
whismanoid 19:8f951e448ab1 23 // * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid 19:8f951e448ab1 24 // * Products, Inc. Branding Policy.
whismanoid 19:8f951e448ab1 25 // *
whismanoid 19:8f951e448ab1 26 // * The mere transfer of this software does not imply any licenses
whismanoid 19:8f951e448ab1 27 // * of trade secrets, proprietary technology, copyrights, patents,
whismanoid 19:8f951e448ab1 28 // * trademarks, maskwork rights, or any other form of intellectual
whismanoid 19:8f951e448ab1 29 // * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid 19:8f951e448ab1 30 // * ownership rights.
whismanoid 19:8f951e448ab1 31 // *******************************************************************************
whismanoid 19:8f951e448ab1 32 // */
whismanoid 19:8f951e448ab1 33 // *********************************************************************
whismanoid 19:8f951e448ab1 34 // @file MAX11410.cpp
whismanoid 19:8f951e448ab1 35 // *********************************************************************
whismanoid 19:8f951e448ab1 36 // Device Driver file
whismanoid 19:8f951e448ab1 37 // DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid 19:8f951e448ab1 38 // generated by XMLSystemOfDevicesToMBED.py
whismanoid 19:8f951e448ab1 39 // System Name = ExampleSystem
whismanoid 19:8f951e448ab1 40 // System Description = Device driver example
whismanoid 19:8f951e448ab1 41
whismanoid 19:8f951e448ab1 42 #include "MAX11410.h"
whismanoid 19:8f951e448ab1 43
whismanoid 19:8f951e448ab1 44 // Device Name = MAX11410
whismanoid 19:8f951e448ab1 45 // Device Description = 1.9ksps, Low-Power, Serial SPI 24-Bit, 10-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid 35:8aa5dffe523d 46 // Device DeviceBriefDescription = 24-bit 1.9ksps Delta-Sigma ADC
whismanoid 19:8f951e448ab1 47 // Device Manufacturer = Maxim Integrated
whismanoid 19:8f951e448ab1 48 // Device PartNumber = MAX11410ATI+
whismanoid 19:8f951e448ab1 49 // Device RegValue_Width = DataWidth16bit_HL
whismanoid 19:8f951e448ab1 50 //
whismanoid 35:8aa5dffe523d 51 // ADC MaxOutputDataRate = 1.9ksps
whismanoid 35:8aa5dffe523d 52 // ADC NumChannels = 10
whismanoid 35:8aa5dffe523d 53 // ADC ResolutionBits = 24
whismanoid 35:8aa5dffe523d 54 //
whismanoid 19:8f951e448ab1 55 // SPI CS = ActiveLow
whismanoid 19:8f951e448ab1 56 // SPI FrameStart = CS
whismanoid 19:8f951e448ab1 57 // SPI CPOL = 0
whismanoid 19:8f951e448ab1 58 // SPI CPHA = 0
whismanoid 19:8f951e448ab1 59 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 19:8f951e448ab1 60 // SPI SCLK Idle Low
whismanoid 19:8f951e448ab1 61 // SPI SCLKMaxMHz = 8
whismanoid 19:8f951e448ab1 62 // SPI SCLKMinMHz = 0
whismanoid 19:8f951e448ab1 63 //
whismanoid 19:8f951e448ab1 64
whismanoid 19:8f951e448ab1 65 // CODE GENERATOR: class constructor definition
whismanoid 19:8f951e448ab1 66 MAX11410::MAX11410(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid 19:8f951e448ab1 67 // CODE GENERATOR: class constructor definition gpio InputPin pins
whismanoid 19:8f951e448ab1 68 // CODE GENERATOR: class constructor definition gpio OutputPin pins
whismanoid 19:8f951e448ab1 69 // CODE GENERATOR: class constructor definition ic_variant
whismanoid 19:8f951e448ab1 70 MAX11410_ic_t ic_variant)
whismanoid 19:8f951e448ab1 71 // CODE GENERATOR: class constructor initializer list
whismanoid 19:8f951e448ab1 72 : m_spi(spi), m_cs_pin(cs_pin), // SPI interface
whismanoid 19:8f951e448ab1 73 // CODE GENERATOR: class constructor initializer list gpio InputPin pins
whismanoid 19:8f951e448ab1 74 // CODE GENERATOR: class constructor initializer list gpio OutputPin pins
whismanoid 19:8f951e448ab1 75 // CODE GENERATOR: class constructor initializer list ic_variant
whismanoid 19:8f951e448ab1 76 m_ic_variant(ic_variant)
whismanoid 19:8f951e448ab1 77 {
whismanoid 19:8f951e448ab1 78 // CODE GENERATOR: class constructor definition SPI interface initialization
whismanoid 19:8f951e448ab1 79 //
whismanoid 19:8f951e448ab1 80 // SPI CS = ActiveLow
whismanoid 19:8f951e448ab1 81 // SPI FrameStart = CS
whismanoid 19:8f951e448ab1 82 m_SPI_cs_state = 1;
whismanoid 19:8f951e448ab1 83 m_cs_pin = m_SPI_cs_state;
whismanoid 19:8f951e448ab1 84
whismanoid 19:8f951e448ab1 85 // SPI CPOL = 0
whismanoid 19:8f951e448ab1 86 // SPI CPHA = 0
whismanoid 19:8f951e448ab1 87 // SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid 19:8f951e448ab1 88 // SPI SCLK Idle Low
whismanoid 35:8aa5dffe523d 89 m_SPI_dataMode = 0; //SPI_MODE0; // CPOL=0,CPHA=0: Rising Edge stable; SCLK idle Low
whismanoid 19:8f951e448ab1 90 m_spi.format(8,m_SPI_dataMode); // int bits_must_be_8, int mode=0_3 CPOL=0,CPHA=0
whismanoid 19:8f951e448ab1 91
whismanoid 19:8f951e448ab1 92 // SPI SCLKMaxMHz = 8
whismanoid 19:8f951e448ab1 93 // SPI SCLKMinMHz = 0
whismanoid 19:8f951e448ab1 94 //#define SPI_SCLK_Hz 48000000 // 48MHz
whismanoid 19:8f951e448ab1 95 //#define SPI_SCLK_Hz 24000000 // 24MHz
whismanoid 19:8f951e448ab1 96 //#define SPI_SCLK_Hz 12000000 // 12MHz
whismanoid 35:8aa5dffe523d 97 //#define SPI_SCLK_Hz 6000000 // 6MHz
whismanoid 19:8f951e448ab1 98 //#define SPI_SCLK_Hz 4000000 // 4MHz
whismanoid 19:8f951e448ab1 99 //#define SPI_SCLK_Hz 2000000 // 2MHz
whismanoid 19:8f951e448ab1 100 //#define SPI_SCLK_Hz 1000000 // 1MHz
whismanoid 19:8f951e448ab1 101 m_SPI_SCLK_Hz = 8000000; // 8MHz; MAX11410 limit is 8MHz
whismanoid 19:8f951e448ab1 102 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 19:8f951e448ab1 103
whismanoid 19:8f951e448ab1 104 }
whismanoid 19:8f951e448ab1 105
whismanoid 19:8f951e448ab1 106 // CODE GENERATOR: class destructor definition
whismanoid 19:8f951e448ab1 107 MAX11410::~MAX11410()
whismanoid 19:8f951e448ab1 108 {
whismanoid 19:8f951e448ab1 109 // do nothing
whismanoid 19:8f951e448ab1 110 }
whismanoid 19:8f951e448ab1 111
whismanoid 19:8f951e448ab1 112 // CODE GENERATOR: spi_frequency setter definition
whismanoid 19:8f951e448ab1 113 /// set SPI SCLK frequency
whismanoid 19:8f951e448ab1 114 void MAX11410::spi_frequency(int spi_sclk_Hz)
whismanoid 19:8f951e448ab1 115 {
whismanoid 19:8f951e448ab1 116 m_SPI_SCLK_Hz = spi_sclk_Hz;
whismanoid 19:8f951e448ab1 117 m_spi.frequency(m_SPI_SCLK_Hz);
whismanoid 19:8f951e448ab1 118 }
whismanoid 19:8f951e448ab1 119
whismanoid 19:8f951e448ab1 120 // CODE GENERATOR: omit global g_MAX11410_device
whismanoid 19:8f951e448ab1 121 // CODE GENERATOR: extern function declarations
whismanoid 19:8f951e448ab1 122 // CODE GENERATOR: extern function requirement MAX11410::SPIoutputCS
whismanoid 19:8f951e448ab1 123 // Assert SPI Chip Select
whismanoid 19:8f951e448ab1 124 // SPI chip-select for MAX11410
whismanoid 19:8f951e448ab1 125 //
whismanoid 19:8f951e448ab1 126 void MAX11410::SPIoutputCS(int isLogicHigh)
whismanoid 19:8f951e448ab1 127 {
whismanoid 19:8f951e448ab1 128 // CODE GENERATOR: extern function definition for function SPIoutputCS
whismanoid 19:8f951e448ab1 129 // CODE GENERATOR: extern function definition for standard SPI interface function SPIoutputCS(int isLogicHigh)
whismanoid 19:8f951e448ab1 130 m_SPI_cs_state = isLogicHigh;
whismanoid 19:8f951e448ab1 131 m_cs_pin = m_SPI_cs_state;
whismanoid 19:8f951e448ab1 132 }
whismanoid 19:8f951e448ab1 133
whismanoid 19:8f951e448ab1 134 // CODE GENERATOR: extern function requirement MAX11410::SPIwrite16bits
whismanoid 19:8f951e448ab1 135 // SPI write 16 bits
whismanoid 19:8f951e448ab1 136 // SPI interface to MAX11410 shift 16 bits mosiData into MAX11410 DIN
whismanoid 19:8f951e448ab1 137 //
whismanoid 19:8f951e448ab1 138 void MAX11410::SPIwrite16bits(int16_t mosiData16)
whismanoid 19:8f951e448ab1 139 {
whismanoid 19:8f951e448ab1 140 // CODE GENERATOR: extern function definition for function SPIwrite16bits
whismanoid 19:8f951e448ab1 141 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIwrite16bits(int16_t mosiData16)
whismanoid 19:8f951e448ab1 142 size_t byteCount = 2;
whismanoid 19:8f951e448ab1 143 static char mosiData[2];
whismanoid 19:8f951e448ab1 144 static char misoData[2];
whismanoid 19:8f951e448ab1 145 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 19:8f951e448ab1 146 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 19:8f951e448ab1 147 //
whismanoid 19:8f951e448ab1 148 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 19:8f951e448ab1 149 //~ noInterrupts();
whismanoid 19:8f951e448ab1 150 //
whismanoid 19:8f951e448ab1 151 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 19:8f951e448ab1 152 //
whismanoid 19:8f951e448ab1 153 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 19:8f951e448ab1 154 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 19:8f951e448ab1 155 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 19:8f951e448ab1 156 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 19:8f951e448ab1 157 //
whismanoid 19:8f951e448ab1 158 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 19:8f951e448ab1 159 //
whismanoid 19:8f951e448ab1 160 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 19:8f951e448ab1 161 //~ interrupts();
whismanoid 35:8aa5dffe523d 162 // Optional Diagnostic function to print SPI transactions
whismanoid 35:8aa5dffe523d 163 if (onSPIprint)
whismanoid 35:8aa5dffe523d 164 {
whismanoid 35:8aa5dffe523d 165 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 35:8aa5dffe523d 166 }
whismanoid 19:8f951e448ab1 167 //
whismanoid 19:8f951e448ab1 168 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 19:8f951e448ab1 169 //cmdLine.serial().printf(" MOSI->"));
whismanoid 19:8f951e448ab1 170 //cmdLine.serial().printf(" 0x"));
whismanoid 19:8f951e448ab1 171 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 19:8f951e448ab1 172 //cmdLine.serial().printf(" 0x"));
whismanoid 19:8f951e448ab1 173 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 19:8f951e448ab1 174 //cmdLine.serial().printf(" 0x"));
whismanoid 19:8f951e448ab1 175 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 19:8f951e448ab1 176 // hex dump mosiData[0..byteCount-1]
whismanoid 19:8f951e448ab1 177 #if 0 // HAS_MICROUSBSERIAL
whismanoid 19:8f951e448ab1 178 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 19:8f951e448ab1 179 if (byteCount > 7) {
whismanoid 19:8f951e448ab1 180 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 19:8f951e448ab1 181 }
whismanoid 19:8f951e448ab1 182 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 19:8f951e448ab1 183 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 19:8f951e448ab1 184 {
whismanoid 19:8f951e448ab1 185 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 19:8f951e448ab1 186 }
whismanoid 19:8f951e448ab1 187 // hex dump misoData[0..byteCount-1]
whismanoid 19:8f951e448ab1 188 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 19:8f951e448ab1 189 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 19:8f951e448ab1 190 {
whismanoid 19:8f951e448ab1 191 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 19:8f951e448ab1 192 }
whismanoid 19:8f951e448ab1 193 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 19:8f951e448ab1 194 #endif
whismanoid 19:8f951e448ab1 195 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 19:8f951e448ab1 196 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 19:8f951e448ab1 197 if (byteCount > 7) {
whismanoid 19:8f951e448ab1 198 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 19:8f951e448ab1 199 }
whismanoid 19:8f951e448ab1 200 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 19:8f951e448ab1 201 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 19:8f951e448ab1 202 {
whismanoid 19:8f951e448ab1 203 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 19:8f951e448ab1 204 }
whismanoid 19:8f951e448ab1 205 // hex dump misoData[0..byteCount-1]
whismanoid 19:8f951e448ab1 206 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 19:8f951e448ab1 207 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 19:8f951e448ab1 208 {
whismanoid 19:8f951e448ab1 209 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 19:8f951e448ab1 210 }
whismanoid 19:8f951e448ab1 211 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 19:8f951e448ab1 212 #endif
whismanoid 19:8f951e448ab1 213 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 19:8f951e448ab1 214 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 19:8f951e448ab1 215 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 19:8f951e448ab1 216 //
whismanoid 19:8f951e448ab1 217 // int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 19:8f951e448ab1 218 // return misoData16;
whismanoid 19:8f951e448ab1 219 }
whismanoid 19:8f951e448ab1 220
whismanoid 25:a2afb91c605a 221 // CODE GENERATOR: extern function requirement MAX11410::SPIreadWrite16bits
whismanoid 25:a2afb91c605a 222 // SPI read and write 16 bits
whismanoid 25:a2afb91c605a 223 // SPI interface to MAX11410 shift 16 bits mosiData16 into MAX11410 DIN
whismanoid 25:a2afb91c605a 224 // while simultaneously capturing 16 bits miso data from MAX11410 DOUT
whismanoid 25:a2afb91c605a 225 //
whismanoid 25:a2afb91c605a 226 int16_t MAX11410::SPIreadWrite16bits(int16_t mosiData16)
whismanoid 25:a2afb91c605a 227 {
whismanoid 25:a2afb91c605a 228 // CODE GENERATOR: extern function definition for function SPIreadWrite16bits
whismanoid 25:a2afb91c605a 229 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite16bits(int16_t mosiData16)
whismanoid 25:a2afb91c605a 230 size_t byteCount = 2;
whismanoid 25:a2afb91c605a 231 static char mosiData[2];
whismanoid 25:a2afb91c605a 232 static char misoData[2];
whismanoid 25:a2afb91c605a 233 mosiData[0] = (char)((mosiData16 >> 8) & 0xFF); // MSByte
whismanoid 25:a2afb91c605a 234 mosiData[1] = (char)((mosiData16 >> 0) & 0xFF); // LSByte
whismanoid 25:a2afb91c605a 235 //
whismanoid 25:a2afb91c605a 236 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 25:a2afb91c605a 237 //~ noInterrupts();
whismanoid 25:a2afb91c605a 238 //
whismanoid 25:a2afb91c605a 239 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 25:a2afb91c605a 240 //
whismanoid 25:a2afb91c605a 241 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 25:a2afb91c605a 242 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 25:a2afb91c605a 243 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 25:a2afb91c605a 244 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 25:a2afb91c605a 245 //
whismanoid 25:a2afb91c605a 246 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 25:a2afb91c605a 247 //
whismanoid 25:a2afb91c605a 248 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 25:a2afb91c605a 249 //~ interrupts();
whismanoid 35:8aa5dffe523d 250 // Optional Diagnostic function to print SPI transactions
whismanoid 35:8aa5dffe523d 251 if (onSPIprint)
whismanoid 35:8aa5dffe523d 252 {
whismanoid 35:8aa5dffe523d 253 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 35:8aa5dffe523d 254 }
whismanoid 25:a2afb91c605a 255 //
whismanoid 25:a2afb91c605a 256 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 25:a2afb91c605a 257 //cmdLine.serial().printf(" MOSI->"));
whismanoid 25:a2afb91c605a 258 //cmdLine.serial().printf(" 0x"));
whismanoid 25:a2afb91c605a 259 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 25:a2afb91c605a 260 //cmdLine.serial().printf(" 0x"));
whismanoid 25:a2afb91c605a 261 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 25:a2afb91c605a 262 //cmdLine.serial().printf(" 0x"));
whismanoid 25:a2afb91c605a 263 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 25:a2afb91c605a 264 // hex dump mosiData[0..byteCount-1]
whismanoid 25:a2afb91c605a 265 #if 0 // HAS_MICROUSBSERIAL
whismanoid 25:a2afb91c605a 266 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 25:a2afb91c605a 267 if (byteCount > 7) {
whismanoid 25:a2afb91c605a 268 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 25:a2afb91c605a 269 }
whismanoid 25:a2afb91c605a 270 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 25:a2afb91c605a 271 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 25:a2afb91c605a 272 {
whismanoid 25:a2afb91c605a 273 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 25:a2afb91c605a 274 }
whismanoid 25:a2afb91c605a 275 // hex dump misoData[0..byteCount-1]
whismanoid 25:a2afb91c605a 276 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 25:a2afb91c605a 277 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 25:a2afb91c605a 278 {
whismanoid 25:a2afb91c605a 279 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 25:a2afb91c605a 280 }
whismanoid 25:a2afb91c605a 281 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 25:a2afb91c605a 282 #endif
whismanoid 25:a2afb91c605a 283 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 25:a2afb91c605a 284 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 25:a2afb91c605a 285 if (byteCount > 7) {
whismanoid 25:a2afb91c605a 286 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 25:a2afb91c605a 287 }
whismanoid 25:a2afb91c605a 288 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 25:a2afb91c605a 289 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 25:a2afb91c605a 290 {
whismanoid 25:a2afb91c605a 291 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 25:a2afb91c605a 292 }
whismanoid 25:a2afb91c605a 293 // hex dump misoData[0..byteCount-1]
whismanoid 25:a2afb91c605a 294 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 25:a2afb91c605a 295 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 25:a2afb91c605a 296 {
whismanoid 25:a2afb91c605a 297 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 25:a2afb91c605a 298 }
whismanoid 25:a2afb91c605a 299 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 25:a2afb91c605a 300 #endif
whismanoid 25:a2afb91c605a 301 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 25:a2afb91c605a 302 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 25:a2afb91c605a 303 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 25:a2afb91c605a 304 //
whismanoid 25:a2afb91c605a 305 //int misoData16 = (misoData16_FF00 << 8) | misoData16_00FF;
whismanoid 25:a2afb91c605a 306 int misoData16 = (misoData[0] << 8) | misoData[1];
whismanoid 25:a2afb91c605a 307 return misoData16;
whismanoid 25:a2afb91c605a 308 }
whismanoid 25:a2afb91c605a 309
whismanoid 25:a2afb91c605a 310 // CODE GENERATOR: extern function requirement MAX11410::SPIreadWrite32bits
whismanoid 25:a2afb91c605a 311 // SPI read and write 32 bits
whismanoid 25:a2afb91c605a 312 // SPI interface to MAX11410 shift 32 bits mosiData into MAX11410 DIN
whismanoid 25:a2afb91c605a 313 // while simultaneously capturing 32 bits miso data from MAX11410 DOUT
whismanoid 25:a2afb91c605a 314 //
whismanoid 25:a2afb91c605a 315 int32_t MAX11410::SPIreadWrite32bits(int32_t mosiData32)
whismanoid 25:a2afb91c605a 316 {
whismanoid 25:a2afb91c605a 317 // CODE GENERATOR: extern function definition for function SPIreadWrite32bits
whismanoid 25:a2afb91c605a 318 // TODO1: CODE GENERATOR: extern function definition for standard SPI interface function SPIreadWrite32bits(int32_t mosiData32)
whismanoid 25:a2afb91c605a 319 size_t byteCount = 4;
whismanoid 25:a2afb91c605a 320 static char mosiData[4];
whismanoid 25:a2afb91c605a 321 static char misoData[4];
whismanoid 25:a2afb91c605a 322 mosiData[0] = (char)((mosiData32 >> 24) & 0xFF); // MSByte
whismanoid 25:a2afb91c605a 323 mosiData[1] = (char)((mosiData32 >> 16) & 0xFF);
whismanoid 25:a2afb91c605a 324 mosiData[2] = (char)((mosiData32 >> 8) & 0xFF);
whismanoid 25:a2afb91c605a 325 mosiData[3] = (char)((mosiData32 >> 0) & 0xFF); // LSByte
whismanoid 25:a2afb91c605a 326 //
whismanoid 25:a2afb91c605a 327 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 25:a2afb91c605a 328 //~ noInterrupts();
whismanoid 25:a2afb91c605a 329 //
whismanoid 25:a2afb91c605a 330 //~ digitalWrite(Scope_Trigger_Pin, LOW); // diagnostic Scope_Trigger_Pin
whismanoid 25:a2afb91c605a 331 //
whismanoid 25:a2afb91c605a 332 unsigned int numBytesTransferred = m_spi.write(mosiData, byteCount, misoData, byteCount);
whismanoid 25:a2afb91c605a 333 //~ m_spi.transfer(mosiData8_FF0000);
whismanoid 25:a2afb91c605a 334 //~ m_spi.transfer(mosiData16_00FF00);
whismanoid 25:a2afb91c605a 335 //~ m_spi.transfer(mosiData16_0000FF);
whismanoid 25:a2afb91c605a 336 //
whismanoid 25:a2afb91c605a 337 //~ digitalWrite(Scope_Trigger_Pin, HIGH); // diagnostic Scope_Trigger_Pin
whismanoid 25:a2afb91c605a 338 //
whismanoid 25:a2afb91c605a 339 // Arduino: begin critical section: noInterrupts() masks all interrupt sources; end critical section with interrupts()
whismanoid 25:a2afb91c605a 340 //~ interrupts();
whismanoid 35:8aa5dffe523d 341 // Optional Diagnostic function to print SPI transactions
whismanoid 35:8aa5dffe523d 342 if (onSPIprint)
whismanoid 35:8aa5dffe523d 343 {
whismanoid 35:8aa5dffe523d 344 onSPIprint(byteCount, (uint8_t*)mosiData, (uint8_t*)misoData);
whismanoid 35:8aa5dffe523d 345 }
whismanoid 25:a2afb91c605a 346 //
whismanoid 25:a2afb91c605a 347 // VERIFY: SPIwrite24bits print diagnostic information
whismanoid 25:a2afb91c605a 348 //cmdLine.serial().printf(" MOSI->"));
whismanoid 25:a2afb91c605a 349 //cmdLine.serial().printf(" 0x"));
whismanoid 25:a2afb91c605a 350 //Serial.print( (mosiData8_FF0000 & 0xFF), HEX);
whismanoid 25:a2afb91c605a 351 //cmdLine.serial().printf(" 0x"));
whismanoid 25:a2afb91c605a 352 //Serial.print( (mosiData16_00FF00 & 0xFF), HEX);
whismanoid 25:a2afb91c605a 353 //cmdLine.serial().printf(" 0x"));
whismanoid 25:a2afb91c605a 354 //Serial.print( (mosiData16_0000FF & 0xFF), HEX);
whismanoid 25:a2afb91c605a 355 // hex dump mosiData[0..byteCount-1]
whismanoid 25:a2afb91c605a 356 #if 0 // HAS_MICROUSBSERIAL
whismanoid 25:a2afb91c605a 357 cmdLine_microUSBserial.serial().printf("\r\nSPI");
whismanoid 25:a2afb91c605a 358 if (byteCount > 7) {
whismanoid 25:a2afb91c605a 359 cmdLine_microUSBserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 25:a2afb91c605a 360 }
whismanoid 25:a2afb91c605a 361 cmdLine_microUSBserial.serial().printf(" MOSI->");
whismanoid 25:a2afb91c605a 362 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 25:a2afb91c605a 363 {
whismanoid 25:a2afb91c605a 364 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 25:a2afb91c605a 365 }
whismanoid 25:a2afb91c605a 366 // hex dump misoData[0..byteCount-1]
whismanoid 25:a2afb91c605a 367 cmdLine_microUSBserial.serial().printf(" MISO<-");
whismanoid 25:a2afb91c605a 368 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 25:a2afb91c605a 369 {
whismanoid 25:a2afb91c605a 370 cmdLine_microUSBserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 25:a2afb91c605a 371 }
whismanoid 25:a2afb91c605a 372 cmdLine_microUSBserial.serial().printf(" ");
whismanoid 25:a2afb91c605a 373 #endif
whismanoid 25:a2afb91c605a 374 #if 0 // HAS_DAPLINK_SERIAL
whismanoid 25:a2afb91c605a 375 cmdLine_DAPLINKserial.serial().printf("\r\nSPI");
whismanoid 25:a2afb91c605a 376 if (byteCount > 7) {
whismanoid 25:a2afb91c605a 377 cmdLine_DAPLINKserial.serial().printf(" byteCount:%d", byteCount);
whismanoid 25:a2afb91c605a 378 }
whismanoid 25:a2afb91c605a 379 cmdLine_DAPLINKserial.serial().printf(" MOSI->");
whismanoid 25:a2afb91c605a 380 for (unsigned int byteIndex = 0; byteIndex < byteCount; byteIndex++)
whismanoid 25:a2afb91c605a 381 {
whismanoid 25:a2afb91c605a 382 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", mosiData[byteIndex]);
whismanoid 25:a2afb91c605a 383 }
whismanoid 25:a2afb91c605a 384 // hex dump misoData[0..byteCount-1]
whismanoid 25:a2afb91c605a 385 cmdLine_DAPLINKserial.serial().printf(" MISO<-");
whismanoid 25:a2afb91c605a 386 for (unsigned int byteIndex = 0; byteIndex < numBytesTransferred; byteIndex++)
whismanoid 25:a2afb91c605a 387 {
whismanoid 25:a2afb91c605a 388 cmdLine_DAPLINKserial.serial().printf(" 0x%2.2X", misoData[byteIndex]);
whismanoid 25:a2afb91c605a 389 }
whismanoid 25:a2afb91c605a 390 cmdLine_DAPLINKserial.serial().printf(" ");
whismanoid 25:a2afb91c605a 391 #endif
whismanoid 25:a2afb91c605a 392 // VERIFY: DIAGNOSTIC: print MAX5715 device register write
whismanoid 25:a2afb91c605a 393 // TODO: MAX5715_print_register_verbose(mosiData8_FF0000, mosiData16_00FFFF);
whismanoid 25:a2afb91c605a 394 // TODO: print_verbose_SPI_diagnostic(mosiData16_FF00, mosiData16_00FF, misoData16_FF00, misoData16_00FF);
whismanoid 25:a2afb91c605a 395 //
whismanoid 25:a2afb91c605a 396 //int misoData32 = (misoData32_FF000000 << 24) | (misoData32_FF0000 << 16) | (misoData32_0000FF00 << 8) | misoData32_000000FF;
whismanoid 25:a2afb91c605a 397 int misoData32 = (misoData[0] << 24) | (misoData[1] << 16) | (misoData[2] << 8) | misoData[3];
whismanoid 25:a2afb91c605a 398 return misoData32;
whismanoid 25:a2afb91c605a 399 }
whismanoid 25:a2afb91c605a 400
whismanoid 19:8f951e448ab1 401 // CODE GENERATOR: class member function definitions
whismanoid 19:8f951e448ab1 402 //----------------------------------------
whismanoid 35:8aa5dffe523d 403 // Menu item '!'
whismanoid 19:8f951e448ab1 404 // Initialize device
whismanoid 19:8f951e448ab1 405 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 406 uint8_t MAX11410::Init(void)
whismanoid 19:8f951e448ab1 407 {
whismanoid 19:8f951e448ab1 408
whismanoid 19:8f951e448ab1 409 //----------------------------------------
whismanoid 19:8f951e448ab1 410 // Nominal Full-Scale Voltage Reference
whismanoid 19:8f951e448ab1 411 VRef = 2.500;
whismanoid 19:8f951e448ab1 412
whismanoid 19:8f951e448ab1 413 //----------------------------------------
whismanoid 19:8f951e448ab1 414 // success
whismanoid 19:8f951e448ab1 415 return 1;
whismanoid 19:8f951e448ab1 416 }
whismanoid 19:8f951e448ab1 417
whismanoid 19:8f951e448ab1 418 //----------------------------------------
whismanoid 19:8f951e448ab1 419 // Return the physical voltage corresponding to DAC register.
whismanoid 19:8f951e448ab1 420 // Does not perform any offset or gain correction.
whismanoid 19:8f951e448ab1 421 //
whismanoid 19:8f951e448ab1 422 // @pre VRef = Voltage of REF input, in Volts
whismanoid 19:8f951e448ab1 423 // @param[in] value_u24: raw 24-bit MAX11410 code (right justified).
whismanoid 19:8f951e448ab1 424 // @return physical voltage corresponding to MAX11410 code.
whismanoid 19:8f951e448ab1 425 double MAX11410::VoltageOfCode(uint16_t value_u24)
whismanoid 19:8f951e448ab1 426 {
whismanoid 19:8f951e448ab1 427
whismanoid 19:8f951e448ab1 428 //----------------------------------------
whismanoid 19:8f951e448ab1 429 // Linear map min and max endpoints
whismanoid 19:8f951e448ab1 430 double MaxScaleVoltage = VRef; // voltage of maximum code 0xffffff
whismanoid 19:8f951e448ab1 431 double MinScaleVoltage = 0.0; // voltage of minimum code 0x000
whismanoid 35:8aa5dffe523d 432 const uint32_t FULL_SCALE_CODE_24BIT = 0xffffff;
whismanoid 35:8aa5dffe523d 433 const uint32_t MaxCode = FULL_SCALE_CODE_24BIT;
whismanoid 35:8aa5dffe523d 434 const uint32_t MinCode = 0x000;
whismanoid 19:8f951e448ab1 435 double codeFraction = ((double)value_u24 - MinCode) / (MaxCode - MinCode + 1);
whismanoid 19:8f951e448ab1 436 return MinScaleVoltage + ((MaxScaleVoltage - MinScaleVoltage) * codeFraction);
whismanoid 19:8f951e448ab1 437 }
whismanoid 19:8f951e448ab1 438
whismanoid 19:8f951e448ab1 439 //----------------------------------------
whismanoid 35:8aa5dffe523d 440 // Write a MAX11410 register.
whismanoid 35:8aa5dffe523d 441 //
whismanoid 35:8aa5dffe523d 442 // CMD_1aaa_aaaa_REGISTER_READ bit is cleared 0 indicating a write operation.
whismanoid 35:8aa5dffe523d 443 //
whismanoid 35:8aa5dffe523d 444 // MAX11410 register length can be determined by function RegSize.
whismanoid 19:8f951e448ab1 445 //
whismanoid 35:8aa5dffe523d 446 // For 8-bit register size:
whismanoid 35:8aa5dffe523d 447 //
whismanoid 35:8aa5dffe523d 448 // SPI 16-bit transfer
whismanoid 35:8aa5dffe523d 449 //
whismanoid 35:8aa5dffe523d 450 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 35:8aa5dffe523d 451 //
whismanoid 35:8aa5dffe523d 452 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 19:8f951e448ab1 453 //
whismanoid 35:8aa5dffe523d 454 // For 16-bit register size:
whismanoid 35:8aa5dffe523d 455 //
whismanoid 35:8aa5dffe523d 456 // SPI 24-bit or 32-bit transfer
whismanoid 35:8aa5dffe523d 457 //
whismanoid 35:8aa5dffe523d 458 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 459 //
whismanoid 35:8aa5dffe523d 460 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 19:8f951e448ab1 461 //
whismanoid 35:8aa5dffe523d 462 // For 24-bit register size:
whismanoid 35:8aa5dffe523d 463 //
whismanoid 35:8aa5dffe523d 464 // SPI 32-bit transfer
whismanoid 19:8f951e448ab1 465 //
whismanoid 35:8aa5dffe523d 466 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 467 //
whismanoid 35:8aa5dffe523d 468 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 19:8f951e448ab1 469 //
whismanoid 19:8f951e448ab1 470 // @return 1 on success; 0 on failure
whismanoid 35:8aa5dffe523d 471 uint8_t MAX11410::RegWrite(MAX11410_CMD_enum_t regAddress, uint32_t regData)
whismanoid 19:8f951e448ab1 472 {
whismanoid 25:a2afb91c605a 473
whismanoid 25:a2afb91c605a 474 //----------------------------------------
whismanoid 35:8aa5dffe523d 475 // switch based on register address szie RegSize(regAddress)
whismanoid 35:8aa5dffe523d 476 regAddress = (MAX11410_CMD_enum_t)((regAddress &~ CMD_1aaa_aaaa_REGISTER_READ) & 0xFF);
whismanoid 35:8aa5dffe523d 477 switch(RegSize(regAddress))
whismanoid 35:8aa5dffe523d 478 {
whismanoid 35:8aa5dffe523d 479 case 8: // 8-bit register size
whismanoid 35:8aa5dffe523d 480 #warning "Not Verified Yet: MAX11410::RegWrite 8-bit SPIwrite16bits"
whismanoid 35:8aa5dffe523d 481 {
whismanoid 35:8aa5dffe523d 482 // SPI 16-bit transfer
whismanoid 35:8aa5dffe523d 483 // SPI MOSI = 0aaa_aaaa_dddd_dddd
whismanoid 35:8aa5dffe523d 484 // SPI MISO = xxxx_xxxx_xxxx_xxxx
whismanoid 35:8aa5dffe523d 485 int16_t mosiData16 = ((int16_t)regAddress << 8) | ((int16_t)regData & 0xFF);
whismanoid 35:8aa5dffe523d 486 SPIoutputCS(0);
whismanoid 35:8aa5dffe523d 487 SPIwrite16bits(mosiData16);
whismanoid 35:8aa5dffe523d 488 SPIoutputCS(1);
whismanoid 35:8aa5dffe523d 489 }
whismanoid 35:8aa5dffe523d 490 break;
whismanoid 35:8aa5dffe523d 491 case 16: // 16-bit register size
whismanoid 35:8aa5dffe523d 492 #warning "Not Verified Yet: MAX11410::RegWrite 16-bit SPIreadWrite32bits"
whismanoid 35:8aa5dffe523d 493 {
whismanoid 35:8aa5dffe523d 494 // SPI 24-bit or 32-bit transfer
whismanoid 35:8aa5dffe523d 495 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 496 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 35:8aa5dffe523d 497 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_0000_0000
whismanoid 35:8aa5dffe523d 498 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 35:8aa5dffe523d 499 int32_t mosiData32 = ((int32_t)regAddress << 24) | (((int32_t)regData & 0xFFFF) << 8);
whismanoid 35:8aa5dffe523d 500 SPIoutputCS(0);
whismanoid 35:8aa5dffe523d 501 SPIreadWrite32bits(mosiData32);
whismanoid 35:8aa5dffe523d 502 SPIoutputCS(1);
whismanoid 35:8aa5dffe523d 503 }
whismanoid 35:8aa5dffe523d 504 break;
whismanoid 35:8aa5dffe523d 505 case 24: // 24-bit register size
whismanoid 35:8aa5dffe523d 506 #warning "Not Verified Yet: MAX11410::RegWrite 24-bit SPIreadWrite32bits"
whismanoid 35:8aa5dffe523d 507 {
whismanoid 35:8aa5dffe523d 508 // SPI 32-bit transfer
whismanoid 35:8aa5dffe523d 509 // SPI MOSI = 0aaa_aaaa_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 510 // SPI MISO = xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx
whismanoid 35:8aa5dffe523d 511 int32_t mosiData32 = ((int32_t)regAddress << 24) | ((int32_t)regData & 0x00FFFFFF);
whismanoid 35:8aa5dffe523d 512 SPIoutputCS(0);
whismanoid 35:8aa5dffe523d 513 SPIreadWrite32bits(mosiData32);
whismanoid 35:8aa5dffe523d 514 SPIoutputCS(1);
whismanoid 35:8aa5dffe523d 515 }
whismanoid 35:8aa5dffe523d 516 break;
whismanoid 35:8aa5dffe523d 517 }
whismanoid 19:8f951e448ab1 518
whismanoid 19:8f951e448ab1 519 //----------------------------------------
whismanoid 19:8f951e448ab1 520 // success
whismanoid 19:8f951e448ab1 521 return 1;
whismanoid 19:8f951e448ab1 522 }
whismanoid 19:8f951e448ab1 523
whismanoid 19:8f951e448ab1 524 //----------------------------------------
whismanoid 19:8f951e448ab1 525 // Read an 8-bit MAX11410 register
whismanoid 19:8f951e448ab1 526 //
whismanoid 35:8aa5dffe523d 527 // CMD_1aaa_aaaa_REGISTER_READ bit is set 1 indicating a read operation.
whismanoid 35:8aa5dffe523d 528 //
whismanoid 35:8aa5dffe523d 529 // MAX11410 register length can be determined by function RegSize.
whismanoid 35:8aa5dffe523d 530 //
whismanoid 35:8aa5dffe523d 531 // For 8-bit register size:
whismanoid 19:8f951e448ab1 532 //
whismanoid 35:8aa5dffe523d 533 // SPI 16-bit transfer
whismanoid 35:8aa5dffe523d 534 //
whismanoid 35:8aa5dffe523d 535 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 35:8aa5dffe523d 536 //
whismanoid 35:8aa5dffe523d 537 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 35:8aa5dffe523d 538 //
whismanoid 35:8aa5dffe523d 539 // For 16-bit register size:
whismanoid 19:8f951e448ab1 540 //
whismanoid 35:8aa5dffe523d 541 // SPI 24-bit or 32-bit transfer
whismanoid 35:8aa5dffe523d 542 //
whismanoid 35:8aa5dffe523d 543 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 35:8aa5dffe523d 544 //
whismanoid 35:8aa5dffe523d 545 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 19:8f951e448ab1 546 //
whismanoid 35:8aa5dffe523d 547 // For 24-bit register size:
whismanoid 35:8aa5dffe523d 548 //
whismanoid 35:8aa5dffe523d 549 // SPI 32-bit transfer
whismanoid 35:8aa5dffe523d 550 //
whismanoid 35:8aa5dffe523d 551 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 35:8aa5dffe523d 552 //
whismanoid 35:8aa5dffe523d 553 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 554 //
whismanoid 19:8f951e448ab1 555 //
whismanoid 19:8f951e448ab1 556 // @return 1 on success; 0 on failure
whismanoid 35:8aa5dffe523d 557 uint8_t MAX11410::RegRead(MAX11410_CMD_enum_t regAddress, uint32_t* ptrRegData)
whismanoid 19:8f951e448ab1 558 {
whismanoid 25:a2afb91c605a 559
whismanoid 25:a2afb91c605a 560 //----------------------------------------
whismanoid 35:8aa5dffe523d 561 // switch based on register address szie RegSize(regAddress)
whismanoid 35:8aa5dffe523d 562 regAddress = (MAX11410_CMD_enum_t)((regAddress &~ CMD_1aaa_aaaa_REGISTER_READ) & 0xFF);
whismanoid 35:8aa5dffe523d 563 switch(RegSize(regAddress))
whismanoid 35:8aa5dffe523d 564 {
whismanoid 35:8aa5dffe523d 565 case 8: // 8-bit register size
whismanoid 35:8aa5dffe523d 566 #warning "Not Verified Yet: MAX11410::RegRead 8-bit SPIreadWrite16bits"
whismanoid 35:8aa5dffe523d 567 {
whismanoid 35:8aa5dffe523d 568 // SPI 16-bit transfer
whismanoid 35:8aa5dffe523d 569 // SPI MOSI = 1aaa_aaaa_0000_0000
whismanoid 35:8aa5dffe523d 570 // SPI MISO = xxxx_xxxx_dddd_dddd
whismanoid 35:8aa5dffe523d 571 int16_t mosiData16 = ((CMD_1aaa_aaaa_REGISTER_READ | (int16_t)regAddress) << 8) | ((int16_t)0);
whismanoid 35:8aa5dffe523d 572 SPIoutputCS(0);
whismanoid 35:8aa5dffe523d 573 int16_t misoData16 = SPIreadWrite16bits(mosiData16);
whismanoid 35:8aa5dffe523d 574 SPIoutputCS(1);
whismanoid 35:8aa5dffe523d 575 (*ptrRegData) = (misoData16 & 0x00FF);
whismanoid 35:8aa5dffe523d 576 }
whismanoid 35:8aa5dffe523d 577 break;
whismanoid 35:8aa5dffe523d 578 case 16: // 16-bit register size
whismanoid 35:8aa5dffe523d 579 #warning "Not Verified Yet: MAX11410::RegRead 16-bit SPIreadWrite32bits"
whismanoid 35:8aa5dffe523d 580 {
whismanoid 35:8aa5dffe523d 581 // SPI 24-bit or 32-bit transfer
whismanoid 35:8aa5dffe523d 582 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000
whismanoid 35:8aa5dffe523d 583 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 584 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 35:8aa5dffe523d 585 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_xxxx_xxxx
whismanoid 35:8aa5dffe523d 586 int32_t mosiData32 = ((CMD_1aaa_aaaa_REGISTER_READ | (int32_t)regAddress) << 24);
whismanoid 35:8aa5dffe523d 587 SPIoutputCS(0);
whismanoid 35:8aa5dffe523d 588 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 35:8aa5dffe523d 589 SPIoutputCS(1);
whismanoid 35:8aa5dffe523d 590 (*ptrRegData) = ((misoData32 >> 8) & 0x00FFFF);
whismanoid 35:8aa5dffe523d 591 }
whismanoid 35:8aa5dffe523d 592 break;
whismanoid 35:8aa5dffe523d 593 case 24: // 24-bit register size
whismanoid 35:8aa5dffe523d 594 #warning "Not Verified Yet: MAX11410::RegRead 24-bit SPIreadWrite32bits"
whismanoid 35:8aa5dffe523d 595 {
whismanoid 35:8aa5dffe523d 596 // SPI 32-bit transfer
whismanoid 35:8aa5dffe523d 597 // SPI MOSI = 1aaa_aaaa_0000_0000_0000_0000_0000_0000
whismanoid 35:8aa5dffe523d 598 // SPI MISO = xxxx_xxxx_dddd_dddd_dddd_dddd_dddd_dddd
whismanoid 35:8aa5dffe523d 599 int32_t mosiData32 = ((CMD_1aaa_aaaa_REGISTER_READ | (int32_t)regAddress) << 24);
whismanoid 35:8aa5dffe523d 600 SPIoutputCS(0);
whismanoid 35:8aa5dffe523d 601 int32_t misoData32 = SPIreadWrite32bits(mosiData32);
whismanoid 35:8aa5dffe523d 602 SPIoutputCS(1);
whismanoid 35:8aa5dffe523d 603 (*ptrRegData) = (misoData32 & 0x00FFFFFF);
whismanoid 35:8aa5dffe523d 604 }
whismanoid 35:8aa5dffe523d 605 break;
whismanoid 35:8aa5dffe523d 606 }
whismanoid 19:8f951e448ab1 607
whismanoid 19:8f951e448ab1 608 //----------------------------------------
whismanoid 19:8f951e448ab1 609 // success
whismanoid 19:8f951e448ab1 610 return 1;
whismanoid 19:8f951e448ab1 611 }
whismanoid 19:8f951e448ab1 612
whismanoid 19:8f951e448ab1 613 //----------------------------------------
whismanoid 35:8aa5dffe523d 614 // Return the size of a MAX11410 register
whismanoid 19:8f951e448ab1 615 //
whismanoid 35:8aa5dffe523d 616 // @return 8 for 8-bit, 16 for 16-bit, 24 for 24-bit, else 0 for undefined register size
whismanoid 35:8aa5dffe523d 617 uint8_t MAX11410::RegSize(MAX11410_CMD_enum_t regAddress)
whismanoid 19:8f951e448ab1 618 {
whismanoid 25:a2afb91c605a 619
whismanoid 25:a2afb91c605a 620 //----------------------------------------
whismanoid 35:8aa5dffe523d 621 // switch based on register address value regAddress
whismanoid 35:8aa5dffe523d 622 regAddress = (MAX11410_CMD_enum_t)((regAddress &~ CMD_1aaa_aaaa_REGISTER_READ) & 0xFF);
whismanoid 35:8aa5dffe523d 623 switch(regAddress)
whismanoid 35:8aa5dffe523d 624 {
whismanoid 35:8aa5dffe523d 625 default:
whismanoid 35:8aa5dffe523d 626 return 0; // undefined register size
whismanoid 35:8aa5dffe523d 627 case CMD_r000_0000_xxxx_xxdd_PD:
whismanoid 35:8aa5dffe523d 628 case CMD_r000_0001_xddd_xxdd_CONV_START:
whismanoid 35:8aa5dffe523d 629 case CMD_r000_0010_xddd_dddd_SEQ_START:
whismanoid 35:8aa5dffe523d 630 case CMD_r000_0011_xxxx_xddd_CAL_START:
whismanoid 35:8aa5dffe523d 631 case CMD_r000_0100_dddd_xddd_GP0_CTRL:
whismanoid 35:8aa5dffe523d 632 case CMD_r000_0101_dddd_xddd_GP1_CTRL:
whismanoid 35:8aa5dffe523d 633 case CMD_r000_0110_xddd_xxdd_GP_CONV:
whismanoid 35:8aa5dffe523d 634 case CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR:
whismanoid 35:8aa5dffe523d 635 case CMD_r000_1000_x0dd_dddd_FILTER:
whismanoid 35:8aa5dffe523d 636 case CMD_r000_1001_dddd_dddd_CTRL:
whismanoid 35:8aa5dffe523d 637 case CMD_r000_1010_dddd_dddd_SOURCE:
whismanoid 35:8aa5dffe523d 638 case CMD_r000_1011_dddd_dddd_MUX_CTRL0:
whismanoid 35:8aa5dffe523d 639 case CMD_r000_1100_dddd_dddd_MUX_CTRL1:
whismanoid 35:8aa5dffe523d 640 case CMD_r000_1101_dddd_dddd_MUX_CTRL2:
whismanoid 35:8aa5dffe523d 641 case CMD_r000_1110_xxdd_xddd_PGA:
whismanoid 35:8aa5dffe523d 642 case CMD_r000_1111_dddd_dddd_WAIT_EXT:
whismanoid 35:8aa5dffe523d 643 case CMD_r001_0000_xxxx_xxxx_WAIT_START:
whismanoid 35:8aa5dffe523d 644 return 8; // 8-bit register size
whismanoid 35:8aa5dffe523d 645 case CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID:
whismanoid 35:8aa5dffe523d 646 case CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL:
whismanoid 35:8aa5dffe523d 647 case CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A:
whismanoid 35:8aa5dffe523d 648 case CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B:
whismanoid 35:8aa5dffe523d 649 case CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A:
whismanoid 35:8aa5dffe523d 650 case CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B:
whismanoid 35:8aa5dffe523d 651 case CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF:
whismanoid 35:8aa5dffe523d 652 case CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1:
whismanoid 35:8aa5dffe523d 653 case CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2:
whismanoid 35:8aa5dffe523d 654 case CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4:
whismanoid 35:8aa5dffe523d 655 case CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8:
whismanoid 35:8aa5dffe523d 656 case CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16:
whismanoid 35:8aa5dffe523d 657 case CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32:
whismanoid 35:8aa5dffe523d 658 case CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64:
whismanoid 35:8aa5dffe523d 659 case CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128:
whismanoid 35:8aa5dffe523d 660 case CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0:
whismanoid 35:8aa5dffe523d 661 case CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1:
whismanoid 35:8aa5dffe523d 662 case CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2:
whismanoid 35:8aa5dffe523d 663 case CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3:
whismanoid 35:8aa5dffe523d 664 case CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4:
whismanoid 35:8aa5dffe523d 665 case CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5:
whismanoid 35:8aa5dffe523d 666 case CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6:
whismanoid 35:8aa5dffe523d 667 case CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7:
whismanoid 35:8aa5dffe523d 668 case CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0:
whismanoid 35:8aa5dffe523d 669 case CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1:
whismanoid 35:8aa5dffe523d 670 case CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2:
whismanoid 35:8aa5dffe523d 671 case CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3:
whismanoid 35:8aa5dffe523d 672 case CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4:
whismanoid 35:8aa5dffe523d 673 case CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5:
whismanoid 35:8aa5dffe523d 674 case CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6:
whismanoid 35:8aa5dffe523d 675 case CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7:
whismanoid 35:8aa5dffe523d 676 case CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0:
whismanoid 35:8aa5dffe523d 677 case CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1:
whismanoid 35:8aa5dffe523d 678 case CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2:
whismanoid 35:8aa5dffe523d 679 case CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3:
whismanoid 35:8aa5dffe523d 680 case CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4:
whismanoid 35:8aa5dffe523d 681 case CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5:
whismanoid 35:8aa5dffe523d 682 case CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6:
whismanoid 35:8aa5dffe523d 683 case CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7:
whismanoid 35:8aa5dffe523d 684 case CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS:
whismanoid 35:8aa5dffe523d 685 case CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE:
whismanoid 35:8aa5dffe523d 686 return 24; // 24-bit register size
whismanoid 35:8aa5dffe523d 687 case CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0:
whismanoid 35:8aa5dffe523d 688 case CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1:
whismanoid 35:8aa5dffe523d 689 case CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2:
whismanoid 35:8aa5dffe523d 690 case CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3:
whismanoid 35:8aa5dffe523d 691 case CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4:
whismanoid 35:8aa5dffe523d 692 case CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5:
whismanoid 35:8aa5dffe523d 693 case CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6:
whismanoid 35:8aa5dffe523d 694 case CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7:
whismanoid 35:8aa5dffe523d 695 case CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8:
whismanoid 35:8aa5dffe523d 696 case CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9:
whismanoid 35:8aa5dffe523d 697 case CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10:
whismanoid 35:8aa5dffe523d 698 case CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11:
whismanoid 35:8aa5dffe523d 699 case CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12:
whismanoid 35:8aa5dffe523d 700 case CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13:
whismanoid 35:8aa5dffe523d 701 case CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14:
whismanoid 35:8aa5dffe523d 702 case CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15:
whismanoid 35:8aa5dffe523d 703 case CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16:
whismanoid 35:8aa5dffe523d 704 case CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17:
whismanoid 35:8aa5dffe523d 705 case CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18:
whismanoid 35:8aa5dffe523d 706 case CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19:
whismanoid 35:8aa5dffe523d 707 case CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20:
whismanoid 35:8aa5dffe523d 708 case CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21:
whismanoid 35:8aa5dffe523d 709 case CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22:
whismanoid 35:8aa5dffe523d 710 case CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23:
whismanoid 35:8aa5dffe523d 711 case CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24:
whismanoid 35:8aa5dffe523d 712 case CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25:
whismanoid 35:8aa5dffe523d 713 case CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26:
whismanoid 35:8aa5dffe523d 714 case CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27:
whismanoid 35:8aa5dffe523d 715 case CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28:
whismanoid 35:8aa5dffe523d 716 case CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29:
whismanoid 35:8aa5dffe523d 717 case CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30:
whismanoid 35:8aa5dffe523d 718 case CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31:
whismanoid 35:8aa5dffe523d 719 case CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32:
whismanoid 35:8aa5dffe523d 720 case CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33:
whismanoid 35:8aa5dffe523d 721 case CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34:
whismanoid 35:8aa5dffe523d 722 case CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35:
whismanoid 35:8aa5dffe523d 723 case CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36:
whismanoid 35:8aa5dffe523d 724 case CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37:
whismanoid 35:8aa5dffe523d 725 case CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38:
whismanoid 35:8aa5dffe523d 726 case CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39:
whismanoid 35:8aa5dffe523d 727 case CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40:
whismanoid 35:8aa5dffe523d 728 case CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41:
whismanoid 35:8aa5dffe523d 729 case CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42:
whismanoid 35:8aa5dffe523d 730 case CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43:
whismanoid 35:8aa5dffe523d 731 case CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44:
whismanoid 35:8aa5dffe523d 732 case CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45:
whismanoid 35:8aa5dffe523d 733 case CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46:
whismanoid 35:8aa5dffe523d 734 case CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47:
whismanoid 35:8aa5dffe523d 735 case CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48:
whismanoid 35:8aa5dffe523d 736 case CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49:
whismanoid 35:8aa5dffe523d 737 case CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50:
whismanoid 35:8aa5dffe523d 738 case CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51:
whismanoid 35:8aa5dffe523d 739 case CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52:
whismanoid 35:8aa5dffe523d 740 case CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR:
whismanoid 35:8aa5dffe523d 741 return 16; // 16-bit register size
whismanoid 35:8aa5dffe523d 742 }
whismanoid 19:8f951e448ab1 743 }
whismanoid 19:8f951e448ab1 744
whismanoid 19:8f951e448ab1 745 //----------------------------------------
whismanoid 35:8aa5dffe523d 746 // Return the name of a MAX11410 register
whismanoid 19:8f951e448ab1 747 //
whismanoid 35:8aa5dffe523d 748 // @return null-terminated constant C string containing register name or empty string
whismanoid 35:8aa5dffe523d 749 const char* MAX11410::RegName(MAX11410_CMD_enum_t regAddress)
whismanoid 19:8f951e448ab1 750 {
whismanoid 25:a2afb91c605a 751
whismanoid 25:a2afb91c605a 752 //----------------------------------------
whismanoid 35:8aa5dffe523d 753 // switch based on register address value regAddress
whismanoid 35:8aa5dffe523d 754 regAddress = (MAX11410_CMD_enum_t)((regAddress &~ CMD_1aaa_aaaa_REGISTER_READ) & 0xFF);
whismanoid 35:8aa5dffe523d 755 switch(regAddress)
whismanoid 35:8aa5dffe523d 756 {
whismanoid 35:8aa5dffe523d 757 default:
whismanoid 35:8aa5dffe523d 758 return ""; // undefined register
whismanoid 35:8aa5dffe523d 759 case CMD_r000_0000_xxxx_xxdd_PD: return "PD";
whismanoid 35:8aa5dffe523d 760 case CMD_r000_0001_xddd_xxdd_CONV_START: return "CONV_START";
whismanoid 35:8aa5dffe523d 761 case CMD_r000_0010_xddd_dddd_SEQ_START: return "SEQ_START";
whismanoid 35:8aa5dffe523d 762 case CMD_r000_0011_xxxx_xddd_CAL_START: return "CAL_START";
whismanoid 35:8aa5dffe523d 763 case CMD_r000_0100_dddd_xddd_GP0_CTRL: return "GP0_CTRL";
whismanoid 35:8aa5dffe523d 764 case CMD_r000_0101_dddd_xddd_GP1_CTRL: return "GP1_CTRL";
whismanoid 35:8aa5dffe523d 765 case CMD_r000_0110_xddd_xxdd_GP_CONV: return "GP_CONV";
whismanoid 35:8aa5dffe523d 766 case CMD_r000_0111_xddd_dddd_GP_SEQ_ADDR: return "GP_SEQ_ADDR";
whismanoid 35:8aa5dffe523d 767 case CMD_r000_1000_x0dd_dddd_FILTER: return "FILTER";
whismanoid 35:8aa5dffe523d 768 case CMD_r000_1001_dddd_dddd_CTRL: return "CTRL";
whismanoid 35:8aa5dffe523d 769 case CMD_r000_1010_dddd_dddd_SOURCE: return "SOURCE";
whismanoid 35:8aa5dffe523d 770 case CMD_r000_1011_dddd_dddd_MUX_CTRL0: return "MUX_CTRL0";
whismanoid 35:8aa5dffe523d 771 case CMD_r000_1100_dddd_dddd_MUX_CTRL1: return "MUX_CTRL1";
whismanoid 35:8aa5dffe523d 772 case CMD_r000_1101_dddd_dddd_MUX_CTRL2: return "MUX_CTRL2";
whismanoid 35:8aa5dffe523d 773 case CMD_r000_1110_xxdd_xddd_PGA: return "PGA";
whismanoid 35:8aa5dffe523d 774 case CMD_r000_1111_dddd_dddd_WAIT_EXT: return "WAIT_EXT";
whismanoid 35:8aa5dffe523d 775 case CMD_r001_0000_xxxx_xxxx_WAIT_START: return "WAIT_START";
whismanoid 35:8aa5dffe523d 776 case CMD_r001_0001_xxxx_xxxx_xxxx_xxxx_xxxx_xddd_PART_ID: return "PART_ID";
whismanoid 35:8aa5dffe523d 777 case CMD_r001_0010_xxxx_xxxx_dddd_xxdd_dddd_dddd_SYSC_SEL: return "SYSC_SEL";
whismanoid 35:8aa5dffe523d 778 case CMD_r001_0011_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_A: return "SYS_OFF_A";
whismanoid 35:8aa5dffe523d 779 case CMD_r001_0100_dddd_dddd_dddd_dddd_dddd_dddd_SYS_OFF_B: return "SYS_OFF_B";
whismanoid 35:8aa5dffe523d 780 case CMD_r001_0101_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_A: return "SYS_GAIN_A";
whismanoid 35:8aa5dffe523d 781 case CMD_r001_0110_dddd_dddd_dddd_dddd_dddd_dddd_SYS_GAIN_B: return "SYS_GAIN_B";
whismanoid 35:8aa5dffe523d 782 case CMD_r001_0111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_OFF: return "SELF_OFF";
whismanoid 35:8aa5dffe523d 783 case CMD_r001_1000_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_1: return "SELF_GAIN_1";
whismanoid 35:8aa5dffe523d 784 case CMD_r001_1001_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_2: return "SELF_GAIN_2";
whismanoid 35:8aa5dffe523d 785 case CMD_r001_1010_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_4: return "SELF_GAIN_4";
whismanoid 35:8aa5dffe523d 786 case CMD_r001_1011_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_8: return "SELF_GAIN_8";
whismanoid 35:8aa5dffe523d 787 case CMD_r001_1100_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_16: return "SELF_GAIN_16";
whismanoid 35:8aa5dffe523d 788 case CMD_r001_1101_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_32: return "SELF_GAIN_32";
whismanoid 35:8aa5dffe523d 789 case CMD_r001_1110_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_64: return "SELF_GAIN_64";
whismanoid 35:8aa5dffe523d 790 case CMD_r001_1111_dddd_dddd_dddd_dddd_dddd_dddd_SELF_GAIN_128: return "SELF_GAIN_128";
whismanoid 35:8aa5dffe523d 791 case CMD_r010_0000_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH0: return "LTHRESH0";
whismanoid 35:8aa5dffe523d 792 case CMD_r010_0001_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH1: return "LTHRESH1";
whismanoid 35:8aa5dffe523d 793 case CMD_r010_0010_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH2: return "LTHRESH2";
whismanoid 35:8aa5dffe523d 794 case CMD_r010_0011_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH3: return "LTHRESH3";
whismanoid 35:8aa5dffe523d 795 case CMD_r010_0100_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH4: return "LTHRESH4";
whismanoid 35:8aa5dffe523d 796 case CMD_r010_0101_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH5: return "LTHRESH5";
whismanoid 35:8aa5dffe523d 797 case CMD_r010_0110_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH6: return "LTHRESH6";
whismanoid 35:8aa5dffe523d 798 case CMD_r010_0111_dddd_dddd_dddd_dddd_dddd_dddd_LTHRESH7: return "LTHRESH7";
whismanoid 35:8aa5dffe523d 799 case CMD_r010_1000_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH0: return "UTHRESH0";
whismanoid 35:8aa5dffe523d 800 case CMD_r010_1001_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH1: return "UTHRESH1";
whismanoid 35:8aa5dffe523d 801 case CMD_r010_1010_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH2: return "UTHRESH2";
whismanoid 35:8aa5dffe523d 802 case CMD_r010_1011_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH3: return "UTHRESH3";
whismanoid 35:8aa5dffe523d 803 case CMD_r010_1100_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH4: return "UTHRESH4";
whismanoid 35:8aa5dffe523d 804 case CMD_r010_1101_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH5: return "UTHRESH5";
whismanoid 35:8aa5dffe523d 805 case CMD_r010_1110_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH6: return "UTHRESH6";
whismanoid 35:8aa5dffe523d 806 case CMD_r010_1111_dddd_dddd_dddd_dddd_dddd_dddd_UTHRESH7: return "UTHRESH7";
whismanoid 35:8aa5dffe523d 807 case CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0: return "DATA0";
whismanoid 35:8aa5dffe523d 808 case CMD_r011_0001_dddd_dddd_dddd_dddd_dddd_dddd_DATA1: return "DATA1";
whismanoid 35:8aa5dffe523d 809 case CMD_r011_0010_dddd_dddd_dddd_dddd_dddd_dddd_DATA2: return "DATA2";
whismanoid 35:8aa5dffe523d 810 case CMD_r011_0011_dddd_dddd_dddd_dddd_dddd_dddd_DATA3: return "DATA3";
whismanoid 35:8aa5dffe523d 811 case CMD_r011_0100_dddd_dddd_dddd_dddd_dddd_dddd_DATA4: return "DATA4";
whismanoid 35:8aa5dffe523d 812 case CMD_r011_0101_dddd_dddd_dddd_dddd_dddd_dddd_DATA5: return "DATA5";
whismanoid 35:8aa5dffe523d 813 case CMD_r011_0110_dddd_dddd_dddd_dddd_dddd_dddd_DATA6: return "DATA6";
whismanoid 35:8aa5dffe523d 814 case CMD_r011_0111_dddd_dddd_dddd_dddd_dddd_dddd_DATA7: return "DATA7";
whismanoid 35:8aa5dffe523d 815 case CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS: return "STATUS";
whismanoid 35:8aa5dffe523d 816 case CMD_r011_1001_dddd_dddd_dddd_dddd_dxxd_dddd_STATUS_IE: return "STATUS_IE";
whismanoid 35:8aa5dffe523d 817 case CMD_r011_1010_xaaa_aaaa_dddd_dddd_UC_0: return "UC_0";
whismanoid 35:8aa5dffe523d 818 case CMD_r011_1011_xaaa_aaaa_dddd_dddd_UC_1: return "UC_1";
whismanoid 35:8aa5dffe523d 819 case CMD_r011_1100_xaaa_aaaa_dddd_dddd_UC_2: return "UC_2";
whismanoid 35:8aa5dffe523d 820 case CMD_r011_1101_xaaa_aaaa_dddd_dddd_UC_3: return "UC_3";
whismanoid 35:8aa5dffe523d 821 case CMD_r011_1110_xaaa_aaaa_dddd_dddd_UC_4: return "UC_4";
whismanoid 35:8aa5dffe523d 822 case CMD_r011_1111_xaaa_aaaa_dddd_dddd_UC_5: return "UC_5";
whismanoid 35:8aa5dffe523d 823 case CMD_r100_0000_xaaa_aaaa_dddd_dddd_UC_6: return "UC_6";
whismanoid 35:8aa5dffe523d 824 case CMD_r100_0001_xaaa_aaaa_dddd_dddd_UC_7: return "UC_7";
whismanoid 35:8aa5dffe523d 825 case CMD_r100_0010_xaaa_aaaa_dddd_dddd_UC_8: return "UC_8";
whismanoid 35:8aa5dffe523d 826 case CMD_r100_0011_xaaa_aaaa_dddd_dddd_UC_9: return "UC_9";
whismanoid 35:8aa5dffe523d 827 case CMD_r100_0100_xaaa_aaaa_dddd_dddd_UC_10: return "UC_10";
whismanoid 35:8aa5dffe523d 828 case CMD_r100_0101_xaaa_aaaa_dddd_dddd_UC_11: return "UC_11";
whismanoid 35:8aa5dffe523d 829 case CMD_r100_0110_xaaa_aaaa_dddd_dddd_UC_12: return "UC_12";
whismanoid 35:8aa5dffe523d 830 case CMD_r100_0111_xaaa_aaaa_dddd_dddd_UC_13: return "UC_13";
whismanoid 35:8aa5dffe523d 831 case CMD_r100_1000_xaaa_aaaa_dddd_dddd_UC_14: return "UC_14";
whismanoid 35:8aa5dffe523d 832 case CMD_r100_1001_xaaa_aaaa_dddd_dddd_UC_15: return "UC_15";
whismanoid 35:8aa5dffe523d 833 case CMD_r100_1010_xaaa_aaaa_dddd_dddd_UC_16: return "UC_16";
whismanoid 35:8aa5dffe523d 834 case CMD_r100_1011_xaaa_aaaa_dddd_dddd_UC_17: return "UC_17";
whismanoid 35:8aa5dffe523d 835 case CMD_r100_1100_xaaa_aaaa_dddd_dddd_UC_18: return "UC_18";
whismanoid 35:8aa5dffe523d 836 case CMD_r100_1101_xaaa_aaaa_dddd_dddd_UC_19: return "UC_19";
whismanoid 35:8aa5dffe523d 837 case CMD_r100_1110_xaaa_aaaa_dddd_dddd_UC_20: return "UC_20";
whismanoid 35:8aa5dffe523d 838 case CMD_r100_1111_xaaa_aaaa_dddd_dddd_UC_21: return "UC_21";
whismanoid 35:8aa5dffe523d 839 case CMD_r101_0000_xaaa_aaaa_dddd_dddd_UC_22: return "UC_22";
whismanoid 35:8aa5dffe523d 840 case CMD_r101_0001_xaaa_aaaa_dddd_dddd_UC_23: return "UC_23";
whismanoid 35:8aa5dffe523d 841 case CMD_r101_0010_xaaa_aaaa_dddd_dddd_UC_24: return "UC_24";
whismanoid 35:8aa5dffe523d 842 case CMD_r101_0011_xaaa_aaaa_dddd_dddd_UC_25: return "UC_25";
whismanoid 35:8aa5dffe523d 843 case CMD_r101_0100_xaaa_aaaa_dddd_dddd_UC_26: return "UC_26";
whismanoid 35:8aa5dffe523d 844 case CMD_r101_0101_xaaa_aaaa_dddd_dddd_UC_27: return "UC_27";
whismanoid 35:8aa5dffe523d 845 case CMD_r101_0110_xaaa_aaaa_dddd_dddd_UC_28: return "UC_28";
whismanoid 35:8aa5dffe523d 846 case CMD_r101_0111_xaaa_aaaa_dddd_dddd_UC_29: return "UC_29";
whismanoid 35:8aa5dffe523d 847 case CMD_r101_1000_xaaa_aaaa_dddd_dddd_UC_30: return "UC_30";
whismanoid 35:8aa5dffe523d 848 case CMD_r101_1001_xaaa_aaaa_dddd_dddd_UC_31: return "UC_31";
whismanoid 35:8aa5dffe523d 849 case CMD_r101_1010_xaaa_aaaa_dddd_dddd_UC_32: return "UC_32";
whismanoid 35:8aa5dffe523d 850 case CMD_r101_1011_xaaa_aaaa_dddd_dddd_UC_33: return "UC_33";
whismanoid 35:8aa5dffe523d 851 case CMD_r101_1100_xaaa_aaaa_dddd_dddd_UC_34: return "UC_34";
whismanoid 35:8aa5dffe523d 852 case CMD_r101_1101_xaaa_aaaa_dddd_dddd_UC_35: return "UC_35";
whismanoid 35:8aa5dffe523d 853 case CMD_r101_1110_xaaa_aaaa_dddd_dddd_UC_36: return "UC_36";
whismanoid 35:8aa5dffe523d 854 case CMD_r101_1111_xaaa_aaaa_dddd_dddd_UC_37: return "UC_37";
whismanoid 35:8aa5dffe523d 855 case CMD_r110_0000_xaaa_aaaa_dddd_dddd_UC_38: return "UC_38";
whismanoid 35:8aa5dffe523d 856 case CMD_r110_0001_xaaa_aaaa_dddd_dddd_UC_39: return "UC_39";
whismanoid 35:8aa5dffe523d 857 case CMD_r110_0010_xaaa_aaaa_dddd_dddd_UC_40: return "UC_40";
whismanoid 35:8aa5dffe523d 858 case CMD_r110_0011_xaaa_aaaa_dddd_dddd_UC_41: return "UC_41";
whismanoid 35:8aa5dffe523d 859 case CMD_r110_0100_xaaa_aaaa_dddd_dddd_UC_42: return "UC_42";
whismanoid 35:8aa5dffe523d 860 case CMD_r110_0101_xaaa_aaaa_dddd_dddd_UC_43: return "UC_43";
whismanoid 35:8aa5dffe523d 861 case CMD_r110_0110_xaaa_aaaa_dddd_dddd_UC_44: return "UC_44";
whismanoid 35:8aa5dffe523d 862 case CMD_r110_0111_xaaa_aaaa_dddd_dddd_UC_45: return "UC_45";
whismanoid 35:8aa5dffe523d 863 case CMD_r110_1000_xaaa_aaaa_dddd_dddd_UC_46: return "UC_46";
whismanoid 35:8aa5dffe523d 864 case CMD_r110_1001_xaaa_aaaa_dddd_dddd_UC_47: return "UC_47";
whismanoid 35:8aa5dffe523d 865 case CMD_r110_1010_xaaa_aaaa_dddd_dddd_UC_48: return "UC_48";
whismanoid 35:8aa5dffe523d 866 case CMD_r110_1011_xaaa_aaaa_dddd_dddd_UC_49: return "UC_49";
whismanoid 35:8aa5dffe523d 867 case CMD_r110_1100_xaaa_aaaa_dddd_dddd_UC_50: return "UC_50";
whismanoid 35:8aa5dffe523d 868 case CMD_r110_1101_xaaa_aaaa_dddd_dddd_UC_51: return "UC_51";
whismanoid 35:8aa5dffe523d 869 case CMD_r110_1110_xaaa_aaaa_dddd_dddd_UC_52: return "UC_52";
whismanoid 35:8aa5dffe523d 870 case CMD_r110_1111_xxxx_xxxx_xaaa_aaaa_UCADDR: return "UCADDR";
whismanoid 35:8aa5dffe523d 871 }
whismanoid 19:8f951e448ab1 872 }
whismanoid 19:8f951e448ab1 873
whismanoid 19:8f951e448ab1 874 //----------------------------------------
whismanoid 19:8f951e448ab1 875 // Configure Measurement for voltage input.
whismanoid 19:8f951e448ab1 876 //
whismanoid 19:8f951e448ab1 877 // Example code for typical voltage measurement.
whismanoid 19:8f951e448ab1 878 //
whismanoid 19:8f951e448ab1 879 // SPI register write sequence test AIN0-AGND voltage input using REF2=2.5V
whismanoid 19:8f951e448ab1 880 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 19:8f951e448ab1 881 // write8 0x00 PD = 0x00 (NOP)
whismanoid 19:8f951e448ab1 882 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous )
whismanoid 19:8f951e448ab1 883 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 19:8f951e448ab1 884 // write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid 19:8f951e448ab1 885 // write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid 19:8f951e448ab1 886 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 19:8f951e448ab1 887 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 19:8f951e448ab1 888 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 19:8f951e448ab1 889 //
whismanoid 19:8f951e448ab1 890 // @param[in] channel_hi = channel high side
whismanoid 19:8f951e448ab1 891 // @param[in] channel_lo = channel low side
whismanoid 19:8f951e448ab1 892 //
whismanoid 19:8f951e448ab1 893 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 894 uint8_t MAX11410::Configure_Voltage(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo)
whismanoid 19:8f951e448ab1 895 {
whismanoid 25:a2afb91c605a 896
whismanoid 25:a2afb91c605a 897 //----------------------------------------
whismanoid 25:a2afb91c605a 898 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 899 #warning "Not Tested Yet: MAX11410::Configure_Voltage..."
whismanoid 19:8f951e448ab1 900
whismanoid 19:8f951e448ab1 901 //----------------------------------------
whismanoid 19:8f951e448ab1 902 // write8 0x00 PD = 0x03 (Reset Registers; enter Standby mode)
whismanoid 35:8aa5dffe523d 903 RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_11_Reset);
whismanoid 19:8f951e448ab1 904
whismanoid 19:8f951e448ab1 905 //----------------------------------------
whismanoid 19:8f951e448ab1 906 // write8 0x00 PD = 0x00 (NOP)
whismanoid 35:8aa5dffe523d 907 RegWrite(CMD_r000_0000_xxxx_xxdd_PD, PD_00_Normal);
whismanoid 19:8f951e448ab1 908
whismanoid 19:8f951e448ab1 909 //----------------------------------------
whismanoid 19:8f951e448ab1 910 // write8 0x08 FILTER = 0x34 to select RATE_0100, LINEF_11_SINC4 60SPS (given CONV_TYPE_01_Continuous)
whismanoid 35:8aa5dffe523d 911 RegWrite(CMD_r000_1000_x0dd_dddd_FILTER, 0x34);
whismanoid 19:8f951e448ab1 912
whismanoid 19:8f951e448ab1 913 //----------------------------------------
whismanoid 19:8f951e448ab1 914 // write8 0x0B MUX_CTRL0 = 0x0A to select AINP=AIN0 and AINN=GND
whismanoid 35:8aa5dffe523d 915 RegWrite(CMD_r000_1011_dddd_dddd_MUX_CTRL0, 0x0A);
whismanoid 19:8f951e448ab1 916
whismanoid 19:8f951e448ab1 917 //----------------------------------------
whismanoid 19:8f951e448ab1 918 // write8 0x09 CTRL = 0x02 to select reference REF2P/REF2N; or CTRL = 0x1A to select reference REF2P/REF2N with reference input buffers enabled; Data Format = Bipolar 2's Complement
whismanoid 35:8aa5dffe523d 919 RegWrite(CMD_r000_1001_dddd_dddd_CTRL, 0x02);
whismanoid 19:8f951e448ab1 920
whismanoid 19:8f951e448ab1 921 //----------------------------------------
whismanoid 19:8f951e448ab1 922 // write8 0x0E PGA = 0x00 to select input path = Buffers, digital gain = 1V/V
whismanoid 35:8aa5dffe523d 923 RegWrite(CMD_r000_1110_xxdd_xddd_PGA, 0x00);
whismanoid 19:8f951e448ab1 924
whismanoid 19:8f951e448ab1 925 //----------------------------------------
whismanoid 19:8f951e448ab1 926 // write8 0x01 CONV_START = 0x01 to set Conversion Mode = Continuous
whismanoid 35:8aa5dffe523d 927 RegWrite(CMD_r000_0001_xddd_xxdd_CONV_START, 0x01);
whismanoid 19:8f951e448ab1 928
whismanoid 19:8f951e448ab1 929 //----------------------------------------
whismanoid 19:8f951e448ab1 930 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 931 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 19:8f951e448ab1 932
whismanoid 19:8f951e448ab1 933 //----------------------------------------
whismanoid 19:8f951e448ab1 934 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 935 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 35:8aa5dffe523d 936
whismanoid 35:8aa5dffe523d 937 //----------------------------------------
whismanoid 35:8aa5dffe523d 938 // success
whismanoid 35:8aa5dffe523d 939 return 1;
whismanoid 35:8aa5dffe523d 940 }
whismanoid 35:8aa5dffe523d 941
whismanoid 35:8aa5dffe523d 942 //----------------------------------------
whismanoid 35:8aa5dffe523d 943 // Measure ADC channels in sequence from AIN0 to channelNumber_0_9.
whismanoid 35:8aa5dffe523d 944 // @param[in] channel_hi = channel high side
whismanoid 35:8aa5dffe523d 945 // @param[in] channel_lo = channel low side
whismanoid 35:8aa5dffe523d 946 // @post AINcode[index]: measurement
whismanoid 35:8aa5dffe523d 947 //
whismanoid 35:8aa5dffe523d 948 // @return 1 on success; 0 on failure
whismanoid 35:8aa5dffe523d 949 uint8_t MAX11410::_TODO_MAX11410_Read_All_Voltages_(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo)
whismanoid 35:8aa5dffe523d 950 {
whismanoid 35:8aa5dffe523d 951
whismanoid 35:8aa5dffe523d 952 //----------------------------------------
whismanoid 35:8aa5dffe523d 953 // warning -- WIP work in progress
whismanoid 35:8aa5dffe523d 954 #warning "Not Tested Yet: MAX11410::_TODO_MAX11410_Read_All_Voltages_..."
whismanoid 35:8aa5dffe523d 955
whismanoid 35:8aa5dffe523d 956 //----------------------------------------
whismanoid 35:8aa5dffe523d 957 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 958 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 35:8aa5dffe523d 959
whismanoid 35:8aa5dffe523d 960 //----------------------------------------
whismanoid 35:8aa5dffe523d 961 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 962 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 25:a2afb91c605a 963
whismanoid 25:a2afb91c605a 964 //----------------------------------------
whismanoid 25:a2afb91c605a 965 // success
whismanoid 25:a2afb91c605a 966 return 1;
whismanoid 19:8f951e448ab1 967 }
whismanoid 19:8f951e448ab1 968
whismanoid 19:8f951e448ab1 969 //----------------------------------------
whismanoid 19:8f951e448ab1 970 // Trigger Measurement for voltage input.
whismanoid 19:8f951e448ab1 971 //
whismanoid 19:8f951e448ab1 972 // Example code for typical voltage measurement.
whismanoid 19:8f951e448ab1 973 //
whismanoid 19:8f951e448ab1 974 // @param[in] channel_hi = channel high side
whismanoid 19:8f951e448ab1 975 // @param[in] channel_lo = channel low side
whismanoid 19:8f951e448ab1 976 // @post TODO: where does the measurement go? struct member?
whismanoid 19:8f951e448ab1 977 //
whismanoid 19:8f951e448ab1 978 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 979 uint8_t MAX11410::Measure_Voltage(MAX11410_AINP_SEL_enum_t channel_hi, MAX11410_AINN_SEL_enum_t channel_lo)
whismanoid 19:8f951e448ab1 980 {
whismanoid 25:a2afb91c605a 981
whismanoid 25:a2afb91c605a 982 //----------------------------------------
whismanoid 25:a2afb91c605a 983 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 984 #warning "Not Tested Yet: MAX11410::Measure_Voltage..."
whismanoid 19:8f951e448ab1 985
whismanoid 19:8f951e448ab1 986 //----------------------------------------
whismanoid 25:a2afb91c605a 987 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 988 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 25:a2afb91c605a 989
whismanoid 25:a2afb91c605a 990 //----------------------------------------
whismanoid 25:a2afb91c605a 991 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 992 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 25:a2afb91c605a 993
whismanoid 25:a2afb91c605a 994 //----------------------------------------
whismanoid 19:8f951e448ab1 995 // success
whismanoid 19:8f951e448ab1 996 return 1;
whismanoid 19:8f951e448ab1 997 }
whismanoid 19:8f951e448ab1 998
whismanoid 19:8f951e448ab1 999 //----------------------------------------
whismanoid 19:8f951e448ab1 1000 // Configure Measurement for Resistive Temperature Device (RTD).
whismanoid 19:8f951e448ab1 1001 //
whismanoid 19:8f951e448ab1 1002 // Example code for typical RTD measurement.
whismanoid 19:8f951e448ab1 1003 //
whismanoid 19:8f951e448ab1 1004 // @param[in] channel_RTD_Force = channel RTD high side force
whismanoid 19:8f951e448ab1 1005 // @param[in] channel_RTD_Hi = channel RTD high side sense
whismanoid 19:8f951e448ab1 1006 // @param[in] channel_RTD_Lo = channel RTD low side
whismanoid 19:8f951e448ab1 1007 //
whismanoid 19:8f951e448ab1 1008 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 1009 uint8_t MAX11410::Configure_RTD(MAX11410_AINP_SEL_enum_t channel_RTD_Force, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINN_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 1010 {
whismanoid 25:a2afb91c605a 1011
whismanoid 25:a2afb91c605a 1012 //----------------------------------------
whismanoid 25:a2afb91c605a 1013 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 1014 #warning "Not Implemented Yet: MAX11410::Configure_RTD..."
whismanoid 19:8f951e448ab1 1015
whismanoid 19:8f951e448ab1 1016 //----------------------------------------
whismanoid 25:a2afb91c605a 1017 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 1018 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 25:a2afb91c605a 1019
whismanoid 25:a2afb91c605a 1020 //----------------------------------------
whismanoid 25:a2afb91c605a 1021 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 1022 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 25:a2afb91c605a 1023
whismanoid 25:a2afb91c605a 1024 //----------------------------------------
whismanoid 19:8f951e448ab1 1025 // success
whismanoid 19:8f951e448ab1 1026 return 1;
whismanoid 19:8f951e448ab1 1027 }
whismanoid 19:8f951e448ab1 1028
whismanoid 19:8f951e448ab1 1029 //----------------------------------------
whismanoid 19:8f951e448ab1 1030 // Trigger Measurement for Resistive Temperature Device (RTD).
whismanoid 19:8f951e448ab1 1031 //
whismanoid 19:8f951e448ab1 1032 // Example code for typical RTD measurement.
whismanoid 19:8f951e448ab1 1033 //
whismanoid 19:8f951e448ab1 1034 // @param[in] channel_RTD_Force = channel RTD high side force
whismanoid 19:8f951e448ab1 1035 // @param[in] channel_RTD_Hi = channel RTD high side sense
whismanoid 19:8f951e448ab1 1036 // @param[in] channel_RTD_Lo = channel RTD low side
whismanoid 19:8f951e448ab1 1037 // @post TODO: where does the measurement go? struct member?
whismanoid 19:8f951e448ab1 1038 //
whismanoid 19:8f951e448ab1 1039 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 1040 uint8_t MAX11410::Measure_RTD(MAX11410_AINP_SEL_enum_t channel_RTD_Force, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINN_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 1041 {
whismanoid 25:a2afb91c605a 1042
whismanoid 25:a2afb91c605a 1043 //----------------------------------------
whismanoid 25:a2afb91c605a 1044 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 1045 #warning "Not Implemented Yet: MAX11410::Measure_RTD..."
whismanoid 19:8f951e448ab1 1046
whismanoid 19:8f951e448ab1 1047 //----------------------------------------
whismanoid 25:a2afb91c605a 1048 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 1049 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 25:a2afb91c605a 1050
whismanoid 25:a2afb91c605a 1051 //----------------------------------------
whismanoid 25:a2afb91c605a 1052 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 1053 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 25:a2afb91c605a 1054
whismanoid 25:a2afb91c605a 1055 //----------------------------------------
whismanoid 19:8f951e448ab1 1056 // success
whismanoid 19:8f951e448ab1 1057 return 1;
whismanoid 19:8f951e448ab1 1058 }
whismanoid 19:8f951e448ab1 1059
whismanoid 19:8f951e448ab1 1060 //----------------------------------------
whismanoid 19:8f951e448ab1 1061 // Configure Measurement for Thermocouple
whismanoid 19:8f951e448ab1 1062 //
whismanoid 19:8f951e448ab1 1063 // Example code for typical Thermocouple measurement.
whismanoid 19:8f951e448ab1 1064 //
whismanoid 19:8f951e448ab1 1065 // @param[in] channel_TC_Hi = channel of Thermocouple high side
whismanoid 19:8f951e448ab1 1066 // @param[in] channel_TC_Lo = channel of Thermocouple low side
whismanoid 19:8f951e448ab1 1067 // @param[in] channel_RTD_Hi = channel of cold junction RTD high side
whismanoid 19:8f951e448ab1 1068 // @param[in] channel_RTD_Lo = channel of cold junction RTD low side
whismanoid 19:8f951e448ab1 1069 //
whismanoid 19:8f951e448ab1 1070 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 1071 uint8_t MAX11410::Configure_Thermocouple(MAX11410_AINP_SEL_enum_t channel_TC_Hi, MAX11410_AINN_SEL_enum_t channel_TC_Lo, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINP_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 1072 {
whismanoid 25:a2afb91c605a 1073
whismanoid 25:a2afb91c605a 1074 //----------------------------------------
whismanoid 25:a2afb91c605a 1075 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 1076 #warning "Not Implemented Yet: MAX11410::Configure_Thermocouple..."
whismanoid 19:8f951e448ab1 1077
whismanoid 19:8f951e448ab1 1078 //----------------------------------------
whismanoid 25:a2afb91c605a 1079 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 1080 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 25:a2afb91c605a 1081
whismanoid 25:a2afb91c605a 1082 //----------------------------------------
whismanoid 25:a2afb91c605a 1083 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 1084 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 25:a2afb91c605a 1085
whismanoid 25:a2afb91c605a 1086 //----------------------------------------
whismanoid 19:8f951e448ab1 1087 // success
whismanoid 19:8f951e448ab1 1088 return 1;
whismanoid 19:8f951e448ab1 1089 }
whismanoid 19:8f951e448ab1 1090
whismanoid 19:8f951e448ab1 1091 //----------------------------------------
whismanoid 19:8f951e448ab1 1092 // Trigger Measurement for Thermocouple
whismanoid 19:8f951e448ab1 1093 //
whismanoid 19:8f951e448ab1 1094 // Example code for typical Thermocouple measurement.
whismanoid 19:8f951e448ab1 1095 //
whismanoid 19:8f951e448ab1 1096 // @param[in] channel_TC_Hi = channel of Thermocouple high side
whismanoid 19:8f951e448ab1 1097 // @param[in] channel_TC_Lo = channel of Thermocouple low side
whismanoid 19:8f951e448ab1 1098 // @param[in] channel_RTD_Hi = channel of cold junction RTD high side
whismanoid 19:8f951e448ab1 1099 // @param[in] channel_RTD_Lo = channel of cold junction RTD low side
whismanoid 19:8f951e448ab1 1100 // @post TODO: where does the measurement go? struct member?
whismanoid 19:8f951e448ab1 1101 //
whismanoid 19:8f951e448ab1 1102 // @return 1 on success; 0 on failure
whismanoid 19:8f951e448ab1 1103 uint8_t MAX11410::Measure_Thermocouple(MAX11410_AINP_SEL_enum_t channel_TC_Hi, MAX11410_AINN_SEL_enum_t channel_TC_Lo, MAX11410_AINP_SEL_enum_t channel_RTD_Hi, MAX11410_AINP_SEL_enum_t channel_RTD_Lo)
whismanoid 19:8f951e448ab1 1104 {
whismanoid 25:a2afb91c605a 1105
whismanoid 25:a2afb91c605a 1106 //----------------------------------------
whismanoid 25:a2afb91c605a 1107 // warning -- WIP work in progress
whismanoid 23:e0c36767f98b 1108 #warning "Not Implemented Yet: MAX11410::Measure_Thermocouple..."
whismanoid 19:8f951e448ab1 1109
whismanoid 19:8f951e448ab1 1110 //----------------------------------------
whismanoid 25:a2afb91c605a 1111 // read24 0x80|0x38 STATUS (%SW 0xB8 0 0 0)
whismanoid 35:8aa5dffe523d 1112 RegRead(CMD_r011_1000_dddd_dddd_dddd_dddd_dxxx_dddd_STATUS, &status);
whismanoid 25:a2afb91c605a 1113
whismanoid 25:a2afb91c605a 1114 //----------------------------------------
whismanoid 25:a2afb91c605a 1115 // read24 0x80|0x30 DATA0 (%SW 0xB0 0 0 0)
whismanoid 35:8aa5dffe523d 1116 RegRead(CMD_r011_0000_dddd_dddd_dddd_dddd_dddd_dddd_DATA0, &data0);
whismanoid 25:a2afb91c605a 1117
whismanoid 25:a2afb91c605a 1118 //----------------------------------------
whismanoid 19:8f951e448ab1 1119 // success
whismanoid 19:8f951e448ab1 1120 return 1;
whismanoid 19:8f951e448ab1 1121 }
whismanoid 19:8f951e448ab1 1122
whismanoid 19:8f951e448ab1 1123
whismanoid 19:8f951e448ab1 1124 // End of file