MAX11131 - Maxim Integrated MAX11131 SPI 12-bit 16-channel A…

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Maxim Integrated MAX11131 SPI 12-bit 16-channel ADC with SampleSet

Dependents: MAX11131BOB_Tester MAX11131BOB_12bit_16ch_SampleSet_SPI_ADC MAX11131BOB_Serial_Tester

MAX11131.h@8:2171c1889a84, 2019-10-30 (annotated)

Committer:: whismanoid
Date:: Wed Oct 30 15:36:07 2019 -0700
Revision:: 8:2171c1889a84
Parent:: 6:cb7bdeb185d0
Child:: 9:8d47cb713984

update example doc

Who changed what in which revision?

User	Revision	Line number	New contents of line
whismanoid	1:77f1ee332e4a	1	// /*******************************************************************************
whismanoid	0:f7d706d2904d	2	// * Copyright (C) 2019 Maxim Integrated Products, Inc., All Rights Reserved.
whismanoid	0:f7d706d2904d	3	// *
whismanoid	0:f7d706d2904d	4	// * Permission is hereby granted, free of charge, to any person obtaining a
whismanoid	0:f7d706d2904d	5	// * copy of this software and associated documentation files (the "Software"),
whismanoid	0:f7d706d2904d	6	// * to deal in the Software without restriction, including without limitation
whismanoid	0:f7d706d2904d	7	// * the rights to use, copy, modify, merge, publish, distribute, sublicense,
whismanoid	0:f7d706d2904d	8	// * and/or sell copies of the Software, and to permit persons to whom the
whismanoid	0:f7d706d2904d	9	// * Software is furnished to do so, subject to the following conditions:
whismanoid	0:f7d706d2904d	10	// *
whismanoid	0:f7d706d2904d	11	// * The above copyright notice and this permission notice shall be included
whismanoid	0:f7d706d2904d	12	// * in all copies or substantial portions of the Software.
whismanoid	0:f7d706d2904d	13	// *
whismanoid	0:f7d706d2904d	14	// * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
whismanoid	0:f7d706d2904d	15	// * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
whismanoid	0:f7d706d2904d	16	// * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
whismanoid	0:f7d706d2904d	17	// * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
whismanoid	0:f7d706d2904d	18	// * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
whismanoid	0:f7d706d2904d	19	// * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
whismanoid	0:f7d706d2904d	20	// * OTHER DEALINGS IN THE SOFTWARE.
whismanoid	0:f7d706d2904d	21	// *
whismanoid	0:f7d706d2904d	22	// * Except as contained in this notice, the name of Maxim Integrated
whismanoid	0:f7d706d2904d	23	// * Products, Inc. shall not be used except as stated in the Maxim Integrated
whismanoid	0:f7d706d2904d	24	// * Products, Inc. Branding Policy.
whismanoid	0:f7d706d2904d	25	// *
whismanoid	0:f7d706d2904d	26	// * The mere transfer of this software does not imply any licenses
whismanoid	0:f7d706d2904d	27	// * of trade secrets, proprietary technology, copyrights, patents,
whismanoid	0:f7d706d2904d	28	// * trademarks, maskwork rights, or any other form of intellectual
whismanoid	0:f7d706d2904d	29	// * property whatsoever. Maxim Integrated Products, Inc. retains all
whismanoid	0:f7d706d2904d	30	// * ownership rights.
whismanoid	0:f7d706d2904d	31	// *******************************************************************************
whismanoid	0:f7d706d2904d	32	// */
whismanoid	0:f7d706d2904d	33	// *********************************************************************
whismanoid	0:f7d706d2904d	34	// @file MAX11131.h
whismanoid	0:f7d706d2904d	35	// *********************************************************************
whismanoid	0:f7d706d2904d	36	// Header file
whismanoid	0:f7d706d2904d	37	// DO NOT EDIT; except areas designated "CUSTOMIZE". Automatically generated file.
whismanoid	0:f7d706d2904d	38	// generated by XMLSystemOfDevicesToMBED.py
whismanoid	0:f7d706d2904d	39	// System Name = ExampleSystem
whismanoid	0:f7d706d2904d	40	// System Description = Device driver example
whismanoid	0:f7d706d2904d	41	// Device Name = MAX11131
whismanoid	0:f7d706d2904d	42	// Device Description = 3Msps, Low-Power, Serial SPI 12-Bit, 16-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid	6:cb7bdeb185d0	43	// Device DeviceBriefDescription = 12-bit 3Msps 16-ch ADC
whismanoid	0:f7d706d2904d	44	// Device Manufacturer = Maxim Integrated
whismanoid	0:f7d706d2904d	45	// Device PartNumber = MAX11131ATI+
whismanoid	0:f7d706d2904d	46	// Device RegValue_Width = DataWidth16bit_HL
whismanoid	0:f7d706d2904d	47	//
whismanoid	0:f7d706d2904d	48	// ADC MaxOutputDataRate = 3Msps
whismanoid	0:f7d706d2904d	49	// ADC NumChannels = 16
whismanoid	0:f7d706d2904d	50	// ADC ResolutionBits = 12
whismanoid	0:f7d706d2904d	51	//
whismanoid	0:f7d706d2904d	52	// SPI CS = ActiveLow
whismanoid	0:f7d706d2904d	53	// SPI FrameStart = CS
whismanoid	0:f7d706d2904d	54	// SPI CPOL = 1
whismanoid	0:f7d706d2904d	55	// SPI CPHA = 1
whismanoid	0:f7d706d2904d	56	// SPI MOSI and MISO Data are both stable on Rising edge of SCLK
whismanoid	0:f7d706d2904d	57	// SPI SCLK Idle High
whismanoid	0:f7d706d2904d	58	// SPI SCLKMaxMHz = 48
whismanoid	0:f7d706d2904d	59	// SPI SCLKMinMHz = 0.48
whismanoid	0:f7d706d2904d	60	//
whismanoid	0:f7d706d2904d	61
whismanoid	0:f7d706d2904d	62
whismanoid	0:f7d706d2904d	63	// Prevent multiple declaration
whismanoid	0:f7d706d2904d	64	#ifndef __MAX11131_H__
whismanoid	0:f7d706d2904d	65	#define __MAX11131_H__
whismanoid	0:f7d706d2904d	66
whismanoid	6:cb7bdeb185d0	67	// standard include for target platform -- Platform_Include_Boilerplate
whismanoid	0:f7d706d2904d	68	#include "mbed.h"
whismanoid	6:cb7bdeb185d0	69	// Platforms:
whismanoid	6:cb7bdeb185d0	70	// - MAX32625MBED
whismanoid	6:cb7bdeb185d0	71	// - supports mbed-os-5.11, requires USBDevice library
whismanoid	6:cb7bdeb185d0	72	// - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid	6:cb7bdeb185d0	73	// - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	74	// - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	75	// - MAX32600MBED
whismanoid	6:cb7bdeb185d0	76	// - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	77	// - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	78	// - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid	6:cb7bdeb185d0	79	// - NUCLEO_F446RE
whismanoid	6:cb7bdeb185d0	80	// - remove USBDevice library
whismanoid	6:cb7bdeb185d0	81	// - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	82	// - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	83	// - NUCLEO_F401RE
whismanoid	6:cb7bdeb185d0	84	// - remove USBDevice library
whismanoid	6:cb7bdeb185d0	85	// - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	86	// - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	87	// - MAX32630FTHR
whismanoid	6:cb7bdeb185d0	88	// - #include "max32630fthr.h"
whismanoid	6:cb7bdeb185d0	89	// - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid	6:cb7bdeb185d0	90	// - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	91	// - MAX32620FTHR
whismanoid	6:cb7bdeb185d0	92	// - #include "MAX32620FTHR.h"
whismanoid	6:cb7bdeb185d0	93	// - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	94	// - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid	6:cb7bdeb185d0	95	// - not tested yet
whismanoid	6:cb7bdeb185d0	96	// - MAX32625PICO
whismanoid	6:cb7bdeb185d0	97	// - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	98	// - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	99	// - not tested yet
whismanoid	6:cb7bdeb185d0	100	//
whismanoid	6:cb7bdeb185d0	101	// end Platform_Include_Boilerplate
whismanoid	0:f7d706d2904d	102
whismanoid	0:f7d706d2904d	103	//----------------------------------------
whismanoid	0:f7d706d2904d	104	// Global setting for all channels: ADC_CONFIGURATION.REFSEL
whismanoid	0:f7d706d2904d	105	//
whismanoid	0:f7d706d2904d	106	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	107	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	108	//--------------------
whismanoid	0:f7d706d2904d	109	// external single-ended reference
whismanoid	0:f7d706d2904d	110	//~ #define REFSEL_0 1
whismanoid	0:f7d706d2904d	111	//
whismanoid	0:f7d706d2904d	112	//--------------------
whismanoid	0:f7d706d2904d	113	// external differential reference (For the 16-channel chips: channel AIN15 is unavailable, the pin is assigned to REF-.)
whismanoid	0:f7d706d2904d	114	//~ #define REFSEL_1 1
whismanoid	0:f7d706d2904d	115	//
whismanoid	0:f7d706d2904d	116	//--------------------
whismanoid	0:f7d706d2904d	117	//
whismanoid	0:f7d706d2904d	118	// Default settings if not defined at project level
whismanoid	0:f7d706d2904d	119	#ifndef REFSEL_0
whismanoid	0:f7d706d2904d	120	# ifndef REFSEL_1
whismanoid	0:f7d706d2904d	121	# define REFSEL_0 1
whismanoid	0:f7d706d2904d	122	# define REFSEL_1 0
whismanoid	0:f7d706d2904d	123	# endif // REFSEL_1
whismanoid	0:f7d706d2904d	124	#endif // REFSEL_0
whismanoid	0:f7d706d2904d	125	//
whismanoid	0:f7d706d2904d	126	// (optional diagnostic) pragma message the active setting
whismanoid	0:f7d706d2904d	127	#if REFSEL_0
whismanoid	0:f7d706d2904d	128	//~ # pragma message("REFSEL_0: external single-ended reference")
whismanoid	0:f7d706d2904d	129	#endif // REFSEL_0
whismanoid	0:f7d706d2904d	130	#if REFSEL_1
whismanoid	0:f7d706d2904d	131	//~ # pragma message("REFSEL_1: external differential reference (For the 16-channel chips: channel AIN15 is unavailable, the pin is assigned to REF-.)")
whismanoid	0:f7d706d2904d	132	#endif // REFSEL_1
whismanoid	0:f7d706d2904d	133	//
whismanoid	0:f7d706d2904d	134	// Validate the REFSEL_0 setting
whismanoid	0:f7d706d2904d	135	#if REFSEL_0
whismanoid	0:f7d706d2904d	136	# if REFSEL_1
whismanoid	0:f7d706d2904d	137	# error("cannot have both REFSEL_0 and REFSEL_1; choose one")
whismanoid	0:f7d706d2904d	138	# endif // REFSEL_1
whismanoid	0:f7d706d2904d	139	#endif // REFSEL_0
whismanoid	0:f7d706d2904d	140
whismanoid	0:f7d706d2904d	141	//----------------------------------------
whismanoid	0:f7d706d2904d	142	// Global setting for all channels: UNIPOLAR.PDIFF_COMM
whismanoid	0:f7d706d2904d	143	//
whismanoid	0:f7d706d2904d	144	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	145	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	146	//--------------------
whismanoid	5:6ef046dbe77e	147	// all single-ended channels use GND as common
whismanoid	5:6ef046dbe77e	148	//~ #define PDIFF_COMM_0 1
whismanoid	5:6ef046dbe77e	149	//
whismanoid	5:6ef046dbe77e	150	//--------------------
whismanoid	0:f7d706d2904d	151	// all single-ended channels are pseudo-differential with REF- as common
whismanoid	0:f7d706d2904d	152	//~ #define PDIFF_COMM_1 1
whismanoid	0:f7d706d2904d	153	//
whismanoid	0:f7d706d2904d	154	//--------------------
whismanoid	0:f7d706d2904d	155	//
whismanoid	0:f7d706d2904d	156	// Default settings if not defined at project level
whismanoid	5:6ef046dbe77e	157	#ifndef PDIFF_COMM_0
whismanoid	5:6ef046dbe77e	158	# ifndef PDIFF_COMM_1
whismanoid	5:6ef046dbe77e	159	# define PDIFF_COMM_0 1
whismanoid	0:f7d706d2904d	160	# define PDIFF_COMM_1 0
whismanoid	5:6ef046dbe77e	161	# endif // PDIFF_COMM_1
whismanoid	5:6ef046dbe77e	162	#endif // PDIFF_COMM_0
whismanoid	0:f7d706d2904d	163	//
whismanoid	0:f7d706d2904d	164	// (optional diagnostic) pragma message the active setting
whismanoid	5:6ef046dbe77e	165	#if PDIFF_COMM_0
whismanoid	5:6ef046dbe77e	166	//~ # pragma message("PDIFF_COMM_0: all single-ended channels use GND as common")
whismanoid	5:6ef046dbe77e	167	#endif // PDIFF_COMM_0
whismanoid	0:f7d706d2904d	168	#if PDIFF_COMM_1
whismanoid	0:f7d706d2904d	169	//~ # pragma message("PDIFF_COMM_1: all single-ended channels are pseudo-differential with REF- as common")
whismanoid	0:f7d706d2904d	170	#endif // PDIFF_COMM_1
whismanoid	5:6ef046dbe77e	171	//
whismanoid	5:6ef046dbe77e	172	// Validate the PDIFF_COMM_0 setting
whismanoid	0:f7d706d2904d	173	#if PDIFF_COMM_0
whismanoid	5:6ef046dbe77e	174	# if PDIFF_COMM_1
whismanoid	5:6ef046dbe77e	175	# error("cannot have both PDIFF_COMM_0 and PDIFF_COMM_1; choose one")
whismanoid	5:6ef046dbe77e	176	# endif // PDIFF_COMM_1
whismanoid	0:f7d706d2904d	177	#endif // PDIFF_COMM_0
whismanoid	0:f7d706d2904d	178
whismanoid	0:f7d706d2904d	179	//----------------------------------------
whismanoid	0:f7d706d2904d	180	// ADC Channels AIN0, AIN1
whismanoid	0:f7d706d2904d	181	//
whismanoid	0:f7d706d2904d	182	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	183	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	184	//--------------------
whismanoid	5:6ef046dbe77e	185	// ADC Channels AIN0, AIN1 = Differential Bipolar
whismanoid	5:6ef046dbe77e	186	// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	187	// Voltage per LSB count = VREF/2048
whismanoid	5:6ef046dbe77e	188	// AIN0, AIN1 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	189	// AIN0 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	190	// AIN1 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	191	//
whismanoid	5:6ef046dbe77e	192	//~ #define AIN_0_1_DifferentialBipolarFS2Vref 1
whismanoid	0:f7d706d2904d	193	//
whismanoid	0:f7d706d2904d	194	//--------------------
whismanoid	0:f7d706d2904d	195	// ADC Channels AIN0, AIN1 = Differential Bipolar
whismanoid	0:f7d706d2904d	196	// Full Scale = VREF
whismanoid	0:f7d706d2904d	197	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	198	// AIN0, AIN1 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	199	// AIN0 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	200	// AIN1 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	201	//
whismanoid	0:f7d706d2904d	202	//~ #define AIN_0_1_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	203	//
whismanoid	0:f7d706d2904d	204	//--------------------
whismanoid	5:6ef046dbe77e	205	// ADC Channels AIN0, AIN1 = Differential Unipolar (AIN0 > AIN1)
whismanoid	5:6ef046dbe77e	206	// Full Scale = VREF
whismanoid	0:f7d706d2904d	207	// Voltage per LSB count = VREF/2048
whismanoid	5:6ef046dbe77e	208	// AIN0, AIN1 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	209	// AIN0 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	210	// AIN1 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	211	//
whismanoid	5:6ef046dbe77e	212	//~ #define AIN_0_1_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	213	//
whismanoid	0:f7d706d2904d	214	//--------------------
whismanoid	0:f7d706d2904d	215	// ADC Channels AIN0, AIN1 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	216	// Full Scale = VREF
whismanoid	0:f7d706d2904d	217	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	218	// AIN0 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	219	// AIN1 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	220	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	221	// AIN0 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	222	// AIN1 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	223	//
whismanoid	0:f7d706d2904d	224	//~ #define AIN_0_1_SingleEnded 1
whismanoid	0:f7d706d2904d	225	//
whismanoid	0:f7d706d2904d	226	//--------------------
whismanoid	0:f7d706d2904d	227	//
whismanoid	0:f7d706d2904d	228	// Default settings if not defined at project level
whismanoid	6:cb7bdeb185d0	229	#ifndef AIN_0_1_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	230	# ifndef AIN_0_1_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	231	# ifndef AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	232	# ifndef AIN_0_1_SingleEnded
whismanoid	6:cb7bdeb185d0	233	# define AIN_0_1_DifferentialBipolarFS2Vref 0
whismanoid	6:cb7bdeb185d0	234	# define AIN_0_1_DifferentialBipolarFSVref 0
whismanoid	0:f7d706d2904d	235	# define AIN_0_1_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	236	# define AIN_0_1_SingleEnded 1
whismanoid	0:f7d706d2904d	237	# endif // AIN_0_1_SingleEnded
whismanoid	6:cb7bdeb185d0	238	# endif // AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	239	# endif // AIN_0_1_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	240	#endif // AIN_0_1_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	241	//
whismanoid	0:f7d706d2904d	242	// (optional diagnostic) pragma message the active setting
whismanoid	5:6ef046dbe77e	243	#if AIN_0_1_DifferentialBipolarFS2Vref
whismanoid	5:6ef046dbe77e	244	//~ # pragma message("AIN_0_1_DifferentialBipolarFS2Vref: ADC Channels AIN0, AIN1 = Differential Bipolar")
whismanoid	5:6ef046dbe77e	245	#endif // AIN_0_1_DifferentialBipolarFS2Vref
whismanoid	5:6ef046dbe77e	246	#if AIN_0_1_DifferentialBipolarFSVref
whismanoid	5:6ef046dbe77e	247	//~ # pragma message("AIN_0_1_DifferentialBipolarFSVref: ADC Channels AIN0, AIN1 = Differential Bipolar")
whismanoid	5:6ef046dbe77e	248	#endif // AIN_0_1_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	249	#if AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	250	//~ # pragma message("AIN_0_1_DifferentialUnipolar: ADC Channels AIN0, AIN1 = Differential Unipolar (AIN0 > AIN1)")
whismanoid	0:f7d706d2904d	251	#endif // AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	252	#if AIN_0_1_SingleEnded
whismanoid	0:f7d706d2904d	253	//~ # pragma message("AIN_0_1_SingleEnded: ADC Channels AIN0, AIN1 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	254	#endif // AIN_0_1_SingleEnded
whismanoid	0:f7d706d2904d	255	//
whismanoid	6:cb7bdeb185d0	256	// Validate the AIN_0_1_DifferentialBipolarFS2Vref setting
whismanoid	6:cb7bdeb185d0	257	#if AIN_0_1_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	258	# if AIN_0_1_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	259	# error("cannot have both AIN_0_1_DifferentialBipolarFS2Vref and AIN_0_1_DifferentialBipolarFSVref; choose one")
whismanoid	0:f7d706d2904d	260	# endif // AIN_0_1_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	261	# if AIN_0_1_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	262	# error("cannot have both AIN_0_1_DifferentialBipolarFS2Vref and AIN_0_1_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	263	# endif // AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	264	# if AIN_0_1_SingleEnded
whismanoid	6:cb7bdeb185d0	265	# error("cannot have both AIN_0_1_DifferentialBipolarFS2Vref and AIN_0_1_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	266	# endif // AIN_0_1_SingleEnded
whismanoid	6:cb7bdeb185d0	267	#endif // AIN_0_1_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	268	//
whismanoid	0:f7d706d2904d	269	// Validate the AIN_0_1_DifferentialBipolarFSVref setting
whismanoid	0:f7d706d2904d	270	#if AIN_0_1_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	271	# if AIN_0_1_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	272	# error("cannot have both AIN_0_1_DifferentialBipolarFSVref and AIN_0_1_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	273	# endif // AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	274	# if AIN_0_1_SingleEnded
whismanoid	0:f7d706d2904d	275	# error("cannot have both AIN_0_1_DifferentialBipolarFSVref and AIN_0_1_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	276	# endif // AIN_0_1_SingleEnded
whismanoid	0:f7d706d2904d	277	#endif // AIN_0_1_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	278	//
whismanoid	6:cb7bdeb185d0	279	// Validate the AIN_0_1_DifferentialUnipolar setting
whismanoid	6:cb7bdeb185d0	280	#if AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	281	# if AIN_0_1_SingleEnded
whismanoid	6:cb7bdeb185d0	282	# error("cannot have both AIN_0_1_DifferentialUnipolar and AIN_0_1_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	283	# endif // AIN_0_1_SingleEnded
whismanoid	6:cb7bdeb185d0	284	#endif // AIN_0_1_DifferentialUnipolar
whismanoid	0:f7d706d2904d	285
whismanoid	0:f7d706d2904d	286	//----------------------------------------
whismanoid	0:f7d706d2904d	287	// ADC Channels AIN2, AIN3
whismanoid	0:f7d706d2904d	288	//
whismanoid	0:f7d706d2904d	289	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	290	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	291	//--------------------
whismanoid	0:f7d706d2904d	292	// ADC Channels AIN2, AIN3 = Differential Bipolar
whismanoid	5:6ef046dbe77e	293	// Full Scale = 2 * VREF
whismanoid	5:6ef046dbe77e	294	// Voltage per LSB count = VREF/2048
whismanoid	5:6ef046dbe77e	295	// AIN2, AIN3 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	5:6ef046dbe77e	296	// AIN2 voltage must always be between 0 and VREF.
whismanoid	5:6ef046dbe77e	297	// AIN3 voltage must always be between 0 and VREF.
whismanoid	5:6ef046dbe77e	298	//
whismanoid	5:6ef046dbe77e	299	//~ #define AIN_2_3_DifferentialBipolarFS2Vref 1
whismanoid	5:6ef046dbe77e	300	//
whismanoid	5:6ef046dbe77e	301	//--------------------
whismanoid	5:6ef046dbe77e	302	// ADC Channels AIN2, AIN3 = Differential Bipolar
whismanoid	0:f7d706d2904d	303	// Full Scale = VREF
whismanoid	0:f7d706d2904d	304	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	305	// AIN2, AIN3 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	306	// AIN2 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	307	// AIN3 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	308	//
whismanoid	0:f7d706d2904d	309	//~ #define AIN_2_3_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	310	//
whismanoid	0:f7d706d2904d	311	//--------------------
whismanoid	5:6ef046dbe77e	312	// ADC Channels AIN2, AIN3 = Differential Unipolar (AIN2 > AIN3)
whismanoid	5:6ef046dbe77e	313	// Full Scale = VREF
whismanoid	0:f7d706d2904d	314	// Voltage per LSB count = VREF/2048
whismanoid	5:6ef046dbe77e	315	// AIN2, AIN3 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	316	// AIN2 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	317	// AIN3 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	318	//
whismanoid	5:6ef046dbe77e	319	//~ #define AIN_2_3_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	320	//
whismanoid	0:f7d706d2904d	321	//--------------------
whismanoid	0:f7d706d2904d	322	// ADC Channels AIN2, AIN3 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	323	// Full Scale = VREF
whismanoid	0:f7d706d2904d	324	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	325	// AIN2 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	326	// AIN3 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	327	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	328	// AIN2 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	329	// AIN3 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	330	//
whismanoid	0:f7d706d2904d	331	//~ #define AIN_2_3_SingleEnded 1
whismanoid	0:f7d706d2904d	332	//
whismanoid	0:f7d706d2904d	333	//--------------------
whismanoid	0:f7d706d2904d	334	//
whismanoid	0:f7d706d2904d	335	// Default settings if not defined at project level
whismanoid	6:cb7bdeb185d0	336	#ifndef AIN_2_3_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	337	# ifndef AIN_2_3_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	338	# ifndef AIN_2_3_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	339	# ifndef AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	340	# define AIN_2_3_DifferentialBipolarFS2Vref 0
whismanoid	0:f7d706d2904d	341	# define AIN_2_3_DifferentialBipolarFSVref 0
whismanoid	6:cb7bdeb185d0	342	# define AIN_2_3_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	343	# define AIN_2_3_SingleEnded 1
whismanoid	6:cb7bdeb185d0	344	# endif // AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	345	# endif // AIN_2_3_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	346	# endif // AIN_2_3_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	347	#endif // AIN_2_3_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	348	//
whismanoid	0:f7d706d2904d	349	// (optional diagnostic) pragma message the active setting
whismanoid	6:cb7bdeb185d0	350	#if AIN_2_3_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	351	//~ # pragma message("AIN_2_3_DifferentialBipolarFS2Vref: ADC Channels AIN2, AIN3 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	352	#endif // AIN_2_3_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	353	#if AIN_2_3_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	354	//~ # pragma message("AIN_2_3_DifferentialBipolarFSVref: ADC Channels AIN2, AIN3 = Differential Bipolar")
whismanoid	0:f7d706d2904d	355	#endif // AIN_2_3_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	356	#if AIN_2_3_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	357	//~ # pragma message("AIN_2_3_DifferentialUnipolar: ADC Channels AIN2, AIN3 = Differential Unipolar (AIN2 > AIN3)")
whismanoid	6:cb7bdeb185d0	358	#endif // AIN_2_3_DifferentialUnipolar
whismanoid	0:f7d706d2904d	359	#if AIN_2_3_SingleEnded
whismanoid	0:f7d706d2904d	360	//~ # pragma message("AIN_2_3_SingleEnded: ADC Channels AIN2, AIN3 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	361	#endif // AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	362	//
whismanoid	6:cb7bdeb185d0	363	// Validate the AIN_2_3_DifferentialBipolarFS2Vref setting
whismanoid	6:cb7bdeb185d0	364	#if AIN_2_3_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	365	# if AIN_2_3_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	366	# error("cannot have both AIN_2_3_DifferentialBipolarFS2Vref and AIN_2_3_DifferentialBipolarFSVref; choose one")
whismanoid	6:cb7bdeb185d0	367	# endif // AIN_2_3_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	368	# if AIN_2_3_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	369	# error("cannot have both AIN_2_3_DifferentialBipolarFS2Vref and AIN_2_3_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	370	# endif // AIN_2_3_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	371	# if AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	372	# error("cannot have both AIN_2_3_DifferentialBipolarFS2Vref and AIN_2_3_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	373	# endif // AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	374	#endif // AIN_2_3_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	375	//
whismanoid	0:f7d706d2904d	376	// Validate the AIN_2_3_DifferentialBipolarFSVref setting
whismanoid	0:f7d706d2904d	377	#if AIN_2_3_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	378	# if AIN_2_3_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	379	# error("cannot have both AIN_2_3_DifferentialBipolarFSVref and AIN_2_3_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	380	# endif // AIN_2_3_DifferentialUnipolar
whismanoid	0:f7d706d2904d	381	# if AIN_2_3_SingleEnded
whismanoid	0:f7d706d2904d	382	# error("cannot have both AIN_2_3_DifferentialBipolarFSVref and AIN_2_3_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	383	# endif // AIN_2_3_SingleEnded
whismanoid	0:f7d706d2904d	384	#endif // AIN_2_3_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	385	//
whismanoid	6:cb7bdeb185d0	386	// Validate the AIN_2_3_DifferentialUnipolar setting
whismanoid	6:cb7bdeb185d0	387	#if AIN_2_3_DifferentialUnipolar
whismanoid	0:f7d706d2904d	388	# if AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	389	# error("cannot have both AIN_2_3_DifferentialUnipolar and AIN_2_3_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	390	# endif // AIN_2_3_SingleEnded
whismanoid	6:cb7bdeb185d0	391	#endif // AIN_2_3_DifferentialUnipolar
whismanoid	0:f7d706d2904d	392
whismanoid	0:f7d706d2904d	393	//----------------------------------------
whismanoid	0:f7d706d2904d	394	// ADC Channels AIN4, AIN5
whismanoid	0:f7d706d2904d	395	//
whismanoid	0:f7d706d2904d	396	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	397	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	398	//--------------------
whismanoid	5:6ef046dbe77e	399	// ADC Channels AIN4, AIN5 = Differential Bipolar
whismanoid	5:6ef046dbe77e	400	// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	401	// Voltage per LSB count = VREF/2048
whismanoid	5:6ef046dbe77e	402	// AIN4, AIN5 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	403	// AIN4 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	404	// AIN5 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	405	//
whismanoid	5:6ef046dbe77e	406	//~ #define AIN_4_5_DifferentialBipolarFS2Vref 1
whismanoid	0:f7d706d2904d	407	//
whismanoid	0:f7d706d2904d	408	//--------------------
whismanoid	0:f7d706d2904d	409	// ADC Channels AIN4, AIN5 = Differential Bipolar
whismanoid	0:f7d706d2904d	410	// Full Scale = VREF
whismanoid	0:f7d706d2904d	411	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	412	// AIN4, AIN5 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	413	// AIN4 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	414	// AIN5 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	415	//
whismanoid	0:f7d706d2904d	416	//~ #define AIN_4_5_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	417	//
whismanoid	0:f7d706d2904d	418	//--------------------
whismanoid	5:6ef046dbe77e	419	// ADC Channels AIN4, AIN5 = Differential Unipolar (AIN4 > AIN5)
whismanoid	5:6ef046dbe77e	420	// Full Scale = VREF
whismanoid	0:f7d706d2904d	421	// Voltage per LSB count = VREF/2048
whismanoid	5:6ef046dbe77e	422	// AIN4, AIN5 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	423	// AIN4 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	424	// AIN5 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	425	//
whismanoid	5:6ef046dbe77e	426	//~ #define AIN_4_5_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	427	//
whismanoid	0:f7d706d2904d	428	//--------------------
whismanoid	0:f7d706d2904d	429	// ADC Channels AIN4, AIN5 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	430	// Full Scale = VREF
whismanoid	0:f7d706d2904d	431	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	432	// AIN4 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	433	// AIN5 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	434	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	435	// AIN4 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	436	// AIN5 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	437	//
whismanoid	0:f7d706d2904d	438	//~ #define AIN_4_5_SingleEnded 1
whismanoid	0:f7d706d2904d	439	//
whismanoid	0:f7d706d2904d	440	//--------------------
whismanoid	0:f7d706d2904d	441	//
whismanoid	0:f7d706d2904d	442	// Default settings if not defined at project level
whismanoid	6:cb7bdeb185d0	443	#ifndef AIN_4_5_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	444	# ifndef AIN_4_5_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	445	# ifndef AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	446	# ifndef AIN_4_5_SingleEnded
whismanoid	6:cb7bdeb185d0	447	# define AIN_4_5_DifferentialBipolarFS2Vref 0
whismanoid	6:cb7bdeb185d0	448	# define AIN_4_5_DifferentialBipolarFSVref 0
whismanoid	0:f7d706d2904d	449	# define AIN_4_5_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	450	# define AIN_4_5_SingleEnded 1
whismanoid	0:f7d706d2904d	451	# endif // AIN_4_5_SingleEnded
whismanoid	6:cb7bdeb185d0	452	# endif // AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	453	# endif // AIN_4_5_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	454	#endif // AIN_4_5_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	455	//
whismanoid	0:f7d706d2904d	456	// (optional diagnostic) pragma message the active setting
whismanoid	6:cb7bdeb185d0	457	#if AIN_4_5_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	458	//~ # pragma message("AIN_4_5_DifferentialBipolarFS2Vref: ADC Channels AIN4, AIN5 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	459	#endif // AIN_4_5_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	460	#if AIN_4_5_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	461	//~ # pragma message("AIN_4_5_DifferentialBipolarFSVref: ADC Channels AIN4, AIN5 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	462	#endif // AIN_4_5_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	463	#if AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	464	//~ # pragma message("AIN_4_5_DifferentialUnipolar: ADC Channels AIN4, AIN5 = Differential Unipolar (AIN4 > AIN5)")
whismanoid	0:f7d706d2904d	465	#endif // AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	466	#if AIN_4_5_SingleEnded
whismanoid	0:f7d706d2904d	467	//~ # pragma message("AIN_4_5_SingleEnded: ADC Channels AIN4, AIN5 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	468	#endif // AIN_4_5_SingleEnded
whismanoid	0:f7d706d2904d	469	//
whismanoid	6:cb7bdeb185d0	470	// Validate the AIN_4_5_DifferentialBipolarFS2Vref setting
whismanoid	6:cb7bdeb185d0	471	#if AIN_4_5_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	472	# if AIN_4_5_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	473	# error("cannot have both AIN_4_5_DifferentialBipolarFS2Vref and AIN_4_5_DifferentialBipolarFSVref; choose one")
whismanoid	0:f7d706d2904d	474	# endif // AIN_4_5_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	475	# if AIN_4_5_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	476	# error("cannot have both AIN_4_5_DifferentialBipolarFS2Vref and AIN_4_5_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	477	# endif // AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	478	# if AIN_4_5_SingleEnded
whismanoid	6:cb7bdeb185d0	479	# error("cannot have both AIN_4_5_DifferentialBipolarFS2Vref and AIN_4_5_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	480	# endif // AIN_4_5_SingleEnded
whismanoid	6:cb7bdeb185d0	481	#endif // AIN_4_5_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	482	//
whismanoid	0:f7d706d2904d	483	// Validate the AIN_4_5_DifferentialBipolarFSVref setting
whismanoid	0:f7d706d2904d	484	#if AIN_4_5_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	485	# if AIN_4_5_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	486	# error("cannot have both AIN_4_5_DifferentialBipolarFSVref and AIN_4_5_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	487	# endif // AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	488	# if AIN_4_5_SingleEnded
whismanoid	0:f7d706d2904d	489	# error("cannot have both AIN_4_5_DifferentialBipolarFSVref and AIN_4_5_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	490	# endif // AIN_4_5_SingleEnded
whismanoid	0:f7d706d2904d	491	#endif // AIN_4_5_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	492	//
whismanoid	6:cb7bdeb185d0	493	// Validate the AIN_4_5_DifferentialUnipolar setting
whismanoid	6:cb7bdeb185d0	494	#if AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	495	# if AIN_4_5_SingleEnded
whismanoid	6:cb7bdeb185d0	496	# error("cannot have both AIN_4_5_DifferentialUnipolar and AIN_4_5_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	497	# endif // AIN_4_5_SingleEnded
whismanoid	6:cb7bdeb185d0	498	#endif // AIN_4_5_DifferentialUnipolar
whismanoid	0:f7d706d2904d	499
whismanoid	0:f7d706d2904d	500	//----------------------------------------
whismanoid	0:f7d706d2904d	501	// ADC Channels AIN6, AIN7
whismanoid	0:f7d706d2904d	502	//
whismanoid	0:f7d706d2904d	503	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	504	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	505	//--------------------
whismanoid	0:f7d706d2904d	506	// ADC Channels AIN6, AIN7 = Differential Bipolar
whismanoid	6:cb7bdeb185d0	507	// Full Scale = 2 * VREF
whismanoid	6:cb7bdeb185d0	508	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	509	// AIN6, AIN7 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	6:cb7bdeb185d0	510	// AIN6 voltage must always be between 0 and VREF.
whismanoid	6:cb7bdeb185d0	511	// AIN7 voltage must always be between 0 and VREF.
whismanoid	6:cb7bdeb185d0	512	//
whismanoid	6:cb7bdeb185d0	513	//~ #define AIN_6_7_DifferentialBipolarFS2Vref 1
whismanoid	6:cb7bdeb185d0	514	//
whismanoid	6:cb7bdeb185d0	515	//--------------------
whismanoid	6:cb7bdeb185d0	516	// ADC Channels AIN6, AIN7 = Differential Bipolar
whismanoid	0:f7d706d2904d	517	// Full Scale = VREF
whismanoid	0:f7d706d2904d	518	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	519	// AIN6, AIN7 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	520	// AIN6 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	521	// AIN7 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	522	//
whismanoid	0:f7d706d2904d	523	//~ #define AIN_6_7_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	524	//
whismanoid	0:f7d706d2904d	525	//--------------------
whismanoid	6:cb7bdeb185d0	526	// ADC Channels AIN6, AIN7 = Differential Unipolar (AIN6 > AIN7)
whismanoid	6:cb7bdeb185d0	527	// Full Scale = VREF
whismanoid	0:f7d706d2904d	528	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	529	// AIN6, AIN7 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	530	// AIN6 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	531	// AIN7 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	532	//
whismanoid	6:cb7bdeb185d0	533	//~ #define AIN_6_7_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	534	//
whismanoid	0:f7d706d2904d	535	//--------------------
whismanoid	0:f7d706d2904d	536	// ADC Channels AIN6, AIN7 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	537	// Full Scale = VREF
whismanoid	0:f7d706d2904d	538	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	539	// AIN6 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	540	// AIN7 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	541	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	542	// AIN6 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	543	// AIN7 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	544	//
whismanoid	0:f7d706d2904d	545	//~ #define AIN_6_7_SingleEnded 1
whismanoid	0:f7d706d2904d	546	//
whismanoid	0:f7d706d2904d	547	//--------------------
whismanoid	0:f7d706d2904d	548	//
whismanoid	0:f7d706d2904d	549	// Default settings if not defined at project level
whismanoid	6:cb7bdeb185d0	550	#ifndef AIN_6_7_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	551	# ifndef AIN_6_7_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	552	# ifndef AIN_6_7_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	553	# ifndef AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	554	# define AIN_6_7_DifferentialBipolarFS2Vref 0
whismanoid	0:f7d706d2904d	555	# define AIN_6_7_DifferentialBipolarFSVref 0
whismanoid	6:cb7bdeb185d0	556	# define AIN_6_7_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	557	# define AIN_6_7_SingleEnded 1
whismanoid	6:cb7bdeb185d0	558	# endif // AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	559	# endif // AIN_6_7_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	560	# endif // AIN_6_7_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	561	#endif // AIN_6_7_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	562	//
whismanoid	0:f7d706d2904d	563	// (optional diagnostic) pragma message the active setting
whismanoid	6:cb7bdeb185d0	564	#if AIN_6_7_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	565	//~ # pragma message("AIN_6_7_DifferentialBipolarFS2Vref: ADC Channels AIN6, AIN7 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	566	#endif // AIN_6_7_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	567	#if AIN_6_7_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	568	//~ # pragma message("AIN_6_7_DifferentialBipolarFSVref: ADC Channels AIN6, AIN7 = Differential Bipolar")
whismanoid	0:f7d706d2904d	569	#endif // AIN_6_7_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	570	#if AIN_6_7_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	571	//~ # pragma message("AIN_6_7_DifferentialUnipolar: ADC Channels AIN6, AIN7 = Differential Unipolar (AIN6 > AIN7)")
whismanoid	6:cb7bdeb185d0	572	#endif // AIN_6_7_DifferentialUnipolar
whismanoid	0:f7d706d2904d	573	#if AIN_6_7_SingleEnded
whismanoid	0:f7d706d2904d	574	//~ # pragma message("AIN_6_7_SingleEnded: ADC Channels AIN6, AIN7 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	575	#endif // AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	576	//
whismanoid	6:cb7bdeb185d0	577	// Validate the AIN_6_7_DifferentialBipolarFS2Vref setting
whismanoid	6:cb7bdeb185d0	578	#if AIN_6_7_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	579	# if AIN_6_7_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	580	# error("cannot have both AIN_6_7_DifferentialBipolarFS2Vref and AIN_6_7_DifferentialBipolarFSVref; choose one")
whismanoid	6:cb7bdeb185d0	581	# endif // AIN_6_7_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	582	# if AIN_6_7_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	583	# error("cannot have both AIN_6_7_DifferentialBipolarFS2Vref and AIN_6_7_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	584	# endif // AIN_6_7_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	585	# if AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	586	# error("cannot have both AIN_6_7_DifferentialBipolarFS2Vref and AIN_6_7_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	587	# endif // AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	588	#endif // AIN_6_7_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	589	//
whismanoid	0:f7d706d2904d	590	// Validate the AIN_6_7_DifferentialBipolarFSVref setting
whismanoid	0:f7d706d2904d	591	#if AIN_6_7_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	592	# if AIN_6_7_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	593	# error("cannot have both AIN_6_7_DifferentialBipolarFSVref and AIN_6_7_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	594	# endif // AIN_6_7_DifferentialUnipolar
whismanoid	0:f7d706d2904d	595	# if AIN_6_7_SingleEnded
whismanoid	0:f7d706d2904d	596	# error("cannot have both AIN_6_7_DifferentialBipolarFSVref and AIN_6_7_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	597	# endif // AIN_6_7_SingleEnded
whismanoid	0:f7d706d2904d	598	#endif // AIN_6_7_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	599	//
whismanoid	6:cb7bdeb185d0	600	// Validate the AIN_6_7_DifferentialUnipolar setting
whismanoid	6:cb7bdeb185d0	601	#if AIN_6_7_DifferentialUnipolar
whismanoid	0:f7d706d2904d	602	# if AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	603	# error("cannot have both AIN_6_7_DifferentialUnipolar and AIN_6_7_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	604	# endif // AIN_6_7_SingleEnded
whismanoid	6:cb7bdeb185d0	605	#endif // AIN_6_7_DifferentialUnipolar
whismanoid	0:f7d706d2904d	606
whismanoid	0:f7d706d2904d	607	//----------------------------------------
whismanoid	0:f7d706d2904d	608	// ADC Channels AIN8, AIN9
whismanoid	0:f7d706d2904d	609	//
whismanoid	0:f7d706d2904d	610	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	611	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	612	//--------------------
whismanoid	6:cb7bdeb185d0	613	// ADC Channels AIN8, AIN9 = Differential Bipolar
whismanoid	6:cb7bdeb185d0	614	// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	615	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	616	// AIN8, AIN9 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	617	// AIN8 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	618	// AIN9 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	619	//
whismanoid	6:cb7bdeb185d0	620	//~ #define AIN_8_9_DifferentialBipolarFS2Vref 1
whismanoid	0:f7d706d2904d	621	//
whismanoid	0:f7d706d2904d	622	//--------------------
whismanoid	0:f7d706d2904d	623	// ADC Channels AIN8, AIN9 = Differential Bipolar
whismanoid	0:f7d706d2904d	624	// Full Scale = VREF
whismanoid	0:f7d706d2904d	625	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	626	// AIN8, AIN9 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	627	// AIN8 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	628	// AIN9 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	629	//
whismanoid	0:f7d706d2904d	630	//~ #define AIN_8_9_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	631	//
whismanoid	0:f7d706d2904d	632	//--------------------
whismanoid	6:cb7bdeb185d0	633	// ADC Channels AIN8, AIN9 = Differential Unipolar (AIN8 > AIN9)
whismanoid	6:cb7bdeb185d0	634	// Full Scale = VREF
whismanoid	0:f7d706d2904d	635	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	636	// AIN8, AIN9 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	637	// AIN8 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	638	// AIN9 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	639	//
whismanoid	6:cb7bdeb185d0	640	//~ #define AIN_8_9_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	641	//
whismanoid	0:f7d706d2904d	642	//--------------------
whismanoid	0:f7d706d2904d	643	// ADC Channels AIN8, AIN9 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	644	// Full Scale = VREF
whismanoid	0:f7d706d2904d	645	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	646	// AIN8 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	647	// AIN9 is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	648	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	649	// AIN8 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	650	// AIN9 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	651	//
whismanoid	0:f7d706d2904d	652	//~ #define AIN_8_9_SingleEnded 1
whismanoid	0:f7d706d2904d	653	//
whismanoid	0:f7d706d2904d	654	//--------------------
whismanoid	0:f7d706d2904d	655	//
whismanoid	0:f7d706d2904d	656	// Default settings if not defined at project level
whismanoid	6:cb7bdeb185d0	657	#ifndef AIN_8_9_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	658	# ifndef AIN_8_9_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	659	# ifndef AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	660	# ifndef AIN_8_9_SingleEnded
whismanoid	6:cb7bdeb185d0	661	# define AIN_8_9_DifferentialBipolarFS2Vref 0
whismanoid	6:cb7bdeb185d0	662	# define AIN_8_9_DifferentialBipolarFSVref 0
whismanoid	0:f7d706d2904d	663	# define AIN_8_9_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	664	# define AIN_8_9_SingleEnded 1
whismanoid	0:f7d706d2904d	665	# endif // AIN_8_9_SingleEnded
whismanoid	6:cb7bdeb185d0	666	# endif // AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	667	# endif // AIN_8_9_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	668	#endif // AIN_8_9_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	669	//
whismanoid	0:f7d706d2904d	670	// (optional diagnostic) pragma message the active setting
whismanoid	6:cb7bdeb185d0	671	#if AIN_8_9_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	672	//~ # pragma message("AIN_8_9_DifferentialBipolarFS2Vref: ADC Channels AIN8, AIN9 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	673	#endif // AIN_8_9_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	674	#if AIN_8_9_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	675	//~ # pragma message("AIN_8_9_DifferentialBipolarFSVref: ADC Channels AIN8, AIN9 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	676	#endif // AIN_8_9_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	677	#if AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	678	//~ # pragma message("AIN_8_9_DifferentialUnipolar: ADC Channels AIN8, AIN9 = Differential Unipolar (AIN8 > AIN9)")
whismanoid	0:f7d706d2904d	679	#endif // AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	680	#if AIN_8_9_SingleEnded
whismanoid	0:f7d706d2904d	681	//~ # pragma message("AIN_8_9_SingleEnded: ADC Channels AIN8, AIN9 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	682	#endif // AIN_8_9_SingleEnded
whismanoid	0:f7d706d2904d	683	//
whismanoid	6:cb7bdeb185d0	684	// Validate the AIN_8_9_DifferentialBipolarFS2Vref setting
whismanoid	6:cb7bdeb185d0	685	#if AIN_8_9_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	686	# if AIN_8_9_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	687	# error("cannot have both AIN_8_9_DifferentialBipolarFS2Vref and AIN_8_9_DifferentialBipolarFSVref; choose one")
whismanoid	0:f7d706d2904d	688	# endif // AIN_8_9_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	689	# if AIN_8_9_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	690	# error("cannot have both AIN_8_9_DifferentialBipolarFS2Vref and AIN_8_9_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	691	# endif // AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	692	# if AIN_8_9_SingleEnded
whismanoid	6:cb7bdeb185d0	693	# error("cannot have both AIN_8_9_DifferentialBipolarFS2Vref and AIN_8_9_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	694	# endif // AIN_8_9_SingleEnded
whismanoid	6:cb7bdeb185d0	695	#endif // AIN_8_9_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	696	//
whismanoid	0:f7d706d2904d	697	// Validate the AIN_8_9_DifferentialBipolarFSVref setting
whismanoid	0:f7d706d2904d	698	#if AIN_8_9_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	699	# if AIN_8_9_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	700	# error("cannot have both AIN_8_9_DifferentialBipolarFSVref and AIN_8_9_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	701	# endif // AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	702	# if AIN_8_9_SingleEnded
whismanoid	0:f7d706d2904d	703	# error("cannot have both AIN_8_9_DifferentialBipolarFSVref and AIN_8_9_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	704	# endif // AIN_8_9_SingleEnded
whismanoid	0:f7d706d2904d	705	#endif // AIN_8_9_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	706	//
whismanoid	6:cb7bdeb185d0	707	// Validate the AIN_8_9_DifferentialUnipolar setting
whismanoid	6:cb7bdeb185d0	708	#if AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	709	# if AIN_8_9_SingleEnded
whismanoid	6:cb7bdeb185d0	710	# error("cannot have both AIN_8_9_DifferentialUnipolar and AIN_8_9_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	711	# endif // AIN_8_9_SingleEnded
whismanoid	6:cb7bdeb185d0	712	#endif // AIN_8_9_DifferentialUnipolar
whismanoid	0:f7d706d2904d	713
whismanoid	0:f7d706d2904d	714	//----------------------------------------
whismanoid	0:f7d706d2904d	715	// ADC Channels AIN10, AIN11
whismanoid	0:f7d706d2904d	716	//
whismanoid	0:f7d706d2904d	717	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	718	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	719	//--------------------
whismanoid	0:f7d706d2904d	720	// ADC Channels AIN10, AIN11 = Differential Bipolar
whismanoid	0:f7d706d2904d	721	// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	722	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	723	// AIN10, AIN11 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	724	// AIN10 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	725	// AIN11 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	726	//
whismanoid	0:f7d706d2904d	727	//~ #define AIN_10_11_DifferentialBipolarFS2Vref 1
whismanoid	0:f7d706d2904d	728	//
whismanoid	0:f7d706d2904d	729	//--------------------
whismanoid	6:cb7bdeb185d0	730	// ADC Channels AIN10, AIN11 = Differential Bipolar
whismanoid	0:f7d706d2904d	731	// Full Scale = VREF
whismanoid	0:f7d706d2904d	732	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	733	// AIN10, AIN11 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	734	// AIN10 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	735	// AIN11 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	736	//
whismanoid	6:cb7bdeb185d0	737	//~ #define AIN_10_11_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	738	//
whismanoid	0:f7d706d2904d	739	//--------------------
whismanoid	0:f7d706d2904d	740	// ADC Channels AIN10, AIN11 = Differential Unipolar (AIN10 > AIN11)
whismanoid	0:f7d706d2904d	741	// Full Scale = VREF
whismanoid	0:f7d706d2904d	742	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	743	// AIN10, AIN11 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	744	// AIN10 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	745	// AIN11 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	746	//
whismanoid	0:f7d706d2904d	747	//~ #define AIN_10_11_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	748	//
whismanoid	0:f7d706d2904d	749	//--------------------
whismanoid	6:cb7bdeb185d0	750	// ADC Channels AIN10, AIN11 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	751	// Full Scale = VREF
whismanoid	0:f7d706d2904d	752	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	753	// AIN10 is a Single-Ended input using Unipolar transfer function.
whismanoid	6:cb7bdeb185d0	754	// AIN11 is a Single-Ended input using Unipolar transfer function.
whismanoid	6:cb7bdeb185d0	755	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	756	// AIN10 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	757	// AIN11 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	758	//
whismanoid	6:cb7bdeb185d0	759	//~ #define AIN_10_11_SingleEnded 1
whismanoid	0:f7d706d2904d	760	//
whismanoid	0:f7d706d2904d	761	//--------------------
whismanoid	0:f7d706d2904d	762	//
whismanoid	0:f7d706d2904d	763	// Default settings if not defined at project level
whismanoid	0:f7d706d2904d	764	#ifndef AIN_10_11_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	765	# ifndef AIN_10_11_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	766	# ifndef AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	767	# ifndef AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	768	# define AIN_10_11_DifferentialBipolarFS2Vref 0
whismanoid	6:cb7bdeb185d0	769	# define AIN_10_11_DifferentialBipolarFSVref 0
whismanoid	6:cb7bdeb185d0	770	# define AIN_10_11_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	771	# define AIN_10_11_SingleEnded 1
whismanoid	6:cb7bdeb185d0	772	# endif // AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	773	# endif // AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	774	# endif // AIN_10_11_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	775	#endif // AIN_10_11_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	776	//
whismanoid	0:f7d706d2904d	777	// (optional diagnostic) pragma message the active setting
whismanoid	0:f7d706d2904d	778	#if AIN_10_11_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	779	//~ # pragma message("AIN_10_11_DifferentialBipolarFS2Vref: ADC Channels AIN10, AIN11 = Differential Bipolar")
whismanoid	0:f7d706d2904d	780	#endif // AIN_10_11_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	781	#if AIN_10_11_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	782	//~ # pragma message("AIN_10_11_DifferentialBipolarFSVref: ADC Channels AIN10, AIN11 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	783	#endif // AIN_10_11_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	784	#if AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	785	//~ # pragma message("AIN_10_11_DifferentialUnipolar: ADC Channels AIN10, AIN11 = Differential Unipolar (AIN10 > AIN11)")
whismanoid	6:cb7bdeb185d0	786	#endif // AIN_10_11_DifferentialUnipolar
whismanoid	0:f7d706d2904d	787	#if AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	788	//~ # pragma message("AIN_10_11_SingleEnded: ADC Channels AIN10, AIN11 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	789	#endif // AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	790	//
whismanoid	0:f7d706d2904d	791	// Validate the AIN_10_11_DifferentialBipolarFS2Vref setting
whismanoid	0:f7d706d2904d	792	#if AIN_10_11_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	793	# if AIN_10_11_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	794	# error("cannot have both AIN_10_11_DifferentialBipolarFS2Vref and AIN_10_11_DifferentialBipolarFSVref; choose one")
whismanoid	6:cb7bdeb185d0	795	# endif // AIN_10_11_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	796	# if AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	797	# error("cannot have both AIN_10_11_DifferentialBipolarFS2Vref and AIN_10_11_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	798	# endif // AIN_10_11_DifferentialUnipolar
whismanoid	0:f7d706d2904d	799	# if AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	800	# error("cannot have both AIN_10_11_DifferentialBipolarFS2Vref and AIN_10_11_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	801	# endif // AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	802	#endif // AIN_10_11_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	803	//
whismanoid	6:cb7bdeb185d0	804	// Validate the AIN_10_11_DifferentialBipolarFSVref setting
whismanoid	6:cb7bdeb185d0	805	#if AIN_10_11_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	806	# if AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	807	# error("cannot have both AIN_10_11_DifferentialBipolarFSVref and AIN_10_11_DifferentialUnipolar; choose one")
whismanoid	0:f7d706d2904d	808	# endif // AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	809	# if AIN_10_11_SingleEnded
whismanoid	6:cb7bdeb185d0	810	# error("cannot have both AIN_10_11_DifferentialBipolarFSVref and AIN_10_11_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	811	# endif // AIN_10_11_SingleEnded
whismanoid	6:cb7bdeb185d0	812	#endif // AIN_10_11_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	813	//
whismanoid	0:f7d706d2904d	814	// Validate the AIN_10_11_DifferentialUnipolar setting
whismanoid	0:f7d706d2904d	815	#if AIN_10_11_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	816	# if AIN_10_11_SingleEnded
whismanoid	6:cb7bdeb185d0	817	# error("cannot have both AIN_10_11_DifferentialUnipolar and AIN_10_11_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	818	# endif // AIN_10_11_SingleEnded
whismanoid	0:f7d706d2904d	819	#endif // AIN_10_11_DifferentialUnipolar
whismanoid	0:f7d706d2904d	820
whismanoid	0:f7d706d2904d	821	//----------------------------------------
whismanoid	0:f7d706d2904d	822	// ADC Channels AIN12, AIN13
whismanoid	0:f7d706d2904d	823	//
whismanoid	0:f7d706d2904d	824	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	825	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	826	//--------------------
whismanoid	0:f7d706d2904d	827	// ADC Channels AIN12, AIN13 = Differential Bipolar
whismanoid	0:f7d706d2904d	828	// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	829	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	830	// AIN12, AIN13 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	831	// AIN12 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	832	// AIN13 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	833	//
whismanoid	0:f7d706d2904d	834	//~ #define AIN_12_13_DifferentialBipolarFS2Vref 1
whismanoid	0:f7d706d2904d	835	//
whismanoid	0:f7d706d2904d	836	//--------------------
whismanoid	6:cb7bdeb185d0	837	// ADC Channels AIN12, AIN13 = Differential Bipolar
whismanoid	0:f7d706d2904d	838	// Full Scale = VREF
whismanoid	0:f7d706d2904d	839	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	840	// AIN12, AIN13 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	841	// AIN12 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	842	// AIN13 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	843	//
whismanoid	6:cb7bdeb185d0	844	//~ #define AIN_12_13_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	845	//
whismanoid	0:f7d706d2904d	846	//--------------------
whismanoid	0:f7d706d2904d	847	// ADC Channels AIN12, AIN13 = Differential Unipolar (AIN12 > AIN13)
whismanoid	0:f7d706d2904d	848	// Full Scale = VREF
whismanoid	0:f7d706d2904d	849	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	850	// AIN12, AIN13 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	851	// AIN12 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	852	// AIN13 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	853	//
whismanoid	0:f7d706d2904d	854	//~ #define AIN_12_13_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	855	//
whismanoid	0:f7d706d2904d	856	//--------------------
whismanoid	6:cb7bdeb185d0	857	// ADC Channels AIN12, AIN13 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	858	// Full Scale = VREF
whismanoid	0:f7d706d2904d	859	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	860	// AIN12 is a Single-Ended input using Unipolar transfer function.
whismanoid	6:cb7bdeb185d0	861	// AIN13 is a Single-Ended input using Unipolar transfer function.
whismanoid	6:cb7bdeb185d0	862	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	863	// AIN12 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	864	// AIN13 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	865	//
whismanoid	6:cb7bdeb185d0	866	//~ #define AIN_12_13_SingleEnded 1
whismanoid	0:f7d706d2904d	867	//
whismanoid	0:f7d706d2904d	868	//--------------------
whismanoid	0:f7d706d2904d	869	//
whismanoid	0:f7d706d2904d	870	// Default settings if not defined at project level
whismanoid	0:f7d706d2904d	871	#ifndef AIN_12_13_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	872	# ifndef AIN_12_13_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	873	# ifndef AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	874	# ifndef AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	875	# define AIN_12_13_DifferentialBipolarFS2Vref 0
whismanoid	6:cb7bdeb185d0	876	# define AIN_12_13_DifferentialBipolarFSVref 0
whismanoid	6:cb7bdeb185d0	877	# define AIN_12_13_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	878	# define AIN_12_13_SingleEnded 1
whismanoid	6:cb7bdeb185d0	879	# endif // AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	880	# endif // AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	881	# endif // AIN_12_13_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	882	#endif // AIN_12_13_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	883	//
whismanoid	0:f7d706d2904d	884	// (optional diagnostic) pragma message the active setting
whismanoid	0:f7d706d2904d	885	#if AIN_12_13_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	886	//~ # pragma message("AIN_12_13_DifferentialBipolarFS2Vref: ADC Channels AIN12, AIN13 = Differential Bipolar")
whismanoid	0:f7d706d2904d	887	#endif // AIN_12_13_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	888	#if AIN_12_13_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	889	//~ # pragma message("AIN_12_13_DifferentialBipolarFSVref: ADC Channels AIN12, AIN13 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	890	#endif // AIN_12_13_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	891	#if AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	892	//~ # pragma message("AIN_12_13_DifferentialUnipolar: ADC Channels AIN12, AIN13 = Differential Unipolar (AIN12 > AIN13)")
whismanoid	6:cb7bdeb185d0	893	#endif // AIN_12_13_DifferentialUnipolar
whismanoid	0:f7d706d2904d	894	#if AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	895	//~ # pragma message("AIN_12_13_SingleEnded: ADC Channels AIN12, AIN13 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	896	#endif // AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	897	//
whismanoid	0:f7d706d2904d	898	// Validate the AIN_12_13_DifferentialBipolarFS2Vref setting
whismanoid	0:f7d706d2904d	899	#if AIN_12_13_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	900	# if AIN_12_13_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	901	# error("cannot have both AIN_12_13_DifferentialBipolarFS2Vref and AIN_12_13_DifferentialBipolarFSVref; choose one")
whismanoid	6:cb7bdeb185d0	902	# endif // AIN_12_13_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	903	# if AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	904	# error("cannot have both AIN_12_13_DifferentialBipolarFS2Vref and AIN_12_13_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	905	# endif // AIN_12_13_DifferentialUnipolar
whismanoid	0:f7d706d2904d	906	# if AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	907	# error("cannot have both AIN_12_13_DifferentialBipolarFS2Vref and AIN_12_13_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	908	# endif // AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	909	#endif // AIN_12_13_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	910	//
whismanoid	6:cb7bdeb185d0	911	// Validate the AIN_12_13_DifferentialBipolarFSVref setting
whismanoid	6:cb7bdeb185d0	912	#if AIN_12_13_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	913	# if AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	914	# error("cannot have both AIN_12_13_DifferentialBipolarFSVref and AIN_12_13_DifferentialUnipolar; choose one")
whismanoid	0:f7d706d2904d	915	# endif // AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	916	# if AIN_12_13_SingleEnded
whismanoid	6:cb7bdeb185d0	917	# error("cannot have both AIN_12_13_DifferentialBipolarFSVref and AIN_12_13_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	918	# endif // AIN_12_13_SingleEnded
whismanoid	6:cb7bdeb185d0	919	#endif // AIN_12_13_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	920	//
whismanoid	0:f7d706d2904d	921	// Validate the AIN_12_13_DifferentialUnipolar setting
whismanoid	0:f7d706d2904d	922	#if AIN_12_13_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	923	# if AIN_12_13_SingleEnded
whismanoid	6:cb7bdeb185d0	924	# error("cannot have both AIN_12_13_DifferentialUnipolar and AIN_12_13_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	925	# endif // AIN_12_13_SingleEnded
whismanoid	0:f7d706d2904d	926	#endif // AIN_12_13_DifferentialUnipolar
whismanoid	0:f7d706d2904d	927
whismanoid	0:f7d706d2904d	928	//----------------------------------------
whismanoid	0:f7d706d2904d	929	// ADC Channels AIN14, AIN15
whismanoid	0:f7d706d2904d	930	//
whismanoid	0:f7d706d2904d	931	// CUSTOMIZE: select one of the following options
whismanoid	0:f7d706d2904d	932	// either by uncommenting in this file or define at the project level
whismanoid	0:f7d706d2904d	933	//--------------------
whismanoid	0:f7d706d2904d	934	// ADC Channels AIN14, AIN15 = Differential Bipolar
whismanoid	0:f7d706d2904d	935	// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	936	// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	937	// AIN14, AIN15 are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	938	// AIN14 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	939	// AIN15 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	940	//
whismanoid	0:f7d706d2904d	941	//~ #define AIN_14_15_DifferentialBipolarFS2Vref 1
whismanoid	0:f7d706d2904d	942	//
whismanoid	0:f7d706d2904d	943	//--------------------
whismanoid	6:cb7bdeb185d0	944	// ADC Channels AIN14, AIN15 = Differential Bipolar
whismanoid	0:f7d706d2904d	945	// Full Scale = VREF
whismanoid	0:f7d706d2904d	946	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	947	// AIN14, AIN15 are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	948	// AIN14 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	949	// AIN15 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	950	//
whismanoid	6:cb7bdeb185d0	951	//~ #define AIN_14_15_DifferentialBipolarFSVref 1
whismanoid	0:f7d706d2904d	952	//
whismanoid	0:f7d706d2904d	953	//--------------------
whismanoid	0:f7d706d2904d	954	// ADC Channels AIN14, AIN15 = Differential Unipolar (AIN14 > AIN15)
whismanoid	0:f7d706d2904d	955	// Full Scale = VREF
whismanoid	0:f7d706d2904d	956	// Voltage per LSB count = VREF/2048
whismanoid	0:f7d706d2904d	957	// AIN14, AIN15 are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	958	// AIN14 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	959	// AIN15 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	960	//
whismanoid	0:f7d706d2904d	961	//~ #define AIN_14_15_DifferentialUnipolar 1
whismanoid	0:f7d706d2904d	962	//
whismanoid	0:f7d706d2904d	963	//--------------------
whismanoid	6:cb7bdeb185d0	964	// ADC Channels AIN14, AIN15 = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	965	// Full Scale = VREF
whismanoid	0:f7d706d2904d	966	// Voltage per LSB count = VREF/2048
whismanoid	6:cb7bdeb185d0	967	// AIN14 is a Single-Ended input using Unipolar transfer function.
whismanoid	6:cb7bdeb185d0	968	// AIN15 is a Single-Ended input using Unipolar transfer function.
whismanoid	6:cb7bdeb185d0	969	// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	970	// AIN14 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	971	// AIN15 voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	972	//
whismanoid	6:cb7bdeb185d0	973	//~ #define AIN_14_15_SingleEnded 1
whismanoid	0:f7d706d2904d	974	//
whismanoid	0:f7d706d2904d	975	//--------------------
whismanoid	0:f7d706d2904d	976	//
whismanoid	0:f7d706d2904d	977	// Default settings if not defined at project level
whismanoid	0:f7d706d2904d	978	#ifndef AIN_14_15_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	979	# ifndef AIN_14_15_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	980	# ifndef AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	981	# ifndef AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	982	# define AIN_14_15_DifferentialBipolarFS2Vref 0
whismanoid	6:cb7bdeb185d0	983	# define AIN_14_15_DifferentialBipolarFSVref 0
whismanoid	6:cb7bdeb185d0	984	# define AIN_14_15_DifferentialUnipolar 0
whismanoid	0:f7d706d2904d	985	# define AIN_14_15_SingleEnded 1
whismanoid	6:cb7bdeb185d0	986	# endif // AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	987	# endif // AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	988	# endif // AIN_14_15_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	989	#endif // AIN_14_15_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	990	//
whismanoid	0:f7d706d2904d	991	// (optional diagnostic) pragma message the active setting
whismanoid	0:f7d706d2904d	992	#if AIN_14_15_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	993	//~ # pragma message("AIN_14_15_DifferentialBipolarFS2Vref: ADC Channels AIN14, AIN15 = Differential Bipolar")
whismanoid	0:f7d706d2904d	994	#endif // AIN_14_15_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	995	#if AIN_14_15_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	996	//~ # pragma message("AIN_14_15_DifferentialBipolarFSVref: ADC Channels AIN14, AIN15 = Differential Bipolar")
whismanoid	6:cb7bdeb185d0	997	#endif // AIN_14_15_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	998	#if AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	999	//~ # pragma message("AIN_14_15_DifferentialUnipolar: ADC Channels AIN14, AIN15 = Differential Unipolar (AIN14 > AIN15)")
whismanoid	6:cb7bdeb185d0	1000	#endif // AIN_14_15_DifferentialUnipolar
whismanoid	0:f7d706d2904d	1001	#if AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	1002	//~ # pragma message("AIN_14_15_SingleEnded: ADC Channels AIN14, AIN15 = Both Single-Ended, Unipolar")
whismanoid	0:f7d706d2904d	1003	#endif // AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	1004	//
whismanoid	0:f7d706d2904d	1005	// Validate the AIN_14_15_DifferentialBipolarFS2Vref setting
whismanoid	0:f7d706d2904d	1006	#if AIN_14_15_DifferentialBipolarFS2Vref
whismanoid	6:cb7bdeb185d0	1007	# if AIN_14_15_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	1008	# error("cannot have both AIN_14_15_DifferentialBipolarFS2Vref and AIN_14_15_DifferentialBipolarFSVref; choose one")
whismanoid	6:cb7bdeb185d0	1009	# endif // AIN_14_15_DifferentialBipolarFSVref
whismanoid	6:cb7bdeb185d0	1010	# if AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	1011	# error("cannot have both AIN_14_15_DifferentialBipolarFS2Vref and AIN_14_15_DifferentialUnipolar; choose one")
whismanoid	6:cb7bdeb185d0	1012	# endif // AIN_14_15_DifferentialUnipolar
whismanoid	0:f7d706d2904d	1013	# if AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	1014	# error("cannot have both AIN_14_15_DifferentialBipolarFS2Vref and AIN_14_15_SingleEnded; choose one")
whismanoid	0:f7d706d2904d	1015	# endif // AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	1016	#endif // AIN_14_15_DifferentialBipolarFS2Vref
whismanoid	0:f7d706d2904d	1017	//
whismanoid	6:cb7bdeb185d0	1018	// Validate the AIN_14_15_DifferentialBipolarFSVref setting
whismanoid	6:cb7bdeb185d0	1019	#if AIN_14_15_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	1020	# if AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	1021	# error("cannot have both AIN_14_15_DifferentialBipolarFSVref and AIN_14_15_DifferentialUnipolar; choose one")
whismanoid	0:f7d706d2904d	1022	# endif // AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	1023	# if AIN_14_15_SingleEnded
whismanoid	6:cb7bdeb185d0	1024	# error("cannot have both AIN_14_15_DifferentialBipolarFSVref and AIN_14_15_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	1025	# endif // AIN_14_15_SingleEnded
whismanoid	6:cb7bdeb185d0	1026	#endif // AIN_14_15_DifferentialBipolarFSVref
whismanoid	0:f7d706d2904d	1027	//
whismanoid	0:f7d706d2904d	1028	// Validate the AIN_14_15_DifferentialUnipolar setting
whismanoid	0:f7d706d2904d	1029	#if AIN_14_15_DifferentialUnipolar
whismanoid	6:cb7bdeb185d0	1030	# if AIN_14_15_SingleEnded
whismanoid	6:cb7bdeb185d0	1031	# error("cannot have both AIN_14_15_DifferentialUnipolar and AIN_14_15_SingleEnded; choose one")
whismanoid	6:cb7bdeb185d0	1032	# endif // AIN_14_15_SingleEnded
whismanoid	0:f7d706d2904d	1033	#endif // AIN_14_15_DifferentialUnipolar
whismanoid	0:f7d706d2904d	1034
whismanoid	0:f7d706d2904d	1035	/**
whismanoid	0:f7d706d2904d	1036	* @brief MAX11131 3Msps, Low-Power, Serial SPI 12-Bit, 16-Channel, Differential/Single-Ended Input, SAR ADC
whismanoid	0:f7d706d2904d	1037	*
whismanoid	0:f7d706d2904d	1038	*
whismanoid	0:f7d706d2904d	1039	*
whismanoid	0:f7d706d2904d	1040	* Datasheet: https://www.maximintegrated.com/MAX11131
whismanoid	0:f7d706d2904d	1041	*
whismanoid	0:f7d706d2904d	1042	*
whismanoid	0:f7d706d2904d	1043	*
whismanoid	0:f7d706d2904d	1044	* @code
whismanoid	0:f7d706d2904d	1045	* // example code includes
whismanoid	6:cb7bdeb185d0	1046	* // standard include for target platform -- Platform_Include_Boilerplate
whismanoid	0:f7d706d2904d	1047	* #include "mbed.h"
whismanoid	6:cb7bdeb185d0	1048	* // Platforms:
whismanoid	6:cb7bdeb185d0	1049	* // - MAX32625MBED
whismanoid	6:cb7bdeb185d0	1050	* // - supports mbed-os-5.11, requires USBDevice library
whismanoid	6:cb7bdeb185d0	1051	* // - add https://developer.mbed.org/teams/MaximIntegrated/code/USBDevice/
whismanoid	6:cb7bdeb185d0	1052	* // - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	1053	* // - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	1054	* // - MAX32600MBED
whismanoid	6:cb7bdeb185d0	1055	* // - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	1056	* // - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	1057	* // - Windows 10 note: Don't connect HDK until you are ready to load new firmware into the board.
whismanoid	6:cb7bdeb185d0	1058	* // - NUCLEO_F446RE
whismanoid	6:cb7bdeb185d0	1059	* // - remove USBDevice library
whismanoid	6:cb7bdeb185d0	1060	* // - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	1061	* // - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	1062	* // - NUCLEO_F401RE
whismanoid	6:cb7bdeb185d0	1063	* // - remove USBDevice library
whismanoid	6:cb7bdeb185d0	1064	* // - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	1065	* // - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	1066	* // - MAX32630FTHR
whismanoid	6:cb7bdeb185d0	1067	* // - #include "max32630fthr.h"
whismanoid	6:cb7bdeb185d0	1068	* // - add http://os.mbed.org/teams/MaximIntegrated/code/max32630fthr/
whismanoid	6:cb7bdeb185d0	1069	* // - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	1070	* // - MAX32620FTHR
whismanoid	6:cb7bdeb185d0	1071	* // - #include "MAX32620FTHR.h"
whismanoid	6:cb7bdeb185d0	1072	* // - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	1073	* // - add https://os.mbed.com/teams/MaximIntegrated/code/MAX32620FTHR/
whismanoid	6:cb7bdeb185d0	1074	* // - not tested yet
whismanoid	6:cb7bdeb185d0	1075	* // - MAX32625PICO
whismanoid	6:cb7bdeb185d0	1076	* // - remove max32630fthr library (if present)
whismanoid	6:cb7bdeb185d0	1077	* // - remove MAX32620FTHR library (if present)
whismanoid	6:cb7bdeb185d0	1078	* // - not tested yet
whismanoid	6:cb7bdeb185d0	1079	* //
whismanoid	6:cb7bdeb185d0	1080	* // end Platform_Include_Boilerplate
whismanoid	0:f7d706d2904d	1081	* #include "MAX11131.h"
whismanoid	0:f7d706d2904d	1082	*
whismanoid	0:f7d706d2904d	1083	* // example code board support
whismanoid	0:f7d706d2904d	1084	* //MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
whismanoid	0:f7d706d2904d	1085	* //DigitalOut rLED(LED1);
whismanoid	0:f7d706d2904d	1086	* //DigitalOut gLED(LED2);
whismanoid	0:f7d706d2904d	1087	* //DigitalOut bLED(LED3);
whismanoid	0:f7d706d2904d	1088	* //
whismanoid	0:f7d706d2904d	1089	* // Arduino "shield" connector port definitions (MAX32625MBED shown)
whismanoid	0:f7d706d2904d	1090	* #if defined(TARGET_MAX32625MBED)
whismanoid	0:f7d706d2904d	1091	* #define A0 AIN_0
whismanoid	0:f7d706d2904d	1092	* #define A1 AIN_1
whismanoid	0:f7d706d2904d	1093	* #define A2 AIN_2
whismanoid	0:f7d706d2904d	1094	* #define A3 AIN_3
whismanoid	0:f7d706d2904d	1095	* #define D0 P0_0
whismanoid	0:f7d706d2904d	1096	* #define D1 P0_1
whismanoid	0:f7d706d2904d	1097	* #define D2 P0_2
whismanoid	0:f7d706d2904d	1098	* #define D3 P0_3
whismanoid	0:f7d706d2904d	1099	* #define D4 P0_4
whismanoid	0:f7d706d2904d	1100	* #define D5 P0_5
whismanoid	0:f7d706d2904d	1101	* #define D6 P0_6
whismanoid	0:f7d706d2904d	1102	* #define D7 P0_7
whismanoid	0:f7d706d2904d	1103	* #define D8 P1_4
whismanoid	0:f7d706d2904d	1104	* #define D9 P1_5
whismanoid	0:f7d706d2904d	1105	* #define D10 P1_3
whismanoid	0:f7d706d2904d	1106	* #define D11 P1_1
whismanoid	0:f7d706d2904d	1107	* #define D12 P1_2
whismanoid	0:f7d706d2904d	1108	* #define D13 P1_0
whismanoid	0:f7d706d2904d	1109	* #endif
whismanoid	0:f7d706d2904d	1110	*
whismanoid	0:f7d706d2904d	1111	* // example code declare SPI interface
whismanoid	0:f7d706d2904d	1112	* #if defined(TARGET_MAX32625MBED)
whismanoid	0:f7d706d2904d	1113	* SPI spi(SPI1_MOSI, SPI1_MISO, SPI1_SCK); // mosi, miso, sclk spi1 TARGET_MAX32625MBED: P1_1 P1_2 P1_0 Arduino 10-pin header D11 D12 D13
whismanoid	0:f7d706d2904d	1114	* DigitalOut spi_cs(SPI1_SS); // TARGET_MAX32625MBED: P1_3 Arduino 10-pin header D10
whismanoid	0:f7d706d2904d	1115	* #elif defined(TARGET_MAX32600MBED)
whismanoid	0:f7d706d2904d	1116	* SPI spi(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid	0:f7d706d2904d	1117	* DigitalOut spi_cs(SPI2_SS); // Generic: Arduino 10-pin header D10
whismanoid	0:f7d706d2904d	1118	* #else
whismanoid	0:f7d706d2904d	1119	* SPI spi(D11, D12, D13); // mosi, miso, sclk spi1 TARGET_MAX32600MBED: Arduino 10-pin header D11 D12 D13
whismanoid	0:f7d706d2904d	1120	* DigitalOut spi_cs(D10); // Generic: Arduino 10-pin header D10
whismanoid	0:f7d706d2904d	1121	* #endif
whismanoid	0:f7d706d2904d	1122	*
whismanoid	0:f7d706d2904d	1123	* // example code declare GPIO interface pins
whismanoid	0:f7d706d2904d	1124	* DigitalOut CNVST_pin(D9); // Digital Trigger Input to MAX11131 device
whismanoid	6:cb7bdeb185d0	1125	* // AnalogOut REF_plus_pin(Px_x_PortName_To_Be_Determined); // Reference Input to MAX11131 device
whismanoid	6:cb7bdeb185d0	1126	* // AnalogOut REF_minus_slash_AIN15_pin(Px_x_PortName_To_Be_Determined); // Reference Input to MAX11131 device
whismanoid	0:f7d706d2904d	1127	* DigitalIn EOC_pin(D2); // Digital Event Output from MAX11131 device
whismanoid	0:f7d706d2904d	1128	* // example code declare device instance
whismanoid	0:f7d706d2904d	1129	* MAX11131 g_MAX11131_device(spi, spi_cs, CNVST_pin, EOC_pin, MAX11131::MAX11131_IC);
whismanoid	0:f7d706d2904d	1130	*
whismanoid	8:2171c1889a84	1131	* //--------------------------------------------------
whismanoid	8:2171c1889a84	1132	* // Declare the Serial driver
whismanoid	8:2171c1889a84	1133	* // default baud rate settings are 9600 8N1
whismanoid	8:2171c1889a84	1134	* // install device driver from http://developer.mbed.org/media/downloads/drivers/mbedWinSerial_16466.exe
whismanoid	8:2171c1889a84	1135	* // see docs https://docs.mbed.com/docs/mbed-os-handbook/en/5.5/getting_started/what_need/
whismanoid	8:2171c1889a84	1136	* #if defined(TARGET_MAX32630)
whismanoid	8:2171c1889a84	1137	* #include "USBSerial.h"
whismanoid	8:2171c1889a84	1138	* // Hardware serial port over DAPLink
whismanoid	8:2171c1889a84	1139	* // The default baud rate for the DapLink UART is 9600
whismanoid	8:2171c1889a84	1140	* //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid	8:2171c1889a84	1141	* // #define HAS_DAPLINK_SERIAL 1
whismanoid	8:2171c1889a84	1142	* // Virtual serial port over USB
whismanoid	8:2171c1889a84	1143	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	8:2171c1889a84	1144	* USBSerial serial;
whismanoid	8:2171c1889a84	1145	* //--------------------------------------------------
whismanoid	8:2171c1889a84	1146	* #elif defined(TARGET_MAX32625MBED)
whismanoid	8:2171c1889a84	1147	* #include "USBSerial.h"
whismanoid	8:2171c1889a84	1148	* // Hardware serial port over DAPLink
whismanoid	8:2171c1889a84	1149	* // The default baud rate for the DapLink UART is 9600
whismanoid	8:2171c1889a84	1150	* //Serial DAPLINKserial(P2_1, P2_0); // tx, rx
whismanoid	8:2171c1889a84	1151	* // #define HAS_DAPLINK_SERIAL 1
whismanoid	8:2171c1889a84	1152	* // Virtual serial port over USB
whismanoid	8:2171c1889a84	1153	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	8:2171c1889a84	1154	* USBSerial serial;
whismanoid	8:2171c1889a84	1155	* //--------------------------------------------------
whismanoid	8:2171c1889a84	1156	* #elif defined(TARGET_MAX32600)
whismanoid	8:2171c1889a84	1157	* #include "USBSerial.h"
whismanoid	8:2171c1889a84	1158	* // Hardware serial port over DAPLink
whismanoid	8:2171c1889a84	1159	* // The default baud rate for the DapLink UART is 9600
whismanoid	8:2171c1889a84	1160	* Serial DAPLINKserial(P1_1, P1_0); // tx, rx
whismanoid	8:2171c1889a84	1161	* #define HAS_DAPLINK_SERIAL 1
whismanoid	8:2171c1889a84	1162	* // Virtual serial port over USB
whismanoid	8:2171c1889a84	1163	* // The baud rate does not affect the virtual USBSerial UART.
whismanoid	8:2171c1889a84	1164	* USBSerial serial;
whismanoid	8:2171c1889a84	1165	* //--------------------------------------------------
whismanoid	8:2171c1889a84	1166	* #elif defined(TARGET_NUCLEO_F446RE) \|\| defined(TARGET_NUCLEO_F401RE)
whismanoid	8:2171c1889a84	1167	* Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid	8:2171c1889a84	1168	* //--------------------------------------------------
whismanoid	8:2171c1889a84	1169	* #else
whismanoid	8:2171c1889a84	1170	* #if defined(SERIAL_TX)
whismanoid	8:2171c1889a84	1171	* #warning "target not previously tested; guess serial pins are SERIAL_TX, SERIAL_RX..."
whismanoid	8:2171c1889a84	1172	* Serial serial(SERIAL_TX, SERIAL_RX); // tx, rx
whismanoid	8:2171c1889a84	1173	* #elif defined(USBTX)
whismanoid	8:2171c1889a84	1174	* #warning "target not previously tested; guess serial pins are USBTX, USBRX..."
whismanoid	8:2171c1889a84	1175	* Serial serial(USBTX, USBRX); // tx, rx
whismanoid	8:2171c1889a84	1176	* #elif defined(UART_TX)
whismanoid	8:2171c1889a84	1177	* #warning "target not previously tested; guess serial pins are UART_TX, UART_RX..."
whismanoid	8:2171c1889a84	1178	* Serial serial(UART_TX, UART_RX); // tx, rx
whismanoid	8:2171c1889a84	1179	* #else
whismanoid	8:2171c1889a84	1180	* #warning "target not previously tested; need to define serial pins..."
whismanoid	8:2171c1889a84	1181	* #endif
whismanoid	8:2171c1889a84	1182	* #endif
whismanoid	8:2171c1889a84	1183	* //
whismanoid	8:2171c1889a84	1184	* #include "CmdLine.h"
whismanoid	8:2171c1889a84	1185	* CmdLine cmdLine(serial, "serial");
whismanoid	8:2171c1889a84	1186	*
whismanoid	0:f7d706d2904d	1187	* // example code main function
whismanoid	0:f7d706d2904d	1188	* int main()
whismanoid	0:f7d706d2904d	1189	* {
whismanoid	0:f7d706d2904d	1190	* while (1)
whismanoid	0:f7d706d2904d	1191	* {
whismanoid	0:f7d706d2904d	1192	* g_MAX11131_device.Init();
whismanoid	0:f7d706d2904d	1193	*
whismanoid	6:cb7bdeb185d0	1194	* while(1) { // this code repeats forever
whismanoid	6:cb7bdeb185d0	1195	* // this code repeats forever
whismanoid	6:cb7bdeb185d0	1196	* // Measure ADC channels in sequence from AIN0 to channelNumber_0_15.
whismanoid	6:cb7bdeb185d0	1197	* // @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	6:cb7bdeb185d0	1198	* // @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	6:cb7bdeb185d0	1199	* // @param[in] g_MAX11131_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	6:cb7bdeb185d0	1200	* int channelId_0_15 = 15;
whismanoid	6:cb7bdeb185d0	1201	* g_MAX11131_device.channelNumber_0_15 = channelId_0_15;
whismanoid	6:cb7bdeb185d0	1202	* g_MAX11131_device.PowerManagement_0_2 = 0;
whismanoid	6:cb7bdeb185d0	1203	* g_MAX11131_device.chan_id_0_1 = 1;
whismanoid	6:cb7bdeb185d0	1204	* g_MAX11131_device.NumWords = g_MAX11131_device.ScanStandardExternalClock();
whismanoid	0:f7d706d2904d	1205	*
whismanoid	6:cb7bdeb185d0	1206	* // Read raw ADC codes from device into AINcode[] and RAW_misoData16[]
whismanoid	6:cb7bdeb185d0	1207	* // @pre one of the MAX11311_Scan functions was called, setting g_MAX11131_device.NumWords
whismanoid	6:cb7bdeb185d0	1208	* g_MAX11131_device.ReadAINcode();
whismanoid	6:cb7bdeb185d0	1209	* // @post RAW_misoData16[index] contains the raw SPI Master-In,Slave-Out data
whismanoid	6:cb7bdeb185d0	1210	* // @post AINcode[NUM_CHANNELS] contains the latest readings in LSBs
whismanoid	0:f7d706d2904d	1211	*
whismanoid	8:2171c1889a84	1212	* // wait(3.0);
whismanoid	6:cb7bdeb185d0	1213	* // Use Arduino Serial Plotter to view output: Tools \| Serial Plotter
whismanoid	6:cb7bdeb185d0	1214	* cmdLine.serial().printf("%d", g_MAX11131_device.AINcode[0]);
whismanoid	6:cb7bdeb185d0	1215	* for (int index = 1; index <= channelId_0_15; index++) {
whismanoid	6:cb7bdeb185d0	1216	* cmdLine.serial().printf(",%d", g_MAX11131_device.AINcode[index]);
whismanoid	6:cb7bdeb185d0	1217	* }
whismanoid	8:2171c1889a84	1218	* cmdLine.serial().printf("\r\n");
whismanoid	6:cb7bdeb185d0	1219	*
whismanoid	6:cb7bdeb185d0	1220	* } // this code repeats forever
whismanoid	0:f7d706d2904d	1221	* }
whismanoid	0:f7d706d2904d	1222	* }
whismanoid	0:f7d706d2904d	1223	* @endcode
whismanoid	0:f7d706d2904d	1224	*/
whismanoid	0:f7d706d2904d	1225	class MAX11131 {
whismanoid	0:f7d706d2904d	1226	public:
whismanoid	0:f7d706d2904d	1227	//----------------------------------------
whismanoid	0:f7d706d2904d	1228	/// ADC_MODE_CONTROL.SCAN[3:0] ADC Scan Control (command)
whismanoid	0:f7d706d2904d	1229	typedef enum MAX11131_SCAN_enum_t {
whismanoid	0:f7d706d2904d	1230	SCAN_0000_NOP = 0x00, //!< 8'b00000000
whismanoid	0:f7d706d2904d	1231	SCAN_0001_Manual = 0x01, //!< 8'b00000001
whismanoid	0:f7d706d2904d	1232	SCAN_0010_Repeat = 0x02, //!< 8'b00000010
whismanoid	0:f7d706d2904d	1233	SCAN_0011_StandardInternalClock = 0x03, //!< 8'b00000011
whismanoid	0:f7d706d2904d	1234	SCAN_0100_StandardExternalClock = 0x04, //!< 8'b00000100
whismanoid	0:f7d706d2904d	1235	SCAN_0101_UpperInternalClock = 0x05, //!< 8'b00000101
whismanoid	0:f7d706d2904d	1236	SCAN_0110_UpperExternalClock = 0x06, //!< 8'b00000110
whismanoid	0:f7d706d2904d	1237	SCAN_0111_CustomInternalClock = 0x07, //!< 8'b00000111
whismanoid	0:f7d706d2904d	1238	SCAN_1000_CustomExternalClock = 0x08, //!< 8'b00001000
whismanoid	0:f7d706d2904d	1239	SCAN_1001_SampleSetExternalClock = 0x09, //!< 8'b00001001
whismanoid	0:f7d706d2904d	1240	} MAX11131_SCAN_enum_t;
whismanoid	0:f7d706d2904d	1241
whismanoid	0:f7d706d2904d	1242	//----------------------------------------
whismanoid	0:f7d706d2904d	1243	/// ADC_MODE_CONTROL.RESET[1:0] Reset 0=Normal 1=ResetFIFO 2=ResetAllRegisters 3=reserved
whismanoid	0:f7d706d2904d	1244	typedef enum MAX11131_RESET_enum_t {
whismanoid	0:f7d706d2904d	1245	RESET_00_Normal = 0x00, //!< 8'b00000000
whismanoid	0:f7d706d2904d	1246	RESET_01_ResetFIFO = 0x01, //!< 8'b00000001
whismanoid	0:f7d706d2904d	1247	RESET_10_ResetAllRegisters = 0x02, //!< 8'b00000010
whismanoid	0:f7d706d2904d	1248	} MAX11131_RESET_enum_t;
whismanoid	0:f7d706d2904d	1249
whismanoid	0:f7d706d2904d	1250	//----------------------------------------
whismanoid	0:f7d706d2904d	1251	/// ADC_MODE_CONTROL.PM[1:0] Power Management 0=Normal, 1=AutoShutdown, 2=AutoStandby 3=reserved
whismanoid	0:f7d706d2904d	1252	typedef enum MAX11131_PM_enum_t {
whismanoid	0:f7d706d2904d	1253	PM_00_Normal = 0x00, //!< 8'b00000000
whismanoid	0:f7d706d2904d	1254	PM_01_AutoShutdown = 0x01, //!< 8'b00000001
whismanoid	0:f7d706d2904d	1255	PM_10_AutoStandby = 0x02, //!< 8'b00000010
whismanoid	0:f7d706d2904d	1256	} MAX11131_PM_enum_t;
whismanoid	0:f7d706d2904d	1257
whismanoid	0:f7d706d2904d	1258	/**
whismanoid	0:f7d706d2904d	1259	* @brief IC's supported with this driver
whismanoid	0:f7d706d2904d	1260	* @details MAX11131
whismanoid	0:f7d706d2904d	1261	*/
whismanoid	0:f7d706d2904d	1262	typedef enum
whismanoid	0:f7d706d2904d	1263	{
whismanoid	0:f7d706d2904d	1264	MAX11131_IC = 0,
whismanoid	0:f7d706d2904d	1265	//MAX11131_IC = 1
whismanoid	0:f7d706d2904d	1266	} MAX11131_ic_t;
whismanoid	0:f7d706d2904d	1267
whismanoid	0:f7d706d2904d	1268	/********************************************************//
whismanoid	0:f7d706d2904d	1269	* @brief Constructor for MAX11131 Class.
whismanoid	0:f7d706d2904d	1270	*
whismanoid	0:f7d706d2904d	1271	* @details Requires an existing SPI object as well as a DigitalOut object.
whismanoid	0:f7d706d2904d	1272	* The DigitalOut object is used for a chip enable signal
whismanoid	0:f7d706d2904d	1273	*
whismanoid	0:f7d706d2904d	1274	* On Entry:
whismanoid	0:f7d706d2904d	1275	* @param[in] spi - pointer to existing SPI object
whismanoid	0:f7d706d2904d	1276	* @param[in] cs_pin - pointer to a DigitalOut pin object
whismanoid	0:f7d706d2904d	1277	* @param[in] CNVST_pin - pointer to a DigitalOut pin object
whismanoid	0:f7d706d2904d	1278	* @param[in] EOC_pin - pointer to a DigitalIn pin object
whismanoid	0:f7d706d2904d	1279	* @param[in] ic_variant - which type of MAX11131 is used
whismanoid	0:f7d706d2904d	1280	*
whismanoid	0:f7d706d2904d	1281	* On Exit:
whismanoid	0:f7d706d2904d	1282	*
whismanoid	0:f7d706d2904d	1283	* @return None
whismanoid	0:f7d706d2904d	1284	**************************************************************/
whismanoid	0:f7d706d2904d	1285	MAX11131(SPI &spi, DigitalOut &cs_pin, // SPI interface
whismanoid	0:f7d706d2904d	1286	DigitalOut &CNVST_pin, // Digital Trigger Input to MAX11131 device
whismanoid	6:cb7bdeb185d0	1287	// AnalogOut &REF_plus_pin, // Reference Input to MAX11131 device
whismanoid	6:cb7bdeb185d0	1288	// AnalogOut &REF_minus_slash_AIN15_pin, // Reference Input to MAX11131 device
whismanoid	0:f7d706d2904d	1289	DigitalIn &EOC_pin, // Digital Event Output from MAX11131 device
whismanoid	0:f7d706d2904d	1290	MAX11131_ic_t ic_variant);
whismanoid	0:f7d706d2904d	1291
whismanoid	0:f7d706d2904d	1292	/************************************************************
whismanoid	0:f7d706d2904d	1293	* @brief Default destructor for MAX11131 Class.
whismanoid	0:f7d706d2904d	1294	*
whismanoid	0:f7d706d2904d	1295	* @details Destroys SPI object if owner
whismanoid	0:f7d706d2904d	1296	*
whismanoid	0:f7d706d2904d	1297	* On Entry:
whismanoid	0:f7d706d2904d	1298	*
whismanoid	0:f7d706d2904d	1299	* On Exit:
whismanoid	0:f7d706d2904d	1300	*
whismanoid	0:f7d706d2904d	1301	* @return None
whismanoid	0:f7d706d2904d	1302	**************************************************************/
whismanoid	0:f7d706d2904d	1303	~MAX11131();
whismanoid	0:f7d706d2904d	1304
whismanoid	6:cb7bdeb185d0	1305	/// Function pointer void f(size_t byteCount, uint8_t mosiData[], uint8_t misoData[])
whismanoid	6:cb7bdeb185d0	1306	Callback<void(size_t, uint8_t, uint8_t)> onSPIprint; //!< optional @ref onSPIprint SPI diagnostic function
whismanoid	6:cb7bdeb185d0	1307
whismanoid	6:cb7bdeb185d0	1308	/// set SPI SCLK frequency
whismanoid	0:f7d706d2904d	1309	void spi_frequency(int spi_sclk_Hz);
whismanoid	0:f7d706d2904d	1310
whismanoid	0:f7d706d2904d	1311	//----------------------------------------
whismanoid	0:f7d706d2904d	1312	public:
whismanoid	0:f7d706d2904d	1313
whismanoid	0:f7d706d2904d	1314	/// shadow of write-only register ADC_MODE_CONTROL
whismanoid	0:f7d706d2904d	1315	/// mosiData16 0x0000..0x7FFF format: 0 SCAN[3:0] CHSEL[3:0] RESET[1:0] PM[1:0] CHAN_ID SWCNV 0
whismanoid	0:f7d706d2904d	1316	int16_t ADC_MODE_CONTROL;
whismanoid	0:f7d706d2904d	1317
whismanoid	0:f7d706d2904d	1318	/// shadow of write-only register ADC_CONFIGURATION
whismanoid	0:f7d706d2904d	1319	/// mosiData16 0x8000..0x87FF format: 1 0 0 0 0 REFSEL AVGON NAVG[1:0] NSCAN[1:0] SPM[1:0] ECHO 0 0
whismanoid	0:f7d706d2904d	1320	int16_t ADC_CONFIGURATION;
whismanoid	0:f7d706d2904d	1321
whismanoid	0:f7d706d2904d	1322	/// shadow of write-only register UNIPOLAR
whismanoid	0:f7d706d2904d	1323	/// mosiData16 0x8800..0x8FFF format: 1 0 0 0 1 UCH0/1 UCH2/3 UCH4/5 UCH6/7 UCH8/9 UCH10/11 UCH12/13 UCH14/15 PDIFF_COM x x
whismanoid	0:f7d706d2904d	1324	int16_t UNIPOLAR;
whismanoid	0:f7d706d2904d	1325
whismanoid	0:f7d706d2904d	1326	/// shadow of write-only register BIPOLAR
whismanoid	0:f7d706d2904d	1327	/// mosiData16 0x9000..0x97FF format: 1 0 0 1 0 BCH0/1 BCH2/3 BCH4/5 BCH6/7 BCH8/9 BCH10/11 BCH12/13 BCH14/15 x x x
whismanoid	0:f7d706d2904d	1328	int16_t BIPOLAR;
whismanoid	0:f7d706d2904d	1329
whismanoid	0:f7d706d2904d	1330	/// shadow of write-only register RANGE
whismanoid	0:f7d706d2904d	1331	/// mosiData16 0x9800..0x9FFF format: 1 0 0 1 1 RANGE0/1 RANGE2/3 RANGE4/5 RANGE6/7 RANGE8/9 RANGE10/11 RANGE12/13 RANGE14/15 x x x
whismanoid	0:f7d706d2904d	1332	int16_t RANGE;
whismanoid	0:f7d706d2904d	1333
whismanoid	0:f7d706d2904d	1334	/// shadow of write-only register CSCAN0
whismanoid	0:f7d706d2904d	1335	/// mosiData16 0xA000..0xA7FF format: 1 0 1 0 0 CHSCAN15 CHSCAN14 CHSCAN13 CHSCAN12 CHSCAN11 CHSCAN10 CHSCAN9 CHSCAN8 x x x
whismanoid	0:f7d706d2904d	1336	int16_t CSCAN0;
whismanoid	0:f7d706d2904d	1337
whismanoid	0:f7d706d2904d	1338	/// shadow of write-only register CSCAN1
whismanoid	0:f7d706d2904d	1339	/// mosiData16 0xA800..0xAFFF format: 1 0 1 0 1 CHSCAN7 CHSCAN6 CHSCAN5 CHSCAN4 CHSCAN3 CHSCAN2 CHSCAN1 CHSCAN0 x x x
whismanoid	0:f7d706d2904d	1340	int16_t CSCAN1;
whismanoid	0:f7d706d2904d	1341
whismanoid	0:f7d706d2904d	1342	/// shadow of write-only register SAMPLESET
whismanoid	0:f7d706d2904d	1343	/// mosiData16 0xB000..0xB7FF format: 1 0 1 1 0 SEQ_LENGTH[7:0] x x x followed by enabledChannelsPattern.
whismanoid	0:f7d706d2904d	1344	/// NOTE: Send the sampleset pattern, with 4 entries packed into each 16-bit SPI word. Pad unused entries with 0.
whismanoid	0:f7d706d2904d	1345	/// NOTE: Keep CS low during the entire enabledChannelsPattern entry.
whismanoid	0:f7d706d2904d	1346	int16_t SAMPLESET;
whismanoid	0:f7d706d2904d	1347
whismanoid	0:f7d706d2904d	1348	/// unpacked SAMPLESET.SEQ_LENGTH[7:0] determines length of pattern
whismanoid	0:f7d706d2904d	1349	/// NOTE: SAMPLESET.SEQ_LENGTH[7:0] is the number of channel entries in the pattern.
whismanoid	0:f7d706d2904d	1350	/// NOTE: Each channel entry is 4 bits. The first 4 bits are the first channel in the sequence.
whismanoid	0:f7d706d2904d	1351	/// NOTE: Channels can be repeated in any arbitrary order.
whismanoid	0:f7d706d2904d	1352	/// NOTE: The channel entry pattern is sent immediately after writing SAMPLESET.
whismanoid	0:f7d706d2904d	1353	uint8_t enabledChannelsPatternLength_1_256;
whismanoid	0:f7d706d2904d	1354
whismanoid	0:f7d706d2904d	1355	/// unpacked shadow of write-only register SAMPLESET enabledChannelsPattern.
whismanoid	6:cb7bdeb185d0	1356	/// Array Length = enabledChannelsPatternLength_1_256.
whismanoid	0:f7d706d2904d	1357	/// Each entry is a channel number between 0 and 15.
whismanoid	0:f7d706d2904d	1358	uint8_t enabledChannelsPattern[256];
whismanoid	0:f7d706d2904d	1359
whismanoid	0:f7d706d2904d	1360	/// Diagnostic: what is the meaning of SPI Master Out data.
whismanoid	0:f7d706d2904d	1361	/// 0:Nothing 1:regWrite 2:sampleSetPattern
whismanoid	0:f7d706d2904d	1362	uint8_t SPI_MOSI_Semantic;
whismanoid	0:f7d706d2904d	1363
whismanoid	0:f7d706d2904d	1364	/// number of ScanRead() words needed to retrieve all measurements.
whismanoid	0:f7d706d2904d	1365	uint16_t NumWords;
whismanoid	0:f7d706d2904d	1366
whismanoid	0:f7d706d2904d	1367	/// Is the currently configured mode external or internal clock. 1:External Clock 0:Internal Clock
whismanoid	0:f7d706d2904d	1368	uint8_t isExternalClock;
whismanoid	0:f7d706d2904d	1369
whismanoid	0:f7d706d2904d	1370	/// unpacked ADC_MODE_CONTROL.SCAN[3:0] Scan Mode MAX11131_SCAN_enum_t
whismanoid	0:f7d706d2904d	1371	uint8_t ScanMode;
whismanoid	0:f7d706d2904d	1372
whismanoid	0:f7d706d2904d	1373	/// unpacked ADC_MODE_CONTROL.CHSEL[3:0] Analog Input Channel Select
whismanoid	0:f7d706d2904d	1374	uint8_t channelNumber_0_15;
whismanoid	0:f7d706d2904d	1375
whismanoid	0:f7d706d2904d	1376	/// unpacked ADC_MODE_CONTROL.PM[1:0] Power Management MAX11131_PM_enum_t
whismanoid	0:f7d706d2904d	1377	uint8_t PowerManagement_0_2;
whismanoid	0:f7d706d2904d	1378
whismanoid	0:f7d706d2904d	1379	/// unpacked ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:f7d706d2904d	1380	uint8_t chan_id_0_1;
whismanoid	0:f7d706d2904d	1381
whismanoid	0:f7d706d2904d	1382	/// unpacked ADC_CONFIGURATION.AVG and ADC_CONFIGURATION.NAVG[1:0] may be 0, 4, 8, 16, or 32
whismanoid	0:f7d706d2904d	1383	uint8_t average_0_4_8_16_32;
whismanoid	0:f7d706d2904d	1384
whismanoid	0:f7d706d2904d	1385	/// unpacked ADC_CONFIGURATION.NSCAN[1:0] may be 4, 8, 12, or 16
whismanoid	0:f7d706d2904d	1386	uint8_t nscan_4_8_12_16;
whismanoid	0:f7d706d2904d	1387
whismanoid	0:f7d706d2904d	1388	/// unpacked ADC_MODE_CONTROL.SWCNV
whismanoid	0:f7d706d2904d	1389	uint8_t swcnv_0_1;
whismanoid	0:f7d706d2904d	1390
whismanoid	0:f7d706d2904d	1391	/// unpacked CSCAN0 and CSCAN1
whismanoid	0:f7d706d2904d	1392	int16_t enabledChannelsMask;
whismanoid	0:f7d706d2904d	1393
whismanoid	0:f7d706d2904d	1394	/// Each channel's most recent value in LSBs.
whismanoid	0:f7d706d2904d	1395	/// Updated by ReadAINcode function.
whismanoid	0:f7d706d2904d	1396	/// Use VoltageOfCode function to convert LSBs to physical voltage.
whismanoid	0:f7d706d2904d	1397	uint16_t AINcode[16];
whismanoid	0:f7d706d2904d	1398
whismanoid	0:f7d706d2904d	1399	/// SPI master-in slave-out data.
whismanoid	0:f7d706d2904d	1400	/// Updated by ReadAINcode function.
whismanoid	0:f7d706d2904d	1401	/// SampleSet mode allows up to 256 channel entry selections.
whismanoid	0:f7d706d2904d	1402	int16_t RAW_misoData16[256];
whismanoid	0:f7d706d2904d	1403
whismanoid	0:f7d706d2904d	1404	/// reference voltage, in Volts
whismanoid	0:f7d706d2904d	1405	double VRef;
whismanoid	0:f7d706d2904d	1406
whismanoid	0:f7d706d2904d	1407
whismanoid	0:f7d706d2904d	1408	//----------------------------------------
whismanoid	0:f7d706d2904d	1409	// Assert SPI Chip Select
whismanoid	0:f7d706d2904d	1410	// SPI chip-select for MAX11131
whismanoid	0:f7d706d2904d	1411	//
whismanoid	0:f7d706d2904d	1412	void SPIoutputCS(int isLogicHigh);
whismanoid	0:f7d706d2904d	1413
whismanoid	0:f7d706d2904d	1414	//----------------------------------------
whismanoid	0:f7d706d2904d	1415	// SPI write 16 bits
whismanoid	0:f7d706d2904d	1416	// SPI interface to MAX11131 shift 16 bits mosiData16 into MAX11131 DIN
whismanoid	0:f7d706d2904d	1417	// ignoring MAX11131 DOUT
whismanoid	0:f7d706d2904d	1418	//
whismanoid	0:f7d706d2904d	1419	void SPIwrite16bits(int16_t mosiData16);
whismanoid	0:f7d706d2904d	1420
whismanoid	0:f7d706d2904d	1421	//----------------------------------------
whismanoid	0:f7d706d2904d	1422	// SPI write 17-24 bits
whismanoid	0:f7d706d2904d	1423	// SPI interface to MAX11131 shift 16 bits mosiData16 into MAX11131 DIN
whismanoid	0:f7d706d2904d	1424	// followed by one additional SCLK byte.
whismanoid	0:f7d706d2904d	1425	// ignoring MAX11131 DOUT
whismanoid	0:f7d706d2904d	1426	//
whismanoid	0:f7d706d2904d	1427	void SPIwrite24bits(int16_t mosiData16_FFFF00, int8_t mosiData8_0000FF);
whismanoid	0:f7d706d2904d	1428
whismanoid	0:f7d706d2904d	1429	//----------------------------------------
whismanoid	0:f7d706d2904d	1430	// SPI read 16 bits while MOSI (MAX11131 DIN) is 0
whismanoid	0:f7d706d2904d	1431	// SPI interface to capture 16 bits miso data from MAX11131 DOUT
whismanoid	0:f7d706d2904d	1432	//
whismanoid	0:f7d706d2904d	1433	int16_t SPIread16bits();
whismanoid	0:f7d706d2904d	1434
whismanoid	0:f7d706d2904d	1435	//----------------------------------------
whismanoid	0:f7d706d2904d	1436	// Assert MAX11131 CNVST convert start.
whismanoid	0:f7d706d2904d	1437	// Required when using any of the InternalClock modes with SWCNV 0.
whismanoid	0:f7d706d2904d	1438	// Trigger measurement by driving CNVST/AIN14 pin low for a minimum active-low pulse duration of 5ns. (AIN14 is not available)
whismanoid	0:f7d706d2904d	1439	//
whismanoid	0:f7d706d2904d	1440	void CNVSToutputPulseLow();
whismanoid	0:f7d706d2904d	1441
whismanoid	0:f7d706d2904d	1442	//----------------------------------------
whismanoid	0:f7d706d2904d	1443	// Wait for MAX11131 EOC pin low, indicating end of conversion.
whismanoid	0:f7d706d2904d	1444	// Required when using any of the InternalClock modes.
whismanoid	0:f7d706d2904d	1445	//
whismanoid	0:f7d706d2904d	1446	void EOCinputWaitUntilLow();
whismanoid	0:f7d706d2904d	1447
whismanoid	0:f7d706d2904d	1448	//----------------------------------------
whismanoid	0:f7d706d2904d	1449	// Return the status of the MAX11131 EOC pin.
whismanoid	0:f7d706d2904d	1450	//
whismanoid	0:f7d706d2904d	1451	int EOCinputValue();
whismanoid	0:f7d706d2904d	1452
whismanoid	0:f7d706d2904d	1453	private:
whismanoid	0:f7d706d2904d	1454	// SPI object
whismanoid	0:f7d706d2904d	1455	SPI &m_spi;
whismanoid	0:f7d706d2904d	1456	int m_SPI_SCLK_Hz;
whismanoid	0:f7d706d2904d	1457	int m_SPI_dataMode;
whismanoid	0:f7d706d2904d	1458	int m_SPI_cs_state;
whismanoid	0:f7d706d2904d	1459
whismanoid	0:f7d706d2904d	1460	// Selector pin object
whismanoid	0:f7d706d2904d	1461	DigitalOut &m_cs_pin;
whismanoid	0:f7d706d2904d	1462
whismanoid	0:f7d706d2904d	1463	// InputPin Name = CNVST
whismanoid	0:f7d706d2904d	1464	// InputPin Description = Active-Low Conversion Start Input/Analog Input 14
whismanoid	0:f7d706d2904d	1465	// InputPin Function = Trigger
whismanoid	0:f7d706d2904d	1466	DigitalOut &m_CNVST_pin;
whismanoid	0:f7d706d2904d	1467	//
whismanoid	0:f7d706d2904d	1468	// InputPin Name = REF+
whismanoid	0:f7d706d2904d	1469	// InputPin Description = External Positive Reference Input. Apply a reference voltage at REF+. Bypass to GND with a 0.47uF capacitor.
whismanoid	0:f7d706d2904d	1470	// InputPin Function = Reference
whismanoid	6:cb7bdeb185d0	1471	// AnalogOut &m_REF_plus_pin;
whismanoid	0:f7d706d2904d	1472	//
whismanoid	0:f7d706d2904d	1473	// InputPin Name = REF-/AIN15
whismanoid	0:f7d706d2904d	1474	// InputPin Description = External Differential Reference Negative Input/Analog Input 15
whismanoid	0:f7d706d2904d	1475	// InputPin Function = Reference
whismanoid	6:cb7bdeb185d0	1476	// AnalogOut &m_REF_minus_slash_AIN15_pin;
whismanoid	0:f7d706d2904d	1477	//
whismanoid	0:f7d706d2904d	1478	// OutputPin Name = EOC
whismanoid	0:f7d706d2904d	1479	// OutputPin Description = End of Conversion Output. Data is valid after EOC pulls low (Internal clock mode only).
whismanoid	0:f7d706d2904d	1480	// OutputPin Function = Event
whismanoid	0:f7d706d2904d	1481	DigitalIn &m_EOC_pin;
whismanoid	0:f7d706d2904d	1482	//
whismanoid	0:f7d706d2904d	1483
whismanoid	0:f7d706d2904d	1484	// Identifies which IC variant is being used
whismanoid	0:f7d706d2904d	1485	MAX11131_ic_t m_ic_variant;
whismanoid	0:f7d706d2904d	1486
whismanoid	0:f7d706d2904d	1487	public:
whismanoid	0:f7d706d2904d	1488
whismanoid	0:f7d706d2904d	1489	//----------------------------------------
whismanoid	6:cb7bdeb185d0	1490	/// Menu item '!'
whismanoid	0:f7d706d2904d	1491	/// Initialize device
whismanoid	0:f7d706d2904d	1492	void Init(void);
whismanoid	0:f7d706d2904d	1493
whismanoid	0:f7d706d2904d	1494	//----------------------------------------
whismanoid	6:cb7bdeb185d0	1495	/// Menu item 'IS'
whismanoid	0:f7d706d2904d	1496	/// ADC Channels AIN(channelId), AIN(channelId+1) = Both Single-Ended, Unipolar
whismanoid	0:f7d706d2904d	1497	/// Full Scale = VREF
whismanoid	0:f7d706d2904d	1498	/// Voltage per LSB count = VREF/4096
whismanoid	0:f7d706d2904d	1499	/// AIN(channelId) is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	1500	/// AIN(channelId+1) is a Single-Ended input using Unipolar transfer function.
whismanoid	0:f7d706d2904d	1501	/// If PDIFF_COM_1, both are Pseudo-Differential with REF- as common.
whismanoid	0:f7d706d2904d	1502	/// AIN(channelId) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1503	/// AIN(channelId+1) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1504	///
whismanoid	6:cb7bdeb185d0	1505	void Reconfigure_SingleEnded(int channel_0_15);
whismanoid	0:f7d706d2904d	1506
whismanoid	0:f7d706d2904d	1507	//----------------------------------------
whismanoid	6:cb7bdeb185d0	1508	/// Menu item 'IU'
whismanoid	0:f7d706d2904d	1509	/// ADC Channels AIN(channelId), AIN(channelId+1) = Differential Unipolar (AIN(channelId) > AIN(channelId+1))
whismanoid	0:f7d706d2904d	1510	/// Full Scale = VREF
whismanoid	0:f7d706d2904d	1511	/// Voltage per LSB count = VREF/4096
whismanoid	0:f7d706d2904d	1512	/// AIN(channelId), AIN(channelId+1) are a Differential pair using Unipolar transfer function.
whismanoid	0:f7d706d2904d	1513	/// AIN(channelId) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1514	/// AIN(channelId+1) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1515	///
whismanoid	6:cb7bdeb185d0	1516	void Reconfigure_DifferentialUnipolar(int channel_0_15);
whismanoid	0:f7d706d2904d	1517
whismanoid	0:f7d706d2904d	1518	//----------------------------------------
whismanoid	6:cb7bdeb185d0	1519	/// Menu item 'IB'
whismanoid	0:f7d706d2904d	1520	/// ADC Channels AIN(channelId), AIN(channelId+1) = Differential Bipolar
whismanoid	0:f7d706d2904d	1521	/// Full Scale = VREF
whismanoid	0:f7d706d2904d	1522	/// Voltage per LSB count = VREF/4096
whismanoid	4:8a0ae95546fa	1523	/// AIN(channelId), AIN(channelId+1) are a Differential pair using Bipolar transfer function with range (+/-)(1/2)Vref
whismanoid	0:f7d706d2904d	1524	/// AIN(channelId) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1525	/// AIN(channelId+1) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1526	///
whismanoid	6:cb7bdeb185d0	1527	void Reconfigure_DifferentialBipolarFSVref(int channel_0_15);
whismanoid	0:f7d706d2904d	1528
whismanoid	0:f7d706d2904d	1529	//----------------------------------------
whismanoid	6:cb7bdeb185d0	1530	/// Menu item 'IR'
whismanoid	0:f7d706d2904d	1531	/// ADC Channels AIN(channelId), AIN(channelId+1) = Differential Bipolar
whismanoid	0:f7d706d2904d	1532	/// Full Scale = 2 * VREF
whismanoid	0:f7d706d2904d	1533	/// Voltage per LSB count = VREF/2048
whismanoid	4:8a0ae95546fa	1534	/// AIN(channelId), AIN(channelId+1) are a Differential pair using Bipolar transfer function with range (+/-)Vref
whismanoid	0:f7d706d2904d	1535	/// AIN(channelId) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1536	/// AIN(channelId+1) voltage must always be between 0 and VREF.
whismanoid	0:f7d706d2904d	1537	///
whismanoid	6:cb7bdeb185d0	1538	void Reconfigure_DifferentialBipolarFS2Vref(int channel_0_15);
whismanoid	0:f7d706d2904d	1539
whismanoid	0:f7d706d2904d	1540	//----------------------------------------
whismanoid	0:f7d706d2904d	1541	/// SCAN_0000_NOP
whismanoid	0:f7d706d2904d	1542	///
whismanoid	0:f7d706d2904d	1543	/// Shift 16 bits out of ADC, without changing configuration.
whismanoid	0:f7d706d2904d	1544	/// Note: @return data format depends on CHAN_ID bit:
whismanoid	0:f7d706d2904d	1545	/// "CH[3:0] DATA[11:0]" when CHAN_ID = 1, or
whismanoid	0:f7d706d2904d	1546	/// "0 DATA[11:0] x x x" when CHAN_ID = 0.
whismanoid	0:f7d706d2904d	1547	int16_t ScanRead(void);
whismanoid	0:f7d706d2904d	1548
whismanoid	0:f7d706d2904d	1549	//----------------------------------------
whismanoid	0:f7d706d2904d	1550	/// SCAN_0000_NOP
whismanoid	0:f7d706d2904d	1551	///
whismanoid	0:f7d706d2904d	1552	/// Read raw ADC codes from device into AINcode[] and RAW_misoData16[].
whismanoid	0:f7d706d2904d	1553	/// If internal clock mode with SWCNV=0, measurements will be triggered using CNVST pin.
whismanoid	0:f7d706d2904d	1554	///
whismanoid	0:f7d706d2904d	1555	/// @pre one of the Scan functions was called, setting g_MAX11131_device.NumWords
whismanoid	6:cb7bdeb185d0	1556	/// @param[in] g_MAX11131_device.NumWords: number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1557	/// @post g_MAX11131_device.RAW_misoData16[index] contains the raw SPI Master-In,Slave-Out data
whismanoid	0:f7d706d2904d	1558	/// @post g_MAX11131_device.AINcode[NUM_CHANNELS] contains the latest readings in LSBs
whismanoid	0:f7d706d2904d	1559	///
whismanoid	0:f7d706d2904d	1560	void ReadAINcode(void);
whismanoid	0:f7d706d2904d	1561
whismanoid	0:f7d706d2904d	1562	//----------------------------------------
whismanoid	0:f7d706d2904d	1563	/// Sign-Extend a right-aligned MAX11131 code into a signed 2's complement value.
whismanoid	0:f7d706d2904d	1564	/// Supports the bipolar transfer functions.
whismanoid	0:f7d706d2904d	1565	/// @param[in] value_u12: raw 12-bit MAX11131 code (right justified).
whismanoid	0:f7d706d2904d	1566	/// @return sign-extended 2's complement value.
whismanoid	0:f7d706d2904d	1567	///
whismanoid	0:f7d706d2904d	1568	int32_t TwosComplementValue(uint32_t regValue);
whismanoid	0:f7d706d2904d	1569
whismanoid	0:f7d706d2904d	1570	//----------------------------------------
whismanoid	0:f7d706d2904d	1571	/// Return the physical voltage corresponding to MAX11131 code.
whismanoid	0:f7d706d2904d	1572	/// Does not perform any offset or gain correction.
whismanoid	0:f7d706d2904d	1573	/// @pre g_MAX11131_device.VRef = Voltage of REF input, in Volts
whismanoid	0:f7d706d2904d	1574	/// @param[in] value_u12: raw 12-bit MAX11131 code (right justified).
whismanoid	0:f7d706d2904d	1575	/// @param[in] channelId: AIN channel number.
whismanoid	0:f7d706d2904d	1576	/// @return physical voltage corresponding to MAX11131 code.
whismanoid	0:f7d706d2904d	1577	///
whismanoid	0:f7d706d2904d	1578	double VoltageOfCode(int16_t value_u12, int channelId);
whismanoid	0:f7d706d2904d	1579
whismanoid	0:f7d706d2904d	1580	//----------------------------------------
whismanoid	0:f7d706d2904d	1581	/// SCAN_0001_Manual
whismanoid	0:f7d706d2904d	1582	///
whismanoid	0:f7d706d2904d	1583	/// Measure ADC channel channelNumber_0_15 once.
whismanoid	0:f7d706d2904d	1584	/// External clock mode.
whismanoid	0:f7d706d2904d	1585	/// @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:f7d706d2904d	1586	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1587	/// @param[in] g_MAX11131_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:f7d706d2904d	1588	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1589	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1590	/// For external clock modes, the data format depends on CHAN_ID.
whismanoid	0:f7d706d2904d	1591	/// when CHAN_ID = 0: misoData16 = 0 DATA[11:0] x x x
whismanoid	0:f7d706d2904d	1592	/// when CHAN_ID = 1: misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1593	///
whismanoid	0:f7d706d2904d	1594	int ScanManual(void);
whismanoid	0:f7d706d2904d	1595
whismanoid	0:f7d706d2904d	1596	//----------------------------------------
whismanoid	0:f7d706d2904d	1597	/// SCAN_0010_Repeat
whismanoid	0:f7d706d2904d	1598	///
whismanoid	0:f7d706d2904d	1599	/// Measure ADC channel channelNumber_0_15 repeatedly with averaging.
whismanoid	0:f7d706d2904d	1600	/// Internal clock mode.
whismanoid	0:f7d706d2904d	1601	/// @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:f7d706d2904d	1602	/// @param[in] g_MAX11131_device.average_0_4_8_16_32: Number of samples averaged per ScanRead() word.
whismanoid	0:f7d706d2904d	1603	/// average_0_4_8_16_32=0 to disable averaging.
whismanoid	0:f7d706d2904d	1604	/// @param[in] g_MAX11131_device.nscan_4_8_12_16: Number of ScanRead() words to report.
whismanoid	0:f7d706d2904d	1605	/// @param[in] g_MAX11131_device.swcnv_0_1: ADC_MODE_CONTROL.SWCNV
whismanoid	0:f7d706d2904d	1606	/// SWCNV=0: trigger measurement by driving CNVST pin low.
whismanoid	0:f7d706d2904d	1607	/// Minimum active-low pulse duration of 5ns. (AIN14 is not available)
whismanoid	0:f7d706d2904d	1608	/// SWCNV=1: trigger measurement on SPI CS rising edge.
whismanoid	0:f7d706d2904d	1609	/// CS must be held low for minimum of 17 SCLK cycles.
whismanoid	0:f7d706d2904d	1610	/// CNVST pin is not used. (AIN14 is available)
whismanoid	0:f7d706d2904d	1611	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1612	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1613	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1614	/// For internal clock modes, the data format always includes the channel address.
whismanoid	0:f7d706d2904d	1615	/// misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1616	///
whismanoid	0:f7d706d2904d	1617	int ScanRepeat(void);
whismanoid	0:f7d706d2904d	1618
whismanoid	0:f7d706d2904d	1619	//----------------------------------------
whismanoid	0:f7d706d2904d	1620	/// SCAN_0011_StandardInternalClock
whismanoid	0:f7d706d2904d	1621	///
whismanoid	0:f7d706d2904d	1622	/// Measure ADC channels in sequence from AIN0 to channelNumber_0_15.
whismanoid	0:f7d706d2904d	1623	/// Internal clock mode.
whismanoid	0:f7d706d2904d	1624	/// @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:f7d706d2904d	1625	/// @param[in] g_MAX11131_device.average_0_4_8_16_32: Number of samples averaged per ScanRead() word.
whismanoid	0:f7d706d2904d	1626	/// average_0_4_8_16_32=0 to disable averaging.
whismanoid	0:f7d706d2904d	1627	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1628	/// @param[in] g_MAX11131_device.swcnv_0_1: ADC_MODE_CONTROL.SWCNV
whismanoid	0:f7d706d2904d	1629	/// SWCNV=0: trigger measurement by driving CNVST pin low.
whismanoid	0:f7d706d2904d	1630	/// Minimum active-low pulse duration of 5ns. (AIN14 is not available)
whismanoid	0:f7d706d2904d	1631	/// SWCNV=1: trigger measurement on SPI CS rising edge.
whismanoid	0:f7d706d2904d	1632	/// CS must be held low for minimum of 17 SCLK cycles.
whismanoid	0:f7d706d2904d	1633	/// CNVST pin is not used. (AIN14 is available)
whismanoid	0:f7d706d2904d	1634	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1635	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1636	/// For internal clock modes, the data format always includes the channel address.
whismanoid	0:f7d706d2904d	1637	/// misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1638	///
whismanoid	0:f7d706d2904d	1639	int ScanStandardInternalClock(void);
whismanoid	0:f7d706d2904d	1640
whismanoid	0:f7d706d2904d	1641	//----------------------------------------
whismanoid	0:f7d706d2904d	1642	/// SCAN_0100_StandardExternalClock
whismanoid	0:f7d706d2904d	1643	///
whismanoid	0:f7d706d2904d	1644	/// Measure ADC channels in sequence from AIN0 to channelNumber_0_15.
whismanoid	0:f7d706d2904d	1645	/// External clock mode.
whismanoid	0:f7d706d2904d	1646	/// @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:f7d706d2904d	1647	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1648	/// @param[in] g_MAX11131_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:f7d706d2904d	1649	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1650	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1651	/// For external clock modes, the data format depends on CHAN_ID.
whismanoid	0:f7d706d2904d	1652	/// when CHAN_ID = 0: misoData16 = 0 DATA[11:0] x x x
whismanoid	0:f7d706d2904d	1653	/// when CHAN_ID = 1: misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1654	///
whismanoid	0:f7d706d2904d	1655	int ScanStandardExternalClock(void);
whismanoid	0:f7d706d2904d	1656
whismanoid	0:f7d706d2904d	1657	//----------------------------------------
whismanoid	0:f7d706d2904d	1658	/// SCAN_0101_UpperInternalClock
whismanoid	0:f7d706d2904d	1659	///
whismanoid	0:f7d706d2904d	1660	/// Measure ADC channels in sequence from channelNumber_0_15 to AIN15.
whismanoid	0:f7d706d2904d	1661	/// Internal clock mode.
whismanoid	0:f7d706d2904d	1662	/// @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:f7d706d2904d	1663	/// @param[in] g_MAX11131_device.average_0_4_8_16_32: Number of samples averaged per ScanRead() word.
whismanoid	0:f7d706d2904d	1664	/// average_0_4_8_16_32=0 to disable averaging.
whismanoid	0:f7d706d2904d	1665	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1666	/// @param[in] g_MAX11131_device.swcnv_0_1: ADC_MODE_CONTROL.SWCNV
whismanoid	0:f7d706d2904d	1667	/// SWCNV=0: trigger measurement by driving CNVST pin low.
whismanoid	0:f7d706d2904d	1668	/// Minimum active-low pulse duration of 5ns. (AIN14 is not available)
whismanoid	0:f7d706d2904d	1669	/// SWCNV=1: trigger measurement on SPI CS rising edge.
whismanoid	0:f7d706d2904d	1670	/// CS must be held low for minimum of 17 SCLK cycles.
whismanoid	0:f7d706d2904d	1671	/// CNVST pin is not used. (AIN14 is available)
whismanoid	0:f7d706d2904d	1672	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1673	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1674	/// For internal clock modes, the data format always includes the channel address.
whismanoid	0:f7d706d2904d	1675	/// misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1676	///
whismanoid	0:f7d706d2904d	1677	int ScanUpperInternalClock(void);
whismanoid	0:f7d706d2904d	1678
whismanoid	0:f7d706d2904d	1679	//----------------------------------------
whismanoid	0:f7d706d2904d	1680	/// SCAN_0110_UpperExternalClock
whismanoid	0:f7d706d2904d	1681	///
whismanoid	0:f7d706d2904d	1682	/// Measure ADC channels in sequence from channelNumber_0_15 to AIN15.
whismanoid	0:f7d706d2904d	1683	/// External clock mode.
whismanoid	0:f7d706d2904d	1684	/// @param[in] g_MAX11131_device.channelNumber_0_15: AIN Channel Number
whismanoid	0:f7d706d2904d	1685	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1686	/// @param[in] g_MAX11131_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:f7d706d2904d	1687	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1688	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1689	/// For external clock modes, the data format depends on CHAN_ID.
whismanoid	0:f7d706d2904d	1690	/// when CHAN_ID = 0: misoData16 = 0 DATA[11:0] x x x
whismanoid	0:f7d706d2904d	1691	/// when CHAN_ID = 1: misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1692	///
whismanoid	0:f7d706d2904d	1693	int ScanUpperExternalClock(void);
whismanoid	0:f7d706d2904d	1694
whismanoid	0:f7d706d2904d	1695	//----------------------------------------
whismanoid	0:f7d706d2904d	1696	/// SCAN_0111_CustomInternalClock
whismanoid	0:f7d706d2904d	1697	///
whismanoid	0:f7d706d2904d	1698	/// Measure selected ADC channels in sequence from AIN0 to AIN15,
whismanoid	0:f7d706d2904d	1699	/// using only the channels enabled by enabledChannelsMask.
whismanoid	0:f7d706d2904d	1700	/// Bit 0x0001 enables AIN0.
whismanoid	0:f7d706d2904d	1701	/// Bit 0x0002 enables AIN1.
whismanoid	0:f7d706d2904d	1702	/// Bit 0x0004 enables AIN2.
whismanoid	0:f7d706d2904d	1703	/// Bit 0x0008 enables AIN3.
whismanoid	0:f7d706d2904d	1704	/// Bit 0x0010 enables AIN4.
whismanoid	0:f7d706d2904d	1705	/// Bit 0x0020 enables AIN5.
whismanoid	0:f7d706d2904d	1706	/// Bit 0x0040 enables AIN6.
whismanoid	0:f7d706d2904d	1707	/// Bit 0x0080 enables AIN7.
whismanoid	0:f7d706d2904d	1708	/// Bit 0x0100 enables AIN8.
whismanoid	0:f7d706d2904d	1709	/// Bit 0x0200 enables AIN9.
whismanoid	0:f7d706d2904d	1710	/// Bit 0x0400 enables AIN10.
whismanoid	0:f7d706d2904d	1711	/// Bit 0x0800 enables AIN11.
whismanoid	0:f7d706d2904d	1712	/// Bit 0x1000 enables AIN12.
whismanoid	0:f7d706d2904d	1713	/// Bit 0x2000 enables AIN13.
whismanoid	0:f7d706d2904d	1714	/// Bit 0x4000 enables AIN14.
whismanoid	0:f7d706d2904d	1715	/// Bit 0x8000 enables AIN15.
whismanoid	0:f7d706d2904d	1716	/// Internal clock mode.
whismanoid	0:f7d706d2904d	1717	/// @param[in] g_MAX11131_device.enabledChannelsMask: Bitmap of AIN Channels to scan.
whismanoid	0:f7d706d2904d	1718	/// @param[in] g_MAX11131_device.average_0_4_8_16_32: Number of samples averaged per ScanRead() word.
whismanoid	0:f7d706d2904d	1719	/// average_0_4_8_16_32=0 to disable averaging.
whismanoid	0:f7d706d2904d	1720	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1721	/// @param[in] g_MAX11131_device.swcnv_0_1: ADC_MODE_CONTROL.SWCNV
whismanoid	0:f7d706d2904d	1722	/// SWCNV=0: trigger measurement by driving CNVST pin low.
whismanoid	0:f7d706d2904d	1723	/// Minimum active-low pulse duration of 5ns. (AIN14 is not available)
whismanoid	0:f7d706d2904d	1724	/// SWCNV=1: trigger measurement on SPI CS rising edge.
whismanoid	0:f7d706d2904d	1725	/// CS must be held low for minimum of 17 SCLK cycles.
whismanoid	0:f7d706d2904d	1726	/// CNVST pin is not used. (AIN14 is available)
whismanoid	0:f7d706d2904d	1727	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1728	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1729	/// For internal clock modes, the data format always includes the channel address.
whismanoid	0:f7d706d2904d	1730	/// misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1731	///
whismanoid	0:f7d706d2904d	1732	int ScanCustomInternalClock(void);
whismanoid	0:f7d706d2904d	1733
whismanoid	0:f7d706d2904d	1734	//----------------------------------------
whismanoid	0:f7d706d2904d	1735	/// SCAN_1000_CustomExternalClock
whismanoid	0:f7d706d2904d	1736	///
whismanoid	0:f7d706d2904d	1737	/// Measure selected ADC channels in sequence from AIN0 to AIN15,
whismanoid	0:f7d706d2904d	1738	/// using only the channels enabled by enabledChannelsMask.
whismanoid	0:f7d706d2904d	1739	/// Bit 0x0001 enables AIN0.
whismanoid	0:f7d706d2904d	1740	/// Bit 0x0002 enables AIN1.
whismanoid	0:f7d706d2904d	1741	/// Bit 0x0004 enables AIN2.
whismanoid	0:f7d706d2904d	1742	/// Bit 0x0008 enables AIN3.
whismanoid	0:f7d706d2904d	1743	/// Bit 0x0010 enables AIN4.
whismanoid	0:f7d706d2904d	1744	/// Bit 0x0020 enables AIN5.
whismanoid	0:f7d706d2904d	1745	/// Bit 0x0040 enables AIN6.
whismanoid	0:f7d706d2904d	1746	/// Bit 0x0080 enables AIN7.
whismanoid	0:f7d706d2904d	1747	/// Bit 0x0100 enables AIN8.
whismanoid	0:f7d706d2904d	1748	/// Bit 0x0200 enables AIN9.
whismanoid	0:f7d706d2904d	1749	/// Bit 0x0400 enables AIN10.
whismanoid	0:f7d706d2904d	1750	/// Bit 0x0800 enables AIN11.
whismanoid	0:f7d706d2904d	1751	/// Bit 0x1000 enables AIN12.
whismanoid	0:f7d706d2904d	1752	/// Bit 0x2000 enables AIN13.
whismanoid	0:f7d706d2904d	1753	/// Bit 0x4000 enables AIN14.
whismanoid	0:f7d706d2904d	1754	/// Bit 0x8000 enables AIN15.
whismanoid	0:f7d706d2904d	1755	/// External clock mode.
whismanoid	0:f7d706d2904d	1756	/// @param[in] g_MAX11131_device.enabledChannelsMask: Bitmap of AIN Channels to scan.
whismanoid	0:f7d706d2904d	1757	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1758	/// @param[in] g_MAX11131_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:f7d706d2904d	1759	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1760	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1761	/// For external clock modes, the data format depends on CHAN_ID.
whismanoid	0:f7d706d2904d	1762	/// when CHAN_ID = 0: misoData16 = 0 DATA[11:0] x x x
whismanoid	0:f7d706d2904d	1763	/// when CHAN_ID = 1: misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1764	///
whismanoid	0:f7d706d2904d	1765	int ScanCustomExternalClock(void);
whismanoid	0:f7d706d2904d	1766
whismanoid	0:f7d706d2904d	1767	//----------------------------------------
whismanoid	0:f7d706d2904d	1768	/// SCAN_1001_SampleSetExternalClock
whismanoid	0:f7d706d2904d	1769	///
whismanoid	0:f7d706d2904d	1770	/// Measure ADC channels in an arbitrary pattern.
whismanoid	0:f7d706d2904d	1771	/// Channels can be visited in any order, with repetition allowed.
whismanoid	0:f7d706d2904d	1772	/// External clock mode.
whismanoid	0:f7d706d2904d	1773	/// @pre g_MAX11131_device.enabledChannelsPatternLength_1_256: number of channel selections
whismanoid	0:f7d706d2904d	1774	/// @pre g_MAX11131_device.enabledChannelsPattern: array containing channel selection pattern
whismanoid	0:f7d706d2904d	1775	/// In the array, one channel select per byte.
whismanoid	0:f7d706d2904d	1776	/// In the SPI interface, immediately after SAMPLESET register is written,
whismanoid	0:f7d706d2904d	1777	/// each byte encodes two channelNumber selections.
whismanoid	0:f7d706d2904d	1778	/// The high 4 bits encode the first channelNumber.
whismanoid	0:f7d706d2904d	1779	/// (((enabledChannelsPattern[0]) & 0x0F) << 4) \| ((enabledChannelsPattern[1]) & 0x0F)
whismanoid	0:f7d706d2904d	1780	/// If it is an odd number of channels, additional nybbles will be ignored.
whismanoid	0:f7d706d2904d	1781	/// CS will be asserted low during the entire SAMPLESET pattern selection.
whismanoid	6:cb7bdeb185d0	1782	/// @param[in] g_MAX11131_device.enabledChannelsPattern: array of channel select, one channel per byte
whismanoid	0:f7d706d2904d	1783	/// @param[in] g_MAX11131_device.PowerManagement_0_2: 0=Normal, 1=AutoShutdown, 2=AutoStandby
whismanoid	0:f7d706d2904d	1784	/// @param[in] g_MAX11131_device.chan_id_0_1: ADC_MODE_CONTROL.CHAN_ID
whismanoid	0:f7d706d2904d	1785	/// @return number of ScanRead() words needed to retrieve the data.
whismanoid	6:cb7bdeb185d0	1786	/// @post NumWords = number of words to be read from the FIFO
whismanoid	0:f7d706d2904d	1787	/// For external clock modes, the data format depends on CHAN_ID.
whismanoid	0:f7d706d2904d	1788	/// when CHAN_ID = 0: misoData16 = 0 DATA[11:0] x x x
whismanoid	0:f7d706d2904d	1789	/// when CHAN_ID = 1: misoData16 = CH[3:0] DATA[11:0]
whismanoid	0:f7d706d2904d	1790	///
whismanoid	0:f7d706d2904d	1791	int ScanSampleSetExternalClock(void);
whismanoid	0:f7d706d2904d	1792
whismanoid	0:f7d706d2904d	1793	//----------------------------------------
whismanoid	0:f7d706d2904d	1794	/// Example configure and perform some measurements in ScanManual mode.
whismanoid	0:f7d706d2904d	1795	/// @param[out] pd_mean = address for double mean (avearge)
whismanoid	0:f7d706d2904d	1796	/// @param[out] pd_variance = address for double variance (variance)
whismanoid	0:f7d706d2904d	1797	/// @param[out] pd_stddev = address for double stddev (standard deviation)
whismanoid	0:f7d706d2904d	1798	/// @param[out] pd_Sx = address for double Sx (sum of all X)
whismanoid	0:f7d706d2904d	1799	/// @param[out] pd_Sxx = address for double Sxx (sum of squares of each X)
whismanoid	0:f7d706d2904d	1800	void Example_ScanManual(int channelNumber_0_15, int nWords,
whismanoid	0:f7d706d2904d	1801	double* pd_mean, double* pd_variance, double* pd_stddev,
whismanoid	0:f7d706d2904d	1802	double* pd_Sx, double* pd_Sxx);
whismanoid	0:f7d706d2904d	1803
whismanoid	0:f7d706d2904d	1804	}; // end of class MAX11131
whismanoid	0:f7d706d2904d	1805
whismanoid	0:f7d706d2904d	1806	#endif // __MAX11131_H__
whismanoid	0:f7d706d2904d	1807
whismanoid	0:f7d706d2904d	1808	// End of file

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Type:	Library
Created:	05 Jun 2019
Imports:	7
Forks:	0
Commits:	12
Dependents:	3
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Followers:	111

The code in this repository is Apache licensed.

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MAX11131BOB

MAX11131.h@8:2171c1889a84, 2019-10-30 (annotated)

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