Maxim Integrated / Mbed OS MAX30003WING_Demo_Debug

This is one of the demo programs for the MAX30003WING. This program records ECG data and prints the status register, calculated BPM, samples recorded and ETAG register value.

Dependencies:   MAX30003 max32630fthr

Fork of MAX30003_Demo_Debug by John Greene

main.cpp@5:202ed7222217, 2017-08-29 (annotated)

Committer:
coreyharris
Date:
Tue Aug 29 20:23:45 2017 +0000
Revision:
5:202ed7222217
Parent:
4:828118be72d0
Child:
6:e380af098d52
Updated comments, created bitmask constants for the ECG FIFO and EINT interrupt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
coreyharris 4:828118be72d0 1 /*******************************************************************************
coreyharris 4:828118be72d0 2 * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
coreyharris 4:828118be72d0 3 *
coreyharris 4:828118be72d0 4 * Permission is hereby granted, free of charge, to any person obtaining a
coreyharris 4:828118be72d0 5 * copy of this software and associated documentation files (the "Software"),
coreyharris 4:828118be72d0 6 * to deal in the Software without restriction, including without limitation
coreyharris 4:828118be72d0 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
coreyharris 4:828118be72d0 8 * and/or sell copies of the Software, and to permit persons to whom the
coreyharris 4:828118be72d0 9 * Software is furnished to do so, subject to the following conditions:
coreyharris 4:828118be72d0 10 *
coreyharris 4:828118be72d0 11 * The above copyright notice and this permission notice shall be included
coreyharris 4:828118be72d0 12 * in all copies or substantial portions of the Software.
coreyharris 4:828118be72d0 13 *
coreyharris 4:828118be72d0 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
coreyharris 4:828118be72d0 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
coreyharris 4:828118be72d0 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
coreyharris 4:828118be72d0 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
coreyharris 4:828118be72d0 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
coreyharris 4:828118be72d0 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
coreyharris 4:828118be72d0 20 * OTHER DEALINGS IN THE SOFTWARE.
coreyharris 4:828118be72d0 21 *
coreyharris 4:828118be72d0 22 * Except as contained in this notice, the name of Maxim Integrated
coreyharris 4:828118be72d0 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
coreyharris 4:828118be72d0 24 * Products, Inc. Branding Policy.
coreyharris 4:828118be72d0 25 *
coreyharris 4:828118be72d0 26 * The mere transfer of this software does not imply any licenses
coreyharris 4:828118be72d0 27 * of trade secrets, proprietary technology, copyrights, patents,
coreyharris 4:828118be72d0 28 * trademarks, maskwork rights, or any other form of intellectual
coreyharris 4:828118be72d0 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
coreyharris 4:828118be72d0 30 * ownership rights.
coreyharris 4:828118be72d0 31 *******************************************************************************
coreyharris 4:828118be72d0 32 */
coreyharris 4:828118be72d0 33
coreyharris 4:828118be72d0 34
coreyharris 0:38c49bc37c7c 35 #include "mbed.h"
coreyharris 0:38c49bc37c7c 36 #include "max32630fthr.h"
coreyharris 0:38c49bc37c7c 37 #include "MAX30003.h"
coreyharris 0:38c49bc37c7c 38
coreyharris 0:38c49bc37c7c 39 MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
coreyharris 0:38c49bc37c7c 40
coreyharris 0:38c49bc37c7c 41 void ecg_config(MAX30003 &ecgAFE);
coreyharris 0:38c49bc37c7c 42
coreyharris 0:38c49bc37c7c 43 /* ECG FIFO nearly full callback */
coreyharris 0:38c49bc37c7c 44 volatile bool ecgFIFOIntFlag = 0;
coreyharris 0:38c49bc37c7c 45 void ecgFIFO_callback() {
coreyharris 0:38c49bc37c7c 46
coreyharris 0:38c49bc37c7c 47 ecgFIFOIntFlag = 1;
coreyharris 0:38c49bc37c7c 48
coreyharris 0:38c49bc37c7c 49 }
coreyharris 0:38c49bc37c7c 50
coreyharris 0:38c49bc37c7c 51 int main()
coreyharris 3:420d5efbd967 52 {
coreyharris 5:202ed7222217 53
coreyharris 5:202ed7222217 54 // Constants
coreyharris 4:828118be72d0 55 const int EINT_STATUS_MASK = 1 << 23;
coreyharris 5:202ed7222217 56 const int FIFO_OVF_MASK = 0x7;
coreyharris 5:202ed7222217 57 const int FIFO_VALID_SAMPLE_MASK = 0x0;
coreyharris 5:202ed7222217 58 const int FIFO_FAST_SAMPLE_MASK = 0x1;
coreyharris 5:202ed7222217 59 const int ETAG_BITS_MASK = 0x7;
coreyharris 3:420d5efbd967 60
coreyharris 5:202ed7222217 61 // Ports and serial connections
coreyharris 1:86843c27cc81 62 Serial pc(USBTX, USBRX); // Use USB debug probe for serial link
coreyharris 1:86843c27cc81 63 pc.baud(115200); // Baud rate = 115200
coreyharris 1:86843c27cc81 64
coreyharris 5:202ed7222217 65 DigitalOut rLed(LED1, LED_OFF); // Debug LEDs
coreyharris 0:38c49bc37c7c 66 DigitalOut gLed(LED2, LED_OFF);
coreyharris 0:38c49bc37c7c 67 DigitalOut bLed(LED3, LED_OFF);
coreyharris 0:38c49bc37c7c 68
coreyharris 1:86843c27cc81 69 InterruptIn ecgFIFO_int(P5_4); // Config P5_4 as int. in for the
coreyharris 1:86843c27cc81 70 ecgFIFO_int.fall(&ecgFIFO_callback); // ecg FIFO almost full interrupt
coreyharris 0:38c49bc37c7c 71
coreyharris 1:86843c27cc81 72 SPI spiBus(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // SPI bus, P5_1 = MOSI,
coreyharris 1:86843c27cc81 73 // P5_2 = MISO, P5_0 = SCK
coreyharris 0:38c49bc37c7c 74
coreyharris 4:828118be72d0 75 MAX30003 ecgAFE(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3
coreyharris 4:828118be72d0 76 ecg_config( ecgAFE ); // Config ECG
coreyharris 1:86843c27cc81 77
coreyharris 0:38c49bc37c7c 78
coreyharris 4:828118be72d0 79 ecgAFE.writeRegister( MAX30003::SYNCH , 0);
coreyharris 0:38c49bc37c7c 80
coreyharris 4:828118be72d0 81 uint32_t ecgFIFO, readECGSamples, idx, ETAG[32], status;
coreyharris 1:86843c27cc81 82 int16_t ecgSample[32];
coreyharris 2:812d40f1853d 83
coreyharris 1:86843c27cc81 84 while(1) {
coreyharris 1:86843c27cc81 85
coreyharris 0:38c49bc37c7c 86 /* Read back ECG samples from the FIFO */
coreyharris 0:38c49bc37c7c 87 if( ecgFIFOIntFlag ) {
coreyharris 5:202ed7222217 88
coreyharris 4:828118be72d0 89 ecgFIFOIntFlag = 0;
coreyharris 2:812d40f1853d 90 pc.printf("Interrupt received....\r\n");
coreyharris 4:828118be72d0 91 status = ecgAFE.readRegister( MAX30003::STATUS ); // Read the STATUS register
coreyharris 4:828118be72d0 92 pc.printf("Status : 0x%x\r\n\r\n", status);
coreyharris 2:812d40f1853d 93
coreyharris 3:420d5efbd967 94 // Check if EINT interrupt asserted
coreyharris 3:420d5efbd967 95 if ( ( status & EINT_STATUS_MASK ) == EINT_STATUS_MASK ) {
coreyharris 3:420d5efbd967 96
coreyharris 2:812d40f1853d 97 pc.printf("FIFO Interrupt \r\n");
coreyharris 4:828118be72d0 98 readECGSamples = 0; // Reset sample counter
coreyharris 3:420d5efbd967 99
coreyharris 2:812d40f1853d 100 do {
coreyharris 5:202ed7222217 101 ecgFIFO = ecgAFE.readRegister( MAX30003::ECG_FIFO ); // Read FIFO
coreyharris 4:828118be72d0 102 ecgSample[readECGSamples] = ecgFIFO >> 8; // Isolate voltage data
coreyharris 5:202ed7222217 103 ETAG[readECGSamples] = ( ecgFIFO >> 3 ) & ETAG_BITS_MASK; // Isolate ETAG
coreyharris 4:828118be72d0 104 readECGSamples++; // Increment sample counter
coreyharris 3:420d5efbd967 105
coreyharris 3:420d5efbd967 106 // Check that sample is not last sample in FIFO
coreyharris 5:202ed7222217 107 } while ( ETAG[readECGSamples-1] == FIFO_VALID_SAMPLE_MASK ||
coreyharris 5:202ed7222217 108 ETAG[readECGSamples-1] == FIFO_FAST_SAMPLE_MASK );
coreyharris 1:86843c27cc81 109
coreyharris 4:828118be72d0 110 pc.printf("%d samples read from FIFO \r\n", readECGSamples);
coreyharris 2:812d40f1853d 111
coreyharris 3:420d5efbd967 112 // Check if FIFO has overflowed
coreyharris 5:202ed7222217 113 if( ETAG[readECGSamples - 1] == FIFO_OVF_MASK ){
coreyharris 3:420d5efbd967 114 ecgAFE.writeRegister( MAX30003::FIFO_RST , 0); // Reset FIFO
coreyharris 3:420d5efbd967 115 }
coreyharris 3:420d5efbd967 116
coreyharris 5:202ed7222217 117 // Print results
coreyharris 4:828118be72d0 118 for( idx = 0; idx < readECGSamples; idx++ ) {
coreyharris 2:812d40f1853d 119 pc.printf("Sample : %6d, \tETAG : 0x%x\r\n", ecgSample[idx], ETAG[idx]);
coreyharris 2:812d40f1853d 120 }
coreyharris 5:202ed7222217 121 pc.printf("\r\n\r\n\r\n");
coreyharris 5:202ed7222217 122
coreyharris 0:38c49bc37c7c 123 }
coreyharris 0:38c49bc37c7c 124 }
coreyharris 0:38c49bc37c7c 125 }
coreyharris 0:38c49bc37c7c 126 }
coreyharris 0:38c49bc37c7c 127
coreyharris 0:38c49bc37c7c 128
coreyharris 0:38c49bc37c7c 129
coreyharris 0:38c49bc37c7c 130
coreyharris 0:38c49bc37c7c 131 void ecg_config(MAX30003& ecgAFE) {
coreyharris 0:38c49bc37c7c 132
coreyharris 1:86843c27cc81 133 // Reset ECG to clear registers
coreyharris 1:86843c27cc81 134 ecgAFE.writeRegister( MAX30003::SW_RST , 0);
coreyharris 0:38c49bc37c7c 135
coreyharris 1:86843c27cc81 136 // General config register setting
coreyharris 1:86843c27cc81 137 MAX30003::GeneralConfiguration_u CNFG_GEN_r;
coreyharris 3:420d5efbd967 138 CNFG_GEN_r.bits.en_ecg = 1; // Enable ECG channel
coreyharris 3:420d5efbd967 139 CNFG_GEN_r.bits.rbiasn = 1; // Enable resistive bias on negative input
coreyharris 3:420d5efbd967 140 CNFG_GEN_r.bits.rbiasp = 1; // Enable resistive bias on positive input
coreyharris 3:420d5efbd967 141 CNFG_GEN_r.bits.en_rbias = 1; // Enable resistive bias
coreyharris 3:420d5efbd967 142 CNFG_GEN_r.bits.en_dcloff = 1; // Enable DC lead-off detection
coreyharris 4:828118be72d0 143 CNFG_GEN_r.bits.imag = 0b010; // Current magnitude = 10nA
coreyharris 4:828118be72d0 144 CNFG_GEN_r.bits.rbiasv = 0b00; // Resistive bias = 50MOhm
coreyharris 1:86843c27cc81 145 ecgAFE.writeRegister( MAX30003::CNFG_GEN , CNFG_GEN_r.all);
coreyharris 1:86843c27cc81 146
coreyharris 1:86843c27cc81 147
coreyharris 1:86843c27cc81 148 // ECG Config register setting
coreyharris 1:86843c27cc81 149 MAX30003::ECGConfiguration_u CNFG_ECG_r;
coreyharris 4:828118be72d0 150 CNFG_ECG_r.bits.dlpf = 0b01; // Digital LPF cutoff = 40Hz
coreyharris 4:828118be72d0 151 CNFG_ECG_r.bits.dhpf = 1; // Digital HPF cutoff = 0.5Hz
coreyharris 4:828118be72d0 152 CNFG_ECG_r.bits.gain = 0b11; // ECG gain = 160V/V
coreyharris 4:828118be72d0 153 CNFG_ECG_r.bits.rate = 0b10; // Sample rate = 128 sps
coreyharris 1:86843c27cc81 154 ecgAFE.writeRegister( MAX30003::CNFG_ECG , CNFG_ECG_r.all);
coreyharris 1:86843c27cc81 155
coreyharris 1:86843c27cc81 156
coreyharris 1:86843c27cc81 157 //R-to-R configuration
coreyharris 1:86843c27cc81 158 MAX30003::RtoR1Configuration_u CNFG_RTOR_r;
coreyharris 4:828118be72d0 159 CNFG_RTOR_r.bits.en_rtor = 0; // Disable R-to-R detection
coreyharris 1:86843c27cc81 160 ecgAFE.writeRegister( MAX30003::CNFG_RTOR1 , CNFG_RTOR_r.all);
coreyharris 1:86843c27cc81 161
coreyharris 1:86843c27cc81 162
coreyharris 1:86843c27cc81 163 //Manage interrupts register setting
coreyharris 1:86843c27cc81 164 MAX30003::ManageInterrupts_u MNG_INT_r;
coreyharris 3:420d5efbd967 165 MNG_INT_r.bits.efit = 0b00011; // Assert EINT w/ 4 unread samples
coreyharris 3:420d5efbd967 166 MNG_INT_r.bits.clr_rrint = 0b01; // Clear R-to-R on RTOR reg. read back
coreyharris 1:86843c27cc81 167 ecgAFE.writeRegister( MAX30003::MNGR_INT , MNG_INT_r.all);
coreyharris 0:38c49bc37c7c 168
coreyharris 0:38c49bc37c7c 169
coreyharris 1:86843c27cc81 170 //Enable interrupts register setting
coreyharris 1:86843c27cc81 171 MAX30003::EnableInterrupts_u EN_INT_r;
coreyharris 3:420d5efbd967 172 EN_INT_r.bits.en_eint = 1; // Enable EINT interrupt
coreyharris 4:828118be72d0 173 EN_INT_r.bits.en_rrint = 0; // Disable R-to-R interrupt
coreyharris 4:828118be72d0 174 EN_INT_r.bits.intb_type = 0b11; // Open-drain NMOS with internal pullup
coreyharris 1:86843c27cc81 175 ecgAFE.writeRegister( MAX30003::EN_INT , EN_INT_r.all);
coreyharris 1:86843c27cc81 176
coreyharris 1:86843c27cc81 177
coreyharris 1:86843c27cc81 178 //Dyanmic modes config
coreyharris 1:86843c27cc81 179 MAX30003::ManageDynamicModes_u MNG_DYN_r;
coreyharris 3:420d5efbd967 180 MNG_DYN_r.bits.fast = 0; // Fast recovery mode disabled
coreyharris 1:86843c27cc81 181 ecgAFE.writeRegister( MAX30003::MNGR_DYN , MNG_DYN_r.all);
coreyharris 4:828118be72d0 182
coreyharris 4:828118be72d0 183 // MUX Config
coreyharris 4:828118be72d0 184 MAX30003::MuxConfiguration_u CNFG_MUX_r;
coreyharris 4:828118be72d0 185 CNFG_MUX_r.bits.openn = 0; // Connect ECGN to AFE channel
coreyharris 4:828118be72d0 186 CNFG_MUX_r.bits.openp = 0; // Connect ECGP to AFE channel
coreyharris 4:828118be72d0 187 ecgAFE.writeRegister( MAX30003::CNFG_EMUX , CNFG_MUX_r.all);
coreyharris 4:828118be72d0 188
coreyharris 1:86843c27cc81 189
coreyharris 0:38c49bc37c7c 190
coreyharris 1:86843c27cc81 191 return;
coreyharris 0:38c49bc37c7c 192 }
coreyharris 0:38c49bc37c7c 193