Maxim Integrated / MAX14871_Shield

Library for MAX14871 Shield, MAXREFDES89#

Dependencies:   MAX5387 MAX7300

Dependents:   MAXREFDES89_MAX14871_Shield_Demo MAXREFDES89_Test_Program Line_Following_Bot Line_Following_Bot_Pololu

MAXREFDES89# Component Page

max14871_shield.cpp@1:7e9b864ddacf, 2015-07-26 (annotated)

Committer:
j3
Date:
Sun Jul 26 22:19:50 2015 +0000
Revision:
1:7e9b864ddacf
Parent:
0:b5189f4ce1cb
Child:
2:9b50d36d69c8
updated period, duty cycle, and vref to floats

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 0:b5189f4ce1cb 1 /******************************************************************//**
j3 1:7e9b864ddacf 2 * @file max14871_shield.cpp
j3 0:b5189f4ce1cb 3 *
j3 0:b5189f4ce1cb 4 * @author Justin Jordan
j3 0:b5189f4ce1cb 5 *
j3 0:b5189f4ce1cb 6 * @version 0.0
j3 0:b5189f4ce1cb 7 *
j3 0:b5189f4ce1cb 8 * Started: 18JUL15
j3 0:b5189f4ce1cb 9 *
j3 0:b5189f4ce1cb 10 * Updated:
j3 0:b5189f4ce1cb 11 *
j3 0:b5189f4ce1cb 12 * @brief Source file for Max14871_Shield class
j3 0:b5189f4ce1cb 13 ***********************************************************************
j3 0:b5189f4ce1cb 14 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
j3 0:b5189f4ce1cb 15 *
j3 0:b5189f4ce1cb 16 * Permission is hereby granted, free of charge, to any person obtaining a
j3 0:b5189f4ce1cb 17 * copy of this software and associated documentation files (the "Software"),
j3 0:b5189f4ce1cb 18 * to deal in the Software without restriction, including without limitation
j3 0:b5189f4ce1cb 19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 0:b5189f4ce1cb 20 * and/or sell copies of the Software, and to permit persons to whom the
j3 0:b5189f4ce1cb 21 * Software is furnished to do so, subject to the following conditions:
j3 0:b5189f4ce1cb 22 *
j3 0:b5189f4ce1cb 23 * The above copyright notice and this permission notice shall be included
j3 0:b5189f4ce1cb 24 * in all copies or substantial portions of the Software.
j3 0:b5189f4ce1cb 25 *
j3 0:b5189f4ce1cb 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 0:b5189f4ce1cb 27 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 0:b5189f4ce1cb 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 0:b5189f4ce1cb 29 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 0:b5189f4ce1cb 30 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 0:b5189f4ce1cb 31 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 0:b5189f4ce1cb 32 * OTHER DEALINGS IN THE SOFTWARE.
j3 0:b5189f4ce1cb 33 *
j3 0:b5189f4ce1cb 34 * Except as contained in this notice, the name of Maxim Integrated
j3 0:b5189f4ce1cb 35 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 0:b5189f4ce1cb 36 * Products, Inc. Branding Policy.
j3 0:b5189f4ce1cb 37 *
j3 0:b5189f4ce1cb 38 * The mere transfer of this software does not imply any licenses
j3 0:b5189f4ce1cb 39 * of trade secrets, proprietary technology, copyrights, patents,
j3 0:b5189f4ce1cb 40 * trademarks, maskwork rights, or any other form of intellectual
j3 0:b5189f4ce1cb 41 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 0:b5189f4ce1cb 42 * ownership rights.
j3 0:b5189f4ce1cb 43 **********************************************************************/
j3 0:b5189f4ce1cb 44
j3 0:b5189f4ce1cb 45
j3 0:b5189f4ce1cb 46 #include "max14871_shield.h"
j3 0:b5189f4ce1cb 47
j3 1:7e9b864ddacf 48 #define MIN_PERIOD (0.00002) //50KHz
j3 0:b5189f4ce1cb 49
j3 0:b5189f4ce1cb 50 //Motor Driver control inputs
j3 0:b5189f4ce1cb 51 #define MD_EN (0x01)
j3 0:b5189f4ce1cb 52 #define MD_DIR (0x02)
j3 0:b5189f4ce1cb 53 #define MD_MODE0 (0x04)
j3 0:b5189f4ce1cb 54 #define MD_MODE1 (0x08)
j3 0:b5189f4ce1cb 55
j3 1:7e9b864ddacf 56 #define MAX_VREF (2.0)
j3 0:b5189f4ce1cb 57
j3 0:b5189f4ce1cb 58 //GPIO Expander Default Configurations
j3 0:b5189f4ce1cb 59 #define MAX7300_ALL_OUTPUTS (0x55)
j3 0:b5189f4ce1cb 60 #define MAX7300_ALL_INPUTS (0xFF)
j3 0:b5189f4ce1cb 61 #define MAX7300_OUTPUT_DEFAULT (0xBB)
j3 0:b5189f4ce1cb 62
j3 0:b5189f4ce1cb 63
j3 0:b5189f4ce1cb 64 //*********************************************************************
j3 0:b5189f4ce1cb 65 Max14871_Shield::Max14871_Shield(I2C *i2c_bus, bool default_config): _p_i2c(i2c_bus)
j3 0:b5189f4ce1cb 66 {
j3 0:b5189f4ce1cb 67 _i2c_owner = false;
j3 0:b5189f4ce1cb 68
j3 0:b5189f4ce1cb 69 if(default_config)
j3 0:b5189f4ce1cb 70 {
j3 0:b5189f4ce1cb 71 _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS0);
j3 0:b5189f4ce1cb 72 _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS0);
j3 0:b5189f4ce1cb 73 _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS1);
j3 0:b5189f4ce1cb 74
j3 0:b5189f4ce1cb 75 _p_pwm1 = new PwmOut(D4);
j3 0:b5189f4ce1cb 76 _p_pwm2 = new PwmOut(D5);
j3 0:b5189f4ce1cb 77 _p_pwm3 = new PwmOut(D9);
j3 0:b5189f4ce1cb 78 _p_pwm4 = new PwmOut(D10);
j3 0:b5189f4ce1cb 79 }
j3 0:b5189f4ce1cb 80 else
j3 0:b5189f4ce1cb 81 {
j3 0:b5189f4ce1cb 82 _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS1);
j3 0:b5189f4ce1cb 83 _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS2);
j3 0:b5189f4ce1cb 84 _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS3);
j3 0:b5189f4ce1cb 85
j3 0:b5189f4ce1cb 86 _p_pwm1 = new PwmOut(D3);
j3 0:b5189f4ce1cb 87 _p_pwm2 = new PwmOut(D6);
j3 0:b5189f4ce1cb 88 _p_pwm3 = new PwmOut(D8);
j3 0:b5189f4ce1cb 89 _p_pwm4 = new PwmOut(D11);
j3 0:b5189f4ce1cb 90 }
j3 0:b5189f4ce1cb 91
j3 0:b5189f4ce1cb 92 init_board();
j3 0:b5189f4ce1cb 93 }
j3 0:b5189f4ce1cb 94
j3 0:b5189f4ce1cb 95
j3 0:b5189f4ce1cb 96 //*********************************************************************
j3 0:b5189f4ce1cb 97 Max14871_Shield::Max14871_Shield(PinName sda, PinName scl, bool default_config)
j3 0:b5189f4ce1cb 98 {
j3 0:b5189f4ce1cb 99 _p_i2c = new I2C(sda, scl);
j3 0:b5189f4ce1cb 100 _i2c_owner = true;
j3 0:b5189f4ce1cb 101
j3 0:b5189f4ce1cb 102 if(default_config)
j3 0:b5189f4ce1cb 103 {
j3 0:b5189f4ce1cb 104 _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS0);
j3 0:b5189f4ce1cb 105 _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS0);
j3 0:b5189f4ce1cb 106 _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS1);
j3 0:b5189f4ce1cb 107
j3 0:b5189f4ce1cb 108 _p_pwm1 = new PwmOut(D4);
j3 0:b5189f4ce1cb 109 _p_pwm2 = new PwmOut(D5);
j3 0:b5189f4ce1cb 110 _p_pwm3 = new PwmOut(D9);
j3 0:b5189f4ce1cb 111 _p_pwm4 = new PwmOut(D10);
j3 0:b5189f4ce1cb 112 }
j3 0:b5189f4ce1cb 113 else
j3 0:b5189f4ce1cb 114 {
j3 0:b5189f4ce1cb 115 _p_io_expander = new Max7300(_p_i2c, Max7300::MAX7300_I2C_ADRS1);
j3 0:b5189f4ce1cb 116 _p_digi_pot1 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS2);
j3 0:b5189f4ce1cb 117 _p_digi_pot2 = new Max5387(_p_i2c, Max5387::MAX5387_I2C_ADRS3);
j3 0:b5189f4ce1cb 118
j3 0:b5189f4ce1cb 119 _p_pwm1 = new PwmOut(D3);
j3 0:b5189f4ce1cb 120 _p_pwm2 = new PwmOut(D6);
j3 0:b5189f4ce1cb 121 _p_pwm3 = new PwmOut(D8);
j3 0:b5189f4ce1cb 122 _p_pwm4 = new PwmOut(D11);
j3 0:b5189f4ce1cb 123 }
j3 0:b5189f4ce1cb 124
j3 0:b5189f4ce1cb 125 init_board();
j3 0:b5189f4ce1cb 126 }
j3 0:b5189f4ce1cb 127
j3 0:b5189f4ce1cb 128
j3 0:b5189f4ce1cb 129 //*********************************************************************
j3 0:b5189f4ce1cb 130 Max14871_Shield::~Max14871_Shield()
j3 0:b5189f4ce1cb 131 {
j3 0:b5189f4ce1cb 132 if(_i2c_owner)
j3 0:b5189f4ce1cb 133 {
j3 0:b5189f4ce1cb 134 delete _p_i2c;
j3 0:b5189f4ce1cb 135 }
j3 0:b5189f4ce1cb 136
j3 0:b5189f4ce1cb 137 delete _p_io_expander;
j3 0:b5189f4ce1cb 138 delete _p_digi_pot1;
j3 0:b5189f4ce1cb 139 delete _p_digi_pot2;
j3 0:b5189f4ce1cb 140 delete _p_pwm1;
j3 0:b5189f4ce1cb 141 delete _p_pwm2;
j3 0:b5189f4ce1cb 142 delete _p_pwm3;
j3 0:b5189f4ce1cb 143 delete _p_pwm4;
j3 0:b5189f4ce1cb 144 }
j3 0:b5189f4ce1cb 145
j3 0:b5189f4ce1cb 146
j3 0:b5189f4ce1cb 147 //*********************************************************************
j3 0:b5189f4ce1cb 148 int16_t Max14871_Shield::set_operating_mode(max14871_motor_driver_t md,
j3 0:b5189f4ce1cb 149 max14871_operating_mode_t mode)
j3 0:b5189f4ce1cb 150 {
j3 0:b5189f4ce1cb 151 int16_t result = 0;
j3 0:b5189f4ce1cb 152 int16_t port_data;
j3 0:b5189f4ce1cb 153
j3 0:b5189f4ce1cb 154 Max7300::max7300_port_number_t low_port;
j3 0:b5189f4ce1cb 155
j3 0:b5189f4ce1cb 156 //determine the low port of an 8 bit register to read/write
j3 0:b5189f4ce1cb 157 if(md < MD3)
j3 0:b5189f4ce1cb 158 {
j3 0:b5189f4ce1cb 159 low_port = Max7300::MAX7300_PORT_04;
j3 0:b5189f4ce1cb 160 }
j3 0:b5189f4ce1cb 161 else
j3 0:b5189f4ce1cb 162 {
j3 0:b5189f4ce1cb 163 low_port = Max7300::MAX7300_PORT_12;
j3 0:b5189f4ce1cb 164 }
j3 0:b5189f4ce1cb 165
j3 0:b5189f4ce1cb 166 //get current state of outputs
j3 0:b5189f4ce1cb 167 port_data = _p_io_expander->read_8_ports(low_port);
j3 0:b5189f4ce1cb 168
j3 0:b5189f4ce1cb 169 switch(mode)
j3 0:b5189f4ce1cb 170 {
j3 0:b5189f4ce1cb 171 //if(md % 2) for following cases, modify control bits
j3 0:b5189f4ce1cb 172 //of odd motor driver
j3 0:b5189f4ce1cb 173
j3 0:b5189f4ce1cb 174 case COAST:
j3 0:b5189f4ce1cb 175 if(md % 2)
j3 0:b5189f4ce1cb 176 {
j3 0:b5189f4ce1cb 177 port_data |= MD_EN;
j3 0:b5189f4ce1cb 178 }
j3 0:b5189f4ce1cb 179 else
j3 0:b5189f4ce1cb 180 {
j3 0:b5189f4ce1cb 181 port_data |= (MD_EN << 4);
j3 0:b5189f4ce1cb 182 }
j3 1:7e9b864ddacf 183
j3 1:7e9b864ddacf 184 set_pwm_duty_cycle(md, 0.0);
j3 0:b5189f4ce1cb 185 break;
j3 0:b5189f4ce1cb 186
j3 0:b5189f4ce1cb 187 case BRAKE:
j3 0:b5189f4ce1cb 188 if(md % 2)
j3 0:b5189f4ce1cb 189 {
j3 0:b5189f4ce1cb 190 port_data &= ~MD_EN;
j3 0:b5189f4ce1cb 191 }
j3 0:b5189f4ce1cb 192 else
j3 0:b5189f4ce1cb 193 {
j3 0:b5189f4ce1cb 194 port_data &= ~(MD_EN << 4);
j3 0:b5189f4ce1cb 195 }
j3 0:b5189f4ce1cb 196
j3 1:7e9b864ddacf 197 set_pwm_duty_cycle(md, 0.0);
j3 0:b5189f4ce1cb 198 break;
j3 0:b5189f4ce1cb 199
j3 0:b5189f4ce1cb 200 case REVERSE:
j3 0:b5189f4ce1cb 201 if(md % 2)
j3 0:b5189f4ce1cb 202 {
j3 0:b5189f4ce1cb 203 port_data &= ~(MD_EN + MD_DIR);
j3 0:b5189f4ce1cb 204 }
j3 0:b5189f4ce1cb 205 else
j3 0:b5189f4ce1cb 206 {
j3 0:b5189f4ce1cb 207 port_data &= ~((MD_EN + MD_DIR) << 4);
j3 0:b5189f4ce1cb 208 }
j3 0:b5189f4ce1cb 209 break;
j3 0:b5189f4ce1cb 210
j3 0:b5189f4ce1cb 211 case FORWARD:
j3 0:b5189f4ce1cb 212 if(md % 2)
j3 0:b5189f4ce1cb 213 {
j3 0:b5189f4ce1cb 214 port_data &= ~MD_EN;
j3 0:b5189f4ce1cb 215 port_data |= MD_DIR;
j3 0:b5189f4ce1cb 216 }
j3 0:b5189f4ce1cb 217 else
j3 0:b5189f4ce1cb 218 {
j3 0:b5189f4ce1cb 219 port_data &= ~(MD_EN << 4);
j3 0:b5189f4ce1cb 220 port_data |= (MD_DIR << 4);
j3 0:b5189f4ce1cb 221 }
j3 0:b5189f4ce1cb 222 break;
j3 0:b5189f4ce1cb 223
j3 0:b5189f4ce1cb 224 default:
j3 0:b5189f4ce1cb 225 result = -1;
j3 0:b5189f4ce1cb 226 break;
j3 0:b5189f4ce1cb 227 }
j3 0:b5189f4ce1cb 228
j3 0:b5189f4ce1cb 229 if(!result)
j3 0:b5189f4ce1cb 230 {
j3 0:b5189f4ce1cb 231 //write data back to port
j3 0:b5189f4ce1cb 232 result = _p_io_expander->write_8_ports(low_port, (uint8_t) port_data);
j3 0:b5189f4ce1cb 233 }
j3 0:b5189f4ce1cb 234
j3 0:b5189f4ce1cb 235 return result;
j3 0:b5189f4ce1cb 236 }
j3 0:b5189f4ce1cb 237
j3 0:b5189f4ce1cb 238
j3 0:b5189f4ce1cb 239 //*********************************************************************
j3 0:b5189f4ce1cb 240 int16_t Max14871_Shield::set_current_regulation_mode(max14871_motor_driver_t md,
j3 0:b5189f4ce1cb 241 max14871_current_regulation_mode_t mode,
j3 1:7e9b864ddacf 242 float vref)
j3 0:b5189f4ce1cb 243 {
j3 0:b5189f4ce1cb 244 int16_t result = 0;
j3 0:b5189f4ce1cb 245 int16_t port_data;
j3 1:7e9b864ddacf 246 uint8_t local_vref = 0;
j3 0:b5189f4ce1cb 247
j3 0:b5189f4ce1cb 248 Max7300::max7300_port_number_t low_port;
j3 0:b5189f4ce1cb 249 Max5387 *p_digi_pot;
j3 0:b5189f4ce1cb 250
j3 1:7e9b864ddacf 251 if(vref > MAX_VREF)
j3 1:7e9b864ddacf 252 {
j3 1:7e9b864ddacf 253 vref = MAX_VREF;
j3 1:7e9b864ddacf 254 }
j3 1:7e9b864ddacf 255 local_vref = ((uint8_t) ((vref * 255) / 3.3));
j3 1:7e9b864ddacf 256
j3 0:b5189f4ce1cb 257 //determine the low port of an 8 bit register to read/write
j3 1:7e9b864ddacf 258 //and digipot associated with motor driver
j3 0:b5189f4ce1cb 259 if(md < MD3)
j3 0:b5189f4ce1cb 260 {
j3 0:b5189f4ce1cb 261 low_port = Max7300::MAX7300_PORT_04;
j3 0:b5189f4ce1cb 262 p_digi_pot = _p_digi_pot1;
j3 0:b5189f4ce1cb 263 }
j3 0:b5189f4ce1cb 264 else
j3 0:b5189f4ce1cb 265 {
j3 0:b5189f4ce1cb 266 low_port = Max7300::MAX7300_PORT_12;
j3 0:b5189f4ce1cb 267 p_digi_pot = _p_digi_pot2;
j3 0:b5189f4ce1cb 268 }
j3 0:b5189f4ce1cb 269
j3 0:b5189f4ce1cb 270 //get current state of outputs
j3 0:b5189f4ce1cb 271 port_data = _p_io_expander->read_8_ports(low_port);
j3 0:b5189f4ce1cb 272
j3 0:b5189f4ce1cb 273 switch(mode)
j3 0:b5189f4ce1cb 274 {
j3 0:b5189f4ce1cb 275 case RIPPLE_25_INTERNAL_REF:
j3 0:b5189f4ce1cb 276 if(md % 2)
j3 0:b5189f4ce1cb 277 {
j3 0:b5189f4ce1cb 278 port_data &= ~MD_MODE0;
j3 0:b5189f4ce1cb 279 port_data |= MD_MODE1;
j3 0:b5189f4ce1cb 280 p_digi_pot->write_ch_A(0);
j3 0:b5189f4ce1cb 281 }
j3 0:b5189f4ce1cb 282 else
j3 0:b5189f4ce1cb 283 {
j3 0:b5189f4ce1cb 284 port_data &= ~(MD_MODE0 << 4);
j3 0:b5189f4ce1cb 285 port_data |= (MD_MODE1 << 4);
j3 0:b5189f4ce1cb 286 p_digi_pot->write_ch_B(0);
j3 0:b5189f4ce1cb 287 }
j3 0:b5189f4ce1cb 288 break;
j3 0:b5189f4ce1cb 289
j3 0:b5189f4ce1cb 290 case RIPPLE_25_EXTERNAL_REF:
j3 0:b5189f4ce1cb 291 if(md % 2)
j3 0:b5189f4ce1cb 292 {
j3 0:b5189f4ce1cb 293 port_data &= ~MD_MODE0;
j3 0:b5189f4ce1cb 294 port_data |= MD_MODE1;
j3 1:7e9b864ddacf 295 p_digi_pot->write_ch_A(local_vref);
j3 0:b5189f4ce1cb 296 }
j3 0:b5189f4ce1cb 297 else
j3 0:b5189f4ce1cb 298 {
j3 0:b5189f4ce1cb 299 port_data &= ~(MD_MODE0 << 4);
j3 0:b5189f4ce1cb 300 port_data |= (MD_MODE1 << 4);
j3 1:7e9b864ddacf 301 p_digi_pot->write_ch_B(local_vref);
j3 0:b5189f4ce1cb 302 }
j3 0:b5189f4ce1cb 303 break;
j3 0:b5189f4ce1cb 304
j3 0:b5189f4ce1cb 305 case TCOFF_FAST_INTERNAL_REF:
j3 0:b5189f4ce1cb 306 if(md % 2)
j3 0:b5189f4ce1cb 307 {
j3 0:b5189f4ce1cb 308 port_data |= (MD_MODE1 + MD_MODE0);
j3 0:b5189f4ce1cb 309 p_digi_pot->write_ch_A(0);
j3 0:b5189f4ce1cb 310 }
j3 0:b5189f4ce1cb 311 else
j3 0:b5189f4ce1cb 312 {
j3 0:b5189f4ce1cb 313 port_data |= ((MD_MODE1 + MD_MODE0) << 4);
j3 0:b5189f4ce1cb 314 p_digi_pot->write_ch_B(0);
j3 0:b5189f4ce1cb 315 }
j3 0:b5189f4ce1cb 316 break;
j3 0:b5189f4ce1cb 317
j3 0:b5189f4ce1cb 318 case TCOFF_SLOW_INTERNAL_REF:
j3 0:b5189f4ce1cb 319 if(md % 2)
j3 0:b5189f4ce1cb 320 {
j3 0:b5189f4ce1cb 321 port_data |= MD_MODE0;
j3 0:b5189f4ce1cb 322 port_data &= ~MD_MODE1;
j3 0:b5189f4ce1cb 323 p_digi_pot->write_ch_A(0);
j3 0:b5189f4ce1cb 324 }
j3 0:b5189f4ce1cb 325 else
j3 0:b5189f4ce1cb 326 {
j3 0:b5189f4ce1cb 327 port_data |= (MD_MODE0 << 4);
j3 0:b5189f4ce1cb 328 port_data &= ~(MD_MODE1 << 4);
j3 0:b5189f4ce1cb 329 p_digi_pot->write_ch_B(0);
j3 0:b5189f4ce1cb 330 }
j3 0:b5189f4ce1cb 331 break;
j3 0:b5189f4ce1cb 332
j3 0:b5189f4ce1cb 333 case TCOFF_FAST_EXTERNAL_REF:
j3 0:b5189f4ce1cb 334 if(md % 2)
j3 0:b5189f4ce1cb 335 {
j3 0:b5189f4ce1cb 336 port_data |= (MD_MODE1 + MD_MODE0);
j3 1:7e9b864ddacf 337 p_digi_pot->write_ch_A(local_vref);
j3 0:b5189f4ce1cb 338 }
j3 0:b5189f4ce1cb 339 else
j3 0:b5189f4ce1cb 340 {
j3 0:b5189f4ce1cb 341 port_data |= ((MD_MODE1 + MD_MODE0) << 4);
j3 1:7e9b864ddacf 342 p_digi_pot->write_ch_B(local_vref);
j3 0:b5189f4ce1cb 343 }
j3 0:b5189f4ce1cb 344 break;
j3 0:b5189f4ce1cb 345
j3 0:b5189f4ce1cb 346 case TCOFF_SLOW_EXTERNAL_REF:
j3 0:b5189f4ce1cb 347 if(md % 2)
j3 0:b5189f4ce1cb 348 {
j3 0:b5189f4ce1cb 349 port_data |= MD_MODE0;
j3 0:b5189f4ce1cb 350 port_data &= ~MD_MODE1;
j3 1:7e9b864ddacf 351 p_digi_pot->write_ch_A(local_vref);
j3 0:b5189f4ce1cb 352 }
j3 0:b5189f4ce1cb 353 else
j3 0:b5189f4ce1cb 354 {
j3 0:b5189f4ce1cb 355 port_data |= (MD_MODE0 << 4);
j3 0:b5189f4ce1cb 356 port_data &= ~(MD_MODE1 << 4);
j3 1:7e9b864ddacf 357 p_digi_pot->write_ch_B(local_vref);
j3 0:b5189f4ce1cb 358 }
j3 0:b5189f4ce1cb 359 break;
j3 0:b5189f4ce1cb 360
j3 0:b5189f4ce1cb 361 default:
j3 0:b5189f4ce1cb 362 result = -1;
j3 0:b5189f4ce1cb 363 break;
j3 0:b5189f4ce1cb 364 }
j3 0:b5189f4ce1cb 365
j3 0:b5189f4ce1cb 366 if(!result)
j3 0:b5189f4ce1cb 367 {
j3 0:b5189f4ce1cb 368 //write data back to port
j3 0:b5189f4ce1cb 369 result = _p_io_expander->write_8_ports(low_port, (uint8_t) port_data);
j3 0:b5189f4ce1cb 370 }
j3 0:b5189f4ce1cb 371
j3 0:b5189f4ce1cb 372 return result;
j3 0:b5189f4ce1cb 373 }
j3 0:b5189f4ce1cb 374
j3 0:b5189f4ce1cb 375
j3 0:b5189f4ce1cb 376 //*********************************************************************
j3 1:7e9b864ddacf 377 int16_t Max14871_Shield::set_pwm_period(max14871_motor_driver_t md, float period)
j3 0:b5189f4ce1cb 378 {
j3 0:b5189f4ce1cb 379 int16_t result = 0;
j3 0:b5189f4ce1cb 380
j3 0:b5189f4ce1cb 381 if(period < MIN_PERIOD)
j3 0:b5189f4ce1cb 382 {
j3 0:b5189f4ce1cb 383 result = -1;
j3 0:b5189f4ce1cb 384 }
j3 0:b5189f4ce1cb 385 else
j3 0:b5189f4ce1cb 386 {
j3 0:b5189f4ce1cb 387 switch(md)
j3 0:b5189f4ce1cb 388 {
j3 0:b5189f4ce1cb 389 case MD1:
j3 1:7e9b864ddacf 390 _p_pwm1->period(period);
j3 0:b5189f4ce1cb 391 break;
j3 0:b5189f4ce1cb 392
j3 0:b5189f4ce1cb 393 case MD2:
j3 1:7e9b864ddacf 394 _p_pwm2->period(period);
j3 0:b5189f4ce1cb 395 break;
j3 0:b5189f4ce1cb 396
j3 0:b5189f4ce1cb 397 case MD3:
j3 1:7e9b864ddacf 398 _p_pwm3->period(period);
j3 0:b5189f4ce1cb 399 break;
j3 0:b5189f4ce1cb 400
j3 0:b5189f4ce1cb 401 case MD4:
j3 1:7e9b864ddacf 402 _p_pwm4->period(period);
j3 0:b5189f4ce1cb 403 break;
j3 0:b5189f4ce1cb 404
j3 0:b5189f4ce1cb 405 default:
j3 0:b5189f4ce1cb 406 result = -1;
j3 0:b5189f4ce1cb 407 break;
j3 0:b5189f4ce1cb 408 }
j3 0:b5189f4ce1cb 409 }
j3 0:b5189f4ce1cb 410
j3 0:b5189f4ce1cb 411 return result;
j3 0:b5189f4ce1cb 412 }
j3 0:b5189f4ce1cb 413
j3 0:b5189f4ce1cb 414
j3 0:b5189f4ce1cb 415 //*********************************************************************
j3 1:7e9b864ddacf 416 int16_t Max14871_Shield::set_pwm_duty_cycle(max14871_motor_driver_t md, float duty_cycle)
j3 0:b5189f4ce1cb 417 {
j3 0:b5189f4ce1cb 418 int16_t result = 0;
j3 0:b5189f4ce1cb 419
j3 0:b5189f4ce1cb 420 switch(md)
j3 0:b5189f4ce1cb 421 {
j3 0:b5189f4ce1cb 422 case MD1:
j3 1:7e9b864ddacf 423 _p_pwm1->write(duty_cycle);
j3 0:b5189f4ce1cb 424 break;
j3 0:b5189f4ce1cb 425
j3 0:b5189f4ce1cb 426 case MD2:
j3 1:7e9b864ddacf 427 _p_pwm2->write(duty_cycle);
j3 0:b5189f4ce1cb 428 break;
j3 0:b5189f4ce1cb 429
j3 0:b5189f4ce1cb 430 case MD3:
j3 1:7e9b864ddacf 431 _p_pwm3->write(duty_cycle);
j3 0:b5189f4ce1cb 432 break;
j3 0:b5189f4ce1cb 433
j3 0:b5189f4ce1cb 434 case MD4:
j3 1:7e9b864ddacf 435 _p_pwm4->write(duty_cycle);
j3 0:b5189f4ce1cb 436 break;
j3 0:b5189f4ce1cb 437
j3 0:b5189f4ce1cb 438 default:
j3 0:b5189f4ce1cb 439 result = -1;
j3 0:b5189f4ce1cb 440 break;
j3 0:b5189f4ce1cb 441 }
j3 0:b5189f4ce1cb 442
j3 0:b5189f4ce1cb 443 return result;
j3 0:b5189f4ce1cb 444 }
j3 0:b5189f4ce1cb 445
j3 0:b5189f4ce1cb 446
j3 0:b5189f4ce1cb 447 //*********************************************************************
j3 0:b5189f4ce1cb 448 void Max14871_Shield::init_board(void)
j3 0:b5189f4ce1cb 449 {
j3 0:b5189f4ce1cb 450 //configure these ports as outputs
j3 0:b5189f4ce1cb 451 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_04, MAX7300_ALL_OUTPUTS);
j3 0:b5189f4ce1cb 452 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_08, MAX7300_ALL_OUTPUTS);
j3 0:b5189f4ce1cb 453 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_12, MAX7300_ALL_OUTPUTS);
j3 0:b5189f4ce1cb 454 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_16, MAX7300_ALL_OUTPUTS);
j3 0:b5189f4ce1cb 455
j3 0:b5189f4ce1cb 456 //Set /EN and DIR pin of all motor drivers and set mode pin
j3 0:b5189f4ce1cb 457 //of all motor drivers to 0.75V
j3 0:b5189f4ce1cb 458 _p_io_expander->write_8_ports(Max7300::MAX7300_PORT_04, MAX7300_OUTPUT_DEFAULT);
j3 0:b5189f4ce1cb 459 _p_io_expander->write_8_ports(Max7300::MAX7300_PORT_12, MAX7300_OUTPUT_DEFAULT);
j3 0:b5189f4ce1cb 460
j3 0:b5189f4ce1cb 461 //configure these ports as inputs w/pull-up,
j3 0:b5189f4ce1cb 462 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_20, MAX7300_ALL_INPUTS);
j3 0:b5189f4ce1cb 463 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_24, MAX7300_ALL_INPUTS);
j3 0:b5189f4ce1cb 464 _p_io_expander->config_4_ports(Max7300::MAX7300_PORT_28, MAX7300_ALL_INPUTS);
j3 0:b5189f4ce1cb 465
j3 0:b5189f4ce1cb 466 //config port 31 as output for interrupt
j3 0:b5189f4ce1cb 467 _p_io_expander->config_port(Max7300::MAX7300_PORT_31, Max7300::MAX7300_PORT_OUTPUT);
j3 0:b5189f4ce1cb 468
j3 0:b5189f4ce1cb 469 _p_io_expander->enable_transition_detection();
j3 0:b5189f4ce1cb 470 _p_io_expander->enable_ports();
j3 0:b5189f4ce1cb 471
j3 1:7e9b864ddacf 472 //set Vref pin of all motor drivers to 2.0V
j3 0:b5189f4ce1cb 473 _p_digi_pot1->write_ch_AB(MAX_VREF);
j3 0:b5189f4ce1cb 474 _p_digi_pot2->write_ch_AB(MAX_VREF);
j3 0:b5189f4ce1cb 475
j3 0:b5189f4ce1cb 476 //set switching frequency of all motor drivers to 50KHz
j3 1:7e9b864ddacf 477 _p_pwm1->period(MIN_PERIOD);
j3 1:7e9b864ddacf 478 _p_pwm2->period(MIN_PERIOD);
j3 1:7e9b864ddacf 479 _p_pwm3->period(MIN_PERIOD);
j3 1:7e9b864ddacf 480 _p_pwm4->period(MIN_PERIOD);
j3 0:b5189f4ce1cb 481 }