Library for the master controller
Dependents: Test_Controller_Master AEB
Diff: Controller_Master.h
- Revision:
- 3:66d07e7a134a
- Parent:
- 2:d114feef8f3b
diff -r d114feef8f3b -r 66d07e7a134a Controller_Master.h --- a/Controller_Master.h Wed Jul 06 08:22:31 2016 +0000 +++ b/Controller_Master.h Sun Jul 10 13:17:48 2016 +0000 @@ -7,25 +7,52 @@ * * Code generated for Simulink model 'Controller_Master'. * - * Model version : 1.6 + * Model version : 1.7 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016 - * C/C++ source code generated on : Wed Jul 06 10:20:25 2016 + * C/C++ source code generated on : Sun Jul 10 14:56:51 2016 * * Target selection: ert.tlc - * Embedded hardware selection: NXP->Cortex-M4 + * Embedded hardware selection: ARM Compatible->ARM Cortex * Code generation objectives: Unspecified * Validation result: Not run */ #ifndef RTW_HEADER_Controller_Master_h_ #define RTW_HEADER_Controller_Master_h_ +#include "rtwtypes.h" +#include <math.h> #include <string.h> +#include <stddef.h> #ifndef Controller_Master_COMMON_INCLUDES_ # define Controller_Master_COMMON_INCLUDES_ #include "rtwtypes.h" #endif /* Controller_Master_COMMON_INCLUDES_ */ /* Macros for accessing real-time model data structure */ +#ifndef rtmGetBlockIO +# define rtmGetBlockIO(rtm) ((rtm)->ModelData.blockIO) +#endif + +#ifndef rtmSetBlockIO +# define rtmSetBlockIO(rtm, val) ((rtm)->ModelData.blockIO = (val)) +#endif + +#ifndef rtmGetDefaultParam +# define rtmGetDefaultParam(rtm) ((rtm)->ModelData.defaultParam) +#endif + +#ifndef rtmSetDefaultParam +# define rtmSetDefaultParam(rtm, val) ((rtm)->ModelData.defaultParam = (val)) +#endif + +#ifndef rtmGetRootDWork +# define rtmGetRootDWork(rtm) ((rtm)->ModelData.dwork) +#endif + +#ifndef rtmSetRootDWork +# define rtmSetRootDWork(rtm, val) ((rtm)->ModelData.dwork = (val)) +#endif + #ifndef rtmGetErrorStatus # define rtmGetErrorStatus(rtm) ((rtm)->errorStatus) #endif @@ -56,9 +83,19 @@ boolean_T En; /* '<S1>/AEB_QA' */ } DW_Controller_Master_T; +/* Parameters (auto storage) */ +struct P_Controller_Master_T_ { + uint8_T Memory_X0; /* Computed Parameter: Memory_X0 + * Referenced by: '<S1>/Memory' + */ +}; + +/* Parameters (auto storage) */ +typedef struct P_Controller_Master_T_ P_Controller_Master_T; + /* Real-time Model Data Structure */ struct tag_RTM_Controller_Master_T { - const char_T * volatile errorStatus; + const char_T *errorStatus; /* * ModelData: @@ -67,6 +104,7 @@ */ struct { B_Controller_Master_T *blockIO; + P_Controller_Master_T *defaultParam; DW_Controller_Master_T *dwork; } ModelData; }; @@ -100,15 +138,15 @@ * MATLAB hilite_system command to trace the generated code back * to the parent model. For example, * - * hilite_system('Controller_Model_07_05_v01/Controller/Controller_Master') - opens subsystem Controller_Model_07_05_v01/Controller/Controller_Master - * hilite_system('Controller_Model_07_05_v01/Controller/Controller_Master/Kp') - opens and selects block Kp + * hilite_system('Controller_Model_07_10_v01/Controller/Controller_Master') - opens subsystem Controller_Model_07_10_v01/Controller/Controller_Master + * hilite_system('Controller_Model_07_10_v01/Controller/Controller_Master/Kp') - opens and selects block Kp * * Here is the system hierarchy for this model * - * '<Root>' : 'Controller_Model_07_05_v01/Controller' - * '<S1>' : 'Controller_Model_07_05_v01/Controller/Controller_Master' - * '<S2>' : 'Controller_Model_07_05_v01/Controller/Controller_Master/AEB_QA' - * '<S3>' : 'Controller_Model_07_05_v01/Controller/Controller_Master/select_command' + * '<Root>' : 'Controller_Model_07_10_v01/Controller' + * '<S1>' : 'Controller_Model_07_10_v01/Controller/Controller_Master' + * '<S2>' : 'Controller_Model_07_10_v01/Controller/Controller_Master/AEB_QA' + * '<S3>' : 'Controller_Model_07_10_v01/Controller/Controller_Master/select_command' */ #endif /* RTW_HEADER_Controller_Master_h_ */