KDDI Fx0 hackathon / Mbed 2 deprecated MurataTypeYD_Websocket_Sample_full

Websocket_Sample for MurataTypeYD

Dependencies:   mbed picojson

PowerControl/PowerControl.h@1:b5ac0f971f43, 2015-03-12 (annotated)

Committer:
komoritan
Date:
Thu Mar 12 12:15:46 2015 +0000
Revision:
1:b5ac0f971f43
Parent:
0:14bd24b5a77f 
Fixed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
komoritan 0:14bd24b5a77f 1 /* mbed PowerControl Library
komoritan 0:14bd24b5a77f 2 * Copyright (c) 2010 Michael Wei
komoritan 0:14bd24b5a77f 3 */
komoritan 0:14bd24b5a77f 4
komoritan 0:14bd24b5a77f 5 #ifndef MBED_POWERCONTROL_H
komoritan 0:14bd24b5a77f 6 #define MBED_POWERCONTROL_H
komoritan 0:14bd24b5a77f 7
komoritan 0:14bd24b5a77f 8 //shouldn't have to include, but fixes weird problems with defines
komoritan 0:14bd24b5a77f 9 #include "TARGET_LPC1768/LPC17xx.h"
komoritan 0:14bd24b5a77f 10
komoritan 0:14bd24b5a77f 11 //System Control Register
komoritan 0:14bd24b5a77f 12 // bit 0: Reserved
komoritan 0:14bd24b5a77f 13 // bit 1: Sleep on Exit
komoritan 0:14bd24b5a77f 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
komoritan 0:14bd24b5a77f 15 // bit 2: Deep Sleep
komoritan 0:14bd24b5a77f 16 #define LPC1768_SCR_SLEEPDEEP 0x4
komoritan 0:14bd24b5a77f 17 // bit 3: Resereved
komoritan 0:14bd24b5a77f 18 // bit 4: Send on Pending
komoritan 0:14bd24b5a77f 19 #define LPC1768_SCR_SEVONPEND 0x10
komoritan 0:14bd24b5a77f 20 // bit 5-31: Reserved
komoritan 0:14bd24b5a77f 21
komoritan 0:14bd24b5a77f 22 //Power Control Register
komoritan 0:14bd24b5a77f 23 // bit 0: Power mode control bit 0 (power-down mode)
komoritan 0:14bd24b5a77f 24 #define LPC1768_PCON_PM0 0x1
komoritan 0:14bd24b5a77f 25 // bit 1: Power mode control bit 1 (deep power-down mode)
komoritan 0:14bd24b5a77f 26 #define LPC1768_PCON_PM1 0x2
komoritan 0:14bd24b5a77f 27 // bit 2: Brown-out reduced power mode
komoritan 0:14bd24b5a77f 28 #define LPC1768_PCON_BODRPM 0x4
komoritan 0:14bd24b5a77f 29 // bit 3: Brown-out global disable
komoritan 0:14bd24b5a77f 30 #define LPC1768_PCON_BOGD 0x8
komoritan 0:14bd24b5a77f 31 // bit 4: Brown-out reset disable
komoritan 0:14bd24b5a77f 32 #define LPC1768_PCON_BORD 0x10
komoritan 0:14bd24b5a77f 33 // bit 5-7 : Reserved
komoritan 0:14bd24b5a77f 34 // bit 8: Sleep Mode Entry Flag
komoritan 0:14bd24b5a77f 35 #define LPC1768_PCON_SMFLAG 0x100
komoritan 0:14bd24b5a77f 36 // bit 9: Deep Sleep Entry Flag
komoritan 0:14bd24b5a77f 37 #define LPC1768_PCON_DSFLAG 0x200
komoritan 0:14bd24b5a77f 38 // bit 10: Power Down Entry Flag
komoritan 0:14bd24b5a77f 39 #define LPC1768_PCON_PDFLAG 0x400
komoritan 0:14bd24b5a77f 40 // bit 11: Deep Power Down Entry Flag
komoritan 0:14bd24b5a77f 41 #define LPC1768_PCON_DPDFLAG 0x800
komoritan 0:14bd24b5a77f 42 // bit 12-31: Reserved
komoritan 0:14bd24b5a77f 43
komoritan 0:14bd24b5a77f 44 //"Sleep Mode" (WFI).
komoritan 0:14bd24b5a77f 45 inline void Sleep(void)
komoritan 0:14bd24b5a77f 46 {
komoritan 0:14bd24b5a77f 47 __WFI();
komoritan 0:14bd24b5a77f 48 }
komoritan 0:14bd24b5a77f 49
komoritan 0:14bd24b5a77f 50 //"Deep Sleep" Mode
komoritan 0:14bd24b5a77f 51 inline void DeepSleep(void)
komoritan 0:14bd24b5a77f 52 {
komoritan 0:14bd24b5a77f 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
komoritan 0:14bd24b5a77f 54 __WFI();
komoritan 0:14bd24b5a77f 55 }
komoritan 0:14bd24b5a77f 56
komoritan 0:14bd24b5a77f 57 //"Power-Down" Mode
komoritan 0:14bd24b5a77f 58 inline void PowerDown(void)
komoritan 0:14bd24b5a77f 59 {
komoritan 0:14bd24b5a77f 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
komoritan 0:14bd24b5a77f 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
komoritan 0:14bd24b5a77f 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
komoritan 0:14bd24b5a77f 63 __WFI();
komoritan 0:14bd24b5a77f 64 //reset back to normal
komoritan 0:14bd24b5a77f 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
komoritan 0:14bd24b5a77f 66 }
komoritan 0:14bd24b5a77f 67
komoritan 0:14bd24b5a77f 68 //"Deep Power-Down" Mode
komoritan 0:14bd24b5a77f 69 inline void DeepPowerDown(void)
komoritan 0:14bd24b5a77f 70 {
komoritan 0:14bd24b5a77f 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
komoritan 0:14bd24b5a77f 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
komoritan 0:14bd24b5a77f 73 __WFI();
komoritan 0:14bd24b5a77f 74 //reset back to normal
komoritan 0:14bd24b5a77f 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
komoritan 0:14bd24b5a77f 76 }
komoritan 0:14bd24b5a77f 77
komoritan 0:14bd24b5a77f 78 //shut down BOD during power-down/deep sleep
komoritan 0:14bd24b5a77f 79 inline void BrownOut_ReducedPowerMode_Enable(void)
komoritan 0:14bd24b5a77f 80 {
komoritan 0:14bd24b5a77f 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
komoritan 0:14bd24b5a77f 82 }
komoritan 0:14bd24b5a77f 83
komoritan 0:14bd24b5a77f 84 //turn on BOD during power-down/deep sleep
komoritan 0:14bd24b5a77f 85 inline void BrownOut_ReducedPowerMode_Disable(void)
komoritan 0:14bd24b5a77f 86 {
komoritan 0:14bd24b5a77f 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
komoritan 0:14bd24b5a77f 88 }
komoritan 0:14bd24b5a77f 89
komoritan 0:14bd24b5a77f 90 //turn off brown out circutry
komoritan 0:14bd24b5a77f 91 inline void BrownOut_Global_Disable(void)
komoritan 0:14bd24b5a77f 92 {
komoritan 0:14bd24b5a77f 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
komoritan 0:14bd24b5a77f 94 }
komoritan 0:14bd24b5a77f 95
komoritan 0:14bd24b5a77f 96 //turn on brown out circutry
komoritan 0:14bd24b5a77f 97 inline void BrownOut_Global_Enable(void)
komoritan 0:14bd24b5a77f 98 {
komoritan 0:14bd24b5a77f 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
komoritan 0:14bd24b5a77f 100 }
komoritan 0:14bd24b5a77f 101
komoritan 0:14bd24b5a77f 102 //turn off brown out reset circutry
komoritan 0:14bd24b5a77f 103 inline void BrownOut_Reset_Disable(void)
komoritan 0:14bd24b5a77f 104 {
komoritan 0:14bd24b5a77f 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
komoritan 0:14bd24b5a77f 106 }
komoritan 0:14bd24b5a77f 107
komoritan 0:14bd24b5a77f 108 //turn on brown outreset circutry
komoritan 0:14bd24b5a77f 109 inline void BrownOut_Reset_Enable(void)
komoritan 0:14bd24b5a77f 110 {
komoritan 0:14bd24b5a77f 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
komoritan 0:14bd24b5a77f 112 }
komoritan 0:14bd24b5a77f 113 //Peripheral Control Register
komoritan 0:14bd24b5a77f 114 // bit 0: Reserved
komoritan 0:14bd24b5a77f 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
komoritan 0:14bd24b5a77f 116 #define LPC1768_PCONP_PCTIM0 0x2
komoritan 0:14bd24b5a77f 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
komoritan 0:14bd24b5a77f 118 #define LPC1768_PCONP_PCTIM1 0x4
komoritan 0:14bd24b5a77f 119 // bit 3: PCUART0: UART 0 power/clock enable
komoritan 0:14bd24b5a77f 120 #define LPC1768_PCONP_PCUART0 0x8
komoritan 0:14bd24b5a77f 121 // bit 4: PCUART1: UART 1 power/clock enable
komoritan 0:14bd24b5a77f 122 #define LPC1768_PCONP_PCUART1 0x10
komoritan 0:14bd24b5a77f 123 // bit 5: Reserved
komoritan 0:14bd24b5a77f 124 // bit 6: PCPWM1: PWM 1 power/clock enable
komoritan 0:14bd24b5a77f 125 #define LPC1768_PCONP_PCPWM1 0x40
komoritan 0:14bd24b5a77f 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
komoritan 0:14bd24b5a77f 127 #define LPC1768_PCONP_PCI2C0 0x80
komoritan 0:14bd24b5a77f 128 // bit 8: PCSPI: SPI interface power/clock enable
komoritan 0:14bd24b5a77f 129 #define LPC1768_PCONP_PCSPI 0x100
komoritan 0:14bd24b5a77f 130 // bit 9: PCRTC: RTC power/clock enable
komoritan 0:14bd24b5a77f 131 #define LPC1768_PCONP_PCRTC 0x200
komoritan 0:14bd24b5a77f 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
komoritan 0:14bd24b5a77f 133 #define LPC1768_PCONP_PCSSP1 0x400
komoritan 0:14bd24b5a77f 134 // bit 11: Reserved
komoritan 0:14bd24b5a77f 135 // bit 12: PCADC: A/D converter power/clock enable
komoritan 0:14bd24b5a77f 136 #define LPC1768_PCONP_PCADC 0x1000
komoritan 0:14bd24b5a77f 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
komoritan 0:14bd24b5a77f 138 #define LPC1768_PCONP_PCCAN1 0x2000
komoritan 0:14bd24b5a77f 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
komoritan 0:14bd24b5a77f 140 #define LPC1768_PCONP_PCCAN2 0x4000
komoritan 0:14bd24b5a77f 141 // bit 15: PCGPIO: GPIOs power/clock enable
komoritan 0:14bd24b5a77f 142 #define LPC1768_PCONP_PCGPIO 0x8000
komoritan 0:14bd24b5a77f 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
komoritan 0:14bd24b5a77f 144 #define LPC1768_PCONP_PCRIT 0x10000
komoritan 0:14bd24b5a77f 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
komoritan 0:14bd24b5a77f 146 #define LPC1768_PCONP_PCMCPWM 0x20000
komoritan 0:14bd24b5a77f 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
komoritan 0:14bd24b5a77f 148 #define LPC1768_PCONP_PCQEI 0x40000
komoritan 0:14bd24b5a77f 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
komoritan 0:14bd24b5a77f 150 #define LPC1768_PCONP_PCI2C1 0x80000
komoritan 0:14bd24b5a77f 151 // bit 20: Reserved
komoritan 0:14bd24b5a77f 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
komoritan 0:14bd24b5a77f 153 #define LPC1768_PCONP_PCSSP0 0x200000
komoritan 0:14bd24b5a77f 154 // bit 22: PCTIM2: Timer 2 power/clock enable
komoritan 0:14bd24b5a77f 155 #define LPC1768_PCONP_PCTIM2 0x400000
komoritan 0:14bd24b5a77f 156 // bit 23: PCTIM3: Timer 3 power/clock enable
komoritan 0:14bd24b5a77f 157 #define LPC1768_PCONP_PCQTIM3 0x800000
komoritan 0:14bd24b5a77f 158 // bit 24: PCUART2: UART 2 power/clock enable
komoritan 0:14bd24b5a77f 159 #define LPC1768_PCONP_PCUART2 0x1000000
komoritan 0:14bd24b5a77f 160 // bit 25: PCUART3: UART 3 power/clock enable
komoritan 0:14bd24b5a77f 161 #define LPC1768_PCONP_PCUART3 0x2000000
komoritan 0:14bd24b5a77f 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
komoritan 0:14bd24b5a77f 163 #define LPC1768_PCONP_PCI2C2 0x4000000
komoritan 0:14bd24b5a77f 164 // bit 27: PCI2S: I2S interface power/clock enable
komoritan 0:14bd24b5a77f 165 #define LPC1768_PCONP_PCI2S 0x8000000
komoritan 0:14bd24b5a77f 166 // bit 28: Reserved
komoritan 0:14bd24b5a77f 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
komoritan 0:14bd24b5a77f 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
komoritan 0:14bd24b5a77f 169 // bit 30: PCENET: Ethernet block power/clock enable
komoritan 0:14bd24b5a77f 170 #define LPC1768_PCONP_PCENET 0x40000000
komoritan 0:14bd24b5a77f 171 // bit 31: PCUSB: USB interface power/clock enable
komoritan 0:14bd24b5a77f 172 #define LPC1768_PCONP_PCUSB 0x80000000
komoritan 0:14bd24b5a77f 173
komoritan 0:14bd24b5a77f 174 //Powers Up specified Peripheral(s)
komoritan 0:14bd24b5a77f 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
komoritan 0:14bd24b5a77f 176 {
komoritan 0:14bd24b5a77f 177 return LPC_SC->PCONP |= bitMask;
komoritan 0:14bd24b5a77f 178 }
komoritan 0:14bd24b5a77f 179
komoritan 0:14bd24b5a77f 180 //Powers Down specified Peripheral(s)
komoritan 0:14bd24b5a77f 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
komoritan 0:14bd24b5a77f 182 {
komoritan 0:14bd24b5a77f 183 return LPC_SC->PCONP &= ~bitMask;
komoritan 0:14bd24b5a77f 184 }
komoritan 0:14bd24b5a77f 185
komoritan 0:14bd24b5a77f 186 //returns if the peripheral is on or off
komoritan 0:14bd24b5a77f 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
komoritan 0:14bd24b5a77f 188 {
komoritan 0:14bd24b5a77f 189 return (LPC_SC->PCONP & peripheral) ? true : false;
komoritan 0:14bd24b5a77f 190 }
komoritan 0:14bd24b5a77f 191
komoritan 0:14bd24b5a77f 192 #endif