KDDI Fx0 hackathon / Mbed 2 deprecated MurataTypeYD_Websocket_Sample_full

Websocket_Sample for MurataTypeYD

Dependencies:   mbed picojson

PowerControl/EthernetPowerControl.cpp@1:b5ac0f971f43, 2015-03-12 (annotated)

Committer:
komoritan
Date:
Thu Mar 12 12:15:46 2015 +0000
Revision:
1:b5ac0f971f43
Parent:
0:14bd24b5a77f 
Fixed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
komoritan 0:14bd24b5a77f 1 #include "EthernetPowerControl.h"
komoritan 0:14bd24b5a77f 2
komoritan 0:14bd24b5a77f 3 static void write_PHY (unsigned int PhyReg, unsigned short Value) {
komoritan 0:14bd24b5a77f 4 /* Write a data 'Value' to PHY register 'PhyReg'. */
komoritan 0:14bd24b5a77f 5 unsigned int tout;
komoritan 0:14bd24b5a77f 6 /* Hardware MII Management for LPC176x devices. */
komoritan 0:14bd24b5a77f 7 LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
komoritan 0:14bd24b5a77f 8 LPC_EMAC->MWTD = Value;
komoritan 0:14bd24b5a77f 9
komoritan 0:14bd24b5a77f 10 /* Wait utill operation completed */
komoritan 0:14bd24b5a77f 11 for (tout = 0; tout < MII_WR_TOUT; tout++) {
komoritan 0:14bd24b5a77f 12 if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
komoritan 0:14bd24b5a77f 13 break;
komoritan 0:14bd24b5a77f 14 }
komoritan 0:14bd24b5a77f 15 }
komoritan 0:14bd24b5a77f 16 }
komoritan 0:14bd24b5a77f 17
komoritan 0:14bd24b5a77f 18 static unsigned short read_PHY (unsigned int PhyReg) {
komoritan 0:14bd24b5a77f 19 /* Read a PHY register 'PhyReg'. */
komoritan 0:14bd24b5a77f 20 unsigned int tout, val;
komoritan 0:14bd24b5a77f 21
komoritan 0:14bd24b5a77f 22 LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
komoritan 0:14bd24b5a77f 23 LPC_EMAC->MCMD = MCMD_READ;
komoritan 0:14bd24b5a77f 24
komoritan 0:14bd24b5a77f 25 /* Wait until operation completed */
komoritan 0:14bd24b5a77f 26 for (tout = 0; tout < MII_RD_TOUT; tout++) {
komoritan 0:14bd24b5a77f 27 if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
komoritan 0:14bd24b5a77f 28 break;
komoritan 0:14bd24b5a77f 29 }
komoritan 0:14bd24b5a77f 30 }
komoritan 0:14bd24b5a77f 31 LPC_EMAC->MCMD = 0;
komoritan 0:14bd24b5a77f 32 val = LPC_EMAC->MRDD;
komoritan 0:14bd24b5a77f 33
komoritan 0:14bd24b5a77f 34 return (val);
komoritan 0:14bd24b5a77f 35 }
komoritan 0:14bd24b5a77f 36
komoritan 0:14bd24b5a77f 37 void EMAC_Init()
komoritan 0:14bd24b5a77f 38 {
komoritan 0:14bd24b5a77f 39 unsigned int tout,regv;
komoritan 0:14bd24b5a77f 40 /* Power Up the EMAC controller. */
komoritan 0:14bd24b5a77f 41 Peripheral_PowerUp(LPC1768_PCONP_PCENET);
komoritan 0:14bd24b5a77f 42
komoritan 0:14bd24b5a77f 43 LPC_PINCON->PINSEL2 = 0x50150105;
komoritan 0:14bd24b5a77f 44 LPC_PINCON->PINSEL3 &= ~0x0000000F;
komoritan 0:14bd24b5a77f 45 LPC_PINCON->PINSEL3 |= 0x00000005;
komoritan 0:14bd24b5a77f 46
komoritan 0:14bd24b5a77f 47 /* Reset all EMAC internal modules. */
komoritan 0:14bd24b5a77f 48 LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
komoritan 0:14bd24b5a77f 49 MAC1_SIM_RES | MAC1_SOFT_RES;
komoritan 0:14bd24b5a77f 50 LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
komoritan 0:14bd24b5a77f 51
komoritan 0:14bd24b5a77f 52 /* A short delay after reset. */
komoritan 0:14bd24b5a77f 53 for (tout = 100; tout; tout--);
komoritan 0:14bd24b5a77f 54
komoritan 0:14bd24b5a77f 55 /* Initialize MAC control registers. */
komoritan 0:14bd24b5a77f 56 LPC_EMAC->MAC1 = MAC1_PASS_ALL;
komoritan 0:14bd24b5a77f 57 LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
komoritan 0:14bd24b5a77f 58 LPC_EMAC->MAXF = ETH_MAX_FLEN;
komoritan 0:14bd24b5a77f 59 LPC_EMAC->CLRT = CLRT_DEF;
komoritan 0:14bd24b5a77f 60 LPC_EMAC->IPGR = IPGR_DEF;
komoritan 0:14bd24b5a77f 61
komoritan 0:14bd24b5a77f 62 /* Enable Reduced MII interface. */
komoritan 0:14bd24b5a77f 63 LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
komoritan 0:14bd24b5a77f 64
komoritan 0:14bd24b5a77f 65 /* Reset Reduced MII Logic. */
komoritan 0:14bd24b5a77f 66 LPC_EMAC->SUPP = SUPP_RES_RMII;
komoritan 0:14bd24b5a77f 67 for (tout = 100; tout; tout--);
komoritan 0:14bd24b5a77f 68 LPC_EMAC->SUPP = 0;
komoritan 0:14bd24b5a77f 69
komoritan 0:14bd24b5a77f 70 /* Put the DP83848C in reset mode */
komoritan 0:14bd24b5a77f 71 write_PHY (PHY_REG_BMCR, 0x8000);
komoritan 0:14bd24b5a77f 72
komoritan 0:14bd24b5a77f 73 /* Wait for hardware reset to end. */
komoritan 0:14bd24b5a77f 74 for (tout = 0; tout < 0x100000; tout++) {
komoritan 0:14bd24b5a77f 75 regv = read_PHY (PHY_REG_BMCR);
komoritan 0:14bd24b5a77f 76 if (!(regv & 0x8000)) {
komoritan 0:14bd24b5a77f 77 /* Reset complete */
komoritan 0:14bd24b5a77f 78 break;
komoritan 0:14bd24b5a77f 79 }
komoritan 0:14bd24b5a77f 80 }
komoritan 0:14bd24b5a77f 81 }
komoritan 0:14bd24b5a77f 82
komoritan 0:14bd24b5a77f 83
komoritan 0:14bd24b5a77f 84 void PHY_PowerDown()
komoritan 0:14bd24b5a77f 85 {
komoritan 0:14bd24b5a77f 86 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
komoritan 0:14bd24b5a77f 87 EMAC_Init(); //init EMAC if it is not already init'd
komoritan 0:14bd24b5a77f 88
komoritan 0:14bd24b5a77f 89 unsigned int regv;
komoritan 0:14bd24b5a77f 90 regv = read_PHY(PHY_REG_BMCR);
komoritan 0:14bd24b5a77f 91 write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_BMCR_POWERDOWN));
komoritan 0:14bd24b5a77f 92 regv = read_PHY(PHY_REG_BMCR);
komoritan 0:14bd24b5a77f 93
komoritan 0:14bd24b5a77f 94 //shouldn't need the EMAC now.
komoritan 0:14bd24b5a77f 95 Peripheral_PowerDown(LPC1768_PCONP_PCENET);
komoritan 0:14bd24b5a77f 96
komoritan 0:14bd24b5a77f 97 //and turn off the PHY OSC
komoritan 0:14bd24b5a77f 98 LPC_GPIO1->FIODIR |= 0x8000000;
komoritan 0:14bd24b5a77f 99 LPC_GPIO1->FIOCLR = 0x8000000;
komoritan 0:14bd24b5a77f 100 }
komoritan 0:14bd24b5a77f 101
komoritan 0:14bd24b5a77f 102 void PHY_PowerUp()
komoritan 0:14bd24b5a77f 103 {
komoritan 0:14bd24b5a77f 104 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
komoritan 0:14bd24b5a77f 105 EMAC_Init(); //init EMAC if it is not already init'd
komoritan 0:14bd24b5a77f 106
komoritan 0:14bd24b5a77f 107 LPC_GPIO1->FIODIR |= 0x8000000;
komoritan 0:14bd24b5a77f 108 LPC_GPIO1->FIOSET = 0x8000000;
komoritan 0:14bd24b5a77f 109
komoritan 0:14bd24b5a77f 110 //wait for osc to be stable
komoritan 0:14bd24b5a77f 111 wait_ms(200);
komoritan 0:14bd24b5a77f 112
komoritan 0:14bd24b5a77f 113 unsigned int regv;
komoritan 0:14bd24b5a77f 114 regv = read_PHY(PHY_REG_BMCR);
komoritan 0:14bd24b5a77f 115 write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_BMCR_POWERDOWN));
komoritan 0:14bd24b5a77f 116 regv = read_PHY(PHY_REG_BMCR);
komoritan 0:14bd24b5a77f 117 }
komoritan 0:14bd24b5a77f 118
komoritan 0:14bd24b5a77f 119 void PHY_EnergyDetect_Enable()
komoritan 0:14bd24b5a77f 120 {
komoritan 0:14bd24b5a77f 121 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
komoritan 0:14bd24b5a77f 122 EMAC_Init(); //init EMAC if it is not already init'd
komoritan 0:14bd24b5a77f 123
komoritan 0:14bd24b5a77f 124 unsigned int regv;
komoritan 0:14bd24b5a77f 125 regv = read_PHY(PHY_REG_EDCR);
komoritan 0:14bd24b5a77f 126 write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_EDCR_ENABLE));
komoritan 0:14bd24b5a77f 127 regv = read_PHY(PHY_REG_EDCR);
komoritan 0:14bd24b5a77f 128 }
komoritan 0:14bd24b5a77f 129
komoritan 0:14bd24b5a77f 130 void PHY_EnergyDetect_Disable()
komoritan 0:14bd24b5a77f 131 {
komoritan 0:14bd24b5a77f 132 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
komoritan 0:14bd24b5a77f 133 EMAC_Init(); //init EMAC if it is not already init'd
komoritan 0:14bd24b5a77f 134 unsigned int regv;
komoritan 0:14bd24b5a77f 135 regv = read_PHY(PHY_REG_EDCR);
komoritan 0:14bd24b5a77f 136 write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_EDCR_ENABLE));
komoritan 0:14bd24b5a77f 137 regv = read_PHY(PHY_REG_EDCR);
komoritan 0:14bd24b5a77f 138 }