Group 3_ESE519 / Mbed 2 deprecated lab5-remote

multihop protocol

Dependencies:   mbed

MRF24J40/MRF24J40.cpp@8:fd217a8f8658, 2015-11-17 (annotated)

Committer:
mfrede
Date:
Tue Nov 17 19:25:53 2015 +0000
Revision:
8:fd217a8f8658
add rssi

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mfrede 8:fd217a8f8658 1 /* mbed MRF24J40 (IEEE 802.15.4 tranceiver) Library
mfrede 8:fd217a8f8658 2 * Copyright (c) 2011 Jeroen Hilgers
mfrede 8:fd217a8f8658 3 *
mfrede 8:fd217a8f8658 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
mfrede 8:fd217a8f8658 5 * of this software and associated documentation files (the "Software"), to deal
mfrede 8:fd217a8f8658 6 * in the Software without restriction, including without limitation the rights
mfrede 8:fd217a8f8658 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
mfrede 8:fd217a8f8658 8 * copies of the Software, and to permit persons to whom the Software is
mfrede 8:fd217a8f8658 9 * furnished to do so, subject to the following conditions:
mfrede 8:fd217a8f8658 10 *
mfrede 8:fd217a8f8658 11 * The above copyright notice and this permission notice shall be included in
mfrede 8:fd217a8f8658 12 * all copies or substantial portions of the Software.
mfrede 8:fd217a8f8658 13 *
mfrede 8:fd217a8f8658 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
mfrede 8:fd217a8f8658 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
mfrede 8:fd217a8f8658 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
mfrede 8:fd217a8f8658 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
mfrede 8:fd217a8f8658 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mfrede 8:fd217a8f8658 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
mfrede 8:fd217a8f8658 20 * THE SOFTWARE.
mfrede 8:fd217a8f8658 21 */
mfrede 8:fd217a8f8658 22
mfrede 8:fd217a8f8658 23 #include "MRF24J40.h"
mfrede 8:fd217a8f8658 24
mfrede 8:fd217a8f8658 25 // MRF20J40 Short address control register mapping.
mfrede 8:fd217a8f8658 26 #define RXMCR 0x00
mfrede 8:fd217a8f8658 27 #define PANIDL 0x01
mfrede 8:fd217a8f8658 28 #define PANIDH 0x02
mfrede 8:fd217a8f8658 29 #define SADRL 0x03
mfrede 8:fd217a8f8658 30 #define SADRH 0x04
mfrede 8:fd217a8f8658 31 #define EADR0 0x05
mfrede 8:fd217a8f8658 32 #define EADR1 0x06
mfrede 8:fd217a8f8658 33 #define EADR2 0x07
mfrede 8:fd217a8f8658 34 #define EADR3 0x08
mfrede 8:fd217a8f8658 35 #define EADR4 0x09
mfrede 8:fd217a8f8658 36 #define EADR5 0x0a
mfrede 8:fd217a8f8658 37 #define EADR6 0x0b
mfrede 8:fd217a8f8658 38 #define EADR7 0x0c
mfrede 8:fd217a8f8658 39 #define RXFLUSH 0x0d
mfrede 8:fd217a8f8658 40
mfrede 8:fd217a8f8658 41 #define TXNMTRIG 0x1b
mfrede 8:fd217a8f8658 42 #define TXSR 0x24
mfrede 8:fd217a8f8658 43
mfrede 8:fd217a8f8658 44 #define ISRSTS 0x31
mfrede 8:fd217a8f8658 45 #define INTMSK 0x32
mfrede 8:fd217a8f8658 46 #define GPIO 0x33
mfrede 8:fd217a8f8658 47 #define TRISGPIO 0x34
mfrede 8:fd217a8f8658 48
mfrede 8:fd217a8f8658 49 #define RFCTL 0x36
mfrede 8:fd217a8f8658 50
mfrede 8:fd217a8f8658 51 #define BBREG2 0x3A
mfrede 8:fd217a8f8658 52
mfrede 8:fd217a8f8658 53 #define BBREG6 0x3E
mfrede 8:fd217a8f8658 54 #define RSSITHCCA 0x3F
mfrede 8:fd217a8f8658 55
mfrede 8:fd217a8f8658 56 // MRF20J40 Long address control register mapping.
mfrede 8:fd217a8f8658 57 #define RFCTRL0 0x200
mfrede 8:fd217a8f8658 58
mfrede 8:fd217a8f8658 59 #define RFCTRL2 0x202
mfrede 8:fd217a8f8658 60 #define RFCTRL3 0x203
mfrede 8:fd217a8f8658 61
mfrede 8:fd217a8f8658 62 #define RFCTRL6 0x206
mfrede 8:fd217a8f8658 63 #define RFCTRL7 0x207
mfrede 8:fd217a8f8658 64 #define RFCTRL8 0x208
mfrede 8:fd217a8f8658 65
mfrede 8:fd217a8f8658 66 #define CLKINTCR 0x211
mfrede 8:fd217a8f8658 67 #define CLCCTRL 0x220
mfrede 8:fd217a8f8658 68
mfrede 8:fd217a8f8658 69 MRF24J40::MRF24J40(PinName mosi, PinName miso, PinName sck, PinName cs, PinName reset) ://, PinName irq, PinName wake) :
mfrede 8:fd217a8f8658 70 mSpi(mosi, miso, sck), // mosi, miso, sclk
mfrede 8:fd217a8f8658 71 mCs(cs),
mfrede 8:fd217a8f8658 72 mReset(reset)
mfrede 8:fd217a8f8658 73 // mIrq(irq),
mfrede 8:fd217a8f8658 74 // mWake(wake)
mfrede 8:fd217a8f8658 75 {
mfrede 8:fd217a8f8658 76 mSpi.format(8, 0); // 8 bits, cpol=0; cpha=0
mfrede 8:fd217a8f8658 77 mSpi.frequency(500000);
mfrede 8:fd217a8f8658 78 Reset();
mfrede 8:fd217a8f8658 79 }
mfrede 8:fd217a8f8658 80
mfrede 8:fd217a8f8658 81 /*
mfrede 8:fd217a8f8658 82 void MRF24J40::DebugDump(Serial &ser)
mfrede 8:fd217a8f8658 83 {
mfrede 8:fd217a8f8658 84 ser.printf("MRF24J40 registers:\r");
mfrede 8:fd217a8f8658 85 ser.printf("RXMCR=0x%X\r", MrfReadShort(RXMCR));
mfrede 8:fd217a8f8658 86 ser.printf("RXFLUSH=0x%X\r", MrfReadShort(RXFLUSH));
mfrede 8:fd217a8f8658 87 ser.printf("TXNMTRIG=0x%X\r", MrfReadShort(TXNMTRIG));
mfrede 8:fd217a8f8658 88 ser.printf("TXSR=0x%X\r", MrfReadShort(TXSR));
mfrede 8:fd217a8f8658 89 ser.printf("ISRSTS=0x%X\r", MrfReadShort(ISRSTS));
mfrede 8:fd217a8f8658 90 ser.printf("INTMSK=0x%X\r", MrfReadShort(INTMSK));
mfrede 8:fd217a8f8658 91 ser.printf("GPIO=0x%X\r", MrfReadShort(GPIO));
mfrede 8:fd217a8f8658 92 ser.printf("TRISGPIO=0x%X\r", MrfReadShort(TRISGPIO));
mfrede 8:fd217a8f8658 93 ser.printf("RFCTL=0x%X\r", MrfReadShort(RFCTL));
mfrede 8:fd217a8f8658 94 ser.printf("BBREG2=0x%X\r", MrfReadShort(BBREG2));
mfrede 8:fd217a8f8658 95 ser.printf("BBREG6=0x%X\r", MrfReadShort(BBREG6));
mfrede 8:fd217a8f8658 96 ser.printf("RSSITHCCA=0x%X\r", MrfReadShort(RSSITHCCA));
mfrede 8:fd217a8f8658 97
mfrede 8:fd217a8f8658 98
mfrede 8:fd217a8f8658 99 ser.printf("RFCTRL0=0x%X\r", MrfReadLong(RFCTRL0));
mfrede 8:fd217a8f8658 100 ser.printf("RFCTRL2=0x%X\r", MrfReadLong(RFCTRL2));
mfrede 8:fd217a8f8658 101 ser.printf("RFCTRL3=0x%X\r", MrfReadLong(RFCTRL3));
mfrede 8:fd217a8f8658 102 ser.printf("RFCTRL6=0x%X\r", MrfReadLong(RFCTRL6));
mfrede 8:fd217a8f8658 103 ser.printf("RFCTRL7=0x%X\r", MrfReadLong(RFCTRL7));
mfrede 8:fd217a8f8658 104 ser.printf("RFCTRL8=0x%X\r", MrfReadLong(RFCTRL8));
mfrede 8:fd217a8f8658 105 ser.printf("CLKINTCR=0x%X\r", MrfReadLong(CLKINTCR));
mfrede 8:fd217a8f8658 106 ser.printf("CLCCTRL=0x%X\r", MrfReadLong(CLCCTRL));
mfrede 8:fd217a8f8658 107 ser.printf("\r");
mfrede 8:fd217a8f8658 108 }
mfrede 8:fd217a8f8658 109 */
mfrede 8:fd217a8f8658 110
mfrede 8:fd217a8f8658 111 void MRF24J40::Reset(void)
mfrede 8:fd217a8f8658 112 {
mfrede 8:fd217a8f8658 113 mCs = 1;
mfrede 8:fd217a8f8658 114 // Pulse hardware reset.
mfrede 8:fd217a8f8658 115 mReset = 0;
mfrede 8:fd217a8f8658 116 wait_us(100);
mfrede 8:fd217a8f8658 117 mReset = 1;
mfrede 8:fd217a8f8658 118 wait_us(100);
mfrede 8:fd217a8f8658 119
mfrede 8:fd217a8f8658 120 // Reset RF module.
mfrede 8:fd217a8f8658 121 WriteShort(RFCTL, 0x04);
mfrede 8:fd217a8f8658 122 WriteShort(RFCTL, 0x00);
mfrede 8:fd217a8f8658 123
mfrede 8:fd217a8f8658 124 WriteShort(RFCTL, 0x00);
mfrede 8:fd217a8f8658 125
mfrede 8:fd217a8f8658 126 WriteShort(PANIDL, 0xAA);
mfrede 8:fd217a8f8658 127 WriteShort(PANIDH, 0xAA);
mfrede 8:fd217a8f8658 128 WriteShort(SADRL, 0xAA);
mfrede 8:fd217a8f8658 129 WriteShort(SADRH, 0xAA);
mfrede 8:fd217a8f8658 130
mfrede 8:fd217a8f8658 131 // Flush RX fifo.
mfrede 8:fd217a8f8658 132 WriteShort(RXFLUSH, 0x01);
mfrede 8:fd217a8f8658 133
mfrede 8:fd217a8f8658 134 // Write MAC addresses here. We don't care.
mfrede 8:fd217a8f8658 135
mfrede 8:fd217a8f8658 136 WriteLong(RFCTRL2, 0x80); // Enable RF PLL.
mfrede 8:fd217a8f8658 137
mfrede 8:fd217a8f8658 138 WriteLong(RFCTRL3, 0x00); // Full power.
mfrede 8:fd217a8f8658 139 WriteLong(RFCTRL6, 0x80); // Enable TX filter (recommended)
mfrede 8:fd217a8f8658 140 WriteLong(RFCTRL8, 0x10); // Enhanced VCO (recommended)
mfrede 8:fd217a8f8658 141
mfrede 8:fd217a8f8658 142 WriteShort(BBREG2,0x78); // Clear Channel Assesment use carrier sense.
mfrede 8:fd217a8f8658 143 WriteShort(BBREG6,0x40); // Calculate RSSI for Rx packet.
mfrede 8:fd217a8f8658 144 WriteShort(RSSITHCCA,0x00);// RSSI threshold for CCA.
mfrede 8:fd217a8f8658 145
mfrede 8:fd217a8f8658 146 WriteLong(RFCTRL0, 0x00); // Channel 11.
mfrede 8:fd217a8f8658 147
mfrede 8:fd217a8f8658 148 WriteShort(RXMCR, 0x01); // Don't check address upon reception.
mfrede 8:fd217a8f8658 149 // MrfWriteShort(RXMCR, 0x00); // Check address upon reception.
mfrede 8:fd217a8f8658 150
mfrede 8:fd217a8f8658 151 // Reset RF module with new settings.
mfrede 8:fd217a8f8658 152 WriteShort(RFCTL, 0x04);
mfrede 8:fd217a8f8658 153 WriteShort(RFCTL, 0x00);
mfrede 8:fd217a8f8658 154 }
mfrede 8:fd217a8f8658 155
mfrede 8:fd217a8f8658 156 void MRF24J40::Send(uint8_t *data, uint8_t length)
mfrede 8:fd217a8f8658 157 {
mfrede 8:fd217a8f8658 158 uint8_t i;
mfrede 8:fd217a8f8658 159
mfrede 8:fd217a8f8658 160 WriteLong(0x000, 0); // No addresses in header.
mfrede 8:fd217a8f8658 161 WriteLong(0x001, length); // 11 bytes
mfrede 8:fd217a8f8658 162 for(i=0; i<length; i++)
mfrede 8:fd217a8f8658 163 WriteLong(0x002+i, data[i]);
mfrede 8:fd217a8f8658 164
mfrede 8:fd217a8f8658 165 WriteShort(TXNMTRIG, 0x01);
mfrede 8:fd217a8f8658 166 }
mfrede 8:fd217a8f8658 167
mfrede 8:fd217a8f8658 168 uint8_t MRF24J40::Receive(uint8_t *data, uint8_t maxLength, uint8_t *rssi)
mfrede 8:fd217a8f8658 169 {
mfrede 8:fd217a8f8658 170 uint8_t i, length;
mfrede 8:fd217a8f8658 171 uint8_t lqi;
mfrede 8:fd217a8f8658 172
mfrede 8:fd217a8f8658 173 if(ReadShort(ISRSTS)& 0x08)
mfrede 8:fd217a8f8658 174 {
mfrede 8:fd217a8f8658 175 length = ReadLong(0x300);
mfrede 8:fd217a8f8658 176 lqi = ReadLong(0x301 + length);
mfrede 8:fd217a8f8658 177 *rssi = ReadLong(0x302 + length);
mfrede 8:fd217a8f8658 178 for(i=0; i<length; i++)
mfrede 8:fd217a8f8658 179 if(i<maxLength)
mfrede 8:fd217a8f8658 180 *data++ = ReadLong(0x301 + (uint16_t)i);
mfrede 8:fd217a8f8658 181 else
mfrede 8:fd217a8f8658 182 ReadLong(0x301 + (uint16_t)i);
mfrede 8:fd217a8f8658 183 if(length < maxLength)
mfrede 8:fd217a8f8658 184 return length;
mfrede 8:fd217a8f8658 185 }
mfrede 8:fd217a8f8658 186 return 0;
mfrede 8:fd217a8f8658 187 }
mfrede 8:fd217a8f8658 188
mfrede 8:fd217a8f8658 189 uint8_t MRF24J40::ReadShort (uint8_t address)
mfrede 8:fd217a8f8658 190 {
mfrede 8:fd217a8f8658 191 uint8_t value;
mfrede 8:fd217a8f8658 192 mCs = 0;
mfrede 8:fd217a8f8658 193 wait_us(1);
mfrede 8:fd217a8f8658 194 mSpi.write((address<<1) & 0x7E);
mfrede 8:fd217a8f8658 195 wait_us(1);
mfrede 8:fd217a8f8658 196 value = mSpi.write(0xFF);
mfrede 8:fd217a8f8658 197 wait_us(1);
mfrede 8:fd217a8f8658 198 mCs = 1;
mfrede 8:fd217a8f8658 199 wait_us(1);
mfrede 8:fd217a8f8658 200 return value;
mfrede 8:fd217a8f8658 201 }
mfrede 8:fd217a8f8658 202
mfrede 8:fd217a8f8658 203 void MRF24J40::WriteShort (uint8_t address, uint8_t data)
mfrede 8:fd217a8f8658 204 {
mfrede 8:fd217a8f8658 205 mCs = 0;
mfrede 8:fd217a8f8658 206 wait_us(1);
mfrede 8:fd217a8f8658 207 mSpi.write(((address<<1) & 0x7E) | 0x01);
mfrede 8:fd217a8f8658 208 wait_us(1);
mfrede 8:fd217a8f8658 209 mSpi.write(data);
mfrede 8:fd217a8f8658 210 wait_us(1);
mfrede 8:fd217a8f8658 211 mCs = 1;
mfrede 8:fd217a8f8658 212 wait_us(1);
mfrede 8:fd217a8f8658 213 }
mfrede 8:fd217a8f8658 214
mfrede 8:fd217a8f8658 215 uint8_t MRF24J40::ReadLong (uint16_t address)
mfrede 8:fd217a8f8658 216 {
mfrede 8:fd217a8f8658 217 uint8_t value;
mfrede 8:fd217a8f8658 218 mCs = 0;
mfrede 8:fd217a8f8658 219 wait_us(1);
mfrede 8:fd217a8f8658 220 mSpi.write((address>>3) | 0x80);
mfrede 8:fd217a8f8658 221 wait_us(1);
mfrede 8:fd217a8f8658 222 mSpi.write((address<<5) & 0xE0);
mfrede 8:fd217a8f8658 223 wait_us(1);
mfrede 8:fd217a8f8658 224 value = mSpi.write(0xFF);
mfrede 8:fd217a8f8658 225 wait_us(1);
mfrede 8:fd217a8f8658 226 mCs = 1;
mfrede 8:fd217a8f8658 227 wait_us(1);
mfrede 8:fd217a8f8658 228 return value;
mfrede 8:fd217a8f8658 229 }
mfrede 8:fd217a8f8658 230
mfrede 8:fd217a8f8658 231 void MRF24J40::WriteLong (uint16_t address, uint8_t data)
mfrede 8:fd217a8f8658 232 {
mfrede 8:fd217a8f8658 233 mCs = 0;
mfrede 8:fd217a8f8658 234 wait_us(1);
mfrede 8:fd217a8f8658 235 mSpi.write((address>>3) | 0x80);
mfrede 8:fd217a8f8658 236 wait_us(1);
mfrede 8:fd217a8f8658 237 mSpi.write(((address<<5) & 0xE0) | 0x10);
mfrede 8:fd217a8f8658 238 wait_us(1);
mfrede 8:fd217a8f8658 239 mSpi.write(data);
mfrede 8:fd217a8f8658 240 wait_us(1);
mfrede 8:fd217a8f8658 241 mCs = 1;
mfrede 8:fd217a8f8658 242 wait_us(1);
mfrede 8:fd217a8f8658 243 }
mfrede 8:fd217a8f8658 244
mfrede 8:fd217a8f8658 245 void MRF24J40::SetChannel(uint8_t channel)
mfrede 8:fd217a8f8658 246 {
mfrede 8:fd217a8f8658 247 WriteLong(RFCTRL0, (channel & 0x0F)<<4 | 0x03); // Set channel, leave RFOPT bits at recommended
mfrede 8:fd217a8f8658 248
mfrede 8:fd217a8f8658 249 //Reset the board by first writing a 4 to RFCTL, then writing a 0
mfrede 8:fd217a8f8658 250 WriteShort(RFCTL, 0x04);
mfrede 8:fd217a8f8658 251 WriteShort(RFCTL, 0x00);
mfrede 8:fd217a8f8658 252 wait(0.5);
mfrede 8:fd217a8f8658 253 }