help :(

Dependencies:   FFT

Committer:
annieluo2
Date:
Wed Dec 02 18:02:03 2020 +0000
Revision:
0:d6c9b09b4042
boo

Who changed what in which revision?

UserRevisionLine numberNew contents of line
annieluo2 0:d6c9b09b4042 1 {
annieluo2 0:d6c9b09b4042 2 "Target": {
annieluo2 0:d6c9b09b4042 3 "core": null,
annieluo2 0:d6c9b09b4042 4 "default_toolchain": "ARM",
annieluo2 0:d6c9b09b4042 5 "supported_toolchains": null,
annieluo2 0:d6c9b09b4042 6 "extra_labels": [],
annieluo2 0:d6c9b09b4042 7 "is_disk_virtual": false,
annieluo2 0:d6c9b09b4042 8 "macros": [],
annieluo2 0:d6c9b09b4042 9 "device_has": [],
annieluo2 0:d6c9b09b4042 10 "features": [],
annieluo2 0:d6c9b09b4042 11 "detect_code": [],
annieluo2 0:d6c9b09b4042 12 "public": false,
annieluo2 0:d6c9b09b4042 13 "default_lib": "std"
annieluo2 0:d6c9b09b4042 14 },
annieluo2 0:d6c9b09b4042 15 "Super_Target": {
annieluo2 0:d6c9b09b4042 16 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 17 "core": "Cortex-M4",
annieluo2 0:d6c9b09b4042 18 "features_add": ["UVISOR", "BLE", "CLIENT", "IPV4", "IPV6"],
annieluo2 0:d6c9b09b4042 19 "supported_toolchains": ["ARM"]
annieluo2 0:d6c9b09b4042 20 },
annieluo2 0:d6c9b09b4042 21 "CM4_UARM": {
annieluo2 0:d6c9b09b4042 22 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 23 "core": "Cortex-M4",
annieluo2 0:d6c9b09b4042 24 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 25 "public": false,
annieluo2 0:d6c9b09b4042 26 "supported_toolchains": ["uARM"],
annieluo2 0:d6c9b09b4042 27 "default_lib": "small"
annieluo2 0:d6c9b09b4042 28 },
annieluo2 0:d6c9b09b4042 29 "CM4_ARM": {
annieluo2 0:d6c9b09b4042 30 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 31 "core": "Cortex-M4",
annieluo2 0:d6c9b09b4042 32 "public": false,
annieluo2 0:d6c9b09b4042 33 "supported_toolchains": ["ARM"]
annieluo2 0:d6c9b09b4042 34 },
annieluo2 0:d6c9b09b4042 35 "CM4F_UARM": {
annieluo2 0:d6c9b09b4042 36 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 37 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 38 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 39 "public": false,
annieluo2 0:d6c9b09b4042 40 "supported_toolchains": ["uARM"],
annieluo2 0:d6c9b09b4042 41 "default_lib": "small"
annieluo2 0:d6c9b09b4042 42 },
annieluo2 0:d6c9b09b4042 43 "CM4F_ARM": {
annieluo2 0:d6c9b09b4042 44 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 45 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 46 "public": false,
annieluo2 0:d6c9b09b4042 47 "supported_toolchains": ["ARM"]
annieluo2 0:d6c9b09b4042 48 },
annieluo2 0:d6c9b09b4042 49 "LPCTarget": {
annieluo2 0:d6c9b09b4042 50 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 51 "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
annieluo2 0:d6c9b09b4042 52 "public": false
annieluo2 0:d6c9b09b4042 53 },
annieluo2 0:d6c9b09b4042 54 "LPC11C24": {
annieluo2 0:d6c9b09b4042 55 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 56 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 57 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
annieluo2 0:d6c9b09b4042 58 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 59 "device_has": ["ANALOGIN", "CAN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 60 "device_name": "LPC11C24FBD48/301"
annieluo2 0:d6c9b09b4042 61 },
annieluo2 0:d6c9b09b4042 62 "LPC1114": {
annieluo2 0:d6c9b09b4042 63 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 64 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 65 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 66 "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
annieluo2 0:d6c9b09b4042 67 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 68 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 69 "default_lib": "small",
annieluo2 0:d6c9b09b4042 70 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 71 "device_name": "LPC1114FN28/102"
annieluo2 0:d6c9b09b4042 72 },
annieluo2 0:d6c9b09b4042 73 "LPC11U24": {
annieluo2 0:d6c9b09b4042 74 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 75 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 76 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 77 "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
annieluo2 0:d6c9b09b4042 78 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 79 "detect_code": ["1040"],
annieluo2 0:d6c9b09b4042 80 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 81 "default_lib": "small",
annieluo2 0:d6c9b09b4042 82 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 83 "device_name": "LPC11U24FBD48/401"
annieluo2 0:d6c9b09b4042 84 },
annieluo2 0:d6c9b09b4042 85 "OC_MBUINO": {
annieluo2 0:d6c9b09b4042 86 "inherits": ["LPC11U24"],
annieluo2 0:d6c9b09b4042 87 "macros": ["TARGET_LPC11U24"],
annieluo2 0:d6c9b09b4042 88 "extra_labels": ["NXP", "LPC11UXX"],
annieluo2 0:d6c9b09b4042 89 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 90 "release_versions": ["2"]
annieluo2 0:d6c9b09b4042 91 },
annieluo2 0:d6c9b09b4042 92 "LPC11U24_301": {
annieluo2 0:d6c9b09b4042 93 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 94 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 95 "extra_labels": ["NXP", "LPC11UXX"],
annieluo2 0:d6c9b09b4042 96 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 97 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 98 "device_name": "LPC11U24FHI33/301"
annieluo2 0:d6c9b09b4042 99 },
annieluo2 0:d6c9b09b4042 100 "LPC11U34_421": {
annieluo2 0:d6c9b09b4042 101 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 102 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 103 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 104 "extra_labels": ["NXP", "LPC11UXX"],
annieluo2 0:d6c9b09b4042 105 "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
annieluo2 0:d6c9b09b4042 106 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 107 "default_lib": "small",
annieluo2 0:d6c9b09b4042 108 "device_name": "LPC11U34FBD48/311"
annieluo2 0:d6c9b09b4042 109 },
annieluo2 0:d6c9b09b4042 110 "MICRONFCBOARD": {
annieluo2 0:d6c9b09b4042 111 "inherits": ["LPC11U34_421"],
annieluo2 0:d6c9b09b4042 112 "macros": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
annieluo2 0:d6c9b09b4042 113 "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
annieluo2 0:d6c9b09b4042 114 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 115 "device_name": "LPC11U34FBD48/311"
annieluo2 0:d6c9b09b4042 116 },
annieluo2 0:d6c9b09b4042 117 "LPC11U35_401": {
annieluo2 0:d6c9b09b4042 118 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 119 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 120 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 121 "extra_labels": ["NXP", "LPC11UXX"],
annieluo2 0:d6c9b09b4042 122 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 123 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 124 "default_lib": "small",
annieluo2 0:d6c9b09b4042 125 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 126 "device_name": "LPC11U35FBD48/401"
annieluo2 0:d6c9b09b4042 127 },
annieluo2 0:d6c9b09b4042 128 "LPC11U35_501": {
annieluo2 0:d6c9b09b4042 129 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 130 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 131 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 132 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
annieluo2 0:d6c9b09b4042 133 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 134 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 135 "default_lib": "small",
annieluo2 0:d6c9b09b4042 136 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 137 "device_name": "LPC11U35FHI33/501"
annieluo2 0:d6c9b09b4042 138 },
annieluo2 0:d6c9b09b4042 139 "LPC11U35_501_IBDAP": {
annieluo2 0:d6c9b09b4042 140 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 141 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 142 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 143 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
annieluo2 0:d6c9b09b4042 144 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 145 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 146 "default_lib": "small",
annieluo2 0:d6c9b09b4042 147 "device_name": "LPC11U35FHI33/501"
annieluo2 0:d6c9b09b4042 148 },
annieluo2 0:d6c9b09b4042 149 "XADOW_M0": {
annieluo2 0:d6c9b09b4042 150 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 151 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 152 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 153 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
annieluo2 0:d6c9b09b4042 154 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 155 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 156 "default_lib": "small",
annieluo2 0:d6c9b09b4042 157 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 158 "device_name": "LPC11U35FHI33/501"
annieluo2 0:d6c9b09b4042 159 },
annieluo2 0:d6c9b09b4042 160 "LPC11U35_Y5_MBUG": {
annieluo2 0:d6c9b09b4042 161 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 162 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 163 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 164 "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
annieluo2 0:d6c9b09b4042 165 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 166 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 167 "default_lib": "small",
annieluo2 0:d6c9b09b4042 168 "device_name": "LPC11U35FHI33/501"
annieluo2 0:d6c9b09b4042 169 },
annieluo2 0:d6c9b09b4042 170 "LPC11U37_501": {
annieluo2 0:d6c9b09b4042 171 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 172 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 173 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 174 "extra_labels": ["NXP", "LPC11UXX"],
annieluo2 0:d6c9b09b4042 175 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 176 "default_lib": "small",
annieluo2 0:d6c9b09b4042 177 "device_name": "LPC11U37FBD64/501"
annieluo2 0:d6c9b09b4042 178 },
annieluo2 0:d6c9b09b4042 179 "LPCCAPPUCCINO": {
annieluo2 0:d6c9b09b4042 180 "inherits": ["LPC11U37_501"],
annieluo2 0:d6c9b09b4042 181 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 182 "device_name": "LPC11U37FBD64/501"
annieluo2 0:d6c9b09b4042 183 },
annieluo2 0:d6c9b09b4042 184 "ARCH_GPRS": {
annieluo2 0:d6c9b09b4042 185 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 186 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 187 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 188 "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
annieluo2 0:d6c9b09b4042 189 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 190 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 191 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 192 "default_lib": "small",
annieluo2 0:d6c9b09b4042 193 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 194 "device_name": "LPC11U37FBD64/501"
annieluo2 0:d6c9b09b4042 195 },
annieluo2 0:d6c9b09b4042 196 "LPC11U68": {
annieluo2 0:d6c9b09b4042 197 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 198 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 199 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 200 "extra_labels": ["NXP", "LPC11U6X"],
annieluo2 0:d6c9b09b4042 201 "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 202 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 203 "detect_code": ["1168"],
annieluo2 0:d6c9b09b4042 204 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI"],
annieluo2 0:d6c9b09b4042 205 "default_lib": "small",
annieluo2 0:d6c9b09b4042 206 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 207 "device_name": "LPC11U68JBD100"
annieluo2 0:d6c9b09b4042 208 },
annieluo2 0:d6c9b09b4042 209 "LPC1347": {
annieluo2 0:d6c9b09b4042 210 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 211 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 212 "extra_labels": ["NXP", "LPC13XX"],
annieluo2 0:d6c9b09b4042 213 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 214 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 215 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 216 "device_name": "LPC1347FBD48"
annieluo2 0:d6c9b09b4042 217 },
annieluo2 0:d6c9b09b4042 218 "LPC1549": {
annieluo2 0:d6c9b09b4042 219 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 220 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 221 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 222 "extra_labels": ["NXP", "LPC15XX"],
annieluo2 0:d6c9b09b4042 223 "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 224 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 225 "detect_code": ["1549"],
annieluo2 0:d6c9b09b4042 226 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 227 "default_lib": "small",
annieluo2 0:d6c9b09b4042 228 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 229 "device_name": "lpc1549"
annieluo2 0:d6c9b09b4042 230 },
annieluo2 0:d6c9b09b4042 231 "LPC1768": {
annieluo2 0:d6c9b09b4042 232 "inherits": ["LPCTarget"],
annieluo2 0:d6c9b09b4042 233 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 234 "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768"],
annieluo2 0:d6c9b09b4042 235 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
annieluo2 0:d6c9b09b4042 236 "detect_code": ["1010"],
annieluo2 0:d6c9b09b4042 237 "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ERROR_PATTERN", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 238 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 239 "features": ["LWIP"],
annieluo2 0:d6c9b09b4042 240 "device_name": "LPC1768"
annieluo2 0:d6c9b09b4042 241 },
annieluo2 0:d6c9b09b4042 242 "ARCH_PRO": {
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annieluo2 0:d6c9b09b4042 244 "core": "Cortex-M3",
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annieluo2 0:d6c9b09b4042 1277 "DISCO_F401VC": {
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annieluo2 0:d6c9b09b4042 1299 },
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annieluo2 0:d6c9b09b4042 1311 },
annieluo2 0:d6c9b09b4042 1312 "MCU_NRF51": {
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annieluo2 0:d6c9b09b4042 1314 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 1315 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
annieluo2 0:d6c9b09b4042 1316 "macros": ["NRF51", "TARGET_NRF51822"],
annieluo2 0:d6c9b09b4042 1317 "MERGE_BOOTLOADER": false,
annieluo2 0:d6c9b09b4042 1318 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
annieluo2 0:d6c9b09b4042 1319 "OUTPUT_EXT": "hex",
annieluo2 0:d6c9b09b4042 1320 "is_disk_virtual": true,
annieluo2 0:d6c9b09b4042 1321 "supported_toolchains": ["ARM", "GCC_ARM"],
annieluo2 0:d6c9b09b4042 1322 "public": false,
annieluo2 0:d6c9b09b4042 1323 "MERGE_SOFT_DEVICE": true,
annieluo2 0:d6c9b09b4042 1324 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
annieluo2 0:d6c9b09b4042 1325 {
annieluo2 0:d6c9b09b4042 1326 "boot": "s130_nrf51_1.0.0_bootloader.hex",
annieluo2 0:d6c9b09b4042 1327 "name": "s130_nrf51_1.0.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 1328 "offset": 114688
annieluo2 0:d6c9b09b4042 1329 },
annieluo2 0:d6c9b09b4042 1330 {
annieluo2 0:d6c9b09b4042 1331 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
annieluo2 0:d6c9b09b4042 1332 "name": "s110_nrf51822_8.0.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 1333 "offset": 98304
annieluo2 0:d6c9b09b4042 1334 },
annieluo2 0:d6c9b09b4042 1335 {
annieluo2 0:d6c9b09b4042 1336 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
annieluo2 0:d6c9b09b4042 1337 "name": "s110_nrf51822_7.1.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 1338 "offset": 90112
annieluo2 0:d6c9b09b4042 1339 },
annieluo2 0:d6c9b09b4042 1340 {
annieluo2 0:d6c9b09b4042 1341 "boot": "s110_nrf51822_7.0.0_bootloader.hex",
annieluo2 0:d6c9b09b4042 1342 "name": "s110_nrf51822_7.0.0_softdevice.hex",
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annieluo2 0:d6c9b09b4042 1344 },
annieluo2 0:d6c9b09b4042 1345 {
annieluo2 0:d6c9b09b4042 1346 "boot": "s110_nrf51822_6.0.0_bootloader.hex",
annieluo2 0:d6c9b09b4042 1347 "name": "s110_nrf51822_6.0.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 1348 "offset": 81920
annieluo2 0:d6c9b09b4042 1349 }
annieluo2 0:d6c9b09b4042 1350 ],
annieluo2 0:d6c9b09b4042 1351 "detect_code": ["1070"],
annieluo2 0:d6c9b09b4042 1352 "post_binary_hook": {
annieluo2 0:d6c9b09b4042 1353 "function": "MCU_NRF51Code.binary_hook",
annieluo2 0:d6c9b09b4042 1354 "toolchains": ["ARM_STD", "GCC_ARM"]
annieluo2 0:d6c9b09b4042 1355 },
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annieluo2 0:d6c9b09b4042 1357 "features": ["BLE"],
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annieluo2 0:d6c9b09b4042 1365 "default_lib": "small"
annieluo2 0:d6c9b09b4042 1366 },
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annieluo2 0:d6c9b09b4042 1380 },
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annieluo2 0:d6c9b09b4042 1386 },
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annieluo2 0:d6c9b09b4042 1389 "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
annieluo2 0:d6c9b09b4042 1390 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
annieluo2 0:d6c9b09b4042 1391 {
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annieluo2 0:d6c9b09b4042 1393 "boot": "s110_nrf51822_8.0.0_bootloader.hex",
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annieluo2 0:d6c9b09b4042 1395 },
annieluo2 0:d6c9b09b4042 1396 {
annieluo2 0:d6c9b09b4042 1397 "name": "s110_nrf51822_7.1.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 1398 "boot": "s110_nrf51822_7.1.0_bootloader.hex",
annieluo2 0:d6c9b09b4042 1399 "offset": 90112
annieluo2 0:d6c9b09b4042 1400 }
annieluo2 0:d6c9b09b4042 1401 ],
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annieluo2 0:d6c9b09b4042 1417 },
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annieluo2 0:d6c9b09b4042 1427 },
annieluo2 0:d6c9b09b4042 1428 "MCU_NRF51_32K": {
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annieluo2 0:d6c9b09b4042 1447 },
annieluo2 0:d6c9b09b4042 1448 "NRF51822": {
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annieluo2 0:d6c9b09b4042 1454 },
annieluo2 0:d6c9b09b4042 1455 "NRF51822_BOOT": {
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annieluo2 0:d6c9b09b4042 1459 },
annieluo2 0:d6c9b09b4042 1460 "NRF51822_OTA": {
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annieluo2 0:d6c9b09b4042 1462 "extra_labels_add": ["NRF51822", "NRF51822_MKIT"],
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annieluo2 0:d6c9b09b4042 1464 },
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annieluo2 0:d6c9b09b4042 1469 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1470 },
annieluo2 0:d6c9b09b4042 1471 "ARCH_BLE_BOOT": {
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annieluo2 0:d6c9b09b4042 1477 "ARCH_BLE_OTA": {
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annieluo2 0:d6c9b09b4042 1482 },
annieluo2 0:d6c9b09b4042 1483 "ARCH_LINK": {
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annieluo2 0:d6c9b09b4042 1486 "extra_labels_add": ["ARCH_BLE"],
annieluo2 0:d6c9b09b4042 1487 "macros_add": ["TARGET_ARCH_BLE"]
annieluo2 0:d6c9b09b4042 1488 },
annieluo2 0:d6c9b09b4042 1489 "ARCH_LINK_BOOT": {
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annieluo2 0:d6c9b09b4042 1491 "inherits": ["MCU_NRF51_16K_BOOT"],
annieluo2 0:d6c9b09b4042 1492 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
annieluo2 0:d6c9b09b4042 1493 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
annieluo2 0:d6c9b09b4042 1494 },
annieluo2 0:d6c9b09b4042 1495 "ARCH_LINK_OTA": {
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annieluo2 0:d6c9b09b4042 1497 "inherits": ["MCU_NRF51_16K_OTA"],
annieluo2 0:d6c9b09b4042 1498 "extra_labels_add": ["ARCH_BLE", "ARCH_LINK"],
annieluo2 0:d6c9b09b4042 1499 "macros_add": ["TARGET_ARCH_BLE", "TARGET_ARCH_LINK"]
annieluo2 0:d6c9b09b4042 1500 },
annieluo2 0:d6c9b09b4042 1501 "SEEED_TINY_BLE": {
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annieluo2 0:d6c9b09b4042 1503 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 1504 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1505 },
annieluo2 0:d6c9b09b4042 1506 "SEEED_TINY_BLE_BOOT": {
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annieluo2 0:d6c9b09b4042 1508 "extra_labels_add": ["SEEED_TINY_BLE"],
annieluo2 0:d6c9b09b4042 1509 "macros_add": ["TARGET_SEEED_TINY_BLE"]
annieluo2 0:d6c9b09b4042 1510 },
annieluo2 0:d6c9b09b4042 1511 "SEEED_TINY_BLE_OTA": {
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annieluo2 0:d6c9b09b4042 1513 "extra_labels_add": ["SEEED_TINY_BLE"],
annieluo2 0:d6c9b09b4042 1514 "macros_add": ["TARGET_SEEED_TINY_BLE"]
annieluo2 0:d6c9b09b4042 1515 },
annieluo2 0:d6c9b09b4042 1516 "HRM1017": {
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annieluo2 0:d6c9b09b4042 1518 "macros_add": ["TARGET_NRF_LFCLK_RC"],
annieluo2 0:d6c9b09b4042 1519 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 1520 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1521 },
annieluo2 0:d6c9b09b4042 1522 "HRM1017_BOOT": {
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annieluo2 0:d6c9b09b4042 1524 "extra_labels_add": ["HRM1017"],
annieluo2 0:d6c9b09b4042 1525 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1526 },
annieluo2 0:d6c9b09b4042 1527 "HRM1017_OTA": {
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annieluo2 0:d6c9b09b4042 1529 "extra_labels_add": ["HRM1017"],
annieluo2 0:d6c9b09b4042 1530 "macros_add": ["TARGET_HRM1017", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1531 },
annieluo2 0:d6c9b09b4042 1532 "RBLAB_NRF51822": {
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annieluo2 0:d6c9b09b4042 1535 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 1536 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1537 },
annieluo2 0:d6c9b09b4042 1538 "RBLAB_NRF51822_BOOT": {
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annieluo2 0:d6c9b09b4042 1540 "inherits": ["MCU_NRF51_16K_BOOT"],
annieluo2 0:d6c9b09b4042 1541 "extra_labels_add": ["RBLAB_NRF51822"],
annieluo2 0:d6c9b09b4042 1542 "macros_add": ["TARGET_RBLAB_NRF51822"]
annieluo2 0:d6c9b09b4042 1543 },
annieluo2 0:d6c9b09b4042 1544 "RBLAB_NRF51822_OTA": {
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annieluo2 0:d6c9b09b4042 1546 "inherits": ["MCU_NRF51_16K_OTA"],
annieluo2 0:d6c9b09b4042 1547 "extra_labels_add": ["RBLAB_NRF51822"],
annieluo2 0:d6c9b09b4042 1548 "macros_add": ["TARGET_RBLAB_NRF51822"]
annieluo2 0:d6c9b09b4042 1549 },
annieluo2 0:d6c9b09b4042 1550 "RBLAB_BLENANO": {
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annieluo2 0:d6c9b09b4042 1552 "release_versions": ["2"]
annieluo2 0:d6c9b09b4042 1553 },
annieluo2 0:d6c9b09b4042 1554 "RBLAB_BLENANO_BOOT": {
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annieluo2 0:d6c9b09b4042 1556 "extra_labels_add": ["RBLAB_BLENANO"],
annieluo2 0:d6c9b09b4042 1557 "macros_add": ["TARGET_RBLAB_BLENANO"]
annieluo2 0:d6c9b09b4042 1558 },
annieluo2 0:d6c9b09b4042 1559 "RBLAB_BLENANO_OTA": {
annieluo2 0:d6c9b09b4042 1560 "inherits": ["MCU_NRF51_16K_OTA"],
annieluo2 0:d6c9b09b4042 1561 "extra_labels_add": ["RBLAB_BLENANO"],
annieluo2 0:d6c9b09b4042 1562 "macros_add": ["TARGET_RBLAB_BLENANO"]
annieluo2 0:d6c9b09b4042 1563 },
annieluo2 0:d6c9b09b4042 1564 "NRF51822_Y5_MBUG": {
annieluo2 0:d6c9b09b4042 1565 "inherits": ["MCU_NRF51_16K"]
annieluo2 0:d6c9b09b4042 1566 },
annieluo2 0:d6c9b09b4042 1567 "WALLBOT_BLE": {
annieluo2 0:d6c9b09b4042 1568 "inherits": ["MCU_NRF51_16K"],
annieluo2 0:d6c9b09b4042 1569 "release_versions": ["2"]
annieluo2 0:d6c9b09b4042 1570 },
annieluo2 0:d6c9b09b4042 1571 "WALLBOT_BLE_BOOT": {
annieluo2 0:d6c9b09b4042 1572 "inherits": ["MCU_NRF51_16K_BOOT"],
annieluo2 0:d6c9b09b4042 1573 "extra_labels_add": ["WALLBOT_BLE"],
annieluo2 0:d6c9b09b4042 1574 "macros_add": ["TARGET_WALLBOT_BLE"]
annieluo2 0:d6c9b09b4042 1575 },
annieluo2 0:d6c9b09b4042 1576 "WALLBOT_BLE_OTA": {
annieluo2 0:d6c9b09b4042 1577 "inherits": ["MCU_NRF51_16K_OTA"],
annieluo2 0:d6c9b09b4042 1578 "extra_labels_add": ["WALLBOT_BLE"],
annieluo2 0:d6c9b09b4042 1579 "macros_add": ["TARGET_WALLBOT_BLE"]
annieluo2 0:d6c9b09b4042 1580 },
annieluo2 0:d6c9b09b4042 1581 "DELTA_DFCM_NNN40": {
annieluo2 0:d6c9b09b4042 1582 "inherits": ["MCU_NRF51_32K"],
annieluo2 0:d6c9b09b4042 1583 "program_cycle_s": 10,
annieluo2 0:d6c9b09b4042 1584 "macros_add": ["TARGET_NRF_LFCLK_RC"],
annieluo2 0:d6c9b09b4042 1585 "device_has": ["ANALOGIN", "DEBUG_AWARENESS", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 1586 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 1587 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1588 },
annieluo2 0:d6c9b09b4042 1589 "DELTA_DFCM_NNN40_BOOT": {
annieluo2 0:d6c9b09b4042 1590 "inherits": ["MCU_NRF51_32K_BOOT"],
annieluo2 0:d6c9b09b4042 1591 "program_cycle_s": 10,
annieluo2 0:d6c9b09b4042 1592 "extra_labels_add": ["DELTA_DFCM_NNN40"],
annieluo2 0:d6c9b09b4042 1593 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1594 },
annieluo2 0:d6c9b09b4042 1595 "DELTA_DFCM_NNN40_OTA": {
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annieluo2 0:d6c9b09b4042 1597 "program_cycle_s": 10,
annieluo2 0:d6c9b09b4042 1598 "extra_labels_add": ["DELTA_DFCM_NNN40"],
annieluo2 0:d6c9b09b4042 1599 "macros_add": ["TARGET_DELTA_DFCM_NNN40", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1600 },
annieluo2 0:d6c9b09b4042 1601 "NRF51_DK_LEGACY": {
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annieluo2 0:d6c9b09b4042 1605 },
annieluo2 0:d6c9b09b4042 1606 "NRF51_DK_BOOT": {
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annieluo2 0:d6c9b09b4042 1611 },
annieluo2 0:d6c9b09b4042 1612 "NRF51_DK_OTA": {
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annieluo2 0:d6c9b09b4042 1617 },
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annieluo2 0:d6c9b09b4042 1622 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1623 },
annieluo2 0:d6c9b09b4042 1624 "NRF51_DONGLE_BOOT": {
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annieluo2 0:d6c9b09b4042 1632 "macros_add": ["TARGET_NRF51_DONGLE"]
annieluo2 0:d6c9b09b4042 1633 },
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annieluo2 0:d6c9b09b4042 1636 "macros_add": ["TARGET_NRF_LFCLK_RC"],
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annieluo2 0:d6c9b09b4042 1638 "device_name": "nRF51822_xxAA"
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annieluo2 0:d6c9b09b4042 1640 "NRF51_MICROBIT_BOOT": {
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annieluo2 0:d6c9b09b4042 1642 "extra_labels_add": ["NRF51_MICROBIT"],
annieluo2 0:d6c9b09b4042 1643 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1644 },
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annieluo2 0:d6c9b09b4042 1647 "extra_labels_add": ["NRF51_MICROBIT"],
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annieluo2 0:d6c9b09b4042 1649 },
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annieluo2 0:d6c9b09b4042 1652 "extra_labels_add": ["NRF51_MICROBIT"],
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annieluo2 0:d6c9b09b4042 1655 },
annieluo2 0:d6c9b09b4042 1656 "NRF51_MICROBIT_B_BOOT": {
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annieluo2 0:d6c9b09b4042 1658 "extra_labels_add": ["NRF51_MICROBIT"],
annieluo2 0:d6c9b09b4042 1659 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1660 },
annieluo2 0:d6c9b09b4042 1661 "NRF51_MICROBIT_B_OTA": {
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annieluo2 0:d6c9b09b4042 1663 "extra_labels_add": ["NRF51_MICROBIT"],
annieluo2 0:d6c9b09b4042 1664 "macros_add": ["TARGET_NRF51_MICROBIT", "TARGET_NRF_LFCLK_RC"]
annieluo2 0:d6c9b09b4042 1665 },
annieluo2 0:d6c9b09b4042 1666 "MTM_MTCONNECT04S": {
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annieluo2 0:d6c9b09b4042 1668 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 1669 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1670 },
annieluo2 0:d6c9b09b4042 1671 "MTM_MTCONNECT04S_BOOT": {
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annieluo2 0:d6c9b09b4042 1673 "extra_labels_add": ["MTM_CONNECT04S"],
annieluo2 0:d6c9b09b4042 1674 "macros_add": ["TARGET_MTM_CONNECT04S"]
annieluo2 0:d6c9b09b4042 1675 },
annieluo2 0:d6c9b09b4042 1676 "MTM_MTCONNECT04S_OTA": {
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annieluo2 0:d6c9b09b4042 1679 "macros_add": ["TARGET_MTM_CONNECT04S"]
annieluo2 0:d6c9b09b4042 1680 },
annieluo2 0:d6c9b09b4042 1681 "TY51822R3": {
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annieluo2 0:d6c9b09b4042 1683 "macros_add": ["TARGET_NRF_32MHZ_XTAL"],
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annieluo2 0:d6c9b09b4042 1687 "overrides": {"uart_hwfc": 0},
annieluo2 0:d6c9b09b4042 1688 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 1689 },
annieluo2 0:d6c9b09b4042 1690 "TY51822R3_BOOT": {
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annieluo2 0:d6c9b09b4042 1693 "macros_add": ["TARGET_TY51822R3", "TARGET_NRF_32MHZ_XTAL"]
annieluo2 0:d6c9b09b4042 1694 },
annieluo2 0:d6c9b09b4042 1695 "TY51822R3_OTA": {
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annieluo2 0:d6c9b09b4042 1699 },
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annieluo2 0:d6c9b09b4042 1749 "ARM_MPS2_M7": {
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annieluo2 0:d6c9b09b4042 1763 "ARM_IOTSS_BEID": {
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annieluo2 0:d6c9b09b4042 1772 "ARM_BEETLE_SOC": {
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annieluo2 0:d6c9b09b4042 1782 "device_name": "beetle"
annieluo2 0:d6c9b09b4042 1783 },
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annieluo2 0:d6c9b09b4042 1788 "extra_labels": ["RENESAS", "MBRZA1H"],
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annieluo2 0:d6c9b09b4042 1794 "device_name": "r7s721001"
annieluo2 0:d6c9b09b4042 1795 },
annieluo2 0:d6c9b09b4042 1796 "VK_RZ_A1H": {
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annieluo2 0:d6c9b09b4042 1798 "core": "Cortex-A9",
annieluo2 0:d6c9b09b4042 1799 "extra_labels": ["RENESAS", "VKRZA1H"],
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annieluo2 0:d6c9b09b4042 1804 "features": ["LWIP"],
annieluo2 0:d6c9b09b4042 1805 "default_lib": "std",
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annieluo2 0:d6c9b09b4042 1807 },
annieluo2 0:d6c9b09b4042 1808 "MAXWSNENV": {
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annieluo2 0:d6c9b09b4042 1810 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 1811 "macros": ["__SYSTEM_HFX=24000000"],
annieluo2 0:d6c9b09b4042 1812 "extra_labels": ["Maxim", "MAX32610"],
annieluo2 0:d6c9b09b4042 1813 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
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annieluo2 0:d6c9b09b4042 1817 },
annieluo2 0:d6c9b09b4042 1818 "MAX32600MBED": {
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annieluo2 0:d6c9b09b4042 1820 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 1821 "macros": ["__SYSTEM_HFX=24000000"],
annieluo2 0:d6c9b09b4042 1822 "extra_labels": ["Maxim", "MAX32600"],
annieluo2 0:d6c9b09b4042 1823 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
annieluo2 0:d6c9b09b4042 1824 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1825 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 1826 "device_name": "max326000x85"
annieluo2 0:d6c9b09b4042 1827 },
annieluo2 0:d6c9b09b4042 1828 "MAX32620HSP": {
annieluo2 0:d6c9b09b4042 1829 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 1830 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 1831 "extra_labels": ["Maxim", "MAX32620"],
annieluo2 0:d6c9b09b4042 1832 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
annieluo2 0:d6c9b09b4042 1833 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1834 "features": ["BLE"],
annieluo2 0:d6c9b09b4042 1835 "release_versions": ["2", "5"]
annieluo2 0:d6c9b09b4042 1836 },
annieluo2 0:d6c9b09b4042 1837 "MAX32625MBED": {
annieluo2 0:d6c9b09b4042 1838 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 1839 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 1840 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
annieluo2 0:d6c9b09b4042 1841 "extra_labels": ["Maxim", "MAX32625"],
annieluo2 0:d6c9b09b4042 1842 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
annieluo2 0:d6c9b09b4042 1843 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1844 "release_versions": ["2", "5"]
annieluo2 0:d6c9b09b4042 1845 },
annieluo2 0:d6c9b09b4042 1846 "MAX32625NEXPAQ": {
annieluo2 0:d6c9b09b4042 1847 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 1848 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 1849 "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32625","TARGET_REV=0x4132"],
annieluo2 0:d6c9b09b4042 1850 "extra_labels": ["Maxim", "MAX32625"],
annieluo2 0:d6c9b09b4042 1851 "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
annieluo2 0:d6c9b09b4042 1852 "device_has": ["ANALOGIN", "ERROR_RED", "I2C", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1853 "release_versions": ["2", "5"]
annieluo2 0:d6c9b09b4042 1854 },
annieluo2 0:d6c9b09b4042 1855 "EFM32": {
annieluo2 0:d6c9b09b4042 1856 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 1857 "extra_labels": ["Silicon_Labs", "EFM32"],
annieluo2 0:d6c9b09b4042 1858 "public": false
annieluo2 0:d6c9b09b4042 1859 },
annieluo2 0:d6c9b09b4042 1860 "EFM32GG990F1024": {
annieluo2 0:d6c9b09b4042 1861 "inherits": ["EFM32"],
annieluo2 0:d6c9b09b4042 1862 "extra_labels_add": ["EFM32GG", "1024K"],
annieluo2 0:d6c9b09b4042 1863 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 1864 "macros": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
annieluo2 0:d6c9b09b4042 1865 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
annieluo2 0:d6c9b09b4042 1866 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 1867 "device_name": "EFM32GG990F1024",
annieluo2 0:d6c9b09b4042 1868 "public": false
annieluo2 0:d6c9b09b4042 1869 },
annieluo2 0:d6c9b09b4042 1870 "EFM32GG_STK3700": {
annieluo2 0:d6c9b09b4042 1871 "inherits": ["EFM32GG990F1024"],
annieluo2 0:d6c9b09b4042 1872 "progen": {"target": "efm32gg-stk"},
annieluo2 0:d6c9b09b4042 1873 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1874 "forced_reset_timeout": 2,
annieluo2 0:d6c9b09b4042 1875 "config": {
annieluo2 0:d6c9b09b4042 1876 "hf_clock_src": {
annieluo2 0:d6c9b09b4042 1877 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
annieluo2 0:d6c9b09b4042 1878 "value": "HFXO",
annieluo2 0:d6c9b09b4042 1879 "macro_name": "CORE_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 1880 },
annieluo2 0:d6c9b09b4042 1881 "hfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 1882 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 1883 "value": "48000000",
annieluo2 0:d6c9b09b4042 1884 "macro_name": "HFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1885 },
annieluo2 0:d6c9b09b4042 1886 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 1887 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
annieluo2 0:d6c9b09b4042 1888 "value": "LFXO",
annieluo2 0:d6c9b09b4042 1889 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 1890 },
annieluo2 0:d6c9b09b4042 1891 "lfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 1892 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 1893 "value": "32768",
annieluo2 0:d6c9b09b4042 1894 "macro_name": "LFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1895 },
annieluo2 0:d6c9b09b4042 1896 "hfrco_clock_freq": {
annieluo2 0:d6c9b09b4042 1897 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
annieluo2 0:d6c9b09b4042 1898 "value": "21000000",
annieluo2 0:d6c9b09b4042 1899 "macro_name": "HFRCO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1900 },
annieluo2 0:d6c9b09b4042 1901 "hfrco_band_select": {
annieluo2 0:d6c9b09b4042 1902 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
annieluo2 0:d6c9b09b4042 1903 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
annieluo2 0:d6c9b09b4042 1904 "macro_name": "HFRCO_FREQUENCY_ENUM"
annieluo2 0:d6c9b09b4042 1905 }
annieluo2 0:d6c9b09b4042 1906 }
annieluo2 0:d6c9b09b4042 1907 },
annieluo2 0:d6c9b09b4042 1908 "EFM32LG990F256": {
annieluo2 0:d6c9b09b4042 1909 "inherits": ["EFM32"],
annieluo2 0:d6c9b09b4042 1910 "extra_labels_add": ["EFM32LG", "256K"],
annieluo2 0:d6c9b09b4042 1911 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 1912 "macros": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
annieluo2 0:d6c9b09b4042 1913 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
annieluo2 0:d6c9b09b4042 1914 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 1915 "device_name": "EFM32LG990F256",
annieluo2 0:d6c9b09b4042 1916 "public": false
annieluo2 0:d6c9b09b4042 1917 },
annieluo2 0:d6c9b09b4042 1918 "EFM32LG_STK3600": {
annieluo2 0:d6c9b09b4042 1919 "inherits": ["EFM32LG990F256"],
annieluo2 0:d6c9b09b4042 1920 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1921 "forced_reset_timeout": 2,
annieluo2 0:d6c9b09b4042 1922 "device_name": "EFM32LG990F256",
annieluo2 0:d6c9b09b4042 1923 "config": {
annieluo2 0:d6c9b09b4042 1924 "hf_clock_src": {
annieluo2 0:d6c9b09b4042 1925 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
annieluo2 0:d6c9b09b4042 1926 "value": "HFXO",
annieluo2 0:d6c9b09b4042 1927 "macro_name": "CORE_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 1928 },
annieluo2 0:d6c9b09b4042 1929 "hfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 1930 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 1931 "value": "48000000",
annieluo2 0:d6c9b09b4042 1932 "macro_name": "HFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1933 },
annieluo2 0:d6c9b09b4042 1934 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 1935 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
annieluo2 0:d6c9b09b4042 1936 "value": "LFXO",
annieluo2 0:d6c9b09b4042 1937 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 1938 },
annieluo2 0:d6c9b09b4042 1939 "lfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 1940 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 1941 "value": "32768",
annieluo2 0:d6c9b09b4042 1942 "macro_name": "LFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1943 },
annieluo2 0:d6c9b09b4042 1944 "hfrco_clock_freq": {
annieluo2 0:d6c9b09b4042 1945 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
annieluo2 0:d6c9b09b4042 1946 "value": "21000000",
annieluo2 0:d6c9b09b4042 1947 "macro_name": "HFRCO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1948 },
annieluo2 0:d6c9b09b4042 1949 "hfrco_band_select": {
annieluo2 0:d6c9b09b4042 1950 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
annieluo2 0:d6c9b09b4042 1951 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
annieluo2 0:d6c9b09b4042 1952 "macro_name": "HFRCO_FREQUENCY_ENUM"
annieluo2 0:d6c9b09b4042 1953 }
annieluo2 0:d6c9b09b4042 1954 }
annieluo2 0:d6c9b09b4042 1955 },
annieluo2 0:d6c9b09b4042 1956 "EFM32WG990F256": {
annieluo2 0:d6c9b09b4042 1957 "inherits": ["EFM32"],
annieluo2 0:d6c9b09b4042 1958 "extra_labels_add": ["EFM32WG", "256K"],
annieluo2 0:d6c9b09b4042 1959 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 1960 "macros": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
annieluo2 0:d6c9b09b4042 1961 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
annieluo2 0:d6c9b09b4042 1962 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 1963 "device_name": "EFM32WG990F256",
annieluo2 0:d6c9b09b4042 1964 "public": false
annieluo2 0:d6c9b09b4042 1965 },
annieluo2 0:d6c9b09b4042 1966 "EFM32WG_STK3800": {
annieluo2 0:d6c9b09b4042 1967 "inherits": ["EFM32WG990F256"],
annieluo2 0:d6c9b09b4042 1968 "progen": {"target": "efm32wg-stk"},
annieluo2 0:d6c9b09b4042 1969 "device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 1970 "forced_reset_timeout": 2,
annieluo2 0:d6c9b09b4042 1971 "config": {
annieluo2 0:d6c9b09b4042 1972 "hf_clock_src": {
annieluo2 0:d6c9b09b4042 1973 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
annieluo2 0:d6c9b09b4042 1974 "value": "HFXO",
annieluo2 0:d6c9b09b4042 1975 "macro_name": "CORE_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 1976 },
annieluo2 0:d6c9b09b4042 1977 "hfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 1978 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 1979 "value": "48000000",
annieluo2 0:d6c9b09b4042 1980 "macro_name": "HFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1981 },
annieluo2 0:d6c9b09b4042 1982 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 1983 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
annieluo2 0:d6c9b09b4042 1984 "value": "LFXO",
annieluo2 0:d6c9b09b4042 1985 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 1986 },
annieluo2 0:d6c9b09b4042 1987 "lfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 1988 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 1989 "value": "32768",
annieluo2 0:d6c9b09b4042 1990 "macro_name": "LFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1991 },
annieluo2 0:d6c9b09b4042 1992 "hfrco_clock_freq": {
annieluo2 0:d6c9b09b4042 1993 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
annieluo2 0:d6c9b09b4042 1994 "value": "21000000",
annieluo2 0:d6c9b09b4042 1995 "macro_name": "HFRCO_FREQUENCY"
annieluo2 0:d6c9b09b4042 1996 },
annieluo2 0:d6c9b09b4042 1997 "hfrco_band_select": {
annieluo2 0:d6c9b09b4042 1998 "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
annieluo2 0:d6c9b09b4042 1999 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
annieluo2 0:d6c9b09b4042 2000 "macro_name": "HFRCO_FREQUENCY_ENUM"
annieluo2 0:d6c9b09b4042 2001 }
annieluo2 0:d6c9b09b4042 2002 }
annieluo2 0:d6c9b09b4042 2003 },
annieluo2 0:d6c9b09b4042 2004 "EFM32ZG222F32": {
annieluo2 0:d6c9b09b4042 2005 "inherits": ["EFM32"],
annieluo2 0:d6c9b09b4042 2006 "extra_labels_add": ["EFM32ZG", "32K"],
annieluo2 0:d6c9b09b4042 2007 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 2008 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 2009 "macros": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
annieluo2 0:d6c9b09b4042 2010 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
annieluo2 0:d6c9b09b4042 2011 "default_lib": "small",
annieluo2 0:d6c9b09b4042 2012 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 2013 "device_name": "EFM32ZG222F32",
annieluo2 0:d6c9b09b4042 2014 "public": false
annieluo2 0:d6c9b09b4042 2015 },
annieluo2 0:d6c9b09b4042 2016 "EFM32ZG_STK3200": {
annieluo2 0:d6c9b09b4042 2017 "inherits": ["EFM32ZG222F32"],
annieluo2 0:d6c9b09b4042 2018 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2019 "forced_reset_timeout": 2,
annieluo2 0:d6c9b09b4042 2020 "config": {
annieluo2 0:d6c9b09b4042 2021 "hf_clock_src": {
annieluo2 0:d6c9b09b4042 2022 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
annieluo2 0:d6c9b09b4042 2023 "value": "HFXO",
annieluo2 0:d6c9b09b4042 2024 "macro_name": "CORE_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 2025 },
annieluo2 0:d6c9b09b4042 2026 "hfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 2027 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 2028 "value": "24000000",
annieluo2 0:d6c9b09b4042 2029 "macro_name": "HFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2030 },
annieluo2 0:d6c9b09b4042 2031 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 2032 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
annieluo2 0:d6c9b09b4042 2033 "value": "LFXO",
annieluo2 0:d6c9b09b4042 2034 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 2035 },
annieluo2 0:d6c9b09b4042 2036 "lfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 2037 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 2038 "value": "32768",
annieluo2 0:d6c9b09b4042 2039 "macro_name": "LFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2040 },
annieluo2 0:d6c9b09b4042 2041 "hfrco_clock_freq": {
annieluo2 0:d6c9b09b4042 2042 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
annieluo2 0:d6c9b09b4042 2043 "value": "21000000",
annieluo2 0:d6c9b09b4042 2044 "macro_name": "HFRCO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2045 },
annieluo2 0:d6c9b09b4042 2046 "hfrco_band_select": {
annieluo2 0:d6c9b09b4042 2047 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
annieluo2 0:d6c9b09b4042 2048 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
annieluo2 0:d6c9b09b4042 2049 "macro_name": "HFRCO_FREQUENCY_ENUM"
annieluo2 0:d6c9b09b4042 2050 }
annieluo2 0:d6c9b09b4042 2051 }
annieluo2 0:d6c9b09b4042 2052 },
annieluo2 0:d6c9b09b4042 2053 "EFM32HG322F64": {
annieluo2 0:d6c9b09b4042 2054 "inherits": ["EFM32"],
annieluo2 0:d6c9b09b4042 2055 "extra_labels_add": ["EFM32HG", "64K"],
annieluo2 0:d6c9b09b4042 2056 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 2057 "default_toolchain": "uARM",
annieluo2 0:d6c9b09b4042 2058 "macros": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
annieluo2 0:d6c9b09b4042 2059 "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
annieluo2 0:d6c9b09b4042 2060 "default_lib": "small",
annieluo2 0:d6c9b09b4042 2061 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 2062 "device_name": "EFM32HG322F64",
annieluo2 0:d6c9b09b4042 2063 "public": false
annieluo2 0:d6c9b09b4042 2064 },
annieluo2 0:d6c9b09b4042 2065 "EFM32HG_STK3400": {
annieluo2 0:d6c9b09b4042 2066 "inherits": ["EFM32HG322F64"],
annieluo2 0:d6c9b09b4042 2067 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2068 "forced_reset_timeout": 2,
annieluo2 0:d6c9b09b4042 2069 "config": {
annieluo2 0:d6c9b09b4042 2070 "hf_clock_src": {
annieluo2 0:d6c9b09b4042 2071 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
annieluo2 0:d6c9b09b4042 2072 "value": "HFXO",
annieluo2 0:d6c9b09b4042 2073 "macro_name": "CORE_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 2074 },
annieluo2 0:d6c9b09b4042 2075 "hfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 2076 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 2077 "value": "24000000",
annieluo2 0:d6c9b09b4042 2078 "macro_name": "HFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2079 },
annieluo2 0:d6c9b09b4042 2080 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 2081 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
annieluo2 0:d6c9b09b4042 2082 "value": "LFXO",
annieluo2 0:d6c9b09b4042 2083 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 2084 },
annieluo2 0:d6c9b09b4042 2085 "lfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 2086 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 2087 "value": "32768",
annieluo2 0:d6c9b09b4042 2088 "macro_name": "LFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2089 },
annieluo2 0:d6c9b09b4042 2090 "hfrco_clock_freq": {
annieluo2 0:d6c9b09b4042 2091 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
annieluo2 0:d6c9b09b4042 2092 "value": "21000000",
annieluo2 0:d6c9b09b4042 2093 "macro_name": "HFRCO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2094 },
annieluo2 0:d6c9b09b4042 2095 "hfrco_band_select": {
annieluo2 0:d6c9b09b4042 2096 "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
annieluo2 0:d6c9b09b4042 2097 "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
annieluo2 0:d6c9b09b4042 2098 "macro_name": "HFRCO_FREQUENCY_ENUM"
annieluo2 0:d6c9b09b4042 2099 }
annieluo2 0:d6c9b09b4042 2100 }
annieluo2 0:d6c9b09b4042 2101 },
annieluo2 0:d6c9b09b4042 2102 "EFM32PG1B100F256GM32": {
annieluo2 0:d6c9b09b4042 2103 "inherits": ["EFM32"],
annieluo2 0:d6c9b09b4042 2104 "extra_labels_add": ["EFM32PG", "256K"],
annieluo2 0:d6c9b09b4042 2105 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 2106 "macros": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
annieluo2 0:d6c9b09b4042 2107 "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
annieluo2 0:d6c9b09b4042 2108 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 2109 "device_name": "EFM32PG1B100F256GM32",
annieluo2 0:d6c9b09b4042 2110 "public": false
annieluo2 0:d6c9b09b4042 2111 },
annieluo2 0:d6c9b09b4042 2112 "EFM32PG_STK3401": {
annieluo2 0:d6c9b09b4042 2113 "inherits": ["EFM32PG1B100F256GM32"],
annieluo2 0:d6c9b09b4042 2114 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2115 "forced_reset_timeout": 2,
annieluo2 0:d6c9b09b4042 2116 "config": {
annieluo2 0:d6c9b09b4042 2117 "hf_clock_src": {
annieluo2 0:d6c9b09b4042 2118 "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
annieluo2 0:d6c9b09b4042 2119 "value": "HFXO",
annieluo2 0:d6c9b09b4042 2120 "macro_name": "CORE_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 2121 },
annieluo2 0:d6c9b09b4042 2122 "hfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 2123 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 2124 "value": "40000000",
annieluo2 0:d6c9b09b4042 2125 "macro_name": "HFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2126 },
annieluo2 0:d6c9b09b4042 2127 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 2128 "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
annieluo2 0:d6c9b09b4042 2129 "value": "LFXO",
annieluo2 0:d6c9b09b4042 2130 "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
annieluo2 0:d6c9b09b4042 2131 },
annieluo2 0:d6c9b09b4042 2132 "lfxo_clock_freq": {
annieluo2 0:d6c9b09b4042 2133 "help": "Value: External crystal frequency in hertz",
annieluo2 0:d6c9b09b4042 2134 "value": "32768",
annieluo2 0:d6c9b09b4042 2135 "macro_name": "LFXO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2136 },
annieluo2 0:d6c9b09b4042 2137 "hfrco_clock_freq": {
annieluo2 0:d6c9b09b4042 2138 "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
annieluo2 0:d6c9b09b4042 2139 "value": "32000000",
annieluo2 0:d6c9b09b4042 2140 "macro_name": "HFRCO_FREQUENCY"
annieluo2 0:d6c9b09b4042 2141 },
annieluo2 0:d6c9b09b4042 2142 "hfrco_band_select": {
annieluo2 0:d6c9b09b4042 2143 "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
annieluo2 0:d6c9b09b4042 2144 "value": "cmuHFRCOFreq_32M0Hz",
annieluo2 0:d6c9b09b4042 2145 "macro_name": "HFRCO_FREQUENCY_ENUM"
annieluo2 0:d6c9b09b4042 2146 }
annieluo2 0:d6c9b09b4042 2147 }
annieluo2 0:d6c9b09b4042 2148 },
annieluo2 0:d6c9b09b4042 2149 "WIZWIKI_W7500": {
annieluo2 0:d6c9b09b4042 2150 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 2151 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 2152 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
annieluo2 0:d6c9b09b4042 2153 "supported_toolchains": ["uARM", "ARM"],
annieluo2 0:d6c9b09b4042 2154 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2155 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2156 "release_versions": ["2"]
annieluo2 0:d6c9b09b4042 2157 },
annieluo2 0:d6c9b09b4042 2158 "WIZWIKI_W7500P": {
annieluo2 0:d6c9b09b4042 2159 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 2160 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 2161 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
annieluo2 0:d6c9b09b4042 2162 "supported_toolchains": ["uARM", "ARM"],
annieluo2 0:d6c9b09b4042 2163 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2164 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2165 "release_versions": ["2"]
annieluo2 0:d6c9b09b4042 2166 },
annieluo2 0:d6c9b09b4042 2167 "WIZWIKI_W7500ECO": {
annieluo2 0:d6c9b09b4042 2168 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2169 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 2170 "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
annieluo2 0:d6c9b09b4042 2171 "supported_toolchains": ["uARM", "ARM"],
annieluo2 0:d6c9b09b4042 2172 "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2173 "release_versions": ["2"]
annieluo2 0:d6c9b09b4042 2174 },
annieluo2 0:d6c9b09b4042 2175 "SAMR21G18A": {
annieluo2 0:d6c9b09b4042 2176 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2177 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 2178 "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
annieluo2 0:d6c9b09b4042 2179 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
annieluo2 0:d6c9b09b4042 2180 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
annieluo2 0:d6c9b09b4042 2181 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
annieluo2 0:d6c9b09b4042 2182 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 2183 "device_name": "ATSAMR21G18A"
annieluo2 0:d6c9b09b4042 2184 },
annieluo2 0:d6c9b09b4042 2185 "SAMD21J18A": {
annieluo2 0:d6c9b09b4042 2186 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2187 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 2188 "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
annieluo2 0:d6c9b09b4042 2189 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
annieluo2 0:d6c9b09b4042 2190 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
annieluo2 0:d6c9b09b4042 2191 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
annieluo2 0:d6c9b09b4042 2192 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 2193 "device_name" : "ATSAMD21J18A"
annieluo2 0:d6c9b09b4042 2194 },
annieluo2 0:d6c9b09b4042 2195 "SAMD21G18A": {
annieluo2 0:d6c9b09b4042 2196 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2197 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 2198 "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
annieluo2 0:d6c9b09b4042 2199 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
annieluo2 0:d6c9b09b4042 2200 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
annieluo2 0:d6c9b09b4042 2201 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
annieluo2 0:d6c9b09b4042 2202 "release_versions": ["2"],
annieluo2 0:d6c9b09b4042 2203 "device_name": "ATSAMD21G18A"
annieluo2 0:d6c9b09b4042 2204 },
annieluo2 0:d6c9b09b4042 2205 "SAML21J18A": {
annieluo2 0:d6c9b09b4042 2206 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2207 "core": "Cortex-M0+",
annieluo2 0:d6c9b09b4042 2208 "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
annieluo2 0:d6c9b09b4042 2209 "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
annieluo2 0:d6c9b09b4042 2210 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
annieluo2 0:d6c9b09b4042 2211 "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
annieluo2 0:d6c9b09b4042 2212 "device_name": "ATSAML21J18A"
annieluo2 0:d6c9b09b4042 2213 },
annieluo2 0:d6c9b09b4042 2214 "SAMG55J19": {
annieluo2 0:d6c9b09b4042 2215 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2216 "core": "Cortex-M4",
annieluo2 0:d6c9b09b4042 2217 "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
annieluo2 0:d6c9b09b4042 2218 "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
annieluo2 0:d6c9b09b4042 2219 "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
annieluo2 0:d6c9b09b4042 2220 "default_toolchain": "ARM",
annieluo2 0:d6c9b09b4042 2221 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
annieluo2 0:d6c9b09b4042 2222 "default_lib": "std",
annieluo2 0:d6c9b09b4042 2223 "device_name": "ATSAMG55J19"
annieluo2 0:d6c9b09b4042 2224 },
annieluo2 0:d6c9b09b4042 2225 "MCU_NRF51_UNIFIED": {
annieluo2 0:d6c9b09b4042 2226 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2227 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 2228 "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
annieluo2 0:d6c9b09b4042 2229 "macros": [
annieluo2 0:d6c9b09b4042 2230 "NRF51",
annieluo2 0:d6c9b09b4042 2231 "TARGET_NRF51822",
annieluo2 0:d6c9b09b4042 2232 "BLE_STACK_SUPPORT_REQD",
annieluo2 0:d6c9b09b4042 2233 "SOFTDEVICE_PRESENT",
annieluo2 0:d6c9b09b4042 2234 "S130",
annieluo2 0:d6c9b09b4042 2235 "TARGET_MCU_NRF51822"
annieluo2 0:d6c9b09b4042 2236 ],
annieluo2 0:d6c9b09b4042 2237 "MERGE_BOOTLOADER": false,
annieluo2 0:d6c9b09b4042 2238 "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822_UNIFIED", "NRF5"],
annieluo2 0:d6c9b09b4042 2239 "OUTPUT_EXT": "hex",
annieluo2 0:d6c9b09b4042 2240 "is_disk_virtual": true,
annieluo2 0:d6c9b09b4042 2241 "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 2242 "public": false,
annieluo2 0:d6c9b09b4042 2243 "MERGE_SOFT_DEVICE": true,
annieluo2 0:d6c9b09b4042 2244 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
annieluo2 0:d6c9b09b4042 2245 {
annieluo2 0:d6c9b09b4042 2246 "boot": "",
annieluo2 0:d6c9b09b4042 2247 "name": "s130_nrf51_2.0.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 2248 "offset": 110592
annieluo2 0:d6c9b09b4042 2249 }
annieluo2 0:d6c9b09b4042 2250 ],
annieluo2 0:d6c9b09b4042 2251 "detect_code": ["1070"],
annieluo2 0:d6c9b09b4042 2252 "post_binary_hook": {
annieluo2 0:d6c9b09b4042 2253 "function": "MCU_NRF51Code.binary_hook",
annieluo2 0:d6c9b09b4042 2254 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
annieluo2 0:d6c9b09b4042 2255 },
annieluo2 0:d6c9b09b4042 2256 "program_cycle_s": 6,
annieluo2 0:d6c9b09b4042 2257 "features": ["BLE"],
annieluo2 0:d6c9b09b4042 2258 "config": {
annieluo2 0:d6c9b09b4042 2259 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 2260 "value": "NRF_LF_SRC_XTAL",
annieluo2 0:d6c9b09b4042 2261 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
annieluo2 0:d6c9b09b4042 2262 },
annieluo2 0:d6c9b09b4042 2263 "uart_hwfc": {
annieluo2 0:d6c9b09b4042 2264 "help": "Value: 1 for enable, 0 for disable",
annieluo2 0:d6c9b09b4042 2265 "value": 1,
annieluo2 0:d6c9b09b4042 2266 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
annieluo2 0:d6c9b09b4042 2267 }
annieluo2 0:d6c9b09b4042 2268 },
annieluo2 0:d6c9b09b4042 2269 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
annieluo2 0:d6c9b09b4042 2270 },
annieluo2 0:d6c9b09b4042 2271 "MCU_NRF51_32K_UNIFIED": {
annieluo2 0:d6c9b09b4042 2272 "inherits": ["MCU_NRF51_UNIFIED"],
annieluo2 0:d6c9b09b4042 2273 "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
annieluo2 0:d6c9b09b4042 2274 "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
annieluo2 0:d6c9b09b4042 2275 "public": false
annieluo2 0:d6c9b09b4042 2276 },
annieluo2 0:d6c9b09b4042 2277 "NRF51_DK": {
annieluo2 0:d6c9b09b4042 2278 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 2279 "inherits": ["MCU_NRF51_32K_UNIFIED"],
annieluo2 0:d6c9b09b4042 2280 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 2281 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 2282 "device_name": "nRF51822_xxAA"
annieluo2 0:d6c9b09b4042 2283 },
annieluo2 0:d6c9b09b4042 2284 "NRF51_DONGLE": {
annieluo2 0:d6c9b09b4042 2285 "inherits": ["MCU_NRF51_32K_UNIFIED"],
annieluo2 0:d6c9b09b4042 2286 "progen": {"target": "nrf51-dongle"},
annieluo2 0:d6c9b09b4042 2287 "device_has": ["ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 2288 "release_versions": ["2", "5"]
annieluo2 0:d6c9b09b4042 2289 },
annieluo2 0:d6c9b09b4042 2290 "MCU_NRF52": {
annieluo2 0:d6c9b09b4042 2291 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2292 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 2293 "macros": ["NRF52", "TARGET_NRF52832", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S132"],
annieluo2 0:d6c9b09b4042 2294 "extra_labels": ["NORDIC", "MCU_NRF52", "MCU_NRF52832", "NRF5"],
annieluo2 0:d6c9b09b4042 2295 "OUTPUT_EXT": "hex",
annieluo2 0:d6c9b09b4042 2296 "is_disk_virtual": true,
annieluo2 0:d6c9b09b4042 2297 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
annieluo2 0:d6c9b09b4042 2298 "public": false,
annieluo2 0:d6c9b09b4042 2299 "detect_code": ["1101"],
annieluo2 0:d6c9b09b4042 2300 "program_cycle_s": 6,
annieluo2 0:d6c9b09b4042 2301 "MERGE_SOFT_DEVICE": true,
annieluo2 0:d6c9b09b4042 2302 "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
annieluo2 0:d6c9b09b4042 2303 {
annieluo2 0:d6c9b09b4042 2304 "boot": "",
annieluo2 0:d6c9b09b4042 2305 "name": "s132_nrf52_2.0.0_softdevice.hex",
annieluo2 0:d6c9b09b4042 2306 "offset": 114688
annieluo2 0:d6c9b09b4042 2307 }
annieluo2 0:d6c9b09b4042 2308 ],
annieluo2 0:d6c9b09b4042 2309 "post_binary_hook": {
annieluo2 0:d6c9b09b4042 2310 "function": "MCU_NRF51Code.binary_hook",
annieluo2 0:d6c9b09b4042 2311 "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
annieluo2 0:d6c9b09b4042 2312 },
annieluo2 0:d6c9b09b4042 2313 "MERGE_BOOTLOADER": false,
annieluo2 0:d6c9b09b4042 2314 "features": ["BLE"],
annieluo2 0:d6c9b09b4042 2315 "config": {
annieluo2 0:d6c9b09b4042 2316 "lf_clock_src": {
annieluo2 0:d6c9b09b4042 2317 "value": "NRF_LF_SRC_XTAL",
annieluo2 0:d6c9b09b4042 2318 "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
annieluo2 0:d6c9b09b4042 2319 },
annieluo2 0:d6c9b09b4042 2320 "uart_hwfc": {
annieluo2 0:d6c9b09b4042 2321 "help": "Value: 1 for enable, 0 for disable",
annieluo2 0:d6c9b09b4042 2322 "value": 1,
annieluo2 0:d6c9b09b4042 2323 "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
annieluo2 0:d6c9b09b4042 2324 }
annieluo2 0:d6c9b09b4042 2325 }
annieluo2 0:d6c9b09b4042 2326 },
annieluo2 0:d6c9b09b4042 2327 "NRF52_DK": {
annieluo2 0:d6c9b09b4042 2328 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 2329 "inherits": ["MCU_NRF52"],
annieluo2 0:d6c9b09b4042 2330 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
annieluo2 0:d6c9b09b4042 2331 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 2332 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 2333 "device_name": "nRF52832_xxAA"
annieluo2 0:d6c9b09b4042 2334 },
annieluo2 0:d6c9b09b4042 2335 "DELTA_DFBM_NQ620": {
annieluo2 0:d6c9b09b4042 2336 "supported_form_factors": ["ARDUINO"],
annieluo2 0:d6c9b09b4042 2337 "inherits": ["MCU_NRF52"],
annieluo2 0:d6c9b09b4042 2338 "macros_add": ["BOARD_PCA10040", "NRF52_PAN_12", "NRF52_PAN_15", "NRF52_PAN_58", "NRF52_PAN_55", "NRF52_PAN_54", "NRF52_PAN_31", "NRF52_PAN_30", "NRF52_PAN_51", "NRF52_PAN_36", "NRF52_PAN_53", "S132", "CONFIG_GPIO_AS_PINRESET", "BLE_STACK_SUPPORT_REQD", "SWI_DISABLE0", "NRF52_PAN_20", "NRF52_PAN_64", "NRF52_PAN_62", "NRF52_PAN_63"],
annieluo2 0:d6c9b09b4042 2339 "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
annieluo2 0:d6c9b09b4042 2340 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 2341 "device_name": "nRF52832_xxAA"
annieluo2 0:d6c9b09b4042 2342 },
annieluo2 0:d6c9b09b4042 2343 "BLUEPILL_F103C8": {
annieluo2 0:d6c9b09b4042 2344 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 2345 "default_toolchain": "GCC_ARM",
annieluo2 0:d6c9b09b4042 2346 "extra_labels": ["STM", "STM32F1", "STM32F103C8"],
annieluo2 0:d6c9b09b4042 2347 "supported_toolchains": ["GCC_ARM"],
annieluo2 0:d6c9b09b4042 2348 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2349 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
annieluo2 0:d6c9b09b4042 2350 },
annieluo2 0:d6c9b09b4042 2351 "NUMAKER_PFM_NUC472": {
annieluo2 0:d6c9b09b4042 2352 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 2353 "default_toolchain": "ARM",
annieluo2 0:d6c9b09b4042 2354 "extra_labels": ["NUVOTON", "NUC472", "NUMAKER_PFM_NUC472"],
annieluo2 0:d6c9b09b4042 2355 "is_disk_virtual": true,
annieluo2 0:d6c9b09b4042 2356 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 2357 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2358 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN"],
annieluo2 0:d6c9b09b4042 2359 "features": ["LWIP"],
annieluo2 0:d6c9b09b4042 2360 "release_versions": ["5"],
annieluo2 0:d6c9b09b4042 2361 "device_name": "NUC472HI8AE"
annieluo2 0:d6c9b09b4042 2362 },
annieluo2 0:d6c9b09b4042 2363 "NCS36510": {
annieluo2 0:d6c9b09b4042 2364 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2365 "core": "Cortex-M3",
annieluo2 0:d6c9b09b4042 2366 "extra_labels": ["ONSEMI"],
annieluo2 0:d6c9b09b4042 2367 "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
annieluo2 0:d6c9b09b4042 2368 "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
annieluo2 0:d6c9b09b4042 2369 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
annieluo2 0:d6c9b09b4042 2370 "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "LOWPOWERTIMER", "TRNG"],
annieluo2 0:d6c9b09b4042 2371 "device_name": "NCS36510",
annieluo2 0:d6c9b09b4042 2372 "release_versions": ["2", "5"]
annieluo2 0:d6c9b09b4042 2373 },
annieluo2 0:d6c9b09b4042 2374 "NUMAKER_PFM_M453": {
annieluo2 0:d6c9b09b4042 2375 "core": "Cortex-M4F",
annieluo2 0:d6c9b09b4042 2376 "default_toolchain": "ARM",
annieluo2 0:d6c9b09b4042 2377 "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453"],
annieluo2 0:d6c9b09b4042 2378 "is_disk_virtual": true,
annieluo2 0:d6c9b09b4042 2379 "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
annieluo2 0:d6c9b09b4042 2380 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2381 "progen": {"target": "numaker-pfm-m453"},
annieluo2 0:d6c9b09b4042 2382 "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN"],
annieluo2 0:d6c9b09b4042 2383 "release_versions": ["2", "5"],
annieluo2 0:d6c9b09b4042 2384 "device_name": "M453VG6AE"
annieluo2 0:d6c9b09b4042 2385 },
annieluo2 0:d6c9b09b4042 2386 "HI2110": {
annieluo2 0:d6c9b09b4042 2387 "inherits": ["Target"],
annieluo2 0:d6c9b09b4042 2388 "core": "Cortex-M0",
annieluo2 0:d6c9b09b4042 2389 "default_toolchain": "GCC_ARM",
annieluo2 0:d6c9b09b4042 2390 "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
annieluo2 0:d6c9b09b4042 2391 "extra_labels": ["ublox"],
annieluo2 0:d6c9b09b4042 2392 "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1"],
annieluo2 0:d6c9b09b4042 2393 "public": false,
annieluo2 0:d6c9b09b4042 2394 "target_overrides": {
annieluo2 0:d6c9b09b4042 2395 "*": {
annieluo2 0:d6c9b09b4042 2396 "core.stdio-flush-at-exit": false
annieluo2 0:d6c9b09b4042 2397 }
annieluo2 0:d6c9b09b4042 2398 },
annieluo2 0:d6c9b09b4042 2399 "device_has": ["INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
annieluo2 0:d6c9b09b4042 2400 "default_lib": "std",
annieluo2 0:d6c9b09b4042 2401 "release_versions": ["5"]
annieluo2 0:d6c9b09b4042 2402 },
annieluo2 0:d6c9b09b4042 2403 "SARA_NBIOT": {
annieluo2 0:d6c9b09b4042 2404 "inherits": ["HI2110"],
annieluo2 0:d6c9b09b4042 2405 "extra_labels": ["ublox", "HI2110"],
annieluo2 0:d6c9b09b4042 2406 "public": false
annieluo2 0:d6c9b09b4042 2407 },
annieluo2 0:d6c9b09b4042 2408 "SARA_NBIOT_EVK": {
annieluo2 0:d6c9b09b4042 2409 "inherits": ["SARA_NBIOT"],
annieluo2 0:d6c9b09b4042 2410 "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
annieluo2 0:d6c9b09b4042 2411 }
annieluo2 0:d6c9b09b4042 2412 }